1 // ------------------------------------------------------------------
2 // Copyright (c) 2004-2010 Atheros Corporation. All rights reserved.
5 // Permission to use, copy, modify, and/or distribute this software for any
6 // purpose with or without fee is hereby granted, provided that the above
7 // copyright notice and this permission notice appear in all copies.
9 // THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 // WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 // MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 // ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 // WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 // ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 // OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 // ------------------------------------------------------------------
19 //===================================================================
20 // Author(s): ="Atheros"
21 //===================================================================
23 /* Copyright (C) 2009 Denali Software Inc. All rights reserved */
24 /* THIS FILE IS AUTOMATICALLY GENERATED BY DENALI BLUEPRINT, DO NOT EDIT */
27 #ifndef _ANALOG_INTF_ATHR_WLAN_REG_REG_H_
28 #define _ANALOG_INTF_ATHR_WLAN_REG_REG_H_
31 /* macros for RXRF_BIAS1 */
32 #define PHY_ANALOG_RXRF_BIAS1_ADDRESS 0x00000000
33 #define PHY_ANALOG_RXRF_BIAS1_OFFSET 0x00000000
34 #define PHY_ANALOG_RXRF_BIAS1_SPARE_MSB 0
35 #define PHY_ANALOG_RXRF_BIAS1_SPARE_LSB 0
36 #define PHY_ANALOG_RXRF_BIAS1_SPARE_MASK 0x00000001
37 #define PHY_ANALOG_RXRF_BIAS1_SPARE_GET(x) (((x) & 0x00000001) >> 0)
38 #define PHY_ANALOG_RXRF_BIAS1_SPARE_SET(x) (((x) << 0) & 0x00000001)
39 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_MSB 3
40 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_LSB 1
41 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_MASK 0x0000000e
42 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_GET(x) (((x) & 0x0000000e) >> 1)
43 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_SET(x) (((x) << 1) & 0x0000000e)
44 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_MSB 6
45 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_LSB 4
46 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_MASK 0x00000070
47 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_GET(x) (((x) & 0x00000070) >> 4)
48 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_SET(x) (((x) << 4) & 0x00000070)
49 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_MSB 9
50 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_LSB 7
51 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_MASK 0x00000380
52 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_GET(x) (((x) & 0x00000380) >> 7)
53 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_SET(x) (((x) << 7) & 0x00000380)
54 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_MSB 12
55 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_LSB 10
56 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_MASK 0x00001c00
57 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_GET(x) (((x) & 0x00001c00) >> 10)
58 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_SET(x) (((x) << 10) & 0x00001c00)
59 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_MSB 15
60 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_LSB 13
61 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_MASK 0x0000e000
62 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_GET(x) (((x) & 0x0000e000) >> 13)
63 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_SET(x) (((x) << 13) & 0x0000e000)
64 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_MSB 18
65 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_LSB 16
66 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_MASK 0x00070000
67 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_GET(x) (((x) & 0x00070000) >> 16)
68 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_SET(x) (((x) << 16) & 0x00070000)
69 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_MSB 21
70 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_LSB 19
71 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_MASK 0x00380000
72 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_GET(x) (((x) & 0x00380000) >> 19)
73 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_SET(x) (((x) << 19) & 0x00380000)
74 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_MSB 24
75 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_LSB 22
76 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_MASK 0x01c00000
77 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_GET(x) (((x) & 0x01c00000) >> 22)
78 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_SET(x) (((x) << 22) & 0x01c00000)
79 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_MSB 27
80 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_LSB 25
81 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_MASK 0x0e000000
82 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_GET(x) (((x) & 0x0e000000) >> 25)
83 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_SET(x) (((x) << 25) & 0x0e000000)
84 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_MSB 30
85 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_LSB 28
86 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_MASK 0x70000000
87 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_GET(x) (((x) & 0x70000000) >> 28)
88 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_SET(x) (((x) << 28) & 0x70000000)
89 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_MSB 31
90 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_LSB 31
91 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_MASK 0x80000000
92 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_GET(x) (((x) & 0x80000000) >> 31)
93 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_SET(x) (((x) << 31) & 0x80000000)
95 /* macros for RXRF_BIAS2 */
96 #define PHY_ANALOG_RXRF_BIAS2_ADDRESS 0x00000004
97 #define PHY_ANALOG_RXRF_BIAS2_OFFSET 0x00000004
98 #define PHY_ANALOG_RXRF_BIAS2_SPARE_MSB 0
99 #define PHY_ANALOG_RXRF_BIAS2_SPARE_LSB 0
100 #define PHY_ANALOG_RXRF_BIAS2_SPARE_MASK 0x00000001
101 #define PHY_ANALOG_RXRF_BIAS2_SPARE_GET(x) (((x) & 0x00000001) >> 0)
102 #define PHY_ANALOG_RXRF_BIAS2_SPARE_SET(x) (((x) << 0) & 0x00000001)
103 #define PHY_ANALOG_RXRF_BIAS2_PKEN_MSB 3
104 #define PHY_ANALOG_RXRF_BIAS2_PKEN_LSB 1
105 #define PHY_ANALOG_RXRF_BIAS2_PKEN_MASK 0x0000000e
106 #define PHY_ANALOG_RXRF_BIAS2_PKEN_GET(x) (((x) & 0x0000000e) >> 1)
107 #define PHY_ANALOG_RXRF_BIAS2_PKEN_SET(x) (((x) << 1) & 0x0000000e)
108 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_MSB 6
109 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_LSB 4
110 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_MASK 0x00000070
111 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_GET(x) (((x) & 0x00000070) >> 4)
112 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_SET(x) (((x) << 4) & 0x00000070)
113 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_MSB 7
114 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_LSB 7
115 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_MASK 0x00000080
116 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_GET(x) (((x) & 0x00000080) >> 7)
117 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_SET(x) (((x) << 7) & 0x00000080)
118 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_MSB 10
119 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_LSB 8
120 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_MASK 0x00000700
121 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_GET(x) (((x) & 0x00000700) >> 8)
122 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_SET(x) (((x) << 8) & 0x00000700)
123 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_MSB 13
124 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_LSB 11
125 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_MASK 0x00003800
126 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_GET(x) (((x) & 0x00003800) >> 11)
127 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_SET(x) (((x) << 11) & 0x00003800)
128 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_MSB 16
129 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_LSB 14
130 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_MASK 0x0001c000
131 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_GET(x) (((x) & 0x0001c000) >> 14)
132 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_SET(x) (((x) << 14) & 0x0001c000)
133 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_MSB 19
134 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_LSB 17
135 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_MASK 0x000e0000
136 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_GET(x) (((x) & 0x000e0000) >> 17)
137 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_SET(x) (((x) << 17) & 0x000e0000)
138 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_MSB 22
139 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_LSB 20
140 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_MASK 0x00700000
141 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_GET(x) (((x) & 0x00700000) >> 20)
142 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_SET(x) (((x) << 20) & 0x00700000)
143 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_MSB 25
144 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_LSB 23
145 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_MASK 0x03800000
146 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_GET(x) (((x) & 0x03800000) >> 23)
147 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_SET(x) (((x) << 23) & 0x03800000)
148 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_MSB 28
149 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_LSB 26
150 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_MASK 0x1c000000
151 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_GET(x) (((x) & 0x1c000000) >> 26)
152 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_SET(x) (((x) << 26) & 0x1c000000)
153 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_MSB 31
154 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_LSB 29
155 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_MASK 0xe0000000
156 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_GET(x) (((x) & 0xe0000000) >> 29)
157 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_SET(x) (((x) << 29) & 0xe0000000)
159 /* macros for RXRF_GAINSTAGES */
160 #define PHY_ANALOG_RXRF_GAINSTAGES_ADDRESS 0x00000008
161 #define PHY_ANALOG_RXRF_GAINSTAGES_OFFSET 0x00000008
162 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_MSB 0
163 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_LSB 0
164 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_MASK 0x00000001
165 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_GET(x) (((x) & 0x00000001) >> 0)
166 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_SET(x) (((x) << 0) & 0x00000001)
167 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_MSB 1
168 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_LSB 1
169 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_MASK 0x00000002
170 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_GET(x) (((x) & 0x00000002) >> 1)
171 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_SET(x) (((x) << 1) & 0x00000002)
172 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_MSB 3
173 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_LSB 2
174 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_MASK 0x0000000c
175 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_GET(x) (((x) & 0x0000000c) >> 2)
176 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_SET(x) (((x) << 2) & 0x0000000c)
177 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_MSB 5
178 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_LSB 4
179 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_MASK 0x00000030
180 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_GET(x) (((x) & 0x00000030) >> 4)
181 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_SET(x) (((x) << 4) & 0x00000030)
182 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_MSB 6
183 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_LSB 6
184 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_MASK 0x00000040
185 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_GET(x) (((x) & 0x00000040) >> 6)
186 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_SET(x) (((x) << 6) & 0x00000040)
187 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_MSB 7
188 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_LSB 7
189 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_MASK 0x00000080
190 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_GET(x) (((x) & 0x00000080) >> 7)
191 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_SET(x) (((x) << 7) & 0x00000080)
192 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_MSB 8
193 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_LSB 8
194 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_MASK 0x00000100
195 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_GET(x) (((x) & 0x00000100) >> 8)
196 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_SET(x) (((x) << 8) & 0x00000100)
197 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_MSB 9
198 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_LSB 9
199 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_MASK 0x00000200
200 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_GET(x) (((x) & 0x00000200) >> 9)
201 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_SET(x) (((x) << 9) & 0x00000200)
202 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_MSB 10
203 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_LSB 10
204 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_MASK 0x00000400
205 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_GET(x) (((x) & 0x00000400) >> 10)
206 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_SET(x) (((x) << 10) & 0x00000400)
207 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_MSB 12
208 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_LSB 11
209 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_MASK 0x00001800
210 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_GET(x) (((x) & 0x00001800) >> 11)
211 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_SET(x) (((x) << 11) & 0x00001800)
212 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_MSB 13
213 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_LSB 13
214 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_MASK 0x00002000
215 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_GET(x) (((x) & 0x00002000) >> 13)
216 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_SET(x) (((x) << 13) & 0x00002000)
217 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_MSB 14
218 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_LSB 14
219 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_MASK 0x00004000
220 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_GET(x) (((x) & 0x00004000) >> 14)
221 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_SET(x) (((x) << 14) & 0x00004000)
222 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_MSB 15
223 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_LSB 15
224 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_MASK 0x00008000
225 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_GET(x) (((x) & 0x00008000) >> 15)
226 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_SET(x) (((x) << 15) & 0x00008000)
227 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_MSB 16
228 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_LSB 16
229 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_MASK 0x00010000
230 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_GET(x) (((x) & 0x00010000) >> 16)
231 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_SET(x) (((x) << 16) & 0x00010000)
232 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_MSB 17
233 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_LSB 17
234 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_MASK 0x00020000
235 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_GET(x) (((x) & 0x00020000) >> 17)
236 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_SET(x) (((x) << 17) & 0x00020000)
237 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_MSB 19
238 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_LSB 18
239 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_MASK 0x000c0000
240 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_GET(x) (((x) & 0x000c0000) >> 18)
241 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_SET(x) (((x) << 18) & 0x000c0000)
242 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_MSB 22
243 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_LSB 20
244 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_MASK 0x00700000
245 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_GET(x) (((x) & 0x00700000) >> 20)
246 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_SET(x) (((x) << 20) & 0x00700000)
247 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_MSB 25
248 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_LSB 23
249 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_MASK 0x03800000
250 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_GET(x) (((x) & 0x03800000) >> 23)
251 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_SET(x) (((x) << 23) & 0x03800000)
252 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_MSB 27
253 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_LSB 26
254 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_MASK 0x0c000000
255 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_GET(x) (((x) & 0x0c000000) >> 26)
256 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_SET(x) (((x) << 26) & 0x0c000000)
257 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_MSB 30
258 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_LSB 28
259 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_MASK 0x70000000
260 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_GET(x) (((x) & 0x70000000) >> 28)
261 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_SET(x) (((x) << 28) & 0x70000000)
262 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_MSB 31
263 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_LSB 31
264 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_MASK 0x80000000
265 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_GET(x) (((x) & 0x80000000) >> 31)
266 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_SET(x) (((x) << 31) & 0x80000000)
268 /* macros for RXRF_AGC */
269 #define PHY_ANALOG_RXRF_AGC_ADDRESS 0x0000000c
270 #define PHY_ANALOG_RXRF_AGC_OFFSET 0x0000000c
271 #define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_MSB 0
272 #define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_LSB 0
273 #define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_MASK 0x00000001
274 #define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_GET(x) (((x) & 0x00000001) >> 0)
275 #define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_SET(x) (((x) << 0) & 0x00000001)
276 #define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_MSB 1
277 #define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_LSB 1
278 #define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_MASK 0x00000002
279 #define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_GET(x) (((x) & 0x00000002) >> 1)
280 #define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_SET(x) (((x) << 1) & 0x00000002)
281 #define PHY_ANALOG_RXRF_AGC_AGC_OUT_MSB 2
282 #define PHY_ANALOG_RXRF_AGC_AGC_OUT_LSB 2
283 #define PHY_ANALOG_RXRF_AGC_AGC_OUT_MASK 0x00000004
284 #define PHY_ANALOG_RXRF_AGC_AGC_OUT_GET(x) (((x) & 0x00000004) >> 2)
285 #define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_MSB 3
286 #define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_LSB 3
287 #define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_MASK 0x00000008
288 #define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_GET(x) (((x) & 0x00000008) >> 3)
289 #define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_SET(x) (((x) << 3) & 0x00000008)
290 #define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_MSB 4
291 #define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_LSB 4
292 #define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_MASK 0x00000010
293 #define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_GET(x) (((x) & 0x00000010) >> 4)
294 #define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_SET(x) (((x) << 4) & 0x00000010)
295 #define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_MSB 5
296 #define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_LSB 5
297 #define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_MASK 0x00000020
298 #define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_GET(x) (((x) & 0x00000020) >> 5)
299 #define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_SET(x) (((x) << 5) & 0x00000020)
300 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_MSB 8
301 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_LSB 6
302 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_MASK 0x000001c0
303 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_GET(x) (((x) & 0x000001c0) >> 6)
304 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_SET(x) (((x) << 6) & 0x000001c0)
305 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_MSB 14
306 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_LSB 9
307 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_MASK 0x00007e00
308 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_GET(x) (((x) & 0x00007e00) >> 9)
309 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_SET(x) (((x) << 9) & 0x00007e00)
310 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_MSB 18
311 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_LSB 15
312 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_MASK 0x00078000
313 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_GET(x) (((x) & 0x00078000) >> 15)
314 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_SET(x) (((x) << 15) & 0x00078000)
315 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_MSB 24
316 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_LSB 19
317 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_MASK 0x01f80000
318 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_GET(x) (((x) & 0x01f80000) >> 19)
319 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_SET(x) (((x) << 19) & 0x01f80000)
320 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_MSB 28
321 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_LSB 25
322 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_MASK 0x1e000000
323 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_GET(x) (((x) & 0x1e000000) >> 25)
324 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_SET(x) (((x) << 25) & 0x1e000000)
325 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_MSB 29
326 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_LSB 29
327 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_MASK 0x20000000
328 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_GET(x) (((x) & 0x20000000) >> 29)
329 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_SET(x) (((x) << 29) & 0x20000000)
330 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_MSB 30
331 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_LSB 30
332 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_MASK 0x40000000
333 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_GET(x) (((x) & 0x40000000) >> 30)
334 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_SET(x) (((x) << 30) & 0x40000000)
335 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_MSB 31
336 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_LSB 31
337 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_MASK 0x80000000
338 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_GET(x) (((x) & 0x80000000) >> 31)
339 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_SET(x) (((x) << 31) & 0x80000000)
341 /* macros for TXRF1 */
342 #define PHY_ANALOG_TXRF1_ADDRESS 0x00000040
343 #define PHY_ANALOG_TXRF1_OFFSET 0x00000040
344 #define PHY_ANALOG_TXRF1_PDLOBUF5G_MSB 0
345 #define PHY_ANALOG_TXRF1_PDLOBUF5G_LSB 0
346 #define PHY_ANALOG_TXRF1_PDLOBUF5G_MASK 0x00000001
347 #define PHY_ANALOG_TXRF1_PDLOBUF5G_GET(x) (((x) & 0x00000001) >> 0)
348 #define PHY_ANALOG_TXRF1_PDLOBUF5G_SET(x) (((x) << 0) & 0x00000001)
349 #define PHY_ANALOG_TXRF1_PDLODIV5G_MSB 1
350 #define PHY_ANALOG_TXRF1_PDLODIV5G_LSB 1
351 #define PHY_ANALOG_TXRF1_PDLODIV5G_MASK 0x00000002
352 #define PHY_ANALOG_TXRF1_PDLODIV5G_GET(x) (((x) & 0x00000002) >> 1)
353 #define PHY_ANALOG_TXRF1_PDLODIV5G_SET(x) (((x) << 1) & 0x00000002)
354 #define PHY_ANALOG_TXRF1_LOBUF5GFORCED_MSB 2
355 #define PHY_ANALOG_TXRF1_LOBUF5GFORCED_LSB 2
356 #define PHY_ANALOG_TXRF1_LOBUF5GFORCED_MASK 0x00000004
357 #define PHY_ANALOG_TXRF1_LOBUF5GFORCED_GET(x) (((x) & 0x00000004) >> 2)
358 #define PHY_ANALOG_TXRF1_LOBUF5GFORCED_SET(x) (((x) << 2) & 0x00000004)
359 #define PHY_ANALOG_TXRF1_LODIV5GFORCED_MSB 3
360 #define PHY_ANALOG_TXRF1_LODIV5GFORCED_LSB 3
361 #define PHY_ANALOG_TXRF1_LODIV5GFORCED_MASK 0x00000008
362 #define PHY_ANALOG_TXRF1_LODIV5GFORCED_GET(x) (((x) & 0x00000008) >> 3)
363 #define PHY_ANALOG_TXRF1_LODIV5GFORCED_SET(x) (((x) << 3) & 0x00000008)
364 #define PHY_ANALOG_TXRF1_PADRV2GN5G_MSB 7
365 #define PHY_ANALOG_TXRF1_PADRV2GN5G_LSB 4
366 #define PHY_ANALOG_TXRF1_PADRV2GN5G_MASK 0x000000f0
367 #define PHY_ANALOG_TXRF1_PADRV2GN5G_GET(x) (((x) & 0x000000f0) >> 4)
368 #define PHY_ANALOG_TXRF1_PADRV2GN5G_SET(x) (((x) << 4) & 0x000000f0)
369 #define PHY_ANALOG_TXRF1_PADRV3GN5G_MSB 11
370 #define PHY_ANALOG_TXRF1_PADRV3GN5G_LSB 8
371 #define PHY_ANALOG_TXRF1_PADRV3GN5G_MASK 0x00000f00
372 #define PHY_ANALOG_TXRF1_PADRV3GN5G_GET(x) (((x) & 0x00000f00) >> 8)
373 #define PHY_ANALOG_TXRF1_PADRV3GN5G_SET(x) (((x) << 8) & 0x00000f00)
374 #define PHY_ANALOG_TXRF1_PADRV4GN5G_MSB 15
375 #define PHY_ANALOG_TXRF1_PADRV4GN5G_LSB 12
376 #define PHY_ANALOG_TXRF1_PADRV4GN5G_MASK 0x0000f000
377 #define PHY_ANALOG_TXRF1_PADRV4GN5G_GET(x) (((x) & 0x0000f000) >> 12)
378 #define PHY_ANALOG_TXRF1_PADRV4GN5G_SET(x) (((x) << 12) & 0x0000f000)
379 #define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_MSB 16
380 #define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_LSB 16
381 #define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_MASK 0x00010000
382 #define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_GET(x) (((x) & 0x00010000) >> 16)
383 #define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_SET(x) (((x) << 16) & 0x00010000)
384 #define PHY_ANALOG_TXRF1_PDOUT2G_MSB 17
385 #define PHY_ANALOG_TXRF1_PDOUT2G_LSB 17
386 #define PHY_ANALOG_TXRF1_PDOUT2G_MASK 0x00020000
387 #define PHY_ANALOG_TXRF1_PDOUT2G_GET(x) (((x) & 0x00020000) >> 17)
388 #define PHY_ANALOG_TXRF1_PDOUT2G_SET(x) (((x) << 17) & 0x00020000)
389 #define PHY_ANALOG_TXRF1_PDDR2G_MSB 18
390 #define PHY_ANALOG_TXRF1_PDDR2G_LSB 18
391 #define PHY_ANALOG_TXRF1_PDDR2G_MASK 0x00040000
392 #define PHY_ANALOG_TXRF1_PDDR2G_GET(x) (((x) & 0x00040000) >> 18)
393 #define PHY_ANALOG_TXRF1_PDDR2G_SET(x) (((x) << 18) & 0x00040000)
394 #define PHY_ANALOG_TXRF1_PDMXR2G_MSB 19
395 #define PHY_ANALOG_TXRF1_PDMXR2G_LSB 19
396 #define PHY_ANALOG_TXRF1_PDMXR2G_MASK 0x00080000
397 #define PHY_ANALOG_TXRF1_PDMXR2G_GET(x) (((x) & 0x00080000) >> 19)
398 #define PHY_ANALOG_TXRF1_PDMXR2G_SET(x) (((x) << 19) & 0x00080000)
399 #define PHY_ANALOG_TXRF1_PDLOBUF2G_MSB 20
400 #define PHY_ANALOG_TXRF1_PDLOBUF2G_LSB 20
401 #define PHY_ANALOG_TXRF1_PDLOBUF2G_MASK 0x00100000
402 #define PHY_ANALOG_TXRF1_PDLOBUF2G_GET(x) (((x) & 0x00100000) >> 20)
403 #define PHY_ANALOG_TXRF1_PDLOBUF2G_SET(x) (((x) << 20) & 0x00100000)
404 #define PHY_ANALOG_TXRF1_PDLODIV2G_MSB 21
405 #define PHY_ANALOG_TXRF1_PDLODIV2G_LSB 21
406 #define PHY_ANALOG_TXRF1_PDLODIV2G_MASK 0x00200000
407 #define PHY_ANALOG_TXRF1_PDLODIV2G_GET(x) (((x) & 0x00200000) >> 21)
408 #define PHY_ANALOG_TXRF1_PDLODIV2G_SET(x) (((x) << 21) & 0x00200000)
409 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_MSB 22
410 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_LSB 22
411 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_MASK 0x00400000
412 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_GET(x) (((x) & 0x00400000) >> 22)
413 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_SET(x) (((x) << 22) & 0x00400000)
414 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_MSB 23
415 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_LSB 23
416 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_MASK 0x00800000
417 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_GET(x) (((x) & 0x00800000) >> 23)
418 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_SET(x) (((x) << 23) & 0x00800000)
419 #define PHY_ANALOG_TXRF1_PADRVGN2G_MSB 30
420 #define PHY_ANALOG_TXRF1_PADRVGN2G_LSB 24
421 #define PHY_ANALOG_TXRF1_PADRVGN2G_MASK 0x7f000000
422 #define PHY_ANALOG_TXRF1_PADRVGN2G_GET(x) (((x) & 0x7f000000) >> 24)
423 #define PHY_ANALOG_TXRF1_PADRVGN2G_SET(x) (((x) << 24) & 0x7f000000)
424 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_MSB 31
425 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_LSB 31
426 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_MASK 0x80000000
427 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_GET(x) (((x) & 0x80000000) >> 31)
428 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_SET(x) (((x) << 31) & 0x80000000)
430 /* macros for TXRF2 */
431 #define PHY_ANALOG_TXRF2_ADDRESS 0x00000044
432 #define PHY_ANALOG_TXRF2_OFFSET 0x00000044
433 #define PHY_ANALOG_TXRF2_D3B5G_MSB 2
434 #define PHY_ANALOG_TXRF2_D3B5G_LSB 0
435 #define PHY_ANALOG_TXRF2_D3B5G_MASK 0x00000007
436 #define PHY_ANALOG_TXRF2_D3B5G_GET(x) (((x) & 0x00000007) >> 0)
437 #define PHY_ANALOG_TXRF2_D3B5G_SET(x) (((x) << 0) & 0x00000007)
438 #define PHY_ANALOG_TXRF2_D4B5G_MSB 5
439 #define PHY_ANALOG_TXRF2_D4B5G_LSB 3
440 #define PHY_ANALOG_TXRF2_D4B5G_MASK 0x00000038
441 #define PHY_ANALOG_TXRF2_D4B5G_GET(x) (((x) & 0x00000038) >> 3)
442 #define PHY_ANALOG_TXRF2_D4B5G_SET(x) (((x) << 3) & 0x00000038)
443 #define PHY_ANALOG_TXRF2_OCAS2G_MSB 8
444 #define PHY_ANALOG_TXRF2_OCAS2G_LSB 6
445 #define PHY_ANALOG_TXRF2_OCAS2G_MASK 0x000001c0
446 #define PHY_ANALOG_TXRF2_OCAS2G_GET(x) (((x) & 0x000001c0) >> 6)
447 #define PHY_ANALOG_TXRF2_OCAS2G_SET(x) (((x) << 6) & 0x000001c0)
448 #define PHY_ANALOG_TXRF2_DCAS2G_MSB 11
449 #define PHY_ANALOG_TXRF2_DCAS2G_LSB 9
450 #define PHY_ANALOG_TXRF2_DCAS2G_MASK 0x00000e00
451 #define PHY_ANALOG_TXRF2_DCAS2G_GET(x) (((x) & 0x00000e00) >> 9)
452 #define PHY_ANALOG_TXRF2_DCAS2G_SET(x) (((x) << 9) & 0x00000e00)
453 #define PHY_ANALOG_TXRF2_OB2G_PALOFF_MSB 14
454 #define PHY_ANALOG_TXRF2_OB2G_PALOFF_LSB 12
455 #define PHY_ANALOG_TXRF2_OB2G_PALOFF_MASK 0x00007000
456 #define PHY_ANALOG_TXRF2_OB2G_PALOFF_GET(x) (((x) & 0x00007000) >> 12)
457 #define PHY_ANALOG_TXRF2_OB2G_PALOFF_SET(x) (((x) << 12) & 0x00007000)
458 #define PHY_ANALOG_TXRF2_OB2G_QAM_MSB 17
459 #define PHY_ANALOG_TXRF2_OB2G_QAM_LSB 15
460 #define PHY_ANALOG_TXRF2_OB2G_QAM_MASK 0x00038000
461 #define PHY_ANALOG_TXRF2_OB2G_QAM_GET(x) (((x) & 0x00038000) >> 15)
462 #define PHY_ANALOG_TXRF2_OB2G_QAM_SET(x) (((x) << 15) & 0x00038000)
463 #define PHY_ANALOG_TXRF2_OB2G_PSK_MSB 20
464 #define PHY_ANALOG_TXRF2_OB2G_PSK_LSB 18
465 #define PHY_ANALOG_TXRF2_OB2G_PSK_MASK 0x001c0000
466 #define PHY_ANALOG_TXRF2_OB2G_PSK_GET(x) (((x) & 0x001c0000) >> 18)
467 #define PHY_ANALOG_TXRF2_OB2G_PSK_SET(x) (((x) << 18) & 0x001c0000)
468 #define PHY_ANALOG_TXRF2_OB2G_CCK_MSB 23
469 #define PHY_ANALOG_TXRF2_OB2G_CCK_LSB 21
470 #define PHY_ANALOG_TXRF2_OB2G_CCK_MASK 0x00e00000
471 #define PHY_ANALOG_TXRF2_OB2G_CCK_GET(x) (((x) & 0x00e00000) >> 21)
472 #define PHY_ANALOG_TXRF2_OB2G_CCK_SET(x) (((x) << 21) & 0x00e00000)
473 #define PHY_ANALOG_TXRF2_DB2G_MSB 26
474 #define PHY_ANALOG_TXRF2_DB2G_LSB 24
475 #define PHY_ANALOG_TXRF2_DB2G_MASK 0x07000000
476 #define PHY_ANALOG_TXRF2_DB2G_GET(x) (((x) & 0x07000000) >> 24)
477 #define PHY_ANALOG_TXRF2_DB2G_SET(x) (((x) << 24) & 0x07000000)
478 #define PHY_ANALOG_TXRF2_PDOUT5G_MSB 30
479 #define PHY_ANALOG_TXRF2_PDOUT5G_LSB 27
480 #define PHY_ANALOG_TXRF2_PDOUT5G_MASK 0x78000000
481 #define PHY_ANALOG_TXRF2_PDOUT5G_GET(x) (((x) & 0x78000000) >> 27)
482 #define PHY_ANALOG_TXRF2_PDOUT5G_SET(x) (((x) << 27) & 0x78000000)
483 #define PHY_ANALOG_TXRF2_PDMXR5G_MSB 31
484 #define PHY_ANALOG_TXRF2_PDMXR5G_LSB 31
485 #define PHY_ANALOG_TXRF2_PDMXR5G_MASK 0x80000000
486 #define PHY_ANALOG_TXRF2_PDMXR5G_GET(x) (((x) & 0x80000000) >> 31)
487 #define PHY_ANALOG_TXRF2_PDMXR5G_SET(x) (((x) << 31) & 0x80000000)
489 /* macros for TXRF3 */
490 #define PHY_ANALOG_TXRF3_ADDRESS 0x00000048
491 #define PHY_ANALOG_TXRF3_OFFSET 0x00000048
492 #define PHY_ANALOG_TXRF3_FILTR2G_MSB 1
493 #define PHY_ANALOG_TXRF3_FILTR2G_LSB 0
494 #define PHY_ANALOG_TXRF3_FILTR2G_MASK 0x00000003
495 #define PHY_ANALOG_TXRF3_FILTR2G_GET(x) (((x) & 0x00000003) >> 0)
496 #define PHY_ANALOG_TXRF3_FILTR2G_SET(x) (((x) << 0) & 0x00000003)
497 #define PHY_ANALOG_TXRF3_PWDFB2_2G_MSB 2
498 #define PHY_ANALOG_TXRF3_PWDFB2_2G_LSB 2
499 #define PHY_ANALOG_TXRF3_PWDFB2_2G_MASK 0x00000004
500 #define PHY_ANALOG_TXRF3_PWDFB2_2G_GET(x) (((x) & 0x00000004) >> 2)
501 #define PHY_ANALOG_TXRF3_PWDFB2_2G_SET(x) (((x) << 2) & 0x00000004)
502 #define PHY_ANALOG_TXRF3_PWDFB1_2G_MSB 3
503 #define PHY_ANALOG_TXRF3_PWDFB1_2G_LSB 3
504 #define PHY_ANALOG_TXRF3_PWDFB1_2G_MASK 0x00000008
505 #define PHY_ANALOG_TXRF3_PWDFB1_2G_GET(x) (((x) & 0x00000008) >> 3)
506 #define PHY_ANALOG_TXRF3_PWDFB1_2G_SET(x) (((x) << 3) & 0x00000008)
507 #define PHY_ANALOG_TXRF3_PDFB2G_MSB 4
508 #define PHY_ANALOG_TXRF3_PDFB2G_LSB 4
509 #define PHY_ANALOG_TXRF3_PDFB2G_MASK 0x00000010
510 #define PHY_ANALOG_TXRF3_PDFB2G_GET(x) (((x) & 0x00000010) >> 4)
511 #define PHY_ANALOG_TXRF3_PDFB2G_SET(x) (((x) << 4) & 0x00000010)
512 #define PHY_ANALOG_TXRF3_RDIV5G_MSB 6
513 #define PHY_ANALOG_TXRF3_RDIV5G_LSB 5
514 #define PHY_ANALOG_TXRF3_RDIV5G_MASK 0x00000060
515 #define PHY_ANALOG_TXRF3_RDIV5G_GET(x) (((x) & 0x00000060) >> 5)
516 #define PHY_ANALOG_TXRF3_RDIV5G_SET(x) (((x) << 5) & 0x00000060)
517 #define PHY_ANALOG_TXRF3_CAPDIV5G_MSB 9
518 #define PHY_ANALOG_TXRF3_CAPDIV5G_LSB 7
519 #define PHY_ANALOG_TXRF3_CAPDIV5G_MASK 0x00000380
520 #define PHY_ANALOG_TXRF3_CAPDIV5G_GET(x) (((x) & 0x00000380) >> 7)
521 #define PHY_ANALOG_TXRF3_CAPDIV5G_SET(x) (((x) << 7) & 0x00000380)
522 #define PHY_ANALOG_TXRF3_PDPREDIST5G_MSB 10
523 #define PHY_ANALOG_TXRF3_PDPREDIST5G_LSB 10
524 #define PHY_ANALOG_TXRF3_PDPREDIST5G_MASK 0x00000400
525 #define PHY_ANALOG_TXRF3_PDPREDIST5G_GET(x) (((x) & 0x00000400) >> 10)
526 #define PHY_ANALOG_TXRF3_PDPREDIST5G_SET(x) (((x) << 10) & 0x00000400)
527 #define PHY_ANALOG_TXRF3_RDIV2G_MSB 12
528 #define PHY_ANALOG_TXRF3_RDIV2G_LSB 11
529 #define PHY_ANALOG_TXRF3_RDIV2G_MASK 0x00001800
530 #define PHY_ANALOG_TXRF3_RDIV2G_GET(x) (((x) & 0x00001800) >> 11)
531 #define PHY_ANALOG_TXRF3_RDIV2G_SET(x) (((x) << 11) & 0x00001800)
532 #define PHY_ANALOG_TXRF3_PDPREDIST2G_MSB 13
533 #define PHY_ANALOG_TXRF3_PDPREDIST2G_LSB 13
534 #define PHY_ANALOG_TXRF3_PDPREDIST2G_MASK 0x00002000
535 #define PHY_ANALOG_TXRF3_PDPREDIST2G_GET(x) (((x) & 0x00002000) >> 13)
536 #define PHY_ANALOG_TXRF3_PDPREDIST2G_SET(x) (((x) << 13) & 0x00002000)
537 #define PHY_ANALOG_TXRF3_OCAS5G_MSB 16
538 #define PHY_ANALOG_TXRF3_OCAS5G_LSB 14
539 #define PHY_ANALOG_TXRF3_OCAS5G_MASK 0x0001c000
540 #define PHY_ANALOG_TXRF3_OCAS5G_GET(x) (((x) & 0x0001c000) >> 14)
541 #define PHY_ANALOG_TXRF3_OCAS5G_SET(x) (((x) << 14) & 0x0001c000)
542 #define PHY_ANALOG_TXRF3_D2CAS5G_MSB 19
543 #define PHY_ANALOG_TXRF3_D2CAS5G_LSB 17
544 #define PHY_ANALOG_TXRF3_D2CAS5G_MASK 0x000e0000
545 #define PHY_ANALOG_TXRF3_D2CAS5G_GET(x) (((x) & 0x000e0000) >> 17)
546 #define PHY_ANALOG_TXRF3_D2CAS5G_SET(x) (((x) << 17) & 0x000e0000)
547 #define PHY_ANALOG_TXRF3_D3CAS5G_MSB 22
548 #define PHY_ANALOG_TXRF3_D3CAS5G_LSB 20
549 #define PHY_ANALOG_TXRF3_D3CAS5G_MASK 0x00700000
550 #define PHY_ANALOG_TXRF3_D3CAS5G_GET(x) (((x) & 0x00700000) >> 20)
551 #define PHY_ANALOG_TXRF3_D3CAS5G_SET(x) (((x) << 20) & 0x00700000)
552 #define PHY_ANALOG_TXRF3_D4CAS5G_MSB 25
553 #define PHY_ANALOG_TXRF3_D4CAS5G_LSB 23
554 #define PHY_ANALOG_TXRF3_D4CAS5G_MASK 0x03800000
555 #define PHY_ANALOG_TXRF3_D4CAS5G_GET(x) (((x) & 0x03800000) >> 23)
556 #define PHY_ANALOG_TXRF3_D4CAS5G_SET(x) (((x) << 23) & 0x03800000)
557 #define PHY_ANALOG_TXRF3_OB5G_MSB 28
558 #define PHY_ANALOG_TXRF3_OB5G_LSB 26
559 #define PHY_ANALOG_TXRF3_OB5G_MASK 0x1c000000
560 #define PHY_ANALOG_TXRF3_OB5G_GET(x) (((x) & 0x1c000000) >> 26)
561 #define PHY_ANALOG_TXRF3_OB5G_SET(x) (((x) << 26) & 0x1c000000)
562 #define PHY_ANALOG_TXRF3_D2B5G_MSB 31
563 #define PHY_ANALOG_TXRF3_D2B5G_LSB 29
564 #define PHY_ANALOG_TXRF3_D2B5G_MASK 0xe0000000
565 #define PHY_ANALOG_TXRF3_D2B5G_GET(x) (((x) & 0xe0000000) >> 29)
566 #define PHY_ANALOG_TXRF3_D2B5G_SET(x) (((x) << 29) & 0xe0000000)
568 /* macros for TXRF4 */
569 #define PHY_ANALOG_TXRF4_ADDRESS 0x0000004c
570 #define PHY_ANALOG_TXRF4_OFFSET 0x0000004c
571 #define PHY_ANALOG_TXRF4_PK1B2G_CCK_MSB 1
572 #define PHY_ANALOG_TXRF4_PK1B2G_CCK_LSB 0
573 #define PHY_ANALOG_TXRF4_PK1B2G_CCK_MASK 0x00000003
574 #define PHY_ANALOG_TXRF4_PK1B2G_CCK_GET(x) (((x) & 0x00000003) >> 0)
575 #define PHY_ANALOG_TXRF4_PK1B2G_CCK_SET(x) (((x) << 0) & 0x00000003)
576 #define PHY_ANALOG_TXRF4_MIOB2G_QAM_MSB 4
577 #define PHY_ANALOG_TXRF4_MIOB2G_QAM_LSB 2
578 #define PHY_ANALOG_TXRF4_MIOB2G_QAM_MASK 0x0000001c
579 #define PHY_ANALOG_TXRF4_MIOB2G_QAM_GET(x) (((x) & 0x0000001c) >> 2)
580 #define PHY_ANALOG_TXRF4_MIOB2G_QAM_SET(x) (((x) << 2) & 0x0000001c)
581 #define PHY_ANALOG_TXRF4_MIOB2G_PSK_MSB 7
582 #define PHY_ANALOG_TXRF4_MIOB2G_PSK_LSB 5
583 #define PHY_ANALOG_TXRF4_MIOB2G_PSK_MASK 0x000000e0
584 #define PHY_ANALOG_TXRF4_MIOB2G_PSK_GET(x) (((x) & 0x000000e0) >> 5)
585 #define PHY_ANALOG_TXRF4_MIOB2G_PSK_SET(x) (((x) << 5) & 0x000000e0)
586 #define PHY_ANALOG_TXRF4_MIOB2G_CCK_MSB 10
587 #define PHY_ANALOG_TXRF4_MIOB2G_CCK_LSB 8
588 #define PHY_ANALOG_TXRF4_MIOB2G_CCK_MASK 0x00000700
589 #define PHY_ANALOG_TXRF4_MIOB2G_CCK_GET(x) (((x) & 0x00000700) >> 8)
590 #define PHY_ANALOG_TXRF4_MIOB2G_CCK_SET(x) (((x) << 8) & 0x00000700)
591 #define PHY_ANALOG_TXRF4_COMP2G_QAM_MSB 13
592 #define PHY_ANALOG_TXRF4_COMP2G_QAM_LSB 11
593 #define PHY_ANALOG_TXRF4_COMP2G_QAM_MASK 0x00003800
594 #define PHY_ANALOG_TXRF4_COMP2G_QAM_GET(x) (((x) & 0x00003800) >> 11)
595 #define PHY_ANALOG_TXRF4_COMP2G_QAM_SET(x) (((x) << 11) & 0x00003800)
596 #define PHY_ANALOG_TXRF4_COMP2G_PSK_MSB 16
597 #define PHY_ANALOG_TXRF4_COMP2G_PSK_LSB 14
598 #define PHY_ANALOG_TXRF4_COMP2G_PSK_MASK 0x0001c000
599 #define PHY_ANALOG_TXRF4_COMP2G_PSK_GET(x) (((x) & 0x0001c000) >> 14)
600 #define PHY_ANALOG_TXRF4_COMP2G_PSK_SET(x) (((x) << 14) & 0x0001c000)
601 #define PHY_ANALOG_TXRF4_COMP2G_CCK_MSB 19
602 #define PHY_ANALOG_TXRF4_COMP2G_CCK_LSB 17
603 #define PHY_ANALOG_TXRF4_COMP2G_CCK_MASK 0x000e0000
604 #define PHY_ANALOG_TXRF4_COMP2G_CCK_GET(x) (((x) & 0x000e0000) >> 17)
605 #define PHY_ANALOG_TXRF4_COMP2G_CCK_SET(x) (((x) << 17) & 0x000e0000)
606 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_MSB 22
607 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_LSB 20
608 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_MASK 0x00700000
609 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_GET(x) (((x) & 0x00700000) >> 20)
610 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_SET(x) (((x) << 20) & 0x00700000)
611 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_MSB 25
612 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_LSB 23
613 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_MASK 0x03800000
614 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_GET(x) (((x) & 0x03800000) >> 23)
615 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_SET(x) (((x) << 23) & 0x03800000)
616 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_MSB 28
617 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_LSB 26
618 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_MASK 0x1c000000
619 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_GET(x) (((x) & 0x1c000000) >> 26)
620 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_SET(x) (((x) << 26) & 0x1c000000)
621 #define PHY_ANALOG_TXRF4_AMP2CAS2G_MSB 31
622 #define PHY_ANALOG_TXRF4_AMP2CAS2G_LSB 29
623 #define PHY_ANALOG_TXRF4_AMP2CAS2G_MASK 0xe0000000
624 #define PHY_ANALOG_TXRF4_AMP2CAS2G_GET(x) (((x) & 0xe0000000) >> 29)
625 #define PHY_ANALOG_TXRF4_AMP2CAS2G_SET(x) (((x) << 29) & 0xe0000000)
627 /* macros for TXRF5 */
628 #define PHY_ANALOG_TXRF5_ADDRESS 0x00000050
629 #define PHY_ANALOG_TXRF5_OFFSET 0x00000050
630 #define PHY_ANALOG_TXRF5_SPARE5_MSB 0
631 #define PHY_ANALOG_TXRF5_SPARE5_LSB 0
632 #define PHY_ANALOG_TXRF5_SPARE5_MASK 0x00000001
633 #define PHY_ANALOG_TXRF5_SPARE5_GET(x) (((x) & 0x00000001) >> 0)
634 #define PHY_ANALOG_TXRF5_SPARE5_SET(x) (((x) << 0) & 0x00000001)
635 #define PHY_ANALOG_TXRF5_PAL_LOCKED_MSB 1
636 #define PHY_ANALOG_TXRF5_PAL_LOCKED_LSB 1
637 #define PHY_ANALOG_TXRF5_PAL_LOCKED_MASK 0x00000002
638 #define PHY_ANALOG_TXRF5_PAL_LOCKED_GET(x) (((x) & 0x00000002) >> 1)
639 #define PHY_ANALOG_TXRF5_FBHI2G_MSB 2
640 #define PHY_ANALOG_TXRF5_FBHI2G_LSB 2
641 #define PHY_ANALOG_TXRF5_FBHI2G_MASK 0x00000004
642 #define PHY_ANALOG_TXRF5_FBHI2G_GET(x) (((x) & 0x00000004) >> 2)
643 #define PHY_ANALOG_TXRF5_FBLO2G_MSB 3
644 #define PHY_ANALOG_TXRF5_FBLO2G_LSB 3
645 #define PHY_ANALOG_TXRF5_FBLO2G_MASK 0x00000008
646 #define PHY_ANALOG_TXRF5_FBLO2G_GET(x) (((x) & 0x00000008) >> 3)
647 #define PHY_ANALOG_TXRF5_NOPALGAIN2G_MSB 4
648 #define PHY_ANALOG_TXRF5_NOPALGAIN2G_LSB 4
649 #define PHY_ANALOG_TXRF5_NOPALGAIN2G_MASK 0x00000010
650 #define PHY_ANALOG_TXRF5_NOPALGAIN2G_GET(x) (((x) & 0x00000010) >> 4)
651 #define PHY_ANALOG_TXRF5_NOPALGAIN2G_SET(x) (((x) << 4) & 0x00000010)
652 #define PHY_ANALOG_TXRF5_ENPACAL2G_MSB 5
653 #define PHY_ANALOG_TXRF5_ENPACAL2G_LSB 5
654 #define PHY_ANALOG_TXRF5_ENPACAL2G_MASK 0x00000020
655 #define PHY_ANALOG_TXRF5_ENPACAL2G_GET(x) (((x) & 0x00000020) >> 5)
656 #define PHY_ANALOG_TXRF5_ENPACAL2G_SET(x) (((x) << 5) & 0x00000020)
657 #define PHY_ANALOG_TXRF5_OFFSET2G_MSB 12
658 #define PHY_ANALOG_TXRF5_OFFSET2G_LSB 6
659 #define PHY_ANALOG_TXRF5_OFFSET2G_MASK 0x00001fc0
660 #define PHY_ANALOG_TXRF5_OFFSET2G_GET(x) (((x) & 0x00001fc0) >> 6)
661 #define PHY_ANALOG_TXRF5_OFFSET2G_SET(x) (((x) << 6) & 0x00001fc0)
662 #define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_MSB 13
663 #define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_LSB 13
664 #define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_MASK 0x00002000
665 #define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_GET(x) (((x) & 0x00002000) >> 13)
666 #define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_SET(x) (((x) << 13) & 0x00002000)
667 #define PHY_ANALOG_TXRF5_REFHI2G_MSB 16
668 #define PHY_ANALOG_TXRF5_REFHI2G_LSB 14
669 #define PHY_ANALOG_TXRF5_REFHI2G_MASK 0x0001c000
670 #define PHY_ANALOG_TXRF5_REFHI2G_GET(x) (((x) & 0x0001c000) >> 14)
671 #define PHY_ANALOG_TXRF5_REFHI2G_SET(x) (((x) << 14) & 0x0001c000)
672 #define PHY_ANALOG_TXRF5_REFLO2G_MSB 19
673 #define PHY_ANALOG_TXRF5_REFLO2G_LSB 17
674 #define PHY_ANALOG_TXRF5_REFLO2G_MASK 0x000e0000
675 #define PHY_ANALOG_TXRF5_REFLO2G_GET(x) (((x) & 0x000e0000) >> 17)
676 #define PHY_ANALOG_TXRF5_REFLO2G_SET(x) (((x) << 17) & 0x000e0000)
677 #define PHY_ANALOG_TXRF5_PALCLAMP2G_MSB 21
678 #define PHY_ANALOG_TXRF5_PALCLAMP2G_LSB 20
679 #define PHY_ANALOG_TXRF5_PALCLAMP2G_MASK 0x00300000
680 #define PHY_ANALOG_TXRF5_PALCLAMP2G_GET(x) (((x) & 0x00300000) >> 20)
681 #define PHY_ANALOG_TXRF5_PALCLAMP2G_SET(x) (((x) << 20) & 0x00300000)
682 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_MSB 23
683 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_LSB 22
684 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_MASK 0x00c00000
685 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_GET(x) (((x) & 0x00c00000) >> 22)
686 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_SET(x) (((x) << 22) & 0x00c00000)
687 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_MSB 25
688 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_LSB 24
689 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_MASK 0x03000000
690 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_GET(x) (((x) & 0x03000000) >> 24)
691 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_SET(x) (((x) << 24) & 0x03000000)
692 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_MSB 27
693 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_LSB 26
694 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_MASK 0x0c000000
695 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_GET(x) (((x) & 0x0c000000) >> 26)
696 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_SET(x) (((x) << 26) & 0x0c000000)
697 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_MSB 29
698 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_LSB 28
699 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_MASK 0x30000000
700 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_GET(x) (((x) & 0x30000000) >> 28)
701 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_SET(x) (((x) << 28) & 0x30000000)
702 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_MSB 31
703 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_LSB 30
704 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_MASK 0xc0000000
705 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_GET(x) (((x) & 0xc0000000) >> 30)
706 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_SET(x) (((x) << 30) & 0xc0000000)
708 /* macros for TXRF6 */
709 #define PHY_ANALOG_TXRF6_ADDRESS 0x00000054
710 #define PHY_ANALOG_TXRF6_OFFSET 0x00000054
711 #define PHY_ANALOG_TXRF6_PALCLKGATE2G_MSB 0
712 #define PHY_ANALOG_TXRF6_PALCLKGATE2G_LSB 0
713 #define PHY_ANALOG_TXRF6_PALCLKGATE2G_MASK 0x00000001
714 #define PHY_ANALOG_TXRF6_PALCLKGATE2G_GET(x) (((x) & 0x00000001) >> 0)
715 #define PHY_ANALOG_TXRF6_PALCLKGATE2G_SET(x) (((x) << 0) & 0x00000001)
716 #define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_MSB 8
717 #define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_LSB 1
718 #define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_MASK 0x000001fe
719 #define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_GET(x) (((x) & 0x000001fe) >> 1)
720 #define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_SET(x) (((x) << 1) & 0x000001fe)
721 #define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_MSB 10
722 #define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_LSB 9
723 #define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_MASK 0x00000600
724 #define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_GET(x) (((x) & 0x00000600) >> 9)
725 #define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_SET(x) (((x) << 9) & 0x00000600)
726 #define PHY_ANALOG_TXRF6_PALNOFLUCT2G_MSB 11
727 #define PHY_ANALOG_TXRF6_PALNOFLUCT2G_LSB 11
728 #define PHY_ANALOG_TXRF6_PALNOFLUCT2G_MASK 0x00000800
729 #define PHY_ANALOG_TXRF6_PALNOFLUCT2G_GET(x) (((x) & 0x00000800) >> 11)
730 #define PHY_ANALOG_TXRF6_PALNOFLUCT2G_SET(x) (((x) << 11) & 0x00000800)
731 #define PHY_ANALOG_TXRF6_GAINSTEP2G_MSB 14
732 #define PHY_ANALOG_TXRF6_GAINSTEP2G_LSB 12
733 #define PHY_ANALOG_TXRF6_GAINSTEP2G_MASK 0x00007000
734 #define PHY_ANALOG_TXRF6_GAINSTEP2G_GET(x) (((x) & 0x00007000) >> 12)
735 #define PHY_ANALOG_TXRF6_GAINSTEP2G_SET(x) (((x) << 12) & 0x00007000)
736 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_MSB 15
737 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_LSB 15
738 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_MASK 0x00008000
739 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_GET(x) (((x) & 0x00008000) >> 15)
740 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_SET(x) (((x) << 15) & 0x00008000)
741 #define PHY_ANALOG_TXRF6_CAPDIV_I2G_MSB 19
742 #define PHY_ANALOG_TXRF6_CAPDIV_I2G_LSB 16
743 #define PHY_ANALOG_TXRF6_CAPDIV_I2G_MASK 0x000f0000
744 #define PHY_ANALOG_TXRF6_CAPDIV_I2G_GET(x) (((x) & 0x000f0000) >> 16)
745 #define PHY_ANALOG_TXRF6_CAPDIV_I2G_SET(x) (((x) << 16) & 0x000f0000)
746 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_MSB 23
747 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_LSB 20
748 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_MASK 0x00f00000
749 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_GET(x) (((x) & 0x00f00000) >> 20)
750 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_SET(x) (((x) << 20) & 0x00f00000)
751 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_MSB 26
752 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_LSB 24
753 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_MASK 0x07000000
754 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_GET(x) (((x) & 0x07000000) >> 24)
755 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_SET(x) (((x) << 24) & 0x07000000)
756 #define PHY_ANALOG_TXRF6_CAPDIV2G_MSB 30
757 #define PHY_ANALOG_TXRF6_CAPDIV2G_LSB 27
758 #define PHY_ANALOG_TXRF6_CAPDIV2G_MASK 0x78000000
759 #define PHY_ANALOG_TXRF6_CAPDIV2G_GET(x) (((x) & 0x78000000) >> 27)
760 #define PHY_ANALOG_TXRF6_CAPDIV2G_SET(x) (((x) << 27) & 0x78000000)
761 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_MSB 31
762 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_LSB 31
763 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_MASK 0x80000000
764 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_GET(x) (((x) & 0x80000000) >> 31)
765 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_SET(x) (((x) << 31) & 0x80000000)
767 /* macros for TXRF7 */
768 #define PHY_ANALOG_TXRF7_ADDRESS 0x00000058
769 #define PHY_ANALOG_TXRF7_OFFSET 0x00000058
770 #define PHY_ANALOG_TXRF7_SPARE7_MSB 1
771 #define PHY_ANALOG_TXRF7_SPARE7_LSB 0
772 #define PHY_ANALOG_TXRF7_SPARE7_MASK 0x00000003
773 #define PHY_ANALOG_TXRF7_SPARE7_GET(x) (((x) & 0x00000003) >> 0)
774 #define PHY_ANALOG_TXRF7_SPARE7_SET(x) (((x) << 0) & 0x00000003)
775 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_MSB 7
776 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_LSB 2
777 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_MASK 0x000000fc
778 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_GET(x) (((x) & 0x000000fc) >> 2)
779 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_SET(x) (((x) << 2) & 0x000000fc)
780 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_MSB 13
781 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_LSB 8
782 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_MASK 0x00003f00
783 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_GET(x) (((x) & 0x00003f00) >> 8)
784 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_SET(x) (((x) << 8) & 0x00003f00)
785 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_MSB 19
786 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_LSB 14
787 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_MASK 0x000fc000
788 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_GET(x) (((x) & 0x000fc000) >> 14)
789 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_SET(x) (((x) << 14) & 0x000fc000)
790 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_MSB 25
791 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_LSB 20
792 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_MASK 0x03f00000
793 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_GET(x) (((x) & 0x03f00000) >> 20)
794 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_SET(x) (((x) << 20) & 0x03f00000)
795 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_MSB 31
796 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_LSB 26
797 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_MASK 0xfc000000
798 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_GET(x) (((x) & 0xfc000000) >> 26)
799 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_SET(x) (((x) << 26) & 0xfc000000)
801 /* macros for TXRF8 */
802 #define PHY_ANALOG_TXRF8_ADDRESS 0x0000005c
803 #define PHY_ANALOG_TXRF8_OFFSET 0x0000005c
804 #define PHY_ANALOG_TXRF8_SPARE8_MSB 1
805 #define PHY_ANALOG_TXRF8_SPARE8_LSB 0
806 #define PHY_ANALOG_TXRF8_SPARE8_MASK 0x00000003
807 #define PHY_ANALOG_TXRF8_SPARE8_GET(x) (((x) & 0x00000003) >> 0)
808 #define PHY_ANALOG_TXRF8_SPARE8_SET(x) (((x) << 0) & 0x00000003)
809 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_MSB 7
810 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_LSB 2
811 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_MASK 0x000000fc
812 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_GET(x) (((x) & 0x000000fc) >> 2)
813 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_SET(x) (((x) << 2) & 0x000000fc)
814 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_MSB 13
815 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_LSB 8
816 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_MASK 0x00003f00
817 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_GET(x) (((x) & 0x00003f00) >> 8)
818 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_SET(x) (((x) << 8) & 0x00003f00)
819 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_MSB 19
820 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_LSB 14
821 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_MASK 0x000fc000
822 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_GET(x) (((x) & 0x000fc000) >> 14)
823 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_SET(x) (((x) << 14) & 0x000fc000)
824 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_MSB 25
825 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_LSB 20
826 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_MASK 0x03f00000
827 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_GET(x) (((x) & 0x03f00000) >> 20)
828 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_SET(x) (((x) << 20) & 0x03f00000)
829 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_MSB 31
830 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_LSB 26
831 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_MASK 0xfc000000
832 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_GET(x) (((x) & 0xfc000000) >> 26)
833 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_SET(x) (((x) << 26) & 0xfc000000)
835 /* macros for TXRF9 */
836 #define PHY_ANALOG_TXRF9_ADDRESS 0x00000060
837 #define PHY_ANALOG_TXRF9_OFFSET 0x00000060
838 #define PHY_ANALOG_TXRF9_SPARE9_MSB 1
839 #define PHY_ANALOG_TXRF9_SPARE9_LSB 0
840 #define PHY_ANALOG_TXRF9_SPARE9_MASK 0x00000003
841 #define PHY_ANALOG_TXRF9_SPARE9_GET(x) (((x) & 0x00000003) >> 0)
842 #define PHY_ANALOG_TXRF9_SPARE9_SET(x) (((x) << 0) & 0x00000003)
843 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_MSB 7
844 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_LSB 2
845 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_MASK 0x000000fc
846 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_GET(x) (((x) & 0x000000fc) >> 2)
847 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_SET(x) (((x) << 2) & 0x000000fc)
848 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_MSB 13
849 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_LSB 8
850 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_MASK 0x00003f00
851 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_GET(x) (((x) & 0x00003f00) >> 8)
852 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_SET(x) (((x) << 8) & 0x00003f00)
853 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_MSB 19
854 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_LSB 14
855 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_MASK 0x000fc000
856 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_GET(x) (((x) & 0x000fc000) >> 14)
857 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_SET(x) (((x) << 14) & 0x000fc000)
858 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_MSB 25
859 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_LSB 20
860 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_MASK 0x03f00000
861 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_GET(x) (((x) & 0x03f00000) >> 20)
862 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_SET(x) (((x) << 20) & 0x03f00000)
863 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_MSB 31
864 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_LSB 26
865 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_MASK 0xfc000000
866 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_GET(x) (((x) & 0xfc000000) >> 26)
867 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_SET(x) (((x) << 26) & 0xfc000000)
869 /* macros for TXRF10 */
870 #define PHY_ANALOG_TXRF10_ADDRESS 0x00000064
871 #define PHY_ANALOG_TXRF10_OFFSET 0x00000064
872 #define PHY_ANALOG_TXRF10_SPARE10_MSB 2
873 #define PHY_ANALOG_TXRF10_SPARE10_LSB 0
874 #define PHY_ANALOG_TXRF10_SPARE10_MASK 0x00000007
875 #define PHY_ANALOG_TXRF10_SPARE10_GET(x) (((x) & 0x00000007) >> 0)
876 #define PHY_ANALOG_TXRF10_SPARE10_SET(x) (((x) << 0) & 0x00000007)
877 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_MSB 3
878 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_LSB 3
879 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_MASK 0x00000008
880 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_GET(x) (((x) & 0x00000008) >> 3)
881 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_SET(x) (((x) << 3) & 0x00000008)
882 #define PHY_ANALOG_TXRF10_D3B5GCALTX_MSB 6
883 #define PHY_ANALOG_TXRF10_D3B5GCALTX_LSB 4
884 #define PHY_ANALOG_TXRF10_D3B5GCALTX_MASK 0x00000070
885 #define PHY_ANALOG_TXRF10_D3B5GCALTX_GET(x) (((x) & 0x00000070) >> 4)
886 #define PHY_ANALOG_TXRF10_D3B5GCALTX_SET(x) (((x) << 4) & 0x00000070)
887 #define PHY_ANALOG_TXRF10_D4B5GCALTX_MSB 9
888 #define PHY_ANALOG_TXRF10_D4B5GCALTX_LSB 7
889 #define PHY_ANALOG_TXRF10_D4B5GCALTX_MASK 0x00000380
890 #define PHY_ANALOG_TXRF10_D4B5GCALTX_GET(x) (((x) & 0x00000380) >> 7)
891 #define PHY_ANALOG_TXRF10_D4B5GCALTX_SET(x) (((x) << 7) & 0x00000380)
892 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_MSB 16
893 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_LSB 10
894 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_MASK 0x0001fc00
895 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_GET(x) (((x) & 0x0001fc00) >> 10)
896 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_SET(x) (((x) << 10) & 0x0001fc00)
897 #define PHY_ANALOG_TXRF10_DB2GCALTX_MSB 19
898 #define PHY_ANALOG_TXRF10_DB2GCALTX_LSB 17
899 #define PHY_ANALOG_TXRF10_DB2GCALTX_MASK 0x000e0000
900 #define PHY_ANALOG_TXRF10_DB2GCALTX_GET(x) (((x) & 0x000e0000) >> 17)
901 #define PHY_ANALOG_TXRF10_DB2GCALTX_SET(x) (((x) << 17) & 0x000e0000)
902 #define PHY_ANALOG_TXRF10_CALTXSHIFT_MSB 20
903 #define PHY_ANALOG_TXRF10_CALTXSHIFT_LSB 20
904 #define PHY_ANALOG_TXRF10_CALTXSHIFT_MASK 0x00100000
905 #define PHY_ANALOG_TXRF10_CALTXSHIFT_GET(x) (((x) & 0x00100000) >> 20)
906 #define PHY_ANALOG_TXRF10_CALTXSHIFT_SET(x) (((x) << 20) & 0x00100000)
907 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_MSB 21
908 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_LSB 21
909 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_MASK 0x00200000
910 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_GET(x) (((x) & 0x00200000) >> 21)
911 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_SET(x) (((x) << 21) & 0x00200000)
912 #define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_MSB 27
913 #define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_LSB 22
914 #define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_MASK 0x0fc00000
915 #define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_GET(x) (((x) & 0x0fc00000) >> 22)
916 #define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_MSB 31
917 #define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_LSB 28
918 #define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_MASK 0xf0000000
919 #define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_GET(x) (((x) & 0xf0000000) >> 28)
921 /* macros for TXRF11 */
922 #define PHY_ANALOG_TXRF11_ADDRESS 0x00000068
923 #define PHY_ANALOG_TXRF11_OFFSET 0x00000068
924 #define PHY_ANALOG_TXRF11_SPARE11_MSB 1
925 #define PHY_ANALOG_TXRF11_SPARE11_LSB 0
926 #define PHY_ANALOG_TXRF11_SPARE11_MASK 0x00000003
927 #define PHY_ANALOG_TXRF11_SPARE11_GET(x) (((x) & 0x00000003) >> 0)
928 #define PHY_ANALOG_TXRF11_SPARE11_SET(x) (((x) << 0) & 0x00000003)
929 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_MSB 4
930 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_LSB 2
931 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_MASK 0x0000001c
932 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_GET(x) (((x) & 0x0000001c) >> 2)
933 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_SET(x) (((x) << 2) & 0x0000001c)
934 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_MSB 7
935 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_LSB 5
936 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_MASK 0x000000e0
937 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_GET(x) (((x) & 0x000000e0) >> 5)
938 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_SET(x) (((x) << 5) & 0x000000e0)
939 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_MSB 10
940 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_LSB 8
941 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_MASK 0x00000700
942 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_GET(x) (((x) & 0x00000700) >> 8)
943 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_SET(x) (((x) << 8) & 0x00000700)
944 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_MSB 13
945 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_LSB 11
946 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_MASK 0x00003800
947 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_GET(x) (((x) & 0x00003800) >> 11)
948 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_SET(x) (((x) << 11) & 0x00003800)
949 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_MSB 16
950 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_LSB 14
951 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_MASK 0x0001c000
952 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_GET(x) (((x) & 0x0001c000) >> 14)
953 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_SET(x) (((x) << 14) & 0x0001c000)
954 #define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_MSB 19
955 #define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_LSB 17
956 #define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_MASK 0x000e0000
957 #define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_GET(x) (((x) & 0x000e0000) >> 17)
958 #define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_SET(x) (((x) << 17) & 0x000e0000)
959 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_MSB 22
960 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_LSB 20
961 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_MASK 0x00700000
962 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_GET(x) (((x) & 0x00700000) >> 20)
963 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_SET(x) (((x) << 20) & 0x00700000)
964 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_MSB 25
965 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_LSB 23
966 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_MASK 0x03800000
967 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_GET(x) (((x) & 0x03800000) >> 23)
968 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_SET(x) (((x) << 23) & 0x03800000)
969 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_MSB 28
970 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_LSB 26
971 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_MASK 0x1c000000
972 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_GET(x) (((x) & 0x1c000000) >> 26)
973 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_SET(x) (((x) << 26) & 0x1c000000)
974 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_MSB 31
975 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_LSB 29
976 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_MASK 0xe0000000
977 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_GET(x) (((x) & 0xe0000000) >> 29)
978 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_SET(x) (((x) << 29) & 0xe0000000)
980 /* macros for TXRF12 */
981 #define PHY_ANALOG_TXRF12_ADDRESS 0x0000006c
982 #define PHY_ANALOG_TXRF12_OFFSET 0x0000006c
983 #define PHY_ANALOG_TXRF12_SPARE12_2_MSB 7
984 #define PHY_ANALOG_TXRF12_SPARE12_2_LSB 0
985 #define PHY_ANALOG_TXRF12_SPARE12_2_MASK 0x000000ff
986 #define PHY_ANALOG_TXRF12_SPARE12_2_GET(x) (((x) & 0x000000ff) >> 0)
987 #define PHY_ANALOG_TXRF12_SPARE12_1_MSB 9
988 #define PHY_ANALOG_TXRF12_SPARE12_1_LSB 8
989 #define PHY_ANALOG_TXRF12_SPARE12_1_MASK 0x00000300
990 #define PHY_ANALOG_TXRF12_SPARE12_1_GET(x) (((x) & 0x00000300) >> 8)
991 #define PHY_ANALOG_TXRF12_SPARE12_1_SET(x) (((x) << 8) & 0x00000300)
992 #define PHY_ANALOG_TXRF12_ATBSEL5G_MSB 13
993 #define PHY_ANALOG_TXRF12_ATBSEL5G_LSB 10
994 #define PHY_ANALOG_TXRF12_ATBSEL5G_MASK 0x00003c00
995 #define PHY_ANALOG_TXRF12_ATBSEL5G_GET(x) (((x) & 0x00003c00) >> 10)
996 #define PHY_ANALOG_TXRF12_ATBSEL5G_SET(x) (((x) << 10) & 0x00003c00)
997 #define PHY_ANALOG_TXRF12_ATBSEL2G_MSB 16
998 #define PHY_ANALOG_TXRF12_ATBSEL2G_LSB 14
999 #define PHY_ANALOG_TXRF12_ATBSEL2G_MASK 0x0001c000
1000 #define PHY_ANALOG_TXRF12_ATBSEL2G_GET(x) (((x) & 0x0001c000) >> 14)
1001 #define PHY_ANALOG_TXRF12_ATBSEL2G_SET(x) (((x) << 14) & 0x0001c000)
1002 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_MSB 19
1003 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_LSB 17
1004 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_MASK 0x000e0000
1005 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_GET(x) (((x) & 0x000e0000) >> 17)
1006 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_SET(x) (((x) << 17) & 0x000e0000)
1007 #define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_MSB 22
1008 #define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_LSB 20
1009 #define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_MASK 0x00700000
1010 #define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_GET(x) (((x) & 0x00700000) >> 20)
1011 #define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_SET(x) (((x) << 20) & 0x00700000)
1012 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_MSB 25
1013 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_LSB 23
1014 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_MASK 0x03800000
1015 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_GET(x) (((x) & 0x03800000) >> 23)
1016 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_SET(x) (((x) << 23) & 0x03800000)
1017 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_MSB 28
1018 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_LSB 26
1019 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_MASK 0x1c000000
1020 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_GET(x) (((x) & 0x1c000000) >> 26)
1021 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_SET(x) (((x) << 26) & 0x1c000000)
1022 #define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_MSB 31
1023 #define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_LSB 29
1024 #define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_MASK 0xe0000000
1025 #define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_GET(x) (((x) & 0xe0000000) >> 29)
1026 #define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_SET(x) (((x) << 29) & 0xe0000000)
1028 /* macros for SYNTH1 */
1029 #define PHY_ANALOG_SYNTH1_ADDRESS 0x00000080
1030 #define PHY_ANALOG_SYNTH1_OFFSET 0x00000080
1031 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_MSB 2
1032 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_LSB 0
1033 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_MASK 0x00000007
1034 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_GET(x) (((x) & 0x00000007) >> 0)
1035 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_SET(x) (((x) << 0) & 0x00000007)
1036 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_MSB 5
1037 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_LSB 3
1038 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_MASK 0x00000038
1039 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_GET(x) (((x) & 0x00000038) >> 3)
1040 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_SET(x) (((x) << 3) & 0x00000038)
1041 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_MSB 6
1042 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_LSB 6
1043 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_MASK 0x00000040
1044 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_GET(x) (((x) & 0x00000040) >> 6)
1045 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_SET(x) (((x) << 6) & 0x00000040)
1046 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_MSB 7
1047 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_LSB 7
1048 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_MASK 0x00000080
1049 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_GET(x) (((x) & 0x00000080) >> 7)
1050 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_SET(x) (((x) << 7) & 0x00000080)
1051 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_MSB 8
1052 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_LSB 8
1053 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_MASK 0x00000100
1054 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_GET(x) (((x) & 0x00000100) >> 8)
1055 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_SET(x) (((x) << 8) & 0x00000100)
1056 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_MSB 9
1057 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_LSB 9
1058 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_MASK 0x00000200
1059 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_GET(x) (((x) & 0x00000200) >> 9)
1060 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_SET(x) (((x) << 9) & 0x00000200)
1061 #define PHY_ANALOG_SYNTH1_MONITOR_REF_MSB 10
1062 #define PHY_ANALOG_SYNTH1_MONITOR_REF_LSB 10
1063 #define PHY_ANALOG_SYNTH1_MONITOR_REF_MASK 0x00000400
1064 #define PHY_ANALOG_SYNTH1_MONITOR_REF_GET(x) (((x) & 0x00000400) >> 10)
1065 #define PHY_ANALOG_SYNTH1_MONITOR_REF_SET(x) (((x) << 10) & 0x00000400)
1066 #define PHY_ANALOG_SYNTH1_MONITOR_FB_MSB 11
1067 #define PHY_ANALOG_SYNTH1_MONITOR_FB_LSB 11
1068 #define PHY_ANALOG_SYNTH1_MONITOR_FB_MASK 0x00000800
1069 #define PHY_ANALOG_SYNTH1_MONITOR_FB_GET(x) (((x) & 0x00000800) >> 11)
1070 #define PHY_ANALOG_SYNTH1_MONITOR_FB_SET(x) (((x) << 11) & 0x00000800)
1071 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_MSB 12
1072 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_LSB 12
1073 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_MASK 0x00001000
1074 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_GET(x) (((x) & 0x00001000) >> 12)
1075 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_SET(x) (((x) << 12) & 0x00001000)
1076 #define PHY_ANALOG_SYNTH1_PWUP_PD_MSB 15
1077 #define PHY_ANALOG_SYNTH1_PWUP_PD_LSB 13
1078 #define PHY_ANALOG_SYNTH1_PWUP_PD_MASK 0x0000e000
1079 #define PHY_ANALOG_SYNTH1_PWUP_PD_GET(x) (((x) & 0x0000e000) >> 13)
1080 #define PHY_ANALOG_SYNTH1_PWUP_PD_SET(x) (((x) << 13) & 0x0000e000)
1081 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_MSB 16
1082 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_LSB 16
1083 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_MASK 0x00010000
1084 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_GET(x) (((x) & 0x00010000) >> 16)
1085 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_SET(x) (((x) << 16) & 0x00010000)
1086 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_MSB 18
1087 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_LSB 17
1088 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_MASK 0x00060000
1089 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_GET(x) (((x) & 0x00060000) >> 17)
1090 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_SET(x) (((x) << 17) & 0x00060000)
1091 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_MSB 20
1092 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_LSB 19
1093 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_MASK 0x00180000
1094 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_GET(x) (((x) & 0x00180000) >> 19)
1095 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_SET(x) (((x) << 19) & 0x00180000)
1096 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_MSB 21
1097 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_LSB 21
1098 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_MASK 0x00200000
1099 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_GET(x) (((x) & 0x00200000) >> 21)
1100 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_SET(x) (((x) << 21) & 0x00200000)
1101 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_MSB 22
1102 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_LSB 22
1103 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_MASK 0x00400000
1104 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_GET(x) (((x) & 0x00400000) >> 22)
1105 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_SET(x) (((x) << 22) & 0x00400000)
1106 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_MSB 23
1107 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_LSB 23
1108 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_MASK 0x00800000
1109 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_GET(x) (((x) & 0x00800000) >> 23)
1110 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_SET(x) (((x) << 23) & 0x00800000)
1111 #define PHY_ANALOG_SYNTH1_PWD_LODIV_MSB 24
1112 #define PHY_ANALOG_SYNTH1_PWD_LODIV_LSB 24
1113 #define PHY_ANALOG_SYNTH1_PWD_LODIV_MASK 0x01000000
1114 #define PHY_ANALOG_SYNTH1_PWD_LODIV_GET(x) (((x) & 0x01000000) >> 24)
1115 #define PHY_ANALOG_SYNTH1_PWD_LODIV_SET(x) (((x) << 24) & 0x01000000)
1116 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_MSB 25
1117 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_LSB 25
1118 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_MASK 0x02000000
1119 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_GET(x) (((x) & 0x02000000) >> 25)
1120 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_SET(x) (((x) << 25) & 0x02000000)
1121 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_MSB 26
1122 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_LSB 26
1123 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_MASK 0x04000000
1124 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_GET(x) (((x) & 0x04000000) >> 26)
1125 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_SET(x) (((x) << 26) & 0x04000000)
1126 #define PHY_ANALOG_SYNTH1_PWD_PRESC_MSB 27
1127 #define PHY_ANALOG_SYNTH1_PWD_PRESC_LSB 27
1128 #define PHY_ANALOG_SYNTH1_PWD_PRESC_MASK 0x08000000
1129 #define PHY_ANALOG_SYNTH1_PWD_PRESC_GET(x) (((x) & 0x08000000) >> 27)
1130 #define PHY_ANALOG_SYNTH1_PWD_PRESC_SET(x) (((x) << 27) & 0x08000000)
1131 #define PHY_ANALOG_SYNTH1_PWD_VCO_MSB 28
1132 #define PHY_ANALOG_SYNTH1_PWD_VCO_LSB 28
1133 #define PHY_ANALOG_SYNTH1_PWD_VCO_MASK 0x10000000
1134 #define PHY_ANALOG_SYNTH1_PWD_VCO_GET(x) (((x) & 0x10000000) >> 28)
1135 #define PHY_ANALOG_SYNTH1_PWD_VCO_SET(x) (((x) << 28) & 0x10000000)
1136 #define PHY_ANALOG_SYNTH1_PWD_VCMON_MSB 29
1137 #define PHY_ANALOG_SYNTH1_PWD_VCMON_LSB 29
1138 #define PHY_ANALOG_SYNTH1_PWD_VCMON_MASK 0x20000000
1139 #define PHY_ANALOG_SYNTH1_PWD_VCMON_GET(x) (((x) & 0x20000000) >> 29)
1140 #define PHY_ANALOG_SYNTH1_PWD_VCMON_SET(x) (((x) << 29) & 0x20000000)
1141 #define PHY_ANALOG_SYNTH1_PWD_CP_MSB 30
1142 #define PHY_ANALOG_SYNTH1_PWD_CP_LSB 30
1143 #define PHY_ANALOG_SYNTH1_PWD_CP_MASK 0x40000000
1144 #define PHY_ANALOG_SYNTH1_PWD_CP_GET(x) (((x) & 0x40000000) >> 30)
1145 #define PHY_ANALOG_SYNTH1_PWD_CP_SET(x) (((x) << 30) & 0x40000000)
1146 #define PHY_ANALOG_SYNTH1_PWD_BIAS_MSB 31
1147 #define PHY_ANALOG_SYNTH1_PWD_BIAS_LSB 31
1148 #define PHY_ANALOG_SYNTH1_PWD_BIAS_MASK 0x80000000
1149 #define PHY_ANALOG_SYNTH1_PWD_BIAS_GET(x) (((x) & 0x80000000) >> 31)
1150 #define PHY_ANALOG_SYNTH1_PWD_BIAS_SET(x) (((x) << 31) & 0x80000000)
1152 /* macros for SYNTH2 */
1153 #define PHY_ANALOG_SYNTH2_ADDRESS 0x00000084
1154 #define PHY_ANALOG_SYNTH2_OFFSET 0x00000084
1155 #define PHY_ANALOG_SYNTH2_CAPRANGE3_MSB 3
1156 #define PHY_ANALOG_SYNTH2_CAPRANGE3_LSB 0
1157 #define PHY_ANALOG_SYNTH2_CAPRANGE3_MASK 0x0000000f
1158 #define PHY_ANALOG_SYNTH2_CAPRANGE3_GET(x) (((x) & 0x0000000f) >> 0)
1159 #define PHY_ANALOG_SYNTH2_CAPRANGE3_SET(x) (((x) << 0) & 0x0000000f)
1160 #define PHY_ANALOG_SYNTH2_CAPRANGE2_MSB 7
1161 #define PHY_ANALOG_SYNTH2_CAPRANGE2_LSB 4
1162 #define PHY_ANALOG_SYNTH2_CAPRANGE2_MASK 0x000000f0
1163 #define PHY_ANALOG_SYNTH2_CAPRANGE2_GET(x) (((x) & 0x000000f0) >> 4)
1164 #define PHY_ANALOG_SYNTH2_CAPRANGE2_SET(x) (((x) << 4) & 0x000000f0)
1165 #define PHY_ANALOG_SYNTH2_CAPRANGE1_MSB 11
1166 #define PHY_ANALOG_SYNTH2_CAPRANGE1_LSB 8
1167 #define PHY_ANALOG_SYNTH2_CAPRANGE1_MASK 0x00000f00
1168 #define PHY_ANALOG_SYNTH2_CAPRANGE1_GET(x) (((x) & 0x00000f00) >> 8)
1169 #define PHY_ANALOG_SYNTH2_CAPRANGE1_SET(x) (((x) << 8) & 0x00000f00)
1170 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_MSB 15
1171 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_LSB 12
1172 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_MASK 0x0000f000
1173 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_GET(x) (((x) & 0x0000f000) >> 12)
1174 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_SET(x) (((x) << 12) & 0x0000f000)
1175 #define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_MSB 16
1176 #define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_LSB 16
1177 #define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_MASK 0x00010000
1178 #define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_GET(x) (((x) & 0x00010000) >> 16)
1179 #define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_SET(x) (((x) << 16) & 0x00010000)
1180 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_MSB 17
1181 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_LSB 17
1182 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_MASK 0x00020000
1183 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_GET(x) (((x) & 0x00020000) >> 17)
1184 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_SET(x) (((x) << 17) & 0x00020000)
1185 #define PHY_ANALOG_SYNTH2_CPBIAS_INTN_MSB 19
1186 #define PHY_ANALOG_SYNTH2_CPBIAS_INTN_LSB 18
1187 #define PHY_ANALOG_SYNTH2_CPBIAS_INTN_MASK 0x000c0000
1188 #define PHY_ANALOG_SYNTH2_CPBIAS_INTN_GET(x) (((x) & 0x000c0000) >> 18)
1189 #define PHY_ANALOG_SYNTH2_CPBIAS_INTN_SET(x) (((x) << 18) & 0x000c0000)
1190 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_MSB 22
1191 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_LSB 20
1192 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_MASK 0x00700000
1193 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_GET(x) (((x) & 0x00700000) >> 20)
1194 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_SET(x) (((x) << 20) & 0x00700000)
1195 #define PHY_ANALOG_SYNTH2_VC_MID_REF_MSB 25
1196 #define PHY_ANALOG_SYNTH2_VC_MID_REF_LSB 23
1197 #define PHY_ANALOG_SYNTH2_VC_MID_REF_MASK 0x03800000
1198 #define PHY_ANALOG_SYNTH2_VC_MID_REF_GET(x) (((x) & 0x03800000) >> 23)
1199 #define PHY_ANALOG_SYNTH2_VC_MID_REF_SET(x) (((x) << 23) & 0x03800000)
1200 #define PHY_ANALOG_SYNTH2_VC_HI_REF_MSB 28
1201 #define PHY_ANALOG_SYNTH2_VC_HI_REF_LSB 26
1202 #define PHY_ANALOG_SYNTH2_VC_HI_REF_MASK 0x1c000000
1203 #define PHY_ANALOG_SYNTH2_VC_HI_REF_GET(x) (((x) & 0x1c000000) >> 26)
1204 #define PHY_ANALOG_SYNTH2_VC_HI_REF_SET(x) (((x) << 26) & 0x1c000000)
1205 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_MSB 31
1206 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_LSB 29
1207 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_MASK 0xe0000000
1208 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_GET(x) (((x) & 0xe0000000) >> 29)
1209 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_SET(x) (((x) << 29) & 0xe0000000)
1211 /* macros for SYNTH3 */
1212 #define PHY_ANALOG_SYNTH3_ADDRESS 0x00000088
1213 #define PHY_ANALOG_SYNTH3_OFFSET 0x00000088
1214 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_MSB 5
1215 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_LSB 0
1216 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_MASK 0x0000003f
1217 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_GET(x) (((x) & 0x0000003f) >> 0)
1218 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_SET(x) (((x) << 0) & 0x0000003f)
1219 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_MSB 11
1220 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_LSB 6
1221 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_MASK 0x00000fc0
1222 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_GET(x) (((x) & 0x00000fc0) >> 6)
1223 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_SET(x) (((x) << 6) & 0x00000fc0)
1224 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_MSB 17
1225 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_LSB 12
1226 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_MASK 0x0003f000
1227 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_GET(x) (((x) & 0x0003f000) >> 12)
1228 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_SET(x) (((x) << 12) & 0x0003f000)
1229 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_MSB 23
1230 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_LSB 18
1231 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_MASK 0x00fc0000
1232 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_GET(x) (((x) & 0x00fc0000) >> 18)
1233 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_SET(x) (((x) << 18) & 0x00fc0000)
1234 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_MSB 29
1235 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_LSB 24
1236 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_MASK 0x3f000000
1237 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_GET(x) (((x) & 0x3f000000) >> 24)
1238 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_SET(x) (((x) << 24) & 0x3f000000)
1239 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_MSB 30
1240 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_LSB 30
1241 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_MASK 0x40000000
1242 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_GET(x) (((x) & 0x40000000) >> 30)
1243 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_SET(x) (((x) << 30) & 0x40000000)
1244 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_MSB 31
1245 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_LSB 31
1246 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_MASK 0x80000000
1247 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_GET(x) (((x) & 0x80000000) >> 31)
1248 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_SET(x) (((x) << 31) & 0x80000000)
1250 /* macros for SYNTH4 */
1251 #define PHY_ANALOG_SYNTH4_ADDRESS 0x0000008c
1252 #define PHY_ANALOG_SYNTH4_OFFSET 0x0000008c
1253 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_MSB 0
1254 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_LSB 0
1255 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_MASK 0x00000001
1256 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_GET(x) (((x) & 0x00000001) >> 0)
1257 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_SET(x) (((x) << 0) & 0x00000001)
1258 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_MSB 1
1259 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_LSB 1
1260 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_MASK 0x00000002
1261 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_GET(x) (((x) & 0x00000002) >> 1)
1262 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_SET(x) (((x) << 1) & 0x00000002)
1263 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_MSB 3
1264 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_LSB 2
1265 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_MASK 0x0000000c
1266 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_GET(x) (((x) & 0x0000000c) >> 2)
1267 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_SET(x) (((x) << 2) & 0x0000000c)
1268 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_MSB 4
1269 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_LSB 4
1270 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_MASK 0x00000010
1271 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_GET(x) (((x) & 0x00000010) >> 4)
1272 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_SET(x) (((x) << 4) & 0x00000010)
1273 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_MSB 5
1274 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_LSB 5
1275 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_MASK 0x00000020
1276 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_GET(x) (((x) & 0x00000020) >> 5)
1277 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_SET(x) (((x) << 5) & 0x00000020)
1278 #define PHY_ANALOG_SYNTH4_SDM_DITHER1_MSB 7
1279 #define PHY_ANALOG_SYNTH4_SDM_DITHER1_LSB 6
1280 #define PHY_ANALOG_SYNTH4_SDM_DITHER1_MASK 0x000000c0
1281 #define PHY_ANALOG_SYNTH4_SDM_DITHER1_GET(x) (((x) & 0x000000c0) >> 6)
1282 #define PHY_ANALOG_SYNTH4_SDM_DITHER1_SET(x) (((x) << 6) & 0x000000c0)
1283 #define PHY_ANALOG_SYNTH4_SDM_MODE_MSB 8
1284 #define PHY_ANALOG_SYNTH4_SDM_MODE_LSB 8
1285 #define PHY_ANALOG_SYNTH4_SDM_MODE_MASK 0x00000100
1286 #define PHY_ANALOG_SYNTH4_SDM_MODE_GET(x) (((x) & 0x00000100) >> 8)
1287 #define PHY_ANALOG_SYNTH4_SDM_MODE_SET(x) (((x) << 8) & 0x00000100)
1288 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_MSB 9
1289 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_LSB 9
1290 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_MASK 0x00000200
1291 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_GET(x) (((x) & 0x00000200) >> 9)
1292 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_SET(x) (((x) << 9) & 0x00000200)
1293 #define PHY_ANALOG_SYNTH4_RESET_PRESC_MSB 10
1294 #define PHY_ANALOG_SYNTH4_RESET_PRESC_LSB 10
1295 #define PHY_ANALOG_SYNTH4_RESET_PRESC_MASK 0x00000400
1296 #define PHY_ANALOG_SYNTH4_RESET_PRESC_GET(x) (((x) & 0x00000400) >> 10)
1297 #define PHY_ANALOG_SYNTH4_RESET_PRESC_SET(x) (((x) << 10) & 0x00000400)
1298 #define PHY_ANALOG_SYNTH4_PRESCSEL_MSB 12
1299 #define PHY_ANALOG_SYNTH4_PRESCSEL_LSB 11
1300 #define PHY_ANALOG_SYNTH4_PRESCSEL_MASK 0x00001800
1301 #define PHY_ANALOG_SYNTH4_PRESCSEL_GET(x) (((x) & 0x00001800) >> 11)
1302 #define PHY_ANALOG_SYNTH4_PRESCSEL_SET(x) (((x) << 11) & 0x00001800)
1303 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_MSB 13
1304 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_LSB 13
1305 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_MASK 0x00002000
1306 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_GET(x) (((x) & 0x00002000) >> 13)
1307 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_SET(x) (((x) << 13) & 0x00002000)
1308 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_MSB 14
1309 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_LSB 14
1310 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_MASK 0x00004000
1311 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_GET(x) (((x) & 0x00004000) >> 14)
1312 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_SET(x) (((x) << 14) & 0x00004000)
1313 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_MSB 15
1314 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_LSB 15
1315 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_MASK 0x00008000
1316 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_GET(x) (((x) & 0x00008000) >> 15)
1317 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_SET(x) (((x) << 15) & 0x00008000)
1318 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_MSB 16
1319 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_LSB 16
1320 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_MASK 0x00010000
1321 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_GET(x) (((x) & 0x00010000) >> 16)
1322 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_SET(x) (((x) << 16) & 0x00010000)
1323 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_MSB 17
1324 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_LSB 17
1325 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_MASK 0x00020000
1326 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_GET(x) (((x) & 0x00020000) >> 17)
1327 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_SET(x) (((x) << 17) & 0x00020000)
1328 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_MSB 25
1329 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_LSB 18
1330 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_MASK 0x03fc0000
1331 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_GET(x) (((x) & 0x03fc0000) >> 18)
1332 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_SET(x) (((x) << 18) & 0x03fc0000)
1333 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_MSB 26
1334 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_LSB 26
1335 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_MASK 0x04000000
1336 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_GET(x) (((x) & 0x04000000) >> 26)
1337 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_SET(x) (((x) << 26) & 0x04000000)
1338 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_MSB 27
1339 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_LSB 27
1340 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_MASK 0x08000000
1341 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_GET(x) (((x) & 0x08000000) >> 27)
1342 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_SET(x) (((x) << 27) & 0x08000000)
1343 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_MSB 28
1344 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_LSB 28
1345 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_MASK 0x10000000
1346 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_GET(x) (((x) & 0x10000000) >> 28)
1347 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_SET(x) (((x) << 28) & 0x10000000)
1348 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_MSB 29
1349 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_LSB 29
1350 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_MASK 0x20000000
1351 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_GET(x) (((x) & 0x20000000) >> 29)
1352 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_SET(x) (((x) << 29) & 0x20000000)
1353 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_MSB 30
1354 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_LSB 30
1355 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_MASK 0x40000000
1356 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_GET(x) (((x) & 0x40000000) >> 30)
1357 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_SET(x) (((x) << 30) & 0x40000000)
1358 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_MSB 31
1359 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_LSB 31
1360 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_MASK 0x80000000
1361 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_GET(x) (((x) & 0x80000000) >> 31)
1362 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_SET(x) (((x) << 31) & 0x80000000)
1364 /* macros for SYNTH5 */
1365 #define PHY_ANALOG_SYNTH5_ADDRESS 0x00000090
1366 #define PHY_ANALOG_SYNTH5_OFFSET 0x00000090
1367 #define PHY_ANALOG_SYNTH5_VCOBIAS_MSB 1
1368 #define PHY_ANALOG_SYNTH5_VCOBIAS_LSB 0
1369 #define PHY_ANALOG_SYNTH5_VCOBIAS_MASK 0x00000003
1370 #define PHY_ANALOG_SYNTH5_VCOBIAS_GET(x) (((x) & 0x00000003) >> 0)
1371 #define PHY_ANALOG_SYNTH5_VCOBIAS_SET(x) (((x) << 0) & 0x00000003)
1372 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_MSB 4
1373 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_LSB 2
1374 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_MASK 0x0000001c
1375 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_GET(x) (((x) & 0x0000001c) >> 2)
1376 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_SET(x) (((x) << 2) & 0x0000001c)
1377 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_MSB 7
1378 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_LSB 5
1379 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_MASK 0x000000e0
1380 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_GET(x) (((x) & 0x000000e0) >> 5)
1381 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_SET(x) (((x) << 5) & 0x000000e0)
1382 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_MSB 10
1383 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_LSB 8
1384 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_MASK 0x00000700
1385 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_GET(x) (((x) & 0x00000700) >> 8)
1386 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_SET(x) (((x) << 8) & 0x00000700)
1387 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_MSB 13
1388 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_LSB 11
1389 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_MASK 0x00003800
1390 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_GET(x) (((x) & 0x00003800) >> 11)
1391 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_SET(x) (((x) << 11) & 0x00003800)
1392 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_MSB 14
1393 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_LSB 14
1394 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_MASK 0x00004000
1395 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_GET(x) (((x) & 0x00004000) >> 14)
1396 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_SET(x) (((x) << 14) & 0x00004000)
1397 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_MSB 17
1398 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_LSB 15
1399 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_MASK 0x00038000
1400 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_GET(x) (((x) & 0x00038000) >> 15)
1401 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_SET(x) (((x) << 15) & 0x00038000)
1402 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_MSB 20
1403 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_LSB 18
1404 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_MASK 0x001c0000
1405 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_GET(x) (((x) & 0x001c0000) >> 18)
1406 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_SET(x) (((x) << 18) & 0x001c0000)
1407 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_MSB 23
1408 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_LSB 21
1409 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_MASK 0x00e00000
1410 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_GET(x) (((x) & 0x00e00000) >> 21)
1411 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_SET(x) (((x) << 21) & 0x00e00000)
1412 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_MSB 26
1413 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_LSB 24
1414 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_MASK 0x07000000
1415 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_GET(x) (((x) & 0x07000000) >> 24)
1416 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_SET(x) (((x) << 24) & 0x07000000)
1417 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_MSB 29
1418 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_LSB 27
1419 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_MASK 0x38000000
1420 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_GET(x) (((x) & 0x38000000) >> 27)
1421 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_SET(x) (((x) << 27) & 0x38000000)
1422 #define PHY_ANALOG_SYNTH5_SDM_DITHER2_MSB 31
1423 #define PHY_ANALOG_SYNTH5_SDM_DITHER2_LSB 30
1424 #define PHY_ANALOG_SYNTH5_SDM_DITHER2_MASK 0xc0000000
1425 #define PHY_ANALOG_SYNTH5_SDM_DITHER2_GET(x) (((x) & 0xc0000000) >> 30)
1426 #define PHY_ANALOG_SYNTH5_SDM_DITHER2_SET(x) (((x) << 30) & 0xc0000000)
1428 /* macros for SYNTH6 */
1429 #define PHY_ANALOG_SYNTH6_ADDRESS 0x00000094
1430 #define PHY_ANALOG_SYNTH6_OFFSET 0x00000094
1431 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_MSB 1
1432 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_LSB 0
1433 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_MASK 0x00000003
1434 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_GET(x) (((x) & 0x00000003) >> 0)
1435 #define PHY_ANALOG_SYNTH6_LOOP_IP_MSB 8
1436 #define PHY_ANALOG_SYNTH6_LOOP_IP_LSB 2
1437 #define PHY_ANALOG_SYNTH6_LOOP_IP_MASK 0x000001fc
1438 #define PHY_ANALOG_SYNTH6_LOOP_IP_GET(x) (((x) & 0x000001fc) >> 2)
1439 #define PHY_ANALOG_SYNTH6_VC2LOW_MSB 9
1440 #define PHY_ANALOG_SYNTH6_VC2LOW_LSB 9
1441 #define PHY_ANALOG_SYNTH6_VC2LOW_MASK 0x00000200
1442 #define PHY_ANALOG_SYNTH6_VC2LOW_GET(x) (((x) & 0x00000200) >> 9)
1443 #define PHY_ANALOG_SYNTH6_VC2HIGH_MSB 10
1444 #define PHY_ANALOG_SYNTH6_VC2HIGH_LSB 10
1445 #define PHY_ANALOG_SYNTH6_VC2HIGH_MASK 0x00000400
1446 #define PHY_ANALOG_SYNTH6_VC2HIGH_GET(x) (((x) & 0x00000400) >> 10)
1447 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_MSB 11
1448 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_LSB 11
1449 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_MASK 0x00000800
1450 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_GET(x) (((x) & 0x00000800) >> 11)
1451 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_MSB 12
1452 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_LSB 12
1453 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_MASK 0x00001000
1454 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_GET(x) (((x) & 0x00001000) >> 12)
1455 #define PHY_ANALOG_SYNTH6_RESET_PFD_MSB 13
1456 #define PHY_ANALOG_SYNTH6_RESET_PFD_LSB 13
1457 #define PHY_ANALOG_SYNTH6_RESET_PFD_MASK 0x00002000
1458 #define PHY_ANALOG_SYNTH6_RESET_PFD_GET(x) (((x) & 0x00002000) >> 13)
1459 #define PHY_ANALOG_SYNTH6_RESET_RFD_MSB 14
1460 #define PHY_ANALOG_SYNTH6_RESET_RFD_LSB 14
1461 #define PHY_ANALOG_SYNTH6_RESET_RFD_MASK 0x00004000
1462 #define PHY_ANALOG_SYNTH6_RESET_RFD_GET(x) (((x) & 0x00004000) >> 14)
1463 #define PHY_ANALOG_SYNTH6_SHORT_R_MSB 15
1464 #define PHY_ANALOG_SYNTH6_SHORT_R_LSB 15
1465 #define PHY_ANALOG_SYNTH6_SHORT_R_MASK 0x00008000
1466 #define PHY_ANALOG_SYNTH6_SHORT_R_GET(x) (((x) & 0x00008000) >> 15)
1467 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_MSB 23
1468 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_LSB 16
1469 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_MASK 0x00ff0000
1470 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_GET(x) (((x) & 0x00ff0000) >> 16)
1471 #define PHY_ANALOG_SYNTH6_PIN_VC_MSB 24
1472 #define PHY_ANALOG_SYNTH6_PIN_VC_LSB 24
1473 #define PHY_ANALOG_SYNTH6_PIN_VC_MASK 0x01000000
1474 #define PHY_ANALOG_SYNTH6_PIN_VC_GET(x) (((x) & 0x01000000) >> 24)
1475 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_MSB 25
1476 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_LSB 25
1477 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_MASK 0x02000000
1478 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_GET(x) (((x) & 0x02000000) >> 25)
1479 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_MSB 26
1480 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_LSB 26
1481 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_MASK 0x04000000
1482 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_GET(x) (((x) & 0x04000000) >> 26)
1483 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_MSB 30
1484 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_LSB 27
1485 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_MASK 0x78000000
1486 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_GET(x) (((x) & 0x78000000) >> 27)
1487 #define PHY_ANALOG_SYNTH6_SYNTH_ON_MSB 31
1488 #define PHY_ANALOG_SYNTH6_SYNTH_ON_LSB 31
1489 #define PHY_ANALOG_SYNTH6_SYNTH_ON_MASK 0x80000000
1490 #define PHY_ANALOG_SYNTH6_SYNTH_ON_GET(x) (((x) & 0x80000000) >> 31)
1492 /* macros for SYNTH7 */
1493 #define PHY_ANALOG_SYNTH7_ADDRESS 0x00000098
1494 #define PHY_ANALOG_SYNTH7_OFFSET 0x00000098
1495 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_MSB 0
1496 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_LSB 0
1497 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_MASK 0x00000001
1498 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_GET(x) (((x) & 0x00000001) >> 0)
1499 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_SET(x) (((x) << 0) & 0x00000001)
1500 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_MSB 1
1501 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_LSB 1
1502 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_MASK 0x00000002
1503 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_GET(x) (((x) & 0x00000002) >> 1)
1504 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_SET(x) (((x) << 1) & 0x00000002)
1505 #define PHY_ANALOG_SYNTH7_CHANFRAC_MSB 18
1506 #define PHY_ANALOG_SYNTH7_CHANFRAC_LSB 2
1507 #define PHY_ANALOG_SYNTH7_CHANFRAC_MASK 0x0007fffc
1508 #define PHY_ANALOG_SYNTH7_CHANFRAC_GET(x) (((x) & 0x0007fffc) >> 2)
1509 #define PHY_ANALOG_SYNTH7_CHANFRAC_SET(x) (((x) << 2) & 0x0007fffc)
1510 #define PHY_ANALOG_SYNTH7_CHANSEL_MSB 27
1511 #define PHY_ANALOG_SYNTH7_CHANSEL_LSB 19
1512 #define PHY_ANALOG_SYNTH7_CHANSEL_MASK 0x0ff80000
1513 #define PHY_ANALOG_SYNTH7_CHANSEL_GET(x) (((x) & 0x0ff80000) >> 19)
1514 #define PHY_ANALOG_SYNTH7_CHANSEL_SET(x) (((x) << 19) & 0x0ff80000)
1515 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_MSB 29
1516 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_LSB 28
1517 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_MASK 0x30000000
1518 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_GET(x) (((x) & 0x30000000) >> 28)
1519 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_SET(x) (((x) << 28) & 0x30000000)
1520 #define PHY_ANALOG_SYNTH7_FRACMODE_MSB 30
1521 #define PHY_ANALOG_SYNTH7_FRACMODE_LSB 30
1522 #define PHY_ANALOG_SYNTH7_FRACMODE_MASK 0x40000000
1523 #define PHY_ANALOG_SYNTH7_FRACMODE_GET(x) (((x) & 0x40000000) >> 30)
1524 #define PHY_ANALOG_SYNTH7_FRACMODE_SET(x) (((x) << 30) & 0x40000000)
1525 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_MSB 31
1526 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_LSB 31
1527 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_MASK 0x80000000
1528 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_GET(x) (((x) & 0x80000000) >> 31)
1529 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_SET(x) (((x) << 31) & 0x80000000)
1531 /* macros for SYNTH8 */
1532 #define PHY_ANALOG_SYNTH8_ADDRESS 0x0000009c
1533 #define PHY_ANALOG_SYNTH8_OFFSET 0x0000009c
1534 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_MSB 0
1535 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_LSB 0
1536 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_MASK 0x00000001
1537 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_GET(x) (((x) & 0x00000001) >> 0)
1538 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_SET(x) (((x) << 0) & 0x00000001)
1539 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_MSB 7
1540 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_LSB 1
1541 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_MASK 0x000000fe
1542 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_GET(x) (((x) & 0x000000fe) >> 1)
1543 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_SET(x) (((x) << 1) & 0x000000fe)
1544 #define PHY_ANALOG_SYNTH8_LOOP_CSB_MSB 11
1545 #define PHY_ANALOG_SYNTH8_LOOP_CSB_LSB 8
1546 #define PHY_ANALOG_SYNTH8_LOOP_CSB_MASK 0x00000f00
1547 #define PHY_ANALOG_SYNTH8_LOOP_CSB_GET(x) (((x) & 0x00000f00) >> 8)
1548 #define PHY_ANALOG_SYNTH8_LOOP_CSB_SET(x) (((x) << 8) & 0x00000f00)
1549 #define PHY_ANALOG_SYNTH8_LOOP_RSB_MSB 16
1550 #define PHY_ANALOG_SYNTH8_LOOP_RSB_LSB 12
1551 #define PHY_ANALOG_SYNTH8_LOOP_RSB_MASK 0x0001f000
1552 #define PHY_ANALOG_SYNTH8_LOOP_RSB_GET(x) (((x) & 0x0001f000) >> 12)
1553 #define PHY_ANALOG_SYNTH8_LOOP_RSB_SET(x) (((x) << 12) & 0x0001f000)
1554 #define PHY_ANALOG_SYNTH8_LOOP_CPB_MSB 21
1555 #define PHY_ANALOG_SYNTH8_LOOP_CPB_LSB 17
1556 #define PHY_ANALOG_SYNTH8_LOOP_CPB_MASK 0x003e0000
1557 #define PHY_ANALOG_SYNTH8_LOOP_CPB_GET(x) (((x) & 0x003e0000) >> 17)
1558 #define PHY_ANALOG_SYNTH8_LOOP_CPB_SET(x) (((x) << 17) & 0x003e0000)
1559 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_MSB 26
1560 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_LSB 22
1561 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_MASK 0x07c00000
1562 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_GET(x) (((x) & 0x07c00000) >> 22)
1563 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_SET(x) (((x) << 22) & 0x07c00000)
1564 #define PHY_ANALOG_SYNTH8_REFDIVB_MSB 31
1565 #define PHY_ANALOG_SYNTH8_REFDIVB_LSB 27
1566 #define PHY_ANALOG_SYNTH8_REFDIVB_MASK 0xf8000000
1567 #define PHY_ANALOG_SYNTH8_REFDIVB_GET(x) (((x) & 0xf8000000) >> 27)
1568 #define PHY_ANALOG_SYNTH8_REFDIVB_SET(x) (((x) << 27) & 0xf8000000)
1570 /* macros for SYNTH9 */
1571 #define PHY_ANALOG_SYNTH9_ADDRESS 0x000000a0
1572 #define PHY_ANALOG_SYNTH9_OFFSET 0x000000a0
1573 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_MSB 0
1574 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_LSB 0
1575 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_MASK 0x00000001
1576 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_GET(x) (((x) & 0x00000001) >> 0)
1577 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_SET(x) (((x) << 0) & 0x00000001)
1578 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_MSB 3
1579 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_LSB 1
1580 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_MASK 0x0000000e
1581 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_GET(x) (((x) & 0x0000000e) >> 1)
1582 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_SET(x) (((x) << 1) & 0x0000000e)
1583 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_MSB 7
1584 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_LSB 4
1585 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_MASK 0x000000f0
1586 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_GET(x) (((x) & 0x000000f0) >> 4)
1587 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_SET(x) (((x) << 4) & 0x000000f0)
1588 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_MSB 11
1589 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_LSB 8
1590 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_MASK 0x00000f00
1591 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_GET(x) (((x) & 0x00000f00) >> 8)
1592 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_SET(x) (((x) << 8) & 0x00000f00)
1593 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_MSB 16
1594 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_LSB 12
1595 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_MASK 0x0001f000
1596 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_GET(x) (((x) & 0x0001f000) >> 12)
1597 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_SET(x) (((x) << 12) & 0x0001f000)
1598 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_MSB 21
1599 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_LSB 17
1600 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_MASK 0x003e0000
1601 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_GET(x) (((x) & 0x003e0000) >> 17)
1602 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_SET(x) (((x) << 17) & 0x003e0000)
1603 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_MSB 26
1604 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_LSB 22
1605 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_MASK 0x07c00000
1606 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_GET(x) (((x) & 0x07c00000) >> 22)
1607 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_SET(x) (((x) << 22) & 0x07c00000)
1608 #define PHY_ANALOG_SYNTH9_REFDIVA_MSB 31
1609 #define PHY_ANALOG_SYNTH9_REFDIVA_LSB 27
1610 #define PHY_ANALOG_SYNTH9_REFDIVA_MASK 0xf8000000
1611 #define PHY_ANALOG_SYNTH9_REFDIVA_GET(x) (((x) & 0xf8000000) >> 27)
1612 #define PHY_ANALOG_SYNTH9_REFDIVA_SET(x) (((x) << 27) & 0xf8000000)
1614 /* macros for SYNTH10 */
1615 #define PHY_ANALOG_SYNTH10_ADDRESS 0x000000a4
1616 #define PHY_ANALOG_SYNTH10_OFFSET 0x000000a4
1617 #define PHY_ANALOG_SYNTH10_SPARE10A_MSB 1
1618 #define PHY_ANALOG_SYNTH10_SPARE10A_LSB 0
1619 #define PHY_ANALOG_SYNTH10_SPARE10A_MASK 0x00000003
1620 #define PHY_ANALOG_SYNTH10_SPARE10A_GET(x) (((x) & 0x00000003) >> 0)
1621 #define PHY_ANALOG_SYNTH10_SPARE10A_SET(x) (((x) << 0) & 0x00000003)
1622 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_MSB 4
1623 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_LSB 2
1624 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_MASK 0x0000001c
1625 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_GET(x) (((x) & 0x0000001c) >> 2)
1626 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_SET(x) (((x) << 2) & 0x0000001c)
1627 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_MSB 7
1628 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_LSB 5
1629 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_MASK 0x000000e0
1630 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_GET(x) (((x) & 0x000000e0) >> 5)
1631 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_SET(x) (((x) << 5) & 0x000000e0)
1632 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_MSB 10
1633 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_LSB 8
1634 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_MASK 0x00000700
1635 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_GET(x) (((x) & 0x00000700) >> 8)
1636 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_SET(x) (((x) << 8) & 0x00000700)
1637 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_MSB 13
1638 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_LSB 11
1639 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_MASK 0x00003800
1640 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_GET(x) (((x) & 0x00003800) >> 11)
1641 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_SET(x) (((x) << 11) & 0x00003800)
1642 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_MSB 17
1643 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_LSB 14
1644 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_MASK 0x0003c000
1645 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_GET(x) (((x) & 0x0003c000) >> 14)
1646 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_SET(x) (((x) << 14) & 0x0003c000)
1647 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_MSB 21
1648 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_LSB 18
1649 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_MASK 0x003c0000
1650 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_GET(x) (((x) & 0x003c0000) >> 18)
1651 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_SET(x) (((x) << 18) & 0x003c0000)
1652 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_MSB 26
1653 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_LSB 22
1654 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_MASK 0x07c00000
1655 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_GET(x) (((x) & 0x07c00000) >> 22)
1656 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_SET(x) (((x) << 22) & 0x07c00000)
1657 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_MSB 31
1658 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_LSB 27
1659 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_MASK 0xf8000000
1660 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_GET(x) (((x) & 0xf8000000) >> 27)
1661 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_SET(x) (((x) << 27) & 0xf8000000)
1663 /* macros for SYNTH11 */
1664 #define PHY_ANALOG_SYNTH11_ADDRESS 0x000000a8
1665 #define PHY_ANALOG_SYNTH11_OFFSET 0x000000a8
1666 #define PHY_ANALOG_SYNTH11_SPARE11A_MSB 4
1667 #define PHY_ANALOG_SYNTH11_SPARE11A_LSB 0
1668 #define PHY_ANALOG_SYNTH11_SPARE11A_MASK 0x0000001f
1669 #define PHY_ANALOG_SYNTH11_SPARE11A_GET(x) (((x) & 0x0000001f) >> 0)
1670 #define PHY_ANALOG_SYNTH11_SPARE11A_SET(x) (((x) << 0) & 0x0000001f)
1671 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_MSB 5
1672 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_LSB 5
1673 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_MASK 0x00000020
1674 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_GET(x) (((x) & 0x00000020) >> 5)
1675 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_SET(x) (((x) << 5) & 0x00000020)
1676 #define PHY_ANALOG_SYNTH11_LOREFSEL_MSB 7
1677 #define PHY_ANALOG_SYNTH11_LOREFSEL_LSB 6
1678 #define PHY_ANALOG_SYNTH11_LOREFSEL_MASK 0x000000c0
1679 #define PHY_ANALOG_SYNTH11_LOREFSEL_GET(x) (((x) & 0x000000c0) >> 6)
1680 #define PHY_ANALOG_SYNTH11_LOREFSEL_SET(x) (((x) << 6) & 0x000000c0)
1681 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_MSB 9
1682 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_LSB 8
1683 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_MASK 0x00000300
1684 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_GET(x) (((x) & 0x00000300) >> 8)
1685 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_SET(x) (((x) << 8) & 0x00000300)
1686 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_MSB 10
1687 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_LSB 10
1688 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_MASK 0x00000400
1689 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_GET(x) (((x) & 0x00000400) >> 10)
1690 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_SET(x) (((x) << 10) & 0x00000400)
1691 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_MSB 13
1692 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_LSB 11
1693 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_MASK 0x00003800
1694 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_GET(x) (((x) & 0x00003800) >> 11)
1695 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_SET(x) (((x) << 11) & 0x00003800)
1696 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_MSB 17
1697 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_LSB 14
1698 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_MASK 0x0003c000
1699 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_GET(x) (((x) & 0x0003c000) >> 14)
1700 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_SET(x) (((x) << 14) & 0x0003c000)
1701 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_MSB 21
1702 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_LSB 18
1703 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_MASK 0x003c0000
1704 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_GET(x) (((x) & 0x003c0000) >> 18)
1705 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_SET(x) (((x) << 18) & 0x003c0000)
1706 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_MSB 26
1707 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_LSB 22
1708 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_MASK 0x07c00000
1709 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_GET(x) (((x) & 0x07c00000) >> 22)
1710 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_SET(x) (((x) << 22) & 0x07c00000)
1711 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_MSB 31
1712 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_LSB 27
1713 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_MASK 0xf8000000
1714 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_GET(x) (((x) & 0xf8000000) >> 27)
1715 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_SET(x) (((x) << 27) & 0xf8000000)
1717 /* macros for SYNTH12 */
1718 #define PHY_ANALOG_SYNTH12_ADDRESS 0x000000ac
1719 #define PHY_ANALOG_SYNTH12_OFFSET 0x000000ac
1720 #define PHY_ANALOG_SYNTH12_SPARE12A_MSB 9
1721 #define PHY_ANALOG_SYNTH12_SPARE12A_LSB 0
1722 #define PHY_ANALOG_SYNTH12_SPARE12A_MASK 0x000003ff
1723 #define PHY_ANALOG_SYNTH12_SPARE12A_GET(x) (((x) & 0x000003ff) >> 0)
1724 #define PHY_ANALOG_SYNTH12_SPARE12A_SET(x) (((x) << 0) & 0x000003ff)
1725 #define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_MSB 13
1726 #define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_LSB 10
1727 #define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_MASK 0x00003c00
1728 #define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_GET(x) (((x) & 0x00003c00) >> 10)
1729 #define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_SET(x) (((x) << 10) & 0x00003c00)
1730 #define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_MSB 14
1731 #define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_LSB 14
1732 #define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_MASK 0x00004000
1733 #define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_GET(x) (((x) & 0x00004000) >> 14)
1734 #define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_SET(x) (((x) << 14) & 0x00004000)
1735 #define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_MSB 16
1736 #define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_LSB 15
1737 #define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_MASK 0x00018000
1738 #define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_GET(x) (((x) & 0x00018000) >> 15)
1739 #define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_SET(x) (((x) << 15) & 0x00018000)
1740 #define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_MSB 17
1741 #define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_LSB 17
1742 #define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_MASK 0x00020000
1743 #define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_GET(x) (((x) & 0x00020000) >> 17)
1744 #define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_SET(x) (((x) << 17) & 0x00020000)
1745 #define PHY_ANALOG_SYNTH12_STRCONT_MSB 18
1746 #define PHY_ANALOG_SYNTH12_STRCONT_LSB 18
1747 #define PHY_ANALOG_SYNTH12_STRCONT_MASK 0x00040000
1748 #define PHY_ANALOG_SYNTH12_STRCONT_GET(x) (((x) & 0x00040000) >> 18)
1749 #define PHY_ANALOG_SYNTH12_STRCONT_SET(x) (((x) << 18) & 0x00040000)
1750 #define PHY_ANALOG_SYNTH12_VREFMUL3_MSB 22
1751 #define PHY_ANALOG_SYNTH12_VREFMUL3_LSB 19
1752 #define PHY_ANALOG_SYNTH12_VREFMUL3_MASK 0x00780000
1753 #define PHY_ANALOG_SYNTH12_VREFMUL3_GET(x) (((x) & 0x00780000) >> 19)
1754 #define PHY_ANALOG_SYNTH12_VREFMUL3_SET(x) (((x) << 19) & 0x00780000)
1755 #define PHY_ANALOG_SYNTH12_VREFMUL2_MSB 26
1756 #define PHY_ANALOG_SYNTH12_VREFMUL2_LSB 23
1757 #define PHY_ANALOG_SYNTH12_VREFMUL2_MASK 0x07800000
1758 #define PHY_ANALOG_SYNTH12_VREFMUL2_GET(x) (((x) & 0x07800000) >> 23)
1759 #define PHY_ANALOG_SYNTH12_VREFMUL2_SET(x) (((x) << 23) & 0x07800000)
1760 #define PHY_ANALOG_SYNTH12_VREFMUL1_MSB 30
1761 #define PHY_ANALOG_SYNTH12_VREFMUL1_LSB 27
1762 #define PHY_ANALOG_SYNTH12_VREFMUL1_MASK 0x78000000
1763 #define PHY_ANALOG_SYNTH12_VREFMUL1_GET(x) (((x) & 0x78000000) >> 27)
1764 #define PHY_ANALOG_SYNTH12_VREFMUL1_SET(x) (((x) << 27) & 0x78000000)
1765 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_MSB 31
1766 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_LSB 31
1767 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_MASK 0x80000000
1768 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_GET(x) (((x) & 0x80000000) >> 31)
1769 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_SET(x) (((x) << 31) & 0x80000000)
1771 /* macros for SYNTH13 */
1772 #define PHY_ANALOG_SYNTH13_ADDRESS 0x000000b0
1773 #define PHY_ANALOG_SYNTH13_OFFSET 0x000000b0
1774 #define PHY_ANALOG_SYNTH13_SPARE13A_MSB 0
1775 #define PHY_ANALOG_SYNTH13_SPARE13A_LSB 0
1776 #define PHY_ANALOG_SYNTH13_SPARE13A_MASK 0x00000001
1777 #define PHY_ANALOG_SYNTH13_SPARE13A_GET(x) (((x) & 0x00000001) >> 0)
1778 #define PHY_ANALOG_SYNTH13_SPARE13A_SET(x) (((x) << 0) & 0x00000001)
1779 #define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_MSB 3
1780 #define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_LSB 1
1781 #define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_MASK 0x0000000e
1782 #define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_GET(x) (((x) & 0x0000000e) >> 1)
1783 #define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_SET(x) (((x) << 1) & 0x0000000e)
1784 #define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_MSB 7
1785 #define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_LSB 4
1786 #define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_MASK 0x000000f0
1787 #define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_GET(x) (((x) & 0x000000f0) >> 4)
1788 #define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_SET(x) (((x) << 4) & 0x000000f0)
1789 #define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_MSB 11
1790 #define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_LSB 8
1791 #define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_MASK 0x00000f00
1792 #define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_GET(x) (((x) & 0x00000f00) >> 8)
1793 #define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_SET(x) (((x) << 8) & 0x00000f00)
1794 #define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_MSB 16
1795 #define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_LSB 12
1796 #define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_MASK 0x0001f000
1797 #define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_GET(x) (((x) & 0x0001f000) >> 12)
1798 #define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_SET(x) (((x) << 12) & 0x0001f000)
1799 #define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_MSB 21
1800 #define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_LSB 17
1801 #define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_MASK 0x003e0000
1802 #define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_GET(x) (((x) & 0x003e0000) >> 17)
1803 #define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_SET(x) (((x) << 17) & 0x003e0000)
1804 #define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_MSB 26
1805 #define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_LSB 22
1806 #define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_MASK 0x07c00000
1807 #define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_GET(x) (((x) & 0x07c00000) >> 22)
1808 #define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_SET(x) (((x) << 22) & 0x07c00000)
1809 #define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_MSB 31
1810 #define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_LSB 27
1811 #define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_MASK 0xf8000000
1812 #define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_GET(x) (((x) & 0xf8000000) >> 27)
1813 #define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_SET(x) (((x) << 27) & 0xf8000000)
1815 /* macros for SYNTH14 */
1816 #define PHY_ANALOG_SYNTH14_ADDRESS 0x000000b4
1817 #define PHY_ANALOG_SYNTH14_OFFSET 0x000000b4
1818 #define PHY_ANALOG_SYNTH14_SPARE14A_MSB 1
1819 #define PHY_ANALOG_SYNTH14_SPARE14A_LSB 0
1820 #define PHY_ANALOG_SYNTH14_SPARE14A_MASK 0x00000003
1821 #define PHY_ANALOG_SYNTH14_SPARE14A_GET(x) (((x) & 0x00000003) >> 0)
1822 #define PHY_ANALOG_SYNTH14_SPARE14A_SET(x) (((x) << 0) & 0x00000003)
1823 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_MSB 3
1824 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_LSB 2
1825 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_MASK 0x0000000c
1826 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_GET(x) (((x) & 0x0000000c) >> 2)
1827 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_SET(x) (((x) << 2) & 0x0000000c)
1828 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_MSB 5
1829 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_LSB 4
1830 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_MASK 0x00000030
1831 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_GET(x) (((x) & 0x00000030) >> 4)
1832 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_SET(x) (((x) << 4) & 0x00000030)
1833 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_MSB 7
1834 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_LSB 6
1835 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_MASK 0x000000c0
1836 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_GET(x) (((x) & 0x000000c0) >> 6)
1837 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_SET(x) (((x) << 6) & 0x000000c0)
1838 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_MSB 9
1839 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_LSB 8
1840 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_MASK 0x00000300
1841 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_GET(x) (((x) & 0x00000300) >> 8)
1842 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_SET(x) (((x) << 8) & 0x00000300)
1843 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_MSB 10
1844 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_LSB 10
1845 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_MASK 0x00000400
1846 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_GET(x) (((x) & 0x00000400) >> 10)
1847 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_SET(x) (((x) << 10) & 0x00000400)
1848 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_MSB 11
1849 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_LSB 11
1850 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_MASK 0x00000800
1851 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_GET(x) (((x) & 0x00000800) >> 11)
1852 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_SET(x) (((x) << 11) & 0x00000800)
1853 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_MSB 12
1854 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_LSB 12
1855 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_MASK 0x00001000
1856 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_GET(x) (((x) & 0x00001000) >> 12)
1857 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_SET(x) (((x) << 12) & 0x00001000)
1858 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_MSB 13
1859 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_LSB 13
1860 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_MASK 0x00002000
1861 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_GET(x) (((x) & 0x00002000) >> 13)
1862 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_SET(x) (((x) << 13) & 0x00002000)
1863 #define PHY_ANALOG_SYNTH14_PWUPLO23_PD_MSB 16
1864 #define PHY_ANALOG_SYNTH14_PWUPLO23_PD_LSB 14
1865 #define PHY_ANALOG_SYNTH14_PWUPLO23_PD_MASK 0x0001c000
1866 #define PHY_ANALOG_SYNTH14_PWUPLO23_PD_GET(x) (((x) & 0x0001c000) >> 14)
1867 #define PHY_ANALOG_SYNTH14_PWUPLO23_PD_SET(x) (((x) << 14) & 0x0001c000)
1868 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_MSB 19
1869 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_LSB 17
1870 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_MASK 0x000e0000
1871 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_GET(x) (((x) & 0x000e0000) >> 17)
1872 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_SET(x) (((x) << 17) & 0x000e0000)
1873 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_MSB 22
1874 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_LSB 20
1875 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_MASK 0x00700000
1876 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_GET(x) (((x) & 0x00700000) >> 20)
1877 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_SET(x) (((x) << 20) & 0x00700000)
1878 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_MSB 25
1879 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_LSB 23
1880 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_MASK 0x03800000
1881 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_GET(x) (((x) & 0x03800000) >> 23)
1882 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_SET(x) (((x) << 23) & 0x03800000)
1883 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_MSB 28
1884 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_LSB 26
1885 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_MASK 0x1c000000
1886 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_GET(x) (((x) & 0x1c000000) >> 26)
1887 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_SET(x) (((x) << 26) & 0x1c000000)
1888 #define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_MSB 31
1889 #define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_LSB 29
1890 #define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_MASK 0xe0000000
1891 #define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_GET(x) (((x) & 0xe0000000) >> 29)
1892 #define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_SET(x) (((x) << 29) & 0xe0000000)
1894 /* macros for BIAS1 */
1895 #define PHY_ANALOG_BIAS1_ADDRESS 0x000000c0
1896 #define PHY_ANALOG_BIAS1_OFFSET 0x000000c0
1897 #define PHY_ANALOG_BIAS1_SPARE1_MSB 6
1898 #define PHY_ANALOG_BIAS1_SPARE1_LSB 0
1899 #define PHY_ANALOG_BIAS1_SPARE1_MASK 0x0000007f
1900 #define PHY_ANALOG_BIAS1_SPARE1_GET(x) (((x) & 0x0000007f) >> 0)
1901 #define PHY_ANALOG_BIAS1_SPARE1_SET(x) (((x) << 0) & 0x0000007f)
1902 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_MSB 9
1903 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_LSB 7
1904 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_MASK 0x00000380
1905 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_GET(x) (((x) & 0x00000380) >> 7)
1906 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_SET(x) (((x) << 7) & 0x00000380)
1907 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_MSB 12
1908 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_LSB 10
1909 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_MASK 0x00001c00
1910 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_GET(x) (((x) & 0x00001c00) >> 10)
1911 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_SET(x) (((x) << 10) & 0x00001c00)
1912 #define PHY_ANALOG_BIAS1_PWD_IC25BB_MSB 15
1913 #define PHY_ANALOG_BIAS1_PWD_IC25BB_LSB 13
1914 #define PHY_ANALOG_BIAS1_PWD_IC25BB_MASK 0x0000e000
1915 #define PHY_ANALOG_BIAS1_PWD_IC25BB_GET(x) (((x) & 0x0000e000) >> 13)
1916 #define PHY_ANALOG_BIAS1_PWD_IC25BB_SET(x) (((x) << 13) & 0x0000e000)
1917 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_MSB 18
1918 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_LSB 16
1919 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_MASK 0x00070000
1920 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_GET(x) (((x) & 0x00070000) >> 16)
1921 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_SET(x) (((x) << 16) & 0x00070000)
1922 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_MSB 21
1923 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_LSB 19
1924 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_MASK 0x00380000
1925 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_GET(x) (((x) & 0x00380000) >> 19)
1926 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_SET(x) (((x) << 19) & 0x00380000)
1927 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_MSB 24
1928 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_LSB 22
1929 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_MASK 0x01c00000
1930 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_GET(x) (((x) & 0x01c00000) >> 22)
1931 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_SET(x) (((x) << 22) & 0x01c00000)
1932 #define PHY_ANALOG_BIAS1_BIAS_SEL_MSB 31
1933 #define PHY_ANALOG_BIAS1_BIAS_SEL_LSB 25
1934 #define PHY_ANALOG_BIAS1_BIAS_SEL_MASK 0xfe000000
1935 #define PHY_ANALOG_BIAS1_BIAS_SEL_GET(x) (((x) & 0xfe000000) >> 25)
1936 #define PHY_ANALOG_BIAS1_BIAS_SEL_SET(x) (((x) << 25) & 0xfe000000)
1938 /* macros for BIAS2 */
1939 #define PHY_ANALOG_BIAS2_ADDRESS 0x000000c4
1940 #define PHY_ANALOG_BIAS2_OFFSET 0x000000c4
1941 #define PHY_ANALOG_BIAS2_SPARE2_MSB 4
1942 #define PHY_ANALOG_BIAS2_SPARE2_LSB 0
1943 #define PHY_ANALOG_BIAS2_SPARE2_MASK 0x0000001f
1944 #define PHY_ANALOG_BIAS2_SPARE2_GET(x) (((x) & 0x0000001f) >> 0)
1945 #define PHY_ANALOG_BIAS2_SPARE2_SET(x) (((x) << 0) & 0x0000001f)
1946 #define PHY_ANALOG_BIAS2_PWD_IC25XPA_MSB 7
1947 #define PHY_ANALOG_BIAS2_PWD_IC25XPA_LSB 5
1948 #define PHY_ANALOG_BIAS2_PWD_IC25XPA_MASK 0x000000e0
1949 #define PHY_ANALOG_BIAS2_PWD_IC25XPA_GET(x) (((x) & 0x000000e0) >> 5)
1950 #define PHY_ANALOG_BIAS2_PWD_IC25XPA_SET(x) (((x) << 5) & 0x000000e0)
1951 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_MSB 10
1952 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_LSB 8
1953 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_MASK 0x00000700
1954 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_GET(x) (((x) & 0x00000700) >> 8)
1955 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_SET(x) (((x) << 8) & 0x00000700)
1956 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_MSB 13
1957 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_LSB 11
1958 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_MASK 0x00003800
1959 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_GET(x) (((x) & 0x00003800) >> 11)
1960 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_SET(x) (((x) << 11) & 0x00003800)
1961 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_MSB 16
1962 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_LSB 14
1963 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_MASK 0x0001c000
1964 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_GET(x) (((x) & 0x0001c000) >> 14)
1965 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_SET(x) (((x) << 14) & 0x0001c000)
1966 #define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_MSB 19
1967 #define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_LSB 17
1968 #define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_MASK 0x000e0000
1969 #define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_GET(x) (((x) & 0x000e0000) >> 17)
1970 #define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_SET(x) (((x) << 17) & 0x000e0000)
1971 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_MSB 22
1972 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_LSB 20
1973 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_MASK 0x00700000
1974 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_GET(x) (((x) & 0x00700000) >> 20)
1975 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_SET(x) (((x) << 20) & 0x00700000)
1976 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_MSB 25
1977 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_LSB 23
1978 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_MASK 0x03800000
1979 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_GET(x) (((x) & 0x03800000) >> 23)
1980 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_SET(x) (((x) << 23) & 0x03800000)
1981 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_MSB 28
1982 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_LSB 26
1983 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_MASK 0x1c000000
1984 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_GET(x) (((x) & 0x1c000000) >> 26)
1985 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_SET(x) (((x) << 26) & 0x1c000000)
1986 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_MSB 31
1987 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_LSB 29
1988 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_MASK 0xe0000000
1989 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_GET(x) (((x) & 0xe0000000) >> 29)
1990 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_SET(x) (((x) << 29) & 0xe0000000)
1992 /* macros for BIAS3 */
1993 #define PHY_ANALOG_BIAS3_ADDRESS 0x000000c8
1994 #define PHY_ANALOG_BIAS3_OFFSET 0x000000c8
1995 #define PHY_ANALOG_BIAS3_SPARE3_MSB 1
1996 #define PHY_ANALOG_BIAS3_SPARE3_LSB 0
1997 #define PHY_ANALOG_BIAS3_SPARE3_MASK 0x00000003
1998 #define PHY_ANALOG_BIAS3_SPARE3_GET(x) (((x) & 0x00000003) >> 0)
1999 #define PHY_ANALOG_BIAS3_SPARE3_SET(x) (((x) << 0) & 0x00000003)
2000 #define PHY_ANALOG_BIAS3_PWD_IR25SAR_MSB 4
2001 #define PHY_ANALOG_BIAS3_PWD_IR25SAR_LSB 2
2002 #define PHY_ANALOG_BIAS3_PWD_IR25SAR_MASK 0x0000001c
2003 #define PHY_ANALOG_BIAS3_PWD_IR25SAR_GET(x) (((x) & 0x0000001c) >> 2)
2004 #define PHY_ANALOG_BIAS3_PWD_IR25SAR_SET(x) (((x) << 2) & 0x0000001c)
2005 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_MSB 7
2006 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_LSB 5
2007 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_MASK 0x000000e0
2008 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_GET(x) (((x) & 0x000000e0) >> 5)
2009 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_SET(x) (((x) << 5) & 0x000000e0)
2010 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_MSB 10
2011 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_LSB 8
2012 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_MASK 0x00000700
2013 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_GET(x) (((x) & 0x00000700) >> 8)
2014 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_SET(x) (((x) << 8) & 0x00000700)
2015 #define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_MSB 13
2016 #define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_LSB 11
2017 #define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_MASK 0x00003800
2018 #define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_GET(x) (((x) & 0x00003800) >> 11)
2019 #define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_SET(x) (((x) << 11) & 0x00003800)
2020 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_MSB 16
2021 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_LSB 14
2022 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_MASK 0x0001c000
2023 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_GET(x) (((x) & 0x0001c000) >> 14)
2024 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_SET(x) (((x) << 14) & 0x0001c000)
2025 #define PHY_ANALOG_BIAS3_PWD_IR25BB_MSB 19
2026 #define PHY_ANALOG_BIAS3_PWD_IR25BB_LSB 17
2027 #define PHY_ANALOG_BIAS3_PWD_IR25BB_MASK 0x000e0000
2028 #define PHY_ANALOG_BIAS3_PWD_IR25BB_GET(x) (((x) & 0x000e0000) >> 17)
2029 #define PHY_ANALOG_BIAS3_PWD_IR25BB_SET(x) (((x) << 17) & 0x000e0000)
2030 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_MSB 22
2031 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_LSB 20
2032 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_MASK 0x00700000
2033 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_GET(x) (((x) & 0x00700000) >> 20)
2034 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_SET(x) (((x) << 20) & 0x00700000)
2035 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_MSB 25
2036 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_LSB 23
2037 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_MASK 0x03800000
2038 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_GET(x) (((x) & 0x03800000) >> 23)
2039 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_SET(x) (((x) << 23) & 0x03800000)
2040 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_MSB 28
2041 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_LSB 26
2042 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_MASK 0x1c000000
2043 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_GET(x) (((x) & 0x1c000000) >> 26)
2044 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_SET(x) (((x) << 26) & 0x1c000000)
2045 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_MSB 31
2046 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_LSB 29
2047 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_MASK 0xe0000000
2048 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_GET(x) (((x) & 0xe0000000) >> 29)
2049 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_SET(x) (((x) << 29) & 0xe0000000)
2051 /* macros for BIAS4 */
2052 #define PHY_ANALOG_BIAS4_ADDRESS 0x000000cc
2053 #define PHY_ANALOG_BIAS4_OFFSET 0x000000cc
2054 #define PHY_ANALOG_BIAS4_SPARE4_MSB 10
2055 #define PHY_ANALOG_BIAS4_SPARE4_LSB 0
2056 #define PHY_ANALOG_BIAS4_SPARE4_MASK 0x000007ff
2057 #define PHY_ANALOG_BIAS4_SPARE4_GET(x) (((x) & 0x000007ff) >> 0)
2058 #define PHY_ANALOG_BIAS4_SPARE4_SET(x) (((x) << 0) & 0x000007ff)
2059 #define PHY_ANALOG_BIAS4_PWD_IR25SPARED_MSB 13
2060 #define PHY_ANALOG_BIAS4_PWD_IR25SPARED_LSB 11
2061 #define PHY_ANALOG_BIAS4_PWD_IR25SPARED_MASK 0x00003800
2062 #define PHY_ANALOG_BIAS4_PWD_IR25SPARED_GET(x) (((x) & 0x00003800) >> 11)
2063 #define PHY_ANALOG_BIAS4_PWD_IR25SPARED_SET(x) (((x) << 11) & 0x00003800)
2064 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_MSB 16
2065 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_LSB 14
2066 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_MASK 0x0001c000
2067 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_GET(x) (((x) & 0x0001c000) >> 14)
2068 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_SET(x) (((x) << 14) & 0x0001c000)
2069 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_MSB 19
2070 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_LSB 17
2071 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_MASK 0x000e0000
2072 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_GET(x) (((x) & 0x000e0000) >> 17)
2073 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_SET(x) (((x) << 17) & 0x000e0000)
2074 #define PHY_ANALOG_BIAS4_PWD_IR25XPA_MSB 22
2075 #define PHY_ANALOG_BIAS4_PWD_IR25XPA_LSB 20
2076 #define PHY_ANALOG_BIAS4_PWD_IR25XPA_MASK 0x00700000
2077 #define PHY_ANALOG_BIAS4_PWD_IR25XPA_GET(x) (((x) & 0x00700000) >> 20)
2078 #define PHY_ANALOG_BIAS4_PWD_IR25XPA_SET(x) (((x) << 20) & 0x00700000)
2079 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_MSB 25
2080 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_LSB 23
2081 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_MASK 0x03800000
2082 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_GET(x) (((x) & 0x03800000) >> 23)
2083 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_SET(x) (((x) << 23) & 0x03800000)
2084 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_MSB 28
2085 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_LSB 26
2086 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_MASK 0x1c000000
2087 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_GET(x) (((x) & 0x1c000000) >> 26)
2088 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_SET(x) (((x) << 26) & 0x1c000000)
2089 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_MSB 31
2090 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_LSB 29
2091 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_MASK 0xe0000000
2092 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_GET(x) (((x) & 0xe0000000) >> 29)
2093 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_SET(x) (((x) << 29) & 0xe0000000)
2095 /* macros for RXTX1 */
2096 #define PHY_ANALOG_RXTX1_ADDRESS 0x00000100
2097 #define PHY_ANALOG_RXTX1_OFFSET 0x00000100
2098 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_MSB 0
2099 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_LSB 0
2100 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_MASK 0x00000001
2101 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_GET(x) (((x) & 0x00000001) >> 0)
2102 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_SET(x) (((x) << 0) & 0x00000001)
2103 #define PHY_ANALOG_RXTX1_MANRXGAIN_MSB 1
2104 #define PHY_ANALOG_RXTX1_MANRXGAIN_LSB 1
2105 #define PHY_ANALOG_RXTX1_MANRXGAIN_MASK 0x00000002
2106 #define PHY_ANALOG_RXTX1_MANRXGAIN_GET(x) (((x) & 0x00000002) >> 1)
2107 #define PHY_ANALOG_RXTX1_MANRXGAIN_SET(x) (((x) << 1) & 0x00000002)
2108 #define PHY_ANALOG_RXTX1_AGC_DBDAC_MSB 5
2109 #define PHY_ANALOG_RXTX1_AGC_DBDAC_LSB 2
2110 #define PHY_ANALOG_RXTX1_AGC_DBDAC_MASK 0x0000003c
2111 #define PHY_ANALOG_RXTX1_AGC_DBDAC_GET(x) (((x) & 0x0000003c) >> 2)
2112 #define PHY_ANALOG_RXTX1_AGC_DBDAC_SET(x) (((x) << 2) & 0x0000003c)
2113 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_MSB 6
2114 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_LSB 6
2115 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_MASK 0x00000040
2116 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_GET(x) (((x) & 0x00000040) >> 6)
2117 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_SET(x) (((x) << 6) & 0x00000040)
2118 #define PHY_ANALOG_RXTX1_ENABLE_PAL_MSB 7
2119 #define PHY_ANALOG_RXTX1_ENABLE_PAL_LSB 7
2120 #define PHY_ANALOG_RXTX1_ENABLE_PAL_MASK 0x00000080
2121 #define PHY_ANALOG_RXTX1_ENABLE_PAL_GET(x) (((x) & 0x00000080) >> 7)
2122 #define PHY_ANALOG_RXTX1_ENABLE_PAL_SET(x) (((x) << 7) & 0x00000080)
2123 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_MSB 8
2124 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_LSB 8
2125 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_MASK 0x00000100
2126 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_GET(x) (((x) & 0x00000100) >> 8)
2127 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_SET(x) (((x) << 8) & 0x00000100)
2128 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_MSB 11
2129 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_LSB 9
2130 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_MASK 0x00000e00
2131 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_GET(x) (((x) & 0x00000e00) >> 9)
2132 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_SET(x) (((x) << 9) & 0x00000e00)
2133 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_MSB 13
2134 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_LSB 12
2135 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_MASK 0x00003000
2136 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_GET(x) (((x) & 0x00003000) >> 12)
2137 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_SET(x) (((x) << 12) & 0x00003000)
2138 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_MSB 14
2139 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_LSB 14
2140 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_MASK 0x00004000
2141 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_GET(x) (((x) & 0x00004000) >> 14)
2142 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_SET(x) (((x) << 14) & 0x00004000)
2143 #define PHY_ANALOG_RXTX1_PADRV2GN_MSB 18
2144 #define PHY_ANALOG_RXTX1_PADRV2GN_LSB 15
2145 #define PHY_ANALOG_RXTX1_PADRV2GN_MASK 0x00078000
2146 #define PHY_ANALOG_RXTX1_PADRV2GN_GET(x) (((x) & 0x00078000) >> 15)
2147 #define PHY_ANALOG_RXTX1_PADRV2GN_SET(x) (((x) << 15) & 0x00078000)
2148 #define PHY_ANALOG_RXTX1_PADRV3GN5G_MSB 22
2149 #define PHY_ANALOG_RXTX1_PADRV3GN5G_LSB 19
2150 #define PHY_ANALOG_RXTX1_PADRV3GN5G_MASK 0x00780000
2151 #define PHY_ANALOG_RXTX1_PADRV3GN5G_GET(x) (((x) & 0x00780000) >> 19)
2152 #define PHY_ANALOG_RXTX1_PADRV3GN5G_SET(x) (((x) << 19) & 0x00780000)
2153 #define PHY_ANALOG_RXTX1_PADRV4GN5G_MSB 26
2154 #define PHY_ANALOG_RXTX1_PADRV4GN5G_LSB 23
2155 #define PHY_ANALOG_RXTX1_PADRV4GN5G_MASK 0x07800000
2156 #define PHY_ANALOG_RXTX1_PADRV4GN5G_GET(x) (((x) & 0x07800000) >> 23)
2157 #define PHY_ANALOG_RXTX1_PADRV4GN5G_SET(x) (((x) << 23) & 0x07800000)
2158 #define PHY_ANALOG_RXTX1_TXBB_GC_MSB 30
2159 #define PHY_ANALOG_RXTX1_TXBB_GC_LSB 27
2160 #define PHY_ANALOG_RXTX1_TXBB_GC_MASK 0x78000000
2161 #define PHY_ANALOG_RXTX1_TXBB_GC_GET(x) (((x) & 0x78000000) >> 27)
2162 #define PHY_ANALOG_RXTX1_TXBB_GC_SET(x) (((x) << 27) & 0x78000000)
2163 #define PHY_ANALOG_RXTX1_MANTXGAIN_MSB 31
2164 #define PHY_ANALOG_RXTX1_MANTXGAIN_LSB 31
2165 #define PHY_ANALOG_RXTX1_MANTXGAIN_MASK 0x80000000
2166 #define PHY_ANALOG_RXTX1_MANTXGAIN_GET(x) (((x) & 0x80000000) >> 31)
2167 #define PHY_ANALOG_RXTX1_MANTXGAIN_SET(x) (((x) << 31) & 0x80000000)
2169 /* macros for RXTX2 */
2170 #define PHY_ANALOG_RXTX2_ADDRESS 0x00000104
2171 #define PHY_ANALOG_RXTX2_OFFSET 0x00000104
2172 #define PHY_ANALOG_RXTX2_BMODE_MSB 0
2173 #define PHY_ANALOG_RXTX2_BMODE_LSB 0
2174 #define PHY_ANALOG_RXTX2_BMODE_MASK 0x00000001
2175 #define PHY_ANALOG_RXTX2_BMODE_GET(x) (((x) & 0x00000001) >> 0)
2176 #define PHY_ANALOG_RXTX2_BMODE_SET(x) (((x) << 0) & 0x00000001)
2177 #define PHY_ANALOG_RXTX2_BMODE_OVR_MSB 1
2178 #define PHY_ANALOG_RXTX2_BMODE_OVR_LSB 1
2179 #define PHY_ANALOG_RXTX2_BMODE_OVR_MASK 0x00000002
2180 #define PHY_ANALOG_RXTX2_BMODE_OVR_GET(x) (((x) & 0x00000002) >> 1)
2181 #define PHY_ANALOG_RXTX2_BMODE_OVR_SET(x) (((x) << 1) & 0x00000002)
2182 #define PHY_ANALOG_RXTX2_SYNTHON_MSB 2
2183 #define PHY_ANALOG_RXTX2_SYNTHON_LSB 2
2184 #define PHY_ANALOG_RXTX2_SYNTHON_MASK 0x00000004
2185 #define PHY_ANALOG_RXTX2_SYNTHON_GET(x) (((x) & 0x00000004) >> 2)
2186 #define PHY_ANALOG_RXTX2_SYNTHON_SET(x) (((x) << 2) & 0x00000004)
2187 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_MSB 3
2188 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_LSB 3
2189 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_MASK 0x00000008
2190 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_GET(x) (((x) & 0x00000008) >> 3)
2191 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_SET(x) (((x) << 3) & 0x00000008)
2192 #define PHY_ANALOG_RXTX2_BW_ST_MSB 5
2193 #define PHY_ANALOG_RXTX2_BW_ST_LSB 4
2194 #define PHY_ANALOG_RXTX2_BW_ST_MASK 0x00000030
2195 #define PHY_ANALOG_RXTX2_BW_ST_GET(x) (((x) & 0x00000030) >> 4)
2196 #define PHY_ANALOG_RXTX2_BW_ST_SET(x) (((x) << 4) & 0x00000030)
2197 #define PHY_ANALOG_RXTX2_BW_ST_OVR_MSB 6
2198 #define PHY_ANALOG_RXTX2_BW_ST_OVR_LSB 6
2199 #define PHY_ANALOG_RXTX2_BW_ST_OVR_MASK 0x00000040
2200 #define PHY_ANALOG_RXTX2_BW_ST_OVR_GET(x) (((x) & 0x00000040) >> 6)
2201 #define PHY_ANALOG_RXTX2_BW_ST_OVR_SET(x) (((x) << 6) & 0x00000040)
2202 #define PHY_ANALOG_RXTX2_TXON_MSB 7
2203 #define PHY_ANALOG_RXTX2_TXON_LSB 7
2204 #define PHY_ANALOG_RXTX2_TXON_MASK 0x00000080
2205 #define PHY_ANALOG_RXTX2_TXON_GET(x) (((x) & 0x00000080) >> 7)
2206 #define PHY_ANALOG_RXTX2_TXON_SET(x) (((x) << 7) & 0x00000080)
2207 #define PHY_ANALOG_RXTX2_TXON_OVR_MSB 8
2208 #define PHY_ANALOG_RXTX2_TXON_OVR_LSB 8
2209 #define PHY_ANALOG_RXTX2_TXON_OVR_MASK 0x00000100
2210 #define PHY_ANALOG_RXTX2_TXON_OVR_GET(x) (((x) & 0x00000100) >> 8)
2211 #define PHY_ANALOG_RXTX2_TXON_OVR_SET(x) (((x) << 8) & 0x00000100)
2212 #define PHY_ANALOG_RXTX2_PAON_MSB 9
2213 #define PHY_ANALOG_RXTX2_PAON_LSB 9
2214 #define PHY_ANALOG_RXTX2_PAON_MASK 0x00000200
2215 #define PHY_ANALOG_RXTX2_PAON_GET(x) (((x) & 0x00000200) >> 9)
2216 #define PHY_ANALOG_RXTX2_PAON_SET(x) (((x) << 9) & 0x00000200)
2217 #define PHY_ANALOG_RXTX2_PAON_OVR_MSB 10
2218 #define PHY_ANALOG_RXTX2_PAON_OVR_LSB 10
2219 #define PHY_ANALOG_RXTX2_PAON_OVR_MASK 0x00000400
2220 #define PHY_ANALOG_RXTX2_PAON_OVR_GET(x) (((x) & 0x00000400) >> 10)
2221 #define PHY_ANALOG_RXTX2_PAON_OVR_SET(x) (((x) << 10) & 0x00000400)
2222 #define PHY_ANALOG_RXTX2_RXON_MSB 11
2223 #define PHY_ANALOG_RXTX2_RXON_LSB 11
2224 #define PHY_ANALOG_RXTX2_RXON_MASK 0x00000800
2225 #define PHY_ANALOG_RXTX2_RXON_GET(x) (((x) & 0x00000800) >> 11)
2226 #define PHY_ANALOG_RXTX2_RXON_SET(x) (((x) << 11) & 0x00000800)
2227 #define PHY_ANALOG_RXTX2_RXON_OVR_MSB 12
2228 #define PHY_ANALOG_RXTX2_RXON_OVR_LSB 12
2229 #define PHY_ANALOG_RXTX2_RXON_OVR_MASK 0x00001000
2230 #define PHY_ANALOG_RXTX2_RXON_OVR_GET(x) (((x) & 0x00001000) >> 12)
2231 #define PHY_ANALOG_RXTX2_RXON_OVR_SET(x) (((x) << 12) & 0x00001000)
2232 #define PHY_ANALOG_RXTX2_AGCON_MSB 13
2233 #define PHY_ANALOG_RXTX2_AGCON_LSB 13
2234 #define PHY_ANALOG_RXTX2_AGCON_MASK 0x00002000
2235 #define PHY_ANALOG_RXTX2_AGCON_GET(x) (((x) & 0x00002000) >> 13)
2236 #define PHY_ANALOG_RXTX2_AGCON_SET(x) (((x) << 13) & 0x00002000)
2237 #define PHY_ANALOG_RXTX2_AGCON_OVR_MSB 14
2238 #define PHY_ANALOG_RXTX2_AGCON_OVR_LSB 14
2239 #define PHY_ANALOG_RXTX2_AGCON_OVR_MASK 0x00004000
2240 #define PHY_ANALOG_RXTX2_AGCON_OVR_GET(x) (((x) & 0x00004000) >> 14)
2241 #define PHY_ANALOG_RXTX2_AGCON_OVR_SET(x) (((x) << 14) & 0x00004000)
2242 #define PHY_ANALOG_RXTX2_TXMOD_MSB 17
2243 #define PHY_ANALOG_RXTX2_TXMOD_LSB 15
2244 #define PHY_ANALOG_RXTX2_TXMOD_MASK 0x00038000
2245 #define PHY_ANALOG_RXTX2_TXMOD_GET(x) (((x) & 0x00038000) >> 15)
2246 #define PHY_ANALOG_RXTX2_TXMOD_SET(x) (((x) << 15) & 0x00038000)
2247 #define PHY_ANALOG_RXTX2_TXMOD_OVR_MSB 18
2248 #define PHY_ANALOG_RXTX2_TXMOD_OVR_LSB 18
2249 #define PHY_ANALOG_RXTX2_TXMOD_OVR_MASK 0x00040000
2250 #define PHY_ANALOG_RXTX2_TXMOD_OVR_GET(x) (((x) & 0x00040000) >> 18)
2251 #define PHY_ANALOG_RXTX2_TXMOD_OVR_SET(x) (((x) << 18) & 0x00040000)
2252 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_MSB 21
2253 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_LSB 19
2254 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_MASK 0x00380000
2255 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_GET(x) (((x) & 0x00380000) >> 19)
2256 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_SET(x) (((x) << 19) & 0x00380000)
2257 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_MSB 23
2258 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_LSB 22
2259 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_MASK 0x00c00000
2260 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_GET(x) (((x) & 0x00c00000) >> 22)
2261 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_SET(x) (((x) << 22) & 0x00c00000)
2262 #define PHY_ANALOG_RXTX2_MXRGAIN_MSB 25
2263 #define PHY_ANALOG_RXTX2_MXRGAIN_LSB 24
2264 #define PHY_ANALOG_RXTX2_MXRGAIN_MASK 0x03000000
2265 #define PHY_ANALOG_RXTX2_MXRGAIN_GET(x) (((x) & 0x03000000) >> 24)
2266 #define PHY_ANALOG_RXTX2_MXRGAIN_SET(x) (((x) << 24) & 0x03000000)
2267 #define PHY_ANALOG_RXTX2_VGAGAIN_MSB 28
2268 #define PHY_ANALOG_RXTX2_VGAGAIN_LSB 26
2269 #define PHY_ANALOG_RXTX2_VGAGAIN_MASK 0x1c000000
2270 #define PHY_ANALOG_RXTX2_VGAGAIN_GET(x) (((x) & 0x1c000000) >> 26)
2271 #define PHY_ANALOG_RXTX2_VGAGAIN_SET(x) (((x) << 26) & 0x1c000000)
2272 #define PHY_ANALOG_RXTX2_LNAGAIN_MSB 31
2273 #define PHY_ANALOG_RXTX2_LNAGAIN_LSB 29
2274 #define PHY_ANALOG_RXTX2_LNAGAIN_MASK 0xe0000000
2275 #define PHY_ANALOG_RXTX2_LNAGAIN_GET(x) (((x) & 0xe0000000) >> 29)
2276 #define PHY_ANALOG_RXTX2_LNAGAIN_SET(x) (((x) << 29) & 0xe0000000)
2278 /* macros for RXTX3 */
2279 #define PHY_ANALOG_RXTX3_ADDRESS 0x00000108
2280 #define PHY_ANALOG_RXTX3_OFFSET 0x00000108
2281 #define PHY_ANALOG_RXTX3_SPARE3_MSB 2
2282 #define PHY_ANALOG_RXTX3_SPARE3_LSB 0
2283 #define PHY_ANALOG_RXTX3_SPARE3_MASK 0x00000007
2284 #define PHY_ANALOG_RXTX3_SPARE3_GET(x) (((x) & 0x00000007) >> 0)
2285 #define PHY_ANALOG_RXTX3_SPARE3_SET(x) (((x) << 0) & 0x00000007)
2286 #define PHY_ANALOG_RXTX3_SPURON_MSB 3
2287 #define PHY_ANALOG_RXTX3_SPURON_LSB 3
2288 #define PHY_ANALOG_RXTX3_SPURON_MASK 0x00000008
2289 #define PHY_ANALOG_RXTX3_SPURON_GET(x) (((x) & 0x00000008) >> 3)
2290 #define PHY_ANALOG_RXTX3_SPURON_SET(x) (((x) << 3) & 0x00000008)
2291 #define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_MSB 4
2292 #define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_LSB 4
2293 #define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_MASK 0x00000010
2294 #define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_GET(x) (((x) & 0x00000010) >> 4)
2295 #define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_SET(x) (((x) << 4) & 0x00000010)
2296 #define PHY_ANALOG_RXTX3_DACFULLSCALE_MSB 5
2297 #define PHY_ANALOG_RXTX3_DACFULLSCALE_LSB 5
2298 #define PHY_ANALOG_RXTX3_DACFULLSCALE_MASK 0x00000020
2299 #define PHY_ANALOG_RXTX3_DACFULLSCALE_GET(x) (((x) & 0x00000020) >> 5)
2300 #define PHY_ANALOG_RXTX3_DACFULLSCALE_SET(x) (((x) << 5) & 0x00000020)
2301 #define PHY_ANALOG_RXTX3_ADCSHORT_MSB 6
2302 #define PHY_ANALOG_RXTX3_ADCSHORT_LSB 6
2303 #define PHY_ANALOG_RXTX3_ADCSHORT_MASK 0x00000040
2304 #define PHY_ANALOG_RXTX3_ADCSHORT_GET(x) (((x) & 0x00000040) >> 6)
2305 #define PHY_ANALOG_RXTX3_ADCSHORT_SET(x) (((x) << 6) & 0x00000040)
2306 #define PHY_ANALOG_RXTX3_DACPWD_MSB 7
2307 #define PHY_ANALOG_RXTX3_DACPWD_LSB 7
2308 #define PHY_ANALOG_RXTX3_DACPWD_MASK 0x00000080
2309 #define PHY_ANALOG_RXTX3_DACPWD_GET(x) (((x) & 0x00000080) >> 7)
2310 #define PHY_ANALOG_RXTX3_DACPWD_SET(x) (((x) << 7) & 0x00000080)
2311 #define PHY_ANALOG_RXTX3_DACPWD_OVR_MSB 8
2312 #define PHY_ANALOG_RXTX3_DACPWD_OVR_LSB 8
2313 #define PHY_ANALOG_RXTX3_DACPWD_OVR_MASK 0x00000100
2314 #define PHY_ANALOG_RXTX3_DACPWD_OVR_GET(x) (((x) & 0x00000100) >> 8)
2315 #define PHY_ANALOG_RXTX3_DACPWD_OVR_SET(x) (((x) << 8) & 0x00000100)
2316 #define PHY_ANALOG_RXTX3_ADCPWD_MSB 9
2317 #define PHY_ANALOG_RXTX3_ADCPWD_LSB 9
2318 #define PHY_ANALOG_RXTX3_ADCPWD_MASK 0x00000200
2319 #define PHY_ANALOG_RXTX3_ADCPWD_GET(x) (((x) & 0x00000200) >> 9)
2320 #define PHY_ANALOG_RXTX3_ADCPWD_SET(x) (((x) << 9) & 0x00000200)
2321 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_MSB 10
2322 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_LSB 10
2323 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_MASK 0x00000400
2324 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_GET(x) (((x) & 0x00000400) >> 10)
2325 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_SET(x) (((x) << 10) & 0x00000400)
2326 #define PHY_ANALOG_RXTX3_AGC_CALDAC_MSB 16
2327 #define PHY_ANALOG_RXTX3_AGC_CALDAC_LSB 11
2328 #define PHY_ANALOG_RXTX3_AGC_CALDAC_MASK 0x0001f800
2329 #define PHY_ANALOG_RXTX3_AGC_CALDAC_GET(x) (((x) & 0x0001f800) >> 11)
2330 #define PHY_ANALOG_RXTX3_AGC_CALDAC_SET(x) (((x) << 11) & 0x0001f800)
2331 #define PHY_ANALOG_RXTX3_AGC_CAL_MSB 17
2332 #define PHY_ANALOG_RXTX3_AGC_CAL_LSB 17
2333 #define PHY_ANALOG_RXTX3_AGC_CAL_MASK 0x00020000
2334 #define PHY_ANALOG_RXTX3_AGC_CAL_GET(x) (((x) & 0x00020000) >> 17)
2335 #define PHY_ANALOG_RXTX3_AGC_CAL_SET(x) (((x) << 17) & 0x00020000)
2336 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_MSB 18
2337 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_LSB 18
2338 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_MASK 0x00040000
2339 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_GET(x) (((x) & 0x00040000) >> 18)
2340 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_SET(x) (((x) << 18) & 0x00040000)
2341 #define PHY_ANALOG_RXTX3_LOFORCEDON_MSB 19
2342 #define PHY_ANALOG_RXTX3_LOFORCEDON_LSB 19
2343 #define PHY_ANALOG_RXTX3_LOFORCEDON_MASK 0x00080000
2344 #define PHY_ANALOG_RXTX3_LOFORCEDON_GET(x) (((x) & 0x00080000) >> 19)
2345 #define PHY_ANALOG_RXTX3_LOFORCEDON_SET(x) (((x) << 19) & 0x00080000)
2346 #define PHY_ANALOG_RXTX3_CALRESIDUE_MSB 20
2347 #define PHY_ANALOG_RXTX3_CALRESIDUE_LSB 20
2348 #define PHY_ANALOG_RXTX3_CALRESIDUE_MASK 0x00100000
2349 #define PHY_ANALOG_RXTX3_CALRESIDUE_GET(x) (((x) & 0x00100000) >> 20)
2350 #define PHY_ANALOG_RXTX3_CALRESIDUE_SET(x) (((x) << 20) & 0x00100000)
2351 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_MSB 21
2352 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_LSB 21
2353 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_MASK 0x00200000
2354 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_GET(x) (((x) & 0x00200000) >> 21)
2355 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_SET(x) (((x) << 21) & 0x00200000)
2356 #define PHY_ANALOG_RXTX3_CALFC_MSB 22
2357 #define PHY_ANALOG_RXTX3_CALFC_LSB 22
2358 #define PHY_ANALOG_RXTX3_CALFC_MASK 0x00400000
2359 #define PHY_ANALOG_RXTX3_CALFC_GET(x) (((x) & 0x00400000) >> 22)
2360 #define PHY_ANALOG_RXTX3_CALFC_SET(x) (((x) << 22) & 0x00400000)
2361 #define PHY_ANALOG_RXTX3_CALFC_OVR_MSB 23
2362 #define PHY_ANALOG_RXTX3_CALFC_OVR_LSB 23
2363 #define PHY_ANALOG_RXTX3_CALFC_OVR_MASK 0x00800000
2364 #define PHY_ANALOG_RXTX3_CALFC_OVR_GET(x) (((x) & 0x00800000) >> 23)
2365 #define PHY_ANALOG_RXTX3_CALFC_OVR_SET(x) (((x) << 23) & 0x00800000)
2366 #define PHY_ANALOG_RXTX3_CALTX_MSB 24
2367 #define PHY_ANALOG_RXTX3_CALTX_LSB 24
2368 #define PHY_ANALOG_RXTX3_CALTX_MASK 0x01000000
2369 #define PHY_ANALOG_RXTX3_CALTX_GET(x) (((x) & 0x01000000) >> 24)
2370 #define PHY_ANALOG_RXTX3_CALTX_SET(x) (((x) << 24) & 0x01000000)
2371 #define PHY_ANALOG_RXTX3_CALTX_OVR_MSB 25
2372 #define PHY_ANALOG_RXTX3_CALTX_OVR_LSB 25
2373 #define PHY_ANALOG_RXTX3_CALTX_OVR_MASK 0x02000000
2374 #define PHY_ANALOG_RXTX3_CALTX_OVR_GET(x) (((x) & 0x02000000) >> 25)
2375 #define PHY_ANALOG_RXTX3_CALTX_OVR_SET(x) (((x) << 25) & 0x02000000)
2376 #define PHY_ANALOG_RXTX3_CALTXSHIFT_MSB 26
2377 #define PHY_ANALOG_RXTX3_CALTXSHIFT_LSB 26
2378 #define PHY_ANALOG_RXTX3_CALTXSHIFT_MASK 0x04000000
2379 #define PHY_ANALOG_RXTX3_CALTXSHIFT_GET(x) (((x) & 0x04000000) >> 26)
2380 #define PHY_ANALOG_RXTX3_CALTXSHIFT_SET(x) (((x) << 26) & 0x04000000)
2381 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_MSB 27
2382 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_LSB 27
2383 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_MASK 0x08000000
2384 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_GET(x) (((x) & 0x08000000) >> 27)
2385 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_SET(x) (((x) << 27) & 0x08000000)
2386 #define PHY_ANALOG_RXTX3_CALPA_MSB 28
2387 #define PHY_ANALOG_RXTX3_CALPA_LSB 28
2388 #define PHY_ANALOG_RXTX3_CALPA_MASK 0x10000000
2389 #define PHY_ANALOG_RXTX3_CALPA_GET(x) (((x) & 0x10000000) >> 28)
2390 #define PHY_ANALOG_RXTX3_CALPA_SET(x) (((x) << 28) & 0x10000000)
2391 #define PHY_ANALOG_RXTX3_CALPA_OVR_MSB 29
2392 #define PHY_ANALOG_RXTX3_CALPA_OVR_LSB 29
2393 #define PHY_ANALOG_RXTX3_CALPA_OVR_MASK 0x20000000
2394 #define PHY_ANALOG_RXTX3_CALPA_OVR_GET(x) (((x) & 0x20000000) >> 29)
2395 #define PHY_ANALOG_RXTX3_CALPA_OVR_SET(x) (((x) << 29) & 0x20000000)
2396 #define PHY_ANALOG_RXTX3_TURBOADC_MSB 30
2397 #define PHY_ANALOG_RXTX3_TURBOADC_LSB 30
2398 #define PHY_ANALOG_RXTX3_TURBOADC_MASK 0x40000000
2399 #define PHY_ANALOG_RXTX3_TURBOADC_GET(x) (((x) & 0x40000000) >> 30)
2400 #define PHY_ANALOG_RXTX3_TURBOADC_SET(x) (((x) << 30) & 0x40000000)
2401 #define PHY_ANALOG_RXTX3_TURBOADC_OVR_MSB 31
2402 #define PHY_ANALOG_RXTX3_TURBOADC_OVR_LSB 31
2403 #define PHY_ANALOG_RXTX3_TURBOADC_OVR_MASK 0x80000000
2404 #define PHY_ANALOG_RXTX3_TURBOADC_OVR_GET(x) (((x) & 0x80000000) >> 31)
2405 #define PHY_ANALOG_RXTX3_TURBOADC_OVR_SET(x) (((x) << 31) & 0x80000000)
2407 /* macros for BB1 */
2408 #define PHY_ANALOG_BB1_ADDRESS 0x00000140
2409 #define PHY_ANALOG_BB1_OFFSET 0x00000140
2410 #define PHY_ANALOG_BB1_I2V_CURR2X_MSB 0
2411 #define PHY_ANALOG_BB1_I2V_CURR2X_LSB 0
2412 #define PHY_ANALOG_BB1_I2V_CURR2X_MASK 0x00000001
2413 #define PHY_ANALOG_BB1_I2V_CURR2X_GET(x) (((x) & 0x00000001) >> 0)
2414 #define PHY_ANALOG_BB1_I2V_CURR2X_SET(x) (((x) << 0) & 0x00000001)
2415 #define PHY_ANALOG_BB1_ENABLE_LOQ_MSB 1
2416 #define PHY_ANALOG_BB1_ENABLE_LOQ_LSB 1
2417 #define PHY_ANALOG_BB1_ENABLE_LOQ_MASK 0x00000002
2418 #define PHY_ANALOG_BB1_ENABLE_LOQ_GET(x) (((x) & 0x00000002) >> 1)
2419 #define PHY_ANALOG_BB1_ENABLE_LOQ_SET(x) (((x) << 1) & 0x00000002)
2420 #define PHY_ANALOG_BB1_FORCE_LOQ_MSB 2
2421 #define PHY_ANALOG_BB1_FORCE_LOQ_LSB 2
2422 #define PHY_ANALOG_BB1_FORCE_LOQ_MASK 0x00000004
2423 #define PHY_ANALOG_BB1_FORCE_LOQ_GET(x) (((x) & 0x00000004) >> 2)
2424 #define PHY_ANALOG_BB1_FORCE_LOQ_SET(x) (((x) << 2) & 0x00000004)
2425 #define PHY_ANALOG_BB1_ENABLE_NOTCH_MSB 3
2426 #define PHY_ANALOG_BB1_ENABLE_NOTCH_LSB 3
2427 #define PHY_ANALOG_BB1_ENABLE_NOTCH_MASK 0x00000008
2428 #define PHY_ANALOG_BB1_ENABLE_NOTCH_GET(x) (((x) & 0x00000008) >> 3)
2429 #define PHY_ANALOG_BB1_ENABLE_NOTCH_SET(x) (((x) << 3) & 0x00000008)
2430 #define PHY_ANALOG_BB1_FORCE_NOTCH_MSB 4
2431 #define PHY_ANALOG_BB1_FORCE_NOTCH_LSB 4
2432 #define PHY_ANALOG_BB1_FORCE_NOTCH_MASK 0x00000010
2433 #define PHY_ANALOG_BB1_FORCE_NOTCH_GET(x) (((x) & 0x00000010) >> 4)
2434 #define PHY_ANALOG_BB1_FORCE_NOTCH_SET(x) (((x) << 4) & 0x00000010)
2435 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_MSB 5
2436 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_LSB 5
2437 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_MASK 0x00000020
2438 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_GET(x) (((x) & 0x00000020) >> 5)
2439 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_SET(x) (((x) << 5) & 0x00000020)
2440 #define PHY_ANALOG_BB1_FORCE_BIQUAD_MSB 6
2441 #define PHY_ANALOG_BB1_FORCE_BIQUAD_LSB 6
2442 #define PHY_ANALOG_BB1_FORCE_BIQUAD_MASK 0x00000040
2443 #define PHY_ANALOG_BB1_FORCE_BIQUAD_GET(x) (((x) & 0x00000040) >> 6)
2444 #define PHY_ANALOG_BB1_FORCE_BIQUAD_SET(x) (((x) << 6) & 0x00000040)
2445 #define PHY_ANALOG_BB1_ENABLE_OSDAC_MSB 7
2446 #define PHY_ANALOG_BB1_ENABLE_OSDAC_LSB 7
2447 #define PHY_ANALOG_BB1_ENABLE_OSDAC_MASK 0x00000080
2448 #define PHY_ANALOG_BB1_ENABLE_OSDAC_GET(x) (((x) & 0x00000080) >> 7)
2449 #define PHY_ANALOG_BB1_ENABLE_OSDAC_SET(x) (((x) << 7) & 0x00000080)
2450 #define PHY_ANALOG_BB1_FORCE_OSDAC_MSB 8
2451 #define PHY_ANALOG_BB1_FORCE_OSDAC_LSB 8
2452 #define PHY_ANALOG_BB1_FORCE_OSDAC_MASK 0x00000100
2453 #define PHY_ANALOG_BB1_FORCE_OSDAC_GET(x) (((x) & 0x00000100) >> 8)
2454 #define PHY_ANALOG_BB1_FORCE_OSDAC_SET(x) (((x) << 8) & 0x00000100)
2455 #define PHY_ANALOG_BB1_ENABLE_V2I_MSB 9
2456 #define PHY_ANALOG_BB1_ENABLE_V2I_LSB 9
2457 #define PHY_ANALOG_BB1_ENABLE_V2I_MASK 0x00000200
2458 #define PHY_ANALOG_BB1_ENABLE_V2I_GET(x) (((x) & 0x00000200) >> 9)
2459 #define PHY_ANALOG_BB1_ENABLE_V2I_SET(x) (((x) << 9) & 0x00000200)
2460 #define PHY_ANALOG_BB1_FORCE_V2I_MSB 10
2461 #define PHY_ANALOG_BB1_FORCE_V2I_LSB 10
2462 #define PHY_ANALOG_BB1_FORCE_V2I_MASK 0x00000400
2463 #define PHY_ANALOG_BB1_FORCE_V2I_GET(x) (((x) & 0x00000400) >> 10)
2464 #define PHY_ANALOG_BB1_FORCE_V2I_SET(x) (((x) << 10) & 0x00000400)
2465 #define PHY_ANALOG_BB1_ENABLE_I2V_MSB 11
2466 #define PHY_ANALOG_BB1_ENABLE_I2V_LSB 11
2467 #define PHY_ANALOG_BB1_ENABLE_I2V_MASK 0x00000800
2468 #define PHY_ANALOG_BB1_ENABLE_I2V_GET(x) (((x) & 0x00000800) >> 11)
2469 #define PHY_ANALOG_BB1_ENABLE_I2V_SET(x) (((x) << 11) & 0x00000800)
2470 #define PHY_ANALOG_BB1_FORCE_I2V_MSB 12
2471 #define PHY_ANALOG_BB1_FORCE_I2V_LSB 12
2472 #define PHY_ANALOG_BB1_FORCE_I2V_MASK 0x00001000
2473 #define PHY_ANALOG_BB1_FORCE_I2V_GET(x) (((x) & 0x00001000) >> 12)
2474 #define PHY_ANALOG_BB1_FORCE_I2V_SET(x) (((x) << 12) & 0x00001000)
2475 #define PHY_ANALOG_BB1_CMSEL_MSB 15
2476 #define PHY_ANALOG_BB1_CMSEL_LSB 13
2477 #define PHY_ANALOG_BB1_CMSEL_MASK 0x0000e000
2478 #define PHY_ANALOG_BB1_CMSEL_GET(x) (((x) & 0x0000e000) >> 13)
2479 #define PHY_ANALOG_BB1_CMSEL_SET(x) (((x) << 13) & 0x0000e000)
2480 #define PHY_ANALOG_BB1_ATBSEL_MSB 17
2481 #define PHY_ANALOG_BB1_ATBSEL_LSB 16
2482 #define PHY_ANALOG_BB1_ATBSEL_MASK 0x00030000
2483 #define PHY_ANALOG_BB1_ATBSEL_GET(x) (((x) & 0x00030000) >> 16)
2484 #define PHY_ANALOG_BB1_ATBSEL_SET(x) (((x) << 16) & 0x00030000)
2485 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_MSB 18
2486 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_LSB 18
2487 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_MASK 0x00040000
2488 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_GET(x) (((x) & 0x00040000) >> 18)
2489 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_SET(x) (((x) << 18) & 0x00040000)
2490 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_MSB 23
2491 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_LSB 19
2492 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_MASK 0x00f80000
2493 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_GET(x) (((x) & 0x00f80000) >> 19)
2494 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_SET(x) (((x) << 19) & 0x00f80000)
2495 #define PHY_ANALOG_BB1_OFSTCORRI2VI_MSB 28
2496 #define PHY_ANALOG_BB1_OFSTCORRI2VI_LSB 24
2497 #define PHY_ANALOG_BB1_OFSTCORRI2VI_MASK 0x1f000000
2498 #define PHY_ANALOG_BB1_OFSTCORRI2VI_GET(x) (((x) & 0x1f000000) >> 24)
2499 #define PHY_ANALOG_BB1_OFSTCORRI2VI_SET(x) (((x) << 24) & 0x1f000000)
2500 #define PHY_ANALOG_BB1_LOCALOFFSET_MSB 29
2501 #define PHY_ANALOG_BB1_LOCALOFFSET_LSB 29
2502 #define PHY_ANALOG_BB1_LOCALOFFSET_MASK 0x20000000
2503 #define PHY_ANALOG_BB1_LOCALOFFSET_GET(x) (((x) & 0x20000000) >> 29)
2504 #define PHY_ANALOG_BB1_LOCALOFFSET_SET(x) (((x) << 29) & 0x20000000)
2505 #define PHY_ANALOG_BB1_RANGE_OSDAC_MSB 31
2506 #define PHY_ANALOG_BB1_RANGE_OSDAC_LSB 30
2507 #define PHY_ANALOG_BB1_RANGE_OSDAC_MASK 0xc0000000
2508 #define PHY_ANALOG_BB1_RANGE_OSDAC_GET(x) (((x) & 0xc0000000) >> 30)
2509 #define PHY_ANALOG_BB1_RANGE_OSDAC_SET(x) (((x) << 30) & 0xc0000000)
2511 /* macros for BB2 */
2512 #define PHY_ANALOG_BB2_ADDRESS 0x00000144
2513 #define PHY_ANALOG_BB2_OFFSET 0x00000144
2514 #define PHY_ANALOG_BB2_SPARE_MSB 3
2515 #define PHY_ANALOG_BB2_SPARE_LSB 0
2516 #define PHY_ANALOG_BB2_SPARE_MASK 0x0000000f
2517 #define PHY_ANALOG_BB2_SPARE_GET(x) (((x) & 0x0000000f) >> 0)
2518 #define PHY_ANALOG_BB2_SPARE_SET(x) (((x) << 0) & 0x0000000f)
2519 #define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_MSB 7
2520 #define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_LSB 4
2521 #define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_MASK 0x000000f0
2522 #define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_GET(x) (((x) & 0x000000f0) >> 4)
2523 #define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_SET(x) (((x) << 4) & 0x000000f0)
2524 #define PHY_ANALOG_BB2_SEL_TEST_MSB 9
2525 #define PHY_ANALOG_BB2_SEL_TEST_LSB 8
2526 #define PHY_ANALOG_BB2_SEL_TEST_MASK 0x00000300
2527 #define PHY_ANALOG_BB2_SEL_TEST_GET(x) (((x) & 0x00000300) >> 8)
2528 #define PHY_ANALOG_BB2_SEL_TEST_SET(x) (((x) << 8) & 0x00000300)
2529 #define PHY_ANALOG_BB2_RCFILTER_CAP_MSB 14
2530 #define PHY_ANALOG_BB2_RCFILTER_CAP_LSB 10
2531 #define PHY_ANALOG_BB2_RCFILTER_CAP_MASK 0x00007c00
2532 #define PHY_ANALOG_BB2_RCFILTER_CAP_GET(x) (((x) & 0x00007c00) >> 10)
2533 #define PHY_ANALOG_BB2_RCFILTER_CAP_SET(x) (((x) << 10) & 0x00007c00)
2534 #define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_MSB 15
2535 #define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_LSB 15
2536 #define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_MASK 0x00008000
2537 #define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_GET(x) (((x) & 0x00008000) >> 15)
2538 #define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_SET(x) (((x) << 15) & 0x00008000)
2539 #define PHY_ANALOG_BB2_FNOTCH_MSB 19
2540 #define PHY_ANALOG_BB2_FNOTCH_LSB 16
2541 #define PHY_ANALOG_BB2_FNOTCH_MASK 0x000f0000
2542 #define PHY_ANALOG_BB2_FNOTCH_GET(x) (((x) & 0x000f0000) >> 16)
2543 #define PHY_ANALOG_BB2_FNOTCH_SET(x) (((x) << 16) & 0x000f0000)
2544 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_MSB 20
2545 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_LSB 20
2546 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_MASK 0x00100000
2547 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_GET(x) (((x) & 0x00100000) >> 20)
2548 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_SET(x) (((x) << 20) & 0x00100000)
2549 #define PHY_ANALOG_BB2_FILTERFC_MSB 25
2550 #define PHY_ANALOG_BB2_FILTERFC_LSB 21
2551 #define PHY_ANALOG_BB2_FILTERFC_MASK 0x03e00000
2552 #define PHY_ANALOG_BB2_FILTERFC_GET(x) (((x) & 0x03e00000) >> 21)
2553 #define PHY_ANALOG_BB2_FILTERFC_SET(x) (((x) << 21) & 0x03e00000)
2554 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_MSB 26
2555 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_LSB 26
2556 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_MASK 0x04000000
2557 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_GET(x) (((x) & 0x04000000) >> 26)
2558 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_SET(x) (((x) << 26) & 0x04000000)
2559 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_MSB 27
2560 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_LSB 27
2561 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_MASK 0x08000000
2562 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_GET(x) (((x) & 0x08000000) >> 27)
2563 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_SET(x) (((x) << 27) & 0x08000000)
2564 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_MSB 28
2565 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_LSB 28
2566 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_MASK 0x10000000
2567 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_GET(x) (((x) & 0x10000000) >> 28)
2568 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_SET(x) (((x) << 28) & 0x10000000)
2569 #define PHY_ANALOG_BB2_RXIN2I2V_EN_MSB 29
2570 #define PHY_ANALOG_BB2_RXIN2I2V_EN_LSB 29
2571 #define PHY_ANALOG_BB2_RXIN2I2V_EN_MASK 0x20000000
2572 #define PHY_ANALOG_BB2_RXIN2I2V_EN_GET(x) (((x) & 0x20000000) >> 29)
2573 #define PHY_ANALOG_BB2_RXIN2I2V_EN_SET(x) (((x) << 29) & 0x20000000)
2574 #define PHY_ANALOG_BB2_RXIN2BQ_EN_MSB 30
2575 #define PHY_ANALOG_BB2_RXIN2BQ_EN_LSB 30
2576 #define PHY_ANALOG_BB2_RXIN2BQ_EN_MASK 0x40000000
2577 #define PHY_ANALOG_BB2_RXIN2BQ_EN_GET(x) (((x) & 0x40000000) >> 30)
2578 #define PHY_ANALOG_BB2_RXIN2BQ_EN_SET(x) (((x) << 30) & 0x40000000)
2579 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_MSB 31
2580 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_LSB 31
2581 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_MASK 0x80000000
2582 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_GET(x) (((x) & 0x80000000) >> 31)
2583 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_SET(x) (((x) << 31) & 0x80000000)
2585 /* macros for BB3 */
2586 #define PHY_ANALOG_BB3_ADDRESS 0x00000148
2587 #define PHY_ANALOG_BB3_OFFSET 0x00000148
2588 #define PHY_ANALOG_BB3_SPARE_MSB 15
2589 #define PHY_ANALOG_BB3_SPARE_LSB 0
2590 #define PHY_ANALOG_BB3_SPARE_MASK 0x0000ffff
2591 #define PHY_ANALOG_BB3_SPARE_GET(x) (((x) & 0x0000ffff) >> 0)
2592 #define PHY_ANALOG_BB3_SPARE_SET(x) (((x) << 0) & 0x0000ffff)
2593 #define PHY_ANALOG_BB3_FILTERFC_MSB 20
2594 #define PHY_ANALOG_BB3_FILTERFC_LSB 16
2595 #define PHY_ANALOG_BB3_FILTERFC_MASK 0x001f0000
2596 #define PHY_ANALOG_BB3_FILTERFC_GET(x) (((x) & 0x001f0000) >> 16)
2597 #define PHY_ANALOG_BB3_OFSTCORRI2VQ_MSB 25
2598 #define PHY_ANALOG_BB3_OFSTCORRI2VQ_LSB 21
2599 #define PHY_ANALOG_BB3_OFSTCORRI2VQ_MASK 0x03e00000
2600 #define PHY_ANALOG_BB3_OFSTCORRI2VQ_GET(x) (((x) & 0x03e00000) >> 21)
2601 #define PHY_ANALOG_BB3_OFSTCORRI2VI_MSB 30
2602 #define PHY_ANALOG_BB3_OFSTCORRI2VI_LSB 26
2603 #define PHY_ANALOG_BB3_OFSTCORRI2VI_MASK 0x7c000000
2604 #define PHY_ANALOG_BB3_OFSTCORRI2VI_GET(x) (((x) & 0x7c000000) >> 26)
2605 #define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_MSB 31
2606 #define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_LSB 31
2607 #define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_MASK 0x80000000
2608 #define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_GET(x) (((x) & 0x80000000) >> 31)
2609 #define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_SET(x) (((x) << 31) & 0x80000000)
2611 /* macros for PLLCLKMODA */
2612 #define PHY_ANALOG_PLLCLKMODA_ADDRESS 0x00000280
2613 #define PHY_ANALOG_PLLCLKMODA_OFFSET 0x00000280
2614 #define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_MSB 0
2615 #define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_LSB 0
2616 #define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_MASK 0x00000001
2617 #define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_GET(x) (((x) & 0x00000001) >> 0)
2618 #define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_SET(x) (((x) << 0) & 0x00000001)
2619 #define PHY_ANALOG_PLLCLKMODA_PWDPLL_MSB 1
2620 #define PHY_ANALOG_PLLCLKMODA_PWDPLL_LSB 1
2621 #define PHY_ANALOG_PLLCLKMODA_PWDPLL_MASK 0x00000002
2622 #define PHY_ANALOG_PLLCLKMODA_PWDPLL_GET(x) (((x) & 0x00000002) >> 1)
2623 #define PHY_ANALOG_PLLCLKMODA_PWDPLL_SET(x) (((x) << 1) & 0x00000002)
2624 #define PHY_ANALOG_PLLCLKMODA_PLLFRAC_MSB 16
2625 #define PHY_ANALOG_PLLCLKMODA_PLLFRAC_LSB 2
2626 #define PHY_ANALOG_PLLCLKMODA_PLLFRAC_MASK 0x0001fffc
2627 #define PHY_ANALOG_PLLCLKMODA_PLLFRAC_GET(x) (((x) & 0x0001fffc) >> 2)
2628 #define PHY_ANALOG_PLLCLKMODA_PLLFRAC_SET(x) (((x) << 2) & 0x0001fffc)
2629 #define PHY_ANALOG_PLLCLKMODA_REFDIV_MSB 20
2630 #define PHY_ANALOG_PLLCLKMODA_REFDIV_LSB 17
2631 #define PHY_ANALOG_PLLCLKMODA_REFDIV_MASK 0x001e0000
2632 #define PHY_ANALOG_PLLCLKMODA_REFDIV_GET(x) (((x) & 0x001e0000) >> 17)
2633 #define PHY_ANALOG_PLLCLKMODA_REFDIV_SET(x) (((x) << 17) & 0x001e0000)
2634 #define PHY_ANALOG_PLLCLKMODA_DIV_MSB 30
2635 #define PHY_ANALOG_PLLCLKMODA_DIV_LSB 21
2636 #define PHY_ANALOG_PLLCLKMODA_DIV_MASK 0x7fe00000
2637 #define PHY_ANALOG_PLLCLKMODA_DIV_GET(x) (((x) & 0x7fe00000) >> 21)
2638 #define PHY_ANALOG_PLLCLKMODA_DIV_SET(x) (((x) << 21) & 0x7fe00000)
2639 #define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_MSB 31
2640 #define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_LSB 31
2641 #define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_MASK 0x80000000
2642 #define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_GET(x) (((x) & 0x80000000) >> 31)
2643 #define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_SET(x) (((x) << 31) & 0x80000000)
2645 /* macros for PLLCLKMODA2 */
2646 #define PHY_ANALOG_PLLCLKMODA2_ADDRESS 0x00000284
2647 #define PHY_ANALOG_PLLCLKMODA2_OFFSET 0x00000284
2648 #define PHY_ANALOG_PLLCLKMODA2_SPARE_MSB 3
2649 #define PHY_ANALOG_PLLCLKMODA2_SPARE_LSB 0
2650 #define PHY_ANALOG_PLLCLKMODA2_SPARE_MASK 0x0000000f
2651 #define PHY_ANALOG_PLLCLKMODA2_SPARE_GET(x) (((x) & 0x0000000f) >> 0)
2652 #define PHY_ANALOG_PLLCLKMODA2_SPARE_SET(x) (((x) << 0) & 0x0000000f)
2653 #define PHY_ANALOG_PLLCLKMODA2_DACPWD_MSB 4
2654 #define PHY_ANALOG_PLLCLKMODA2_DACPWD_LSB 4
2655 #define PHY_ANALOG_PLLCLKMODA2_DACPWD_MASK 0x00000010
2656 #define PHY_ANALOG_PLLCLKMODA2_DACPWD_GET(x) (((x) & 0x00000010) >> 4)
2657 #define PHY_ANALOG_PLLCLKMODA2_DACPWD_SET(x) (((x) << 4) & 0x00000010)
2658 #define PHY_ANALOG_PLLCLKMODA2_ADCPWD_MSB 5
2659 #define PHY_ANALOG_PLLCLKMODA2_ADCPWD_LSB 5
2660 #define PHY_ANALOG_PLLCLKMODA2_ADCPWD_MASK 0x00000020
2661 #define PHY_ANALOG_PLLCLKMODA2_ADCPWD_GET(x) (((x) & 0x00000020) >> 5)
2662 #define PHY_ANALOG_PLLCLKMODA2_ADCPWD_SET(x) (((x) << 5) & 0x00000020)
2663 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_MSB 6
2664 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_LSB 6
2665 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_MASK 0x00000040
2666 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_GET(x) (((x) & 0x00000040) >> 6)
2667 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_SET(x) (((x) << 6) & 0x00000040)
2668 #define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_MSB 8
2669 #define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_LSB 7
2670 #define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_MASK 0x00000180
2671 #define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_GET(x) (((x) & 0x00000180) >> 7)
2672 #define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_SET(x) (((x) << 7) & 0x00000180)
2673 #define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_MSB 12
2674 #define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_LSB 9
2675 #define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_MASK 0x00001e00
2676 #define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_GET(x) (((x) & 0x00001e00) >> 9)
2677 #define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_SET(x) (((x) << 9) & 0x00001e00)
2678 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_MSB 13
2679 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_LSB 13
2680 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_MASK 0x00002000
2681 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_GET(x) (((x) & 0x00002000) >> 13)
2682 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_SET(x) (((x) << 13) & 0x00002000)
2683 #define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_MSB 14
2684 #define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_LSB 14
2685 #define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_MASK 0x00004000
2686 #define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_GET(x) (((x) & 0x00004000) >> 14)
2687 #define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_SET(x) (((x) << 14) & 0x00004000)
2688 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_MSB 15
2689 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_LSB 15
2690 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_MASK 0x00008000
2691 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_GET(x) (((x) & 0x00008000) >> 15)
2692 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_SET(x) (((x) << 15) & 0x00008000)
2693 #define PHY_ANALOG_PLLCLKMODA2_PLLATB_MSB 17
2694 #define PHY_ANALOG_PLLCLKMODA2_PLLATB_LSB 16
2695 #define PHY_ANALOG_PLLCLKMODA2_PLLATB_MASK 0x00030000
2696 #define PHY_ANALOG_PLLCLKMODA2_PLLATB_GET(x) (((x) & 0x00030000) >> 16)
2697 #define PHY_ANALOG_PLLCLKMODA2_PLLATB_SET(x) (((x) << 16) & 0x00030000)
2698 #define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_MSB 18
2699 #define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_LSB 18
2700 #define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_MASK 0x00040000
2701 #define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_GET(x) (((x) & 0x00040000) >> 18)
2702 #define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_SET(x) (((x) << 18) & 0x00040000)
2703 #define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_MSB 19
2704 #define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_LSB 19
2705 #define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_MASK 0x00080000
2706 #define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_GET(x) (((x) & 0x00080000) >> 19)
2707 #define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_SET(x) (((x) << 19) & 0x00080000)
2708 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_MSB 20
2709 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_LSB 20
2710 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_MASK 0x00100000
2711 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_GET(x) (((x) & 0x00100000) >> 20)
2712 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_SET(x) (((x) << 20) & 0x00100000)
2713 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_MSB 21
2714 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_LSB 21
2715 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_MASK 0x00200000
2716 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_GET(x) (((x) & 0x00200000) >> 21)
2717 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_SET(x) (((x) << 21) & 0x00200000)
2718 #define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_MSB 23
2719 #define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_LSB 22
2720 #define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_MASK 0x00c00000
2721 #define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_GET(x) (((x) & 0x00c00000) >> 22)
2722 #define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_SET(x) (((x) << 22) & 0x00c00000)
2723 #define PHY_ANALOG_PLLCLKMODA2_PLLICP_MSB 26
2724 #define PHY_ANALOG_PLLCLKMODA2_PLLICP_LSB 24
2725 #define PHY_ANALOG_PLLCLKMODA2_PLLICP_MASK 0x07000000
2726 #define PHY_ANALOG_PLLCLKMODA2_PLLICP_GET(x) (((x) & 0x07000000) >> 24)
2727 #define PHY_ANALOG_PLLCLKMODA2_PLLICP_SET(x) (((x) << 24) & 0x07000000)
2728 #define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_MSB 31
2729 #define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_LSB 27
2730 #define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_MASK 0xf8000000
2731 #define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_GET(x) (((x) & 0xf8000000) >> 27)
2732 #define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_SET(x) (((x) << 27) & 0xf8000000)
2734 /* macros for TOP */
2735 #define PHY_ANALOG_TOP_ADDRESS 0x00000288
2736 #define PHY_ANALOG_TOP_OFFSET 0x00000288
2737 #define PHY_ANALOG_TOP_SPARE_MSB 2
2738 #define PHY_ANALOG_TOP_SPARE_LSB 0
2739 #define PHY_ANALOG_TOP_SPARE_MASK 0x00000007
2740 #define PHY_ANALOG_TOP_SPARE_GET(x) (((x) & 0x00000007) >> 0)
2741 #define PHY_ANALOG_TOP_SPARE_SET(x) (((x) << 0) & 0x00000007)
2742 #define PHY_ANALOG_TOP_PWDBIAS_MSB 3
2743 #define PHY_ANALOG_TOP_PWDBIAS_LSB 3
2744 #define PHY_ANALOG_TOP_PWDBIAS_MASK 0x00000008
2745 #define PHY_ANALOG_TOP_PWDBIAS_GET(x) (((x) & 0x00000008) >> 3)
2746 #define PHY_ANALOG_TOP_PWDBIAS_SET(x) (((x) << 3) & 0x00000008)
2747 #define PHY_ANALOG_TOP_FLIP_XPABIAS_MSB 4
2748 #define PHY_ANALOG_TOP_FLIP_XPABIAS_LSB 4
2749 #define PHY_ANALOG_TOP_FLIP_XPABIAS_MASK 0x00000010
2750 #define PHY_ANALOG_TOP_FLIP_XPABIAS_GET(x) (((x) & 0x00000010) >> 4)
2751 #define PHY_ANALOG_TOP_FLIP_XPABIAS_SET(x) (((x) << 4) & 0x00000010)
2752 #define PHY_ANALOG_TOP_XPAON2_MSB 5
2753 #define PHY_ANALOG_TOP_XPAON2_LSB 5
2754 #define PHY_ANALOG_TOP_XPAON2_MASK 0x00000020
2755 #define PHY_ANALOG_TOP_XPAON2_GET(x) (((x) & 0x00000020) >> 5)
2756 #define PHY_ANALOG_TOP_XPAON2_SET(x) (((x) << 5) & 0x00000020)
2757 #define PHY_ANALOG_TOP_XPAON5_MSB 6
2758 #define PHY_ANALOG_TOP_XPAON5_LSB 6
2759 #define PHY_ANALOG_TOP_XPAON5_MASK 0x00000040
2760 #define PHY_ANALOG_TOP_XPAON5_GET(x) (((x) & 0x00000040) >> 6)
2761 #define PHY_ANALOG_TOP_XPAON5_SET(x) (((x) << 6) & 0x00000040)
2762 #define PHY_ANALOG_TOP_XPASHORT2GND_MSB 7
2763 #define PHY_ANALOG_TOP_XPASHORT2GND_LSB 7
2764 #define PHY_ANALOG_TOP_XPASHORT2GND_MASK 0x00000080
2765 #define PHY_ANALOG_TOP_XPASHORT2GND_GET(x) (((x) & 0x00000080) >> 7)
2766 #define PHY_ANALOG_TOP_XPASHORT2GND_SET(x) (((x) << 7) & 0x00000080)
2767 #define PHY_ANALOG_TOP_XPABIASLVL_MSB 11
2768 #define PHY_ANALOG_TOP_XPABIASLVL_LSB 8
2769 #define PHY_ANALOG_TOP_XPABIASLVL_MASK 0x00000f00
2770 #define PHY_ANALOG_TOP_XPABIASLVL_GET(x) (((x) & 0x00000f00) >> 8)
2771 #define PHY_ANALOG_TOP_XPABIASLVL_SET(x) (((x) << 8) & 0x00000f00)
2772 #define PHY_ANALOG_TOP_XPABIAS_EN_MSB 12
2773 #define PHY_ANALOG_TOP_XPABIAS_EN_LSB 12
2774 #define PHY_ANALOG_TOP_XPABIAS_EN_MASK 0x00001000
2775 #define PHY_ANALOG_TOP_XPABIAS_EN_GET(x) (((x) & 0x00001000) >> 12)
2776 #define PHY_ANALOG_TOP_XPABIAS_EN_SET(x) (((x) << 12) & 0x00001000)
2777 #define PHY_ANALOG_TOP_ATBSELECT_MSB 13
2778 #define PHY_ANALOG_TOP_ATBSELECT_LSB 13
2779 #define PHY_ANALOG_TOP_ATBSELECT_MASK 0x00002000
2780 #define PHY_ANALOG_TOP_ATBSELECT_GET(x) (((x) & 0x00002000) >> 13)
2781 #define PHY_ANALOG_TOP_ATBSELECT_SET(x) (((x) << 13) & 0x00002000)
2782 #define PHY_ANALOG_TOP_LOCAL_XPA_MSB 14
2783 #define PHY_ANALOG_TOP_LOCAL_XPA_LSB 14
2784 #define PHY_ANALOG_TOP_LOCAL_XPA_MASK 0x00004000
2785 #define PHY_ANALOG_TOP_LOCAL_XPA_GET(x) (((x) & 0x00004000) >> 14)
2786 #define PHY_ANALOG_TOP_LOCAL_XPA_SET(x) (((x) << 14) & 0x00004000)
2787 #define PHY_ANALOG_TOP_XPABIAS_BYPASS_MSB 15
2788 #define PHY_ANALOG_TOP_XPABIAS_BYPASS_LSB 15
2789 #define PHY_ANALOG_TOP_XPABIAS_BYPASS_MASK 0x00008000
2790 #define PHY_ANALOG_TOP_XPABIAS_BYPASS_GET(x) (((x) & 0x00008000) >> 15)
2791 #define PHY_ANALOG_TOP_XPABIAS_BYPASS_SET(x) (((x) << 15) & 0x00008000)
2792 #define PHY_ANALOG_TOP_TEST_PADQ_EN_MSB 16
2793 #define PHY_ANALOG_TOP_TEST_PADQ_EN_LSB 16
2794 #define PHY_ANALOG_TOP_TEST_PADQ_EN_MASK 0x00010000
2795 #define PHY_ANALOG_TOP_TEST_PADQ_EN_GET(x) (((x) & 0x00010000) >> 16)
2796 #define PHY_ANALOG_TOP_TEST_PADQ_EN_SET(x) (((x) << 16) & 0x00010000)
2797 #define PHY_ANALOG_TOP_TEST_PADI_EN_MSB 17
2798 #define PHY_ANALOG_TOP_TEST_PADI_EN_LSB 17
2799 #define PHY_ANALOG_TOP_TEST_PADI_EN_MASK 0x00020000
2800 #define PHY_ANALOG_TOP_TEST_PADI_EN_GET(x) (((x) & 0x00020000) >> 17)
2801 #define PHY_ANALOG_TOP_TEST_PADI_EN_SET(x) (((x) << 17) & 0x00020000)
2802 #define PHY_ANALOG_TOP_TESTIQ_RSEL_MSB 18
2803 #define PHY_ANALOG_TOP_TESTIQ_RSEL_LSB 18
2804 #define PHY_ANALOG_TOP_TESTIQ_RSEL_MASK 0x00040000
2805 #define PHY_ANALOG_TOP_TESTIQ_RSEL_GET(x) (((x) & 0x00040000) >> 18)
2806 #define PHY_ANALOG_TOP_TESTIQ_RSEL_SET(x) (((x) << 18) & 0x00040000)
2807 #define PHY_ANALOG_TOP_TESTIQ_BUFEN_MSB 19
2808 #define PHY_ANALOG_TOP_TESTIQ_BUFEN_LSB 19
2809 #define PHY_ANALOG_TOP_TESTIQ_BUFEN_MASK 0x00080000
2810 #define PHY_ANALOG_TOP_TESTIQ_BUFEN_GET(x) (((x) & 0x00080000) >> 19)
2811 #define PHY_ANALOG_TOP_TESTIQ_BUFEN_SET(x) (((x) << 19) & 0x00080000)
2812 #define PHY_ANALOG_TOP_PAD2GND_MSB 20
2813 #define PHY_ANALOG_TOP_PAD2GND_LSB 20
2814 #define PHY_ANALOG_TOP_PAD2GND_MASK 0x00100000
2815 #define PHY_ANALOG_TOP_PAD2GND_GET(x) (((x) & 0x00100000) >> 20)
2816 #define PHY_ANALOG_TOP_PAD2GND_SET(x) (((x) << 20) & 0x00100000)
2817 #define PHY_ANALOG_TOP_INTH2PAD_MSB 21
2818 #define PHY_ANALOG_TOP_INTH2PAD_LSB 21
2819 #define PHY_ANALOG_TOP_INTH2PAD_MASK 0x00200000
2820 #define PHY_ANALOG_TOP_INTH2PAD_GET(x) (((x) & 0x00200000) >> 21)
2821 #define PHY_ANALOG_TOP_INTH2PAD_SET(x) (((x) << 21) & 0x00200000)
2822 #define PHY_ANALOG_TOP_INTH2GND_MSB 22
2823 #define PHY_ANALOG_TOP_INTH2GND_LSB 22
2824 #define PHY_ANALOG_TOP_INTH2GND_MASK 0x00400000
2825 #define PHY_ANALOG_TOP_INTH2GND_GET(x) (((x) & 0x00400000) >> 22)
2826 #define PHY_ANALOG_TOP_INTH2GND_SET(x) (((x) << 22) & 0x00400000)
2827 #define PHY_ANALOG_TOP_INT2PAD_MSB 23
2828 #define PHY_ANALOG_TOP_INT2PAD_LSB 23
2829 #define PHY_ANALOG_TOP_INT2PAD_MASK 0x00800000
2830 #define PHY_ANALOG_TOP_INT2PAD_GET(x) (((x) & 0x00800000) >> 23)
2831 #define PHY_ANALOG_TOP_INT2PAD_SET(x) (((x) << 23) & 0x00800000)
2832 #define PHY_ANALOG_TOP_INT2GND_MSB 24
2833 #define PHY_ANALOG_TOP_INT2GND_LSB 24
2834 #define PHY_ANALOG_TOP_INT2GND_MASK 0x01000000
2835 #define PHY_ANALOG_TOP_INT2GND_GET(x) (((x) & 0x01000000) >> 24)
2836 #define PHY_ANALOG_TOP_INT2GND_SET(x) (((x) << 24) & 0x01000000)
2837 #define PHY_ANALOG_TOP_PWDPALCLK_MSB 25
2838 #define PHY_ANALOG_TOP_PWDPALCLK_LSB 25
2839 #define PHY_ANALOG_TOP_PWDPALCLK_MASK 0x02000000
2840 #define PHY_ANALOG_TOP_PWDPALCLK_GET(x) (((x) & 0x02000000) >> 25)
2841 #define PHY_ANALOG_TOP_PWDPALCLK_SET(x) (((x) << 25) & 0x02000000)
2842 #define PHY_ANALOG_TOP_INV_CLK320_ADC_MSB 26
2843 #define PHY_ANALOG_TOP_INV_CLK320_ADC_LSB 26
2844 #define PHY_ANALOG_TOP_INV_CLK320_ADC_MASK 0x04000000
2845 #define PHY_ANALOG_TOP_INV_CLK320_ADC_GET(x) (((x) & 0x04000000) >> 26)
2846 #define PHY_ANALOG_TOP_INV_CLK320_ADC_SET(x) (((x) << 26) & 0x04000000)
2847 #define PHY_ANALOG_TOP_FLIP_REFCLK40_MSB 27
2848 #define PHY_ANALOG_TOP_FLIP_REFCLK40_LSB 27
2849 #define PHY_ANALOG_TOP_FLIP_REFCLK40_MASK 0x08000000
2850 #define PHY_ANALOG_TOP_FLIP_REFCLK40_GET(x) (((x) & 0x08000000) >> 27)
2851 #define PHY_ANALOG_TOP_FLIP_REFCLK40_SET(x) (((x) << 27) & 0x08000000)
2852 #define PHY_ANALOG_TOP_FLIP_PLLCLK320_MSB 28
2853 #define PHY_ANALOG_TOP_FLIP_PLLCLK320_LSB 28
2854 #define PHY_ANALOG_TOP_FLIP_PLLCLK320_MASK 0x10000000
2855 #define PHY_ANALOG_TOP_FLIP_PLLCLK320_GET(x) (((x) & 0x10000000) >> 28)
2856 #define PHY_ANALOG_TOP_FLIP_PLLCLK320_SET(x) (((x) << 28) & 0x10000000)
2857 #define PHY_ANALOG_TOP_FLIP_PLLCLK160_MSB 29
2858 #define PHY_ANALOG_TOP_FLIP_PLLCLK160_LSB 29
2859 #define PHY_ANALOG_TOP_FLIP_PLLCLK160_MASK 0x20000000
2860 #define PHY_ANALOG_TOP_FLIP_PLLCLK160_GET(x) (((x) & 0x20000000) >> 29)
2861 #define PHY_ANALOG_TOP_FLIP_PLLCLK160_SET(x) (((x) << 29) & 0x20000000)
2862 #define PHY_ANALOG_TOP_CLK_SEL_MSB 31
2863 #define PHY_ANALOG_TOP_CLK_SEL_LSB 30
2864 #define PHY_ANALOG_TOP_CLK_SEL_MASK 0xc0000000
2865 #define PHY_ANALOG_TOP_CLK_SEL_GET(x) (((x) & 0xc0000000) >> 30)
2866 #define PHY_ANALOG_TOP_CLK_SEL_SET(x) (((x) << 30) & 0xc0000000)
2868 /* macros for THERM */
2869 #define PHY_ANALOG_THERM_ADDRESS 0x0000028c
2870 #define PHY_ANALOG_THERM_OFFSET 0x0000028c
2871 #define PHY_ANALOG_THERM_LOREG_LVL_MSB 2
2872 #define PHY_ANALOG_THERM_LOREG_LVL_LSB 0
2873 #define PHY_ANALOG_THERM_LOREG_LVL_MASK 0x00000007
2874 #define PHY_ANALOG_THERM_LOREG_LVL_GET(x) (((x) & 0x00000007) >> 0)
2875 #define PHY_ANALOG_THERM_LOREG_LVL_SET(x) (((x) << 0) & 0x00000007)
2876 #define PHY_ANALOG_THERM_RFREG_LVL_MSB 5
2877 #define PHY_ANALOG_THERM_RFREG_LVL_LSB 3
2878 #define PHY_ANALOG_THERM_RFREG_LVL_MASK 0x00000038
2879 #define PHY_ANALOG_THERM_RFREG_LVL_GET(x) (((x) & 0x00000038) >> 3)
2880 #define PHY_ANALOG_THERM_RFREG_LVL_SET(x) (((x) << 3) & 0x00000038)
2881 #define PHY_ANALOG_THERM_SAR_ADC_DONE_MSB 6
2882 #define PHY_ANALOG_THERM_SAR_ADC_DONE_LSB 6
2883 #define PHY_ANALOG_THERM_SAR_ADC_DONE_MASK 0x00000040
2884 #define PHY_ANALOG_THERM_SAR_ADC_DONE_GET(x) (((x) & 0x00000040) >> 6)
2885 #define PHY_ANALOG_THERM_SAR_ADC_OUT_MSB 14
2886 #define PHY_ANALOG_THERM_SAR_ADC_OUT_LSB 7
2887 #define PHY_ANALOG_THERM_SAR_ADC_OUT_MASK 0x00007f80
2888 #define PHY_ANALOG_THERM_SAR_ADC_OUT_GET(x) (((x) & 0x00007f80) >> 7)
2889 #define PHY_ANALOG_THERM_SAR_DACTEST_CODE_MSB 22
2890 #define PHY_ANALOG_THERM_SAR_DACTEST_CODE_LSB 15
2891 #define PHY_ANALOG_THERM_SAR_DACTEST_CODE_MASK 0x007f8000
2892 #define PHY_ANALOG_THERM_SAR_DACTEST_CODE_GET(x) (((x) & 0x007f8000) >> 15)
2893 #define PHY_ANALOG_THERM_SAR_DACTEST_CODE_SET(x) (((x) << 15) & 0x007f8000)
2894 #define PHY_ANALOG_THERM_SAR_DACTEST_EN_MSB 23
2895 #define PHY_ANALOG_THERM_SAR_DACTEST_EN_LSB 23
2896 #define PHY_ANALOG_THERM_SAR_DACTEST_EN_MASK 0x00800000
2897 #define PHY_ANALOG_THERM_SAR_DACTEST_EN_GET(x) (((x) & 0x00800000) >> 23)
2898 #define PHY_ANALOG_THERM_SAR_DACTEST_EN_SET(x) (((x) << 23) & 0x00800000)
2899 #define PHY_ANALOG_THERM_SAR_ADCCAL_EN_MSB 24
2900 #define PHY_ANALOG_THERM_SAR_ADCCAL_EN_LSB 24
2901 #define PHY_ANALOG_THERM_SAR_ADCCAL_EN_MASK 0x01000000
2902 #define PHY_ANALOG_THERM_SAR_ADCCAL_EN_GET(x) (((x) & 0x01000000) >> 24)
2903 #define PHY_ANALOG_THERM_SAR_ADCCAL_EN_SET(x) (((x) << 24) & 0x01000000)
2904 #define PHY_ANALOG_THERM_THERMSEL_MSB 26
2905 #define PHY_ANALOG_THERM_THERMSEL_LSB 25
2906 #define PHY_ANALOG_THERM_THERMSEL_MASK 0x06000000
2907 #define PHY_ANALOG_THERM_THERMSEL_GET(x) (((x) & 0x06000000) >> 25)
2908 #define PHY_ANALOG_THERM_THERMSEL_SET(x) (((x) << 25) & 0x06000000)
2909 #define PHY_ANALOG_THERM_SAR_SLOW_EN_MSB 27
2910 #define PHY_ANALOG_THERM_SAR_SLOW_EN_LSB 27
2911 #define PHY_ANALOG_THERM_SAR_SLOW_EN_MASK 0x08000000
2912 #define PHY_ANALOG_THERM_SAR_SLOW_EN_GET(x) (((x) & 0x08000000) >> 27)
2913 #define PHY_ANALOG_THERM_SAR_SLOW_EN_SET(x) (((x) << 27) & 0x08000000)
2914 #define PHY_ANALOG_THERM_THERMSTART_MSB 28
2915 #define PHY_ANALOG_THERM_THERMSTART_LSB 28
2916 #define PHY_ANALOG_THERM_THERMSTART_MASK 0x10000000
2917 #define PHY_ANALOG_THERM_THERMSTART_GET(x) (((x) & 0x10000000) >> 28)
2918 #define PHY_ANALOG_THERM_THERMSTART_SET(x) (((x) << 28) & 0x10000000)
2919 #define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_MSB 29
2920 #define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_LSB 29
2921 #define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_MASK 0x20000000
2922 #define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_GET(x) (((x) & 0x20000000) >> 29)
2923 #define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_SET(x) (((x) << 29) & 0x20000000)
2924 #define PHY_ANALOG_THERM_THERMON_MSB 30
2925 #define PHY_ANALOG_THERM_THERMON_LSB 30
2926 #define PHY_ANALOG_THERM_THERMON_MASK 0x40000000
2927 #define PHY_ANALOG_THERM_THERMON_GET(x) (((x) & 0x40000000) >> 30)
2928 #define PHY_ANALOG_THERM_THERMON_SET(x) (((x) << 30) & 0x40000000)
2929 #define PHY_ANALOG_THERM_LOCAL_THERM_MSB 31
2930 #define PHY_ANALOG_THERM_LOCAL_THERM_LSB 31
2931 #define PHY_ANALOG_THERM_LOCAL_THERM_MASK 0x80000000
2932 #define PHY_ANALOG_THERM_LOCAL_THERM_GET(x) (((x) & 0x80000000) >> 31)
2933 #define PHY_ANALOG_THERM_LOCAL_THERM_SET(x) (((x) << 31) & 0x80000000)
2935 /* macros for XTAL */
2936 #define PHY_ANALOG_XTAL_ADDRESS 0x00000290
2937 #define PHY_ANALOG_XTAL_OFFSET 0x00000290
2938 #define PHY_ANALOG_XTAL_SPARE_MSB 5
2939 #define PHY_ANALOG_XTAL_SPARE_LSB 0
2940 #define PHY_ANALOG_XTAL_SPARE_MASK 0x0000003f
2941 #define PHY_ANALOG_XTAL_SPARE_GET(x) (((x) & 0x0000003f) >> 0)
2942 #define PHY_ANALOG_XTAL_SPARE_SET(x) (((x) << 0) & 0x0000003f)
2943 #define PHY_ANALOG_XTAL_XTAL_NOTCXODET_MSB 6
2944 #define PHY_ANALOG_XTAL_XTAL_NOTCXODET_LSB 6
2945 #define PHY_ANALOG_XTAL_XTAL_NOTCXODET_MASK 0x00000040
2946 #define PHY_ANALOG_XTAL_XTAL_NOTCXODET_GET(x) (((x) & 0x00000040) >> 6)
2947 #define PHY_ANALOG_XTAL_XTAL_NOTCXODET_SET(x) (((x) << 6) & 0x00000040)
2948 #define PHY_ANALOG_XTAL_LOCALBIAS2X_MSB 7
2949 #define PHY_ANALOG_XTAL_LOCALBIAS2X_LSB 7
2950 #define PHY_ANALOG_XTAL_LOCALBIAS2X_MASK 0x00000080
2951 #define PHY_ANALOG_XTAL_LOCALBIAS2X_GET(x) (((x) & 0x00000080) >> 7)
2952 #define PHY_ANALOG_XTAL_LOCALBIAS2X_SET(x) (((x) << 7) & 0x00000080)
2953 #define PHY_ANALOG_XTAL_LOCAL_XTAL_MSB 8
2954 #define PHY_ANALOG_XTAL_LOCAL_XTAL_LSB 8
2955 #define PHY_ANALOG_XTAL_LOCAL_XTAL_MASK 0x00000100
2956 #define PHY_ANALOG_XTAL_LOCAL_XTAL_GET(x) (((x) & 0x00000100) >> 8)
2957 #define PHY_ANALOG_XTAL_LOCAL_XTAL_SET(x) (((x) << 8) & 0x00000100)
2958 #define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_MSB 9
2959 #define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_LSB 9
2960 #define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_MASK 0x00000200
2961 #define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_GET(x) (((x) & 0x00000200) >> 9)
2962 #define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_SET(x) (((x) << 9) & 0x00000200)
2963 #define PHY_ANALOG_XTAL_XTAL_OSCON_MSB 10
2964 #define PHY_ANALOG_XTAL_XTAL_OSCON_LSB 10
2965 #define PHY_ANALOG_XTAL_XTAL_OSCON_MASK 0x00000400
2966 #define PHY_ANALOG_XTAL_XTAL_OSCON_GET(x) (((x) & 0x00000400) >> 10)
2967 #define PHY_ANALOG_XTAL_XTAL_OSCON_SET(x) (((x) << 10) & 0x00000400)
2968 #define PHY_ANALOG_XTAL_XTAL_PWDCLKD_MSB 11
2969 #define PHY_ANALOG_XTAL_XTAL_PWDCLKD_LSB 11
2970 #define PHY_ANALOG_XTAL_XTAL_PWDCLKD_MASK 0x00000800
2971 #define PHY_ANALOG_XTAL_XTAL_PWDCLKD_GET(x) (((x) & 0x00000800) >> 11)
2972 #define PHY_ANALOG_XTAL_XTAL_PWDCLKD_SET(x) (((x) << 11) & 0x00000800)
2973 #define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_MSB 12
2974 #define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_LSB 12
2975 #define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_MASK 0x00001000
2976 #define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_GET(x) (((x) & 0x00001000) >> 12)
2977 #define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_SET(x) (((x) << 12) & 0x00001000)
2978 #define PHY_ANALOG_XTAL_XTAL_SHRTXIN_MSB 13
2979 #define PHY_ANALOG_XTAL_XTAL_SHRTXIN_LSB 13
2980 #define PHY_ANALOG_XTAL_XTAL_SHRTXIN_MASK 0x00002000
2981 #define PHY_ANALOG_XTAL_XTAL_SHRTXIN_GET(x) (((x) & 0x00002000) >> 13)
2982 #define PHY_ANALOG_XTAL_XTAL_SHRTXIN_SET(x) (((x) << 13) & 0x00002000)
2983 #define PHY_ANALOG_XTAL_XTAL_DRVSTR_MSB 15
2984 #define PHY_ANALOG_XTAL_XTAL_DRVSTR_LSB 14
2985 #define PHY_ANALOG_XTAL_XTAL_DRVSTR_MASK 0x0000c000
2986 #define PHY_ANALOG_XTAL_XTAL_DRVSTR_GET(x) (((x) & 0x0000c000) >> 14)
2987 #define PHY_ANALOG_XTAL_XTAL_DRVSTR_SET(x) (((x) << 14) & 0x0000c000)
2988 #define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_MSB 22
2989 #define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_LSB 16
2990 #define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_MASK 0x007f0000
2991 #define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_GET(x) (((x) & 0x007f0000) >> 16)
2992 #define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_SET(x) (((x) << 16) & 0x007f0000)
2993 #define PHY_ANALOG_XTAL_XTAL_CAPINDAC_MSB 29
2994 #define PHY_ANALOG_XTAL_XTAL_CAPINDAC_LSB 23
2995 #define PHY_ANALOG_XTAL_XTAL_CAPINDAC_MASK 0x3f800000
2996 #define PHY_ANALOG_XTAL_XTAL_CAPINDAC_GET(x) (((x) & 0x3f800000) >> 23)
2997 #define PHY_ANALOG_XTAL_XTAL_CAPINDAC_SET(x) (((x) << 23) & 0x3f800000)
2998 #define PHY_ANALOG_XTAL_XTAL_BIAS2X_MSB 30
2999 #define PHY_ANALOG_XTAL_XTAL_BIAS2X_LSB 30
3000 #define PHY_ANALOG_XTAL_XTAL_BIAS2X_MASK 0x40000000
3001 #define PHY_ANALOG_XTAL_XTAL_BIAS2X_GET(x) (((x) & 0x40000000) >> 30)
3002 #define PHY_ANALOG_XTAL_XTAL_BIAS2X_SET(x) (((x) << 30) & 0x40000000)
3003 #define PHY_ANALOG_XTAL_TCXODET_MSB 31
3004 #define PHY_ANALOG_XTAL_TCXODET_LSB 31
3005 #define PHY_ANALOG_XTAL_TCXODET_MASK 0x80000000
3006 #define PHY_ANALOG_XTAL_TCXODET_GET(x) (((x) & 0x80000000) >> 31)
3008 /* macros for rbist_cntrl */
3009 #define PHY_ANALOG_RBIST_CNTRL_ADDRESS 0x00000380
3010 #define PHY_ANALOG_RBIST_CNTRL_OFFSET 0x00000380
3011 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_MSB 0
3012 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_LSB 0
3013 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_MASK 0x00000001
3014 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_GET(x) (((x) & 0x00000001) >> 0)
3015 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_SET(x) (((x) << 0) & 0x00000001)
3016 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_MSB 1
3017 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_LSB 1
3018 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_MASK 0x00000002
3019 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_GET(x) (((x) & 0x00000002) >> 1)
3020 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_SET(x) (((x) << 1) & 0x00000002)
3021 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_MSB 2
3022 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_LSB 2
3023 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_MASK 0x00000004
3024 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_GET(x) (((x) & 0x00000004) >> 2)
3025 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_SET(x) (((x) << 2) & 0x00000004)
3026 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_MSB 3
3027 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_LSB 3
3028 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_MASK 0x00000008
3029 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_GET(x) (((x) & 0x00000008) >> 3)
3030 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_SET(x) (((x) << 3) & 0x00000008)
3031 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_MSB 4
3032 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_LSB 4
3033 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_MASK 0x00000010
3034 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_GET(x) (((x) & 0x00000010) >> 4)
3035 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_SET(x) (((x) << 4) & 0x00000010)
3036 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_MSB 5
3037 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_LSB 5
3038 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_MASK 0x00000020
3039 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_GET(x) (((x) & 0x00000020) >> 5)
3040 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_SET(x) (((x) << 5) & 0x00000020)
3041 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_MSB 6
3042 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_LSB 6
3043 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_MASK 0x00000040
3044 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_GET(x) (((x) & 0x00000040) >> 6)
3045 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_SET(x) (((x) << 6) & 0x00000040)
3046 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_MSB 7
3047 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_LSB 7
3048 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_MASK 0x00000080
3049 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_GET(x) (((x) & 0x00000080) >> 7)
3050 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_SET(x) (((x) << 7) & 0x00000080)
3051 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_MSB 8
3052 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_LSB 8
3053 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_MASK 0x00000100
3054 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_GET(x) (((x) & 0x00000100) >> 8)
3055 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_SET(x) (((x) << 8) & 0x00000100)
3056 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_MSB 9
3057 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_LSB 9
3058 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_MASK 0x00000200
3059 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_GET(x) (((x) & 0x00000200) >> 9)
3060 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_SET(x) (((x) << 9) & 0x00000200)
3061 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_MSB 10
3062 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_LSB 10
3063 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_MASK 0x00000400
3064 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_GET(x) (((x) & 0x00000400) >> 10)
3065 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_SET(x) (((x) << 10) & 0x00000400)
3066 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_MSB 11
3067 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_LSB 11
3068 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_MASK 0x00000800
3069 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_GET(x) (((x) & 0x00000800) >> 11)
3070 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_SET(x) (((x) << 11) & 0x00000800)
3071 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_MSB 12
3072 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_LSB 12
3073 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_MASK 0x00001000
3074 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_GET(x) (((x) & 0x00001000) >> 12)
3075 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_SET(x) (((x) << 12) & 0x00001000)
3076 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_MSB 13
3077 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_LSB 13
3078 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_MASK 0x00002000
3079 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_GET(x) (((x) & 0x00002000) >> 13)
3080 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_SET(x) (((x) << 13) & 0x00002000)
3081 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_MSB 14
3082 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_LSB 14
3083 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_MASK 0x00004000
3084 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_GET(x) (((x) & 0x00004000) >> 14)
3085 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_SET(x) (((x) << 14) & 0x00004000)
3086 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_MSB 15
3087 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_LSB 15
3088 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_MASK 0x00008000
3089 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_GET(x) (((x) & 0x00008000) >> 15)
3090 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_SET(x) (((x) << 15) & 0x00008000)
3091 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_MSB 16
3092 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_LSB 16
3093 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_MASK 0x00010000
3094 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_GET(x) (((x) & 0x00010000) >> 16)
3095 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_SET(x) (((x) << 16) & 0x00010000)
3096 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_MSB 17
3097 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_LSB 17
3098 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_MASK 0x00020000
3099 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_GET(x) (((x) & 0x00020000) >> 17)
3100 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_SET(x) (((x) << 17) & 0x00020000)
3102 /* macros for tx_dc_offset */
3103 #define PHY_ANALOG_TX_DC_OFFSET_ADDRESS 0x00000384
3104 #define PHY_ANALOG_TX_DC_OFFSET_OFFSET 0x00000384
3105 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_MSB 10
3106 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_LSB 0
3107 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_MASK 0x000007ff
3108 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_GET(x) (((x) & 0x000007ff) >> 0)
3109 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_SET(x) (((x) << 0) & 0x000007ff)
3110 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_MSB 26
3111 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_LSB 16
3112 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_MASK 0x07ff0000
3113 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_GET(x) (((x) & 0x07ff0000) >> 16)
3114 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_SET(x) (((x) << 16) & 0x07ff0000)
3116 /* macros for tx_tonegen0 */
3117 #define PHY_ANALOG_TX_TONEGEN0_ADDRESS 0x00000388
3118 #define PHY_ANALOG_TX_TONEGEN0_OFFSET 0x00000388
3119 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_MSB 6
3120 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_LSB 0
3121 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_MASK 0x0000007f
3122 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_GET(x) (((x) & 0x0000007f) >> 0)
3123 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_SET(x) (((x) << 0) & 0x0000007f)
3124 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_MSB 11
3125 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_LSB 8
3126 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_MASK 0x00000f00
3127 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_GET(x) (((x) & 0x00000f00) >> 8)
3128 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_SET(x) (((x) << 8) & 0x00000f00)
3129 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_MSB 23
3130 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_LSB 16
3131 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_MASK 0x00ff0000
3132 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_GET(x) (((x) & 0x00ff0000) >> 16)
3133 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_SET(x) (((x) << 16) & 0x00ff0000)
3134 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_MSB 30
3135 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_LSB 24
3136 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_MASK 0x7f000000
3137 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_GET(x) (((x) & 0x7f000000) >> 24)
3138 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_SET(x) (((x) << 24) & 0x7f000000)
3140 /* macros for tx_tonegen1 */
3141 #define PHY_ANALOG_TX_TONEGEN1_ADDRESS 0x0000038c
3142 #define PHY_ANALOG_TX_TONEGEN1_OFFSET 0x0000038c
3143 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_MSB 6
3144 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_LSB 0
3145 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_MASK 0x0000007f
3146 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_GET(x) (((x) & 0x0000007f) >> 0)
3147 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_SET(x) (((x) << 0) & 0x0000007f)
3148 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_MSB 11
3149 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_LSB 8
3150 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_MASK 0x00000f00
3151 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_GET(x) (((x) & 0x00000f00) >> 8)
3152 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_SET(x) (((x) << 8) & 0x00000f00)
3153 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_MSB 23
3154 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_LSB 16
3155 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_MASK 0x00ff0000
3156 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_GET(x) (((x) & 0x00ff0000) >> 16)
3157 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_SET(x) (((x) << 16) & 0x00ff0000)
3158 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_MSB 30
3159 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_LSB 24
3160 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_MASK 0x7f000000
3161 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_GET(x) (((x) & 0x7f000000) >> 24)
3162 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_SET(x) (((x) << 24) & 0x7f000000)
3164 /* macros for tx_lftonegen0 */
3165 #define PHY_ANALOG_TX_LFTONEGEN0_ADDRESS 0x00000390
3166 #define PHY_ANALOG_TX_LFTONEGEN0_OFFSET 0x00000390
3167 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_MSB 6
3168 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_LSB 0
3169 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_MASK 0x0000007f
3170 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_GET(x) (((x) & 0x0000007f) >> 0)
3171 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_SET(x) (((x) << 0) & 0x0000007f)
3172 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_MSB 11
3173 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_LSB 8
3174 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_MASK 0x00000f00
3175 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_GET(x) (((x) & 0x00000f00) >> 8)
3176 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_SET(x) (((x) << 8) & 0x00000f00)
3177 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_MSB 23
3178 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_LSB 16
3179 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_MASK 0x00ff0000
3180 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_GET(x) (((x) & 0x00ff0000) >> 16)
3181 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_SET(x) (((x) << 16) & 0x00ff0000)
3182 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_MSB 30
3183 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_LSB 24
3184 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_MASK 0x7f000000
3185 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_GET(x) (((x) & 0x7f000000) >> 24)
3186 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_SET(x) (((x) << 24) & 0x7f000000)
3188 /* macros for tx_linear_ramp_i */
3189 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ADDRESS 0x00000394
3190 #define PHY_ANALOG_TX_LINEAR_RAMP_I_OFFSET 0x00000394
3191 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_MSB 10
3192 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_LSB 0
3193 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_MASK 0x000007ff
3194 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_GET(x) (((x) & 0x000007ff) >> 0)
3195 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_SET(x) (((x) << 0) & 0x000007ff)
3196 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_MSB 21
3197 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_LSB 12
3198 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_MASK 0x003ff000
3199 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_GET(x) (((x) & 0x003ff000) >> 12)
3200 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_SET(x) (((x) << 12) & 0x003ff000)
3201 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_MSB 29
3202 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_LSB 24
3203 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_MASK 0x3f000000
3204 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_GET(x) (((x) & 0x3f000000) >> 24)
3205 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_SET(x) (((x) << 24) & 0x3f000000)
3207 /* macros for tx_linear_ramp_q */
3208 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ADDRESS 0x00000398
3209 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_OFFSET 0x00000398
3210 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_MSB 10
3211 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_LSB 0
3212 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_MASK 0x000007ff
3213 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_GET(x) (((x) & 0x000007ff) >> 0)
3214 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_SET(x) (((x) << 0) & 0x000007ff)
3215 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_MSB 21
3216 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_LSB 12
3217 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_MASK 0x003ff000
3218 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_GET(x) (((x) & 0x003ff000) >> 12)
3219 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_SET(x) (((x) << 12) & 0x003ff000)
3220 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_MSB 29
3221 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_LSB 24
3222 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_MASK 0x3f000000
3223 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_GET(x) (((x) & 0x3f000000) >> 24)
3224 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_SET(x) (((x) << 24) & 0x3f000000)
3226 /* macros for tx_prbs_mag */
3227 #define PHY_ANALOG_TX_PRBS_MAG_ADDRESS 0x0000039c
3228 #define PHY_ANALOG_TX_PRBS_MAG_OFFSET 0x0000039c
3229 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_MSB 9
3230 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_LSB 0
3231 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_MASK 0x000003ff
3232 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_GET(x) (((x) & 0x000003ff) >> 0)
3233 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_SET(x) (((x) << 0) & 0x000003ff)
3234 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_MSB 25
3235 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_LSB 16
3236 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_MASK 0x03ff0000
3237 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_GET(x) (((x) & 0x03ff0000) >> 16)
3238 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_SET(x) (((x) << 16) & 0x03ff0000)
3240 /* macros for tx_prbs_seed_i */
3241 #define PHY_ANALOG_TX_PRBS_SEED_I_ADDRESS 0x000003a0
3242 #define PHY_ANALOG_TX_PRBS_SEED_I_OFFSET 0x000003a0
3243 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_MSB 30
3244 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_LSB 0
3245 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_MASK 0x7fffffff
3246 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_GET(x) (((x) & 0x7fffffff) >> 0)
3247 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_SET(x) (((x) << 0) & 0x7fffffff)
3249 /* macros for tx_prbs_seed_q */
3250 #define PHY_ANALOG_TX_PRBS_SEED_Q_ADDRESS 0x000003a4
3251 #define PHY_ANALOG_TX_PRBS_SEED_Q_OFFSET 0x000003a4
3252 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_MSB 30
3253 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_LSB 0
3254 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_MASK 0x7fffffff
3255 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_GET(x) (((x) & 0x7fffffff) >> 0)
3256 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_SET(x) (((x) << 0) & 0x7fffffff)
3258 /* macros for cmac_dc_cancel */
3259 #define PHY_ANALOG_CMAC_DC_CANCEL_ADDRESS 0x000003a8
3260 #define PHY_ANALOG_CMAC_DC_CANCEL_OFFSET 0x000003a8
3261 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_MSB 9
3262 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_LSB 0
3263 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_MASK 0x000003ff
3264 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_GET(x) (((x) & 0x000003ff) >> 0)
3265 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_SET(x) (((x) << 0) & 0x000003ff)
3266 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_MSB 25
3267 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_LSB 16
3268 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_MASK 0x03ff0000
3269 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_GET(x) (((x) & 0x03ff0000) >> 16)
3270 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_SET(x) (((x) << 16) & 0x03ff0000)
3272 /* macros for cmac_dc_offset */
3273 #define PHY_ANALOG_CMAC_DC_OFFSET_ADDRESS 0x000003ac
3274 #define PHY_ANALOG_CMAC_DC_OFFSET_OFFSET 0x000003ac
3275 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_MSB 3
3276 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_LSB 0
3277 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_MASK 0x0000000f
3278 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
3279 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
3281 /* macros for cmac_corr */
3282 #define PHY_ANALOG_CMAC_CORR_ADDRESS 0x000003b0
3283 #define PHY_ANALOG_CMAC_CORR_OFFSET 0x000003b0
3284 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_MSB 4
3285 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_LSB 0
3286 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_MASK 0x0000001f
3287 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_GET(x) (((x) & 0x0000001f) >> 0)
3288 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_SET(x) (((x) << 0) & 0x0000001f)
3289 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_MSB 13
3290 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_LSB 8
3291 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_MASK 0x00003f00
3292 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_GET(x) (((x) & 0x00003f00) >> 8)
3293 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_SET(x) (((x) << 8) & 0x00003f00)
3295 /* macros for cmac_power */
3296 #define PHY_ANALOG_CMAC_POWER_ADDRESS 0x000003b4
3297 #define PHY_ANALOG_CMAC_POWER_OFFSET 0x000003b4
3298 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_MSB 3
3299 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_LSB 0
3300 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_MASK 0x0000000f
3301 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
3302 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
3304 /* macros for cmac_cross_corr */
3305 #define PHY_ANALOG_CMAC_CROSS_CORR_ADDRESS 0x000003b8
3306 #define PHY_ANALOG_CMAC_CROSS_CORR_OFFSET 0x000003b8
3307 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_MSB 3
3308 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_LSB 0
3309 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_MASK 0x0000000f
3310 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
3311 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
3313 /* macros for cmac_i2q2 */
3314 #define PHY_ANALOG_CMAC_I2Q2_ADDRESS 0x000003bc
3315 #define PHY_ANALOG_CMAC_I2Q2_OFFSET 0x000003bc
3316 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_MSB 3
3317 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_LSB 0
3318 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_MASK 0x0000000f
3319 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
3320 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
3322 /* macros for cmac_power_hpf */
3323 #define PHY_ANALOG_CMAC_POWER_HPF_ADDRESS 0x000003c0
3324 #define PHY_ANALOG_CMAC_POWER_HPF_OFFSET 0x000003c0
3325 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_MSB 3
3326 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_LSB 0
3327 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_MASK 0x0000000f
3328 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
3329 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
3330 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_MSB 7
3331 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_LSB 4
3332 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_MASK 0x000000f0
3333 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_GET(x) (((x) & 0x000000f0) >> 4)
3334 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_SET(x) (((x) << 4) & 0x000000f0)
3336 /* macros for rxdac_set1 */
3337 #define PHY_ANALOG_RXDAC_SET1_ADDRESS 0x000003c4
3338 #define PHY_ANALOG_RXDAC_SET1_OFFSET 0x000003c4
3339 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_MSB 1
3340 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_LSB 0
3341 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_MASK 0x00000003
3342 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_GET(x) (((x) & 0x00000003) >> 0)
3343 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_SET(x) (((x) << 0) & 0x00000003)
3344 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_MSB 4
3345 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_LSB 4
3346 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_MASK 0x00000010
3347 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_GET(x) (((x) & 0x00000010) >> 4)
3348 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_SET(x) (((x) << 4) & 0x00000010)
3349 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_MSB 13
3350 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_LSB 8
3351 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_MASK 0x00003f00
3352 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_GET(x) (((x) & 0x00003f00) >> 8)
3353 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_SET(x) (((x) << 8) & 0x00003f00)
3354 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_MSB 19
3355 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_LSB 16
3356 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_MASK 0x000f0000
3357 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_GET(x) (((x) & 0x000f0000) >> 16)
3358 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_SET(x) (((x) << 16) & 0x000f0000)
3360 /* macros for rxdac_set2 */
3361 #define PHY_ANALOG_RXDAC_SET2_ADDRESS 0x000003c8
3362 #define PHY_ANALOG_RXDAC_SET2_OFFSET 0x000003c8
3363 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_MSB 4
3364 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_LSB 0
3365 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_MASK 0x0000001f
3366 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_GET(x) (((x) & 0x0000001f) >> 0)
3367 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_SET(x) (((x) << 0) & 0x0000001f)
3368 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_MSB 12
3369 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_LSB 8
3370 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_MASK 0x00001f00
3371 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_GET(x) (((x) & 0x00001f00) >> 8)
3372 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_SET(x) (((x) << 8) & 0x00001f00)
3373 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_MSB 20
3374 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_LSB 16
3375 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_MASK 0x001f0000
3376 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_GET(x) (((x) & 0x001f0000) >> 16)
3377 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_SET(x) (((x) << 16) & 0x001f0000)
3378 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_MSB 28
3379 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_LSB 24
3380 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_MASK 0x1f000000
3381 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_GET(x) (((x) & 0x1f000000) >> 24)
3382 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_SET(x) (((x) << 24) & 0x1f000000)
3384 /* macros for rxdac_long_shift */
3385 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ADDRESS 0x000003cc
3386 #define PHY_ANALOG_RXDAC_LONG_SHIFT_OFFSET 0x000003cc
3387 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_MSB 4
3388 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_LSB 0
3389 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_MASK 0x0000001f
3390 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_GET(x) (((x) & 0x0000001f) >> 0)
3391 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_SET(x) (((x) << 0) & 0x0000001f)
3392 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_MSB 12
3393 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_LSB 8
3394 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_MASK 0x00001f00
3395 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_GET(x) (((x) & 0x00001f00) >> 8)
3396 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_SET(x) (((x) << 8) & 0x00001f00)
3398 /* macros for cmac_results_i */
3399 #define PHY_ANALOG_CMAC_RESULTS_I_ADDRESS 0x000003d0
3400 #define PHY_ANALOG_CMAC_RESULTS_I_OFFSET 0x000003d0
3401 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_MSB 31
3402 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_LSB 0
3403 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_MASK 0xffffffff
3404 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_GET(x) (((x) & 0xffffffff) >> 0)
3405 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_SET(x) (((x) << 0) & 0xffffffff)
3407 /* macros for cmac_results_q */
3408 #define PHY_ANALOG_CMAC_RESULTS_Q_ADDRESS 0x000003d4
3409 #define PHY_ANALOG_CMAC_RESULTS_Q_OFFSET 0x000003d4
3410 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_MSB 31
3411 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_LSB 0
3412 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_MASK 0xffffffff
3413 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_GET(x) (((x) & 0xffffffff) >> 0)
3414 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_SET(x) (((x) << 0) & 0xffffffff)
3416 /* macros for PMU1 */
3417 #define PHY_ANALOG_PMU1_ADDRESS 0x00000740
3418 #define PHY_ANALOG_PMU1_OFFSET 0x00000740
3419 #define PHY_ANALOG_PMU1_SPARE_MSB 10
3420 #define PHY_ANALOG_PMU1_SPARE_LSB 0
3421 #define PHY_ANALOG_PMU1_SPARE_MASK 0x000007ff
3422 #define PHY_ANALOG_PMU1_SPARE_GET(x) (((x) & 0x000007ff) >> 0)
3423 #define PHY_ANALOG_PMU1_SPARE_SET(x) (((x) << 0) & 0x000007ff)
3424 #define PHY_ANALOG_PMU1_OTP_V25_PWD_MSB 11
3425 #define PHY_ANALOG_PMU1_OTP_V25_PWD_LSB 11
3426 #define PHY_ANALOG_PMU1_OTP_V25_PWD_MASK 0x00000800
3427 #define PHY_ANALOG_PMU1_OTP_V25_PWD_GET(x) (((x) & 0x00000800) >> 11)
3428 #define PHY_ANALOG_PMU1_OTP_V25_PWD_SET(x) (((x) << 11) & 0x00000800)
3429 #define PHY_ANALOG_PMU1_PAREGON_MAN_MSB 12
3430 #define PHY_ANALOG_PMU1_PAREGON_MAN_LSB 12
3431 #define PHY_ANALOG_PMU1_PAREGON_MAN_MASK 0x00001000
3432 #define PHY_ANALOG_PMU1_PAREGON_MAN_GET(x) (((x) & 0x00001000) >> 12)
3433 #define PHY_ANALOG_PMU1_PAREGON_MAN_SET(x) (((x) << 12) & 0x00001000)
3434 #define PHY_ANALOG_PMU1_OTPREGON_MAN_MSB 13
3435 #define PHY_ANALOG_PMU1_OTPREGON_MAN_LSB 13
3436 #define PHY_ANALOG_PMU1_OTPREGON_MAN_MASK 0x00002000
3437 #define PHY_ANALOG_PMU1_OTPREGON_MAN_GET(x) (((x) & 0x00002000) >> 13)
3438 #define PHY_ANALOG_PMU1_OTPREGON_MAN_SET(x) (((x) << 13) & 0x00002000)
3439 #define PHY_ANALOG_PMU1_DREGON_MAN_MSB 14
3440 #define PHY_ANALOG_PMU1_DREGON_MAN_LSB 14
3441 #define PHY_ANALOG_PMU1_DREGON_MAN_MASK 0x00004000
3442 #define PHY_ANALOG_PMU1_DREGON_MAN_GET(x) (((x) & 0x00004000) >> 14)
3443 #define PHY_ANALOG_PMU1_DREGON_MAN_SET(x) (((x) << 14) & 0x00004000)
3444 #define PHY_ANALOG_PMU1_DISCONTMODEEN_MSB 15
3445 #define PHY_ANALOG_PMU1_DISCONTMODEEN_LSB 15
3446 #define PHY_ANALOG_PMU1_DISCONTMODEEN_MASK 0x00008000
3447 #define PHY_ANALOG_PMU1_DISCONTMODEEN_GET(x) (((x) & 0x00008000) >> 15)
3448 #define PHY_ANALOG_PMU1_DISCONTMODEEN_SET(x) (((x) << 15) & 0x00008000)
3449 #define PHY_ANALOG_PMU1_SWREGON_MAN_MSB 16
3450 #define PHY_ANALOG_PMU1_SWREGON_MAN_LSB 16
3451 #define PHY_ANALOG_PMU1_SWREGON_MAN_MASK 0x00010000
3452 #define PHY_ANALOG_PMU1_SWREGON_MAN_GET(x) (((x) & 0x00010000) >> 16)
3453 #define PHY_ANALOG_PMU1_SWREGON_MAN_SET(x) (((x) << 16) & 0x00010000)
3454 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_MSB 18
3455 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_LSB 17
3456 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_MASK 0x00060000
3457 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_GET(x) (((x) & 0x00060000) >> 17)
3458 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_SET(x) (((x) << 17) & 0x00060000)
3459 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_MSB 21
3460 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_LSB 19
3461 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_MASK 0x00380000
3462 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_GET(x) (((x) & 0x00380000) >> 19)
3463 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_SET(x) (((x) << 19) & 0x00380000)
3464 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_MSB 23
3465 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_LSB 22
3466 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_MASK 0x00c00000
3467 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_GET(x) (((x) & 0x00c00000) >> 22)
3468 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_SET(x) (((x) << 22) & 0x00c00000)
3469 #define PHY_ANALOG_PMU1_SREG_LVLCTR_MSB 25
3470 #define PHY_ANALOG_PMU1_SREG_LVLCTR_LSB 24
3471 #define PHY_ANALOG_PMU1_SREG_LVLCTR_MASK 0x03000000
3472 #define PHY_ANALOG_PMU1_SREG_LVLCTR_GET(x) (((x) & 0x03000000) >> 24)
3473 #define PHY_ANALOG_PMU1_SREG_LVLCTR_SET(x) (((x) << 24) & 0x03000000)
3474 #define PHY_ANALOG_PMU1_DREG_LVLCTR_MSB 27
3475 #define PHY_ANALOG_PMU1_DREG_LVLCTR_LSB 26
3476 #define PHY_ANALOG_PMU1_DREG_LVLCTR_MASK 0x0c000000
3477 #define PHY_ANALOG_PMU1_DREG_LVLCTR_GET(x) (((x) & 0x0c000000) >> 26)
3478 #define PHY_ANALOG_PMU1_DREG_LVLCTR_SET(x) (((x) << 26) & 0x0c000000)
3479 #define PHY_ANALOG_PMU1_PAREG_XPNP_MSB 28
3480 #define PHY_ANALOG_PMU1_PAREG_XPNP_LSB 28
3481 #define PHY_ANALOG_PMU1_PAREG_XPNP_MASK 0x10000000
3482 #define PHY_ANALOG_PMU1_PAREG_XPNP_GET(x) (((x) & 0x10000000) >> 28)
3483 #define PHY_ANALOG_PMU1_PAREG_XPNP_SET(x) (((x) << 28) & 0x10000000)
3484 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_MSB 31
3485 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_LSB 29
3486 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_MASK 0xe0000000
3487 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_GET(x) (((x) & 0xe0000000) >> 29)
3488 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_SET(x) (((x) << 29) & 0xe0000000)
3490 /* macros for PMU2 */
3491 #define PHY_ANALOG_PMU2_ADDRESS 0x00000744
3492 #define PHY_ANALOG_PMU2_OFFSET 0x00000744
3493 #define PHY_ANALOG_PMU2_SPARE_MSB 7
3494 #define PHY_ANALOG_PMU2_SPARE_LSB 0
3495 #define PHY_ANALOG_PMU2_SPARE_MASK 0x000000ff
3496 #define PHY_ANALOG_PMU2_SPARE_GET(x) (((x) & 0x000000ff) >> 0)
3497 #define PHY_ANALOG_PMU2_SPARE_SET(x) (((x) << 0) & 0x000000ff)
3498 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_MSB 8
3499 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_LSB 8
3500 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_MASK 0x00000100
3501 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_GET(x) (((x) & 0x00000100) >> 8)
3502 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_SET(x) (((x) << 8) & 0x00000100)
3503 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_MSB 9
3504 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_LSB 9
3505 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_MASK 0x00000200
3506 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_GET(x) (((x) & 0x00000200) >> 9)
3507 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_SET(x) (((x) << 9) & 0x00000200)
3508 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_MSB 10
3509 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_LSB 10
3510 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_MASK 0x00000400
3511 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_GET(x) (((x) & 0x00000400) >> 10)
3512 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_SET(x) (((x) << 10) & 0x00000400)
3513 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_MSB 11
3514 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_LSB 11
3515 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_MASK 0x00000800
3516 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_GET(x) (((x) & 0x00000800) >> 11)
3517 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_SET(x) (((x) << 11) & 0x00000800)
3518 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_MSB 12
3519 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_LSB 12
3520 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_MASK 0x00001000
3521 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_GET(x) (((x) & 0x00001000) >> 12)
3522 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_SET(x) (((x) << 12) & 0x00001000)
3523 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_MSB 13
3524 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_LSB 13
3525 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_MASK 0x00002000
3526 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_GET(x) (((x) & 0x00002000) >> 13)
3527 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_SET(x) (((x) << 13) & 0x00002000)
3528 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_MSB 14
3529 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_LSB 14
3530 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_MASK 0x00004000
3531 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_GET(x) (((x) & 0x00004000) >> 14)
3532 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_SET(x) (((x) << 14) & 0x00004000)
3533 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_MSB 15
3534 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_LSB 15
3535 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_MASK 0x00008000
3536 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_GET(x) (((x) & 0x00008000) >> 15)
3537 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_SET(x) (((x) << 15) & 0x00008000)
3538 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_MSB 16
3539 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_LSB 16
3540 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_MASK 0x00010000
3541 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_GET(x) (((x) & 0x00010000) >> 16)
3542 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_SET(x) (((x) << 16) & 0x00010000)
3543 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_MSB 18
3544 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_LSB 17
3545 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_MASK 0x00060000
3546 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_GET(x) (((x) & 0x00060000) >> 17)
3547 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_SET(x) (((x) << 17) & 0x00060000)
3548 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_MSB 19
3549 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_LSB 19
3550 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_MASK 0x00080000
3551 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_GET(x) (((x) & 0x00080000) >> 19)
3552 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_SET(x) (((x) << 19) & 0x00080000)
3553 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_MSB 21
3554 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_LSB 20
3555 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_MASK 0x00300000
3556 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_GET(x) (((x) & 0x00300000) >> 20)
3557 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_SET(x) (((x) << 20) & 0x00300000)
3558 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_MSB 22
3559 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_LSB 22
3560 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_MASK 0x00400000
3561 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_GET(x) (((x) & 0x00400000) >> 22)
3562 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_SET(x) (((x) << 22) & 0x00400000)
3563 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_MSB 24
3564 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_LSB 23
3565 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_MASK 0x01800000
3566 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_GET(x) (((x) & 0x01800000) >> 23)
3567 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_SET(x) (((x) << 23) & 0x01800000)
3568 #define PHY_ANALOG_PMU2_SWREG2ATB_MSB 27
3569 #define PHY_ANALOG_PMU2_SWREG2ATB_LSB 25
3570 #define PHY_ANALOG_PMU2_SWREG2ATB_MASK 0x0e000000
3571 #define PHY_ANALOG_PMU2_SWREG2ATB_GET(x) (((x) & 0x0e000000) >> 25)
3572 #define PHY_ANALOG_PMU2_SWREG2ATB_SET(x) (((x) << 25) & 0x0e000000)
3573 #define PHY_ANALOG_PMU2_OTPREG2ATB_MSB 28
3574 #define PHY_ANALOG_PMU2_OTPREG2ATB_LSB 28
3575 #define PHY_ANALOG_PMU2_OTPREG2ATB_MASK 0x10000000
3576 #define PHY_ANALOG_PMU2_OTPREG2ATB_GET(x) (((x) & 0x10000000) >> 28)
3577 #define PHY_ANALOG_PMU2_OTPREG2ATB_SET(x) (((x) << 28) & 0x10000000)
3578 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_MSB 30
3579 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_LSB 29
3580 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_MASK 0x60000000
3581 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_GET(x) (((x) & 0x60000000) >> 29)
3582 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_SET(x) (((x) << 29) & 0x60000000)
3583 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_MSB 31
3584 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_LSB 31
3585 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_MASK 0x80000000
3586 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_GET(x) (((x) & 0x80000000) >> 31)
3587 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_SET(x) (((x) << 31) & 0x80000000)
3590 #ifndef __ASSEMBLER__
3592 typedef struct analog_intf_athr_wlan_reg_reg_s {
3593 volatile unsigned int RXRF_BIAS1; /* 0x0 - 0x4 */
3594 volatile unsigned int RXRF_BIAS2; /* 0x4 - 0x8 */
3595 volatile unsigned int RXRF_GAINSTAGES; /* 0x8 - 0xc */
3596 volatile unsigned int RXRF_AGC; /* 0xc - 0x10 */
3597 volatile char pad__0[0x30]; /* 0x10 - 0x40 */
3598 volatile unsigned int TXRF1; /* 0x40 - 0x44 */
3599 volatile unsigned int TXRF2; /* 0x44 - 0x48 */
3600 volatile unsigned int TXRF3; /* 0x48 - 0x4c */
3601 volatile unsigned int TXRF4; /* 0x4c - 0x50 */
3602 volatile unsigned int TXRF5; /* 0x50 - 0x54 */
3603 volatile unsigned int TXRF6; /* 0x54 - 0x58 */
3604 volatile unsigned int TXRF7; /* 0x58 - 0x5c */
3605 volatile unsigned int TXRF8; /* 0x5c - 0x60 */
3606 volatile unsigned int TXRF9; /* 0x60 - 0x64 */
3607 volatile unsigned int TXRF10; /* 0x64 - 0x68 */
3608 volatile unsigned int TXRF11; /* 0x68 - 0x6c */
3609 volatile unsigned int TXRF12; /* 0x6c - 0x70 */
3610 volatile char pad__1[0x10]; /* 0x70 - 0x80 */
3611 volatile unsigned int SYNTH1; /* 0x80 - 0x84 */
3612 volatile unsigned int SYNTH2; /* 0x84 - 0x88 */
3613 volatile unsigned int SYNTH3; /* 0x88 - 0x8c */
3614 volatile unsigned int SYNTH4; /* 0x8c - 0x90 */
3615 volatile unsigned int SYNTH5; /* 0x90 - 0x94 */
3616 volatile unsigned int SYNTH6; /* 0x94 - 0x98 */
3617 volatile unsigned int SYNTH7; /* 0x98 - 0x9c */
3618 volatile unsigned int SYNTH8; /* 0x9c - 0xa0 */
3619 volatile unsigned int SYNTH9; /* 0xa0 - 0xa4 */
3620 volatile unsigned int SYNTH10; /* 0xa4 - 0xa8 */
3621 volatile unsigned int SYNTH11; /* 0xa8 - 0xac */
3622 volatile unsigned int SYNTH12; /* 0xac - 0xb0 */
3623 volatile unsigned int SYNTH13; /* 0xb0 - 0xb4 */
3624 volatile unsigned int SYNTH14; /* 0xb4 - 0xb8 */
3625 volatile char pad__2[0x8]; /* 0xb8 - 0xc0 */
3626 volatile unsigned int BIAS1; /* 0xc0 - 0xc4 */
3627 volatile unsigned int BIAS2; /* 0xc4 - 0xc8 */
3628 volatile unsigned int BIAS3; /* 0xc8 - 0xcc */
3629 volatile unsigned int BIAS4; /* 0xcc - 0xd0 */
3630 volatile char pad__3[0x30]; /* 0xd0 - 0x100 */
3631 volatile unsigned int RXTX1; /* 0x100 - 0x104 */
3632 volatile unsigned int RXTX2; /* 0x104 - 0x108 */
3633 volatile unsigned int RXTX3; /* 0x108 - 0x10c */
3634 volatile char pad__4[0x34]; /* 0x10c - 0x140 */
3635 volatile unsigned int BB1; /* 0x140 - 0x144 */
3636 volatile unsigned int BB2; /* 0x144 - 0x148 */
3637 volatile unsigned int BB3; /* 0x148 - 0x14c */
3638 volatile char pad__5[0x134]; /* 0x14c - 0x280 */
3639 volatile unsigned int PLLCLKMODA; /* 0x280 - 0x284 */
3640 volatile unsigned int PLLCLKMODA2; /* 0x284 - 0x288 */
3641 volatile unsigned int TOP; /* 0x288 - 0x28c */
3642 volatile unsigned int THERM; /* 0x28c - 0x290 */
3643 volatile unsigned int XTAL; /* 0x290 - 0x294 */
3644 volatile char pad__6[0xec]; /* 0x294 - 0x380 */
3645 volatile unsigned int rbist_cntrl; /* 0x380 - 0x384 */
3646 volatile unsigned int tx_dc_offset; /* 0x384 - 0x388 */
3647 volatile unsigned int tx_tonegen0; /* 0x388 - 0x38c */
3648 volatile unsigned int tx_tonegen1; /* 0x38c - 0x390 */
3649 volatile unsigned int tx_lftonegen0; /* 0x390 - 0x394 */
3650 volatile unsigned int tx_linear_ramp_i; /* 0x394 - 0x398 */
3651 volatile unsigned int tx_linear_ramp_q; /* 0x398 - 0x39c */
3652 volatile unsigned int tx_prbs_mag; /* 0x39c - 0x3a0 */
3653 volatile unsigned int tx_prbs_seed_i; /* 0x3a0 - 0x3a4 */
3654 volatile unsigned int tx_prbs_seed_q; /* 0x3a4 - 0x3a8 */
3655 volatile unsigned int cmac_dc_cancel; /* 0x3a8 - 0x3ac */
3656 volatile unsigned int cmac_dc_offset; /* 0x3ac - 0x3b0 */
3657 volatile unsigned int cmac_corr; /* 0x3b0 - 0x3b4 */
3658 volatile unsigned int cmac_power; /* 0x3b4 - 0x3b8 */
3659 volatile unsigned int cmac_cross_corr; /* 0x3b8 - 0x3bc */
3660 volatile unsigned int cmac_i2q2; /* 0x3bc - 0x3c0 */
3661 volatile unsigned int cmac_power_hpf; /* 0x3c0 - 0x3c4 */
3662 volatile unsigned int rxdac_set1; /* 0x3c4 - 0x3c8 */
3663 volatile unsigned int rxdac_set2; /* 0x3c8 - 0x3cc */
3664 volatile unsigned int rxdac_long_shift; /* 0x3cc - 0x3d0 */
3665 volatile unsigned int cmac_results_i; /* 0x3d0 - 0x3d4 */
3666 volatile unsigned int cmac_results_q; /* 0x3d4 - 0x3d8 */
3667 volatile char pad__7[0x368]; /* 0x3d8 - 0x740 */
3668 volatile unsigned int PMU1; /* 0x740 - 0x744 */
3669 volatile unsigned int PMU2; /* 0x744 - 0x748 */
3670 } analog_intf_athr_wlan_reg_reg_t;
3672 #endif /* __ASSEMBLER__ */
3674 #endif /* _ANALOG_INTF_ATHR_WLAN_REG_REG_H_ */
git.samba.org / sfrench / cifs-2.6.git / blob