drivers/serial/cpm_uart/cpm_uart_core.c

   1 /*
   2  *  linux/drivers/serial/cpm_uart.c
   3  *
   4  *  Driver for CPM (SCC/SMC) serial ports; core driver
   5  *
   6  *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
   7  *  Based on ppc8xx.c by Thomas Gleixner
   8  *  Based on drivers/serial/amba.c by Russell King
   9  *
  10  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
  11  *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
  12  *
  13  *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
  14  *            (C) 2004 Intracom, S.A.
  15  *            (C) 2005-2006 MontaVista Software, Inc.
  16  *              Vitaly Bordug <vbordug@ru.mvista.com>
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  31  *
  32  */
  33
  34 #include <linux/module.h>
  35 #include <linux/tty.h>
  36 #include <linux/ioport.h>
  37 #include <linux/init.h>
  38 #include <linux/serial.h>
  39 #include <linux/console.h>
  40 #include <linux/sysrq.h>
  41 #include <linux/device.h>
  42 #include <linux/bootmem.h>
  43 #include <linux/dma-mapping.h>
  44 #include <linux/fs_uart_pd.h>
  45
  46 #include <asm/io.h>
  47 #include <asm/irq.h>
  48 #include <asm/delay.h>
  49 #include <asm/fs_pd.h>
  50 #include <asm/udbg.h>
  51
  52 #ifdef CONFIG_PPC_CPM_NEW_BINDING
  53 #include <linux/of_platform.h>
  54 #endif
  55
  56 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  57 #define SUPPORT_SYSRQ
  58 #endif
  59
  60 #include <linux/serial_core.h>
  61 #include <linux/kernel.h>
  62
  63 #include "cpm_uart.h"
  64
  65
  66 /**************************************************************/
  67
  68 static int  cpm_uart_tx_pump(struct uart_port *port);
  69 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
  70 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
  71 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
  72
  73 /**************************************************************/
  74
  75 #ifndef CONFIG_PPC_CPM_NEW_BINDING
  76 /* Track which ports are configured as uarts */
  77 int cpm_uart_port_map[UART_NR];
  78 /* How many ports did we config as uarts */
  79 int cpm_uart_nr;
  80
  81 /* Place-holder for board-specific stuff */
  82 struct platform_device* __attribute__ ((weak)) __init
  83 early_uart_get_pdev(int index)
  84 {
  85         return NULL;
  86 }
  87
  88
  89 static void cpm_uart_count(void)
  90 {
  91         cpm_uart_nr = 0;
  92 #ifdef CONFIG_SERIAL_CPM_SMC1
  93         cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
  94 #endif
  95 #ifdef CONFIG_SERIAL_CPM_SMC2
  96         cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
  97 #endif
  98 #ifdef CONFIG_SERIAL_CPM_SCC1
  99         cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
 100 #endif
 101 #ifdef CONFIG_SERIAL_CPM_SCC2
 102         cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
 103 #endif
 104 #ifdef CONFIG_SERIAL_CPM_SCC3
 105         cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
 106 #endif
 107 #ifdef CONFIG_SERIAL_CPM_SCC4
 108         cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
 109 #endif
 110 }
 111
 112 /* Get UART number by its id */
 113 static int cpm_uart_id2nr(int id)
 114 {
 115         int i;
 116         if (id < UART_NR) {
 117                 for (i=0; i<UART_NR; i++) {
 118                         if (cpm_uart_port_map[i] == id)
 119                                 return i;
 120                 }
 121         }
 122
 123         /* not found or invalid argument */
 124         return -1;
 125 }
 126 #endif
 127
 128 /*
 129  * Check, if transmit buffers are processed
 130 */
 131 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
 132 {
 133         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 134         cbd_t __iomem *bdp = pinfo->tx_bd_base;
 135         int ret = 0;
 136
 137         while (1) {
 138                 if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
 139                         break;
 140
 141                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
 142                         ret = TIOCSER_TEMT;
 143                         break;
 144                 }
 145                 bdp++;
 146         }
 147
 148         pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
 149
 150         return ret;
 151 }
 152
 153 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 154 {
 155         /* Whee. Do nothing. */
 156 }
 157
 158 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
 159 {
 160         /* Whee. Do nothing. */
 161         return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
 162 }
 163
 164 /*
 165  * Stop transmitter
 166  */
 167 static void cpm_uart_stop_tx(struct uart_port *port)
 168 {
 169         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 170         smc_t __iomem *smcp = pinfo->smcp;
 171         scc_t __iomem *sccp = pinfo->sccp;
 172
 173         pr_debug("CPM uart[%d]:stop tx\n", port->line);
 174
 175         if (IS_SMC(pinfo))
 176                 clrbits8(&smcp->smc_smcm, SMCM_TX);
 177         else
 178                 clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
 179 }
 180
 181 /*
 182  * Start transmitter
 183  */
 184 static void cpm_uart_start_tx(struct uart_port *port)
 185 {
 186         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 187         smc_t __iomem *smcp = pinfo->smcp;
 188         scc_t __iomem *sccp = pinfo->sccp;
 189
 190         pr_debug("CPM uart[%d]:start tx\n", port->line);
 191
 192         if (IS_SMC(pinfo)) {
 193                 if (in_8(&smcp->smc_smcm) & SMCM_TX)
 194                         return;
 195         } else {
 196                 if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
 197                         return;
 198         }
 199
 200         if (cpm_uart_tx_pump(port) != 0) {
 201                 if (IS_SMC(pinfo)) {
 202                         setbits8(&smcp->smc_smcm, SMCM_TX);
 203                 } else {
 204                         setbits16(&sccp->scc_sccm, UART_SCCM_TX);
 205                 }
 206         }
 207 }
 208
 209 /*
 210  * Stop receiver
 211  */
 212 static void cpm_uart_stop_rx(struct uart_port *port)
 213 {
 214         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 215         smc_t __iomem *smcp = pinfo->smcp;
 216         scc_t __iomem *sccp = pinfo->sccp;
 217
 218         pr_debug("CPM uart[%d]:stop rx\n", port->line);
 219
 220         if (IS_SMC(pinfo))
 221                 clrbits8(&smcp->smc_smcm, SMCM_RX);
 222         else
 223                 clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
 224 }
 225
 226 /*
 227  * Enable Modem status interrupts
 228  */
 229 static void cpm_uart_enable_ms(struct uart_port *port)
 230 {
 231         pr_debug("CPM uart[%d]:enable ms\n", port->line);
 232 }
 233
 234 /*
 235  * Generate a break.
 236  */
 237 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
 238 {
 239         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 240
 241         pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
 242                 break_state);
 243
 244         if (break_state)
 245                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 246         else
 247                 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
 248 }
 249
 250 /*
 251  * Transmit characters, refill buffer descriptor, if possible
 252  */
 253 static void cpm_uart_int_tx(struct uart_port *port)
 254 {
 255         pr_debug("CPM uart[%d]:TX INT\n", port->line);
 256
 257         cpm_uart_tx_pump(port);
 258 }
 259
 260 /*
 261  * Receive characters
 262  */
 263 static void cpm_uart_int_rx(struct uart_port *port)
 264 {
 265         int i;
 266         unsigned char ch;
 267         u8 *cp;
 268         struct tty_struct *tty = port->info->tty;
 269         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 270         cbd_t __iomem *bdp;
 271         u16 status;
 272         unsigned int flg;
 273
 274         pr_debug("CPM uart[%d]:RX INT\n", port->line);
 275
 276         /* Just loop through the closed BDs and copy the characters into
 277          * the buffer.
 278          */
 279         bdp = pinfo->rx_cur;
 280         for (;;) {
 281                 /* get status */
 282                 status = in_be16(&bdp->cbd_sc);
 283                 /* If this one is empty, return happy */
 284                 if (status & BD_SC_EMPTY)
 285                         break;
 286
 287                 /* get number of characters, and check spce in flip-buffer */
 288                 i = in_be16(&bdp->cbd_datlen);
 289
 290                 /* If we have not enough room in tty flip buffer, then we try
 291                  * later, which will be the next rx-interrupt or a timeout
 292                  */
 293                 if(tty_buffer_request_room(tty, i) < i) {
 294                         printk(KERN_WARNING "No room in flip buffer\n");
 295                         return;
 296                 }
 297
 298                 /* get pointer */
 299                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 300
 301                 /* loop through the buffer */
 302                 while (i-- > 0) {
 303                         ch = *cp++;
 304                         port->icount.rx++;
 305                         flg = TTY_NORMAL;
 306
 307                         if (status &
 308                             (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
 309                                 goto handle_error;
 310                         if (uart_handle_sysrq_char(port, ch))
 311                                 continue;
 312
 313                       error_return:
 314                         tty_insert_flip_char(tty, ch, flg);
 315
 316                 }               /* End while (i--) */
 317
 318                 /* This BD is ready to be used again. Clear status. get next */
 319                 clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
 320                                         BD_SC_OV | BD_SC_ID);
 321                 setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
 322
 323                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 324                         bdp = pinfo->rx_bd_base;
 325                 else
 326                         bdp++;
 327
 328         } /* End for (;;) */
 329
 330         /* Write back buffer pointer */
 331         pinfo->rx_cur = bdp;
 332
 333         /* activate BH processing */
 334         tty_flip_buffer_push(tty);
 335
 336         return;
 337
 338         /* Error processing */
 339
 340       handle_error:
 341         /* Statistics */
 342         if (status & BD_SC_BR)
 343                 port->icount.brk++;
 344         if (status & BD_SC_PR)
 345                 port->icount.parity++;
 346         if (status & BD_SC_FR)
 347                 port->icount.frame++;
 348         if (status & BD_SC_OV)
 349                 port->icount.overrun++;
 350
 351         /* Mask out ignored conditions */
 352         status &= port->read_status_mask;
 353
 354         /* Handle the remaining ones */
 355         if (status & BD_SC_BR)
 356                 flg = TTY_BREAK;
 357         else if (status & BD_SC_PR)
 358                 flg = TTY_PARITY;
 359         else if (status & BD_SC_FR)
 360                 flg = TTY_FRAME;
 361
 362         /* overrun does not affect the current character ! */
 363         if (status & BD_SC_OV) {
 364                 ch = 0;
 365                 flg = TTY_OVERRUN;
 366                 /* We skip this buffer */
 367                 /* CHECK: Is really nothing senseful there */
 368                 /* ASSUMPTION: it contains nothing valid */
 369                 i = 0;
 370         }
 371 #ifdef SUPPORT_SYSRQ
 372         port->sysrq = 0;
 373 #endif
 374         goto error_return;
 375 }
 376
 377 /*
 378  * Asynchron mode interrupt handler
 379  */
 380 static irqreturn_t cpm_uart_int(int irq, void *data)
 381 {
 382         u8 events;
 383         struct uart_port *port = data;
 384         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 385         smc_t __iomem *smcp = pinfo->smcp;
 386         scc_t __iomem *sccp = pinfo->sccp;
 387
 388         pr_debug("CPM uart[%d]:IRQ\n", port->line);
 389
 390         if (IS_SMC(pinfo)) {
 391                 events = in_8(&smcp->smc_smce);
 392                 out_8(&smcp->smc_smce, events);
 393                 if (events & SMCM_BRKE)
 394                         uart_handle_break(port);
 395                 if (events & SMCM_RX)
 396                         cpm_uart_int_rx(port);
 397                 if (events & SMCM_TX)
 398                         cpm_uart_int_tx(port);
 399         } else {
 400                 events = in_be16(&sccp->scc_scce);
 401                 out_be16(&sccp->scc_scce, events);
 402                 if (events & UART_SCCM_BRKE)
 403                         uart_handle_break(port);
 404                 if (events & UART_SCCM_RX)
 405                         cpm_uart_int_rx(port);
 406                 if (events & UART_SCCM_TX)
 407                         cpm_uart_int_tx(port);
 408         }
 409         return (events) ? IRQ_HANDLED : IRQ_NONE;
 410 }
 411
 412 static int cpm_uart_startup(struct uart_port *port)
 413 {
 414         int retval;
 415         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 416
 417         pr_debug("CPM uart[%d]:startup\n", port->line);
 418
 419         /* Install interrupt handler. */
 420         retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
 421         if (retval)
 422                 return retval;
 423
 424         /* Startup rx-int */
 425         if (IS_SMC(pinfo)) {
 426                 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 427                 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
 428         } else {
 429                 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 430                 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
 431         }
 432
 433         if (!(pinfo->flags & FLAG_CONSOLE))
 434                 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 435         return 0;
 436 }
 437
 438 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
 439 {
 440         set_current_state(TASK_UNINTERRUPTIBLE);
 441         schedule_timeout(pinfo->wait_closing);
 442 }
 443
 444 /*
 445  * Shutdown the uart
 446  */
 447 static void cpm_uart_shutdown(struct uart_port *port)
 448 {
 449         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 450
 451         pr_debug("CPM uart[%d]:shutdown\n", port->line);
 452
 453         /* free interrupt handler */
 454         free_irq(port->irq, port);
 455
 456         /* If the port is not the console, disable Rx and Tx. */
 457         if (!(pinfo->flags & FLAG_CONSOLE)) {
 458                 /* Wait for all the BDs marked sent */
 459                 while(!cpm_uart_tx_empty(port)) {
 460                         set_current_state(TASK_UNINTERRUPTIBLE);
 461                         schedule_timeout(2);
 462                 }
 463
 464                 if (pinfo->wait_closing)
 465                         cpm_uart_wait_until_send(pinfo);
 466
 467                 /* Stop uarts */
 468                 if (IS_SMC(pinfo)) {
 469                         smc_t __iomem *smcp = pinfo->smcp;
 470                         clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 471                         clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
 472                 } else {
 473                         scc_t __iomem *sccp = pinfo->sccp;
 474                         clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 475                         clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 476                 }
 477
 478                 /* Shut them really down and reinit buffer descriptors */
 479                 if (IS_SMC(pinfo))
 480                         cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 481                 else
 482                         cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
 483
 484                 cpm_uart_initbd(pinfo);
 485         }
 486 }
 487
 488 static void cpm_uart_set_termios(struct uart_port *port,
 489                                  struct ktermios *termios,
 490                                  struct ktermios *old)
 491 {
 492         int baud;
 493         unsigned long flags;
 494         u16 cval, scval, prev_mode;
 495         int bits, sbits;
 496         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 497         smc_t __iomem *smcp = pinfo->smcp;
 498         scc_t __iomem *sccp = pinfo->sccp;
 499
 500         pr_debug("CPM uart[%d]:set_termios\n", port->line);
 501
 502         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 503
 504         /* Character length programmed into the mode register is the
 505          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
 506          * 1 or 2 stop bits, minus 1.
 507          * The value 'bits' counts this for us.
 508          */
 509         cval = 0;
 510         scval = 0;
 511
 512         /* byte size */
 513         switch (termios->c_cflag & CSIZE) {
 514         case CS5:
 515                 bits = 5;
 516                 break;
 517         case CS6:
 518                 bits = 6;
 519                 break;
 520         case CS7:
 521                 bits = 7;
 522                 break;
 523         case CS8:
 524                 bits = 8;
 525                 break;
 526                 /* Never happens, but GCC is too dumb to figure it out */
 527         default:
 528                 bits = 8;
 529                 break;
 530         }
 531         sbits = bits - 5;
 532
 533         if (termios->c_cflag & CSTOPB) {
 534                 cval |= SMCMR_SL;       /* Two stops */
 535                 scval |= SCU_PSMR_SL;
 536                 bits++;
 537         }
 538
 539         if (termios->c_cflag & PARENB) {
 540                 cval |= SMCMR_PEN;
 541                 scval |= SCU_PSMR_PEN;
 542                 bits++;
 543                 if (!(termios->c_cflag & PARODD)) {
 544                         cval |= SMCMR_PM_EVEN;
 545                         scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
 546                 }
 547         }
 548
 549         /*
 550          * Set up parity check flag
 551          */
 552 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 553
 554         port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
 555         if (termios->c_iflag & INPCK)
 556                 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
 557         if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
 558                 port->read_status_mask |= BD_SC_BR;
 559
 560         /*
 561          * Characters to ignore
 562          */
 563         port->ignore_status_mask = 0;
 564         if (termios->c_iflag & IGNPAR)
 565                 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
 566         if (termios->c_iflag & IGNBRK) {
 567                 port->ignore_status_mask |= BD_SC_BR;
 568                 /*
 569                  * If we're ignore parity and break indicators, ignore
 570                  * overruns too.  (For real raw support).
 571                  */
 572                 if (termios->c_iflag & IGNPAR)
 573                         port->ignore_status_mask |= BD_SC_OV;
 574         }
 575         /*
 576          * !!! ignore all characters if CREAD is not set
 577          */
 578         if ((termios->c_cflag & CREAD) == 0)
 579                 port->read_status_mask &= ~BD_SC_EMPTY;
 580
 581         spin_lock_irqsave(&port->lock, flags);
 582
 583         /* Start bit has not been added (so don't, because we would just
 584          * subtract it later), and we need to add one for the number of
 585          * stops bits (there is always at least one).
 586          */
 587         bits++;
 588         if (IS_SMC(pinfo)) {
 589                 /* Set the mode register.  We want to keep a copy of the
 590                  * enables, because we want to put them back if they were
 591                  * present.
 592                  */
 593                 prev_mode = in_be16(&smcp->smc_smcmr);
 594                 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval | SMCMR_SM_UART);
 595                 setbits16(&smcp->smc_smcmr, (prev_mode & (SMCMR_REN | SMCMR_TEN)));
 596         } else {
 597                 out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
 598         }
 599
 600         cpm_set_brg(pinfo->brg - 1, baud);
 601         spin_unlock_irqrestore(&port->lock, flags);
 602 }
 603
 604 static const char *cpm_uart_type(struct uart_port *port)
 605 {
 606         pr_debug("CPM uart[%d]:uart_type\n", port->line);
 607
 608         return port->type == PORT_CPM ? "CPM UART" : NULL;
 609 }
 610
 611 /*
 612  * verify the new serial_struct (for TIOCSSERIAL).
 613  */
 614 static int cpm_uart_verify_port(struct uart_port *port,
 615                                 struct serial_struct *ser)
 616 {
 617         int ret = 0;
 618
 619         pr_debug("CPM uart[%d]:verify_port\n", port->line);
 620
 621         if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
 622                 ret = -EINVAL;
 623         if (ser->irq < 0 || ser->irq >= NR_IRQS)
 624                 ret = -EINVAL;
 625         if (ser->baud_base < 9600)
 626                 ret = -EINVAL;
 627         return ret;
 628 }
 629
 630 /*
 631  * Transmit characters, refill buffer descriptor, if possible
 632  */
 633 static int cpm_uart_tx_pump(struct uart_port *port)
 634 {
 635         cbd_t __iomem *bdp;
 636         u8 *p;
 637         int count;
 638         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 639         struct circ_buf *xmit = &port->info->xmit;
 640
 641         /* Handle xon/xoff */
 642         if (port->x_char) {
 643                 /* Pick next descriptor and fill from buffer */
 644                 bdp = pinfo->tx_cur;
 645
 646                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 647
 648                 *p++ = port->x_char;
 649
 650                 out_be16(&bdp->cbd_datlen, 1);
 651                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 652                 /* Get next BD. */
 653                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 654                         bdp = pinfo->tx_bd_base;
 655                 else
 656                         bdp++;
 657                 pinfo->tx_cur = bdp;
 658
 659                 port->icount.tx++;
 660                 port->x_char = 0;
 661                 return 1;
 662         }
 663
 664         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 665                 cpm_uart_stop_tx(port);
 666                 return 0;
 667         }
 668
 669         /* Pick next descriptor and fill from buffer */
 670         bdp = pinfo->tx_cur;
 671
 672         while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
 673                xmit->tail != xmit->head) {
 674                 count = 0;
 675                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 676                 while (count < pinfo->tx_fifosize) {
 677                         *p++ = xmit->buf[xmit->tail];
 678                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 679                         port->icount.tx++;
 680                         count++;
 681                         if (xmit->head == xmit->tail)
 682                                 break;
 683                 }
 684                 out_be16(&bdp->cbd_datlen, count);
 685                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 686                 /* Get next BD. */
 687                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 688                         bdp = pinfo->tx_bd_base;
 689                 else
 690                         bdp++;
 691         }
 692         pinfo->tx_cur = bdp;
 693
 694         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 695                 uart_write_wakeup(port);
 696
 697         if (uart_circ_empty(xmit)) {
 698                 cpm_uart_stop_tx(port);
 699                 return 0;
 700         }
 701
 702         return 1;
 703 }
 704
 705 /*
 706  * init buffer descriptors
 707  */
 708 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
 709 {
 710         int i;
 711         u8 *mem_addr;
 712         cbd_t __iomem *bdp;
 713
 714         pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
 715
 716         /* Set the physical address of the host memory
 717          * buffers in the buffer descriptors, and the
 718          * virtual address for us to work with.
 719          */
 720         mem_addr = pinfo->mem_addr;
 721         bdp = pinfo->rx_cur = pinfo->rx_bd_base;
 722         for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
 723                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 724                 out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
 725                 mem_addr += pinfo->rx_fifosize;
 726         }
 727
 728         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 729         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
 730
 731         /* Set the physical address of the host memory
 732          * buffers in the buffer descriptors, and the
 733          * virtual address for us to work with.
 734          */
 735         mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
 736         bdp = pinfo->tx_cur = pinfo->tx_bd_base;
 737         for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
 738                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 739                 out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
 740                 mem_addr += pinfo->tx_fifosize;
 741         }
 742
 743         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 744         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
 745 }
 746
 747 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 748 {
 749         scc_t __iomem *scp;
 750         scc_uart_t __iomem *sup;
 751
 752         pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
 753
 754         scp = pinfo->sccp;
 755         sup = pinfo->sccup;
 756
 757         /* Store address */
 758         out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
 759                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 760         out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
 761                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 762
 763         /* Set up the uart parameters in the
 764          * parameter ram.
 765          */
 766
 767         cpm_set_scc_fcr(sup);
 768
 769         out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 770         out_be16(&sup->scc_maxidl, pinfo->rx_fifosize);
 771         out_be16(&sup->scc_brkcr, 1);
 772         out_be16(&sup->scc_parec, 0);
 773         out_be16(&sup->scc_frmec, 0);
 774         out_be16(&sup->scc_nosec, 0);
 775         out_be16(&sup->scc_brkec, 0);
 776         out_be16(&sup->scc_uaddr1, 0);
 777         out_be16(&sup->scc_uaddr2, 0);
 778         out_be16(&sup->scc_toseq, 0);
 779         out_be16(&sup->scc_char1, 0x8000);
 780         out_be16(&sup->scc_char2, 0x8000);
 781         out_be16(&sup->scc_char3, 0x8000);
 782         out_be16(&sup->scc_char4, 0x8000);
 783         out_be16(&sup->scc_char5, 0x8000);
 784         out_be16(&sup->scc_char6, 0x8000);
 785         out_be16(&sup->scc_char7, 0x8000);
 786         out_be16(&sup->scc_char8, 0x8000);
 787         out_be16(&sup->scc_rccm, 0xc0ff);
 788
 789         /* Send the CPM an initialize command.
 790          */
 791         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 792
 793         /* Set UART mode, 8 bit, no parity, one stop.
 794          * Enable receive and transmit.
 795          */
 796         out_be32(&scp->scc_gsmrh, 0);
 797         out_be32(&scp->scc_gsmrl,
 798                  SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
 799
 800         /* Enable rx interrupts  and clear all pending events.  */
 801         out_be16(&scp->scc_sccm, 0);
 802         out_be16(&scp->scc_scce, 0xffff);
 803         out_be16(&scp->scc_dsr, 0x7e7e);
 804         out_be16(&scp->scc_psmr, 0x3000);
 805
 806         setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 807 }
 808
 809 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 810 {
 811         smc_t __iomem *sp;
 812         smc_uart_t __iomem *up;
 813
 814         pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
 815
 816         sp = pinfo->smcp;
 817         up = pinfo->smcup;
 818
 819         /* Store address */
 820         out_be16(&pinfo->smcup->smc_rbase,
 821                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 822         out_be16(&pinfo->smcup->smc_tbase,
 823                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 824
 825 /*
 826  *  In case SMC1 is being relocated...
 827  */
 828 #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
 829         out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
 830         out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
 831         out_be32(&up->smc_rstate, 0);
 832         out_be32(&up->smc_tstate, 0);
 833         out_be16(&up->smc_brkcr, 1);              /* number of break chars */
 834         out_be16(&up->smc_brkec, 0);
 835 #endif
 836
 837         /* Set up the uart parameters in the
 838          * parameter ram.
 839          */
 840         cpm_set_smc_fcr(up);
 841
 842         /* Using idle charater time requires some additional tuning.  */
 843         out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
 844         out_be16(&up->smc_maxidl, pinfo->rx_fifosize);
 845         out_be16(&up->smc_brklen, 0);
 846         out_be16(&up->smc_brkec, 0);
 847         out_be16(&up->smc_brkcr, 1);
 848
 849         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 850
 851         /* Set UART mode, 8 bit, no parity, one stop.
 852          * Enable receive and transmit.
 853          */
 854         out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
 855
 856         /* Enable only rx interrupts clear all pending events. */
 857         out_8(&sp->smc_smcm, 0);
 858         out_8(&sp->smc_smce, 0xff);
 859
 860         setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 861 }
 862
 863 /*
 864  * Initialize port. This is called from early_console stuff
 865  * so we have to be careful here !
 866  */
 867 static int cpm_uart_request_port(struct uart_port *port)
 868 {
 869         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 870         int ret;
 871
 872         pr_debug("CPM uart[%d]:request port\n", port->line);
 873
 874         if (pinfo->flags & FLAG_CONSOLE)
 875                 return 0;
 876
 877         if (IS_SMC(pinfo)) {
 878                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
 879                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 880         } else {
 881                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 882                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 883         }
 884
 885         ret = cpm_uart_allocbuf(pinfo, 0);
 886
 887         if (ret)
 888                 return ret;
 889
 890         cpm_uart_initbd(pinfo);
 891         if (IS_SMC(pinfo))
 892                 cpm_uart_init_smc(pinfo);
 893         else
 894                 cpm_uart_init_scc(pinfo);
 895
 896         return 0;
 897 }
 898
 899 static void cpm_uart_release_port(struct uart_port *port)
 900 {
 901         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 902
 903         if (!(pinfo->flags & FLAG_CONSOLE))
 904                 cpm_uart_freebuf(pinfo);
 905 }
 906
 907 /*
 908  * Configure/autoconfigure the port.
 909  */
 910 static void cpm_uart_config_port(struct uart_port *port, int flags)
 911 {
 912         pr_debug("CPM uart[%d]:config_port\n", port->line);
 913
 914         if (flags & UART_CONFIG_TYPE) {
 915                 port->type = PORT_CPM;
 916                 cpm_uart_request_port(port);
 917         }
 918 }
 919 static struct uart_ops cpm_uart_pops = {
 920         .tx_empty       = cpm_uart_tx_empty,
 921         .set_mctrl      = cpm_uart_set_mctrl,
 922         .get_mctrl      = cpm_uart_get_mctrl,
 923         .stop_tx        = cpm_uart_stop_tx,
 924         .start_tx       = cpm_uart_start_tx,
 925         .stop_rx        = cpm_uart_stop_rx,
 926         .enable_ms      = cpm_uart_enable_ms,
 927         .break_ctl      = cpm_uart_break_ctl,
 928         .startup        = cpm_uart_startup,
 929         .shutdown       = cpm_uart_shutdown,
 930         .set_termios    = cpm_uart_set_termios,
 931         .type           = cpm_uart_type,
 932         .release_port   = cpm_uart_release_port,
 933         .request_port   = cpm_uart_request_port,
 934         .config_port    = cpm_uart_config_port,
 935         .verify_port    = cpm_uart_verify_port,
 936 };
 937
 938 #ifdef CONFIG_PPC_CPM_NEW_BINDING
 939 struct uart_cpm_port cpm_uart_ports[UART_NR];
 940
 941 static int cpm_uart_init_port(struct device_node *np,
 942                               struct uart_cpm_port *pinfo)
 943 {
 944         const u32 *data;
 945         void __iomem *mem, *pram;
 946         int len;
 947         int ret;
 948
 949         data = of_get_property(np, "fsl,cpm-brg", &len);
 950         if (!data || len != 4) {
 951                 printk(KERN_ERR "CPM UART %s has no/invalid "
 952                                 "fsl,cpm-brg property.\n", np->name);
 953                 return -EINVAL;
 954         }
 955         pinfo->brg = *data;
 956
 957         data = of_get_property(np, "fsl,cpm-command", &len);
 958         if (!data || len != 4) {
 959                 printk(KERN_ERR "CPM UART %s has no/invalid "
 960                                 "fsl,cpm-command property.\n", np->name);
 961                 return -EINVAL;
 962         }
 963         pinfo->command = *data;
 964
 965         mem = of_iomap(np, 0);
 966         if (!mem)
 967                 return -ENOMEM;
 968
 969         if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
 970             of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
 971                 pinfo->sccp = mem;
 972                 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
 973         } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
 974                    of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
 975                 pinfo->flags |= FLAG_SMC;
 976                 pinfo->smcp = mem;
 977                 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
 978         } else {
 979                 ret = -ENODEV;
 980                 goto out_mem;
 981         }
 982
 983         if (!pram) {
 984                 ret = -ENOMEM;
 985                 goto out_mem;
 986         }
 987
 988         pinfo->tx_nrfifos = TX_NUM_FIFO;
 989         pinfo->tx_fifosize = TX_BUF_SIZE;
 990         pinfo->rx_nrfifos = RX_NUM_FIFO;
 991         pinfo->rx_fifosize = RX_BUF_SIZE;
 992
 993         pinfo->port.uartclk = ppc_proc_freq;
 994         pinfo->port.mapbase = (unsigned long)mem;
 995         pinfo->port.type = PORT_CPM;
 996         pinfo->port.ops = &cpm_uart_pops,
 997         pinfo->port.iotype = UPIO_MEM;
 998         spin_lock_init(&pinfo->port.lock);
 999
1000         pinfo->port.irq = of_irq_to_resource(np, 0, NULL);
1001         if (pinfo->port.irq == NO_IRQ) {
1002                 ret = -EINVAL;
1003                 goto out_pram;
1004         }
1005
1006         return cpm_uart_request_port(&pinfo->port);
1007
1008 out_pram:
1009         cpm_uart_unmap_pram(pinfo, pram);
1010 out_mem:
1011         iounmap(mem);
1012         return ret;
1013 }
1014
1015 #else
1016
1017 struct uart_cpm_port cpm_uart_ports[UART_NR] = {
1018         [UART_SMC1] = {
1019                 .port = {
1020                         .irq            = SMC1_IRQ,
1021                         .ops            = &cpm_uart_pops,
1022                         .iotype         = UPIO_MEM,
1023                         .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC1].port.lock),
1024                 },
1025                 .flags = FLAG_SMC,
1026                 .tx_nrfifos = TX_NUM_FIFO,
1027                 .tx_fifosize = TX_BUF_SIZE,
1028                 .rx_nrfifos = RX_NUM_FIFO,
1029                 .rx_fifosize = RX_BUF_SIZE,
1030                 .set_lineif = smc1_lineif,
1031         },
1032         [UART_SMC2] = {
1033                 .port = {
1034                         .irq            = SMC2_IRQ,
1035                         .ops            = &cpm_uart_pops,
1036                         .iotype         = UPIO_MEM,
1037                         .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC2].port.lock),
1038                 },
1039                 .flags = FLAG_SMC,
1040                 .tx_nrfifos = TX_NUM_FIFO,
1041                 .tx_fifosize = TX_BUF_SIZE,
1042                 .rx_nrfifos = RX_NUM_FIFO,
1043                 .rx_fifosize = RX_BUF_SIZE,
1044                 .set_lineif = smc2_lineif,
1045 #ifdef CONFIG_SERIAL_CPM_ALT_SMC2
1046                 .is_portb = 1,
1047 #endif
1048         },
1049         [UART_SCC1] = {
1050                 .port = {
1051                         .irq            = SCC1_IRQ,
1052                         .ops            = &cpm_uart_pops,
1053                         .iotype         = UPIO_MEM,
1054                         .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC1].port.lock),
1055                 },
1056                 .tx_nrfifos = TX_NUM_FIFO,
1057                 .tx_fifosize = TX_BUF_SIZE,
1058                 .rx_nrfifos = RX_NUM_FIFO,
1059                 .rx_fifosize = RX_BUF_SIZE,
1060                 .set_lineif = scc1_lineif,
1061                 .wait_closing = SCC_WAIT_CLOSING,
1062         },
1063         [UART_SCC2] = {
1064                 .port = {
1065                         .irq            = SCC2_IRQ,
1066                         .ops            = &cpm_uart_pops,
1067                         .iotype         = UPIO_MEM,
1068                         .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC2].port.lock),
1069                 },
1070                 .tx_nrfifos = TX_NUM_FIFO,
1071                 .tx_fifosize = TX_BUF_SIZE,
1072                 .rx_nrfifos = RX_NUM_FIFO,
1073                 .rx_fifosize = RX_BUF_SIZE,
1074                 .set_lineif = scc2_lineif,
1075                 .wait_closing = SCC_WAIT_CLOSING,
1076         },
1077         [UART_SCC3] = {
1078                 .port = {
1079                         .irq            = SCC3_IRQ,
1080                         .ops            = &cpm_uart_pops,
1081                         .iotype         = UPIO_MEM,
1082                         .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC3].port.lock),
1083                 },
1084                 .tx_nrfifos = TX_NUM_FIFO,
1085                 .tx_fifosize = TX_BUF_SIZE,
1086                 .rx_nrfifos = RX_NUM_FIFO,
1087                 .rx_fifosize = RX_BUF_SIZE,
1088                 .set_lineif = scc3_lineif,
1089                 .wait_closing = SCC_WAIT_CLOSING,
1090         },
1091         [UART_SCC4] = {
1092                 .port = {
1093                         .irq            = SCC4_IRQ,
1094                         .ops            = &cpm_uart_pops,
1095                         .iotype         = UPIO_MEM,
1096                         .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC4].port.lock),
1097                 },
1098                 .tx_nrfifos = TX_NUM_FIFO,
1099                 .tx_fifosize = TX_BUF_SIZE,
1100                 .rx_nrfifos = RX_NUM_FIFO,
1101                 .rx_fifosize = RX_BUF_SIZE,
1102                 .set_lineif = scc4_lineif,
1103                 .wait_closing = SCC_WAIT_CLOSING,
1104         },
1105 };
1106
1107 int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
1108 {
1109         struct resource *r;
1110         struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
1111         int idx;        /* It is UART_SMCx or UART_SCCx index */
1112         struct uart_cpm_port *pinfo;
1113         int line;
1114         u32 mem, pram;
1115
1116         idx = pdata->fs_no = fs_uart_get_id(pdata);
1117
1118         line = cpm_uart_id2nr(idx);
1119         if(line < 0) {
1120                 printk(KERN_ERR"%s(): port %d is not registered", __func__, idx);
1121                 return -EINVAL;
1122         }
1123
1124         pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx];
1125
1126         pinfo->brg = pdata->brg;
1127
1128         if (!is_con) {
1129                 pinfo->port.line = line;
1130                 pinfo->port.flags = UPF_BOOT_AUTOCONF;
1131         }
1132
1133         if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs")))
1134                 return -EINVAL;
1135         mem = (u32)ioremap(r->start, r->end - r->start + 1);
1136
1137         if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram")))
1138                 return -EINVAL;
1139         pram = (u32)ioremap(r->start, r->end - r->start + 1);
1140
1141         if(idx > fsid_smc2_uart) {
1142                 pinfo->sccp = (scc_t *)mem;
1143                 pinfo->sccup = (scc_uart_t *)pram;
1144         } else {
1145                 pinfo->smcp = (smc_t *)mem;
1146                 pinfo->smcup = (smc_uart_t *)pram;
1147         }
1148         pinfo->tx_nrfifos = pdata->tx_num_fifo;
1149         pinfo->tx_fifosize = pdata->tx_buf_size;
1150
1151         pinfo->rx_nrfifos = pdata->rx_num_fifo;
1152         pinfo->rx_fifosize = pdata->rx_buf_size;
1153
1154         pinfo->port.uartclk = pdata->uart_clk;
1155         pinfo->port.mapbase = (unsigned long)mem;
1156         pinfo->port.irq = platform_get_irq(pdev, 0);
1157
1158         return 0;
1159 }
1160 #endif
1161
1162 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1163 /*
1164  *      Print a string to the serial port trying not to disturb
1165  *      any possible real use of the port...
1166  *
1167  *      Note that this is called with interrupts already disabled
1168  */
1169 static void cpm_uart_console_write(struct console *co, const char *s,
1170                                    u_int count)
1171 {
1172 #ifdef CONFIG_PPC_CPM_NEW_BINDING
1173         struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1174 #else
1175         struct uart_cpm_port *pinfo =
1176             &cpm_uart_ports[cpm_uart_port_map[co->index]];
1177 #endif
1178         unsigned int i;
1179         cbd_t __iomem *bdp, *bdbase;
1180         unsigned char *cp;
1181
1182         /* Get the address of the host memory buffer.
1183          */
1184         bdp = pinfo->tx_cur;
1185         bdbase = pinfo->tx_bd_base;
1186
1187         /*
1188          * Now, do each character.  This is not as bad as it looks
1189          * since this is a holding FIFO and not a transmitting FIFO.
1190          * We could add the complexity of filling the entire transmit
1191          * buffer, but we would just wait longer between accesses......
1192          */
1193         for (i = 0; i < count; i++, s++) {
1194                 /* Wait for transmitter fifo to empty.
1195                  * Ready indicates output is ready, and xmt is doing
1196                  * that, not that it is ready for us to send.
1197                  */
1198                 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1199                         ;
1200
1201                 /* Send the character out.
1202                  * If the buffer address is in the CPM DPRAM, don't
1203                  * convert it.
1204                  */
1205                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
1206                 *cp = *s;
1207
1208                 out_be16(&bdp->cbd_datlen, 1);
1209                 setbits16(&bdp->cbd_sc, BD_SC_READY);
1210
1211                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1212                         bdp = bdbase;
1213                 else
1214                         bdp++;
1215
1216                 /* if a LF, also do CR... */
1217                 if (*s == 10) {
1218                         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1219                                 ;
1220
1221                         cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
1222                         *cp = 13;
1223
1224                         out_be16(&bdp->cbd_datlen, 1);
1225                         setbits16(&bdp->cbd_sc, BD_SC_READY);
1226
1227                         if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1228                                 bdp = bdbase;
1229                         else
1230                                 bdp++;
1231                 }
1232         }
1233
1234         /*
1235          * Finally, Wait for transmitter & holding register to empty
1236          *  and restore the IER
1237          */
1238         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1239                 ;
1240
1241         pinfo->tx_cur = bdp;
1242 }
1243
1244
1245 static int __init cpm_uart_console_setup(struct console *co, char *options)
1246 {
1247         int baud = 38400;
1248         int bits = 8;
1249         int parity = 'n';
1250         int flow = 'n';
1251         int ret;
1252         struct uart_cpm_port *pinfo;
1253         struct uart_port *port;
1254
1255 #ifdef CONFIG_PPC_CPM_NEW_BINDING
1256         struct device_node *np = NULL;
1257         int i = 0;
1258
1259         if (co->index >= UART_NR) {
1260                 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1261                        co->index);
1262                 return -ENODEV;
1263         }
1264
1265         do {
1266                 np = of_find_node_by_type(np, "serial");
1267                 if (!np)
1268                         return -ENODEV;
1269
1270                 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1271                     !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1272                     !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1273                     !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1274                         i--;
1275         } while (i++ != co->index);
1276
1277         pinfo = &cpm_uart_ports[co->index];
1278
1279         pinfo->flags |= FLAG_CONSOLE;
1280         port = &pinfo->port;
1281
1282         ret = cpm_uart_init_port(np, pinfo);
1283         of_node_put(np);
1284         if (ret)
1285                 return ret;
1286
1287 #else
1288
1289         struct fs_uart_platform_info *pdata;
1290         struct platform_device* pdev = early_uart_get_pdev(co->index);
1291
1292         if (!pdev) {
1293                 pr_info("cpm_uart: console: compat mode\n");
1294                 /* compatibility - will be cleaned up */
1295                 cpm_uart_init_portdesc();
1296         }
1297
1298         port =
1299             (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
1300         pinfo = (struct uart_cpm_port *)port;
1301         if (!pdev) {
1302                 if (pinfo->set_lineif)
1303                         pinfo->set_lineif(pinfo);
1304         } else {
1305                 pdata = pdev->dev.platform_data;
1306                 if (pdata)
1307                         if (pdata->init_ioports)
1308                                 pdata->init_ioports(pdata);
1309
1310                 cpm_uart_drv_get_platform_data(pdev, 1);
1311         }
1312
1313         pinfo->flags |= FLAG_CONSOLE;
1314 #endif
1315
1316         if (options) {
1317                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1318         } else {
1319                 if ((baud = uart_baudrate()) == -1)
1320                         baud = 9600;
1321         }
1322
1323 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1324         udbg_putc = NULL;
1325 #endif
1326
1327         cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1328
1329         if (IS_SMC(pinfo)) {
1330                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1331                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1332         } else {
1333                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1334                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1335         }
1336
1337         ret = cpm_uart_allocbuf(pinfo, 1);
1338
1339         if (ret)
1340                 return ret;
1341
1342         cpm_uart_initbd(pinfo);
1343
1344         if (IS_SMC(pinfo))
1345                 cpm_uart_init_smc(pinfo);
1346         else
1347                 cpm_uart_init_scc(pinfo);
1348
1349         uart_set_options(port, co, baud, parity, bits, flow);
1350         cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1351
1352         return 0;
1353 }
1354
1355 static struct uart_driver cpm_reg;
1356 static struct console cpm_scc_uart_console = {
1357         .name           = "ttyCPM",
1358         .write          = cpm_uart_console_write,
1359         .device         = uart_console_device,
1360         .setup          = cpm_uart_console_setup,
1361         .flags          = CON_PRINTBUFFER,
1362         .index          = -1,
1363         .data           = &cpm_reg,
1364 };
1365
1366 static int __init cpm_uart_console_init(void)
1367 {
1368         register_console(&cpm_scc_uart_console);
1369         return 0;
1370 }
1371
1372 console_initcall(cpm_uart_console_init);
1373
1374 #define CPM_UART_CONSOLE        &cpm_scc_uart_console
1375 #else
1376 #define CPM_UART_CONSOLE        NULL
1377 #endif
1378
1379 static struct uart_driver cpm_reg = {
1380         .owner          = THIS_MODULE,
1381         .driver_name    = "ttyCPM",
1382         .dev_name       = "ttyCPM",
1383         .major          = SERIAL_CPM_MAJOR,
1384         .minor          = SERIAL_CPM_MINOR,
1385         .cons           = CPM_UART_CONSOLE,
1386         .nr             = UART_NR,
1387 };
1388
1389 #ifdef CONFIG_PPC_CPM_NEW_BINDING
1390 static int probe_index;
1391
1392 static int __devinit cpm_uart_probe(struct of_device *ofdev,
1393                                     const struct of_device_id *match)
1394 {
1395         int index = probe_index++;
1396         struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1397         int ret;
1398
1399         pinfo->port.line = index;
1400
1401         if (index >= UART_NR)
1402                 return -ENODEV;
1403
1404         dev_set_drvdata(&ofdev->dev, pinfo);
1405
1406         ret = cpm_uart_init_port(ofdev->node, pinfo);
1407         if (ret)
1408                 return ret;
1409
1410         return uart_add_one_port(&cpm_reg, &pinfo->port);
1411 }
1412
1413 static int __devexit cpm_uart_remove(struct of_device *ofdev)
1414 {
1415         struct uart_cpm_port *pinfo = dev_get_drvdata(&ofdev->dev);
1416         return uart_remove_one_port(&cpm_reg, &pinfo->port);
1417 }
1418
1419 static struct of_device_id cpm_uart_match[] = {
1420         {
1421                 .compatible = "fsl,cpm1-smc-uart",
1422         },
1423         {
1424                 .compatible = "fsl,cpm1-scc-uart",
1425         },
1426         {
1427                 .compatible = "fsl,cpm2-smc-uart",
1428         },
1429         {
1430                 .compatible = "fsl,cpm2-scc-uart",
1431         },
1432         {}
1433 };
1434
1435 static struct of_platform_driver cpm_uart_driver = {
1436         .name = "cpm_uart",
1437         .match_table = cpm_uart_match,
1438         .probe = cpm_uart_probe,
1439         .remove = cpm_uart_remove,
1440  };
1441
1442 static int __init cpm_uart_init(void)
1443 {
1444         int ret = uart_register_driver(&cpm_reg);
1445         if (ret)
1446                 return ret;
1447
1448         ret = of_register_platform_driver(&cpm_uart_driver);
1449         if (ret)
1450                 uart_unregister_driver(&cpm_reg);
1451
1452         return ret;
1453 }
1454
1455 static void __exit cpm_uart_exit(void)
1456 {
1457         of_unregister_platform_driver(&cpm_uart_driver);
1458         uart_unregister_driver(&cpm_reg);
1459 }
1460 #else
1461 static int cpm_uart_drv_probe(struct device *dev)
1462 {
1463         struct platform_device  *pdev = to_platform_device(dev);
1464         struct fs_uart_platform_info *pdata;
1465         int ret = -ENODEV;
1466
1467         if(!pdev) {
1468                 printk(KERN_ERR"CPM UART: platform data missing!\n");
1469                 return ret;
1470         }
1471
1472         pdata = pdev->dev.platform_data;
1473
1474         if ((ret = cpm_uart_drv_get_platform_data(pdev, 0)))
1475                 return ret;
1476
1477         pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n", cpm_uart_id2nr(pdata->fs_no));
1478
1479         if (pdata->init_ioports)
1480                 pdata->init_ioports(pdata);
1481
1482         ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
1483
1484         return ret;
1485 }
1486
1487 static int cpm_uart_drv_remove(struct device *dev)
1488 {
1489         struct platform_device  *pdev = to_platform_device(dev);
1490         struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
1491
1492         pr_debug("cpm_uart_drv_remove: Removing CPM UART %d\n",
1493                         cpm_uart_id2nr(pdata->fs_no));
1494
1495         uart_remove_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
1496         return 0;
1497 }
1498
1499 static struct device_driver cpm_smc_uart_driver = {
1500         .name   = "fsl-cpm-smc:uart",
1501         .bus    = &platform_bus_type,
1502         .probe  = cpm_uart_drv_probe,
1503         .remove = cpm_uart_drv_remove,
1504 };
1505
1506 static struct device_driver cpm_scc_uart_driver = {
1507         .name   = "fsl-cpm-scc:uart",
1508         .bus    = &platform_bus_type,
1509         .probe  = cpm_uart_drv_probe,
1510         .remove = cpm_uart_drv_remove,
1511 };
1512
1513 /*
1514    This is supposed to match uart devices on platform bus,
1515    */
1516 static int match_is_uart (struct device* dev, void* data)
1517 {
1518         struct platform_device* pdev = container_of(dev, struct platform_device, dev);
1519         int ret = 0;
1520         /* this was setfunc as uart */
1521         if(strstr(pdev->name,":uart")) {
1522                 ret = 1;
1523         }
1524         return ret;
1525 }
1526
1527
1528 static int cpm_uart_init(void) {
1529
1530         int ret;
1531         int i;
1532         struct device *dev;
1533         printk(KERN_INFO "Serial: CPM driver $Revision: 0.02 $\n");
1534
1535         /* lookup the bus for uart devices */
1536         dev = bus_find_device(&platform_bus_type, NULL, 0, match_is_uart);
1537
1538         /* There are devices on the bus - all should be OK  */
1539         if (dev) {
1540                 cpm_uart_count();
1541                 cpm_reg.nr = cpm_uart_nr;
1542
1543                 if (!(ret = uart_register_driver(&cpm_reg))) {
1544                         if ((ret = driver_register(&cpm_smc_uart_driver))) {
1545                                 uart_unregister_driver(&cpm_reg);
1546                                 return ret;
1547                         }
1548                         if ((ret = driver_register(&cpm_scc_uart_driver))) {
1549                                 driver_unregister(&cpm_scc_uart_driver);
1550                                 uart_unregister_driver(&cpm_reg);
1551                         }
1552                 }
1553         } else {
1554         /* No capable platform devices found - falling back to legacy mode */
1555                 pr_info("cpm_uart: WARNING: no UART devices found on platform bus!\n");
1556                 pr_info(
1557                 "cpm_uart: the driver will guess configuration, but this mode is no longer supported.\n");
1558
1559                 /* Don't run this again, if the console driver did it already */
1560                 if (cpm_uart_nr == 0)
1561                         cpm_uart_init_portdesc();
1562
1563                 cpm_reg.nr = cpm_uart_nr;
1564                 ret = uart_register_driver(&cpm_reg);
1565
1566                 if (ret)
1567                         return ret;
1568
1569                 for (i = 0; i < cpm_uart_nr; i++) {
1570                         int con = cpm_uart_port_map[i];
1571                         cpm_uart_ports[con].port.line = i;
1572                         cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF;
1573                         if (cpm_uart_ports[con].set_lineif)
1574                                 cpm_uart_ports[con].set_lineif(&cpm_uart_ports[con]);
1575                         uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port);
1576                 }
1577
1578         }
1579         return ret;
1580 }
1581
1582 static void __exit cpm_uart_exit(void)
1583 {
1584         driver_unregister(&cpm_scc_uart_driver);
1585         driver_unregister(&cpm_smc_uart_driver);
1586         uart_unregister_driver(&cpm_reg);
1587 }
1588 #endif
1589
1590 module_init(cpm_uart_init);
1591 module_exit(cpm_uart_exit);
1592
1593 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1594 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1595 MODULE_LICENSE("GPL");
1596 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);