Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[sfrench/cifs-2.6.git] / drivers / serial / bfin_5xx.c
1 /*
2  * Blackfin On-Chip Serial Driver
3  *
4  * Copyright 2006-2007 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
28 #endif
29
30 #include <asm/gpio.h>
31 #include <asm/mach/bfin_serial_5xx.h>
32
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
37 #include <asm/cacheflush.h>
38 #endif
39
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME        "ttyBF"
42 #define BFIN_SERIAL_MAJOR       204
43 #define BFIN_SERIAL_MINOR       64
44
45 /*
46  * Setup for console. Argument comes from the menuconfig
47  */
48 #define DMA_RX_XCOUNT           512
49 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
50
51 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
52
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
55 #else
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
57 #endif
58
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
60
61 /*
62  * interrupts are disabled on entry
63  */
64 static void bfin_serial_stop_tx(struct uart_port *port)
65 {
66         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67         struct circ_buf *xmit = &uart->port.info->xmit;
68 #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
69         unsigned short ier;
70 #endif
71
72         while (!(UART_GET_LSR(uart) & TEMT))
73                 cpu_relax();
74
75 #ifdef CONFIG_SERIAL_BFIN_DMA
76         disable_dma(uart->tx_dma_channel);
77         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
78         uart->port.icount.tx += uart->tx_count;
79         uart->tx_count = 0;
80         uart->tx_done = 1;
81 #else
82 #ifdef CONFIG_BF54x
83         /* Clear TFI bit */
84         UART_PUT_LSR(uart, TFI);
85         UART_CLEAR_IER(uart, ETBEI);
86 #else
87         ier = UART_GET_IER(uart);
88         ier &= ~ETBEI;
89         UART_PUT_IER(uart, ier);
90 #endif
91 #endif
92 }
93
94 /*
95  * port is locked and interrupts are disabled
96  */
97 static void bfin_serial_start_tx(struct uart_port *port)
98 {
99         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
100
101 #ifdef CONFIG_SERIAL_BFIN_DMA
102         if (uart->tx_done)
103                 bfin_serial_dma_tx_chars(uart);
104 #else
105 #ifdef CONFIG_BF54x
106         UART_SET_IER(uart, ETBEI);
107 #else
108         unsigned short ier;
109         ier = UART_GET_IER(uart);
110         ier |= ETBEI;
111         UART_PUT_IER(uart, ier);
112 #endif
113         bfin_serial_tx_chars(uart);
114 #endif
115 }
116
117 /*
118  * Interrupts are enabled
119  */
120 static void bfin_serial_stop_rx(struct uart_port *port)
121 {
122         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
123 #ifdef  CONFIG_KGDB_UART
124         if (uart->port.line != CONFIG_KGDB_UART_PORT) {
125 #endif
126 #ifdef CONFIG_BF54x
127         UART_CLEAR_IER(uart, ERBFI);
128 #else
129         unsigned short ier;
130
131         ier = UART_GET_IER(uart);
132         ier &= ~ERBFI;
133         UART_PUT_IER(uart, ier);
134 #endif
135 #ifdef  CONFIG_KGDB_UART
136         }
137 #endif
138 }
139
140 /*
141  * Set the modem control timer to fire immediately.
142  */
143 static void bfin_serial_enable_ms(struct uart_port *port)
144 {
145 }
146
147 #ifdef CONFIG_KGDB_UART
148 static int kgdb_entry_state;
149
150 void kgdb_put_debug_char(int chr)
151 {
152         struct bfin_serial_port *uart;
153         
154         if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
155                 uart = &bfin_serial_ports[0];
156         else
157                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
158         
159         while (!(UART_GET_LSR(uart) & THRE)) {
160                 SSYNC();
161         }
162
163 #ifndef CONFIG_BF54x
164         UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
165         SSYNC();
166 #endif
167         UART_PUT_CHAR(uart, (unsigned char)chr);
168         SSYNC();
169 }
170
171 int kgdb_get_debug_char(void)
172 {
173         struct bfin_serial_port *uart;
174         unsigned char chr;
175
176         if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
177                 uart = &bfin_serial_ports[0];
178         else
179                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
180         
181         while(!(UART_GET_LSR(uart) & DR)) {
182                 SSYNC();
183         }
184 #ifndef CONFIG_BF54x
185         UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
186         SSYNC();
187 #endif
188         chr = UART_GET_CHAR(uart);
189         SSYNC();
190
191         return chr;
192 }
193 #endif
194
195 #if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
196 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
197 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
198 #else
199 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
200 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
201 #endif
202
203 #ifdef CONFIG_SERIAL_BFIN_PIO
204 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
205 {
206         struct tty_struct *tty = uart->port.info->tty;
207         unsigned int status, ch, flg;
208         static struct timeval anomaly_start = { .tv_sec = 0 };
209 #ifdef CONFIG_KGDB_UART
210         struct pt_regs *regs = get_irq_regs();
211 #endif
212
213         status = UART_GET_LSR(uart);
214         UART_CLEAR_LSR(uart);
215
216         ch = UART_GET_CHAR(uart);
217         uart->port.icount.rx++;
218
219 #ifdef CONFIG_KGDB_UART
220         if (uart->port.line == CONFIG_KGDB_UART_PORT) {
221                 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
222                         kgdb_breakkey_pressed(regs);
223                         return;
224                 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
225                         kgdb_entry_state = 1;
226                 } else if (kgdb_entry_state == 1 && ch == 'q') {
227                         kgdb_entry_state = 0;
228                         kgdb_breakkey_pressed(regs);
229                         return;
230                 } else if (ch == 0x3) {/* Ctrl + C */
231                         kgdb_entry_state = 0;
232                         kgdb_breakkey_pressed(regs);
233                         return;
234                 } else {
235                         kgdb_entry_state = 0;
236                 }
237         }
238 #endif
239
240         if (ANOMALY_05000230) {
241                 /* The BF533 (and BF561) family of processors have a nice anomaly
242                  * where they continuously generate characters for a "single" break.
243                  * We have to basically ignore this flood until the "next" valid
244                  * character comes across.  Due to the nature of the flood, it is
245                  * not possible to reliably catch bytes that are sent too quickly
246                  * after this break.  So application code talking to the Blackfin
247                  * which sends a break signal must allow at least 1.5 character
248                  * times after the end of the break for things to stabilize.  This
249                  * timeout was picked as it must absolutely be larger than 1
250                  * character time +/- some percent.  So 1.5 sounds good.  All other
251                  * Blackfin families operate properly.  Woo.
252                  * Note: While Anomaly 05000230 does not directly address this,
253                  *       the changes that went in for it also fixed this issue.
254                  *       That anomaly was fixed in 0.5+ silicon.  I like bunnies.
255                  */
256                 if (anomaly_start.tv_sec) {
257                         struct timeval curr;
258                         suseconds_t usecs;
259
260                         if ((~ch & (~ch + 1)) & 0xff)
261                                 goto known_good_char;
262
263                         do_gettimeofday(&curr);
264                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
265                                 goto known_good_char;
266
267                         usecs = 0;
268                         if (curr.tv_sec != anomaly_start.tv_sec)
269                                 usecs += USEC_PER_SEC;
270                         usecs += curr.tv_usec - anomaly_start.tv_usec;
271
272                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
273                                 goto known_good_char;
274
275                         if (ch)
276                                 anomaly_start.tv_sec = 0;
277                         else
278                                 anomaly_start = curr;
279
280                         return;
281
282  known_good_char:
283                         anomaly_start.tv_sec = 0;
284                 }
285         }
286
287         if (status & BI) {
288                 if (ANOMALY_05000230)
289                         if (bfin_revid() < 5)
290                                 do_gettimeofday(&anomaly_start);
291                 uart->port.icount.brk++;
292                 if (uart_handle_break(&uart->port))
293                         goto ignore_char;
294                 status &= ~(PE | FE);
295         }
296         if (status & PE)
297                 uart->port.icount.parity++;
298         if (status & OE)
299                 uart->port.icount.overrun++;
300         if (status & FE)
301                 uart->port.icount.frame++;
302
303         status &= uart->port.read_status_mask;
304
305         if (status & BI)
306                 flg = TTY_BREAK;
307         else if (status & PE)
308                 flg = TTY_PARITY;
309         else if (status & FE)
310                 flg = TTY_FRAME;
311         else
312                 flg = TTY_NORMAL;
313
314         if (uart_handle_sysrq_char(&uart->port, ch))
315                 goto ignore_char;
316
317         uart_insert_char(&uart->port, status, OE, ch, flg);
318
319  ignore_char:
320         tty_flip_buffer_push(tty);
321 }
322
323 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
324 {
325         struct circ_buf *xmit = &uart->port.info->xmit;
326
327         if (uart->port.x_char) {
328                 UART_PUT_CHAR(uart, uart->port.x_char);
329                 uart->port.icount.tx++;
330                 uart->port.x_char = 0;
331         }
332         /*
333          * Check the modem control lines before
334          * transmitting anything.
335          */
336         bfin_serial_mctrl_check(uart);
337
338         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
339                 bfin_serial_stop_tx(&uart->port);
340                 return;
341         }
342
343         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
344                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
345                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
346                 uart->port.icount.tx++;
347                 SSYNC();
348         }
349
350         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
351                 uart_write_wakeup(&uart->port);
352
353         if (uart_circ_empty(xmit))
354                 bfin_serial_stop_tx(&uart->port);
355 }
356
357 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
358 {
359         struct bfin_serial_port *uart = dev_id;
360
361         spin_lock(&uart->port.lock);
362         while (UART_GET_LSR(uart) & DR)
363                 bfin_serial_rx_chars(uart);
364         spin_unlock(&uart->port.lock);
365
366         return IRQ_HANDLED;
367 }
368
369 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
370 {
371         struct bfin_serial_port *uart = dev_id;
372
373         spin_lock(&uart->port.lock);
374         if (UART_GET_LSR(uart) & THRE)
375                 bfin_serial_tx_chars(uart);
376         spin_unlock(&uart->port.lock);
377
378         return IRQ_HANDLED;
379 }
380 #endif
381
382 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
383 static void bfin_serial_do_work(struct work_struct *work)
384 {
385         struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
386
387         bfin_serial_mctrl_check(uart);
388 }
389 #endif
390
391 #ifdef CONFIG_SERIAL_BFIN_DMA
392 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
393 {
394         struct circ_buf *xmit = &uart->port.info->xmit;
395         unsigned short ier;
396
397         uart->tx_done = 0;
398
399         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
400                 uart->tx_count = 0;
401                 uart->tx_done = 1;
402                 return;
403         }
404
405         if (uart->port.x_char) {
406                 UART_PUT_CHAR(uart, uart->port.x_char);
407                 uart->port.icount.tx++;
408                 uart->port.x_char = 0;
409         }
410
411         /*
412          * Check the modem control lines before
413          * transmitting anything.
414          */
415         bfin_serial_mctrl_check(uart);
416
417         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
418         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
419                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
420         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
421                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
422         set_dma_config(uart->tx_dma_channel,
423                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
424                         INTR_ON_BUF,
425                         DIMENSION_LINEAR,
426                         DATA_SIZE_8,
427                         DMA_SYNC_RESTART));
428         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
429         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
430         set_dma_x_modify(uart->tx_dma_channel, 1);
431         enable_dma(uart->tx_dma_channel);
432
433 #ifdef CONFIG_BF54x
434         UART_SET_IER(uart, ETBEI);
435 #else
436         ier = UART_GET_IER(uart);
437         ier |= ETBEI;
438         UART_PUT_IER(uart, ier);
439 #endif
440 }
441
442 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
443 {
444         struct tty_struct *tty = uart->port.info->tty;
445         int i, flg, status;
446
447         status = UART_GET_LSR(uart);
448         UART_CLEAR_LSR(uart);
449
450         uart->port.icount.rx +=
451                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
452                 UART_XMIT_SIZE);
453
454         if (status & BI) {
455                 uart->port.icount.brk++;
456                 if (uart_handle_break(&uart->port))
457                         goto dma_ignore_char;
458                 status &= ~(PE | FE);
459         }
460         if (status & PE)
461                 uart->port.icount.parity++;
462         if (status & OE)
463                 uart->port.icount.overrun++;
464         if (status & FE)
465                 uart->port.icount.frame++;
466
467         status &= uart->port.read_status_mask;
468
469         if (status & BI)
470                 flg = TTY_BREAK;
471         else if (status & PE)
472                 flg = TTY_PARITY;
473         else if (status & FE)
474                 flg = TTY_FRAME;
475         else
476                 flg = TTY_NORMAL;
477
478         for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
479                 if (i >= UART_XMIT_SIZE)
480                         i = 0;
481                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
482                         uart_insert_char(&uart->port, status, OE,
483                                 uart->rx_dma_buf.buf[i], flg);
484         }
485
486  dma_ignore_char:
487         tty_flip_buffer_push(tty);
488 }
489
490 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
491 {
492         int x_pos, pos;
493
494         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
495         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
496         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
497         if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
498                 uart->rx_dma_nrows = 0;
499         x_pos = DMA_RX_XCOUNT - x_pos;
500         if (x_pos == DMA_RX_XCOUNT)
501                 x_pos = 0;
502
503         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
504         if (pos != uart->rx_dma_buf.tail) {
505                 uart->rx_dma_buf.head = pos;
506                 bfin_serial_dma_rx_chars(uart);
507                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
508         }
509
510         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
511         add_timer(&(uart->rx_dma_timer));
512 }
513
514 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
515 {
516         struct bfin_serial_port *uart = dev_id;
517         struct circ_buf *xmit = &uart->port.info->xmit;
518         unsigned short ier;
519
520         spin_lock(&uart->port.lock);
521         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
522                 disable_dma(uart->tx_dma_channel);
523                 clear_dma_irqstat(uart->tx_dma_channel);
524 #ifdef CONFIG_BF54x
525                 UART_CLEAR_IER(uart, ETBEI);
526 #else
527                 ier = UART_GET_IER(uart);
528                 ier &= ~ETBEI;
529                 UART_PUT_IER(uart, ier);
530 #endif
531                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
532                 uart->port.icount.tx += uart->tx_count;
533
534                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
535                         uart_write_wakeup(&uart->port);
536
537                 bfin_serial_dma_tx_chars(uart);
538         }
539
540         spin_unlock(&uart->port.lock);
541         return IRQ_HANDLED;
542 }
543
544 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
545 {
546         struct bfin_serial_port *uart = dev_id;
547         unsigned short irqstat;
548
549         spin_lock(&uart->port.lock);
550         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
551         clear_dma_irqstat(uart->rx_dma_channel);
552         spin_unlock(&uart->port.lock);
553
554         del_timer(&(uart->rx_dma_timer));
555         uart->rx_dma_timer.expires = jiffies;
556         add_timer(&(uart->rx_dma_timer));
557
558         return IRQ_HANDLED;
559 }
560 #endif
561
562 /*
563  * Return TIOCSER_TEMT when transmitter is not busy.
564  */
565 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
566 {
567         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
568         unsigned short lsr;
569
570         lsr = UART_GET_LSR(uart);
571         if (lsr & TEMT)
572                 return TIOCSER_TEMT;
573         else
574                 return 0;
575 }
576
577 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
578 {
579 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
580         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
581         if (uart->cts_pin < 0)
582                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
583
584 # ifdef BF54x
585         if (UART_GET_MSR(uart) & CTS)
586 # else
587         if (gpio_get_value(uart->cts_pin))
588 # endif
589                 return TIOCM_DSR | TIOCM_CAR;
590         else
591 #endif
592                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
593 }
594
595 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
596 {
597 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
598         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
599         if (uart->rts_pin < 0)
600                 return;
601
602         if (mctrl & TIOCM_RTS)
603 # ifdef BF54x
604                 UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
605 # else
606                 gpio_set_value(uart->rts_pin, 0);
607 # endif
608         else
609 # ifdef BF54x
610                 UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
611 # else
612                 gpio_set_value(uart->rts_pin, 1);
613 # endif
614 #endif
615 }
616
617 /*
618  * Handle any change of modem status signal since we were last called.
619  */
620 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
621 {
622 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
623         unsigned int status;
624         struct uart_info *info = uart->port.info;
625         struct tty_struct *tty = info->tty;
626
627         status = bfin_serial_get_mctrl(&uart->port);
628         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
629         if (!(status & TIOCM_CTS)) {
630                 tty->hw_stopped = 1;
631                 schedule_work(&uart->cts_workqueue);
632         } else {
633                 tty->hw_stopped = 0;
634         }
635 #endif
636 }
637
638 /*
639  * Interrupts are always disabled.
640  */
641 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
642 {
643         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
644         u16 lcr = UART_GET_LCR(uart);
645         if (break_state)
646                 lcr |= SB;
647         else
648                 lcr &= ~SB;
649         UART_PUT_LCR(uart, lcr);
650         SSYNC();
651 }
652
653 static int bfin_serial_startup(struct uart_port *port)
654 {
655         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
656
657 #ifdef CONFIG_SERIAL_BFIN_DMA
658         dma_addr_t dma_handle;
659
660         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
661                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
662                 return -EBUSY;
663         }
664
665         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
666                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
667                 free_dma(uart->rx_dma_channel);
668                 return -EBUSY;
669         }
670
671         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
672         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
673
674         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
675         uart->rx_dma_buf.head = 0;
676         uart->rx_dma_buf.tail = 0;
677         uart->rx_dma_nrows = 0;
678
679         set_dma_config(uart->rx_dma_channel,
680                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
681                                 INTR_ON_ROW, DIMENSION_2D,
682                                 DATA_SIZE_8,
683                                 DMA_SYNC_RESTART));
684         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
685         set_dma_x_modify(uart->rx_dma_channel, 1);
686         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
687         set_dma_y_modify(uart->rx_dma_channel, 1);
688         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
689         enable_dma(uart->rx_dma_channel);
690
691         uart->rx_dma_timer.data = (unsigned long)(uart);
692         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
693         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
694         add_timer(&(uart->rx_dma_timer));
695 #else
696         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
697              "BFIN_UART_RX", uart)) {
698 # ifdef CONFIG_KGDB_UART
699                 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
700 # endif
701                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
702                 return -EBUSY;
703 # ifdef CONFIG_KGDB_UART
704                 }
705 # endif
706         }
707
708
709         if (request_irq
710             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
711              "BFIN_UART_TX", uart)) {
712                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
713                 free_irq(uart->port.irq, uart);
714                 return -EBUSY;
715         }
716 #endif
717 #ifdef CONFIG_BF54x
718         UART_SET_IER(uart, ERBFI);
719 #else
720         UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
721 #endif
722         return 0;
723 }
724
725 static void bfin_serial_shutdown(struct uart_port *port)
726 {
727         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
728
729 #ifdef CONFIG_SERIAL_BFIN_DMA
730         disable_dma(uart->tx_dma_channel);
731         free_dma(uart->tx_dma_channel);
732         disable_dma(uart->rx_dma_channel);
733         free_dma(uart->rx_dma_channel);
734         del_timer(&(uart->rx_dma_timer));
735         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
736 #else
737 #ifdef  CONFIG_KGDB_UART
738         if (uart->port.line != CONFIG_KGDB_UART_PORT)
739 #endif
740         free_irq(uart->port.irq, uart);
741         free_irq(uart->port.irq+1, uart);
742 #endif
743 }
744
745 static void
746 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
747                    struct ktermios *old)
748 {
749         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
750         unsigned long flags;
751         unsigned int baud, quot;
752         unsigned short val, ier, lsr, lcr = 0;
753
754         switch (termios->c_cflag & CSIZE) {
755         case CS8:
756                 lcr = WLS(8);
757                 break;
758         case CS7:
759                 lcr = WLS(7);
760                 break;
761         case CS6:
762                 lcr = WLS(6);
763                 break;
764         case CS5:
765                 lcr = WLS(5);
766                 break;
767         default:
768                 printk(KERN_ERR "%s: word lengh not supported\n",
769                         __FUNCTION__);
770         }
771
772         if (termios->c_cflag & CSTOPB)
773                 lcr |= STB;
774         if (termios->c_cflag & PARENB)
775                 lcr |= PEN;
776         if (!(termios->c_cflag & PARODD))
777                 lcr |= EPS;
778         if (termios->c_cflag & CMSPAR)
779                 lcr |= STP;
780
781         port->read_status_mask = OE;
782         if (termios->c_iflag & INPCK)
783                 port->read_status_mask |= (FE | PE);
784         if (termios->c_iflag & (BRKINT | PARMRK))
785                 port->read_status_mask |= BI;
786
787         /*
788          * Characters to ignore
789          */
790         port->ignore_status_mask = 0;
791         if (termios->c_iflag & IGNPAR)
792                 port->ignore_status_mask |= FE | PE;
793         if (termios->c_iflag & IGNBRK) {
794                 port->ignore_status_mask |= BI;
795                 /*
796                  * If we're ignoring parity and break indicators,
797                  * ignore overruns too (for real raw support).
798                  */
799                 if (termios->c_iflag & IGNPAR)
800                         port->ignore_status_mask |= OE;
801         }
802
803         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
804         quot = uart_get_divisor(port, baud);
805         spin_lock_irqsave(&uart->port.lock, flags);
806
807         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
808
809         do {
810                 lsr = UART_GET_LSR(uart);
811         } while (!(lsr & TEMT));
812
813         /* Disable UART */
814         ier = UART_GET_IER(uart);
815 #ifdef CONFIG_BF54x
816         UART_CLEAR_IER(uart, 0xF);
817 #else
818         UART_PUT_IER(uart, 0);
819 #endif
820
821 #ifndef CONFIG_BF54x
822         /* Set DLAB in LCR to Access DLL and DLH */
823         val = UART_GET_LCR(uart);
824         val |= DLAB;
825         UART_PUT_LCR(uart, val);
826         SSYNC();
827 #endif
828
829         UART_PUT_DLL(uart, quot & 0xFF);
830         SSYNC();
831         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
832         SSYNC();
833
834 #ifndef CONFIG_BF54x
835         /* Clear DLAB in LCR to Access THR RBR IER */
836         val = UART_GET_LCR(uart);
837         val &= ~DLAB;
838         UART_PUT_LCR(uart, val);
839         SSYNC();
840 #endif
841
842         UART_PUT_LCR(uart, lcr);
843
844         /* Enable UART */
845 #ifdef CONFIG_BF54x
846         UART_SET_IER(uart, ier);
847 #else
848         UART_PUT_IER(uart, ier);
849 #endif
850
851         val = UART_GET_GCTL(uart);
852         val |= UCEN;
853         UART_PUT_GCTL(uart, val);
854
855         spin_unlock_irqrestore(&uart->port.lock, flags);
856 }
857
858 static const char *bfin_serial_type(struct uart_port *port)
859 {
860         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
861
862         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
863 }
864
865 /*
866  * Release the memory region(s) being used by 'port'.
867  */
868 static void bfin_serial_release_port(struct uart_port *port)
869 {
870 }
871
872 /*
873  * Request the memory region(s) being used by 'port'.
874  */
875 static int bfin_serial_request_port(struct uart_port *port)
876 {
877         return 0;
878 }
879
880 /*
881  * Configure/autoconfigure the port.
882  */
883 static void bfin_serial_config_port(struct uart_port *port, int flags)
884 {
885         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
886
887         if (flags & UART_CONFIG_TYPE &&
888             bfin_serial_request_port(&uart->port) == 0)
889                 uart->port.type = PORT_BFIN;
890 }
891
892 /*
893  * Verify the new serial_struct (for TIOCSSERIAL).
894  * The only change we allow are to the flags and type, and
895  * even then only between PORT_BFIN and PORT_UNKNOWN
896  */
897 static int
898 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
899 {
900         return 0;
901 }
902
903 static struct uart_ops bfin_serial_pops = {
904         .tx_empty       = bfin_serial_tx_empty,
905         .set_mctrl      = bfin_serial_set_mctrl,
906         .get_mctrl      = bfin_serial_get_mctrl,
907         .stop_tx        = bfin_serial_stop_tx,
908         .start_tx       = bfin_serial_start_tx,
909         .stop_rx        = bfin_serial_stop_rx,
910         .enable_ms      = bfin_serial_enable_ms,
911         .break_ctl      = bfin_serial_break_ctl,
912         .startup        = bfin_serial_startup,
913         .shutdown       = bfin_serial_shutdown,
914         .set_termios    = bfin_serial_set_termios,
915         .type           = bfin_serial_type,
916         .release_port   = bfin_serial_release_port,
917         .request_port   = bfin_serial_request_port,
918         .config_port    = bfin_serial_config_port,
919         .verify_port    = bfin_serial_verify_port,
920 };
921
922 static void __init bfin_serial_init_ports(void)
923 {
924         static int first = 1;
925         int i;
926
927         if (!first)
928                 return;
929         first = 0;
930
931         for (i = 0; i < nr_ports; i++) {
932                 bfin_serial_ports[i].port.uartclk   = get_sclk();
933                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
934                 bfin_serial_ports[i].port.line      = i;
935                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
936                 bfin_serial_ports[i].port.membase   =
937                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
938                 bfin_serial_ports[i].port.mapbase   =
939                         bfin_serial_resource[i].uart_base_addr;
940                 bfin_serial_ports[i].port.irq       =
941                         bfin_serial_resource[i].uart_irq;
942                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
943 #ifdef CONFIG_SERIAL_BFIN_DMA
944                 bfin_serial_ports[i].tx_done        = 1;
945                 bfin_serial_ports[i].tx_count       = 0;
946                 bfin_serial_ports[i].tx_dma_channel =
947                         bfin_serial_resource[i].uart_tx_dma_channel;
948                 bfin_serial_ports[i].rx_dma_channel =
949                         bfin_serial_resource[i].uart_rx_dma_channel;
950                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
951 #endif
952 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
953                 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
954                 bfin_serial_ports[i].cts_pin        =
955                         bfin_serial_resource[i].uart_cts_pin;
956                 bfin_serial_ports[i].rts_pin        =
957                         bfin_serial_resource[i].uart_rts_pin;
958 #endif
959                 bfin_serial_hw_init(&bfin_serial_ports[i]);
960         }
961
962 }
963
964 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
965 /*
966  * If the port was already initialised (eg, by a boot loader),
967  * try to determine the current setup.
968  */
969 static void __init
970 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
971                            int *parity, int *bits)
972 {
973         unsigned short status;
974
975         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
976         if (status == (ERBFI | ETBEI)) {
977                 /* ok, the port was enabled */
978                 unsigned short lcr, val;
979                 unsigned short dlh, dll;
980
981                 lcr = UART_GET_LCR(uart);
982
983                 *parity = 'n';
984                 if (lcr & PEN) {
985                         if (lcr & EPS)
986                                 *parity = 'e';
987                         else
988                                 *parity = 'o';
989                 }
990                 switch (lcr & 0x03) {
991                         case 0: *bits = 5; break;
992                         case 1: *bits = 6; break;
993                         case 2: *bits = 7; break;
994                         case 3: *bits = 8; break;
995                 }
996 #ifndef CONFIG_BF54x
997                 /* Set DLAB in LCR to Access DLL and DLH */
998                 val = UART_GET_LCR(uart);
999                 val |= DLAB;
1000                 UART_PUT_LCR(uart, val);
1001 #endif
1002
1003                 dll = UART_GET_DLL(uart);
1004                 dlh = UART_GET_DLH(uart);
1005
1006 #ifndef CONFIG_BF54x
1007                 /* Clear DLAB in LCR to Access THR RBR IER */
1008                 val = UART_GET_LCR(uart);
1009                 val &= ~DLAB;
1010                 UART_PUT_LCR(uart, val);
1011 #endif
1012
1013                 *baud = get_sclk() / (16*(dll | dlh << 8));
1014         }
1015         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
1016 }
1017 #endif
1018
1019 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1020 static struct uart_driver bfin_serial_reg;
1021
1022 static int __init
1023 bfin_serial_console_setup(struct console *co, char *options)
1024 {
1025         struct bfin_serial_port *uart;
1026 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1027         int baud = 57600;
1028         int bits = 8;
1029         int parity = 'n';
1030 #  ifdef CONFIG_SERIAL_BFIN_CTSRTS
1031         int flow = 'r';
1032 #  else
1033         int flow = 'n';
1034 #  endif
1035 # endif
1036
1037         /*
1038          * Check whether an invalid uart number has been specified, and
1039          * if so, search for the first available port that does have
1040          * console support.
1041          */
1042         if (co->index == -1 || co->index >= nr_ports)
1043                 co->index = 0;
1044         uart = &bfin_serial_ports[co->index];
1045
1046 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1047         if (options)
1048                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1049         else
1050                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1051
1052         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1053 # else
1054         return 0;
1055 # endif
1056 }
1057 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1058                                  defined (CONFIG_EARLY_PRINTK) */
1059
1060 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1061 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1062 {
1063         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1064         while (!(UART_GET_LSR(uart) & THRE))
1065                 barrier();
1066         UART_PUT_CHAR(uart, ch);
1067         SSYNC();
1068 }
1069
1070 /*
1071  * Interrupts are disabled on entering
1072  */
1073 static void
1074 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1075 {
1076         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1077         int flags = 0;
1078
1079         spin_lock_irqsave(&uart->port.lock, flags);
1080         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1081         spin_unlock_irqrestore(&uart->port.lock, flags);
1082
1083 }
1084
1085 static struct console bfin_serial_console = {
1086         .name           = BFIN_SERIAL_NAME,
1087         .write          = bfin_serial_console_write,
1088         .device         = uart_console_device,
1089         .setup          = bfin_serial_console_setup,
1090         .flags          = CON_PRINTBUFFER,
1091         .index          = -1,
1092         .data           = &bfin_serial_reg,
1093 };
1094
1095 static int __init bfin_serial_rs_console_init(void)
1096 {
1097         bfin_serial_init_ports();
1098         register_console(&bfin_serial_console);
1099 #ifdef CONFIG_KGDB_UART
1100         kgdb_entry_state = 0;
1101         init_kgdb_uart();
1102 #endif
1103         return 0;
1104 }
1105 console_initcall(bfin_serial_rs_console_init);
1106
1107 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1108 #else
1109 #define BFIN_SERIAL_CONSOLE     NULL
1110 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1111
1112
1113 #ifdef CONFIG_EARLY_PRINTK
1114 static __init void early_serial_putc(struct uart_port *port, int ch)
1115 {
1116         unsigned timeout = 0xffff;
1117         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1118
1119         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1120                 cpu_relax();
1121         UART_PUT_CHAR(uart, ch);
1122 }
1123
1124 static __init void early_serial_write(struct console *con, const char *s,
1125                                         unsigned int n)
1126 {
1127         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1128         unsigned int i;
1129
1130         for (i = 0; i < n; i++, s++) {
1131                 if (*s == '\n')
1132                         early_serial_putc(&uart->port, '\r');
1133                 early_serial_putc(&uart->port, *s);
1134         }
1135 }
1136
1137 static struct __init console bfin_early_serial_console = {
1138         .name = "early_BFuart",
1139         .write = early_serial_write,
1140         .device = uart_console_device,
1141         .flags = CON_PRINTBUFFER,
1142         .setup = bfin_serial_console_setup,
1143         .index = -1,
1144         .data  = &bfin_serial_reg,
1145 };
1146
1147 struct console __init *bfin_earlyserial_init(unsigned int port,
1148                                                 unsigned int cflag)
1149 {
1150         struct bfin_serial_port *uart;
1151         struct ktermios t;
1152
1153         if (port == -1 || port >= nr_ports)
1154                 port = 0;
1155         bfin_serial_init_ports();
1156         bfin_early_serial_console.index = port;
1157         uart = &bfin_serial_ports[port];
1158         t.c_cflag = cflag;
1159         t.c_iflag = 0;
1160         t.c_oflag = 0;
1161         t.c_lflag = ICANON;
1162         t.c_line = port;
1163         bfin_serial_set_termios(&uart->port, &t, &t);
1164         return &bfin_early_serial_console;
1165 }
1166
1167 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1168
1169 static struct uart_driver bfin_serial_reg = {
1170         .owner                  = THIS_MODULE,
1171         .driver_name            = "bfin-uart",
1172         .dev_name               = BFIN_SERIAL_NAME,
1173         .major                  = BFIN_SERIAL_MAJOR,
1174         .minor                  = BFIN_SERIAL_MINOR,
1175         .nr                     = NR_PORTS,
1176         .cons                   = BFIN_SERIAL_CONSOLE,
1177 };
1178
1179 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1180 {
1181         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1182
1183         if (uart)
1184                 uart_suspend_port(&bfin_serial_reg, &uart->port);
1185
1186         return 0;
1187 }
1188
1189 static int bfin_serial_resume(struct platform_device *dev)
1190 {
1191         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1192
1193         if (uart)
1194                 uart_resume_port(&bfin_serial_reg, &uart->port);
1195
1196         return 0;
1197 }
1198
1199 static int bfin_serial_probe(struct platform_device *dev)
1200 {
1201         struct resource *res = dev->resource;
1202         int i;
1203
1204         for (i = 0; i < dev->num_resources; i++, res++)
1205                 if (res->flags & IORESOURCE_MEM)
1206                         break;
1207
1208         if (i < dev->num_resources) {
1209                 for (i = 0; i < nr_ports; i++, res++) {
1210                         if (bfin_serial_ports[i].port.mapbase != res->start)
1211                                 continue;
1212                         bfin_serial_ports[i].port.dev = &dev->dev;
1213                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1214                         platform_set_drvdata(dev, &bfin_serial_ports[i]);
1215                 }
1216         }
1217
1218         return 0;
1219 }
1220
1221 static int bfin_serial_remove(struct platform_device *pdev)
1222 {
1223         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1224
1225
1226 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1227         gpio_free(uart->cts_pin);
1228         gpio_free(uart->rts_pin);
1229 #endif
1230
1231         platform_set_drvdata(pdev, NULL);
1232
1233         if (uart)
1234                 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1235
1236         return 0;
1237 }
1238
1239 static struct platform_driver bfin_serial_driver = {
1240         .probe          = bfin_serial_probe,
1241         .remove         = bfin_serial_remove,
1242         .suspend        = bfin_serial_suspend,
1243         .resume         = bfin_serial_resume,
1244         .driver         = {
1245                 .name   = "bfin-uart",
1246         },
1247 };
1248
1249 static int __init bfin_serial_init(void)
1250 {
1251         int ret;
1252 #ifdef CONFIG_KGDB_UART
1253         struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1254         struct ktermios t;
1255 #endif
1256
1257         pr_info("Serial: Blackfin serial driver\n");
1258
1259         bfin_serial_init_ports();
1260
1261         ret = uart_register_driver(&bfin_serial_reg);
1262         if (ret == 0) {
1263                 ret = platform_driver_register(&bfin_serial_driver);
1264                 if (ret) {
1265                         pr_debug("uart register failed\n");
1266                         uart_unregister_driver(&bfin_serial_reg);
1267                 }
1268         }
1269 #ifdef CONFIG_KGDB_UART
1270         if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1271                 request_irq(uart->port.irq, bfin_serial_rx_int,
1272                         IRQF_DISABLED, "BFIN_UART_RX", uart);
1273                 pr_info("Request irq for kgdb uart port\n");
1274 #ifdef CONFIG_BF54x
1275                 UART_SET_IER(uart, ERBFI);
1276 #else
1277                 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1278 #endif
1279                 SSYNC();
1280                 t.c_cflag = CS8|B57600;
1281                 t.c_iflag = 0;
1282                 t.c_oflag = 0;
1283                 t.c_lflag = ICANON;
1284                 t.c_line = CONFIG_KGDB_UART_PORT;
1285                 bfin_serial_set_termios(&uart->port, &t, &t);
1286         }
1287 #endif
1288         return ret;
1289 }
1290
1291 static void __exit bfin_serial_exit(void)
1292 {
1293         platform_driver_unregister(&bfin_serial_driver);
1294         uart_unregister_driver(&bfin_serial_reg);
1295 }
1296
1297 module_init(bfin_serial_init);
1298 module_exit(bfin_serial_exit);
1299
1300 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1301 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1302 MODULE_LICENSE("GPL");
1303 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);