2 * Universal Flash Storage Host controller driver Core
4 * This code is based on drivers/scsi/ufs/ufshcd.c
5 * Copyright (C) 2011-2013 Samsung India Software Operations
6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
40 #include <linux/async.h>
41 #include <linux/devfreq.h>
42 #include <linux/nls.h>
44 #include <linux/bitfield.h>
46 #include "ufs_quirks.h"
48 #include "ufs-sysfs.h"
51 #define CREATE_TRACE_POINTS
52 #include <trace/events/ufs.h>
54 #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
57 /* UIC command timeout, unit: ms */
58 #define UIC_CMD_TIMEOUT 500
60 /* NOP OUT retries waiting for NOP IN response */
61 #define NOP_OUT_RETRIES 10
62 /* Timeout after 30 msecs if NOP OUT hangs without response */
63 #define NOP_OUT_TIMEOUT 30 /* msecs */
65 /* Query request retries */
66 #define QUERY_REQ_RETRIES 3
67 /* Query request timeout */
68 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
70 /* Task management command timeout */
71 #define TM_CMD_TIMEOUT 100 /* msecs */
73 /* maximum number of retries for a general UIC command */
74 #define UFS_UIC_COMMAND_RETRIES 3
76 /* maximum number of link-startup retries */
77 #define DME_LINKSTARTUP_RETRIES 3
79 /* Maximum retries for Hibern8 enter */
80 #define UIC_HIBERN8_ENTER_RETRIES 3
82 /* maximum number of reset retries before giving up */
83 #define MAX_HOST_RESET_RETRIES 5
85 /* Expose the flag value from utp_upiu_query.value */
86 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
88 /* Interrupt aggregation default timeout, unit: 40us */
89 #define INT_AGGR_DEF_TO 0x02
91 #define ufshcd_toggle_vreg(_dev, _vreg, _on) \
95 _ret = ufshcd_enable_vreg(_dev, _vreg); \
97 _ret = ufshcd_disable_vreg(_dev, _vreg); \
101 #define ufshcd_hex_dump(prefix_str, buf, len) do { \
102 size_t __len = (len); \
103 print_hex_dump(KERN_ERR, prefix_str, \
104 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
105 16, 4, buf, __len, false); \
108 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
113 regs = kzalloc(len, GFP_KERNEL);
117 memcpy_fromio(regs, hba->mmio_base + offset, len);
118 ufshcd_hex_dump(prefix, regs, len);
123 EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
126 UFSHCD_MAX_CHANNEL = 0,
128 UFSHCD_CMD_PER_LUN = 32,
129 UFSHCD_CAN_QUEUE = 32,
136 UFSHCD_STATE_OPERATIONAL,
137 UFSHCD_STATE_EH_SCHEDULED,
140 /* UFSHCD error handling flags */
142 UFSHCD_EH_IN_PROGRESS = (1 << 0),
145 /* UFSHCD UIC layer error flags */
147 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
148 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
149 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
150 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
151 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
152 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
155 #define ufshcd_set_eh_in_progress(h) \
156 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
157 #define ufshcd_eh_in_progress(h) \
158 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
159 #define ufshcd_clear_eh_in_progress(h) \
160 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
162 #define ufshcd_set_ufs_dev_active(h) \
163 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
164 #define ufshcd_set_ufs_dev_sleep(h) \
165 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
166 #define ufshcd_set_ufs_dev_poweroff(h) \
167 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
168 #define ufshcd_is_ufs_dev_active(h) \
169 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
170 #define ufshcd_is_ufs_dev_sleep(h) \
171 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
172 #define ufshcd_is_ufs_dev_poweroff(h) \
173 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
175 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
176 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
177 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
178 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
179 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
180 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
181 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
184 static inline enum ufs_dev_pwr_mode
185 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
187 return ufs_pm_lvl_states[lvl].dev_state;
190 static inline enum uic_link_state
191 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
193 return ufs_pm_lvl_states[lvl].link_state;
196 static inline enum ufs_pm_level
197 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
198 enum uic_link_state link_state)
200 enum ufs_pm_level lvl;
202 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
203 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
204 (ufs_pm_lvl_states[lvl].link_state == link_state))
208 /* if no match found, return the level 0 */
212 static struct ufs_dev_fix ufs_fixups[] = {
213 /* UFS cards deviations table */
214 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
215 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
216 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
217 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
218 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
219 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
220 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
221 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
222 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
223 UFS_DEVICE_QUIRK_PA_TACTIVATE),
224 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
225 UFS_DEVICE_QUIRK_PA_TACTIVATE),
226 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
227 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
228 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
229 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
234 static void ufshcd_tmc_handler(struct ufs_hba *hba);
235 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
236 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
237 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
238 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
239 static void ufshcd_hba_exit(struct ufs_hba *hba);
240 static int ufshcd_probe_hba(struct ufs_hba *hba);
241 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
243 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
244 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
245 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
246 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
247 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
248 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
249 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
250 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
251 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
252 static irqreturn_t ufshcd_intr(int irq, void *__hba);
253 static int ufshcd_change_power_mode(struct ufs_hba *hba,
254 struct ufs_pa_layer_attr *pwr_mode);
255 static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
257 return tag >= 0 && tag < hba->nutrs;
260 static inline int ufshcd_enable_irq(struct ufs_hba *hba)
264 if (!hba->is_irq_enabled) {
265 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
268 dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
270 hba->is_irq_enabled = true;
276 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
278 if (hba->is_irq_enabled) {
279 free_irq(hba->irq, hba);
280 hba->is_irq_enabled = false;
284 static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
286 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
287 scsi_unblock_requests(hba->host);
290 static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
292 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
293 scsi_block_requests(hba->host);
296 /* replace non-printable or non-ASCII characters with spaces */
297 static inline void ufshcd_remove_non_printable(char *val)
302 if (*val < 0x20 || *val > 0x7e)
306 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
309 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
311 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
314 static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
317 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
319 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
322 static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
325 int off = (int)tag - hba->nutrs;
326 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
328 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
329 &descp->input_param1);
332 static void ufshcd_add_command_trace(struct ufs_hba *hba,
333 unsigned int tag, const char *str)
338 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
339 int transfer_len = -1;
341 if (!trace_ufshcd_command_enabled()) {
342 /* trace UPIU W/O tracing command */
344 ufshcd_add_cmd_upiu_trace(hba, tag, str);
348 if (lrbp->cmd) { /* data phase exists */
349 /* trace UPIU also */
350 ufshcd_add_cmd_upiu_trace(hba, tag, str);
351 opcode = (u8)(*lrbp->cmd->cmnd);
352 if ((opcode == READ_10) || (opcode == WRITE_10)) {
354 * Currently we only fully trace read(10) and write(10)
357 if (lrbp->cmd->request && lrbp->cmd->request->bio)
359 lrbp->cmd->request->bio->bi_iter.bi_sector;
360 transfer_len = be32_to_cpu(
361 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
365 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
366 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
367 trace_ufshcd_command(dev_name(hba->dev), str, tag,
368 doorbell, transfer_len, intr, lba, opcode);
371 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
373 struct ufs_clk_info *clki;
374 struct list_head *head = &hba->clk_list_head;
376 if (list_empty(head))
379 list_for_each_entry(clki, head, list) {
380 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
382 dev_err(hba->dev, "clk: %s, rate: %u\n",
383 clki->name, clki->curr_freq);
387 static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
388 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
393 for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
394 int p = (i + err_hist->pos) % UIC_ERR_REG_HIST_LENGTH;
396 if (err_hist->reg[p] == 0)
398 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, i,
399 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
404 dev_err(hba->dev, "No record of %s uic errors\n", err_name);
407 static void ufshcd_print_host_regs(struct ufs_hba *hba)
409 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
410 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
411 hba->ufs_version, hba->capabilities);
413 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
414 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
416 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
417 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
418 hba->ufs_stats.hibern8_exit_cnt);
420 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
421 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
422 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
423 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
424 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
426 ufshcd_print_clk_freqs(hba);
428 if (hba->vops && hba->vops->dbg_register_dump)
429 hba->vops->dbg_register_dump(hba);
433 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
435 struct ufshcd_lrb *lrbp;
439 for_each_set_bit(tag, &bitmap, hba->nutrs) {
440 lrbp = &hba->lrb[tag];
442 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
443 tag, ktime_to_us(lrbp->issue_time_stamp));
444 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
445 tag, ktime_to_us(lrbp->compl_time_stamp));
447 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
448 tag, (u64)lrbp->utrd_dma_addr);
450 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
451 sizeof(struct utp_transfer_req_desc));
452 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
453 (u64)lrbp->ucd_req_dma_addr);
454 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
455 sizeof(struct utp_upiu_req));
456 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
457 (u64)lrbp->ucd_rsp_dma_addr);
458 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
459 sizeof(struct utp_upiu_rsp));
461 prdt_length = le16_to_cpu(
462 lrbp->utr_descriptor_ptr->prd_table_length);
464 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
466 (u64)lrbp->ucd_prdt_dma_addr);
469 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
470 sizeof(struct ufshcd_sg_entry) * prdt_length);
474 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
478 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
479 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
481 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
482 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
486 static void ufshcd_print_host_state(struct ufs_hba *hba)
488 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
489 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
490 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
491 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
492 hba->saved_err, hba->saved_uic_err);
493 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
494 hba->curr_dev_pwr_mode, hba->uic_link_state);
495 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
496 hba->pm_op_in_progress, hba->is_sys_suspended);
497 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
498 hba->auto_bkops_enabled, hba->host->host_self_blocked);
499 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
500 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
501 hba->eh_flags, hba->req_abort_count);
502 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
503 hba->capabilities, hba->caps);
504 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
509 * ufshcd_print_pwr_info - print power params as saved in hba
511 * @hba: per-adapter instance
513 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
515 static const char * const names[] = {
525 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
527 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
528 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
529 names[hba->pwr_info.pwr_rx],
530 names[hba->pwr_info.pwr_tx],
531 hba->pwr_info.hs_rate);
535 * ufshcd_wait_for_register - wait for register value to change
536 * @hba - per-adapter interface
537 * @reg - mmio register offset
538 * @mask - mask to apply to read register value
539 * @val - wait condition
540 * @interval_us - polling interval in microsecs
541 * @timeout_ms - timeout in millisecs
542 * @can_sleep - perform sleep or just spin
544 * Returns -ETIMEDOUT on error, zero on success
546 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
547 u32 val, unsigned long interval_us,
548 unsigned long timeout_ms, bool can_sleep)
551 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
553 /* ignore bits that we don't intend to wait on */
556 while ((ufshcd_readl(hba, reg) & mask) != val) {
558 usleep_range(interval_us, interval_us + 50);
561 if (time_after(jiffies, timeout)) {
562 if ((ufshcd_readl(hba, reg) & mask) != val)
572 * ufshcd_get_intr_mask - Get the interrupt bit mask
573 * @hba: Pointer to adapter instance
575 * Returns interrupt bit mask per version
577 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
581 switch (hba->ufs_version) {
582 case UFSHCI_VERSION_10:
583 intr_mask = INTERRUPT_MASK_ALL_VER_10;
585 case UFSHCI_VERSION_11:
586 case UFSHCI_VERSION_20:
587 intr_mask = INTERRUPT_MASK_ALL_VER_11;
589 case UFSHCI_VERSION_21:
591 intr_mask = INTERRUPT_MASK_ALL_VER_21;
599 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
600 * @hba: Pointer to adapter instance
602 * Returns UFSHCI version supported by the controller
604 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
606 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
607 return ufshcd_vops_get_ufs_hci_version(hba);
609 return ufshcd_readl(hba, REG_UFS_VERSION);
613 * ufshcd_is_device_present - Check if any device connected to
614 * the host controller
615 * @hba: pointer to adapter instance
617 * Returns true if device present, false if no device detected
619 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
621 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
622 DEVICE_PRESENT) ? true : false;
626 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
627 * @lrbp: pointer to local command reference block
629 * This function is used to get the OCS field from UTRD
630 * Returns the OCS field in the UTRD
632 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
634 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
638 * ufshcd_get_tm_free_slot - get a free slot for task management request
639 * @hba: per adapter instance
640 * @free_slot: pointer to variable with available slot value
642 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
643 * Returns 0 if free slot is not available, else return 1 with tag value
646 static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
655 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
656 if (tag >= hba->nutmrs)
658 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
666 static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
668 clear_bit_unlock(slot, &hba->tm_slots_in_use);
672 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
673 * @hba: per adapter instance
674 * @pos: position of the bit to be cleared
676 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
678 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
679 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
681 ufshcd_writel(hba, ~(1 << pos),
682 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
686 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
687 * @hba: per adapter instance
688 * @pos: position of the bit to be cleared
690 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
692 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
693 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
695 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
699 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
700 * @hba: per adapter instance
701 * @tag: position of the bit to be cleared
703 static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
705 __clear_bit(tag, &hba->outstanding_reqs);
709 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
710 * @reg: Register value of host controller status
712 * Returns integer, 0 on Success and positive value if failed
714 static inline int ufshcd_get_lists_status(u32 reg)
716 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
720 * ufshcd_get_uic_cmd_result - Get the UIC command result
721 * @hba: Pointer to adapter instance
723 * This function gets the result of UIC command completion
724 * Returns 0 on success, non zero value on error
726 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
728 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
729 MASK_UIC_COMMAND_RESULT;
733 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
734 * @hba: Pointer to adapter instance
736 * This function gets UIC command argument3
737 * Returns 0 on success, non zero value on error
739 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
741 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
745 * ufshcd_get_req_rsp - returns the TR response transaction type
746 * @ucd_rsp_ptr: pointer to response UPIU
749 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
751 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
755 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
756 * @ucd_rsp_ptr: pointer to response UPIU
758 * This function gets the response status and scsi_status from response UPIU
759 * Returns the response result code.
762 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
764 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
768 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
770 * @ucd_rsp_ptr: pointer to response UPIU
772 * Return the data segment length.
774 static inline unsigned int
775 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
777 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
778 MASK_RSP_UPIU_DATA_SEG_LEN;
782 * ufshcd_is_exception_event - Check if the device raised an exception event
783 * @ucd_rsp_ptr: pointer to response UPIU
785 * The function checks if the device raised an exception event indicated in
786 * the Device Information field of response UPIU.
788 * Returns true if exception is raised, false otherwise.
790 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
792 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
793 MASK_RSP_EXCEPTION_EVENT ? true : false;
797 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
798 * @hba: per adapter instance
801 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
803 ufshcd_writel(hba, INT_AGGR_ENABLE |
804 INT_AGGR_COUNTER_AND_TIMER_RESET,
805 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
809 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
810 * @hba: per adapter instance
811 * @cnt: Interrupt aggregation counter threshold
812 * @tmout: Interrupt aggregation timeout value
815 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
817 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
818 INT_AGGR_COUNTER_THLD_VAL(cnt) |
819 INT_AGGR_TIMEOUT_VAL(tmout),
820 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
824 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
825 * @hba: per adapter instance
827 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
829 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
833 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
834 * When run-stop registers are set to 1, it indicates the
835 * host controller that it can process the requests
836 * @hba: per adapter instance
838 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
840 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
841 REG_UTP_TASK_REQ_LIST_RUN_STOP);
842 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
843 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
847 * ufshcd_hba_start - Start controller initialization sequence
848 * @hba: per adapter instance
850 static inline void ufshcd_hba_start(struct ufs_hba *hba)
852 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
856 * ufshcd_is_hba_active - Get controller state
857 * @hba: per adapter instance
859 * Returns false if controller is active, true otherwise
861 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
863 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
867 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
869 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
870 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
871 (hba->ufs_version == UFSHCI_VERSION_11))
872 return UFS_UNIPRO_VER_1_41;
874 return UFS_UNIPRO_VER_1_6;
876 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
878 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
881 * If both host and device support UniPro ver1.6 or later, PA layer
882 * parameters tuning happens during link startup itself.
884 * We can manually tune PA layer parameters if either host or device
885 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
886 * logic simple, we will only do manual tuning if local unipro version
887 * doesn't support ver1.6 or later.
889 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
895 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
898 struct ufs_clk_info *clki;
899 struct list_head *head = &hba->clk_list_head;
900 ktime_t start = ktime_get();
901 bool clk_state_changed = false;
903 if (list_empty(head))
906 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
910 list_for_each_entry(clki, head, list) {
911 if (!IS_ERR_OR_NULL(clki->clk)) {
912 if (scale_up && clki->max_freq) {
913 if (clki->curr_freq == clki->max_freq)
916 clk_state_changed = true;
917 ret = clk_set_rate(clki->clk, clki->max_freq);
919 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
920 __func__, clki->name,
921 clki->max_freq, ret);
924 trace_ufshcd_clk_scaling(dev_name(hba->dev),
925 "scaled up", clki->name,
929 clki->curr_freq = clki->max_freq;
931 } else if (!scale_up && clki->min_freq) {
932 if (clki->curr_freq == clki->min_freq)
935 clk_state_changed = true;
936 ret = clk_set_rate(clki->clk, clki->min_freq);
938 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
939 __func__, clki->name,
940 clki->min_freq, ret);
943 trace_ufshcd_clk_scaling(dev_name(hba->dev),
944 "scaled down", clki->name,
947 clki->curr_freq = clki->min_freq;
950 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
951 clki->name, clk_get_rate(clki->clk));
954 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
957 if (clk_state_changed)
958 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
959 (scale_up ? "up" : "down"),
960 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
965 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
966 * @hba: per adapter instance
967 * @scale_up: True if scaling up and false if scaling down
969 * Returns true if scaling is required, false otherwise.
971 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
974 struct ufs_clk_info *clki;
975 struct list_head *head = &hba->clk_list_head;
977 if (list_empty(head))
980 list_for_each_entry(clki, head, list) {
981 if (!IS_ERR_OR_NULL(clki->clk)) {
982 if (scale_up && clki->max_freq) {
983 if (clki->curr_freq == clki->max_freq)
986 } else if (!scale_up && clki->min_freq) {
987 if (clki->curr_freq == clki->min_freq)
997 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1000 unsigned long flags;
1004 bool timeout = false, do_last_check = false;
1007 ufshcd_hold(hba, false);
1008 spin_lock_irqsave(hba->host->host_lock, flags);
1010 * Wait for all the outstanding tasks/transfer requests.
1011 * Verify by checking the doorbell registers are clear.
1013 start = ktime_get();
1015 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1020 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1021 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1022 if (!tm_doorbell && !tr_doorbell) {
1025 } else if (do_last_check) {
1029 spin_unlock_irqrestore(hba->host->host_lock, flags);
1031 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1035 * We might have scheduled out for long time so make
1036 * sure to check if doorbells are cleared by this time
1039 do_last_check = true;
1041 spin_lock_irqsave(hba->host->host_lock, flags);
1042 } while (tm_doorbell || tr_doorbell);
1046 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1047 __func__, tm_doorbell, tr_doorbell);
1051 spin_unlock_irqrestore(hba->host->host_lock, flags);
1052 ufshcd_release(hba);
1057 * ufshcd_scale_gear - scale up/down UFS gear
1058 * @hba: per adapter instance
1059 * @scale_up: True for scaling up gear and false for scaling down
1061 * Returns 0 for success,
1062 * Returns -EBUSY if scaling can't happen at this time
1063 * Returns non-zero for any other errors
1065 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1067 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1069 struct ufs_pa_layer_attr new_pwr_info;
1072 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1073 sizeof(struct ufs_pa_layer_attr));
1075 memcpy(&new_pwr_info, &hba->pwr_info,
1076 sizeof(struct ufs_pa_layer_attr));
1078 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1079 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1080 /* save the current power mode */
1081 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1083 sizeof(struct ufs_pa_layer_attr));
1085 /* scale down gear */
1086 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1087 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1091 /* check if the power mode needs to be changed or not? */
1092 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1095 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1097 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1098 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1103 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1105 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1108 * make sure that there are no outstanding requests when
1109 * clock scaling is in progress
1111 ufshcd_scsi_block_requests(hba);
1112 down_write(&hba->clk_scaling_lock);
1113 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1115 up_write(&hba->clk_scaling_lock);
1116 ufshcd_scsi_unblock_requests(hba);
1122 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1124 up_write(&hba->clk_scaling_lock);
1125 ufshcd_scsi_unblock_requests(hba);
1129 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1130 * @hba: per adapter instance
1131 * @scale_up: True for scaling up and false for scalin down
1133 * Returns 0 for success,
1134 * Returns -EBUSY if scaling can't happen at this time
1135 * Returns non-zero for any other errors
1137 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1141 /* let's not get into low power until clock scaling is completed */
1142 ufshcd_hold(hba, false);
1144 ret = ufshcd_clock_scaling_prepare(hba);
1148 /* scale down the gear before scaling down clocks */
1150 ret = ufshcd_scale_gear(hba, false);
1155 ret = ufshcd_scale_clks(hba, scale_up);
1158 ufshcd_scale_gear(hba, true);
1162 /* scale up the gear after scaling up clocks */
1164 ret = ufshcd_scale_gear(hba, true);
1166 ufshcd_scale_clks(hba, false);
1171 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1174 ufshcd_clock_scaling_unprepare(hba);
1175 ufshcd_release(hba);
1179 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1181 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1182 clk_scaling.suspend_work);
1183 unsigned long irq_flags;
1185 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1186 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1187 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1190 hba->clk_scaling.is_suspended = true;
1191 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1193 __ufshcd_suspend_clkscaling(hba);
1196 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1198 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1199 clk_scaling.resume_work);
1200 unsigned long irq_flags;
1202 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1203 if (!hba->clk_scaling.is_suspended) {
1204 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1207 hba->clk_scaling.is_suspended = false;
1208 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1210 devfreq_resume_device(hba->devfreq);
1213 static int ufshcd_devfreq_target(struct device *dev,
1214 unsigned long *freq, u32 flags)
1217 struct ufs_hba *hba = dev_get_drvdata(dev);
1219 bool scale_up, sched_clk_scaling_suspend_work = false;
1220 struct list_head *clk_list = &hba->clk_list_head;
1221 struct ufs_clk_info *clki;
1222 unsigned long irq_flags;
1224 if (!ufshcd_is_clkscaling_supported(hba))
1227 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1228 if (ufshcd_eh_in_progress(hba)) {
1229 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1233 if (!hba->clk_scaling.active_reqs)
1234 sched_clk_scaling_suspend_work = true;
1236 if (list_empty(clk_list)) {
1237 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1241 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1242 scale_up = (*freq == clki->max_freq) ? true : false;
1243 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1244 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1246 goto out; /* no state change required */
1248 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1250 start = ktime_get();
1251 ret = ufshcd_devfreq_scale(hba, scale_up);
1253 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1254 (scale_up ? "up" : "down"),
1255 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1258 if (sched_clk_scaling_suspend_work)
1259 queue_work(hba->clk_scaling.workq,
1260 &hba->clk_scaling.suspend_work);
1266 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1267 struct devfreq_dev_status *stat)
1269 struct ufs_hba *hba = dev_get_drvdata(dev);
1270 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1271 unsigned long flags;
1273 if (!ufshcd_is_clkscaling_supported(hba))
1276 memset(stat, 0, sizeof(*stat));
1278 spin_lock_irqsave(hba->host->host_lock, flags);
1279 if (!scaling->window_start_t)
1282 if (scaling->is_busy_started)
1283 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1284 scaling->busy_start_t));
1286 stat->total_time = jiffies_to_usecs((long)jiffies -
1287 (long)scaling->window_start_t);
1288 stat->busy_time = scaling->tot_busy_t;
1290 scaling->window_start_t = jiffies;
1291 scaling->tot_busy_t = 0;
1293 if (hba->outstanding_reqs) {
1294 scaling->busy_start_t = ktime_get();
1295 scaling->is_busy_started = true;
1297 scaling->busy_start_t = 0;
1298 scaling->is_busy_started = false;
1300 spin_unlock_irqrestore(hba->host->host_lock, flags);
1304 static struct devfreq_dev_profile ufs_devfreq_profile = {
1306 .target = ufshcd_devfreq_target,
1307 .get_dev_status = ufshcd_devfreq_get_dev_status,
1310 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1312 struct list_head *clk_list = &hba->clk_list_head;
1313 struct ufs_clk_info *clki;
1314 struct devfreq *devfreq;
1317 /* Skip devfreq if we don't have any clocks in the list */
1318 if (list_empty(clk_list))
1321 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1322 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1323 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1325 devfreq = devfreq_add_device(hba->dev,
1326 &ufs_devfreq_profile,
1327 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1329 if (IS_ERR(devfreq)) {
1330 ret = PTR_ERR(devfreq);
1331 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1333 dev_pm_opp_remove(hba->dev, clki->min_freq);
1334 dev_pm_opp_remove(hba->dev, clki->max_freq);
1338 hba->devfreq = devfreq;
1343 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1345 struct list_head *clk_list = &hba->clk_list_head;
1346 struct ufs_clk_info *clki;
1351 devfreq_remove_device(hba->devfreq);
1352 hba->devfreq = NULL;
1354 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1355 dev_pm_opp_remove(hba->dev, clki->min_freq);
1356 dev_pm_opp_remove(hba->dev, clki->max_freq);
1359 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1361 unsigned long flags;
1363 devfreq_suspend_device(hba->devfreq);
1364 spin_lock_irqsave(hba->host->host_lock, flags);
1365 hba->clk_scaling.window_start_t = 0;
1366 spin_unlock_irqrestore(hba->host->host_lock, flags);
1369 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1371 unsigned long flags;
1372 bool suspend = false;
1374 if (!ufshcd_is_clkscaling_supported(hba))
1377 spin_lock_irqsave(hba->host->host_lock, flags);
1378 if (!hba->clk_scaling.is_suspended) {
1380 hba->clk_scaling.is_suspended = true;
1382 spin_unlock_irqrestore(hba->host->host_lock, flags);
1385 __ufshcd_suspend_clkscaling(hba);
1388 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1390 unsigned long flags;
1391 bool resume = false;
1393 if (!ufshcd_is_clkscaling_supported(hba))
1396 spin_lock_irqsave(hba->host->host_lock, flags);
1397 if (hba->clk_scaling.is_suspended) {
1399 hba->clk_scaling.is_suspended = false;
1401 spin_unlock_irqrestore(hba->host->host_lock, flags);
1404 devfreq_resume_device(hba->devfreq);
1407 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1408 struct device_attribute *attr, char *buf)
1410 struct ufs_hba *hba = dev_get_drvdata(dev);
1412 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1415 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1416 struct device_attribute *attr, const char *buf, size_t count)
1418 struct ufs_hba *hba = dev_get_drvdata(dev);
1422 if (kstrtou32(buf, 0, &value))
1426 if (value == hba->clk_scaling.is_allowed)
1429 pm_runtime_get_sync(hba->dev);
1430 ufshcd_hold(hba, false);
1432 cancel_work_sync(&hba->clk_scaling.suspend_work);
1433 cancel_work_sync(&hba->clk_scaling.resume_work);
1435 hba->clk_scaling.is_allowed = value;
1438 ufshcd_resume_clkscaling(hba);
1440 ufshcd_suspend_clkscaling(hba);
1441 err = ufshcd_devfreq_scale(hba, true);
1443 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1447 ufshcd_release(hba);
1448 pm_runtime_put_sync(hba->dev);
1453 static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1455 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1456 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1457 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1458 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1459 hba->clk_scaling.enable_attr.attr.mode = 0644;
1460 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1461 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1464 static void ufshcd_ungate_work(struct work_struct *work)
1467 unsigned long flags;
1468 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1469 clk_gating.ungate_work);
1471 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1473 spin_lock_irqsave(hba->host->host_lock, flags);
1474 if (hba->clk_gating.state == CLKS_ON) {
1475 spin_unlock_irqrestore(hba->host->host_lock, flags);
1479 spin_unlock_irqrestore(hba->host->host_lock, flags);
1480 ufshcd_setup_clocks(hba, true);
1482 /* Exit from hibern8 */
1483 if (ufshcd_can_hibern8_during_gating(hba)) {
1484 /* Prevent gating in this path */
1485 hba->clk_gating.is_suspended = true;
1486 if (ufshcd_is_link_hibern8(hba)) {
1487 ret = ufshcd_uic_hibern8_exit(hba);
1489 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1492 ufshcd_set_link_active(hba);
1494 hba->clk_gating.is_suspended = false;
1497 ufshcd_scsi_unblock_requests(hba);
1501 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1502 * Also, exit from hibern8 mode and set the link as active.
1503 * @hba: per adapter instance
1504 * @async: This indicates whether caller should ungate clocks asynchronously.
1506 int ufshcd_hold(struct ufs_hba *hba, bool async)
1509 unsigned long flags;
1511 if (!ufshcd_is_clkgating_allowed(hba))
1513 spin_lock_irqsave(hba->host->host_lock, flags);
1514 hba->clk_gating.active_reqs++;
1516 if (ufshcd_eh_in_progress(hba)) {
1517 spin_unlock_irqrestore(hba->host->host_lock, flags);
1522 switch (hba->clk_gating.state) {
1525 * Wait for the ungate work to complete if in progress.
1526 * Though the clocks may be in ON state, the link could
1527 * still be in hibner8 state if hibern8 is allowed
1528 * during clock gating.
1529 * Make sure we exit hibern8 state also in addition to
1532 if (ufshcd_can_hibern8_during_gating(hba) &&
1533 ufshcd_is_link_hibern8(hba)) {
1534 spin_unlock_irqrestore(hba->host->host_lock, flags);
1535 flush_work(&hba->clk_gating.ungate_work);
1536 spin_lock_irqsave(hba->host->host_lock, flags);
1541 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1542 hba->clk_gating.state = CLKS_ON;
1543 trace_ufshcd_clk_gating(dev_name(hba->dev),
1544 hba->clk_gating.state);
1548 * If we are here, it means gating work is either done or
1549 * currently running. Hence, fall through to cancel gating
1550 * work and to enable clocks.
1554 ufshcd_scsi_block_requests(hba);
1555 hba->clk_gating.state = REQ_CLKS_ON;
1556 trace_ufshcd_clk_gating(dev_name(hba->dev),
1557 hba->clk_gating.state);
1558 queue_work(hba->clk_gating.clk_gating_workq,
1559 &hba->clk_gating.ungate_work);
1561 * fall through to check if we should wait for this
1562 * work to be done or not.
1568 hba->clk_gating.active_reqs--;
1572 spin_unlock_irqrestore(hba->host->host_lock, flags);
1573 flush_work(&hba->clk_gating.ungate_work);
1574 /* Make sure state is CLKS_ON before returning */
1575 spin_lock_irqsave(hba->host->host_lock, flags);
1578 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1579 __func__, hba->clk_gating.state);
1582 spin_unlock_irqrestore(hba->host->host_lock, flags);
1586 EXPORT_SYMBOL_GPL(ufshcd_hold);
1588 static void ufshcd_gate_work(struct work_struct *work)
1590 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1591 clk_gating.gate_work.work);
1592 unsigned long flags;
1594 spin_lock_irqsave(hba->host->host_lock, flags);
1596 * In case you are here to cancel this work the gating state
1597 * would be marked as REQ_CLKS_ON. In this case save time by
1598 * skipping the gating work and exit after changing the clock
1601 if (hba->clk_gating.is_suspended ||
1602 (hba->clk_gating.state == REQ_CLKS_ON)) {
1603 hba->clk_gating.state = CLKS_ON;
1604 trace_ufshcd_clk_gating(dev_name(hba->dev),
1605 hba->clk_gating.state);
1609 if (hba->clk_gating.active_reqs
1610 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1611 || hba->lrb_in_use || hba->outstanding_tasks
1612 || hba->active_uic_cmd || hba->uic_async_done)
1615 spin_unlock_irqrestore(hba->host->host_lock, flags);
1617 /* put the link into hibern8 mode before turning off clocks */
1618 if (ufshcd_can_hibern8_during_gating(hba)) {
1619 if (ufshcd_uic_hibern8_enter(hba)) {
1620 hba->clk_gating.state = CLKS_ON;
1621 trace_ufshcd_clk_gating(dev_name(hba->dev),
1622 hba->clk_gating.state);
1625 ufshcd_set_link_hibern8(hba);
1628 if (!ufshcd_is_link_active(hba))
1629 ufshcd_setup_clocks(hba, false);
1631 /* If link is active, device ref_clk can't be switched off */
1632 __ufshcd_setup_clocks(hba, false, true);
1635 * In case you are here to cancel this work the gating state
1636 * would be marked as REQ_CLKS_ON. In this case keep the state
1637 * as REQ_CLKS_ON which would anyway imply that clocks are off
1638 * and a request to turn them on is pending. By doing this way,
1639 * we keep the state machine in tact and this would ultimately
1640 * prevent from doing cancel work multiple times when there are
1641 * new requests arriving before the current cancel work is done.
1643 spin_lock_irqsave(hba->host->host_lock, flags);
1644 if (hba->clk_gating.state == REQ_CLKS_OFF) {
1645 hba->clk_gating.state = CLKS_OFF;
1646 trace_ufshcd_clk_gating(dev_name(hba->dev),
1647 hba->clk_gating.state);
1650 spin_unlock_irqrestore(hba->host->host_lock, flags);
1655 /* host lock must be held before calling this variant */
1656 static void __ufshcd_release(struct ufs_hba *hba)
1658 if (!ufshcd_is_clkgating_allowed(hba))
1661 hba->clk_gating.active_reqs--;
1663 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1664 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1665 || hba->lrb_in_use || hba->outstanding_tasks
1666 || hba->active_uic_cmd || hba->uic_async_done
1667 || ufshcd_eh_in_progress(hba))
1670 hba->clk_gating.state = REQ_CLKS_OFF;
1671 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1672 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1673 &hba->clk_gating.gate_work,
1674 msecs_to_jiffies(hba->clk_gating.delay_ms));
1677 void ufshcd_release(struct ufs_hba *hba)
1679 unsigned long flags;
1681 spin_lock_irqsave(hba->host->host_lock, flags);
1682 __ufshcd_release(hba);
1683 spin_unlock_irqrestore(hba->host->host_lock, flags);
1685 EXPORT_SYMBOL_GPL(ufshcd_release);
1687 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1688 struct device_attribute *attr, char *buf)
1690 struct ufs_hba *hba = dev_get_drvdata(dev);
1692 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1695 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1696 struct device_attribute *attr, const char *buf, size_t count)
1698 struct ufs_hba *hba = dev_get_drvdata(dev);
1699 unsigned long flags, value;
1701 if (kstrtoul(buf, 0, &value))
1704 spin_lock_irqsave(hba->host->host_lock, flags);
1705 hba->clk_gating.delay_ms = value;
1706 spin_unlock_irqrestore(hba->host->host_lock, flags);
1710 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1711 struct device_attribute *attr, char *buf)
1713 struct ufs_hba *hba = dev_get_drvdata(dev);
1715 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1718 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1719 struct device_attribute *attr, const char *buf, size_t count)
1721 struct ufs_hba *hba = dev_get_drvdata(dev);
1722 unsigned long flags;
1725 if (kstrtou32(buf, 0, &value))
1729 if (value == hba->clk_gating.is_enabled)
1733 ufshcd_release(hba);
1735 spin_lock_irqsave(hba->host->host_lock, flags);
1736 hba->clk_gating.active_reqs++;
1737 spin_unlock_irqrestore(hba->host->host_lock, flags);
1740 hba->clk_gating.is_enabled = value;
1745 static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1747 char wq_name[sizeof("ufs_clkscaling_00")];
1749 if (!ufshcd_is_clkscaling_supported(hba))
1752 INIT_WORK(&hba->clk_scaling.suspend_work,
1753 ufshcd_clk_scaling_suspend_work);
1754 INIT_WORK(&hba->clk_scaling.resume_work,
1755 ufshcd_clk_scaling_resume_work);
1757 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1758 hba->host->host_no);
1759 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1761 ufshcd_clkscaling_init_sysfs(hba);
1764 static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1766 if (!ufshcd_is_clkscaling_supported(hba))
1769 destroy_workqueue(hba->clk_scaling.workq);
1770 ufshcd_devfreq_remove(hba);
1773 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1775 char wq_name[sizeof("ufs_clk_gating_00")];
1777 if (!ufshcd_is_clkgating_allowed(hba))
1780 hba->clk_gating.delay_ms = 150;
1781 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1782 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1784 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1785 hba->host->host_no);
1786 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1789 hba->clk_gating.is_enabled = true;
1791 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1792 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1793 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1794 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1795 hba->clk_gating.delay_attr.attr.mode = 0644;
1796 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1797 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1799 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1800 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1801 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1802 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1803 hba->clk_gating.enable_attr.attr.mode = 0644;
1804 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1805 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1808 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1810 if (!ufshcd_is_clkgating_allowed(hba))
1812 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1813 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1814 cancel_work_sync(&hba->clk_gating.ungate_work);
1815 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1816 destroy_workqueue(hba->clk_gating.clk_gating_workq);
1819 /* Must be called with host lock acquired */
1820 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1822 bool queue_resume_work = false;
1824 if (!ufshcd_is_clkscaling_supported(hba))
1827 if (!hba->clk_scaling.active_reqs++)
1828 queue_resume_work = true;
1830 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1833 if (queue_resume_work)
1834 queue_work(hba->clk_scaling.workq,
1835 &hba->clk_scaling.resume_work);
1837 if (!hba->clk_scaling.window_start_t) {
1838 hba->clk_scaling.window_start_t = jiffies;
1839 hba->clk_scaling.tot_busy_t = 0;
1840 hba->clk_scaling.is_busy_started = false;
1843 if (!hba->clk_scaling.is_busy_started) {
1844 hba->clk_scaling.busy_start_t = ktime_get();
1845 hba->clk_scaling.is_busy_started = true;
1849 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1851 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1853 if (!ufshcd_is_clkscaling_supported(hba))
1856 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1857 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1858 scaling->busy_start_t));
1859 scaling->busy_start_t = 0;
1860 scaling->is_busy_started = false;
1864 * ufshcd_send_command - Send SCSI or device management commands
1865 * @hba: per adapter instance
1866 * @task_tag: Task tag of the command
1869 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1871 hba->lrb[task_tag].issue_time_stamp = ktime_get();
1872 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
1873 ufshcd_clk_scaling_start_busy(hba);
1874 __set_bit(task_tag, &hba->outstanding_reqs);
1875 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1876 /* Make sure that doorbell is committed immediately */
1878 ufshcd_add_command_trace(hba, task_tag, "send");
1882 * ufshcd_copy_sense_data - Copy sense data in case of check condition
1883 * @lrbp: pointer to local reference block
1885 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1888 if (lrbp->sense_buffer &&
1889 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
1892 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
1893 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
1895 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1901 * ufshcd_copy_query_response() - Copy the Query Response and the data
1903 * @hba: per adapter instance
1904 * @lrbp: pointer to local reference block
1907 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1909 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1911 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
1913 /* Get the descriptor */
1914 if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
1915 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
1916 GENERAL_UPIU_REQUEST_SIZE;
1920 /* data segment length */
1921 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
1922 MASK_QUERY_DATA_SEG_LEN;
1923 buf_len = be16_to_cpu(
1924 hba->dev_cmd.query.request.upiu_req.length);
1925 if (likely(buf_len >= resp_len)) {
1926 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1929 "%s: Response size is bigger than buffer",
1939 * ufshcd_hba_capabilities - Read controller capabilities
1940 * @hba: per adapter instance
1942 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1944 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
1946 /* nutrs and nutmrs are 0 based values */
1947 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1949 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1953 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1954 * to accept UIC commands
1955 * @hba: per adapter instance
1956 * Return true on success, else false
1958 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1960 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1967 * ufshcd_get_upmcrs - Get the power mode change request status
1968 * @hba: Pointer to adapter instance
1970 * This function gets the UPMCRS field of HCS register
1971 * Returns value of UPMCRS field
1973 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1975 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1979 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1980 * @hba: per adapter instance
1981 * @uic_cmd: UIC command
1983 * Mutex must be held.
1986 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1988 WARN_ON(hba->active_uic_cmd);
1990 hba->active_uic_cmd = uic_cmd;
1993 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1994 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1995 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
1998 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2003 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2004 * @hba: per adapter instance
2005 * @uic_cmd: UIC command
2007 * Must be called with mutex held.
2008 * Returns 0 only if success.
2011 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2014 unsigned long flags;
2016 if (wait_for_completion_timeout(&uic_cmd->done,
2017 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2018 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2022 spin_lock_irqsave(hba->host->host_lock, flags);
2023 hba->active_uic_cmd = NULL;
2024 spin_unlock_irqrestore(hba->host->host_lock, flags);
2030 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2031 * @hba: per adapter instance
2032 * @uic_cmd: UIC command
2033 * @completion: initialize the completion only if this is set to true
2035 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
2036 * with mutex held and host_lock locked.
2037 * Returns 0 only if success.
2040 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2043 if (!ufshcd_ready_for_uic_cmd(hba)) {
2045 "Controller not ready to accept UIC commands\n");
2050 init_completion(&uic_cmd->done);
2052 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
2058 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2059 * @hba: per adapter instance
2060 * @uic_cmd: UIC command
2062 * Returns 0 only if success.
2064 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2067 unsigned long flags;
2069 ufshcd_hold(hba, false);
2070 mutex_lock(&hba->uic_cmd_mutex);
2071 ufshcd_add_delay_before_dme_cmd(hba);
2073 spin_lock_irqsave(hba->host->host_lock, flags);
2074 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2075 spin_unlock_irqrestore(hba->host->host_lock, flags);
2077 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2079 mutex_unlock(&hba->uic_cmd_mutex);
2081 ufshcd_release(hba);
2086 * ufshcd_map_sg - Map scatter-gather list to prdt
2087 * @hba: per adapter instance
2088 * @lrbp: pointer to local reference block
2090 * Returns 0 in case of success, non-zero value in case of failure
2092 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2094 struct ufshcd_sg_entry *prd_table;
2095 struct scatterlist *sg;
2096 struct scsi_cmnd *cmd;
2101 sg_segments = scsi_dma_map(cmd);
2102 if (sg_segments < 0)
2106 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2107 lrbp->utr_descriptor_ptr->prd_table_length =
2108 cpu_to_le16((u16)(sg_segments *
2109 sizeof(struct ufshcd_sg_entry)));
2111 lrbp->utr_descriptor_ptr->prd_table_length =
2112 cpu_to_le16((u16) (sg_segments));
2114 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2116 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2118 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2119 prd_table[i].base_addr =
2120 cpu_to_le32(lower_32_bits(sg->dma_address));
2121 prd_table[i].upper_addr =
2122 cpu_to_le32(upper_32_bits(sg->dma_address));
2123 prd_table[i].reserved = 0;
2126 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2133 * ufshcd_enable_intr - enable interrupts
2134 * @hba: per adapter instance
2135 * @intrs: interrupt bits
2137 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2139 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2141 if (hba->ufs_version == UFSHCI_VERSION_10) {
2143 rw = set & INTERRUPT_MASK_RW_VER_10;
2144 set = rw | ((set ^ intrs) & intrs);
2149 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2153 * ufshcd_disable_intr - disable interrupts
2154 * @hba: per adapter instance
2155 * @intrs: interrupt bits
2157 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2159 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2161 if (hba->ufs_version == UFSHCI_VERSION_10) {
2163 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2164 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2165 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2171 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2175 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2176 * descriptor according to request
2177 * @lrbp: pointer to local reference block
2178 * @upiu_flags: flags required in the header
2179 * @cmd_dir: requests data direction
2181 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2182 u32 *upiu_flags, enum dma_data_direction cmd_dir)
2184 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2188 if (cmd_dir == DMA_FROM_DEVICE) {
2189 data_direction = UTP_DEVICE_TO_HOST;
2190 *upiu_flags = UPIU_CMD_FLAGS_READ;
2191 } else if (cmd_dir == DMA_TO_DEVICE) {
2192 data_direction = UTP_HOST_TO_DEVICE;
2193 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2195 data_direction = UTP_NO_DATA_TRANSFER;
2196 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2199 dword_0 = data_direction | (lrbp->command_type
2200 << UPIU_COMMAND_TYPE_OFFSET);
2202 dword_0 |= UTP_REQ_DESC_INT_CMD;
2204 /* Transfer request descriptor header fields */
2205 req_desc->header.dword_0 = cpu_to_le32(dword_0);
2206 /* dword_1 is reserved, hence it is set to 0 */
2207 req_desc->header.dword_1 = 0;
2209 * assigning invalid value for command status. Controller
2210 * updates OCS on command completion, with the command
2213 req_desc->header.dword_2 =
2214 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2215 /* dword_3 is reserved, hence it is set to 0 */
2216 req_desc->header.dword_3 = 0;
2218 req_desc->prd_table_length = 0;
2222 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2224 * @lrbp: local reference block pointer
2225 * @upiu_flags: flags
2228 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2230 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2231 unsigned short cdb_len;
2233 /* command descriptor fields */
2234 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2235 UPIU_TRANSACTION_COMMAND, upiu_flags,
2236 lrbp->lun, lrbp->task_tag);
2237 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2238 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2240 /* Total EHS length and Data segment length will be zero */
2241 ucd_req_ptr->header.dword_2 = 0;
2243 ucd_req_ptr->sc.exp_data_transfer_len =
2244 cpu_to_be32(lrbp->cmd->sdb.length);
2246 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2247 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2248 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2250 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2254 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2257 * @lrbp: local reference block pointer
2258 * @upiu_flags: flags
2260 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2261 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2263 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2264 struct ufs_query *query = &hba->dev_cmd.query;
2265 u16 len = be16_to_cpu(query->request.upiu_req.length);
2267 /* Query request header */
2268 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2269 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2270 lrbp->lun, lrbp->task_tag);
2271 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2272 0, query->request.query_func, 0, 0);
2274 /* Data segment length only need for WRITE_DESC */
2275 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2276 ucd_req_ptr->header.dword_2 =
2277 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2279 ucd_req_ptr->header.dword_2 = 0;
2281 /* Copy the Query Request buffer as is */
2282 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2285 /* Copy the Descriptor */
2286 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2287 memcpy(ucd_req_ptr + 1, query->descriptor, len);
2289 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2292 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2294 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2296 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2298 /* command descriptor fields */
2299 ucd_req_ptr->header.dword_0 =
2301 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2302 /* clear rest of the fields of basic header */
2303 ucd_req_ptr->header.dword_1 = 0;
2304 ucd_req_ptr->header.dword_2 = 0;
2306 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2310 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2311 * for Device Management Purposes
2312 * @hba: per adapter instance
2313 * @lrbp: pointer to local reference block
2315 static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2320 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2321 (hba->ufs_version == UFSHCI_VERSION_11))
2322 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2324 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2326 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2327 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2328 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2329 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2330 ufshcd_prepare_utp_nop_upiu(lrbp);
2338 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2340 * @hba: per adapter instance
2341 * @lrbp: pointer to local reference block
2343 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2348 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2349 (hba->ufs_version == UFSHCI_VERSION_11))
2350 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2352 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2354 if (likely(lrbp->cmd)) {
2355 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2356 lrbp->cmd->sc_data_direction);
2357 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2366 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2367 * @upiu_wlun_id: UPIU W-LUN id
2369 * Returns SCSI W-LUN id
2371 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2373 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2377 * ufshcd_queuecommand - main entry point for SCSI requests
2378 * @host: SCSI host pointer
2379 * @cmd: command from SCSI Midlayer
2381 * Returns 0 for success, non-zero in case of failure
2383 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2385 struct ufshcd_lrb *lrbp;
2386 struct ufs_hba *hba;
2387 unsigned long flags;
2391 hba = shost_priv(host);
2393 tag = cmd->request->tag;
2394 if (!ufshcd_valid_tag(hba, tag)) {
2396 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2397 __func__, tag, cmd, cmd->request);
2401 if (!down_read_trylock(&hba->clk_scaling_lock))
2402 return SCSI_MLQUEUE_HOST_BUSY;
2404 spin_lock_irqsave(hba->host->host_lock, flags);
2405 switch (hba->ufshcd_state) {
2406 case UFSHCD_STATE_OPERATIONAL:
2408 case UFSHCD_STATE_EH_SCHEDULED:
2409 case UFSHCD_STATE_RESET:
2410 err = SCSI_MLQUEUE_HOST_BUSY;
2412 case UFSHCD_STATE_ERROR:
2413 set_host_byte(cmd, DID_ERROR);
2414 cmd->scsi_done(cmd);
2417 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2418 __func__, hba->ufshcd_state);
2419 set_host_byte(cmd, DID_BAD_TARGET);
2420 cmd->scsi_done(cmd);
2424 /* if error handling is in progress, don't issue commands */
2425 if (ufshcd_eh_in_progress(hba)) {
2426 set_host_byte(cmd, DID_ERROR);
2427 cmd->scsi_done(cmd);
2430 spin_unlock_irqrestore(hba->host->host_lock, flags);
2432 hba->req_abort_count = 0;
2434 /* acquire the tag to make sure device cmds don't use it */
2435 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2437 * Dev manage command in progress, requeue the command.
2438 * Requeuing the command helps in cases where the request *may*
2439 * find different tag instead of waiting for dev manage command
2442 err = SCSI_MLQUEUE_HOST_BUSY;
2446 err = ufshcd_hold(hba, true);
2448 err = SCSI_MLQUEUE_HOST_BUSY;
2449 clear_bit_unlock(tag, &hba->lrb_in_use);
2452 WARN_ON(hba->clk_gating.state != CLKS_ON);
2454 lrbp = &hba->lrb[tag];
2458 lrbp->sense_bufflen = UFS_SENSE_SIZE;
2459 lrbp->sense_buffer = cmd->sense_buffer;
2460 lrbp->task_tag = tag;
2461 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2462 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2463 lrbp->req_abort_skip = false;
2465 ufshcd_comp_scsi_upiu(hba, lrbp);
2467 err = ufshcd_map_sg(hba, lrbp);
2470 clear_bit_unlock(tag, &hba->lrb_in_use);
2473 /* Make sure descriptors are ready before ringing the doorbell */
2476 /* issue command to the controller */
2477 spin_lock_irqsave(hba->host->host_lock, flags);
2478 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2479 ufshcd_send_command(hba, tag);
2481 spin_unlock_irqrestore(hba->host->host_lock, flags);
2483 up_read(&hba->clk_scaling_lock);
2487 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2488 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2491 lrbp->sense_bufflen = 0;
2492 lrbp->sense_buffer = NULL;
2493 lrbp->task_tag = tag;
2494 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2495 lrbp->intr_cmd = true; /* No interrupt aggregation */
2496 hba->dev_cmd.type = cmd_type;
2498 return ufshcd_comp_devman_upiu(hba, lrbp);
2502 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2505 unsigned long flags;
2506 u32 mask = 1 << tag;
2508 /* clear outstanding transaction before retry */
2509 spin_lock_irqsave(hba->host->host_lock, flags);
2510 ufshcd_utrl_clear(hba, tag);
2511 spin_unlock_irqrestore(hba->host->host_lock, flags);
2514 * wait for for h/w to clear corresponding bit in door-bell.
2515 * max. wait is 1 sec.
2517 err = ufshcd_wait_for_register(hba,
2518 REG_UTP_TRANSFER_REQ_DOOR_BELL,
2519 mask, ~mask, 1000, 1000, true);
2525 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2527 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2529 /* Get the UPIU response */
2530 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2531 UPIU_RSP_CODE_OFFSET;
2532 return query_res->response;
2536 * ufshcd_dev_cmd_completion() - handles device management command responses
2537 * @hba: per adapter instance
2538 * @lrbp: pointer to local reference block
2541 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2546 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2547 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2550 case UPIU_TRANSACTION_NOP_IN:
2551 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2553 dev_err(hba->dev, "%s: unexpected response %x\n",
2557 case UPIU_TRANSACTION_QUERY_RSP:
2558 err = ufshcd_check_query_response(hba, lrbp);
2560 err = ufshcd_copy_query_response(hba, lrbp);
2562 case UPIU_TRANSACTION_REJECT_UPIU:
2563 /* TODO: handle Reject UPIU Response */
2565 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2570 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2578 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2579 struct ufshcd_lrb *lrbp, int max_timeout)
2582 unsigned long time_left;
2583 unsigned long flags;
2585 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2586 msecs_to_jiffies(max_timeout));
2588 /* Make sure descriptors are ready before ringing the doorbell */
2590 spin_lock_irqsave(hba->host->host_lock, flags);
2591 hba->dev_cmd.complete = NULL;
2592 if (likely(time_left)) {
2593 err = ufshcd_get_tr_ocs(lrbp);
2595 err = ufshcd_dev_cmd_completion(hba, lrbp);
2597 spin_unlock_irqrestore(hba->host->host_lock, flags);
2601 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2602 __func__, lrbp->task_tag);
2603 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2604 /* successfully cleared the command, retry if needed */
2607 * in case of an error, after clearing the doorbell,
2608 * we also need to clear the outstanding_request
2611 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2618 * ufshcd_get_dev_cmd_tag - Get device management command tag
2619 * @hba: per-adapter instance
2620 * @tag_out: pointer to variable with available slot value
2622 * Get a free slot and lock it until device management command
2625 * Returns false if free slot is unavailable for locking, else
2626 * return true with tag value in @tag.
2628 static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2638 tmp = ~hba->lrb_in_use;
2639 tag = find_last_bit(&tmp, hba->nutrs);
2640 if (tag >= hba->nutrs)
2642 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2650 static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2652 clear_bit_unlock(tag, &hba->lrb_in_use);
2656 * ufshcd_exec_dev_cmd - API for sending device management requests
2658 * @cmd_type: specifies the type (NOP, Query...)
2659 * @timeout: time in seconds
2661 * NOTE: Since there is only one available tag for device management commands,
2662 * it is expected you hold the hba->dev_cmd.lock mutex.
2664 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2665 enum dev_cmd_type cmd_type, int timeout)
2667 struct ufshcd_lrb *lrbp;
2670 struct completion wait;
2671 unsigned long flags;
2673 down_read(&hba->clk_scaling_lock);
2676 * Get free slot, sleep if slots are unavailable.
2677 * Even though we use wait_event() which sleeps indefinitely,
2678 * the maximum wait time is bounded by SCSI request timeout.
2680 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2682 init_completion(&wait);
2683 lrbp = &hba->lrb[tag];
2685 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2689 hba->dev_cmd.complete = &wait;
2691 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
2692 /* Make sure descriptors are ready before ringing the doorbell */
2694 spin_lock_irqsave(hba->host->host_lock, flags);
2695 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2696 ufshcd_send_command(hba, tag);
2697 spin_unlock_irqrestore(hba->host->host_lock, flags);
2699 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2701 ufshcd_add_query_upiu_trace(hba, tag,
2702 err ? "query_complete_err" : "query_complete");
2705 ufshcd_put_dev_cmd_tag(hba, tag);
2706 wake_up(&hba->dev_cmd.tag_wq);
2707 up_read(&hba->clk_scaling_lock);
2712 * ufshcd_init_query() - init the query response and request parameters
2713 * @hba: per-adapter instance
2714 * @request: address of the request pointer to be initialized
2715 * @response: address of the response pointer to be initialized
2716 * @opcode: operation to perform
2717 * @idn: flag idn to access
2718 * @index: LU number to access
2719 * @selector: query/flag/descriptor further identification
2721 static inline void ufshcd_init_query(struct ufs_hba *hba,
2722 struct ufs_query_req **request, struct ufs_query_res **response,
2723 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2725 *request = &hba->dev_cmd.query.request;
2726 *response = &hba->dev_cmd.query.response;
2727 memset(*request, 0, sizeof(struct ufs_query_req));
2728 memset(*response, 0, sizeof(struct ufs_query_res));
2729 (*request)->upiu_req.opcode = opcode;
2730 (*request)->upiu_req.idn = idn;
2731 (*request)->upiu_req.index = index;
2732 (*request)->upiu_req.selector = selector;
2735 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2736 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2741 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2742 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2745 "%s: failed with error %d, retries %d\n",
2746 __func__, ret, retries);
2753 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2754 __func__, opcode, idn, ret, retries);
2759 * ufshcd_query_flag() - API function for sending flag query requests
2760 * @hba: per-adapter instance
2761 * @opcode: flag query to perform
2762 * @idn: flag idn to access
2763 * @flag_res: the flag value after the query request completes
2765 * Returns 0 for success, non-zero in case of failure
2767 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
2768 enum flag_idn idn, bool *flag_res)
2770 struct ufs_query_req *request = NULL;
2771 struct ufs_query_res *response = NULL;
2772 int err, index = 0, selector = 0;
2773 int timeout = QUERY_REQ_TIMEOUT;
2777 ufshcd_hold(hba, false);
2778 mutex_lock(&hba->dev_cmd.lock);
2779 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2783 case UPIU_QUERY_OPCODE_SET_FLAG:
2784 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2785 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2786 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2788 case UPIU_QUERY_OPCODE_READ_FLAG:
2789 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2791 /* No dummy reads */
2792 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2800 "%s: Expected query flag opcode but got = %d\n",
2806 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
2810 "%s: Sending flag query for idn %d failed, err = %d\n",
2811 __func__, idn, err);
2816 *flag_res = (be32_to_cpu(response->upiu_res.value) &
2817 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2820 mutex_unlock(&hba->dev_cmd.lock);
2821 ufshcd_release(hba);
2826 * ufshcd_query_attr - API function for sending attribute requests
2827 * @hba: per-adapter instance
2828 * @opcode: attribute opcode
2829 * @idn: attribute idn to access
2830 * @index: index field
2831 * @selector: selector field
2832 * @attr_val: the attribute value after the query request completes
2834 * Returns 0 for success, non-zero in case of failure
2836 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2837 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
2839 struct ufs_query_req *request = NULL;
2840 struct ufs_query_res *response = NULL;
2845 ufshcd_hold(hba, false);
2847 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2853 mutex_lock(&hba->dev_cmd.lock);
2854 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2858 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2859 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2860 request->upiu_req.value = cpu_to_be32(*attr_val);
2862 case UPIU_QUERY_OPCODE_READ_ATTR:
2863 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2866 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2872 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2875 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2876 __func__, opcode, idn, index, err);
2880 *attr_val = be32_to_cpu(response->upiu_res.value);
2883 mutex_unlock(&hba->dev_cmd.lock);
2885 ufshcd_release(hba);
2890 * ufshcd_query_attr_retry() - API function for sending query
2891 * attribute with retries
2892 * @hba: per-adapter instance
2893 * @opcode: attribute opcode
2894 * @idn: attribute idn to access
2895 * @index: index field
2896 * @selector: selector field
2897 * @attr_val: the attribute value after the query request
2900 * Returns 0 for success, non-zero in case of failure
2902 static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2903 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2909 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2910 ret = ufshcd_query_attr(hba, opcode, idn, index,
2911 selector, attr_val);
2913 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2914 __func__, ret, retries);
2921 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2922 __func__, idn, ret, QUERY_REQ_RETRIES);
2926 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
2927 enum query_opcode opcode, enum desc_idn idn, u8 index,
2928 u8 selector, u8 *desc_buf, int *buf_len)
2930 struct ufs_query_req *request = NULL;
2931 struct ufs_query_res *response = NULL;
2936 ufshcd_hold(hba, false);
2938 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2944 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
2945 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2946 __func__, *buf_len);
2951 mutex_lock(&hba->dev_cmd.lock);
2952 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2954 hba->dev_cmd.query.descriptor = desc_buf;
2955 request->upiu_req.length = cpu_to_be16(*buf_len);
2958 case UPIU_QUERY_OPCODE_WRITE_DESC:
2959 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2961 case UPIU_QUERY_OPCODE_READ_DESC:
2962 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2966 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2972 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2975 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2976 __func__, opcode, idn, index, err);
2980 hba->dev_cmd.query.descriptor = NULL;
2981 *buf_len = be16_to_cpu(response->upiu_res.length);
2984 mutex_unlock(&hba->dev_cmd.lock);
2986 ufshcd_release(hba);
2991 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2992 * @hba: per-adapter instance
2993 * @opcode: attribute opcode
2994 * @idn: attribute idn to access
2995 * @index: index field
2996 * @selector: selector field
2997 * @desc_buf: the buffer that contains the descriptor
2998 * @buf_len: length parameter passed to the device
3000 * Returns 0 for success, non-zero in case of failure.
3001 * The buf_len parameter will contain, on return, the length parameter
3002 * received on the response.
3004 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3005 enum query_opcode opcode,
3006 enum desc_idn idn, u8 index,
3008 u8 *desc_buf, int *buf_len)
3013 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3014 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3015 selector, desc_buf, buf_len);
3016 if (!err || err == -EINVAL)
3024 * ufshcd_read_desc_length - read the specified descriptor length from header
3025 * @hba: Pointer to adapter instance
3026 * @desc_id: descriptor idn value
3027 * @desc_index: descriptor index
3028 * @desc_length: pointer to variable to read the length of descriptor
3030 * Return 0 in case of success, non-zero otherwise
3032 static int ufshcd_read_desc_length(struct ufs_hba *hba,
3033 enum desc_idn desc_id,
3038 u8 header[QUERY_DESC_HDR_SIZE];
3039 int header_len = QUERY_DESC_HDR_SIZE;
3041 if (desc_id >= QUERY_DESC_IDN_MAX)
3044 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3045 desc_id, desc_index, 0, header,
3049 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3052 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3053 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3054 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3059 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3065 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3066 * @hba: Pointer to adapter instance
3067 * @desc_id: descriptor idn value
3068 * @desc_len: mapped desc length (out)
3070 * Return 0 in case of success, non-zero otherwise
3072 int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3073 enum desc_idn desc_id, int *desc_len)
3076 case QUERY_DESC_IDN_DEVICE:
3077 *desc_len = hba->desc_size.dev_desc;
3079 case QUERY_DESC_IDN_POWER:
3080 *desc_len = hba->desc_size.pwr_desc;
3082 case QUERY_DESC_IDN_GEOMETRY:
3083 *desc_len = hba->desc_size.geom_desc;
3085 case QUERY_DESC_IDN_CONFIGURATION:
3086 *desc_len = hba->desc_size.conf_desc;
3088 case QUERY_DESC_IDN_UNIT:
3089 *desc_len = hba->desc_size.unit_desc;
3091 case QUERY_DESC_IDN_INTERCONNECT:
3092 *desc_len = hba->desc_size.interc_desc;
3094 case QUERY_DESC_IDN_STRING:
3095 *desc_len = QUERY_DESC_MAX_SIZE;
3097 case QUERY_DESC_IDN_HEALTH:
3098 *desc_len = hba->desc_size.hlth_desc;
3100 case QUERY_DESC_IDN_RFU_0:
3101 case QUERY_DESC_IDN_RFU_1:
3110 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3113 * ufshcd_read_desc_param - read the specified descriptor parameter
3114 * @hba: Pointer to adapter instance
3115 * @desc_id: descriptor idn value
3116 * @desc_index: descriptor index
3117 * @param_offset: offset of the parameter to read
3118 * @param_read_buf: pointer to buffer where parameter would be read
3119 * @param_size: sizeof(param_read_buf)
3121 * Return 0 in case of success, non-zero otherwise
3123 int ufshcd_read_desc_param(struct ufs_hba *hba,
3124 enum desc_idn desc_id,
3133 bool is_kmalloc = true;
3136 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3139 /* Get the max length of descriptor from structure filled up at probe
3142 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3145 if (ret || !buff_len) {
3146 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3151 /* Check whether we need temp memory */
3152 if (param_offset != 0 || param_size < buff_len) {
3153 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3157 desc_buf = param_read_buf;
3161 /* Request for full descriptor */
3162 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3163 desc_id, desc_index, 0,
3164 desc_buf, &buff_len);
3167 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3168 __func__, desc_id, desc_index, param_offset, ret);
3173 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3174 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3175 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3180 /* Check wherher we will not copy more data, than available */
3181 if (is_kmalloc && param_size > buff_len)
3182 param_size = buff_len;
3185 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3192 static inline int ufshcd_read_desc(struct ufs_hba *hba,
3193 enum desc_idn desc_id,
3198 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3201 static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3205 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
3208 static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
3210 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3214 * ufshcd_read_string_desc - read string descriptor
3215 * @hba: pointer to adapter instance
3216 * @desc_index: descriptor index
3217 * @buf: pointer to buffer where descriptor would be read
3218 * @size: size of buf
3219 * @ascii: if true convert from unicode to ascii characters
3221 * Return 0 in case of success, non-zero otherwise
3223 int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
3224 u8 *buf, u32 size, bool ascii)
3228 err = ufshcd_read_desc(hba,
3229 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3232 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3233 __func__, QUERY_REQ_RETRIES, err);
3244 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3245 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3246 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3247 dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3253 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3260 * the descriptor contains string in UTF16 format
3261 * we need to convert to utf-8 so it can be displayed
3263 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3264 desc_len - QUERY_DESC_HDR_SIZE,
3265 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3267 /* replace non-printable or non-ASCII characters with spaces */
3268 for (i = 0; i < ascii_len; i++)
3269 ufshcd_remove_non_printable(&buff_ascii[i]);
3271 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3272 size - QUERY_DESC_HDR_SIZE);
3273 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3274 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
3282 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3283 * @hba: Pointer to adapter instance
3285 * @param_offset: offset of the parameter to read
3286 * @param_read_buf: pointer to buffer where parameter would be read
3287 * @param_size: sizeof(param_read_buf)
3289 * Return 0 in case of success, non-zero otherwise
3291 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3293 enum unit_desc_param param_offset,
3298 * Unit descriptors are only available for general purpose LUs (LUN id
3299 * from 0 to 7) and RPMB Well known LU.
3301 if (!ufs_is_valid_unit_desc_lun(lun))
3304 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3305 param_offset, param_read_buf, param_size);
3309 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3310 * @hba: per adapter instance
3312 * 1. Allocate DMA memory for Command Descriptor array
3313 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3314 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3315 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3317 * 4. Allocate memory for local reference block(lrb).
3319 * Returns 0 for success, non-zero in case of failure
3321 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3323 size_t utmrdl_size, utrdl_size, ucdl_size;
3325 /* Allocate memory for UTP command descriptors */
3326 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3327 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3329 &hba->ucdl_dma_addr,
3333 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3334 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3335 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3336 * be aligned to 128 bytes as well
3338 if (!hba->ucdl_base_addr ||
3339 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3341 "Command Descriptor Memory allocation failed\n");
3346 * Allocate memory for UTP Transfer descriptors
3347 * UFSHCI requires 1024 byte alignment of UTRD
3349 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3350 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3352 &hba->utrdl_dma_addr,
3354 if (!hba->utrdl_base_addr ||
3355 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3357 "Transfer Descriptor Memory allocation failed\n");
3362 * Allocate memory for UTP Task Management descriptors
3363 * UFSHCI requires 1024 byte alignment of UTMRD
3365 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3366 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3368 &hba->utmrdl_dma_addr,
3370 if (!hba->utmrdl_base_addr ||
3371 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3373 "Task Management Descriptor Memory allocation failed\n");
3377 /* Allocate memory for local reference block */
3378 hba->lrb = devm_kcalloc(hba->dev,
3379 hba->nutrs, sizeof(struct ufshcd_lrb),
3382 dev_err(hba->dev, "LRB Memory allocation failed\n");
3391 * ufshcd_host_memory_configure - configure local reference block with
3393 * @hba: per adapter instance
3395 * Configure Host memory space
3396 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3398 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3400 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3401 * into local reference block.
3403 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3405 struct utp_transfer_cmd_desc *cmd_descp;
3406 struct utp_transfer_req_desc *utrdlp;
3407 dma_addr_t cmd_desc_dma_addr;
3408 dma_addr_t cmd_desc_element_addr;
3409 u16 response_offset;
3414 utrdlp = hba->utrdl_base_addr;
3415 cmd_descp = hba->ucdl_base_addr;
3418 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3420 offsetof(struct utp_transfer_cmd_desc, prd_table);
3422 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3423 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3425 for (i = 0; i < hba->nutrs; i++) {
3426 /* Configure UTRD with command descriptor base address */
3427 cmd_desc_element_addr =
3428 (cmd_desc_dma_addr + (cmd_desc_size * i));
3429 utrdlp[i].command_desc_base_addr_lo =
3430 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3431 utrdlp[i].command_desc_base_addr_hi =
3432 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3434 /* Response upiu and prdt offset should be in double words */
3435 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3436 utrdlp[i].response_upiu_offset =
3437 cpu_to_le16(response_offset);
3438 utrdlp[i].prd_table_offset =
3439 cpu_to_le16(prdt_offset);
3440 utrdlp[i].response_upiu_length =
3441 cpu_to_le16(ALIGNED_UPIU_SIZE);
3443 utrdlp[i].response_upiu_offset =
3444 cpu_to_le16((response_offset >> 2));
3445 utrdlp[i].prd_table_offset =
3446 cpu_to_le16((prdt_offset >> 2));
3447 utrdlp[i].response_upiu_length =
3448 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3451 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
3452 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3453 (i * sizeof(struct utp_transfer_req_desc));
3454 hba->lrb[i].ucd_req_ptr =
3455 (struct utp_upiu_req *)(cmd_descp + i);
3456 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
3457 hba->lrb[i].ucd_rsp_ptr =
3458 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
3459 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3461 hba->lrb[i].ucd_prdt_ptr =
3462 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
3463 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3469 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3470 * @hba: per adapter instance
3472 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3473 * in order to initialize the Unipro link startup procedure.
3474 * Once the Unipro links are up, the device connected to the controller
3477 * Returns 0 on success, non-zero value on failure
3479 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3481 struct uic_command uic_cmd = {0};
3484 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3486 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3489 "dme-link-startup: error code %d\n", ret);
3493 * ufshcd_dme_reset - UIC command for DME_RESET
3494 * @hba: per adapter instance
3496 * DME_RESET command is issued in order to reset UniPro stack.
3497 * This function now deal with cold reset.
3499 * Returns 0 on success, non-zero value on failure
3501 static int ufshcd_dme_reset(struct ufs_hba *hba)
3503 struct uic_command uic_cmd = {0};
3506 uic_cmd.command = UIC_CMD_DME_RESET;
3508 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3511 "dme-reset: error code %d\n", ret);
3517 * ufshcd_dme_enable - UIC command for DME_ENABLE
3518 * @hba: per adapter instance
3520 * DME_ENABLE command is issued in order to enable UniPro stack.
3522 * Returns 0 on success, non-zero value on failure
3524 static int ufshcd_dme_enable(struct ufs_hba *hba)
3526 struct uic_command uic_cmd = {0};
3529 uic_cmd.command = UIC_CMD_DME_ENABLE;
3531 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3534 "dme-reset: error code %d\n", ret);
3539 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3541 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3542 unsigned long min_sleep_time_us;
3544 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3548 * last_dme_cmd_tstamp will be 0 only for 1st call to
3551 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3552 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3554 unsigned long delta =
3555 (unsigned long) ktime_to_us(
3556 ktime_sub(ktime_get(),
3557 hba->last_dme_cmd_tstamp));
3559 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3561 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3563 return; /* no more delay required */
3566 /* allow sleep for extra 50us if needed */
3567 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3571 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3572 * @hba: per adapter instance
3573 * @attr_sel: uic command argument1
3574 * @attr_set: attribute set type as uic command argument2
3575 * @mib_val: setting value as uic command argument3
3576 * @peer: indicate whether peer or local
3578 * Returns 0 on success, non-zero value on failure
3580 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3581 u8 attr_set, u32 mib_val, u8 peer)
3583 struct uic_command uic_cmd = {0};
3584 static const char *const action[] = {
3588 const char *set = action[!!peer];
3590 int retries = UFS_UIC_COMMAND_RETRIES;
3592 uic_cmd.command = peer ?
3593 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3594 uic_cmd.argument1 = attr_sel;
3595 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3596 uic_cmd.argument3 = mib_val;
3599 /* for peer attributes we retry upon failure */
3600 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3602 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3603 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3604 } while (ret && peer && --retries);
3607 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3608 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3609 UFS_UIC_COMMAND_RETRIES - retries);
3613 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3616 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3617 * @hba: per adapter instance
3618 * @attr_sel: uic command argument1
3619 * @mib_val: the value of the attribute as returned by the UIC command
3620 * @peer: indicate whether peer or local
3622 * Returns 0 on success, non-zero value on failure
3624 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3625 u32 *mib_val, u8 peer)
3627 struct uic_command uic_cmd = {0};
3628 static const char *const action[] = {
3632 const char *get = action[!!peer];
3634 int retries = UFS_UIC_COMMAND_RETRIES;
3635 struct ufs_pa_layer_attr orig_pwr_info;
3636 struct ufs_pa_layer_attr temp_pwr_info;
3637 bool pwr_mode_change = false;
3639 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3640 orig_pwr_info = hba->pwr_info;
3641 temp_pwr_info = orig_pwr_info;
3643 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3644 orig_pwr_info.pwr_rx == FAST_MODE) {
3645 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3646 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3647 pwr_mode_change = true;
3648 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3649 orig_pwr_info.pwr_rx == SLOW_MODE) {
3650 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3651 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3652 pwr_mode_change = true;
3654 if (pwr_mode_change) {
3655 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3661 uic_cmd.command = peer ?
3662 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3663 uic_cmd.argument1 = attr_sel;
3666 /* for peer attributes we retry upon failure */
3667 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3669 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3670 get, UIC_GET_ATTR_ID(attr_sel), ret);
3671 } while (ret && peer && --retries);
3674 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3675 get, UIC_GET_ATTR_ID(attr_sel),
3676 UFS_UIC_COMMAND_RETRIES - retries);
3678 if (mib_val && !ret)
3679 *mib_val = uic_cmd.argument3;
3681 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3683 ufshcd_change_power_mode(hba, &orig_pwr_info);
3687 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3690 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3691 * state) and waits for it to take effect.
3693 * @hba: per adapter instance
3694 * @cmd: UIC command to execute
3696 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3697 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3698 * and device UniPro link and hence it's final completion would be indicated by
3699 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3700 * addition to normal UIC command completion Status (UCCS). This function only
3701 * returns after the relevant status bits indicate the completion.
3703 * Returns 0 on success, non-zero value on failure
3705 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3707 struct completion uic_async_done;
3708 unsigned long flags;
3711 bool reenable_intr = false;
3713 mutex_lock(&hba->uic_cmd_mutex);
3714 init_completion(&uic_async_done);
3715 ufshcd_add_delay_before_dme_cmd(hba);
3717 spin_lock_irqsave(hba->host->host_lock, flags);
3718 hba->uic_async_done = &uic_async_done;
3719 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3720 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3722 * Make sure UIC command completion interrupt is disabled before
3723 * issuing UIC command.
3726 reenable_intr = true;
3728 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3729 spin_unlock_irqrestore(hba->host->host_lock, flags);
3732 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3733 cmd->command, cmd->argument3, ret);
3737 if (!wait_for_completion_timeout(hba->uic_async_done,
3738 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3740 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3741 cmd->command, cmd->argument3);
3746 status = ufshcd_get_upmcrs(hba);
3747 if (status != PWR_LOCAL) {
3749 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
3750 cmd->command, status);
3751 ret = (status != PWR_OK) ? status : -1;
3755 ufshcd_print_host_state(hba);
3756 ufshcd_print_pwr_info(hba);
3757 ufshcd_print_host_regs(hba);
3760 spin_lock_irqsave(hba->host->host_lock, flags);
3761 hba->active_uic_cmd = NULL;
3762 hba->uic_async_done = NULL;
3764 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
3765 spin_unlock_irqrestore(hba->host->host_lock, flags);
3766 mutex_unlock(&hba->uic_cmd_mutex);
3772 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3773 * using DME_SET primitives.
3774 * @hba: per adapter instance
3775 * @mode: powr mode value
3777 * Returns 0 on success, non-zero value on failure
3779 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
3781 struct uic_command uic_cmd = {0};
3784 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3785 ret = ufshcd_dme_set(hba,
3786 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3788 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3794 uic_cmd.command = UIC_CMD_DME_SET;
3795 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3796 uic_cmd.argument3 = mode;
3797 ufshcd_hold(hba, false);
3798 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3799 ufshcd_release(hba);
3805 static int ufshcd_link_recovery(struct ufs_hba *hba)
3808 unsigned long flags;
3810 spin_lock_irqsave(hba->host->host_lock, flags);
3811 hba->ufshcd_state = UFSHCD_STATE_RESET;
3812 ufshcd_set_eh_in_progress(hba);
3813 spin_unlock_irqrestore(hba->host->host_lock, flags);
3815 ret = ufshcd_host_reset_and_restore(hba);
3817 spin_lock_irqsave(hba->host->host_lock, flags);
3819 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3820 ufshcd_clear_eh_in_progress(hba);
3821 spin_unlock_irqrestore(hba->host->host_lock, flags);
3824 dev_err(hba->dev, "%s: link recovery failed, err %d",
3830 static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3833 struct uic_command uic_cmd = {0};
3834 ktime_t start = ktime_get();
3836 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3838 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
3839 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3840 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3841 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3844 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3848 * If link recovery fails then return error so that caller
3849 * don't retry the hibern8 enter again.
3851 if (ufshcd_link_recovery(hba))
3854 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3860 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3862 int ret = 0, retries;
3864 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3865 ret = __ufshcd_uic_hibern8_enter(hba);
3866 if (!ret || ret == -ENOLINK)
3873 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3875 struct uic_command uic_cmd = {0};
3877 ktime_t start = ktime_get();
3879 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3881 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3882 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3883 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3884 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3887 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3889 ret = ufshcd_link_recovery(hba);
3891 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3893 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3894 hba->ufs_stats.hibern8_exit_cnt++;
3900 static void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3902 unsigned long flags;
3904 if (!(hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) || !hba->ahit)
3907 spin_lock_irqsave(hba->host->host_lock, flags);
3908 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3909 spin_unlock_irqrestore(hba->host->host_lock, flags);
3913 * ufshcd_init_pwr_info - setting the POR (power on reset)
3914 * values in hba power info
3915 * @hba: per-adapter instance
3917 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3919 hba->pwr_info.gear_rx = UFS_PWM_G1;
3920 hba->pwr_info.gear_tx = UFS_PWM_G1;
3921 hba->pwr_info.lane_rx = 1;
3922 hba->pwr_info.lane_tx = 1;
3923 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3924 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3925 hba->pwr_info.hs_rate = 0;
3929 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3930 * @hba: per-adapter instance
3932 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
3934 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3936 if (hba->max_pwr_info.is_valid)
3939 pwr_info->pwr_tx = FAST_MODE;
3940 pwr_info->pwr_rx = FAST_MODE;
3941 pwr_info->hs_rate = PA_HS_MODE_B;
3943 /* Get the connected lane count */
3944 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3945 &pwr_info->lane_rx);
3946 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3947 &pwr_info->lane_tx);
3949 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3950 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3958 * First, get the maximum gears of HS speed.
3959 * If a zero value, it means there is no HSGEAR capability.
3960 * Then, get the maximum gears of PWM speed.
3962 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3963 if (!pwr_info->gear_rx) {
3964 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3965 &pwr_info->gear_rx);
3966 if (!pwr_info->gear_rx) {
3967 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3968 __func__, pwr_info->gear_rx);
3971 pwr_info->pwr_rx = SLOW_MODE;
3974 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3975 &pwr_info->gear_tx);
3976 if (!pwr_info->gear_tx) {
3977 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3978 &pwr_info->gear_tx);
3979 if (!pwr_info->gear_tx) {
3980 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3981 __func__, pwr_info->gear_tx);
3984 pwr_info->pwr_tx = SLOW_MODE;
3987 hba->max_pwr_info.is_valid = true;
3991 static int ufshcd_change_power_mode(struct ufs_hba *hba,
3992 struct ufs_pa_layer_attr *pwr_mode)
3996 /* if already configured to the requested pwr_mode */
3997 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
3998 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
3999 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4000 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4001 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4002 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4003 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4004 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4009 * Configure attributes for power mode change with below.
4010 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4011 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4014 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4015 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4017 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4018 pwr_mode->pwr_rx == FAST_MODE)
4019 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
4021 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4023 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4024 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4026 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4027 pwr_mode->pwr_tx == FAST_MODE)
4028 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
4030 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4032 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4033 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4034 pwr_mode->pwr_rx == FAST_MODE ||
4035 pwr_mode->pwr_tx == FAST_MODE)
4036 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4039 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4040 | pwr_mode->pwr_tx);
4044 "%s: power mode change failed %d\n", __func__, ret);
4046 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4049 memcpy(&hba->pwr_info, pwr_mode,
4050 sizeof(struct ufs_pa_layer_attr));
4057 * ufshcd_config_pwr_mode - configure a new power mode
4058 * @hba: per-adapter instance
4059 * @desired_pwr_mode: desired power configuration
4061 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4062 struct ufs_pa_layer_attr *desired_pwr_mode)
4064 struct ufs_pa_layer_attr final_params = { 0 };
4067 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4068 desired_pwr_mode, &final_params);
4071 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4073 ret = ufshcd_change_power_mode(hba, &final_params);
4075 ufshcd_print_pwr_info(hba);
4079 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4082 * ufshcd_complete_dev_init() - checks device readiness
4083 * @hba: per-adapter instance
4085 * Set fDeviceInit flag and poll until device toggles it.
4087 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4093 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4094 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
4097 "%s setting fDeviceInit flag failed with error %d\n",
4102 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4103 for (i = 0; i < 1000 && !err && flag_res; i++)
4104 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4105 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4109 "%s reading fDeviceInit flag failed with error %d\n",
4113 "%s fDeviceInit was not cleared by the device\n",
4121 * ufshcd_make_hba_operational - Make UFS controller operational
4122 * @hba: per adapter instance
4124 * To bring UFS host controller to operational state,
4125 * 1. Enable required interrupts
4126 * 2. Configure interrupt aggregation
4127 * 3. Program UTRL and UTMRL base address
4128 * 4. Configure run-stop-registers
4130 * Returns 0 on success, non-zero value on failure
4132 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4137 /* Enable required interrupts */
4138 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4140 /* Configure interrupt aggregation */
4141 if (ufshcd_is_intr_aggr_allowed(hba))
4142 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4144 ufshcd_disable_intr_aggr(hba);
4146 /* Configure UTRL and UTMRL base address registers */
4147 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4148 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4149 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4150 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4151 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4152 REG_UTP_TASK_REQ_LIST_BASE_L);
4153 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4154 REG_UTP_TASK_REQ_LIST_BASE_H);
4157 * Make sure base address and interrupt setup are updated before
4158 * enabling the run/stop registers below.
4163 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4165 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4166 if (!(ufshcd_get_lists_status(reg))) {
4167 ufshcd_enable_run_stop_reg(hba);
4170 "Host controller not ready to process requests");
4180 * ufshcd_hba_stop - Send controller to reset state
4181 * @hba: per adapter instance
4182 * @can_sleep: perform sleep or just spin
4184 static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4188 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4189 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4190 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4193 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4197 * ufshcd_hba_execute_hce - initialize the controller
4198 * @hba: per adapter instance
4200 * The controller resets itself and controller firmware initialization
4201 * sequence kicks off. When controller is ready it will set
4202 * the Host Controller Enable bit to 1.
4204 * Returns 0 on success, non-zero value on failure
4206 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4211 * msleep of 1 and 5 used in this function might result in msleep(20),
4212 * but it was necessary to send the UFS FPGA to reset mode during
4213 * development and testing of this driver. msleep can be changed to
4214 * mdelay and retry count can be reduced based on the controller.
4216 if (!ufshcd_is_hba_active(hba))
4217 /* change controller state to "reset state" */
4218 ufshcd_hba_stop(hba, true);
4220 /* UniPro link is disabled at this point */
4221 ufshcd_set_link_off(hba);
4223 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4225 /* start controller initialization sequence */
4226 ufshcd_hba_start(hba);
4229 * To initialize a UFS host controller HCE bit must be set to 1.
4230 * During initialization the HCE bit value changes from 1->0->1.
4231 * When the host controller completes initialization sequence
4232 * it sets the value of HCE bit to 1. The same HCE bit is read back
4233 * to check if the controller has completed initialization sequence.
4234 * So without this delay the value HCE = 1, set in the previous
4235 * instruction might be read back.
4236 * This delay can be changed based on the controller.
4240 /* wait for the host controller to complete initialization */
4242 while (ufshcd_is_hba_active(hba)) {
4247 "Controller enable failed\n");
4253 /* enable UIC related interrupts */
4254 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4256 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4261 static int ufshcd_hba_enable(struct ufs_hba *hba)
4265 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4266 ufshcd_set_link_off(hba);
4267 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4269 /* enable UIC related interrupts */
4270 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4271 ret = ufshcd_dme_reset(hba);
4273 ret = ufshcd_dme_enable(hba);
4275 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4278 "Host controller enable failed with non-hce\n");
4281 ret = ufshcd_hba_execute_hce(hba);
4286 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4288 int tx_lanes, i, err = 0;
4291 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4294 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4296 for (i = 0; i < tx_lanes; i++) {
4298 err = ufshcd_dme_set(hba,
4299 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4300 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4303 err = ufshcd_dme_peer_set(hba,
4304 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4305 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4308 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4309 __func__, peer, i, err);
4317 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4319 return ufshcd_disable_tx_lcc(hba, true);
4323 * ufshcd_link_startup - Initialize unipro link startup
4324 * @hba: per adapter instance
4326 * Returns 0 for success, non-zero in case of failure
4328 static int ufshcd_link_startup(struct ufs_hba *hba)
4331 int retries = DME_LINKSTARTUP_RETRIES;
4332 bool link_startup_again = false;
4335 * If UFS device isn't active then we will have to issue link startup
4336 * 2 times to make sure the device state move to active.
4338 if (!ufshcd_is_ufs_dev_active(hba))
4339 link_startup_again = true;
4343 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4345 ret = ufshcd_dme_link_startup(hba);
4347 /* check if device is detected by inter-connect layer */
4348 if (!ret && !ufshcd_is_device_present(hba)) {
4349 dev_err(hba->dev, "%s: Device not present\n", __func__);
4355 * DME link lost indication is only received when link is up,
4356 * but we can't be sure if the link is up until link startup
4357 * succeeds. So reset the local Uni-Pro and try again.
4359 if (ret && ufshcd_hba_enable(hba))
4361 } while (ret && retries--);
4364 /* failed to get the link up... retire */
4367 if (link_startup_again) {
4368 link_startup_again = false;
4369 retries = DME_LINKSTARTUP_RETRIES;
4373 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4374 ufshcd_init_pwr_info(hba);
4375 ufshcd_print_pwr_info(hba);
4377 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4378 ret = ufshcd_disable_device_tx_lcc(hba);
4383 /* Include any host controller configuration via UIC commands */
4384 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4388 ret = ufshcd_make_hba_operational(hba);
4391 dev_err(hba->dev, "link startup failed %d\n", ret);
4392 ufshcd_print_host_state(hba);
4393 ufshcd_print_pwr_info(hba);
4394 ufshcd_print_host_regs(hba);
4400 * ufshcd_verify_dev_init() - Verify device initialization
4401 * @hba: per-adapter instance
4403 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4404 * device Transport Protocol (UTP) layer is ready after a reset.
4405 * If the UTP layer at the device side is not initialized, it may
4406 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4407 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4409 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4414 ufshcd_hold(hba, false);
4415 mutex_lock(&hba->dev_cmd.lock);
4416 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4417 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4420 if (!err || err == -ETIMEDOUT)
4423 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4425 mutex_unlock(&hba->dev_cmd.lock);
4426 ufshcd_release(hba);
4429 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4434 * ufshcd_set_queue_depth - set lun queue depth
4435 * @sdev: pointer to SCSI device
4437 * Read bLUQueueDepth value and activate scsi tagged command
4438 * queueing. For WLUN, queue depth is set to 1. For best-effort
4439 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4440 * value that host can queue.
4442 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4446 struct ufs_hba *hba;
4448 hba = shost_priv(sdev->host);
4450 lun_qdepth = hba->nutrs;
4451 ret = ufshcd_read_unit_desc_param(hba,
4452 ufshcd_scsi_to_upiu_lun(sdev->lun),
4453 UNIT_DESC_PARAM_LU_Q_DEPTH,
4455 sizeof(lun_qdepth));
4457 /* Some WLUN doesn't support unit descriptor */
4458 if (ret == -EOPNOTSUPP)
4460 else if (!lun_qdepth)
4461 /* eventually, we can figure out the real queue depth */
4462 lun_qdepth = hba->nutrs;
4464 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4466 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4467 __func__, lun_qdepth);
4468 scsi_change_queue_depth(sdev, lun_qdepth);
4472 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4473 * @hba: per-adapter instance
4474 * @lun: UFS device lun id
4475 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4477 * Returns 0 in case of success and b_lu_write_protect status would be returned
4478 * @b_lu_write_protect parameter.
4479 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4480 * Returns -EINVAL in case of invalid parameters passed to this function.
4482 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4484 u8 *b_lu_write_protect)
4488 if (!b_lu_write_protect)
4491 * According to UFS device spec, RPMB LU can't be write
4492 * protected so skip reading bLUWriteProtect parameter for
4493 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4495 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4498 ret = ufshcd_read_unit_desc_param(hba,
4500 UNIT_DESC_PARAM_LU_WR_PROTECT,
4502 sizeof(*b_lu_write_protect));
4507 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4509 * @hba: per-adapter instance
4510 * @sdev: pointer to SCSI device
4513 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4514 struct scsi_device *sdev)
4516 if (hba->dev_info.f_power_on_wp_en &&
4517 !hba->dev_info.is_lu_power_on_wp) {
4518 u8 b_lu_write_protect;
4520 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4521 &b_lu_write_protect) &&
4522 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4523 hba->dev_info.is_lu_power_on_wp = true;
4528 * ufshcd_slave_alloc - handle initial SCSI device configurations
4529 * @sdev: pointer to SCSI device
4533 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4535 struct ufs_hba *hba;
4537 hba = shost_priv(sdev->host);
4539 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4540 sdev->use_10_for_ms = 1;
4542 /* allow SCSI layer to restart the device in case of errors */
4543 sdev->allow_restart = 1;
4545 /* REPORT SUPPORTED OPERATION CODES is not supported */
4546 sdev->no_report_opcodes = 1;
4548 /* WRITE_SAME command is not supported */
4549 sdev->no_write_same = 1;
4551 ufshcd_set_queue_depth(sdev);
4553 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4559 * ufshcd_change_queue_depth - change queue depth
4560 * @sdev: pointer to SCSI device
4561 * @depth: required depth to set
4563 * Change queue depth and make sure the max. limits are not crossed.
4565 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4567 struct ufs_hba *hba = shost_priv(sdev->host);
4569 if (depth > hba->nutrs)
4571 return scsi_change_queue_depth(sdev, depth);
4575 * ufshcd_slave_configure - adjust SCSI device configurations
4576 * @sdev: pointer to SCSI device
4578 static int ufshcd_slave_configure(struct scsi_device *sdev)
4580 struct request_queue *q = sdev->request_queue;
4582 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4583 blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4589 * ufshcd_slave_destroy - remove SCSI device configurations
4590 * @sdev: pointer to SCSI device
4592 static void ufshcd_slave_destroy(struct scsi_device *sdev)
4594 struct ufs_hba *hba;
4596 hba = shost_priv(sdev->host);
4597 /* Drop the reference as it won't be needed anymore */
4598 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4599 unsigned long flags;
4601 spin_lock_irqsave(hba->host->host_lock, flags);
4602 hba->sdev_ufs_device = NULL;
4603 spin_unlock_irqrestore(hba->host->host_lock, flags);
4608 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4609 * @lrbp: pointer to local reference block of completed command
4610 * @scsi_status: SCSI command status
4612 * Returns value base on SCSI command status
4615 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4619 switch (scsi_status) {
4620 case SAM_STAT_CHECK_CONDITION:
4621 ufshcd_copy_sense_data(lrbp);
4624 result |= DID_OK << 16 |
4625 COMMAND_COMPLETE << 8 |
4628 case SAM_STAT_TASK_SET_FULL:
4630 case SAM_STAT_TASK_ABORTED:
4631 ufshcd_copy_sense_data(lrbp);
4632 result |= scsi_status;
4635 result |= DID_ERROR << 16;
4637 } /* end of switch */
4643 * ufshcd_transfer_rsp_status - Get overall status of the response
4644 * @hba: per adapter instance
4645 * @lrbp: pointer to local reference block of completed command
4647 * Returns result of the command to notify SCSI midlayer
4650 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4656 /* overall command status of utrd */
4657 ocs = ufshcd_get_tr_ocs(lrbp);
4661 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
4662 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
4664 case UPIU_TRANSACTION_RESPONSE:
4666 * get the response UPIU result to extract
4667 * the SCSI command status
4669 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4672 * get the result based on SCSI status response
4673 * to notify the SCSI midlayer of the command status
4675 scsi_status = result & MASK_SCSI_STATUS;
4676 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
4679 * Currently we are only supporting BKOPs exception
4680 * events hence we can ignore BKOPs exception event
4681 * during power management callbacks. BKOPs exception
4682 * event is not expected to be raised in runtime suspend
4683 * callback as it allows the urgent bkops.
4684 * During system suspend, we are anyway forcefully
4685 * disabling the bkops and if urgent bkops is needed
4686 * it will be enabled on system resume. Long term
4687 * solution could be to abort the system suspend if
4688 * UFS device needs urgent BKOPs.
4690 if (!hba->pm_op_in_progress &&
4691 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
4692 schedule_work(&hba->eeh_work);
4694 case UPIU_TRANSACTION_REJECT_UPIU:
4695 /* TODO: handle Reject UPIU Response */
4696 result = DID_ERROR << 16;
4698 "Reject UPIU not fully implemented\n");
4701 result = DID_ERROR << 16;
4703 "Unexpected request response code = %x\n",
4709 result |= DID_ABORT << 16;
4711 case OCS_INVALID_COMMAND_STATUS:
4712 result |= DID_REQUEUE << 16;
4714 case OCS_INVALID_CMD_TABLE_ATTR:
4715 case OCS_INVALID_PRDT_ATTR:
4716 case OCS_MISMATCH_DATA_BUF_SIZE:
4717 case OCS_MISMATCH_RESP_UPIU_SIZE:
4718 case OCS_PEER_COMM_FAILURE:
4719 case OCS_FATAL_ERROR:
4721 result |= DID_ERROR << 16;
4723 "OCS error from controller = %x for tag %d\n",
4724 ocs, lrbp->task_tag);
4725 ufshcd_print_host_regs(hba);
4726 ufshcd_print_host_state(hba);
4728 } /* end of switch */
4730 if (host_byte(result) != DID_OK)
4731 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
4736 * ufshcd_uic_cmd_compl - handle completion of uic command
4737 * @hba: per adapter instance
4738 * @intr_status: interrupt status generated by the controller
4740 static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
4742 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
4743 hba->active_uic_cmd->argument2 |=
4744 ufshcd_get_uic_cmd_result(hba);
4745 hba->active_uic_cmd->argument3 =
4746 ufshcd_get_dme_attr_val(hba);
4747 complete(&hba->active_uic_cmd->done);
4750 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
4751 complete(hba->uic_async_done);
4755 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
4756 * @hba: per adapter instance
4757 * @completed_reqs: requests to complete
4759 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4760 unsigned long completed_reqs)
4762 struct ufshcd_lrb *lrbp;
4763 struct scsi_cmnd *cmd;
4767 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4768 lrbp = &hba->lrb[index];
4771 ufshcd_add_command_trace(hba, index, "complete");
4772 result = ufshcd_transfer_rsp_status(hba, lrbp);
4773 scsi_dma_unmap(cmd);
4774 cmd->result = result;
4775 /* Mark completed command as NULL in LRB */
4777 clear_bit_unlock(index, &hba->lrb_in_use);
4778 /* Do not touch lrbp after scsi done */
4779 cmd->scsi_done(cmd);
4780 __ufshcd_release(hba);
4781 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4782 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
4783 if (hba->dev_cmd.complete) {
4784 ufshcd_add_command_trace(hba, index,
4786 complete(hba->dev_cmd.complete);
4789 if (ufshcd_is_clkscaling_supported(hba))
4790 hba->clk_scaling.active_reqs--;
4792 lrbp->compl_time_stamp = ktime_get();
4795 /* clear corresponding bits of completed commands */
4796 hba->outstanding_reqs ^= completed_reqs;
4798 ufshcd_clk_scaling_update_busy(hba);
4800 /* we might have free'd some tags above */
4801 wake_up(&hba->dev_cmd.tag_wq);
4805 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4806 * @hba: per adapter instance
4808 static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
4810 unsigned long completed_reqs;
4813 /* Resetting interrupt aggregation counters first and reading the
4814 * DOOR_BELL afterward allows us to handle all the completed requests.
4815 * In order to prevent other interrupts starvation the DB is read once
4816 * after reset. The down side of this solution is the possibility of
4817 * false interrupt if device completes another request after resetting
4818 * aggregation and before reading the DB.
4820 if (ufshcd_is_intr_aggr_allowed(hba) &&
4821 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
4822 ufshcd_reset_intr_aggr(hba);
4824 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4825 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4827 __ufshcd_transfer_req_compl(hba, completed_reqs);
4831 * ufshcd_disable_ee - disable exception event
4832 * @hba: per-adapter instance
4833 * @mask: exception event to disable
4835 * Disables exception event in the device so that the EVENT_ALERT
4838 * Returns zero on success, non-zero error value on failure.
4840 static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4845 if (!(hba->ee_ctrl_mask & mask))
4848 val = hba->ee_ctrl_mask & ~mask;
4849 val &= MASK_EE_STATUS;
4850 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4851 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4853 hba->ee_ctrl_mask &= ~mask;
4859 * ufshcd_enable_ee - enable exception event
4860 * @hba: per-adapter instance
4861 * @mask: exception event to enable
4863 * Enable corresponding exception event in the device to allow
4864 * device to alert host in critical scenarios.
4866 * Returns zero on success, non-zero error value on failure.
4868 static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4873 if (hba->ee_ctrl_mask & mask)
4876 val = hba->ee_ctrl_mask | mask;
4877 val &= MASK_EE_STATUS;
4878 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4879 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4881 hba->ee_ctrl_mask |= mask;
4887 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4888 * @hba: per-adapter instance
4890 * Allow device to manage background operations on its own. Enabling
4891 * this might lead to inconsistent latencies during normal data transfers
4892 * as the device is allowed to manage its own way of handling background
4895 * Returns zero on success, non-zero on failure.
4897 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4901 if (hba->auto_bkops_enabled)
4904 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4905 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4907 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4912 hba->auto_bkops_enabled = true;
4913 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
4915 /* No need of URGENT_BKOPS exception from the device */
4916 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4918 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4925 * ufshcd_disable_auto_bkops - block device in doing background operations
4926 * @hba: per-adapter instance
4928 * Disabling background operations improves command response latency but
4929 * has drawback of device moving into critical state where the device is
4930 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4931 * host is idle so that BKOPS are managed effectively without any negative
4934 * Returns zero on success, non-zero on failure.
4936 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4940 if (!hba->auto_bkops_enabled)
4944 * If host assisted BKOPs is to be enabled, make sure
4945 * urgent bkops exception is allowed.
4947 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4949 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4954 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
4955 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4957 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
4959 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4963 hba->auto_bkops_enabled = false;
4964 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
4970 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
4971 * @hba: per adapter instance
4973 * After a device reset the device may toggle the BKOPS_EN flag
4974 * to default value. The s/w tracking variables should be updated
4975 * as well. This function would change the auto-bkops state based on
4976 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
4978 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
4980 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
4981 hba->auto_bkops_enabled = false;
4982 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
4983 ufshcd_enable_auto_bkops(hba);
4985 hba->auto_bkops_enabled = true;
4986 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
4987 ufshcd_disable_auto_bkops(hba);
4991 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
4993 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
4994 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
4998 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
4999 * @hba: per-adapter instance
5000 * @status: bkops_status value
5002 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5003 * flag in the device to permit background operations if the device
5004 * bkops_status is greater than or equal to "status" argument passed to
5005 * this function, disable otherwise.
5007 * Returns 0 for success, non-zero in case of failure.
5009 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5010 * to know whether auto bkops is enabled or disabled after this function
5011 * returns control to it.
5013 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5014 enum bkops_status status)
5017 u32 curr_status = 0;
5019 err = ufshcd_get_bkops_status(hba, &curr_status);
5021 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5024 } else if (curr_status > BKOPS_STATUS_MAX) {
5025 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5026 __func__, curr_status);
5031 if (curr_status >= status)
5032 err = ufshcd_enable_auto_bkops(hba);
5034 err = ufshcd_disable_auto_bkops(hba);
5040 * ufshcd_urgent_bkops - handle urgent bkops exception event
5041 * @hba: per-adapter instance
5043 * Enable fBackgroundOpsEn flag in the device to permit background
5046 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5047 * and negative error value for any other failure.
5049 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5051 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5054 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5056 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5057 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5060 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5063 u32 curr_status = 0;
5065 if (hba->is_urgent_bkops_lvl_checked)
5066 goto enable_auto_bkops;
5068 err = ufshcd_get_bkops_status(hba, &curr_status);
5070 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5076 * We are seeing that some devices are raising the urgent bkops
5077 * exception events even when BKOPS status doesn't indicate performace
5078 * impacted or critical. Handle these device by determining their urgent
5079 * bkops status at runtime.
5081 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5082 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5083 __func__, curr_status);
5084 /* update the current status as the urgent bkops level */
5085 hba->urgent_bkops_lvl = curr_status;
5086 hba->is_urgent_bkops_lvl_checked = true;
5090 err = ufshcd_enable_auto_bkops(hba);
5093 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5098 * ufshcd_exception_event_handler - handle exceptions raised by device
5099 * @work: pointer to work data
5101 * Read bExceptionEventStatus attribute from the device and handle the
5102 * exception event accordingly.
5104 static void ufshcd_exception_event_handler(struct work_struct *work)
5106 struct ufs_hba *hba;
5109 hba = container_of(work, struct ufs_hba, eeh_work);
5111 pm_runtime_get_sync(hba->dev);
5112 scsi_block_requests(hba->host);
5113 err = ufshcd_get_ee_status(hba, &status);
5115 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5120 status &= hba->ee_ctrl_mask;
5122 if (status & MASK_EE_URGENT_BKOPS)
5123 ufshcd_bkops_exception_event_handler(hba);
5126 scsi_unblock_requests(hba->host);
5127 pm_runtime_put_sync(hba->dev);
5131 /* Complete requests that have door-bell cleared */
5132 static void ufshcd_complete_requests(struct ufs_hba *hba)
5134 ufshcd_transfer_req_compl(hba);
5135 ufshcd_tmc_handler(hba);
5139 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5140 * to recover from the DL NAC errors or not.
5141 * @hba: per-adapter instance
5143 * Returns true if error handling is required, false otherwise
5145 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5147 unsigned long flags;
5148 bool err_handling = true;
5150 spin_lock_irqsave(hba->host->host_lock, flags);
5152 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5153 * device fatal error and/or DL NAC & REPLAY timeout errors.
5155 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5158 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5159 ((hba->saved_err & UIC_ERROR) &&
5160 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5163 if ((hba->saved_err & UIC_ERROR) &&
5164 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5167 * wait for 50ms to see if we can get any other errors or not.
5169 spin_unlock_irqrestore(hba->host->host_lock, flags);
5171 spin_lock_irqsave(hba->host->host_lock, flags);
5174 * now check if we have got any other severe errors other than
5177 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5178 ((hba->saved_err & UIC_ERROR) &&
5179 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5183 * As DL NAC is the only error received so far, send out NOP
5184 * command to confirm if link is still active or not.
5185 * - If we don't get any response then do error recovery.
5186 * - If we get response then clear the DL NAC error bit.
5189 spin_unlock_irqrestore(hba->host->host_lock, flags);
5190 err = ufshcd_verify_dev_init(hba);
5191 spin_lock_irqsave(hba->host->host_lock, flags);
5196 /* Link seems to be alive hence ignore the DL NAC errors */
5197 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5198 hba->saved_err &= ~UIC_ERROR;
5199 /* clear NAC error */
5200 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5201 if (!hba->saved_uic_err) {
5202 err_handling = false;
5207 spin_unlock_irqrestore(hba->host->host_lock, flags);
5208 return err_handling;
5212 * ufshcd_err_handler - handle UFS errors that require s/w attention
5213 * @work: pointer to work structure
5215 static void ufshcd_err_handler(struct work_struct *work)
5217 struct ufs_hba *hba;
5218 unsigned long flags;
5223 bool needs_reset = false;
5225 hba = container_of(work, struct ufs_hba, eh_work);
5227 pm_runtime_get_sync(hba->dev);
5228 ufshcd_hold(hba, false);
5230 spin_lock_irqsave(hba->host->host_lock, flags);
5231 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
5234 hba->ufshcd_state = UFSHCD_STATE_RESET;
5235 ufshcd_set_eh_in_progress(hba);
5237 /* Complete requests that have door-bell cleared by h/w */
5238 ufshcd_complete_requests(hba);
5240 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5243 spin_unlock_irqrestore(hba->host->host_lock, flags);
5244 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5245 ret = ufshcd_quirk_dl_nac_errors(hba);
5246 spin_lock_irqsave(hba->host->host_lock, flags);
5248 goto skip_err_handling;
5250 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5251 ((hba->saved_err & UIC_ERROR) &&
5252 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5253 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5254 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5258 * if host reset is required then skip clearing the pending
5259 * transfers forcefully because they will automatically get
5260 * cleared after link startup.
5263 goto skip_pending_xfer_clear;
5265 /* release lock as clear command might sleep */
5266 spin_unlock_irqrestore(hba->host->host_lock, flags);
5267 /* Clear pending transfer requests */
5268 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5269 if (ufshcd_clear_cmd(hba, tag)) {
5271 goto lock_skip_pending_xfer_clear;
5275 /* Clear pending task management requests */
5276 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5277 if (ufshcd_clear_tm_cmd(hba, tag)) {
5279 goto lock_skip_pending_xfer_clear;
5283 lock_skip_pending_xfer_clear:
5284 spin_lock_irqsave(hba->host->host_lock, flags);
5286 /* Complete the requests that are cleared by s/w */
5287 ufshcd_complete_requests(hba);
5289 if (err_xfer || err_tm)
5292 skip_pending_xfer_clear:
5293 /* Fatal errors need reset */
5295 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5298 * ufshcd_reset_and_restore() does the link reinitialization
5299 * which will need atleast one empty doorbell slot to send the
5300 * device management commands (NOP and query commands).
5301 * If there is no slot empty at this moment then free up last
5304 if (hba->outstanding_reqs == max_doorbells)
5305 __ufshcd_transfer_req_compl(hba,
5306 (1UL << (hba->nutrs - 1)));
5308 spin_unlock_irqrestore(hba->host->host_lock, flags);
5309 err = ufshcd_reset_and_restore(hba);
5310 spin_lock_irqsave(hba->host->host_lock, flags);
5312 dev_err(hba->dev, "%s: reset and restore failed\n",
5314 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5317 * Inform scsi mid-layer that we did reset and allow to handle
5318 * Unit Attention properly.
5320 scsi_report_bus_reset(hba->host, 0);
5322 hba->saved_uic_err = 0;
5327 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5328 if (hba->saved_err || hba->saved_uic_err)
5329 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5330 __func__, hba->saved_err, hba->saved_uic_err);
5333 ufshcd_clear_eh_in_progress(hba);
5336 spin_unlock_irqrestore(hba->host->host_lock, flags);
5337 ufshcd_scsi_unblock_requests(hba);
5338 ufshcd_release(hba);
5339 pm_runtime_put_sync(hba->dev);
5342 static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5345 reg_hist->reg[reg_hist->pos] = reg;
5346 reg_hist->tstamp[reg_hist->pos] = ktime_get();
5347 reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5351 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5352 * @hba: per-adapter instance
5354 static void ufshcd_update_uic_error(struct ufs_hba *hba)
5358 /* PHY layer lane error */
5359 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5360 /* Ignore LINERESET indication, as this is not an error */
5361 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5362 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5364 * To know whether this error is fatal or not, DB timeout
5365 * must be checked but this error is handled separately.
5367 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
5368 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5371 /* PA_INIT_ERROR is fatal and needs UIC reset */
5372 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
5374 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5376 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5377 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5378 else if (hba->dev_quirks &
5379 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5380 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5382 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5383 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5384 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5387 /* UIC NL/TL/DME errors needs software retry */
5388 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
5390 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
5391 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
5394 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
5396 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
5397 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
5400 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
5402 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
5403 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
5406 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5407 __func__, hba->uic_error);
5411 * ufshcd_check_errors - Check for errors that need s/w attention
5412 * @hba: per-adapter instance
5414 static void ufshcd_check_errors(struct ufs_hba *hba)
5416 bool queue_eh_work = false;
5418 if (hba->errors & INT_FATAL_ERRORS)
5419 queue_eh_work = true;
5421 if (hba->errors & UIC_ERROR) {
5423 ufshcd_update_uic_error(hba);
5425 queue_eh_work = true;
5428 if (queue_eh_work) {
5430 * update the transfer error masks to sticky bits, let's do this
5431 * irrespective of current ufshcd_state.
5433 hba->saved_err |= hba->errors;
5434 hba->saved_uic_err |= hba->uic_error;
5436 /* handle fatal errors only when link is functional */
5437 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5438 /* block commands from scsi mid-layer */
5439 ufshcd_scsi_block_requests(hba);
5441 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
5443 /* dump controller state before resetting */
5444 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5445 bool pr_prdt = !!(hba->saved_err &
5446 SYSTEM_BUS_FATAL_ERROR);
5448 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5449 __func__, hba->saved_err,
5450 hba->saved_uic_err);
5452 ufshcd_print_host_regs(hba);
5453 ufshcd_print_pwr_info(hba);
5454 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5455 ufshcd_print_trs(hba, hba->outstanding_reqs,
5458 schedule_work(&hba->eh_work);
5462 * if (!queue_eh_work) -
5463 * Other errors are either non-fatal where host recovers
5464 * itself without s/w intervention or errors that will be
5465 * handled by the SCSI core layer.
5470 * ufshcd_tmc_handler - handle task management function completion
5471 * @hba: per adapter instance
5473 static void ufshcd_tmc_handler(struct ufs_hba *hba)
5477 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
5478 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
5479 wake_up(&hba->tm_wq);
5483 * ufshcd_sl_intr - Interrupt service routine
5484 * @hba: per adapter instance
5485 * @intr_status: contains interrupts generated by the controller
5487 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5489 hba->errors = UFSHCD_ERROR_MASK & intr_status;
5491 ufshcd_check_errors(hba);
5493 if (intr_status & UFSHCD_UIC_MASK)
5494 ufshcd_uic_cmd_compl(hba, intr_status);
5496 if (intr_status & UTP_TASK_REQ_COMPL)
5497 ufshcd_tmc_handler(hba);
5499 if (intr_status & UTP_TRANSFER_REQ_COMPL)
5500 ufshcd_transfer_req_compl(hba);
5504 * ufshcd_intr - Main interrupt service routine
5506 * @__hba: pointer to adapter instance
5508 * Returns IRQ_HANDLED - If interrupt is valid
5509 * IRQ_NONE - If invalid interrupt
5511 static irqreturn_t ufshcd_intr(int irq, void *__hba)
5513 u32 intr_status, enabled_intr_status;
5514 irqreturn_t retval = IRQ_NONE;
5515 struct ufs_hba *hba = __hba;
5516 int retries = hba->nutrs;
5518 spin_lock(hba->host->host_lock);
5519 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5522 * There could be max of hba->nutrs reqs in flight and in worst case
5523 * if the reqs get finished 1 by 1 after the interrupt status is
5524 * read, make sure we handle them by checking the interrupt status
5525 * again in a loop until we process all of the reqs before returning.
5528 enabled_intr_status =
5529 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5531 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5532 if (enabled_intr_status) {
5533 ufshcd_sl_intr(hba, enabled_intr_status);
5534 retval = IRQ_HANDLED;
5537 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5538 } while (intr_status && --retries);
5540 spin_unlock(hba->host->host_lock);
5544 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5547 u32 mask = 1 << tag;
5548 unsigned long flags;
5550 if (!test_bit(tag, &hba->outstanding_tasks))
5553 spin_lock_irqsave(hba->host->host_lock, flags);
5554 ufshcd_utmrl_clear(hba, tag);
5555 spin_unlock_irqrestore(hba->host->host_lock, flags);
5557 /* poll for max. 1 sec to clear door bell register by h/w */
5558 err = ufshcd_wait_for_register(hba,
5559 REG_UTP_TASK_REQ_DOOR_BELL,
5560 mask, 0, 1000, 1000, true);
5565 static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5566 struct utp_task_req_desc *treq, u8 tm_function)
5568 struct Scsi_Host *host = hba->host;
5569 unsigned long flags;
5570 int free_slot, task_tag, err;
5573 * Get free slot, sleep if slots are unavailable.
5574 * Even though we use wait_event() which sleeps indefinitely,
5575 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5577 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
5578 ufshcd_hold(hba, false);
5580 spin_lock_irqsave(host->host_lock, flags);
5581 task_tag = hba->nutrs + free_slot;
5583 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5585 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
5586 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5588 /* send command to the controller */
5589 __set_bit(free_slot, &hba->outstanding_tasks);
5591 /* Make sure descriptors are ready before ringing the task doorbell */
5594 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
5595 /* Make sure that doorbell is committed immediately */
5598 spin_unlock_irqrestore(host->host_lock, flags);
5600 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5602 /* wait until the task management command is completed */
5603 err = wait_event_timeout(hba->tm_wq,
5604 test_bit(free_slot, &hba->tm_condition),
5605 msecs_to_jiffies(TM_CMD_TIMEOUT));
5607 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
5608 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5609 __func__, tm_function);
5610 if (ufshcd_clear_tm_cmd(hba, free_slot))
5611 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5612 __func__, free_slot);
5616 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5618 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
5620 spin_lock_irqsave(hba->host->host_lock, flags);
5621 __clear_bit(free_slot, &hba->outstanding_tasks);
5622 spin_unlock_irqrestore(hba->host->host_lock, flags);
5626 clear_bit(free_slot, &hba->tm_condition);
5627 ufshcd_put_tm_slot(hba, free_slot);
5628 wake_up(&hba->tm_tag_wq);
5630 ufshcd_release(hba);
5635 * ufshcd_issue_tm_cmd - issues task management commands to controller
5636 * @hba: per adapter instance
5637 * @lun_id: LUN ID to which TM command is sent
5638 * @task_id: task ID to which the TM command is applicable
5639 * @tm_function: task management function opcode
5640 * @tm_response: task management service response return value
5642 * Returns non-zero value on error, zero on success.
5644 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5645 u8 tm_function, u8 *tm_response)
5647 struct utp_task_req_desc treq = { { 0 }, };
5650 /* Configure task request descriptor */
5651 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5652 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5654 /* Configure task request UPIU */
5655 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5656 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5657 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5660 * The host shall provide the same value for LUN field in the basic
5661 * header and for Input Parameter.
5663 treq.input_param1 = cpu_to_be32(lun_id);
5664 treq.input_param2 = cpu_to_be32(task_id);
5666 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5667 if (err == -ETIMEDOUT)
5670 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5671 if (ocs_value != OCS_SUCCESS)
5672 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5673 __func__, ocs_value);
5674 else if (tm_response)
5675 *tm_response = be32_to_cpu(treq.output_param1) &
5676 MASK_TM_SERVICE_RESP;
5681 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5682 * @hba: per-adapter instance
5683 * @req_upiu: upiu request
5684 * @rsp_upiu: upiu reply
5685 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5686 * @desc_buff: pointer to descriptor buffer, NULL if NA
5687 * @buff_len: descriptor size, 0 if NA
5688 * @desc_op: descriptor operation
5690 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5691 * Therefore, it "rides" the device management infrastructure: uses its tag and
5692 * tasks work queues.
5694 * Since there is only one available tag for device management commands,
5695 * the caller is expected to hold the hba->dev_cmd.lock mutex.
5697 static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5698 struct utp_upiu_req *req_upiu,
5699 struct utp_upiu_req *rsp_upiu,
5700 u8 *desc_buff, int *buff_len,
5702 enum query_opcode desc_op)
5704 struct ufshcd_lrb *lrbp;
5707 struct completion wait;
5708 unsigned long flags;
5711 down_read(&hba->clk_scaling_lock);
5713 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
5715 init_completion(&wait);
5716 lrbp = &hba->lrb[tag];
5720 lrbp->sense_bufflen = 0;
5721 lrbp->sense_buffer = NULL;
5722 lrbp->task_tag = tag;
5724 lrbp->intr_cmd = true;
5725 hba->dev_cmd.type = cmd_type;
5727 switch (hba->ufs_version) {
5728 case UFSHCI_VERSION_10:
5729 case UFSHCI_VERSION_11:
5730 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5733 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5737 /* update the task tag in the request upiu */
5738 req_upiu->header.dword_0 |= cpu_to_be32(tag);
5740 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5742 /* just copy the upiu request as it is */
5743 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5744 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5745 /* The Data Segment Area is optional depending upon the query
5746 * function value. for WRITE DESCRIPTOR, the data segment
5747 * follows right after the tsf.
5749 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5753 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5755 hba->dev_cmd.complete = &wait;
5757 /* Make sure descriptors are ready before ringing the doorbell */
5759 spin_lock_irqsave(hba->host->host_lock, flags);
5760 ufshcd_send_command(hba, tag);
5761 spin_unlock_irqrestore(hba->host->host_lock, flags);
5764 * ignore the returning value here - ufshcd_check_query_response is
5765 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5766 * read the response directly ignoring all errors.
5768 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5770 /* just copy the upiu response as it is */
5771 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
5773 ufshcd_put_dev_cmd_tag(hba, tag);
5774 wake_up(&hba->dev_cmd.tag_wq);
5775 up_read(&hba->clk_scaling_lock);
5780 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5781 * @hba: per-adapter instance
5782 * @req_upiu: upiu request
5783 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
5784 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5785 * @desc_buff: pointer to descriptor buffer, NULL if NA
5786 * @buff_len: descriptor size, 0 if NA
5787 * @desc_op: descriptor operation
5789 * Supports UTP Transfer requests (nop and query), and UTP Task
5790 * Management requests.
5791 * It is up to the caller to fill the upiu conent properly, as it will
5792 * be copied without any further input validations.
5794 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5795 struct utp_upiu_req *req_upiu,
5796 struct utp_upiu_req *rsp_upiu,
5798 u8 *desc_buff, int *buff_len,
5799 enum query_opcode desc_op)
5802 int cmd_type = DEV_CMD_TYPE_QUERY;
5803 struct utp_task_req_desc treq = { { 0 }, };
5805 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5807 if (desc_buff && desc_op != UPIU_QUERY_OPCODE_WRITE_DESC) {
5813 case UPIU_TRANSACTION_NOP_OUT:
5814 cmd_type = DEV_CMD_TYPE_NOP;
5816 case UPIU_TRANSACTION_QUERY_REQ:
5817 ufshcd_hold(hba, false);
5818 mutex_lock(&hba->dev_cmd.lock);
5819 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5820 desc_buff, buff_len,
5822 mutex_unlock(&hba->dev_cmd.lock);
5823 ufshcd_release(hba);
5826 case UPIU_TRANSACTION_TASK_REQ:
5827 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5828 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5830 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
5832 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
5833 if (err == -ETIMEDOUT)
5836 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5837 if (ocs_value != OCS_SUCCESS) {
5838 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
5843 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
5857 * ufshcd_eh_device_reset_handler - device reset handler registered to
5859 * @cmd: SCSI command pointer
5861 * Returns SUCCESS/FAILED
5863 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
5865 struct Scsi_Host *host;
5866 struct ufs_hba *hba;
5871 struct ufshcd_lrb *lrbp;
5872 unsigned long flags;
5874 host = cmd->device->host;
5875 hba = shost_priv(host);
5876 tag = cmd->request->tag;
5878 lrbp = &hba->lrb[tag];
5879 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
5880 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
5886 /* clear the commands that were pending for corresponding LUN */
5887 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
5888 if (hba->lrb[pos].lun == lrbp->lun) {
5889 err = ufshcd_clear_cmd(hba, pos);
5894 spin_lock_irqsave(host->host_lock, flags);
5895 ufshcd_transfer_req_compl(hba);
5896 spin_unlock_irqrestore(host->host_lock, flags);
5899 hba->req_abort_count = 0;
5903 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5909 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
5911 struct ufshcd_lrb *lrbp;
5914 for_each_set_bit(tag, &bitmap, hba->nutrs) {
5915 lrbp = &hba->lrb[tag];
5916 lrbp->req_abort_skip = true;
5921 * ufshcd_abort - abort a specific command
5922 * @cmd: SCSI command pointer
5924 * Abort the pending command in device by sending UFS_ABORT_TASK task management
5925 * command, and in host controller by clearing the door-bell register. There can
5926 * be race between controller sending the command to the device while abort is
5927 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
5928 * really issued and then try to abort it.
5930 * Returns SUCCESS/FAILED
5932 static int ufshcd_abort(struct scsi_cmnd *cmd)
5934 struct Scsi_Host *host;
5935 struct ufs_hba *hba;
5936 unsigned long flags;
5941 struct ufshcd_lrb *lrbp;
5944 host = cmd->device->host;
5945 hba = shost_priv(host);
5946 tag = cmd->request->tag;
5947 lrbp = &hba->lrb[tag];
5948 if (!ufshcd_valid_tag(hba, tag)) {
5950 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
5951 __func__, tag, cmd, cmd->request);
5956 * Task abort to the device W-LUN is illegal. When this command
5957 * will fail, due to spec violation, scsi err handling next step
5958 * will be to send LU reset which, again, is a spec violation.
5959 * To avoid these unnecessary/illegal step we skip to the last error
5960 * handling stage: reset and restore.
5962 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
5963 return ufshcd_eh_host_reset_handler(cmd);
5965 ufshcd_hold(hba, false);
5966 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5967 /* If command is already aborted/completed, return SUCCESS */
5968 if (!(test_bit(tag, &hba->outstanding_reqs))) {
5970 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
5971 __func__, tag, hba->outstanding_reqs, reg);
5975 if (!(reg & (1 << tag))) {
5977 "%s: cmd was completed, but without a notifying intr, tag = %d",
5981 /* Print Transfer Request of aborted task */
5982 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
5985 * Print detailed info about aborted request.
5986 * As more than one request might get aborted at the same time,
5987 * print full information only for the first aborted request in order
5988 * to reduce repeated printouts. For other aborted requests only print
5991 scsi_print_command(hba->lrb[tag].cmd);
5992 if (!hba->req_abort_count) {
5993 ufshcd_print_host_regs(hba);
5994 ufshcd_print_host_state(hba);
5995 ufshcd_print_pwr_info(hba);
5996 ufshcd_print_trs(hba, 1 << tag, true);
5998 ufshcd_print_trs(hba, 1 << tag, false);
6000 hba->req_abort_count++;
6002 /* Skip task abort in case previous aborts failed and report failure */
6003 if (lrbp->req_abort_skip) {
6008 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6009 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6010 UFS_QUERY_TASK, &resp);
6011 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6012 /* cmd pending in the device */
6013 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6016 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6018 * cmd not pending in the device, check if it is
6021 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6023 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6024 if (reg & (1 << tag)) {
6025 /* sleep for max. 200us to stabilize */
6026 usleep_range(100, 200);
6029 /* command completed already */
6030 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6035 "%s: no response from device. tag = %d, err %d\n",
6036 __func__, tag, err);
6038 err = resp; /* service response error */
6048 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6049 UFS_ABORT_TASK, &resp);
6050 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6052 err = resp; /* service response error */
6053 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6054 __func__, tag, err);
6059 err = ufshcd_clear_cmd(hba, tag);
6061 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6062 __func__, tag, err);
6066 scsi_dma_unmap(cmd);
6068 spin_lock_irqsave(host->host_lock, flags);
6069 ufshcd_outstanding_req_clear(hba, tag);
6070 hba->lrb[tag].cmd = NULL;
6071 spin_unlock_irqrestore(host->host_lock, flags);
6073 clear_bit_unlock(tag, &hba->lrb_in_use);
6074 wake_up(&hba->dev_cmd.tag_wq);
6080 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6081 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
6086 * This ufshcd_release() corresponds to the original scsi cmd that got
6087 * aborted here (as we won't get any IRQ for it).
6089 ufshcd_release(hba);
6094 * ufshcd_host_reset_and_restore - reset and restore host controller
6095 * @hba: per-adapter instance
6097 * Note that host controller reset may issue DME_RESET to
6098 * local and remote (device) Uni-Pro stack and the attributes
6099 * are reset to default state.
6101 * Returns zero on success, non-zero on failure
6103 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6106 unsigned long flags;
6108 /* Reset the host controller */
6109 spin_lock_irqsave(hba->host->host_lock, flags);
6110 ufshcd_hba_stop(hba, false);
6111 spin_unlock_irqrestore(hba->host->host_lock, flags);
6113 /* scale up clocks to max frequency before full reinitialization */
6114 ufshcd_scale_clks(hba, true);
6116 err = ufshcd_hba_enable(hba);
6120 /* Establish the link again and restore the device */
6121 err = ufshcd_probe_hba(hba);
6123 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
6127 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6133 * ufshcd_reset_and_restore - reset and re-initialize host/device
6134 * @hba: per-adapter instance
6136 * Reset and recover device, host and re-establish link. This
6137 * is helpful to recover the communication in fatal error conditions.
6139 * Returns zero on success, non-zero on failure
6141 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6144 unsigned long flags;
6145 int retries = MAX_HOST_RESET_RETRIES;
6148 err = ufshcd_host_reset_and_restore(hba);
6149 } while (err && --retries);
6152 * After reset the door-bell might be cleared, complete
6153 * outstanding requests in s/w here.
6155 spin_lock_irqsave(hba->host->host_lock, flags);
6156 ufshcd_transfer_req_compl(hba);
6157 ufshcd_tmc_handler(hba);
6158 spin_unlock_irqrestore(hba->host->host_lock, flags);
6164 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
6165 * @cmd: SCSI command pointer
6167 * Returns SUCCESS/FAILED
6169 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6172 unsigned long flags;
6173 struct ufs_hba *hba;
6175 hba = shost_priv(cmd->device->host);
6177 ufshcd_hold(hba, false);
6179 * Check if there is any race with fatal error handling.
6180 * If so, wait for it to complete. Even though fatal error
6181 * handling does reset and restore in some cases, don't assume
6182 * anything out of it. We are just avoiding race here.
6185 spin_lock_irqsave(hba->host->host_lock, flags);
6186 if (!(work_pending(&hba->eh_work) ||
6187 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6188 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
6190 spin_unlock_irqrestore(hba->host->host_lock, flags);
6191 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
6192 flush_work(&hba->eh_work);
6195 hba->ufshcd_state = UFSHCD_STATE_RESET;
6196 ufshcd_set_eh_in_progress(hba);
6197 spin_unlock_irqrestore(hba->host->host_lock, flags);
6199 err = ufshcd_reset_and_restore(hba);
6201 spin_lock_irqsave(hba->host->host_lock, flags);
6204 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6207 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6209 ufshcd_clear_eh_in_progress(hba);
6210 spin_unlock_irqrestore(hba->host->host_lock, flags);
6212 ufshcd_release(hba);
6217 * ufshcd_get_max_icc_level - calculate the ICC level
6218 * @sup_curr_uA: max. current supported by the regulator
6219 * @start_scan: row at the desc table to start scan from
6220 * @buff: power descriptor buffer
6222 * Returns calculated max ICC level for specific regulator
6224 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6231 for (i = start_scan; i >= 0; i--) {
6232 data = be16_to_cpup((__be16 *)&buff[2 * i]);
6233 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6234 ATTR_ICC_LVL_UNIT_OFFSET;
6235 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6237 case UFSHCD_NANO_AMP:
6238 curr_uA = curr_uA / 1000;
6240 case UFSHCD_MILI_AMP:
6241 curr_uA = curr_uA * 1000;
6244 curr_uA = curr_uA * 1000 * 1000;
6246 case UFSHCD_MICRO_AMP:
6250 if (sup_curr_uA >= curr_uA)
6255 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6262 * ufshcd_calc_icc_level - calculate the max ICC level
6263 * In case regulators are not initialized we'll return 0
6264 * @hba: per-adapter instance
6265 * @desc_buf: power descriptor buffer to extract ICC levels from.
6266 * @len: length of desc_buff
6268 * Returns calculated ICC level
6270 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6271 u8 *desc_buf, int len)
6275 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6276 !hba->vreg_info.vccq2) {
6278 "%s: Regulator capability was not set, actvIccLevel=%d",
6279 __func__, icc_level);
6283 if (hba->vreg_info.vcc)
6284 icc_level = ufshcd_get_max_icc_level(
6285 hba->vreg_info.vcc->max_uA,
6286 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6287 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6289 if (hba->vreg_info.vccq)
6290 icc_level = ufshcd_get_max_icc_level(
6291 hba->vreg_info.vccq->max_uA,
6293 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6295 if (hba->vreg_info.vccq2)
6296 icc_level = ufshcd_get_max_icc_level(
6297 hba->vreg_info.vccq2->max_uA,
6299 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6304 static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6307 int buff_len = hba->desc_size.pwr_desc;
6310 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6314 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6317 "%s: Failed reading power descriptor.len = %d ret = %d",
6318 __func__, buff_len, ret);
6322 hba->init_prefetch_data.icc_level =
6323 ufshcd_find_max_sup_active_icc_level(hba,
6324 desc_buf, buff_len);
6325 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6326 __func__, hba->init_prefetch_data.icc_level);
6328 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6329 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6330 &hba->init_prefetch_data.icc_level);
6334 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6335 __func__, hba->init_prefetch_data.icc_level , ret);
6342 * ufshcd_scsi_add_wlus - Adds required W-LUs
6343 * @hba: per-adapter instance
6345 * UFS device specification requires the UFS devices to support 4 well known
6347 * "REPORT_LUNS" (address: 01h)
6348 * "UFS Device" (address: 50h)
6349 * "RPMB" (address: 44h)
6350 * "BOOT" (address: 30h)
6351 * UFS device's power management needs to be controlled by "POWER CONDITION"
6352 * field of SSU (START STOP UNIT) command. But this "power condition" field
6353 * will take effect only when its sent to "UFS device" well known logical unit
6354 * hence we require the scsi_device instance to represent this logical unit in
6355 * order for the UFS host driver to send the SSU command for power management.
6357 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6358 * Block) LU so user space process can control this LU. User space may also
6359 * want to have access to BOOT LU.
6361 * This function adds scsi device instances for each of all well known LUs
6362 * (except "REPORT LUNS" LU).
6364 * Returns zero on success (all required W-LUs are added successfully),
6365 * non-zero error value on failure (if failed to add any of the required W-LU).
6367 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6370 struct scsi_device *sdev_rpmb;
6371 struct scsi_device *sdev_boot;
6373 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6374 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6375 if (IS_ERR(hba->sdev_ufs_device)) {
6376 ret = PTR_ERR(hba->sdev_ufs_device);
6377 hba->sdev_ufs_device = NULL;
6380 scsi_device_put(hba->sdev_ufs_device);
6382 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
6383 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
6384 if (IS_ERR(sdev_rpmb)) {
6385 ret = PTR_ERR(sdev_rpmb);
6386 goto remove_sdev_ufs_device;
6388 scsi_device_put(sdev_rpmb);
6390 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6391 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6392 if (IS_ERR(sdev_boot))
6393 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6395 scsi_device_put(sdev_boot);
6398 remove_sdev_ufs_device:
6399 scsi_remove_device(hba->sdev_ufs_device);
6404 static int ufs_get_device_desc(struct ufs_hba *hba,
6405 struct ufs_dev_desc *dev_desc)
6412 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6413 QUERY_DESC_MAX_SIZE + 1);
6414 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6420 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
6422 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6428 * getting vendor (manufacturerID) and Bank Index in big endian
6431 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
6432 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6434 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6436 /* Zero-pad entire buffer for string termination. */
6437 memset(desc_buf, 0, buff_len);
6439 err = ufshcd_read_string_desc(hba, model_index, desc_buf,
6440 QUERY_DESC_MAX_SIZE, true/*ASCII*/);
6442 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6447 desc_buf[QUERY_DESC_MAX_SIZE] = '\0';
6448 strlcpy(dev_desc->model, (desc_buf + QUERY_DESC_HDR_SIZE),
6449 min_t(u8, desc_buf[QUERY_DESC_LENGTH_OFFSET],
6452 /* Null terminate the model string */
6453 dev_desc->model[MAX_MODEL_LEN] = '\0';
6460 static void ufs_fixup_device_setup(struct ufs_hba *hba,
6461 struct ufs_dev_desc *dev_desc)
6463 struct ufs_dev_fix *f;
6465 for (f = ufs_fixups; f->quirk; f++) {
6466 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6467 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6468 (STR_PRFX_EQUAL(f->card.model, dev_desc->model) ||
6469 !strcmp(f->card.model, UFS_ANY_MODEL)))
6470 hba->dev_quirks |= f->quirk;
6475 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6476 * @hba: per-adapter instance
6478 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6479 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6480 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6481 * the hibern8 exit latency.
6483 * Returns zero on success, non-zero error value on failure.
6485 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6488 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6490 ret = ufshcd_dme_peer_get(hba,
6492 RX_MIN_ACTIVATETIME_CAPABILITY,
6493 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6494 &peer_rx_min_activatetime);
6498 /* make sure proper unit conversion is applied */
6499 tuned_pa_tactivate =
6500 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6501 / PA_TACTIVATE_TIME_UNIT_US);
6502 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6503 tuned_pa_tactivate);
6510 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6511 * @hba: per-adapter instance
6513 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6514 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6515 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6516 * This optimal value can help reduce the hibern8 exit latency.
6518 * Returns zero on success, non-zero error value on failure.
6520 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6523 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6524 u32 max_hibern8_time, tuned_pa_hibern8time;
6526 ret = ufshcd_dme_get(hba,
6527 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6528 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6529 &local_tx_hibern8_time_cap);
6533 ret = ufshcd_dme_peer_get(hba,
6534 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6535 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6536 &peer_rx_hibern8_time_cap);
6540 max_hibern8_time = max(local_tx_hibern8_time_cap,
6541 peer_rx_hibern8_time_cap);
6542 /* make sure proper unit conversion is applied */
6543 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6544 / PA_HIBERN8_TIME_UNIT_US);
6545 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6546 tuned_pa_hibern8time);
6552 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6553 * less than device PA_TACTIVATE time.
6554 * @hba: per-adapter instance
6556 * Some UFS devices require host PA_TACTIVATE to be lower than device
6557 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6560 * Returns zero on success, non-zero error value on failure.
6562 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6565 u32 granularity, peer_granularity;
6566 u32 pa_tactivate, peer_pa_tactivate;
6567 u32 pa_tactivate_us, peer_pa_tactivate_us;
6568 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6570 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6575 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6580 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6581 (granularity > PA_GRANULARITY_MAX_VAL)) {
6582 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6583 __func__, granularity);
6587 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6588 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6589 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6590 __func__, peer_granularity);
6594 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6598 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6599 &peer_pa_tactivate);
6603 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6604 peer_pa_tactivate_us = peer_pa_tactivate *
6605 gran_to_us_table[peer_granularity - 1];
6607 if (pa_tactivate_us > peer_pa_tactivate_us) {
6608 u32 new_peer_pa_tactivate;
6610 new_peer_pa_tactivate = pa_tactivate_us /
6611 gran_to_us_table[peer_granularity - 1];
6612 new_peer_pa_tactivate++;
6613 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6614 new_peer_pa_tactivate);
6621 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6623 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6624 ufshcd_tune_pa_tactivate(hba);
6625 ufshcd_tune_pa_hibern8time(hba);
6628 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6629 /* set 1ms timeout for PA_TACTIVATE */
6630 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
6632 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6633 ufshcd_quirk_tune_host_pa_tactivate(hba);
6635 ufshcd_vops_apply_dev_quirks(hba);
6638 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6640 int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6642 hba->ufs_stats.hibern8_exit_cnt = 0;
6643 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6645 memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6646 memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6647 memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6648 memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6649 memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
6651 hba->req_abort_count = 0;
6654 static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6658 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6659 &hba->desc_size.dev_desc);
6661 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6663 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6664 &hba->desc_size.pwr_desc);
6666 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6668 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6669 &hba->desc_size.interc_desc);
6671 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6673 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6674 &hba->desc_size.conf_desc);
6676 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6678 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6679 &hba->desc_size.unit_desc);
6681 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6683 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6684 &hba->desc_size.geom_desc);
6686 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6687 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6688 &hba->desc_size.hlth_desc);
6690 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6693 static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
6695 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6696 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6697 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6698 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6699 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6700 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6701 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6704 static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6705 {19200000, REF_CLK_FREQ_19_2_MHZ},
6706 {26000000, REF_CLK_FREQ_26_MHZ},
6707 {38400000, REF_CLK_FREQ_38_4_MHZ},
6708 {52000000, REF_CLK_FREQ_52_MHZ},
6709 {0, REF_CLK_FREQ_INVAL},
6712 static enum ufs_ref_clk_freq
6713 ufs_get_bref_clk_from_hz(unsigned long freq)
6717 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6718 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6719 return ufs_ref_clk_freqs[i].val;
6721 return REF_CLK_FREQ_INVAL;
6724 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6728 freq = clk_get_rate(refclk);
6730 hba->dev_ref_clk_freq =
6731 ufs_get_bref_clk_from_hz(freq);
6733 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6735 "invalid ref_clk setting = %ld\n", freq);
6738 static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6742 u32 freq = hba->dev_ref_clk_freq;
6744 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6745 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6748 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6753 if (ref_clk == freq)
6754 goto out; /* nothing to update */
6756 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6757 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6760 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6761 ufs_ref_clk_freqs[freq].freq_hz);
6765 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6766 ufs_ref_clk_freqs[freq].freq_hz);
6773 * ufshcd_probe_hba - probe hba to detect device and initialize
6774 * @hba: per-adapter instance
6776 * Execute link-startup and verify device initialization
6778 static int ufshcd_probe_hba(struct ufs_hba *hba)
6780 struct ufs_dev_desc card = {0};
6782 ktime_t start = ktime_get();
6784 ret = ufshcd_link_startup(hba);
6788 /* set the default level for urgent bkops */
6789 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6790 hba->is_urgent_bkops_lvl_checked = false;
6792 /* Debug counters initialization */
6793 ufshcd_clear_dbg_ufs_stats(hba);
6795 /* UniPro link is active now */
6796 ufshcd_set_link_active(hba);
6798 /* Enable Auto-Hibernate if configured */
6799 ufshcd_auto_hibern8_enable(hba);
6801 ret = ufshcd_verify_dev_init(hba);
6805 ret = ufshcd_complete_dev_init(hba);
6809 /* Init check for device descriptor sizes */
6810 ufshcd_init_desc_sizes(hba);
6812 ret = ufs_get_device_desc(hba, &card);
6814 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6819 ufs_fixup_device_setup(hba, &card);
6820 ufshcd_tune_unipro_params(hba);
6822 /* UFS device is also active now */
6823 ufshcd_set_ufs_dev_active(hba);
6824 ufshcd_force_reset_auto_bkops(hba);
6825 hba->wlun_dev_clr_ua = true;
6827 if (ufshcd_get_max_pwr_mode(hba)) {
6829 "%s: Failed getting max supported power mode\n",
6833 * Set the right value to bRefClkFreq before attempting to
6834 * switch to HS gears.
6836 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6837 ufshcd_set_dev_ref_clk(hba);
6838 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
6840 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6846 /* set the state as operational after switching to desired gear */
6847 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6850 * If we are in error handling context or in power management callbacks
6851 * context, no need to scan the host
6853 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6856 /* clear any previous UFS device information */
6857 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
6858 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6859 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
6860 hba->dev_info.f_power_on_wp_en = flag;
6862 if (!hba->is_init_prefetch)
6863 ufshcd_init_icc_levels(hba);
6865 /* Add required well known logical units to scsi mid layer */
6866 if (ufshcd_scsi_add_wlus(hba))
6869 /* Initialize devfreq after UFS device is detected */
6870 if (ufshcd_is_clkscaling_supported(hba)) {
6871 memcpy(&hba->clk_scaling.saved_pwr_info.info,
6873 sizeof(struct ufs_pa_layer_attr));
6874 hba->clk_scaling.saved_pwr_info.is_valid = true;
6875 if (!hba->devfreq) {
6876 ret = ufshcd_devfreq_init(hba);
6880 hba->clk_scaling.is_allowed = true;
6885 scsi_scan_host(hba->host);
6886 pm_runtime_put_sync(hba->dev);
6889 if (!hba->is_init_prefetch)
6890 hba->is_init_prefetch = true;
6894 * If we failed to initialize the device or the device is not
6895 * present, turn off the power/clocks etc.
6897 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6898 pm_runtime_put_sync(hba->dev);
6899 ufshcd_exit_clk_scaling(hba);
6900 ufshcd_hba_exit(hba);
6903 trace_ufshcd_init(dev_name(hba->dev), ret,
6904 ktime_to_us(ktime_sub(ktime_get(), start)),
6905 hba->curr_dev_pwr_mode, hba->uic_link_state);
6910 * ufshcd_async_scan - asynchronous execution for probing hba
6911 * @data: data pointer to pass to this function
6912 * @cookie: cookie data
6914 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6916 struct ufs_hba *hba = (struct ufs_hba *)data;
6918 ufshcd_probe_hba(hba);
6921 static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
6923 unsigned long flags;
6924 struct Scsi_Host *host;
6925 struct ufs_hba *hba;
6929 if (!scmd || !scmd->device || !scmd->device->host)
6932 host = scmd->device->host;
6933 hba = shost_priv(host);
6937 spin_lock_irqsave(host->host_lock, flags);
6939 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
6940 if (hba->lrb[index].cmd == scmd) {
6946 spin_unlock_irqrestore(host->host_lock, flags);
6949 * Bypass SCSI error handling and reset the block layer timer if this
6950 * SCSI command was not actually dispatched to UFS driver, otherwise
6951 * let SCSI layer handle the error as usual.
6953 return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
6956 static const struct attribute_group *ufshcd_driver_groups[] = {
6957 &ufs_sysfs_unit_descriptor_group,
6958 &ufs_sysfs_lun_attributes_group,
6962 static struct scsi_host_template ufshcd_driver_template = {
6963 .module = THIS_MODULE,
6965 .proc_name = UFSHCD,
6966 .queuecommand = ufshcd_queuecommand,
6967 .slave_alloc = ufshcd_slave_alloc,
6968 .slave_configure = ufshcd_slave_configure,
6969 .slave_destroy = ufshcd_slave_destroy,
6970 .change_queue_depth = ufshcd_change_queue_depth,
6971 .eh_abort_handler = ufshcd_abort,
6972 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
6973 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
6974 .eh_timed_out = ufshcd_eh_timed_out,
6976 .sg_tablesize = SG_ALL,
6977 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
6978 .can_queue = UFSHCD_CAN_QUEUE,
6979 .max_host_blocked = 1,
6980 .track_queue_depth = 1,
6981 .sdev_groups = ufshcd_driver_groups,
6982 .dma_boundary = PAGE_SIZE - 1,
6985 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
6993 ret = regulator_set_load(vreg->reg, ua);
6995 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
6996 __func__, vreg->name, ua, ret);
7002 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7003 struct ufs_vreg *vreg)
7005 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
7008 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7009 struct ufs_vreg *vreg)
7011 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
7014 static int ufshcd_config_vreg(struct device *dev,
7015 struct ufs_vreg *vreg, bool on)
7018 struct regulator *reg;
7020 int min_uV, uA_load;
7027 if (regulator_count_voltages(reg) > 0) {
7028 min_uV = on ? vreg->min_uV : 0;
7029 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7031 dev_err(dev, "%s: %s set voltage failed, err=%d\n",
7032 __func__, name, ret);
7036 uA_load = on ? vreg->max_uA : 0;
7037 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7045 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7049 if (!vreg || vreg->enabled)
7052 ret = ufshcd_config_vreg(dev, vreg, true);
7054 ret = regulator_enable(vreg->reg);
7057 vreg->enabled = true;
7059 dev_err(dev, "%s: %s enable failed, err=%d\n",
7060 __func__, vreg->name, ret);
7065 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7069 if (!vreg || !vreg->enabled)
7072 ret = regulator_disable(vreg->reg);
7075 /* ignore errors on applying disable config */
7076 ufshcd_config_vreg(dev, vreg, false);
7077 vreg->enabled = false;
7079 dev_err(dev, "%s: %s disable failed, err=%d\n",
7080 __func__, vreg->name, ret);
7086 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7089 struct device *dev = hba->dev;
7090 struct ufs_vreg_info *info = &hba->vreg_info;
7095 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7099 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7103 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7109 ufshcd_toggle_vreg(dev, info->vccq2, false);
7110 ufshcd_toggle_vreg(dev, info->vccq, false);
7111 ufshcd_toggle_vreg(dev, info->vcc, false);
7116 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7118 struct ufs_vreg_info *info = &hba->vreg_info;
7121 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
7126 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7133 vreg->reg = devm_regulator_get(dev, vreg->name);
7134 if (IS_ERR(vreg->reg)) {
7135 ret = PTR_ERR(vreg->reg);
7136 dev_err(dev, "%s: %s get failed, err=%d\n",
7137 __func__, vreg->name, ret);
7143 static int ufshcd_init_vreg(struct ufs_hba *hba)
7146 struct device *dev = hba->dev;
7147 struct ufs_vreg_info *info = &hba->vreg_info;
7152 ret = ufshcd_get_vreg(dev, info->vcc);
7156 ret = ufshcd_get_vreg(dev, info->vccq);
7160 ret = ufshcd_get_vreg(dev, info->vccq2);
7165 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7167 struct ufs_vreg_info *info = &hba->vreg_info;
7170 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7175 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7179 struct ufs_clk_info *clki;
7180 struct list_head *head = &hba->clk_list_head;
7181 unsigned long flags;
7182 ktime_t start = ktime_get();
7183 bool clk_state_changed = false;
7185 if (list_empty(head))
7189 * vendor specific setup_clocks ops may depend on clocks managed by
7190 * this standard driver hence call the vendor specific setup_clocks
7191 * before disabling the clocks managed here.
7194 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7199 list_for_each_entry(clki, head, list) {
7200 if (!IS_ERR_OR_NULL(clki->clk)) {
7201 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7204 clk_state_changed = on ^ clki->enabled;
7205 if (on && !clki->enabled) {
7206 ret = clk_prepare_enable(clki->clk);
7208 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7209 __func__, clki->name, ret);
7212 } else if (!on && clki->enabled) {
7213 clk_disable_unprepare(clki->clk);
7216 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7217 clki->name, on ? "en" : "dis");
7222 * vendor specific setup_clocks ops may depend on clocks managed by
7223 * this standard driver hence call the vendor specific setup_clocks
7224 * after enabling the clocks managed here.
7227 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7234 list_for_each_entry(clki, head, list) {
7235 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7236 clk_disable_unprepare(clki->clk);
7238 } else if (!ret && on) {
7239 spin_lock_irqsave(hba->host->host_lock, flags);
7240 hba->clk_gating.state = CLKS_ON;
7241 trace_ufshcd_clk_gating(dev_name(hba->dev),
7242 hba->clk_gating.state);
7243 spin_unlock_irqrestore(hba->host->host_lock, flags);
7246 if (clk_state_changed)
7247 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7248 (on ? "on" : "off"),
7249 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
7253 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7255 return __ufshcd_setup_clocks(hba, on, false);
7258 static int ufshcd_init_clocks(struct ufs_hba *hba)
7261 struct ufs_clk_info *clki;
7262 struct device *dev = hba->dev;
7263 struct list_head *head = &hba->clk_list_head;
7265 if (list_empty(head))
7268 list_for_each_entry(clki, head, list) {
7272 clki->clk = devm_clk_get(dev, clki->name);
7273 if (IS_ERR(clki->clk)) {
7274 ret = PTR_ERR(clki->clk);
7275 dev_err(dev, "%s: %s clk get failed, %d\n",
7276 __func__, clki->name, ret);
7281 * Parse device ref clk freq as per device tree "ref_clk".
7282 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7283 * in ufshcd_alloc_host().
7285 if (!strcmp(clki->name, "ref_clk"))
7286 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7288 if (clki->max_freq) {
7289 ret = clk_set_rate(clki->clk, clki->max_freq);
7291 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7292 __func__, clki->name,
7293 clki->max_freq, ret);
7296 clki->curr_freq = clki->max_freq;
7298 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7299 clki->name, clk_get_rate(clki->clk));
7305 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7312 err = ufshcd_vops_init(hba);
7316 err = ufshcd_vops_setup_regulators(hba, true);
7323 ufshcd_vops_exit(hba);
7326 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
7327 __func__, ufshcd_get_var_name(hba), err);
7331 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7336 ufshcd_vops_setup_regulators(hba, false);
7338 ufshcd_vops_exit(hba);
7341 static int ufshcd_hba_init(struct ufs_hba *hba)
7346 * Handle host controller power separately from the UFS device power
7347 * rails as it will help controlling the UFS host controller power
7348 * collapse easily which is different than UFS device power collapse.
7349 * Also, enable the host controller power before we go ahead with rest
7350 * of the initialization here.
7352 err = ufshcd_init_hba_vreg(hba);
7356 err = ufshcd_setup_hba_vreg(hba, true);
7360 err = ufshcd_init_clocks(hba);
7362 goto out_disable_hba_vreg;
7364 err = ufshcd_setup_clocks(hba, true);
7366 goto out_disable_hba_vreg;
7368 err = ufshcd_init_vreg(hba);
7370 goto out_disable_clks;
7372 err = ufshcd_setup_vreg(hba, true);
7374 goto out_disable_clks;
7376 err = ufshcd_variant_hba_init(hba);
7378 goto out_disable_vreg;
7380 hba->is_powered = true;
7384 ufshcd_setup_vreg(hba, false);
7386 ufshcd_setup_clocks(hba, false);
7387 out_disable_hba_vreg:
7388 ufshcd_setup_hba_vreg(hba, false);
7393 static void ufshcd_hba_exit(struct ufs_hba *hba)
7395 if (hba->is_powered) {
7396 ufshcd_variant_hba_exit(hba);
7397 ufshcd_setup_vreg(hba, false);
7398 ufshcd_suspend_clkscaling(hba);
7399 if (ufshcd_is_clkscaling_supported(hba))
7401 ufshcd_suspend_clkscaling(hba);
7402 ufshcd_setup_clocks(hba, false);
7403 ufshcd_setup_hba_vreg(hba, false);
7404 hba->is_powered = false;
7409 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
7411 unsigned char cmd[6] = {REQUEST_SENSE,
7420 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
7426 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7427 UFS_SENSE_SIZE, NULL, NULL,
7428 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
7430 pr_err("%s: failed with err %d\n", __func__, ret);
7438 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7440 * @hba: per adapter instance
7441 * @pwr_mode: device power mode to set
7443 * Returns 0 if requested power mode is set successfully
7444 * Returns non-zero if failed to set the requested power mode
7446 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7447 enum ufs_dev_pwr_mode pwr_mode)
7449 unsigned char cmd[6] = { START_STOP };
7450 struct scsi_sense_hdr sshdr;
7451 struct scsi_device *sdp;
7452 unsigned long flags;
7455 spin_lock_irqsave(hba->host->host_lock, flags);
7456 sdp = hba->sdev_ufs_device;
7458 ret = scsi_device_get(sdp);
7459 if (!ret && !scsi_device_online(sdp)) {
7461 scsi_device_put(sdp);
7466 spin_unlock_irqrestore(hba->host->host_lock, flags);
7472 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7473 * handling, which would wait for host to be resumed. Since we know
7474 * we are functional while we are here, skip host resume in error
7477 hba->host->eh_noresume = 1;
7478 if (hba->wlun_dev_clr_ua) {
7479 ret = ufshcd_send_request_sense(hba, sdp);
7482 /* Unit attention condition is cleared now */
7483 hba->wlun_dev_clr_ua = false;
7486 cmd[4] = pwr_mode << 4;
7489 * Current function would be generally called from the power management
7490 * callbacks hence set the RQF_PM flag so that it doesn't resume the
7491 * already suspended childs.
7493 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7494 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
7496 sdev_printk(KERN_WARNING, sdp,
7497 "START_STOP failed for power mode: %d, result %x\n",
7499 if (driver_byte(ret) == DRIVER_SENSE)
7500 scsi_print_sense_hdr(sdp, NULL, &sshdr);
7504 hba->curr_dev_pwr_mode = pwr_mode;
7506 scsi_device_put(sdp);
7507 hba->host->eh_noresume = 0;
7511 static int ufshcd_link_state_transition(struct ufs_hba *hba,
7512 enum uic_link_state req_link_state,
7513 int check_for_bkops)
7517 if (req_link_state == hba->uic_link_state)
7520 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7521 ret = ufshcd_uic_hibern8_enter(hba);
7523 ufshcd_set_link_hibern8(hba);
7528 * If autobkops is enabled, link can't be turned off because
7529 * turning off the link would also turn off the device.
7531 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7532 (!check_for_bkops || (check_for_bkops &&
7533 !hba->auto_bkops_enabled))) {
7535 * Let's make sure that link is in low power mode, we are doing
7536 * this currently by putting the link in Hibern8. Otherway to
7537 * put the link in low power mode is to send the DME end point
7538 * to device and then send the DME reset command to local
7539 * unipro. But putting the link in hibern8 is much faster.
7541 ret = ufshcd_uic_hibern8_enter(hba);
7545 * Change controller state to "reset state" which
7546 * should also put the link in off/reset state
7548 ufshcd_hba_stop(hba, true);
7550 * TODO: Check if we need any delay to make sure that
7551 * controller is reset
7553 ufshcd_set_link_off(hba);
7560 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7563 * It seems some UFS devices may keep drawing more than sleep current
7564 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7565 * To avoid this situation, add 2ms delay before putting these UFS
7566 * rails in LPM mode.
7568 if (!ufshcd_is_link_active(hba) &&
7569 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7570 usleep_range(2000, 2100);
7573 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7576 * If UFS device and link is in OFF state, all power supplies (VCC,
7577 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7578 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7579 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7581 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7582 * in low power state which would save some power.
7584 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7585 !hba->dev_info.is_lu_power_on_wp) {
7586 ufshcd_setup_vreg(hba, false);
7587 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7588 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7589 if (!ufshcd_is_link_active(hba)) {
7590 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7591 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7596 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7600 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7601 !hba->dev_info.is_lu_power_on_wp) {
7602 ret = ufshcd_setup_vreg(hba, true);
7603 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7604 if (!ret && !ufshcd_is_link_active(hba)) {
7605 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7608 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7612 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
7617 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7619 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7624 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7626 if (ufshcd_is_link_off(hba))
7627 ufshcd_setup_hba_vreg(hba, false);
7630 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7632 if (ufshcd_is_link_off(hba))
7633 ufshcd_setup_hba_vreg(hba, true);
7637 * ufshcd_suspend - helper function for suspend operations
7638 * @hba: per adapter instance
7639 * @pm_op: desired low power operation type
7641 * This function will try to put the UFS device and link into low power
7642 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7643 * (System PM level).
7645 * If this function is called during shutdown, it will make sure that
7646 * both UFS device and UFS link is powered off.
7648 * NOTE: UFS device & link must be active before we enter in this function.
7650 * Returns 0 for success and non-zero for failure
7652 static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7655 enum ufs_pm_level pm_lvl;
7656 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7657 enum uic_link_state req_link_state;
7659 hba->pm_op_in_progress = 1;
7660 if (!ufshcd_is_shutdown_pm(pm_op)) {
7661 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7662 hba->rpm_lvl : hba->spm_lvl;
7663 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7664 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7666 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7667 req_link_state = UIC_LINK_OFF_STATE;
7671 * If we can't transition into any of the low power modes
7672 * just gate the clocks.
7674 ufshcd_hold(hba, false);
7675 hba->clk_gating.is_suspended = true;
7677 if (hba->clk_scaling.is_allowed) {
7678 cancel_work_sync(&hba->clk_scaling.suspend_work);
7679 cancel_work_sync(&hba->clk_scaling.resume_work);
7680 ufshcd_suspend_clkscaling(hba);
7683 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7684 req_link_state == UIC_LINK_ACTIVE_STATE) {
7688 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7689 (req_link_state == hba->uic_link_state))
7692 /* UFS device & link must be active before we enter in this function */
7693 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7698 if (ufshcd_is_runtime_pm(pm_op)) {
7699 if (ufshcd_can_autobkops_during_suspend(hba)) {
7701 * The device is idle with no requests in the queue,
7702 * allow background operations if bkops status shows
7703 * that performance might be impacted.
7705 ret = ufshcd_urgent_bkops(hba);
7709 /* make sure that auto bkops is disabled */
7710 ufshcd_disable_auto_bkops(hba);
7714 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7715 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7716 !ufshcd_is_runtime_pm(pm_op))) {
7717 /* ensure that bkops is disabled */
7718 ufshcd_disable_auto_bkops(hba);
7719 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7724 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7726 goto set_dev_active;
7728 ufshcd_vreg_set_lpm(hba);
7732 * Call vendor specific suspend callback. As these callbacks may access
7733 * vendor specific host controller register space call them before the
7734 * host clocks are ON.
7736 ret = ufshcd_vops_suspend(hba, pm_op);
7738 goto set_link_active;
7740 if (!ufshcd_is_link_active(hba))
7741 ufshcd_setup_clocks(hba, false);
7743 /* If link is active, device ref_clk can't be switched off */
7744 __ufshcd_setup_clocks(hba, false, true);
7746 hba->clk_gating.state = CLKS_OFF;
7747 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
7749 * Disable the host irq as host controller as there won't be any
7750 * host controller transaction expected till resume.
7752 ufshcd_disable_irq(hba);
7753 /* Put the host controller in low power mode if possible */
7754 ufshcd_hba_vreg_set_lpm(hba);
7758 if (hba->clk_scaling.is_allowed)
7759 ufshcd_resume_clkscaling(hba);
7760 ufshcd_vreg_set_hpm(hba);
7761 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7762 ufshcd_set_link_active(hba);
7763 else if (ufshcd_is_link_off(hba))
7764 ufshcd_host_reset_and_restore(hba);
7766 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7767 ufshcd_disable_auto_bkops(hba);
7769 if (hba->clk_scaling.is_allowed)
7770 ufshcd_resume_clkscaling(hba);
7771 hba->clk_gating.is_suspended = false;
7772 ufshcd_release(hba);
7774 hba->pm_op_in_progress = 0;
7779 * ufshcd_resume - helper function for resume operations
7780 * @hba: per adapter instance
7781 * @pm_op: runtime PM or system PM
7783 * This function basically brings the UFS device, UniPro link and controller
7786 * Returns 0 for success and non-zero for failure
7788 static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7791 enum uic_link_state old_link_state;
7793 hba->pm_op_in_progress = 1;
7794 old_link_state = hba->uic_link_state;
7796 ufshcd_hba_vreg_set_hpm(hba);
7797 /* Make sure clocks are enabled before accessing controller */
7798 ret = ufshcd_setup_clocks(hba, true);
7802 /* enable the host irq as host controller would be active soon */
7803 ret = ufshcd_enable_irq(hba);
7805 goto disable_irq_and_vops_clks;
7807 ret = ufshcd_vreg_set_hpm(hba);
7809 goto disable_irq_and_vops_clks;
7812 * Call vendor specific resume callback. As these callbacks may access
7813 * vendor specific host controller register space call them when the
7814 * host clocks are ON.
7816 ret = ufshcd_vops_resume(hba, pm_op);
7820 if (ufshcd_is_link_hibern8(hba)) {
7821 ret = ufshcd_uic_hibern8_exit(hba);
7823 ufshcd_set_link_active(hba);
7825 goto vendor_suspend;
7826 } else if (ufshcd_is_link_off(hba)) {
7827 ret = ufshcd_host_reset_and_restore(hba);
7829 * ufshcd_host_reset_and_restore() should have already
7830 * set the link state as active
7832 if (ret || !ufshcd_is_link_active(hba))
7833 goto vendor_suspend;
7836 if (!ufshcd_is_ufs_dev_active(hba)) {
7837 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7839 goto set_old_link_state;
7842 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7843 ufshcd_enable_auto_bkops(hba);
7846 * If BKOPs operations are urgently needed at this moment then
7847 * keep auto-bkops enabled or else disable it.
7849 ufshcd_urgent_bkops(hba);
7851 hba->clk_gating.is_suspended = false;
7853 if (hba->clk_scaling.is_allowed)
7854 ufshcd_resume_clkscaling(hba);
7856 /* Schedule clock gating in case of no access to UFS device yet */
7857 ufshcd_release(hba);
7859 /* Enable Auto-Hibernate if configured */
7860 ufshcd_auto_hibern8_enable(hba);
7865 ufshcd_link_state_transition(hba, old_link_state, 0);
7867 ufshcd_vops_suspend(hba, pm_op);
7869 ufshcd_vreg_set_lpm(hba);
7870 disable_irq_and_vops_clks:
7871 ufshcd_disable_irq(hba);
7872 if (hba->clk_scaling.is_allowed)
7873 ufshcd_suspend_clkscaling(hba);
7874 ufshcd_setup_clocks(hba, false);
7876 hba->pm_op_in_progress = 0;
7881 * ufshcd_system_suspend - system suspend routine
7882 * @hba: per adapter instance
7884 * Check the description of ufshcd_suspend() function for more details.
7886 * Returns 0 for success and non-zero for failure
7888 int ufshcd_system_suspend(struct ufs_hba *hba)
7891 ktime_t start = ktime_get();
7893 if (!hba || !hba->is_powered)
7896 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
7897 hba->curr_dev_pwr_mode) &&
7898 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7899 hba->uic_link_state))
7902 if (pm_runtime_suspended(hba->dev)) {
7904 * UFS device and/or UFS link low power states during runtime
7905 * suspend seems to be different than what is expected during
7906 * system suspend. Hence runtime resume the devic & link and
7907 * let the system suspend low power states to take effect.
7908 * TODO: If resume takes longer time, we might have optimize
7909 * it in future by not resuming everything if possible.
7911 ret = ufshcd_runtime_resume(hba);
7916 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
7918 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
7919 ktime_to_us(ktime_sub(ktime_get(), start)),
7920 hba->curr_dev_pwr_mode, hba->uic_link_state);
7922 hba->is_sys_suspended = true;
7925 EXPORT_SYMBOL(ufshcd_system_suspend);
7928 * ufshcd_system_resume - system resume routine
7929 * @hba: per adapter instance
7931 * Returns 0 for success and non-zero for failure
7934 int ufshcd_system_resume(struct ufs_hba *hba)
7937 ktime_t start = ktime_get();
7942 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
7944 * Let the runtime resume take care of resuming
7945 * if runtime suspended.
7949 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
7951 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
7952 ktime_to_us(ktime_sub(ktime_get(), start)),
7953 hba->curr_dev_pwr_mode, hba->uic_link_state);
7956 EXPORT_SYMBOL(ufshcd_system_resume);
7959 * ufshcd_runtime_suspend - runtime suspend routine
7960 * @hba: per adapter instance
7962 * Check the description of ufshcd_suspend() function for more details.
7964 * Returns 0 for success and non-zero for failure
7966 int ufshcd_runtime_suspend(struct ufs_hba *hba)
7969 ktime_t start = ktime_get();
7974 if (!hba->is_powered)
7977 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
7979 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
7980 ktime_to_us(ktime_sub(ktime_get(), start)),
7981 hba->curr_dev_pwr_mode, hba->uic_link_state);
7984 EXPORT_SYMBOL(ufshcd_runtime_suspend);
7987 * ufshcd_runtime_resume - runtime resume routine
7988 * @hba: per adapter instance
7990 * This function basically brings the UFS device, UniPro link and controller
7991 * to active state. Following operations are done in this function:
7993 * 1. Turn on all the controller related clocks
7994 * 2. Bring the UniPro link out of Hibernate state
7995 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
7997 * 4. If auto-bkops is enabled on the device, disable it.
7999 * So following would be the possible power state after this function return
8001 * S1: UFS device in Active state with VCC rail ON
8002 * UniPro link in Active state
8003 * All the UFS/UniPro controller clocks are ON
8005 * Returns 0 for success and non-zero for failure
8007 int ufshcd_runtime_resume(struct ufs_hba *hba)
8010 ktime_t start = ktime_get();
8015 if (!hba->is_powered)
8018 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8020 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8021 ktime_to_us(ktime_sub(ktime_get(), start)),
8022 hba->curr_dev_pwr_mode, hba->uic_link_state);
8025 EXPORT_SYMBOL(ufshcd_runtime_resume);
8027 int ufshcd_runtime_idle(struct ufs_hba *hba)
8031 EXPORT_SYMBOL(ufshcd_runtime_idle);
8034 * ufshcd_shutdown - shutdown routine
8035 * @hba: per adapter instance
8037 * This function would power off both UFS device and UFS link.
8039 * Returns 0 always to allow force shutdown even in case of errors.
8041 int ufshcd_shutdown(struct ufs_hba *hba)
8045 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8048 if (pm_runtime_suspended(hba->dev)) {
8049 ret = ufshcd_runtime_resume(hba);
8054 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8057 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8058 /* allow force shutdown even in case of errors */
8061 EXPORT_SYMBOL(ufshcd_shutdown);
8064 * ufshcd_remove - de-allocate SCSI host and host memory space
8065 * data structure memory
8066 * @hba: per adapter instance
8068 void ufshcd_remove(struct ufs_hba *hba)
8070 ufs_bsg_remove(hba);
8071 ufs_sysfs_remove_nodes(hba->dev);
8072 scsi_remove_host(hba->host);
8073 /* disable interrupts */
8074 ufshcd_disable_intr(hba, hba->intr_mask);
8075 ufshcd_hba_stop(hba, true);
8077 ufshcd_exit_clk_scaling(hba);
8078 ufshcd_exit_clk_gating(hba);
8079 if (ufshcd_is_clkscaling_supported(hba))
8080 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
8081 ufshcd_hba_exit(hba);
8083 EXPORT_SYMBOL_GPL(ufshcd_remove);
8086 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8087 * @hba: pointer to Host Bus Adapter (HBA)
8089 void ufshcd_dealloc_host(struct ufs_hba *hba)
8091 scsi_host_put(hba->host);
8093 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8096 * ufshcd_set_dma_mask - Set dma mask based on the controller
8097 * addressing capability
8098 * @hba: per adapter instance
8100 * Returns 0 for success, non-zero for failure
8102 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8104 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8105 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8108 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8112 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
8113 * @dev: pointer to device handle
8114 * @hba_handle: driver private handle
8115 * Returns 0 on success, non-zero value on failure
8117 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
8119 struct Scsi_Host *host;
8120 struct ufs_hba *hba;
8125 "Invalid memory reference for dev is NULL\n");
8130 host = scsi_host_alloc(&ufshcd_driver_template,
8131 sizeof(struct ufs_hba));
8133 dev_err(dev, "scsi_host_alloc failed\n");
8137 hba = shost_priv(host);
8141 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
8143 INIT_LIST_HEAD(&hba->clk_list_head);
8148 EXPORT_SYMBOL(ufshcd_alloc_host);
8151 * ufshcd_init - Driver initialization routine
8152 * @hba: per-adapter instance
8153 * @mmio_base: base register address
8154 * @irq: Interrupt line of device
8155 * Returns 0 on success, non-zero value on failure
8157 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8160 struct Scsi_Host *host = hba->host;
8161 struct device *dev = hba->dev;
8165 "Invalid memory reference for mmio_base is NULL\n");
8170 hba->mmio_base = mmio_base;
8173 /* Set descriptor lengths to specification defaults */
8174 ufshcd_def_desc_sizes(hba);
8176 err = ufshcd_hba_init(hba);
8180 /* Read capabilities registers */
8181 ufshcd_hba_capabilities(hba);
8183 /* Get UFS version supported by the controller */
8184 hba->ufs_version = ufshcd_get_ufs_version(hba);
8186 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8187 (hba->ufs_version != UFSHCI_VERSION_11) &&
8188 (hba->ufs_version != UFSHCI_VERSION_20) &&
8189 (hba->ufs_version != UFSHCI_VERSION_21))
8190 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8193 /* Get Interrupt bit mask per version */
8194 hba->intr_mask = ufshcd_get_intr_mask(hba);
8196 err = ufshcd_set_dma_mask(hba);
8198 dev_err(hba->dev, "set dma mask failed\n");
8202 /* Allocate memory for host memory space */
8203 err = ufshcd_memory_alloc(hba);
8205 dev_err(hba->dev, "Memory allocation failed\n");
8210 ufshcd_host_memory_configure(hba);
8212 host->can_queue = hba->nutrs;
8213 host->cmd_per_lun = hba->nutrs;
8214 host->max_id = UFSHCD_MAX_ID;
8215 host->max_lun = UFS_MAX_LUNS;
8216 host->max_channel = UFSHCD_MAX_CHANNEL;
8217 host->unique_id = host->host_no;
8218 host->max_cmd_len = UFS_CDB_SIZE;
8220 hba->max_pwr_info.is_valid = false;
8222 /* Initailize wait queue for task management */
8223 init_waitqueue_head(&hba->tm_wq);
8224 init_waitqueue_head(&hba->tm_tag_wq);
8226 /* Initialize work queues */
8227 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
8228 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
8230 /* Initialize UIC command mutex */
8231 mutex_init(&hba->uic_cmd_mutex);
8233 /* Initialize mutex for device management commands */
8234 mutex_init(&hba->dev_cmd.lock);
8236 init_rwsem(&hba->clk_scaling_lock);
8238 /* Initialize device management tag acquire wait queue */
8239 init_waitqueue_head(&hba->dev_cmd.tag_wq);
8241 ufshcd_init_clk_gating(hba);
8243 ufshcd_init_clk_scaling(hba);
8246 * In order to avoid any spurious interrupt immediately after
8247 * registering UFS controller interrupt handler, clear any pending UFS
8248 * interrupt status and disable all the UFS interrupts.
8250 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8251 REG_INTERRUPT_STATUS);
8252 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8254 * Make sure that UFS interrupts are disabled and any pending interrupt
8255 * status is cleared before registering UFS interrupt handler.
8259 /* IRQ registration */
8260 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
8262 dev_err(hba->dev, "request irq failed\n");
8265 hba->is_irq_enabled = true;
8268 err = scsi_add_host(host, hba->dev);
8270 dev_err(hba->dev, "scsi_add_host failed\n");
8274 /* Host controller enable */
8275 err = ufshcd_hba_enable(hba);
8277 dev_err(hba->dev, "Host controller enable failed\n");
8278 ufshcd_print_host_regs(hba);
8279 ufshcd_print_host_state(hba);
8280 goto out_remove_scsi_host;
8284 * Set the default power management level for runtime and system PM.
8285 * Default power saving mode is to keep UFS link in Hibern8 state
8286 * and UFS device in sleep state.
8288 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8290 UIC_LINK_HIBERN8_STATE);
8291 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8293 UIC_LINK_HIBERN8_STATE);
8295 /* Set the default auto-hiberate idle timer value to 150 ms */
8296 if (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) {
8297 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8298 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8301 /* Hold auto suspend until async scan completes */
8302 pm_runtime_get_sync(dev);
8303 atomic_set(&hba->scsi_block_reqs_cnt, 0);
8305 * We are assuming that device wasn't put in sleep/power-down
8306 * state exclusively during the boot stage before kernel.
8307 * This assumption helps avoid doing link startup twice during
8308 * ufshcd_probe_hba().
8310 ufshcd_set_ufs_dev_active(hba);
8312 async_schedule(ufshcd_async_scan, hba);
8313 ufs_sysfs_add_nodes(hba->dev);
8317 out_remove_scsi_host:
8318 scsi_remove_host(hba->host);
8320 ufshcd_exit_clk_scaling(hba);
8321 ufshcd_exit_clk_gating(hba);
8323 hba->is_irq_enabled = false;
8324 ufshcd_hba_exit(hba);
8328 EXPORT_SYMBOL_GPL(ufshcd_init);
8330 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8331 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
8332 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
8333 MODULE_LICENSE("GPL");
8334 MODULE_VERSION(UFSHCD_DRIVER_VERSION);