drivers/scsi/ufs/ufshcd.c

   1 /*
   2  * Universal Flash Storage Host controller driver Core
   3  *
   4  * This code is based on drivers/scsi/ufs/ufshcd.c
   5  * Copyright (C) 2011-2013 Samsung India Software Operations
   6  * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
   7  *
   8  * Authors:
   9  *      Santosh Yaraganavi <santosh.sy@samsung.com>
  10  *      Vinayak Holikatti <h.vinayak@samsung.com>
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  * See the COPYING file in the top-level directory or visit
  17  * <http://www.gnu.org/licenses/gpl-2.0.html>
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * This program is provided "AS IS" and "WITH ALL FAULTS" and
  25  * without warranty of any kind. You are solely responsible for
  26  * determining the appropriateness of using and distributing
  27  * the program and assume all risks associated with your exercise
  28  * of rights with respect to the program, including but not limited
  29  * to infringement of third party rights, the risks and costs of
  30  * program errors, damage to or loss of data, programs or equipment,
  31  * and unavailability or interruption of operations. Under no
  32  * circumstances will the contributor of this Program be liable for
  33  * any damages of any kind arising from your use or distribution of
  34  * this program.
  35  *
  36  * The Linux Foundation chooses to take subject only to the GPLv2
  37  * license terms, and distributes only under these terms.
  38  */
  39
  40 #include <linux/async.h>
  41 #include <linux/devfreq.h>
  42 #include <linux/nls.h>
  43 #include <linux/of.h>
  44 #include <linux/bitfield.h>
  45 #include "ufshcd.h"
  46 #include "ufs_quirks.h"
  47 #include "unipro.h"
  48 #include "ufs-sysfs.h"
  49 #include "ufs_bsg.h"
  50
  51 #define CREATE_TRACE_POINTS
  52 #include <trace/events/ufs.h>
  53
  54 #define UFSHCD_ENABLE_INTRS     (UTP_TRANSFER_REQ_COMPL |\
  55                                  UTP_TASK_REQ_COMPL |\
  56                                  UFSHCD_ERROR_MASK)
  57 /* UIC command timeout, unit: ms */
  58 #define UIC_CMD_TIMEOUT 500
  59
  60 /* NOP OUT retries waiting for NOP IN response */
  61 #define NOP_OUT_RETRIES    10
  62 /* Timeout after 30 msecs if NOP OUT hangs without response */
  63 #define NOP_OUT_TIMEOUT    30 /* msecs */
  64
  65 /* Query request retries */
  66 #define QUERY_REQ_RETRIES 3
  67 /* Query request timeout */
  68 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
  69
  70 /* Task management command timeout */
  71 #define TM_CMD_TIMEOUT  100 /* msecs */
  72
  73 /* maximum number of retries for a general UIC command  */
  74 #define UFS_UIC_COMMAND_RETRIES 3
  75
  76 /* maximum number of link-startup retries */
  77 #define DME_LINKSTARTUP_RETRIES 3
  78
  79 /* Maximum retries for Hibern8 enter */
  80 #define UIC_HIBERN8_ENTER_RETRIES 3
  81
  82 /* maximum number of reset retries before giving up */
  83 #define MAX_HOST_RESET_RETRIES 5
  84
  85 /* Expose the flag value from utp_upiu_query.value */
  86 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
  87
  88 /* Interrupt aggregation default timeout, unit: 40us */
  89 #define INT_AGGR_DEF_TO 0x02
  90
  91 #define ufshcd_toggle_vreg(_dev, _vreg, _on)                            \
  92         ({                                                              \
  93                 int _ret;                                               \
  94                 if (_on)                                                \
  95                         _ret = ufshcd_enable_vreg(_dev, _vreg);         \
  96                 else                                                    \
  97                         _ret = ufshcd_disable_vreg(_dev, _vreg);        \
  98                 _ret;                                                   \
  99         })
 100
 101 #define ufshcd_hex_dump(prefix_str, buf, len) do {                       \
 102         size_t __len = (len);                                            \
 103         print_hex_dump(KERN_ERR, prefix_str,                             \
 104                        __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
 105                        16, 4, buf, __len, false);                        \
 106 } while (0)
 107
 108 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
 109                      const char *prefix)
 110 {
 111         u32 *regs;
 112         size_t pos;
 113
 114         if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
 115                 return -EINVAL;
 116
 117         regs = kzalloc(len, GFP_KERNEL);
 118         if (!regs)
 119                 return -ENOMEM;
 120
 121         for (pos = 0; pos < len; pos += 4)
 122                 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
 123
 124         ufshcd_hex_dump(prefix, regs, len);
 125         kfree(regs);
 126
 127         return 0;
 128 }
 129 EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
 130
 131 enum {
 132         UFSHCD_MAX_CHANNEL      = 0,
 133         UFSHCD_MAX_ID           = 1,
 134         UFSHCD_CMD_PER_LUN      = 32,
 135         UFSHCD_CAN_QUEUE        = 32,
 136 };
 137
 138 /* UFSHCD states */
 139 enum {
 140         UFSHCD_STATE_RESET,
 141         UFSHCD_STATE_ERROR,
 142         UFSHCD_STATE_OPERATIONAL,
 143         UFSHCD_STATE_EH_SCHEDULED,
 144 };
 145
 146 /* UFSHCD error handling flags */
 147 enum {
 148         UFSHCD_EH_IN_PROGRESS = (1 << 0),
 149 };
 150
 151 /* UFSHCD UIC layer error flags */
 152 enum {
 153         UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
 154         UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
 155         UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
 156         UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
 157         UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
 158         UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
 159 };
 160
 161 #define ufshcd_set_eh_in_progress(h) \
 162         ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
 163 #define ufshcd_eh_in_progress(h) \
 164         ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
 165 #define ufshcd_clear_eh_in_progress(h) \
 166         ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
 167
 168 #define ufshcd_set_ufs_dev_active(h) \
 169         ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
 170 #define ufshcd_set_ufs_dev_sleep(h) \
 171         ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
 172 #define ufshcd_set_ufs_dev_poweroff(h) \
 173         ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
 174 #define ufshcd_is_ufs_dev_active(h) \
 175         ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
 176 #define ufshcd_is_ufs_dev_sleep(h) \
 177         ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
 178 #define ufshcd_is_ufs_dev_poweroff(h) \
 179         ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
 180
 181 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
 182         {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 183         {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 184         {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 185         {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 186         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 187         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
 188 };
 189
 190 static inline enum ufs_dev_pwr_mode
 191 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
 192 {
 193         return ufs_pm_lvl_states[lvl].dev_state;
 194 }
 195
 196 static inline enum uic_link_state
 197 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
 198 {
 199         return ufs_pm_lvl_states[lvl].link_state;
 200 }
 201
 202 static inline enum ufs_pm_level
 203 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
 204                                         enum uic_link_state link_state)
 205 {
 206         enum ufs_pm_level lvl;
 207
 208         for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
 209                 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
 210                         (ufs_pm_lvl_states[lvl].link_state == link_state))
 211                         return lvl;
 212         }
 213
 214         /* if no match found, return the level 0 */
 215         return UFS_PM_LVL_0;
 216 }
 217
 218 static struct ufs_dev_fix ufs_fixups[] = {
 219         /* UFS cards deviations table */
 220         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 221                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 222         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 223                 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
 224         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 225                 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
 226         UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
 227                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 228         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
 229                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 230         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
 231                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 232         UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
 233                 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
 234         UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
 235                 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
 236
 237         END_FIX
 238 };
 239
 240 static void ufshcd_tmc_handler(struct ufs_hba *hba);
 241 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
 242 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
 243 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
 244 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
 245 static void ufshcd_hba_exit(struct ufs_hba *hba);
 246 static int ufshcd_probe_hba(struct ufs_hba *hba);
 247 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
 248                                  bool skip_ref_clk);
 249 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
 250 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
 251 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
 252 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
 253 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
 254 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
 255 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 256 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 257 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
 258 static irqreturn_t ufshcd_intr(int irq, void *__hba);
 259 static int ufshcd_change_power_mode(struct ufs_hba *hba,
 260                              struct ufs_pa_layer_attr *pwr_mode);
 261 static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
 262 {
 263         return tag >= 0 && tag < hba->nutrs;
 264 }
 265
 266 static inline int ufshcd_enable_irq(struct ufs_hba *hba)
 267 {
 268         int ret = 0;
 269
 270         if (!hba->is_irq_enabled) {
 271                 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
 272                                 hba);
 273                 if (ret)
 274                         dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
 275                                 __func__, ret);
 276                 hba->is_irq_enabled = true;
 277         }
 278
 279         return ret;
 280 }
 281
 282 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
 283 {
 284         if (hba->is_irq_enabled) {
 285                 free_irq(hba->irq, hba);
 286                 hba->is_irq_enabled = false;
 287         }
 288 }
 289
 290 static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
 291 {
 292         if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
 293                 scsi_unblock_requests(hba->host);
 294 }
 295
 296 static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
 297 {
 298         if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
 299                 scsi_block_requests(hba->host);
 300 }
 301
 302 /* replace non-printable or non-ASCII characters with spaces */
 303 static inline void ufshcd_remove_non_printable(char *val)
 304 {
 305         if (!val)
 306                 return;
 307
 308         if (*val < 0x20 || *val > 0x7e)
 309                 *val = ' ';
 310 }
 311
 312 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 313                 const char *str)
 314 {
 315         struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
 316
 317         trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
 318 }
 319
 320 static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 321                 const char *str)
 322 {
 323         struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
 324
 325         trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
 326 }
 327
 328 static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 329                 const char *str)
 330 {
 331         int off = (int)tag - hba->nutrs;
 332         struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
 333
 334         trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
 335                         &descp->input_param1);
 336 }
 337
 338 static void ufshcd_add_command_trace(struct ufs_hba *hba,
 339                 unsigned int tag, const char *str)
 340 {
 341         sector_t lba = -1;
 342         u8 opcode = 0;
 343         u32 intr, doorbell;
 344         struct ufshcd_lrb *lrbp = &hba->lrb[tag];
 345         int transfer_len = -1;
 346
 347         if (!trace_ufshcd_command_enabled()) {
 348                 /* trace UPIU W/O tracing command */
 349                 if (lrbp->cmd)
 350                         ufshcd_add_cmd_upiu_trace(hba, tag, str);
 351                 return;
 352         }
 353
 354         if (lrbp->cmd) { /* data phase exists */
 355                 /* trace UPIU also */
 356                 ufshcd_add_cmd_upiu_trace(hba, tag, str);
 357                 opcode = (u8)(*lrbp->cmd->cmnd);
 358                 if ((opcode == READ_10) || (opcode == WRITE_10)) {
 359                         /*
 360                          * Currently we only fully trace read(10) and write(10)
 361                          * commands
 362                          */
 363                         if (lrbp->cmd->request && lrbp->cmd->request->bio)
 364                                 lba =
 365                                   lrbp->cmd->request->bio->bi_iter.bi_sector;
 366                         transfer_len = be32_to_cpu(
 367                                 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
 368                 }
 369         }
 370
 371         intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
 372         doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
 373         trace_ufshcd_command(dev_name(hba->dev), str, tag,
 374                                 doorbell, transfer_len, intr, lba, opcode);
 375 }
 376
 377 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
 378 {
 379         struct ufs_clk_info *clki;
 380         struct list_head *head = &hba->clk_list_head;
 381
 382         if (list_empty(head))
 383                 return;
 384
 385         list_for_each_entry(clki, head, list) {
 386                 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
 387                                 clki->max_freq)
 388                         dev_err(hba->dev, "clk: %s, rate: %u\n",
 389                                         clki->name, clki->curr_freq);
 390         }
 391 }
 392
 393 static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
 394                 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
 395 {
 396         int i;
 397         bool found = false;
 398
 399         for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
 400                 int p = (i + err_hist->pos) % UIC_ERR_REG_HIST_LENGTH;
 401
 402                 if (err_hist->reg[p] == 0)
 403                         continue;
 404                 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, i,
 405                         err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
 406                 found = true;
 407         }
 408
 409         if (!found)
 410                 dev_err(hba->dev, "No record of %s uic errors\n", err_name);
 411 }
 412
 413 static void ufshcd_print_host_regs(struct ufs_hba *hba)
 414 {
 415         ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
 416         dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
 417                 hba->ufs_version, hba->capabilities);
 418         dev_err(hba->dev,
 419                 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
 420                 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
 421         dev_err(hba->dev,
 422                 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
 423                 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
 424                 hba->ufs_stats.hibern8_exit_cnt);
 425
 426         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
 427         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
 428         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
 429         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
 430         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
 431
 432         ufshcd_print_clk_freqs(hba);
 433
 434         if (hba->vops && hba->vops->dbg_register_dump)
 435                 hba->vops->dbg_register_dump(hba);
 436 }
 437
 438 static
 439 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
 440 {
 441         struct ufshcd_lrb *lrbp;
 442         int prdt_length;
 443         int tag;
 444
 445         for_each_set_bit(tag, &bitmap, hba->nutrs) {
 446                 lrbp = &hba->lrb[tag];
 447
 448                 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
 449                                 tag, ktime_to_us(lrbp->issue_time_stamp));
 450                 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
 451                                 tag, ktime_to_us(lrbp->compl_time_stamp));
 452                 dev_err(hba->dev,
 453                         "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
 454                         tag, (u64)lrbp->utrd_dma_addr);
 455
 456                 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
 457                                 sizeof(struct utp_transfer_req_desc));
 458                 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
 459                         (u64)lrbp->ucd_req_dma_addr);
 460                 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
 461                                 sizeof(struct utp_upiu_req));
 462                 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
 463                         (u64)lrbp->ucd_rsp_dma_addr);
 464                 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
 465                                 sizeof(struct utp_upiu_rsp));
 466
 467                 prdt_length = le16_to_cpu(
 468                         lrbp->utr_descriptor_ptr->prd_table_length);
 469                 dev_err(hba->dev,
 470                         "UPIU[%d] - PRDT - %d entries  phys@0x%llx\n",
 471                         tag, prdt_length,
 472                         (u64)lrbp->ucd_prdt_dma_addr);
 473
 474                 if (pr_prdt)
 475                         ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
 476                                 sizeof(struct ufshcd_sg_entry) * prdt_length);
 477         }
 478 }
 479
 480 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
 481 {
 482         int tag;
 483
 484         for_each_set_bit(tag, &bitmap, hba->nutmrs) {
 485                 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
 486
 487                 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
 488                 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
 489         }
 490 }
 491
 492 static void ufshcd_print_host_state(struct ufs_hba *hba)
 493 {
 494         dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
 495         dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
 496                 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
 497         dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
 498                 hba->saved_err, hba->saved_uic_err);
 499         dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
 500                 hba->curr_dev_pwr_mode, hba->uic_link_state);
 501         dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
 502                 hba->pm_op_in_progress, hba->is_sys_suspended);
 503         dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
 504                 hba->auto_bkops_enabled, hba->host->host_self_blocked);
 505         dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
 506         dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
 507                 hba->eh_flags, hba->req_abort_count);
 508         dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
 509                 hba->capabilities, hba->caps);
 510         dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
 511                 hba->dev_quirks);
 512 }
 513
 514 /**
 515  * ufshcd_print_pwr_info - print power params as saved in hba
 516  * power info
 517  * @hba: per-adapter instance
 518  */
 519 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
 520 {
 521         static const char * const names[] = {
 522                 "INVALID MODE",
 523                 "FAST MODE",
 524                 "SLOW_MODE",
 525                 "INVALID MODE",
 526                 "FASTAUTO_MODE",
 527                 "SLOWAUTO_MODE",
 528                 "INVALID MODE",
 529         };
 530
 531         dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
 532                  __func__,
 533                  hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
 534                  hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
 535                  names[hba->pwr_info.pwr_rx],
 536                  names[hba->pwr_info.pwr_tx],
 537                  hba->pwr_info.hs_rate);
 538 }
 539
 540 /*
 541  * ufshcd_wait_for_register - wait for register value to change
 542  * @hba - per-adapter interface
 543  * @reg - mmio register offset
 544  * @mask - mask to apply to read register value
 545  * @val - wait condition
 546  * @interval_us - polling interval in microsecs
 547  * @timeout_ms - timeout in millisecs
 548  * @can_sleep - perform sleep or just spin
 549  *
 550  * Returns -ETIMEDOUT on error, zero on success
 551  */
 552 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
 553                                 u32 val, unsigned long interval_us,
 554                                 unsigned long timeout_ms, bool can_sleep)
 555 {
 556         int err = 0;
 557         unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
 558
 559         /* ignore bits that we don't intend to wait on */
 560         val = val & mask;
 561
 562         while ((ufshcd_readl(hba, reg) & mask) != val) {
 563                 if (can_sleep)
 564                         usleep_range(interval_us, interval_us + 50);
 565                 else
 566                         udelay(interval_us);
 567                 if (time_after(jiffies, timeout)) {
 568                         if ((ufshcd_readl(hba, reg) & mask) != val)
 569                                 err = -ETIMEDOUT;
 570                         break;
 571                 }
 572         }
 573
 574         return err;
 575 }
 576
 577 /**
 578  * ufshcd_get_intr_mask - Get the interrupt bit mask
 579  * @hba: Pointer to adapter instance
 580  *
 581  * Returns interrupt bit mask per version
 582  */
 583 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
 584 {
 585         u32 intr_mask = 0;
 586
 587         switch (hba->ufs_version) {
 588         case UFSHCI_VERSION_10:
 589                 intr_mask = INTERRUPT_MASK_ALL_VER_10;
 590                 break;
 591         case UFSHCI_VERSION_11:
 592         case UFSHCI_VERSION_20:
 593                 intr_mask = INTERRUPT_MASK_ALL_VER_11;
 594                 break;
 595         case UFSHCI_VERSION_21:
 596         default:
 597                 intr_mask = INTERRUPT_MASK_ALL_VER_21;
 598                 break;
 599         }
 600
 601         return intr_mask;
 602 }
 603
 604 /**
 605  * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
 606  * @hba: Pointer to adapter instance
 607  *
 608  * Returns UFSHCI version supported by the controller
 609  */
 610 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
 611 {
 612         if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
 613                 return ufshcd_vops_get_ufs_hci_version(hba);
 614
 615         return ufshcd_readl(hba, REG_UFS_VERSION);
 616 }
 617
 618 /**
 619  * ufshcd_is_device_present - Check if any device connected to
 620  *                            the host controller
 621  * @hba: pointer to adapter instance
 622  *
 623  * Returns true if device present, false if no device detected
 624  */
 625 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
 626 {
 627         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
 628                                                 DEVICE_PRESENT) ? true : false;
 629 }
 630
 631 /**
 632  * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
 633  * @lrbp: pointer to local command reference block
 634  *
 635  * This function is used to get the OCS field from UTRD
 636  * Returns the OCS field in the UTRD
 637  */
 638 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
 639 {
 640         return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
 641 }
 642
 643 /**
 644  * ufshcd_get_tm_free_slot - get a free slot for task management request
 645  * @hba: per adapter instance
 646  * @free_slot: pointer to variable with available slot value
 647  *
 648  * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
 649  * Returns 0 if free slot is not available, else return 1 with tag value
 650  * in @free_slot.
 651  */
 652 static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
 653 {
 654         int tag;
 655         bool ret = false;
 656
 657         if (!free_slot)
 658                 goto out;
 659
 660         do {
 661                 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
 662                 if (tag >= hba->nutmrs)
 663                         goto out;
 664         } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
 665
 666         *free_slot = tag;
 667         ret = true;
 668 out:
 669         return ret;
 670 }
 671
 672 static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
 673 {
 674         clear_bit_unlock(slot, &hba->tm_slots_in_use);
 675 }
 676
 677 /**
 678  * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
 679  * @hba: per adapter instance
 680  * @pos: position of the bit to be cleared
 681  */
 682 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
 683 {
 684         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 685                 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 686         else
 687                 ufshcd_writel(hba, ~(1 << pos),
 688                                 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 689 }
 690
 691 /**
 692  * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
 693  * @hba: per adapter instance
 694  * @pos: position of the bit to be cleared
 695  */
 696 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
 697 {
 698         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 699                 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 700         else
 701                 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 702 }
 703
 704 /**
 705  * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
 706  * @hba: per adapter instance
 707  * @tag: position of the bit to be cleared
 708  */
 709 static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
 710 {
 711         __clear_bit(tag, &hba->outstanding_reqs);
 712 }
 713
 714 /**
 715  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
 716  * @reg: Register value of host controller status
 717  *
 718  * Returns integer, 0 on Success and positive value if failed
 719  */
 720 static inline int ufshcd_get_lists_status(u32 reg)
 721 {
 722         return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
 723 }
 724
 725 /**
 726  * ufshcd_get_uic_cmd_result - Get the UIC command result
 727  * @hba: Pointer to adapter instance
 728  *
 729  * This function gets the result of UIC command completion
 730  * Returns 0 on success, non zero value on error
 731  */
 732 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
 733 {
 734         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
 735                MASK_UIC_COMMAND_RESULT;
 736 }
 737
 738 /**
 739  * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
 740  * @hba: Pointer to adapter instance
 741  *
 742  * This function gets UIC command argument3
 743  * Returns 0 on success, non zero value on error
 744  */
 745 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
 746 {
 747         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
 748 }
 749
 750 /**
 751  * ufshcd_get_req_rsp - returns the TR response transaction type
 752  * @ucd_rsp_ptr: pointer to response UPIU
 753  */
 754 static inline int
 755 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
 756 {
 757         return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
 758 }
 759
 760 /**
 761  * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
 762  * @ucd_rsp_ptr: pointer to response UPIU
 763  *
 764  * This function gets the response status and scsi_status from response UPIU
 765  * Returns the response result code.
 766  */
 767 static inline int
 768 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
 769 {
 770         return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
 771 }
 772
 773 /*
 774  * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
 775  *                              from response UPIU
 776  * @ucd_rsp_ptr: pointer to response UPIU
 777  *
 778  * Return the data segment length.
 779  */
 780 static inline unsigned int
 781 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
 782 {
 783         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 784                 MASK_RSP_UPIU_DATA_SEG_LEN;
 785 }
 786
 787 /**
 788  * ufshcd_is_exception_event - Check if the device raised an exception event
 789  * @ucd_rsp_ptr: pointer to response UPIU
 790  *
 791  * The function checks if the device raised an exception event indicated in
 792  * the Device Information field of response UPIU.
 793  *
 794  * Returns true if exception is raised, false otherwise.
 795  */
 796 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
 797 {
 798         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 799                         MASK_RSP_EXCEPTION_EVENT ? true : false;
 800 }
 801
 802 /**
 803  * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
 804  * @hba: per adapter instance
 805  */
 806 static inline void
 807 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
 808 {
 809         ufshcd_writel(hba, INT_AGGR_ENABLE |
 810                       INT_AGGR_COUNTER_AND_TIMER_RESET,
 811                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 812 }
 813
 814 /**
 815  * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
 816  * @hba: per adapter instance
 817  * @cnt: Interrupt aggregation counter threshold
 818  * @tmout: Interrupt aggregation timeout value
 819  */
 820 static inline void
 821 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
 822 {
 823         ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
 824                       INT_AGGR_COUNTER_THLD_VAL(cnt) |
 825                       INT_AGGR_TIMEOUT_VAL(tmout),
 826                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 827 }
 828
 829 /**
 830  * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
 831  * @hba: per adapter instance
 832  */
 833 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
 834 {
 835         ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 836 }
 837
 838 /**
 839  * ufshcd_enable_run_stop_reg - Enable run-stop registers,
 840  *                      When run-stop registers are set to 1, it indicates the
 841  *                      host controller that it can process the requests
 842  * @hba: per adapter instance
 843  */
 844 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
 845 {
 846         ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
 847                       REG_UTP_TASK_REQ_LIST_RUN_STOP);
 848         ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
 849                       REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
 850 }
 851
 852 /**
 853  * ufshcd_hba_start - Start controller initialization sequence
 854  * @hba: per adapter instance
 855  */
 856 static inline void ufshcd_hba_start(struct ufs_hba *hba)
 857 {
 858         ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
 859 }
 860
 861 /**
 862  * ufshcd_is_hba_active - Get controller state
 863  * @hba: per adapter instance
 864  *
 865  * Returns false if controller is active, true otherwise
 866  */
 867 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
 868 {
 869         return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
 870                 ? false : true;
 871 }
 872
 873 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
 874 {
 875         /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
 876         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
 877             (hba->ufs_version == UFSHCI_VERSION_11))
 878                 return UFS_UNIPRO_VER_1_41;
 879         else
 880                 return UFS_UNIPRO_VER_1_6;
 881 }
 882 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
 883
 884 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
 885 {
 886         /*
 887          * If both host and device support UniPro ver1.6 or later, PA layer
 888          * parameters tuning happens during link startup itself.
 889          *
 890          * We can manually tune PA layer parameters if either host or device
 891          * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
 892          * logic simple, we will only do manual tuning if local unipro version
 893          * doesn't support ver1.6 or later.
 894          */
 895         if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
 896                 return true;
 897         else
 898                 return false;
 899 }
 900
 901 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
 902 {
 903         int ret = 0;
 904         struct ufs_clk_info *clki;
 905         struct list_head *head = &hba->clk_list_head;
 906         ktime_t start = ktime_get();
 907         bool clk_state_changed = false;
 908
 909         if (list_empty(head))
 910                 goto out;
 911
 912         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
 913         if (ret)
 914                 return ret;
 915
 916         list_for_each_entry(clki, head, list) {
 917                 if (!IS_ERR_OR_NULL(clki->clk)) {
 918                         if (scale_up && clki->max_freq) {
 919                                 if (clki->curr_freq == clki->max_freq)
 920                                         continue;
 921
 922                                 clk_state_changed = true;
 923                                 ret = clk_set_rate(clki->clk, clki->max_freq);
 924                                 if (ret) {
 925                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 926                                                 __func__, clki->name,
 927                                                 clki->max_freq, ret);
 928                                         break;
 929                                 }
 930                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 931                                                 "scaled up", clki->name,
 932                                                 clki->curr_freq,
 933                                                 clki->max_freq);
 934
 935                                 clki->curr_freq = clki->max_freq;
 936
 937                         } else if (!scale_up && clki->min_freq) {
 938                                 if (clki->curr_freq == clki->min_freq)
 939                                         continue;
 940
 941                                 clk_state_changed = true;
 942                                 ret = clk_set_rate(clki->clk, clki->min_freq);
 943                                 if (ret) {
 944                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 945                                                 __func__, clki->name,
 946                                                 clki->min_freq, ret);
 947                                         break;
 948                                 }
 949                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 950                                                 "scaled down", clki->name,
 951                                                 clki->curr_freq,
 952                                                 clki->min_freq);
 953                                 clki->curr_freq = clki->min_freq;
 954                         }
 955                 }
 956                 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
 957                                 clki->name, clk_get_rate(clki->clk));
 958         }
 959
 960         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
 961
 962 out:
 963         if (clk_state_changed)
 964                 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
 965                         (scale_up ? "up" : "down"),
 966                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
 967         return ret;
 968 }
 969
 970 /**
 971  * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
 972  * @hba: per adapter instance
 973  * @scale_up: True if scaling up and false if scaling down
 974  *
 975  * Returns true if scaling is required, false otherwise.
 976  */
 977 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
 978                                                bool scale_up)
 979 {
 980         struct ufs_clk_info *clki;
 981         struct list_head *head = &hba->clk_list_head;
 982
 983         if (list_empty(head))
 984                 return false;
 985
 986         list_for_each_entry(clki, head, list) {
 987                 if (!IS_ERR_OR_NULL(clki->clk)) {
 988                         if (scale_up && clki->max_freq) {
 989                                 if (clki->curr_freq == clki->max_freq)
 990                                         continue;
 991                                 return true;
 992                         } else if (!scale_up && clki->min_freq) {
 993                                 if (clki->curr_freq == clki->min_freq)
 994                                         continue;
 995                                 return true;
 996                         }
 997                 }
 998         }
 999
1000         return false;
1001 }
1002
1003 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1004                                         u64 wait_timeout_us)
1005 {
1006         unsigned long flags;
1007         int ret = 0;
1008         u32 tm_doorbell;
1009         u32 tr_doorbell;
1010         bool timeout = false, do_last_check = false;
1011         ktime_t start;
1012
1013         ufshcd_hold(hba, false);
1014         spin_lock_irqsave(hba->host->host_lock, flags);
1015         /*
1016          * Wait for all the outstanding tasks/transfer requests.
1017          * Verify by checking the doorbell registers are clear.
1018          */
1019         start = ktime_get();
1020         do {
1021                 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1022                         ret = -EBUSY;
1023                         goto out;
1024                 }
1025
1026                 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1027                 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1028                 if (!tm_doorbell && !tr_doorbell) {
1029                         timeout = false;
1030                         break;
1031                 } else if (do_last_check) {
1032                         break;
1033                 }
1034
1035                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1036                 schedule();
1037                 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1038                     wait_timeout_us) {
1039                         timeout = true;
1040                         /*
1041                          * We might have scheduled out for long time so make
1042                          * sure to check if doorbells are cleared by this time
1043                          * or not.
1044                          */
1045                         do_last_check = true;
1046                 }
1047                 spin_lock_irqsave(hba->host->host_lock, flags);
1048         } while (tm_doorbell || tr_doorbell);
1049
1050         if (timeout) {
1051                 dev_err(hba->dev,
1052                         "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1053                         __func__, tm_doorbell, tr_doorbell);
1054                 ret = -EBUSY;
1055         }
1056 out:
1057         spin_unlock_irqrestore(hba->host->host_lock, flags);
1058         ufshcd_release(hba);
1059         return ret;
1060 }
1061
1062 /**
1063  * ufshcd_scale_gear - scale up/down UFS gear
1064  * @hba: per adapter instance
1065  * @scale_up: True for scaling up gear and false for scaling down
1066  *
1067  * Returns 0 for success,
1068  * Returns -EBUSY if scaling can't happen at this time
1069  * Returns non-zero for any other errors
1070  */
1071 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1072 {
1073         #define UFS_MIN_GEAR_TO_SCALE_DOWN      UFS_HS_G1
1074         int ret = 0;
1075         struct ufs_pa_layer_attr new_pwr_info;
1076
1077         if (scale_up) {
1078                 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1079                        sizeof(struct ufs_pa_layer_attr));
1080         } else {
1081                 memcpy(&new_pwr_info, &hba->pwr_info,
1082                        sizeof(struct ufs_pa_layer_attr));
1083
1084                 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1085                     || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1086                         /* save the current power mode */
1087                         memcpy(&hba->clk_scaling.saved_pwr_info.info,
1088                                 &hba->pwr_info,
1089                                 sizeof(struct ufs_pa_layer_attr));
1090
1091                         /* scale down gear */
1092                         new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1093                         new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1094                 }
1095         }
1096
1097         /* check if the power mode needs to be changed or not? */
1098         ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1099
1100         if (ret)
1101                 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1102                         __func__, ret,
1103                         hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1104                         new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1105
1106         return ret;
1107 }
1108
1109 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1110 {
1111         #define DOORBELL_CLR_TOUT_US            (1000 * 1000) /* 1 sec */
1112         int ret = 0;
1113         /*
1114          * make sure that there are no outstanding requests when
1115          * clock scaling is in progress
1116          */
1117         ufshcd_scsi_block_requests(hba);
1118         down_write(&hba->clk_scaling_lock);
1119         if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1120                 ret = -EBUSY;
1121                 up_write(&hba->clk_scaling_lock);
1122                 ufshcd_scsi_unblock_requests(hba);
1123         }
1124
1125         return ret;
1126 }
1127
1128 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1129 {
1130         up_write(&hba->clk_scaling_lock);
1131         ufshcd_scsi_unblock_requests(hba);
1132 }
1133
1134 /**
1135  * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1136  * @hba: per adapter instance
1137  * @scale_up: True for scaling up and false for scalin down
1138  *
1139  * Returns 0 for success,
1140  * Returns -EBUSY if scaling can't happen at this time
1141  * Returns non-zero for any other errors
1142  */
1143 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1144 {
1145         int ret = 0;
1146
1147         /* let's not get into low power until clock scaling is completed */
1148         ufshcd_hold(hba, false);
1149
1150         ret = ufshcd_clock_scaling_prepare(hba);
1151         if (ret)
1152                 return ret;
1153
1154         /* scale down the gear before scaling down clocks */
1155         if (!scale_up) {
1156                 ret = ufshcd_scale_gear(hba, false);
1157                 if (ret)
1158                         goto out;
1159         }
1160
1161         ret = ufshcd_scale_clks(hba, scale_up);
1162         if (ret) {
1163                 if (!scale_up)
1164                         ufshcd_scale_gear(hba, true);
1165                 goto out;
1166         }
1167
1168         /* scale up the gear after scaling up clocks */
1169         if (scale_up) {
1170                 ret = ufshcd_scale_gear(hba, true);
1171                 if (ret) {
1172                         ufshcd_scale_clks(hba, false);
1173                         goto out;
1174                 }
1175         }
1176
1177         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1178
1179 out:
1180         ufshcd_clock_scaling_unprepare(hba);
1181         ufshcd_release(hba);
1182         return ret;
1183 }
1184
1185 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1186 {
1187         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1188                                            clk_scaling.suspend_work);
1189         unsigned long irq_flags;
1190
1191         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1192         if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1193                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1194                 return;
1195         }
1196         hba->clk_scaling.is_suspended = true;
1197         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1198
1199         __ufshcd_suspend_clkscaling(hba);
1200 }
1201
1202 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1203 {
1204         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1205                                            clk_scaling.resume_work);
1206         unsigned long irq_flags;
1207
1208         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1209         if (!hba->clk_scaling.is_suspended) {
1210                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1211                 return;
1212         }
1213         hba->clk_scaling.is_suspended = false;
1214         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1215
1216         devfreq_resume_device(hba->devfreq);
1217 }
1218
1219 static int ufshcd_devfreq_target(struct device *dev,
1220                                 unsigned long *freq, u32 flags)
1221 {
1222         int ret = 0;
1223         struct ufs_hba *hba = dev_get_drvdata(dev);
1224         ktime_t start;
1225         bool scale_up, sched_clk_scaling_suspend_work = false;
1226         struct list_head *clk_list = &hba->clk_list_head;
1227         struct ufs_clk_info *clki;
1228         unsigned long irq_flags;
1229
1230         if (!ufshcd_is_clkscaling_supported(hba))
1231                 return -EINVAL;
1232
1233         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1234         if (ufshcd_eh_in_progress(hba)) {
1235                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1236                 return 0;
1237         }
1238
1239         if (!hba->clk_scaling.active_reqs)
1240                 sched_clk_scaling_suspend_work = true;
1241
1242         if (list_empty(clk_list)) {
1243                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1244                 goto out;
1245         }
1246
1247         clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1248         scale_up = (*freq == clki->max_freq) ? true : false;
1249         if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1250                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1251                 ret = 0;
1252                 goto out; /* no state change required */
1253         }
1254         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1255
1256         start = ktime_get();
1257         ret = ufshcd_devfreq_scale(hba, scale_up);
1258
1259         trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1260                 (scale_up ? "up" : "down"),
1261                 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1262
1263 out:
1264         if (sched_clk_scaling_suspend_work)
1265                 queue_work(hba->clk_scaling.workq,
1266                            &hba->clk_scaling.suspend_work);
1267
1268         return ret;
1269 }
1270
1271
1272 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1273                 struct devfreq_dev_status *stat)
1274 {
1275         struct ufs_hba *hba = dev_get_drvdata(dev);
1276         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1277         unsigned long flags;
1278
1279         if (!ufshcd_is_clkscaling_supported(hba))
1280                 return -EINVAL;
1281
1282         memset(stat, 0, sizeof(*stat));
1283
1284         spin_lock_irqsave(hba->host->host_lock, flags);
1285         if (!scaling->window_start_t)
1286                 goto start_window;
1287
1288         if (scaling->is_busy_started)
1289                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1290                                         scaling->busy_start_t));
1291
1292         stat->total_time = jiffies_to_usecs((long)jiffies -
1293                                 (long)scaling->window_start_t);
1294         stat->busy_time = scaling->tot_busy_t;
1295 start_window:
1296         scaling->window_start_t = jiffies;
1297         scaling->tot_busy_t = 0;
1298
1299         if (hba->outstanding_reqs) {
1300                 scaling->busy_start_t = ktime_get();
1301                 scaling->is_busy_started = true;
1302         } else {
1303                 scaling->busy_start_t = 0;
1304                 scaling->is_busy_started = false;
1305         }
1306         spin_unlock_irqrestore(hba->host->host_lock, flags);
1307         return 0;
1308 }
1309
1310 static struct devfreq_dev_profile ufs_devfreq_profile = {
1311         .polling_ms     = 100,
1312         .target         = ufshcd_devfreq_target,
1313         .get_dev_status = ufshcd_devfreq_get_dev_status,
1314 };
1315
1316 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1317 {
1318         struct list_head *clk_list = &hba->clk_list_head;
1319         struct ufs_clk_info *clki;
1320         struct devfreq *devfreq;
1321         int ret;
1322
1323         /* Skip devfreq if we don't have any clocks in the list */
1324         if (list_empty(clk_list))
1325                 return 0;
1326
1327         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1328         dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1329         dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1330
1331         devfreq = devfreq_add_device(hba->dev,
1332                         &ufs_devfreq_profile,
1333                         DEVFREQ_GOV_SIMPLE_ONDEMAND,
1334                         NULL);
1335         if (IS_ERR(devfreq)) {
1336                 ret = PTR_ERR(devfreq);
1337                 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1338
1339                 dev_pm_opp_remove(hba->dev, clki->min_freq);
1340                 dev_pm_opp_remove(hba->dev, clki->max_freq);
1341                 return ret;
1342         }
1343
1344         hba->devfreq = devfreq;
1345
1346         return 0;
1347 }
1348
1349 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1350 {
1351         struct list_head *clk_list = &hba->clk_list_head;
1352         struct ufs_clk_info *clki;
1353
1354         if (!hba->devfreq)
1355                 return;
1356
1357         devfreq_remove_device(hba->devfreq);
1358         hba->devfreq = NULL;
1359
1360         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1361         dev_pm_opp_remove(hba->dev, clki->min_freq);
1362         dev_pm_opp_remove(hba->dev, clki->max_freq);
1363 }
1364
1365 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1366 {
1367         unsigned long flags;
1368
1369         devfreq_suspend_device(hba->devfreq);
1370         spin_lock_irqsave(hba->host->host_lock, flags);
1371         hba->clk_scaling.window_start_t = 0;
1372         spin_unlock_irqrestore(hba->host->host_lock, flags);
1373 }
1374
1375 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1376 {
1377         unsigned long flags;
1378         bool suspend = false;
1379
1380         if (!ufshcd_is_clkscaling_supported(hba))
1381                 return;
1382
1383         spin_lock_irqsave(hba->host->host_lock, flags);
1384         if (!hba->clk_scaling.is_suspended) {
1385                 suspend = true;
1386                 hba->clk_scaling.is_suspended = true;
1387         }
1388         spin_unlock_irqrestore(hba->host->host_lock, flags);
1389
1390         if (suspend)
1391                 __ufshcd_suspend_clkscaling(hba);
1392 }
1393
1394 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1395 {
1396         unsigned long flags;
1397         bool resume = false;
1398
1399         if (!ufshcd_is_clkscaling_supported(hba))
1400                 return;
1401
1402         spin_lock_irqsave(hba->host->host_lock, flags);
1403         if (hba->clk_scaling.is_suspended) {
1404                 resume = true;
1405                 hba->clk_scaling.is_suspended = false;
1406         }
1407         spin_unlock_irqrestore(hba->host->host_lock, flags);
1408
1409         if (resume)
1410                 devfreq_resume_device(hba->devfreq);
1411 }
1412
1413 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1414                 struct device_attribute *attr, char *buf)
1415 {
1416         struct ufs_hba *hba = dev_get_drvdata(dev);
1417
1418         return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1419 }
1420
1421 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1422                 struct device_attribute *attr, const char *buf, size_t count)
1423 {
1424         struct ufs_hba *hba = dev_get_drvdata(dev);
1425         u32 value;
1426         int err;
1427
1428         if (kstrtou32(buf, 0, &value))
1429                 return -EINVAL;
1430
1431         value = !!value;
1432         if (value == hba->clk_scaling.is_allowed)
1433                 goto out;
1434
1435         pm_runtime_get_sync(hba->dev);
1436         ufshcd_hold(hba, false);
1437
1438         cancel_work_sync(&hba->clk_scaling.suspend_work);
1439         cancel_work_sync(&hba->clk_scaling.resume_work);
1440
1441         hba->clk_scaling.is_allowed = value;
1442
1443         if (value) {
1444                 ufshcd_resume_clkscaling(hba);
1445         } else {
1446                 ufshcd_suspend_clkscaling(hba);
1447                 err = ufshcd_devfreq_scale(hba, true);
1448                 if (err)
1449                         dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1450                                         __func__, err);
1451         }
1452
1453         ufshcd_release(hba);
1454         pm_runtime_put_sync(hba->dev);
1455 out:
1456         return count;
1457 }
1458
1459 static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1460 {
1461         hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1462         hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1463         sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1464         hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1465         hba->clk_scaling.enable_attr.attr.mode = 0644;
1466         if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1467                 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1468 }
1469
1470 static void ufshcd_ungate_work(struct work_struct *work)
1471 {
1472         int ret;
1473         unsigned long flags;
1474         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1475                         clk_gating.ungate_work);
1476
1477         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1478
1479         spin_lock_irqsave(hba->host->host_lock, flags);
1480         if (hba->clk_gating.state == CLKS_ON) {
1481                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1482                 goto unblock_reqs;
1483         }
1484
1485         spin_unlock_irqrestore(hba->host->host_lock, flags);
1486         ufshcd_setup_clocks(hba, true);
1487
1488         /* Exit from hibern8 */
1489         if (ufshcd_can_hibern8_during_gating(hba)) {
1490                 /* Prevent gating in this path */
1491                 hba->clk_gating.is_suspended = true;
1492                 if (ufshcd_is_link_hibern8(hba)) {
1493                         ret = ufshcd_uic_hibern8_exit(hba);
1494                         if (ret)
1495                                 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1496                                         __func__, ret);
1497                         else
1498                                 ufshcd_set_link_active(hba);
1499                 }
1500                 hba->clk_gating.is_suspended = false;
1501         }
1502 unblock_reqs:
1503         ufshcd_scsi_unblock_requests(hba);
1504 }
1505
1506 /**
1507  * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1508  * Also, exit from hibern8 mode and set the link as active.
1509  * @hba: per adapter instance
1510  * @async: This indicates whether caller should ungate clocks asynchronously.
1511  */
1512 int ufshcd_hold(struct ufs_hba *hba, bool async)
1513 {
1514         int rc = 0;
1515         unsigned long flags;
1516
1517         if (!ufshcd_is_clkgating_allowed(hba))
1518                 goto out;
1519         spin_lock_irqsave(hba->host->host_lock, flags);
1520         hba->clk_gating.active_reqs++;
1521
1522         if (ufshcd_eh_in_progress(hba)) {
1523                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1524                 return 0;
1525         }
1526
1527 start:
1528         switch (hba->clk_gating.state) {
1529         case CLKS_ON:
1530                 /*
1531                  * Wait for the ungate work to complete if in progress.
1532                  * Though the clocks may be in ON state, the link could
1533                  * still be in hibner8 state if hibern8 is allowed
1534                  * during clock gating.
1535                  * Make sure we exit hibern8 state also in addition to
1536                  * clocks being ON.
1537                  */
1538                 if (ufshcd_can_hibern8_during_gating(hba) &&
1539                     ufshcd_is_link_hibern8(hba)) {
1540                         spin_unlock_irqrestore(hba->host->host_lock, flags);
1541                         flush_work(&hba->clk_gating.ungate_work);
1542                         spin_lock_irqsave(hba->host->host_lock, flags);
1543                         goto start;
1544                 }
1545                 break;
1546         case REQ_CLKS_OFF:
1547                 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1548                         hba->clk_gating.state = CLKS_ON;
1549                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1550                                                 hba->clk_gating.state);
1551                         break;
1552                 }
1553                 /*
1554                  * If we are here, it means gating work is either done or
1555                  * currently running. Hence, fall through to cancel gating
1556                  * work and to enable clocks.
1557                  */
1558                 /* fallthrough */
1559         case CLKS_OFF:
1560                 ufshcd_scsi_block_requests(hba);
1561                 hba->clk_gating.state = REQ_CLKS_ON;
1562                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1563                                         hba->clk_gating.state);
1564                 queue_work(hba->clk_gating.clk_gating_workq,
1565                            &hba->clk_gating.ungate_work);
1566                 /*
1567                  * fall through to check if we should wait for this
1568                  * work to be done or not.
1569                  */
1570                 /* fallthrough */
1571         case REQ_CLKS_ON:
1572                 if (async) {
1573                         rc = -EAGAIN;
1574                         hba->clk_gating.active_reqs--;
1575                         break;
1576                 }
1577
1578                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1579                 flush_work(&hba->clk_gating.ungate_work);
1580                 /* Make sure state is CLKS_ON before returning */
1581                 spin_lock_irqsave(hba->host->host_lock, flags);
1582                 goto start;
1583         default:
1584                 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1585                                 __func__, hba->clk_gating.state);
1586                 break;
1587         }
1588         spin_unlock_irqrestore(hba->host->host_lock, flags);
1589 out:
1590         return rc;
1591 }
1592 EXPORT_SYMBOL_GPL(ufshcd_hold);
1593
1594 static void ufshcd_gate_work(struct work_struct *work)
1595 {
1596         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1597                         clk_gating.gate_work.work);
1598         unsigned long flags;
1599
1600         spin_lock_irqsave(hba->host->host_lock, flags);
1601         /*
1602          * In case you are here to cancel this work the gating state
1603          * would be marked as REQ_CLKS_ON. In this case save time by
1604          * skipping the gating work and exit after changing the clock
1605          * state to CLKS_ON.
1606          */
1607         if (hba->clk_gating.is_suspended ||
1608                 (hba->clk_gating.state == REQ_CLKS_ON)) {
1609                 hba->clk_gating.state = CLKS_ON;
1610                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1611                                         hba->clk_gating.state);
1612                 goto rel_lock;
1613         }
1614
1615         if (hba->clk_gating.active_reqs
1616                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1617                 || hba->lrb_in_use || hba->outstanding_tasks
1618                 || hba->active_uic_cmd || hba->uic_async_done)
1619                 goto rel_lock;
1620
1621         spin_unlock_irqrestore(hba->host->host_lock, flags);
1622
1623         /* put the link into hibern8 mode before turning off clocks */
1624         if (ufshcd_can_hibern8_during_gating(hba)) {
1625                 if (ufshcd_uic_hibern8_enter(hba)) {
1626                         hba->clk_gating.state = CLKS_ON;
1627                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1628                                                 hba->clk_gating.state);
1629                         goto out;
1630                 }
1631                 ufshcd_set_link_hibern8(hba);
1632         }
1633
1634         if (!ufshcd_is_link_active(hba))
1635                 ufshcd_setup_clocks(hba, false);
1636         else
1637                 /* If link is active, device ref_clk can't be switched off */
1638                 __ufshcd_setup_clocks(hba, false, true);
1639
1640         /*
1641          * In case you are here to cancel this work the gating state
1642          * would be marked as REQ_CLKS_ON. In this case keep the state
1643          * as REQ_CLKS_ON which would anyway imply that clocks are off
1644          * and a request to turn them on is pending. By doing this way,
1645          * we keep the state machine in tact and this would ultimately
1646          * prevent from doing cancel work multiple times when there are
1647          * new requests arriving before the current cancel work is done.
1648          */
1649         spin_lock_irqsave(hba->host->host_lock, flags);
1650         if (hba->clk_gating.state == REQ_CLKS_OFF) {
1651                 hba->clk_gating.state = CLKS_OFF;
1652                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1653                                         hba->clk_gating.state);
1654         }
1655 rel_lock:
1656         spin_unlock_irqrestore(hba->host->host_lock, flags);
1657 out:
1658         return;
1659 }
1660
1661 /* host lock must be held before calling this variant */
1662 static void __ufshcd_release(struct ufs_hba *hba)
1663 {
1664         if (!ufshcd_is_clkgating_allowed(hba))
1665                 return;
1666
1667         hba->clk_gating.active_reqs--;
1668
1669         if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1670                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1671                 || hba->lrb_in_use || hba->outstanding_tasks
1672                 || hba->active_uic_cmd || hba->uic_async_done
1673                 || ufshcd_eh_in_progress(hba))
1674                 return;
1675
1676         hba->clk_gating.state = REQ_CLKS_OFF;
1677         trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1678         queue_delayed_work(hba->clk_gating.clk_gating_workq,
1679                            &hba->clk_gating.gate_work,
1680                            msecs_to_jiffies(hba->clk_gating.delay_ms));
1681 }
1682
1683 void ufshcd_release(struct ufs_hba *hba)
1684 {
1685         unsigned long flags;
1686
1687         spin_lock_irqsave(hba->host->host_lock, flags);
1688         __ufshcd_release(hba);
1689         spin_unlock_irqrestore(hba->host->host_lock, flags);
1690 }
1691 EXPORT_SYMBOL_GPL(ufshcd_release);
1692
1693 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1694                 struct device_attribute *attr, char *buf)
1695 {
1696         struct ufs_hba *hba = dev_get_drvdata(dev);
1697
1698         return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1699 }
1700
1701 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1702                 struct device_attribute *attr, const char *buf, size_t count)
1703 {
1704         struct ufs_hba *hba = dev_get_drvdata(dev);
1705         unsigned long flags, value;
1706
1707         if (kstrtoul(buf, 0, &value))
1708                 return -EINVAL;
1709
1710         spin_lock_irqsave(hba->host->host_lock, flags);
1711         hba->clk_gating.delay_ms = value;
1712         spin_unlock_irqrestore(hba->host->host_lock, flags);
1713         return count;
1714 }
1715
1716 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1717                 struct device_attribute *attr, char *buf)
1718 {
1719         struct ufs_hba *hba = dev_get_drvdata(dev);
1720
1721         return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1722 }
1723
1724 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1725                 struct device_attribute *attr, const char *buf, size_t count)
1726 {
1727         struct ufs_hba *hba = dev_get_drvdata(dev);
1728         unsigned long flags;
1729         u32 value;
1730
1731         if (kstrtou32(buf, 0, &value))
1732                 return -EINVAL;
1733
1734         value = !!value;
1735         if (value == hba->clk_gating.is_enabled)
1736                 goto out;
1737
1738         if (value) {
1739                 ufshcd_release(hba);
1740         } else {
1741                 spin_lock_irqsave(hba->host->host_lock, flags);
1742                 hba->clk_gating.active_reqs++;
1743                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1744         }
1745
1746         hba->clk_gating.is_enabled = value;
1747 out:
1748         return count;
1749 }
1750
1751 static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1752 {
1753         char wq_name[sizeof("ufs_clkscaling_00")];
1754
1755         if (!ufshcd_is_clkscaling_supported(hba))
1756                 return;
1757
1758         INIT_WORK(&hba->clk_scaling.suspend_work,
1759                   ufshcd_clk_scaling_suspend_work);
1760         INIT_WORK(&hba->clk_scaling.resume_work,
1761                   ufshcd_clk_scaling_resume_work);
1762
1763         snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1764                  hba->host->host_no);
1765         hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1766
1767         ufshcd_clkscaling_init_sysfs(hba);
1768 }
1769
1770 static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1771 {
1772         if (!ufshcd_is_clkscaling_supported(hba))
1773                 return;
1774
1775         destroy_workqueue(hba->clk_scaling.workq);
1776         ufshcd_devfreq_remove(hba);
1777 }
1778
1779 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1780 {
1781         char wq_name[sizeof("ufs_clk_gating_00")];
1782
1783         if (!ufshcd_is_clkgating_allowed(hba))
1784                 return;
1785
1786         hba->clk_gating.delay_ms = 150;
1787         INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1788         INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1789
1790         snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1791                  hba->host->host_no);
1792         hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1793                                                            WQ_MEM_RECLAIM);
1794
1795         hba->clk_gating.is_enabled = true;
1796
1797         hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1798         hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1799         sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1800         hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1801         hba->clk_gating.delay_attr.attr.mode = 0644;
1802         if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1803                 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1804
1805         hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1806         hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1807         sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1808         hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1809         hba->clk_gating.enable_attr.attr.mode = 0644;
1810         if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1811                 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1812 }
1813
1814 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1815 {
1816         if (!ufshcd_is_clkgating_allowed(hba))
1817                 return;
1818         device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1819         device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1820         cancel_work_sync(&hba->clk_gating.ungate_work);
1821         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1822         destroy_workqueue(hba->clk_gating.clk_gating_workq);
1823 }
1824
1825 /* Must be called with host lock acquired */
1826 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1827 {
1828         bool queue_resume_work = false;
1829
1830         if (!ufshcd_is_clkscaling_supported(hba))
1831                 return;
1832
1833         if (!hba->clk_scaling.active_reqs++)
1834                 queue_resume_work = true;
1835
1836         if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1837                 return;
1838
1839         if (queue_resume_work)
1840                 queue_work(hba->clk_scaling.workq,
1841                            &hba->clk_scaling.resume_work);
1842
1843         if (!hba->clk_scaling.window_start_t) {
1844                 hba->clk_scaling.window_start_t = jiffies;
1845                 hba->clk_scaling.tot_busy_t = 0;
1846                 hba->clk_scaling.is_busy_started = false;
1847         }
1848
1849         if (!hba->clk_scaling.is_busy_started) {
1850                 hba->clk_scaling.busy_start_t = ktime_get();
1851                 hba->clk_scaling.is_busy_started = true;
1852         }
1853 }
1854
1855 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1856 {
1857         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1858
1859         if (!ufshcd_is_clkscaling_supported(hba))
1860                 return;
1861
1862         if (!hba->outstanding_reqs && scaling->is_busy_started) {
1863                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1864                                         scaling->busy_start_t));
1865                 scaling->busy_start_t = 0;
1866                 scaling->is_busy_started = false;
1867         }
1868 }
1869 /**
1870  * ufshcd_send_command - Send SCSI or device management commands
1871  * @hba: per adapter instance
1872  * @task_tag: Task tag of the command
1873  */
1874 static inline
1875 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1876 {
1877         hba->lrb[task_tag].issue_time_stamp = ktime_get();
1878         hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
1879         ufshcd_clk_scaling_start_busy(hba);
1880         __set_bit(task_tag, &hba->outstanding_reqs);
1881         ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1882         /* Make sure that doorbell is committed immediately */
1883         wmb();
1884         ufshcd_add_command_trace(hba, task_tag, "send");
1885 }
1886
1887 /**
1888  * ufshcd_copy_sense_data - Copy sense data in case of check condition
1889  * @lrbp: pointer to local reference block
1890  */
1891 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1892 {
1893         int len;
1894         if (lrbp->sense_buffer &&
1895             ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
1896                 int len_to_copy;
1897
1898                 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
1899                 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
1900
1901                 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1902                        len_to_copy);
1903         }
1904 }
1905
1906 /**
1907  * ufshcd_copy_query_response() - Copy the Query Response and the data
1908  * descriptor
1909  * @hba: per adapter instance
1910  * @lrbp: pointer to local reference block
1911  */
1912 static
1913 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1914 {
1915         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1916
1917         memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
1918
1919         /* Get the descriptor */
1920         if (hba->dev_cmd.query.descriptor &&
1921             lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
1922                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
1923                                 GENERAL_UPIU_REQUEST_SIZE;
1924                 u16 resp_len;
1925                 u16 buf_len;
1926
1927                 /* data segment length */
1928                 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
1929                                                 MASK_QUERY_DATA_SEG_LEN;
1930                 buf_len = be16_to_cpu(
1931                                 hba->dev_cmd.query.request.upiu_req.length);
1932                 if (likely(buf_len >= resp_len)) {
1933                         memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1934                 } else {
1935                         dev_warn(hba->dev,
1936                                 "%s: Response size is bigger than buffer",
1937                                 __func__);
1938                         return -EINVAL;
1939                 }
1940         }
1941
1942         return 0;
1943 }
1944
1945 /**
1946  * ufshcd_hba_capabilities - Read controller capabilities
1947  * @hba: per adapter instance
1948  */
1949 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1950 {
1951         hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
1952
1953         /* nutrs and nutmrs are 0 based values */
1954         hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1955         hba->nutmrs =
1956         ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1957 }
1958
1959 /**
1960  * ufshcd_ready_for_uic_cmd - Check if controller is ready
1961  *                            to accept UIC commands
1962  * @hba: per adapter instance
1963  * Return true on success, else false
1964  */
1965 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1966 {
1967         if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1968                 return true;
1969         else
1970                 return false;
1971 }
1972
1973 /**
1974  * ufshcd_get_upmcrs - Get the power mode change request status
1975  * @hba: Pointer to adapter instance
1976  *
1977  * This function gets the UPMCRS field of HCS register
1978  * Returns value of UPMCRS field
1979  */
1980 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1981 {
1982         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1983 }
1984
1985 /**
1986  * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1987  * @hba: per adapter instance
1988  * @uic_cmd: UIC command
1989  *
1990  * Mutex must be held.
1991  */
1992 static inline void
1993 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1994 {
1995         WARN_ON(hba->active_uic_cmd);
1996
1997         hba->active_uic_cmd = uic_cmd;
1998
1999         /* Write Args */
2000         ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2001         ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2002         ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
2003
2004         /* Write UIC Cmd */
2005         ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2006                       REG_UIC_COMMAND);
2007 }
2008
2009 /**
2010  * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2011  * @hba: per adapter instance
2012  * @uic_cmd: UIC command
2013  *
2014  * Must be called with mutex held.
2015  * Returns 0 only if success.
2016  */
2017 static int
2018 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2019 {
2020         int ret;
2021         unsigned long flags;
2022
2023         if (wait_for_completion_timeout(&uic_cmd->done,
2024                                         msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2025                 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2026         else
2027                 ret = -ETIMEDOUT;
2028
2029         spin_lock_irqsave(hba->host->host_lock, flags);
2030         hba->active_uic_cmd = NULL;
2031         spin_unlock_irqrestore(hba->host->host_lock, flags);
2032
2033         return ret;
2034 }
2035
2036 /**
2037  * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2038  * @hba: per adapter instance
2039  * @uic_cmd: UIC command
2040  * @completion: initialize the completion only if this is set to true
2041  *
2042  * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
2043  * with mutex held and host_lock locked.
2044  * Returns 0 only if success.
2045  */
2046 static int
2047 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2048                       bool completion)
2049 {
2050         if (!ufshcd_ready_for_uic_cmd(hba)) {
2051                 dev_err(hba->dev,
2052                         "Controller not ready to accept UIC commands\n");
2053                 return -EIO;
2054         }
2055
2056         if (completion)
2057                 init_completion(&uic_cmd->done);
2058
2059         ufshcd_dispatch_uic_cmd(hba, uic_cmd);
2060
2061         return 0;
2062 }
2063
2064 /**
2065  * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2066  * @hba: per adapter instance
2067  * @uic_cmd: UIC command
2068  *
2069  * Returns 0 only if success.
2070  */
2071 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2072 {
2073         int ret;
2074         unsigned long flags;
2075
2076         ufshcd_hold(hba, false);
2077         mutex_lock(&hba->uic_cmd_mutex);
2078         ufshcd_add_delay_before_dme_cmd(hba);
2079
2080         spin_lock_irqsave(hba->host->host_lock, flags);
2081         ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2082         spin_unlock_irqrestore(hba->host->host_lock, flags);
2083         if (!ret)
2084                 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2085
2086         mutex_unlock(&hba->uic_cmd_mutex);
2087
2088         ufshcd_release(hba);
2089         return ret;
2090 }
2091
2092 /**
2093  * ufshcd_map_sg - Map scatter-gather list to prdt
2094  * @hba: per adapter instance
2095  * @lrbp: pointer to local reference block
2096  *
2097  * Returns 0 in case of success, non-zero value in case of failure
2098  */
2099 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2100 {
2101         struct ufshcd_sg_entry *prd_table;
2102         struct scatterlist *sg;
2103         struct scsi_cmnd *cmd;
2104         int sg_segments;
2105         int i;
2106
2107         cmd = lrbp->cmd;
2108         sg_segments = scsi_dma_map(cmd);
2109         if (sg_segments < 0)
2110                 return sg_segments;
2111
2112         if (sg_segments) {
2113                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2114                         lrbp->utr_descriptor_ptr->prd_table_length =
2115                                 cpu_to_le16((u16)(sg_segments *
2116                                         sizeof(struct ufshcd_sg_entry)));
2117                 else
2118                         lrbp->utr_descriptor_ptr->prd_table_length =
2119                                 cpu_to_le16((u16) (sg_segments));
2120
2121                 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2122
2123                 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2124                         prd_table[i].size  =
2125                                 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2126                         prd_table[i].base_addr =
2127                                 cpu_to_le32(lower_32_bits(sg->dma_address));
2128                         prd_table[i].upper_addr =
2129                                 cpu_to_le32(upper_32_bits(sg->dma_address));
2130                         prd_table[i].reserved = 0;
2131                 }
2132         } else {
2133                 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2134         }
2135
2136         return 0;
2137 }
2138
2139 /**
2140  * ufshcd_enable_intr - enable interrupts
2141  * @hba: per adapter instance
2142  * @intrs: interrupt bits
2143  */
2144 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2145 {
2146         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2147
2148         if (hba->ufs_version == UFSHCI_VERSION_10) {
2149                 u32 rw;
2150                 rw = set & INTERRUPT_MASK_RW_VER_10;
2151                 set = rw | ((set ^ intrs) & intrs);
2152         } else {
2153                 set |= intrs;
2154         }
2155
2156         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2157 }
2158
2159 /**
2160  * ufshcd_disable_intr - disable interrupts
2161  * @hba: per adapter instance
2162  * @intrs: interrupt bits
2163  */
2164 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2165 {
2166         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2167
2168         if (hba->ufs_version == UFSHCI_VERSION_10) {
2169                 u32 rw;
2170                 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2171                         ~(intrs & INTERRUPT_MASK_RW_VER_10);
2172                 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2173
2174         } else {
2175                 set &= ~intrs;
2176         }
2177
2178         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2179 }
2180
2181 /**
2182  * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2183  * descriptor according to request
2184  * @lrbp: pointer to local reference block
2185  * @upiu_flags: flags required in the header
2186  * @cmd_dir: requests data direction
2187  */
2188 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2189                         u32 *upiu_flags, enum dma_data_direction cmd_dir)
2190 {
2191         struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2192         u32 data_direction;
2193         u32 dword_0;
2194
2195         if (cmd_dir == DMA_FROM_DEVICE) {
2196                 data_direction = UTP_DEVICE_TO_HOST;
2197                 *upiu_flags = UPIU_CMD_FLAGS_READ;
2198         } else if (cmd_dir == DMA_TO_DEVICE) {
2199                 data_direction = UTP_HOST_TO_DEVICE;
2200                 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2201         } else {
2202                 data_direction = UTP_NO_DATA_TRANSFER;
2203                 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2204         }
2205
2206         dword_0 = data_direction | (lrbp->command_type
2207                                 << UPIU_COMMAND_TYPE_OFFSET);
2208         if (lrbp->intr_cmd)
2209                 dword_0 |= UTP_REQ_DESC_INT_CMD;
2210
2211         /* Transfer request descriptor header fields */
2212         req_desc->header.dword_0 = cpu_to_le32(dword_0);
2213         /* dword_1 is reserved, hence it is set to 0 */
2214         req_desc->header.dword_1 = 0;
2215         /*
2216          * assigning invalid value for command status. Controller
2217          * updates OCS on command completion, with the command
2218          * status
2219          */
2220         req_desc->header.dword_2 =
2221                 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2222         /* dword_3 is reserved, hence it is set to 0 */
2223         req_desc->header.dword_3 = 0;
2224
2225         req_desc->prd_table_length = 0;
2226 }
2227
2228 /**
2229  * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2230  * for scsi commands
2231  * @lrbp: local reference block pointer
2232  * @upiu_flags: flags
2233  */
2234 static
2235 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2236 {
2237         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2238         unsigned short cdb_len;
2239
2240         /* command descriptor fields */
2241         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2242                                 UPIU_TRANSACTION_COMMAND, upiu_flags,
2243                                 lrbp->lun, lrbp->task_tag);
2244         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2245                                 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2246
2247         /* Total EHS length and Data segment length will be zero */
2248         ucd_req_ptr->header.dword_2 = 0;
2249
2250         ucd_req_ptr->sc.exp_data_transfer_len =
2251                 cpu_to_be32(lrbp->cmd->sdb.length);
2252
2253         cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2254         memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2255         memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2256
2257         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2258 }
2259
2260 /**
2261  * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2262  * for query requsts
2263  * @hba: UFS hba
2264  * @lrbp: local reference block pointer
2265  * @upiu_flags: flags
2266  */
2267 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2268                                 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2269 {
2270         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2271         struct ufs_query *query = &hba->dev_cmd.query;
2272         u16 len = be16_to_cpu(query->request.upiu_req.length);
2273
2274         /* Query request header */
2275         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2276                         UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2277                         lrbp->lun, lrbp->task_tag);
2278         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2279                         0, query->request.query_func, 0, 0);
2280
2281         /* Data segment length only need for WRITE_DESC */
2282         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2283                 ucd_req_ptr->header.dword_2 =
2284                         UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2285         else
2286                 ucd_req_ptr->header.dword_2 = 0;
2287
2288         /* Copy the Query Request buffer as is */
2289         memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2290                         QUERY_OSF_SIZE);
2291
2292         /* Copy the Descriptor */
2293         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2294                 memcpy(ucd_req_ptr + 1, query->descriptor, len);
2295
2296         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2297 }
2298
2299 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2300 {
2301         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2302
2303         memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2304
2305         /* command descriptor fields */
2306         ucd_req_ptr->header.dword_0 =
2307                 UPIU_HEADER_DWORD(
2308                         UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2309         /* clear rest of the fields of basic header */
2310         ucd_req_ptr->header.dword_1 = 0;
2311         ucd_req_ptr->header.dword_2 = 0;
2312
2313         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2314 }
2315
2316 /**
2317  * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2318  *                           for Device Management Purposes
2319  * @hba: per adapter instance
2320  * @lrbp: pointer to local reference block
2321  */
2322 static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2323 {
2324         u32 upiu_flags;
2325         int ret = 0;
2326
2327         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2328             (hba->ufs_version == UFSHCI_VERSION_11))
2329                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2330         else
2331                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2332
2333         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2334         if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2335                 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2336         else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2337                 ufshcd_prepare_utp_nop_upiu(lrbp);
2338         else
2339                 ret = -EINVAL;
2340
2341         return ret;
2342 }
2343
2344 /**
2345  * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2346  *                         for SCSI Purposes
2347  * @hba: per adapter instance
2348  * @lrbp: pointer to local reference block
2349  */
2350 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2351 {
2352         u32 upiu_flags;
2353         int ret = 0;
2354
2355         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2356             (hba->ufs_version == UFSHCI_VERSION_11))
2357                 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2358         else
2359                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2360
2361         if (likely(lrbp->cmd)) {
2362                 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2363                                                 lrbp->cmd->sc_data_direction);
2364                 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2365         } else {
2366                 ret = -EINVAL;
2367         }
2368
2369         return ret;
2370 }
2371
2372 /**
2373  * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2374  * @upiu_wlun_id: UPIU W-LUN id
2375  *
2376  * Returns SCSI W-LUN id
2377  */
2378 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2379 {
2380         return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2381 }
2382
2383 /**
2384  * ufshcd_queuecommand - main entry point for SCSI requests
2385  * @host: SCSI host pointer
2386  * @cmd: command from SCSI Midlayer
2387  *
2388  * Returns 0 for success, non-zero in case of failure
2389  */
2390 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2391 {
2392         struct ufshcd_lrb *lrbp;
2393         struct ufs_hba *hba;
2394         unsigned long flags;
2395         int tag;
2396         int err = 0;
2397
2398         hba = shost_priv(host);
2399
2400         tag = cmd->request->tag;
2401         if (!ufshcd_valid_tag(hba, tag)) {
2402                 dev_err(hba->dev,
2403                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2404                         __func__, tag, cmd, cmd->request);
2405                 BUG();
2406         }
2407
2408         if (!down_read_trylock(&hba->clk_scaling_lock))
2409                 return SCSI_MLQUEUE_HOST_BUSY;
2410
2411         spin_lock_irqsave(hba->host->host_lock, flags);
2412         switch (hba->ufshcd_state) {
2413         case UFSHCD_STATE_OPERATIONAL:
2414                 break;
2415         case UFSHCD_STATE_EH_SCHEDULED:
2416         case UFSHCD_STATE_RESET:
2417                 err = SCSI_MLQUEUE_HOST_BUSY;
2418                 goto out_unlock;
2419         case UFSHCD_STATE_ERROR:
2420                 set_host_byte(cmd, DID_ERROR);
2421                 cmd->scsi_done(cmd);
2422                 goto out_unlock;
2423         default:
2424                 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2425                                 __func__, hba->ufshcd_state);
2426                 set_host_byte(cmd, DID_BAD_TARGET);
2427                 cmd->scsi_done(cmd);
2428                 goto out_unlock;
2429         }
2430
2431         /* if error handling is in progress, don't issue commands */
2432         if (ufshcd_eh_in_progress(hba)) {
2433                 set_host_byte(cmd, DID_ERROR);
2434                 cmd->scsi_done(cmd);
2435                 goto out_unlock;
2436         }
2437         spin_unlock_irqrestore(hba->host->host_lock, flags);
2438
2439         hba->req_abort_count = 0;
2440
2441         /* acquire the tag to make sure device cmds don't use it */
2442         if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2443                 /*
2444                  * Dev manage command in progress, requeue the command.
2445                  * Requeuing the command helps in cases where the request *may*
2446                  * find different tag instead of waiting for dev manage command
2447                  * completion.
2448                  */
2449                 err = SCSI_MLQUEUE_HOST_BUSY;
2450                 goto out;
2451         }
2452
2453         err = ufshcd_hold(hba, true);
2454         if (err) {
2455                 err = SCSI_MLQUEUE_HOST_BUSY;
2456                 clear_bit_unlock(tag, &hba->lrb_in_use);
2457                 goto out;
2458         }
2459         WARN_ON(hba->clk_gating.state != CLKS_ON);
2460
2461         lrbp = &hba->lrb[tag];
2462
2463         WARN_ON(lrbp->cmd);
2464         lrbp->cmd = cmd;
2465         lrbp->sense_bufflen = UFS_SENSE_SIZE;
2466         lrbp->sense_buffer = cmd->sense_buffer;
2467         lrbp->task_tag = tag;
2468         lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2469         lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2470         lrbp->req_abort_skip = false;
2471
2472         ufshcd_comp_scsi_upiu(hba, lrbp);
2473
2474         err = ufshcd_map_sg(hba, lrbp);
2475         if (err) {
2476                 lrbp->cmd = NULL;
2477                 clear_bit_unlock(tag, &hba->lrb_in_use);
2478                 goto out;
2479         }
2480         /* Make sure descriptors are ready before ringing the doorbell */
2481         wmb();
2482
2483         /* issue command to the controller */
2484         spin_lock_irqsave(hba->host->host_lock, flags);
2485         ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2486         ufshcd_send_command(hba, tag);
2487 out_unlock:
2488         spin_unlock_irqrestore(hba->host->host_lock, flags);
2489 out:
2490         up_read(&hba->clk_scaling_lock);
2491         return err;
2492 }
2493
2494 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2495                 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2496 {
2497         lrbp->cmd = NULL;
2498         lrbp->sense_bufflen = 0;
2499         lrbp->sense_buffer = NULL;
2500         lrbp->task_tag = tag;
2501         lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2502         lrbp->intr_cmd = true; /* No interrupt aggregation */
2503         hba->dev_cmd.type = cmd_type;
2504
2505         return ufshcd_comp_devman_upiu(hba, lrbp);
2506 }
2507
2508 static int
2509 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2510 {
2511         int err = 0;
2512         unsigned long flags;
2513         u32 mask = 1 << tag;
2514
2515         /* clear outstanding transaction before retry */
2516         spin_lock_irqsave(hba->host->host_lock, flags);
2517         ufshcd_utrl_clear(hba, tag);
2518         spin_unlock_irqrestore(hba->host->host_lock, flags);
2519
2520         /*
2521          * wait for for h/w to clear corresponding bit in door-bell.
2522          * max. wait is 1 sec.
2523          */
2524         err = ufshcd_wait_for_register(hba,
2525                         REG_UTP_TRANSFER_REQ_DOOR_BELL,
2526                         mask, ~mask, 1000, 1000, true);
2527
2528         return err;
2529 }
2530
2531 static int
2532 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2533 {
2534         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2535
2536         /* Get the UPIU response */
2537         query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2538                                 UPIU_RSP_CODE_OFFSET;
2539         return query_res->response;
2540 }
2541
2542 /**
2543  * ufshcd_dev_cmd_completion() - handles device management command responses
2544  * @hba: per adapter instance
2545  * @lrbp: pointer to local reference block
2546  */
2547 static int
2548 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2549 {
2550         int resp;
2551         int err = 0;
2552
2553         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2554         resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2555
2556         switch (resp) {
2557         case UPIU_TRANSACTION_NOP_IN:
2558                 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2559                         err = -EINVAL;
2560                         dev_err(hba->dev, "%s: unexpected response %x\n",
2561                                         __func__, resp);
2562                 }
2563                 break;
2564         case UPIU_TRANSACTION_QUERY_RSP:
2565                 err = ufshcd_check_query_response(hba, lrbp);
2566                 if (!err)
2567                         err = ufshcd_copy_query_response(hba, lrbp);
2568                 break;
2569         case UPIU_TRANSACTION_REJECT_UPIU:
2570                 /* TODO: handle Reject UPIU Response */
2571                 err = -EPERM;
2572                 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2573                                 __func__);
2574                 break;
2575         default:
2576                 err = -EINVAL;
2577                 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2578                                 __func__, resp);
2579                 break;
2580         }
2581
2582         return err;
2583 }
2584
2585 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2586                 struct ufshcd_lrb *lrbp, int max_timeout)
2587 {
2588         int err = 0;
2589         unsigned long time_left;
2590         unsigned long flags;
2591
2592         time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2593                         msecs_to_jiffies(max_timeout));
2594
2595         /* Make sure descriptors are ready before ringing the doorbell */
2596         wmb();
2597         spin_lock_irqsave(hba->host->host_lock, flags);
2598         hba->dev_cmd.complete = NULL;
2599         if (likely(time_left)) {
2600                 err = ufshcd_get_tr_ocs(lrbp);
2601                 if (!err)
2602                         err = ufshcd_dev_cmd_completion(hba, lrbp);
2603         }
2604         spin_unlock_irqrestore(hba->host->host_lock, flags);
2605
2606         if (!time_left) {
2607                 err = -ETIMEDOUT;
2608                 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2609                         __func__, lrbp->task_tag);
2610                 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2611                         /* successfully cleared the command, retry if needed */
2612                         err = -EAGAIN;
2613                 /*
2614                  * in case of an error, after clearing the doorbell,
2615                  * we also need to clear the outstanding_request
2616                  * field in hba
2617                  */
2618                 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2619         }
2620
2621         return err;
2622 }
2623
2624 /**
2625  * ufshcd_get_dev_cmd_tag - Get device management command tag
2626  * @hba: per-adapter instance
2627  * @tag_out: pointer to variable with available slot value
2628  *
2629  * Get a free slot and lock it until device management command
2630  * completes.
2631  *
2632  * Returns false if free slot is unavailable for locking, else
2633  * return true with tag value in @tag.
2634  */
2635 static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2636 {
2637         int tag;
2638         bool ret = false;
2639         unsigned long tmp;
2640
2641         if (!tag_out)
2642                 goto out;
2643
2644         do {
2645                 tmp = ~hba->lrb_in_use;
2646                 tag = find_last_bit(&tmp, hba->nutrs);
2647                 if (tag >= hba->nutrs)
2648                         goto out;
2649         } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2650
2651         *tag_out = tag;
2652         ret = true;
2653 out:
2654         return ret;
2655 }
2656
2657 static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2658 {
2659         clear_bit_unlock(tag, &hba->lrb_in_use);
2660 }
2661
2662 /**
2663  * ufshcd_exec_dev_cmd - API for sending device management requests
2664  * @hba: UFS hba
2665  * @cmd_type: specifies the type (NOP, Query...)
2666  * @timeout: time in seconds
2667  *
2668  * NOTE: Since there is only one available tag for device management commands,
2669  * it is expected you hold the hba->dev_cmd.lock mutex.
2670  */
2671 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2672                 enum dev_cmd_type cmd_type, int timeout)
2673 {
2674         struct ufshcd_lrb *lrbp;
2675         int err;
2676         int tag;
2677         struct completion wait;
2678         unsigned long flags;
2679
2680         down_read(&hba->clk_scaling_lock);
2681
2682         /*
2683          * Get free slot, sleep if slots are unavailable.
2684          * Even though we use wait_event() which sleeps indefinitely,
2685          * the maximum wait time is bounded by SCSI request timeout.
2686          */
2687         wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2688
2689         init_completion(&wait);
2690         lrbp = &hba->lrb[tag];
2691         WARN_ON(lrbp->cmd);
2692         err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2693         if (unlikely(err))
2694                 goto out_put_tag;
2695
2696         hba->dev_cmd.complete = &wait;
2697
2698         ufshcd_add_query_upiu_trace(hba, tag, "query_send");
2699         /* Make sure descriptors are ready before ringing the doorbell */
2700         wmb();
2701         spin_lock_irqsave(hba->host->host_lock, flags);
2702         ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2703         ufshcd_send_command(hba, tag);
2704         spin_unlock_irqrestore(hba->host->host_lock, flags);
2705
2706         err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2707
2708         ufshcd_add_query_upiu_trace(hba, tag,
2709                         err ? "query_complete_err" : "query_complete");
2710
2711 out_put_tag:
2712         ufshcd_put_dev_cmd_tag(hba, tag);
2713         wake_up(&hba->dev_cmd.tag_wq);
2714         up_read(&hba->clk_scaling_lock);
2715         return err;
2716 }
2717
2718 /**
2719  * ufshcd_init_query() - init the query response and request parameters
2720  * @hba: per-adapter instance
2721  * @request: address of the request pointer to be initialized
2722  * @response: address of the response pointer to be initialized
2723  * @opcode: operation to perform
2724  * @idn: flag idn to access
2725  * @index: LU number to access
2726  * @selector: query/flag/descriptor further identification
2727  */
2728 static inline void ufshcd_init_query(struct ufs_hba *hba,
2729                 struct ufs_query_req **request, struct ufs_query_res **response,
2730                 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2731 {
2732         *request = &hba->dev_cmd.query.request;
2733         *response = &hba->dev_cmd.query.response;
2734         memset(*request, 0, sizeof(struct ufs_query_req));
2735         memset(*response, 0, sizeof(struct ufs_query_res));
2736         (*request)->upiu_req.opcode = opcode;
2737         (*request)->upiu_req.idn = idn;
2738         (*request)->upiu_req.index = index;
2739         (*request)->upiu_req.selector = selector;
2740 }
2741
2742 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2743         enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2744 {
2745         int ret;
2746         int retries;
2747
2748         for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2749                 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2750                 if (ret)
2751                         dev_dbg(hba->dev,
2752                                 "%s: failed with error %d, retries %d\n",
2753                                 __func__, ret, retries);
2754                 else
2755                         break;
2756         }
2757
2758         if (ret)
2759                 dev_err(hba->dev,
2760                         "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2761                         __func__, opcode, idn, ret, retries);
2762         return ret;
2763 }
2764
2765 /**
2766  * ufshcd_query_flag() - API function for sending flag query requests
2767  * @hba: per-adapter instance
2768  * @opcode: flag query to perform
2769  * @idn: flag idn to access
2770  * @flag_res: the flag value after the query request completes
2771  *
2772  * Returns 0 for success, non-zero in case of failure
2773  */
2774 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
2775                         enum flag_idn idn, bool *flag_res)
2776 {
2777         struct ufs_query_req *request = NULL;
2778         struct ufs_query_res *response = NULL;
2779         int err, index = 0, selector = 0;
2780         int timeout = QUERY_REQ_TIMEOUT;
2781
2782         BUG_ON(!hba);
2783
2784         ufshcd_hold(hba, false);
2785         mutex_lock(&hba->dev_cmd.lock);
2786         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2787                         selector);
2788
2789         switch (opcode) {
2790         case UPIU_QUERY_OPCODE_SET_FLAG:
2791         case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2792         case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2793                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2794                 break;
2795         case UPIU_QUERY_OPCODE_READ_FLAG:
2796                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2797                 if (!flag_res) {
2798                         /* No dummy reads */
2799                         dev_err(hba->dev, "%s: Invalid argument for read request\n",
2800                                         __func__);
2801                         err = -EINVAL;
2802                         goto out_unlock;
2803                 }
2804                 break;
2805         default:
2806                 dev_err(hba->dev,
2807                         "%s: Expected query flag opcode but got = %d\n",
2808                         __func__, opcode);
2809                 err = -EINVAL;
2810                 goto out_unlock;
2811         }
2812
2813         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
2814
2815         if (err) {
2816                 dev_err(hba->dev,
2817                         "%s: Sending flag query for idn %d failed, err = %d\n",
2818                         __func__, idn, err);
2819                 goto out_unlock;
2820         }
2821
2822         if (flag_res)
2823                 *flag_res = (be32_to_cpu(response->upiu_res.value) &
2824                                 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2825
2826 out_unlock:
2827         mutex_unlock(&hba->dev_cmd.lock);
2828         ufshcd_release(hba);
2829         return err;
2830 }
2831
2832 /**
2833  * ufshcd_query_attr - API function for sending attribute requests
2834  * @hba: per-adapter instance
2835  * @opcode: attribute opcode
2836  * @idn: attribute idn to access
2837  * @index: index field
2838  * @selector: selector field
2839  * @attr_val: the attribute value after the query request completes
2840  *
2841  * Returns 0 for success, non-zero in case of failure
2842 */
2843 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2844                       enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
2845 {
2846         struct ufs_query_req *request = NULL;
2847         struct ufs_query_res *response = NULL;
2848         int err;
2849
2850         BUG_ON(!hba);
2851
2852         ufshcd_hold(hba, false);
2853         if (!attr_val) {
2854                 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2855                                 __func__, opcode);
2856                 err = -EINVAL;
2857                 goto out;
2858         }
2859
2860         mutex_lock(&hba->dev_cmd.lock);
2861         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2862                         selector);
2863
2864         switch (opcode) {
2865         case UPIU_QUERY_OPCODE_WRITE_ATTR:
2866                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2867                 request->upiu_req.value = cpu_to_be32(*attr_val);
2868                 break;
2869         case UPIU_QUERY_OPCODE_READ_ATTR:
2870                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2871                 break;
2872         default:
2873                 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2874                                 __func__, opcode);
2875                 err = -EINVAL;
2876                 goto out_unlock;
2877         }
2878
2879         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2880
2881         if (err) {
2882                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2883                                 __func__, opcode, idn, index, err);
2884                 goto out_unlock;
2885         }
2886
2887         *attr_val = be32_to_cpu(response->upiu_res.value);
2888
2889 out_unlock:
2890         mutex_unlock(&hba->dev_cmd.lock);
2891 out:
2892         ufshcd_release(hba);
2893         return err;
2894 }
2895
2896 /**
2897  * ufshcd_query_attr_retry() - API function for sending query
2898  * attribute with retries
2899  * @hba: per-adapter instance
2900  * @opcode: attribute opcode
2901  * @idn: attribute idn to access
2902  * @index: index field
2903  * @selector: selector field
2904  * @attr_val: the attribute value after the query request
2905  * completes
2906  *
2907  * Returns 0 for success, non-zero in case of failure
2908 */
2909 static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2910         enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2911         u32 *attr_val)
2912 {
2913         int ret = 0;
2914         u32 retries;
2915
2916          for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2917                 ret = ufshcd_query_attr(hba, opcode, idn, index,
2918                                                 selector, attr_val);
2919                 if (ret)
2920                         dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2921                                 __func__, ret, retries);
2922                 else
2923                         break;
2924         }
2925
2926         if (ret)
2927                 dev_err(hba->dev,
2928                         "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2929                         __func__, idn, ret, QUERY_REQ_RETRIES);
2930         return ret;
2931 }
2932
2933 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
2934                         enum query_opcode opcode, enum desc_idn idn, u8 index,
2935                         u8 selector, u8 *desc_buf, int *buf_len)
2936 {
2937         struct ufs_query_req *request = NULL;
2938         struct ufs_query_res *response = NULL;
2939         int err;
2940
2941         BUG_ON(!hba);
2942
2943         ufshcd_hold(hba, false);
2944         if (!desc_buf) {
2945                 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2946                                 __func__, opcode);
2947                 err = -EINVAL;
2948                 goto out;
2949         }
2950
2951         if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
2952                 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2953                                 __func__, *buf_len);
2954                 err = -EINVAL;
2955                 goto out;
2956         }
2957
2958         mutex_lock(&hba->dev_cmd.lock);
2959         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2960                         selector);
2961         hba->dev_cmd.query.descriptor = desc_buf;
2962         request->upiu_req.length = cpu_to_be16(*buf_len);
2963
2964         switch (opcode) {
2965         case UPIU_QUERY_OPCODE_WRITE_DESC:
2966                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2967                 break;
2968         case UPIU_QUERY_OPCODE_READ_DESC:
2969                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2970                 break;
2971         default:
2972                 dev_err(hba->dev,
2973                                 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2974                                 __func__, opcode);
2975                 err = -EINVAL;
2976                 goto out_unlock;
2977         }
2978
2979         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2980
2981         if (err) {
2982                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2983                                 __func__, opcode, idn, index, err);
2984                 goto out_unlock;
2985         }
2986
2987         hba->dev_cmd.query.descriptor = NULL;
2988         *buf_len = be16_to_cpu(response->upiu_res.length);
2989
2990 out_unlock:
2991         mutex_unlock(&hba->dev_cmd.lock);
2992 out:
2993         ufshcd_release(hba);
2994         return err;
2995 }
2996
2997 /**
2998  * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2999  * @hba: per-adapter instance
3000  * @opcode: attribute opcode
3001  * @idn: attribute idn to access
3002  * @index: index field
3003  * @selector: selector field
3004  * @desc_buf: the buffer that contains the descriptor
3005  * @buf_len: length parameter passed to the device
3006  *
3007  * Returns 0 for success, non-zero in case of failure.
3008  * The buf_len parameter will contain, on return, the length parameter
3009  * received on the response.
3010  */
3011 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3012                                   enum query_opcode opcode,
3013                                   enum desc_idn idn, u8 index,
3014                                   u8 selector,
3015                                   u8 *desc_buf, int *buf_len)
3016 {
3017         int err;
3018         int retries;
3019
3020         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3021                 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3022                                                 selector, desc_buf, buf_len);
3023                 if (!err || err == -EINVAL)
3024                         break;
3025         }
3026
3027         return err;
3028 }
3029
3030 /**
3031  * ufshcd_read_desc_length - read the specified descriptor length from header
3032  * @hba: Pointer to adapter instance
3033  * @desc_id: descriptor idn value
3034  * @desc_index: descriptor index
3035  * @desc_length: pointer to variable to read the length of descriptor
3036  *
3037  * Return 0 in case of success, non-zero otherwise
3038  */
3039 static int ufshcd_read_desc_length(struct ufs_hba *hba,
3040         enum desc_idn desc_id,
3041         int desc_index,
3042         int *desc_length)
3043 {
3044         int ret;
3045         u8 header[QUERY_DESC_HDR_SIZE];
3046         int header_len = QUERY_DESC_HDR_SIZE;
3047
3048         if (desc_id >= QUERY_DESC_IDN_MAX)
3049                 return -EINVAL;
3050
3051         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3052                                         desc_id, desc_index, 0, header,
3053                                         &header_len);
3054
3055         if (ret) {
3056                 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3057                         __func__, desc_id);
3058                 return ret;
3059         } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3060                 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3061                         __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3062                         desc_id);
3063                 ret = -EINVAL;
3064         }
3065
3066         *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3067         return ret;
3068
3069 }
3070
3071 /**
3072  * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3073  * @hba: Pointer to adapter instance
3074  * @desc_id: descriptor idn value
3075  * @desc_len: mapped desc length (out)
3076  *
3077  * Return 0 in case of success, non-zero otherwise
3078  */
3079 int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3080         enum desc_idn desc_id, int *desc_len)
3081 {
3082         switch (desc_id) {
3083         case QUERY_DESC_IDN_DEVICE:
3084                 *desc_len = hba->desc_size.dev_desc;
3085                 break;
3086         case QUERY_DESC_IDN_POWER:
3087                 *desc_len = hba->desc_size.pwr_desc;
3088                 break;
3089         case QUERY_DESC_IDN_GEOMETRY:
3090                 *desc_len = hba->desc_size.geom_desc;
3091                 break;
3092         case QUERY_DESC_IDN_CONFIGURATION:
3093                 *desc_len = hba->desc_size.conf_desc;
3094                 break;
3095         case QUERY_DESC_IDN_UNIT:
3096                 *desc_len = hba->desc_size.unit_desc;
3097                 break;
3098         case QUERY_DESC_IDN_INTERCONNECT:
3099                 *desc_len = hba->desc_size.interc_desc;
3100                 break;
3101         case QUERY_DESC_IDN_STRING:
3102                 *desc_len = QUERY_DESC_MAX_SIZE;
3103                 break;
3104         case QUERY_DESC_IDN_HEALTH:
3105                 *desc_len = hba->desc_size.hlth_desc;
3106                 break;
3107         case QUERY_DESC_IDN_RFU_0:
3108         case QUERY_DESC_IDN_RFU_1:
3109                 *desc_len = 0;
3110                 break;
3111         default:
3112                 *desc_len = 0;
3113                 return -EINVAL;
3114         }
3115         return 0;
3116 }
3117 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3118
3119 /**
3120  * ufshcd_read_desc_param - read the specified descriptor parameter
3121  * @hba: Pointer to adapter instance
3122  * @desc_id: descriptor idn value
3123  * @desc_index: descriptor index
3124  * @param_offset: offset of the parameter to read
3125  * @param_read_buf: pointer to buffer where parameter would be read
3126  * @param_size: sizeof(param_read_buf)
3127  *
3128  * Return 0 in case of success, non-zero otherwise
3129  */
3130 int ufshcd_read_desc_param(struct ufs_hba *hba,
3131                            enum desc_idn desc_id,
3132                            int desc_index,
3133                            u8 param_offset,
3134                            u8 *param_read_buf,
3135                            u8 param_size)
3136 {
3137         int ret;
3138         u8 *desc_buf;
3139         int buff_len;
3140         bool is_kmalloc = true;
3141
3142         /* Safety check */
3143         if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3144                 return -EINVAL;
3145
3146         /* Get the max length of descriptor from structure filled up at probe
3147          * time.
3148          */
3149         ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3150
3151         /* Sanity checks */
3152         if (ret || !buff_len) {
3153                 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3154                         __func__);
3155                 return ret;
3156         }
3157
3158         /* Check whether we need temp memory */
3159         if (param_offset != 0 || param_size < buff_len) {
3160                 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3161                 if (!desc_buf)
3162                         return -ENOMEM;
3163         } else {
3164                 desc_buf = param_read_buf;
3165                 is_kmalloc = false;
3166         }
3167
3168         /* Request for full descriptor */
3169         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3170                                         desc_id, desc_index, 0,
3171                                         desc_buf, &buff_len);
3172
3173         if (ret) {
3174                 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3175                         __func__, desc_id, desc_index, param_offset, ret);
3176                 goto out;
3177         }
3178
3179         /* Sanity check */
3180         if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3181                 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3182                         __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3183                 ret = -EINVAL;
3184                 goto out;
3185         }
3186
3187         /* Check wherher we will not copy more data, than available */
3188         if (is_kmalloc && param_size > buff_len)
3189                 param_size = buff_len;
3190
3191         if (is_kmalloc)
3192                 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3193 out:
3194         if (is_kmalloc)
3195                 kfree(desc_buf);
3196         return ret;
3197 }
3198
3199 static inline int ufshcd_read_desc(struct ufs_hba *hba,
3200                                    enum desc_idn desc_id,
3201                                    int desc_index,
3202                                    u8 *buf,
3203                                    u32 size)
3204 {
3205         return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3206 }
3207
3208 static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3209                                          u8 *buf,
3210                                          u32 size)
3211 {
3212         return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
3213 }
3214
3215 static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
3216 {
3217         return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3218 }
3219
3220 /**
3221  * ufshcd_read_string_desc - read string descriptor
3222  * @hba: pointer to adapter instance
3223  * @desc_index: descriptor index
3224  * @buf: pointer to buffer where descriptor would be read
3225  * @size: size of buf
3226  * @ascii: if true convert from unicode to ascii characters
3227  *
3228  * Return 0 in case of success, non-zero otherwise
3229  */
3230 int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
3231                             u8 *buf, u32 size, bool ascii)
3232 {
3233         int err = 0;
3234
3235         err = ufshcd_read_desc(hba,
3236                                 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3237
3238         if (err) {
3239                 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3240                         __func__, QUERY_REQ_RETRIES, err);
3241                 goto out;
3242         }
3243
3244         if (ascii) {
3245                 int desc_len;
3246                 int ascii_len;
3247                 int i;
3248                 char *buff_ascii;
3249
3250                 desc_len = buf[0];
3251                 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3252                 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3253                 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3254                         dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3255                                         __func__);
3256                         err = -ENOMEM;
3257                         goto out;
3258                 }
3259
3260                 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3261                 if (!buff_ascii) {
3262                         err = -ENOMEM;
3263                         goto out;
3264                 }
3265
3266                 /*
3267                  * the descriptor contains string in UTF16 format
3268                  * we need to convert to utf-8 so it can be displayed
3269                  */
3270                 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3271                                 desc_len - QUERY_DESC_HDR_SIZE,
3272                                 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3273
3274                 /* replace non-printable or non-ASCII characters with spaces */
3275                 for (i = 0; i < ascii_len; i++)
3276                         ufshcd_remove_non_printable(&buff_ascii[i]);
3277
3278                 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3279                                 size - QUERY_DESC_HDR_SIZE);
3280                 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3281                 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
3282                 kfree(buff_ascii);
3283         }
3284 out:
3285         return err;
3286 }
3287
3288 /**
3289  * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3290  * @hba: Pointer to adapter instance
3291  * @lun: lun id
3292  * @param_offset: offset of the parameter to read
3293  * @param_read_buf: pointer to buffer where parameter would be read
3294  * @param_size: sizeof(param_read_buf)
3295  *
3296  * Return 0 in case of success, non-zero otherwise
3297  */
3298 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3299                                               int lun,
3300                                               enum unit_desc_param param_offset,
3301                                               u8 *param_read_buf,
3302                                               u32 param_size)
3303 {
3304         /*
3305          * Unit descriptors are only available for general purpose LUs (LUN id
3306          * from 0 to 7) and RPMB Well known LU.
3307          */
3308         if (!ufs_is_valid_unit_desc_lun(lun))
3309                 return -EOPNOTSUPP;
3310
3311         return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3312                                       param_offset, param_read_buf, param_size);
3313 }
3314
3315 /**
3316  * ufshcd_memory_alloc - allocate memory for host memory space data structures
3317  * @hba: per adapter instance
3318  *
3319  * 1. Allocate DMA memory for Command Descriptor array
3320  *      Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3321  * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3322  * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3323  *      (UTMRDL)
3324  * 4. Allocate memory for local reference block(lrb).
3325  *
3326  * Returns 0 for success, non-zero in case of failure
3327  */
3328 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3329 {
3330         size_t utmrdl_size, utrdl_size, ucdl_size;
3331
3332         /* Allocate memory for UTP command descriptors */
3333         ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3334         hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3335                                                   ucdl_size,
3336                                                   &hba->ucdl_dma_addr,
3337                                                   GFP_KERNEL);
3338
3339         /*
3340          * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3341          * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3342          * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3343          * be aligned to 128 bytes as well
3344          */
3345         if (!hba->ucdl_base_addr ||
3346             WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3347                 dev_err(hba->dev,
3348                         "Command Descriptor Memory allocation failed\n");
3349                 goto out;
3350         }
3351
3352         /*
3353          * Allocate memory for UTP Transfer descriptors
3354          * UFSHCI requires 1024 byte alignment of UTRD
3355          */
3356         utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3357         hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3358                                                    utrdl_size,
3359                                                    &hba->utrdl_dma_addr,
3360                                                    GFP_KERNEL);
3361         if (!hba->utrdl_base_addr ||
3362             WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3363                 dev_err(hba->dev,
3364                         "Transfer Descriptor Memory allocation failed\n");
3365                 goto out;
3366         }
3367
3368         /*
3369          * Allocate memory for UTP Task Management descriptors
3370          * UFSHCI requires 1024 byte alignment of UTMRD
3371          */
3372         utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3373         hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3374                                                     utmrdl_size,
3375                                                     &hba->utmrdl_dma_addr,
3376                                                     GFP_KERNEL);
3377         if (!hba->utmrdl_base_addr ||
3378             WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3379                 dev_err(hba->dev,
3380                 "Task Management Descriptor Memory allocation failed\n");
3381                 goto out;
3382         }
3383
3384         /* Allocate memory for local reference block */
3385         hba->lrb = devm_kcalloc(hba->dev,
3386                                 hba->nutrs, sizeof(struct ufshcd_lrb),
3387                                 GFP_KERNEL);
3388         if (!hba->lrb) {
3389                 dev_err(hba->dev, "LRB Memory allocation failed\n");
3390                 goto out;
3391         }
3392         return 0;
3393 out:
3394         return -ENOMEM;
3395 }
3396
3397 /**
3398  * ufshcd_host_memory_configure - configure local reference block with
3399  *                              memory offsets
3400  * @hba: per adapter instance
3401  *
3402  * Configure Host memory space
3403  * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3404  * address.
3405  * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3406  * and PRDT offset.
3407  * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3408  * into local reference block.
3409  */
3410 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3411 {
3412         struct utp_transfer_cmd_desc *cmd_descp;
3413         struct utp_transfer_req_desc *utrdlp;
3414         dma_addr_t cmd_desc_dma_addr;
3415         dma_addr_t cmd_desc_element_addr;
3416         u16 response_offset;
3417         u16 prdt_offset;
3418         int cmd_desc_size;
3419         int i;
3420
3421         utrdlp = hba->utrdl_base_addr;
3422         cmd_descp = hba->ucdl_base_addr;
3423
3424         response_offset =
3425                 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3426         prdt_offset =
3427                 offsetof(struct utp_transfer_cmd_desc, prd_table);
3428
3429         cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3430         cmd_desc_dma_addr = hba->ucdl_dma_addr;
3431
3432         for (i = 0; i < hba->nutrs; i++) {
3433                 /* Configure UTRD with command descriptor base address */
3434                 cmd_desc_element_addr =
3435                                 (cmd_desc_dma_addr + (cmd_desc_size * i));
3436                 utrdlp[i].command_desc_base_addr_lo =
3437                                 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3438                 utrdlp[i].command_desc_base_addr_hi =
3439                                 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3440
3441                 /* Response upiu and prdt offset should be in double words */
3442                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3443                         utrdlp[i].response_upiu_offset =
3444                                 cpu_to_le16(response_offset);
3445                         utrdlp[i].prd_table_offset =
3446                                 cpu_to_le16(prdt_offset);
3447                         utrdlp[i].response_upiu_length =
3448                                 cpu_to_le16(ALIGNED_UPIU_SIZE);
3449                 } else {
3450                         utrdlp[i].response_upiu_offset =
3451                                 cpu_to_le16((response_offset >> 2));
3452                         utrdlp[i].prd_table_offset =
3453                                 cpu_to_le16((prdt_offset >> 2));
3454                         utrdlp[i].response_upiu_length =
3455                                 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3456                 }
3457
3458                 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
3459                 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3460                                 (i * sizeof(struct utp_transfer_req_desc));
3461                 hba->lrb[i].ucd_req_ptr =
3462                         (struct utp_upiu_req *)(cmd_descp + i);
3463                 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
3464                 hba->lrb[i].ucd_rsp_ptr =
3465                         (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
3466                 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3467                                 response_offset;
3468                 hba->lrb[i].ucd_prdt_ptr =
3469                         (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
3470                 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3471                                 prdt_offset;
3472         }
3473 }
3474
3475 /**
3476  * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3477  * @hba: per adapter instance
3478  *
3479  * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3480  * in order to initialize the Unipro link startup procedure.
3481  * Once the Unipro links are up, the device connected to the controller
3482  * is detected.
3483  *
3484  * Returns 0 on success, non-zero value on failure
3485  */
3486 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3487 {
3488         struct uic_command uic_cmd = {0};
3489         int ret;
3490
3491         uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3492
3493         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3494         if (ret)
3495                 dev_dbg(hba->dev,
3496                         "dme-link-startup: error code %d\n", ret);
3497         return ret;
3498 }
3499 /**
3500  * ufshcd_dme_reset - UIC command for DME_RESET
3501  * @hba: per adapter instance
3502  *
3503  * DME_RESET command is issued in order to reset UniPro stack.
3504  * This function now deal with cold reset.
3505  *
3506  * Returns 0 on success, non-zero value on failure
3507  */
3508 static int ufshcd_dme_reset(struct ufs_hba *hba)
3509 {
3510         struct uic_command uic_cmd = {0};
3511         int ret;
3512
3513         uic_cmd.command = UIC_CMD_DME_RESET;
3514
3515         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3516         if (ret)
3517                 dev_err(hba->dev,
3518                         "dme-reset: error code %d\n", ret);
3519
3520         return ret;
3521 }
3522
3523 /**
3524  * ufshcd_dme_enable - UIC command for DME_ENABLE
3525  * @hba: per adapter instance
3526  *
3527  * DME_ENABLE command is issued in order to enable UniPro stack.
3528  *
3529  * Returns 0 on success, non-zero value on failure
3530  */
3531 static int ufshcd_dme_enable(struct ufs_hba *hba)
3532 {
3533         struct uic_command uic_cmd = {0};
3534         int ret;
3535
3536         uic_cmd.command = UIC_CMD_DME_ENABLE;
3537
3538         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3539         if (ret)
3540                 dev_err(hba->dev,
3541                         "dme-reset: error code %d\n", ret);
3542
3543         return ret;
3544 }
3545
3546 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3547 {
3548         #define MIN_DELAY_BEFORE_DME_CMDS_US    1000
3549         unsigned long min_sleep_time_us;
3550
3551         if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3552                 return;
3553
3554         /*
3555          * last_dme_cmd_tstamp will be 0 only for 1st call to
3556          * this function
3557          */
3558         if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3559                 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3560         } else {
3561                 unsigned long delta =
3562                         (unsigned long) ktime_to_us(
3563                                 ktime_sub(ktime_get(),
3564                                 hba->last_dme_cmd_tstamp));
3565
3566                 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3567                         min_sleep_time_us =
3568                                 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3569                 else
3570                         return; /* no more delay required */
3571         }
3572
3573         /* allow sleep for extra 50us if needed */
3574         usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3575 }
3576
3577 /**
3578  * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3579  * @hba: per adapter instance
3580  * @attr_sel: uic command argument1
3581  * @attr_set: attribute set type as uic command argument2
3582  * @mib_val: setting value as uic command argument3
3583  * @peer: indicate whether peer or local
3584  *
3585  * Returns 0 on success, non-zero value on failure
3586  */
3587 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3588                         u8 attr_set, u32 mib_val, u8 peer)
3589 {
3590         struct uic_command uic_cmd = {0};
3591         static const char *const action[] = {
3592                 "dme-set",
3593                 "dme-peer-set"
3594         };
3595         const char *set = action[!!peer];
3596         int ret;
3597         int retries = UFS_UIC_COMMAND_RETRIES;
3598
3599         uic_cmd.command = peer ?
3600                 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3601         uic_cmd.argument1 = attr_sel;
3602         uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3603         uic_cmd.argument3 = mib_val;
3604
3605         do {
3606                 /* for peer attributes we retry upon failure */
3607                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3608                 if (ret)
3609                         dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3610                                 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3611         } while (ret && peer && --retries);
3612
3613         if (ret)
3614                 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3615                         set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3616                         UFS_UIC_COMMAND_RETRIES - retries);
3617
3618         return ret;
3619 }
3620 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3621
3622 /**
3623  * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3624  * @hba: per adapter instance
3625  * @attr_sel: uic command argument1
3626  * @mib_val: the value of the attribute as returned by the UIC command
3627  * @peer: indicate whether peer or local
3628  *
3629  * Returns 0 on success, non-zero value on failure
3630  */
3631 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3632                         u32 *mib_val, u8 peer)
3633 {
3634         struct uic_command uic_cmd = {0};
3635         static const char *const action[] = {
3636                 "dme-get",
3637                 "dme-peer-get"
3638         };
3639         const char *get = action[!!peer];
3640         int ret;
3641         int retries = UFS_UIC_COMMAND_RETRIES;
3642         struct ufs_pa_layer_attr orig_pwr_info;
3643         struct ufs_pa_layer_attr temp_pwr_info;
3644         bool pwr_mode_change = false;
3645
3646         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3647                 orig_pwr_info = hba->pwr_info;
3648                 temp_pwr_info = orig_pwr_info;
3649
3650                 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3651                     orig_pwr_info.pwr_rx == FAST_MODE) {
3652                         temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3653                         temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3654                         pwr_mode_change = true;
3655                 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3656                     orig_pwr_info.pwr_rx == SLOW_MODE) {
3657                         temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3658                         temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3659                         pwr_mode_change = true;
3660                 }
3661                 if (pwr_mode_change) {
3662                         ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3663                         if (ret)
3664                                 goto out;
3665                 }
3666         }
3667
3668         uic_cmd.command = peer ?
3669                 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3670         uic_cmd.argument1 = attr_sel;
3671
3672         do {
3673                 /* for peer attributes we retry upon failure */
3674                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3675                 if (ret)
3676                         dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3677                                 get, UIC_GET_ATTR_ID(attr_sel), ret);
3678         } while (ret && peer && --retries);
3679
3680         if (ret)
3681                 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3682                         get, UIC_GET_ATTR_ID(attr_sel),
3683                         UFS_UIC_COMMAND_RETRIES - retries);
3684
3685         if (mib_val && !ret)
3686                 *mib_val = uic_cmd.argument3;
3687
3688         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3689             && pwr_mode_change)
3690                 ufshcd_change_power_mode(hba, &orig_pwr_info);
3691 out:
3692         return ret;
3693 }
3694 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3695
3696 /**
3697  * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3698  * state) and waits for it to take effect.
3699  *
3700  * @hba: per adapter instance
3701  * @cmd: UIC command to execute
3702  *
3703  * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3704  * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3705  * and device UniPro link and hence it's final completion would be indicated by
3706  * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3707  * addition to normal UIC command completion Status (UCCS). This function only
3708  * returns after the relevant status bits indicate the completion.
3709  *
3710  * Returns 0 on success, non-zero value on failure
3711  */
3712 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3713 {
3714         struct completion uic_async_done;
3715         unsigned long flags;
3716         u8 status;
3717         int ret;
3718         bool reenable_intr = false;
3719
3720         mutex_lock(&hba->uic_cmd_mutex);
3721         init_completion(&uic_async_done);
3722         ufshcd_add_delay_before_dme_cmd(hba);
3723
3724         spin_lock_irqsave(hba->host->host_lock, flags);
3725         hba->uic_async_done = &uic_async_done;
3726         if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3727                 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3728                 /*
3729                  * Make sure UIC command completion interrupt is disabled before
3730                  * issuing UIC command.
3731                  */
3732                 wmb();
3733                 reenable_intr = true;
3734         }
3735         ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3736         spin_unlock_irqrestore(hba->host->host_lock, flags);
3737         if (ret) {
3738                 dev_err(hba->dev,
3739                         "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3740                         cmd->command, cmd->argument3, ret);
3741                 goto out;
3742         }
3743
3744         if (!wait_for_completion_timeout(hba->uic_async_done,
3745                                          msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3746                 dev_err(hba->dev,
3747                         "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3748                         cmd->command, cmd->argument3);
3749                 ret = -ETIMEDOUT;
3750                 goto out;
3751         }
3752
3753         status = ufshcd_get_upmcrs(hba);
3754         if (status != PWR_LOCAL) {
3755                 dev_err(hba->dev,
3756                         "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
3757                         cmd->command, status);
3758                 ret = (status != PWR_OK) ? status : -1;
3759         }
3760 out:
3761         if (ret) {
3762                 ufshcd_print_host_state(hba);
3763                 ufshcd_print_pwr_info(hba);
3764                 ufshcd_print_host_regs(hba);
3765         }
3766
3767         spin_lock_irqsave(hba->host->host_lock, flags);
3768         hba->active_uic_cmd = NULL;
3769         hba->uic_async_done = NULL;
3770         if (reenable_intr)
3771                 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
3772         spin_unlock_irqrestore(hba->host->host_lock, flags);
3773         mutex_unlock(&hba->uic_cmd_mutex);
3774
3775         return ret;
3776 }
3777
3778 /**
3779  * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3780  *                              using DME_SET primitives.
3781  * @hba: per adapter instance
3782  * @mode: powr mode value
3783  *
3784  * Returns 0 on success, non-zero value on failure
3785  */
3786 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
3787 {
3788         struct uic_command uic_cmd = {0};
3789         int ret;
3790
3791         if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3792                 ret = ufshcd_dme_set(hba,
3793                                 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3794                 if (ret) {
3795                         dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3796                                                 __func__, ret);
3797                         goto out;
3798                 }
3799         }
3800
3801         uic_cmd.command = UIC_CMD_DME_SET;
3802         uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3803         uic_cmd.argument3 = mode;
3804         ufshcd_hold(hba, false);
3805         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3806         ufshcd_release(hba);
3807
3808 out:
3809         return ret;
3810 }
3811
3812 static int ufshcd_link_recovery(struct ufs_hba *hba)
3813 {
3814         int ret;
3815         unsigned long flags;
3816
3817         spin_lock_irqsave(hba->host->host_lock, flags);
3818         hba->ufshcd_state = UFSHCD_STATE_RESET;
3819         ufshcd_set_eh_in_progress(hba);
3820         spin_unlock_irqrestore(hba->host->host_lock, flags);
3821
3822         ret = ufshcd_host_reset_and_restore(hba);
3823
3824         spin_lock_irqsave(hba->host->host_lock, flags);
3825         if (ret)
3826                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3827         ufshcd_clear_eh_in_progress(hba);
3828         spin_unlock_irqrestore(hba->host->host_lock, flags);
3829
3830         if (ret)
3831                 dev_err(hba->dev, "%s: link recovery failed, err %d",
3832                         __func__, ret);
3833
3834         return ret;
3835 }
3836
3837 static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3838 {
3839         int ret;
3840         struct uic_command uic_cmd = {0};
3841         ktime_t start = ktime_get();
3842
3843         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3844
3845         uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
3846         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3847         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3848                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3849
3850         if (ret) {
3851                 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3852                         __func__, ret);
3853
3854                 /*
3855                  * If link recovery fails then return error so that caller
3856                  * don't retry the hibern8 enter again.
3857                  */
3858                 if (ufshcd_link_recovery(hba))
3859                         ret = -ENOLINK;
3860         } else
3861                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3862                                                                 POST_CHANGE);
3863
3864         return ret;
3865 }
3866
3867 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3868 {
3869         int ret = 0, retries;
3870
3871         for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3872                 ret = __ufshcd_uic_hibern8_enter(hba);
3873                 if (!ret || ret == -ENOLINK)
3874                         goto out;
3875         }
3876 out:
3877         return ret;
3878 }
3879
3880 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3881 {
3882         struct uic_command uic_cmd = {0};
3883         int ret;
3884         ktime_t start = ktime_get();
3885
3886         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3887
3888         uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3889         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3890         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3891                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3892
3893         if (ret) {
3894                 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3895                         __func__, ret);
3896                 ret = ufshcd_link_recovery(hba);
3897         } else {
3898                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3899                                                                 POST_CHANGE);
3900                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3901                 hba->ufs_stats.hibern8_exit_cnt++;
3902         }
3903
3904         return ret;
3905 }
3906
3907 static void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3908 {
3909         unsigned long flags;
3910
3911         if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
3912                 return;
3913
3914         spin_lock_irqsave(hba->host->host_lock, flags);
3915         ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3916         spin_unlock_irqrestore(hba->host->host_lock, flags);
3917 }
3918
3919  /**
3920  * ufshcd_init_pwr_info - setting the POR (power on reset)
3921  * values in hba power info
3922  * @hba: per-adapter instance
3923  */
3924 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3925 {
3926         hba->pwr_info.gear_rx = UFS_PWM_G1;
3927         hba->pwr_info.gear_tx = UFS_PWM_G1;
3928         hba->pwr_info.lane_rx = 1;
3929         hba->pwr_info.lane_tx = 1;
3930         hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3931         hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3932         hba->pwr_info.hs_rate = 0;
3933 }
3934
3935 /**
3936  * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3937  * @hba: per-adapter instance
3938  */
3939 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
3940 {
3941         struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3942
3943         if (hba->max_pwr_info.is_valid)
3944                 return 0;
3945
3946         pwr_info->pwr_tx = FAST_MODE;
3947         pwr_info->pwr_rx = FAST_MODE;
3948         pwr_info->hs_rate = PA_HS_MODE_B;
3949
3950         /* Get the connected lane count */
3951         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3952                         &pwr_info->lane_rx);
3953         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3954                         &pwr_info->lane_tx);
3955
3956         if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3957                 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3958                                 __func__,
3959                                 pwr_info->lane_rx,
3960                                 pwr_info->lane_tx);
3961                 return -EINVAL;
3962         }
3963
3964         /*
3965          * First, get the maximum gears of HS speed.
3966          * If a zero value, it means there is no HSGEAR capability.
3967          * Then, get the maximum gears of PWM speed.
3968          */
3969         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3970         if (!pwr_info->gear_rx) {
3971                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3972                                 &pwr_info->gear_rx);
3973                 if (!pwr_info->gear_rx) {
3974                         dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3975                                 __func__, pwr_info->gear_rx);
3976                         return -EINVAL;
3977                 }
3978                 pwr_info->pwr_rx = SLOW_MODE;
3979         }
3980
3981         ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3982                         &pwr_info->gear_tx);
3983         if (!pwr_info->gear_tx) {
3984                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3985                                 &pwr_info->gear_tx);
3986                 if (!pwr_info->gear_tx) {
3987                         dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3988                                 __func__, pwr_info->gear_tx);
3989                         return -EINVAL;
3990                 }
3991                 pwr_info->pwr_tx = SLOW_MODE;
3992         }
3993
3994         hba->max_pwr_info.is_valid = true;
3995         return 0;
3996 }
3997
3998 static int ufshcd_change_power_mode(struct ufs_hba *hba,
3999                              struct ufs_pa_layer_attr *pwr_mode)
4000 {
4001         int ret;
4002
4003         /* if already configured to the requested pwr_mode */
4004         if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4005             pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4006             pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4007             pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4008             pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4009             pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4010             pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4011                 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4012                 return 0;
4013         }
4014
4015         /*
4016          * Configure attributes for power mode change with below.
4017          * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4018          * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4019          * - PA_HSSERIES
4020          */
4021         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4022         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4023                         pwr_mode->lane_rx);
4024         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4025                         pwr_mode->pwr_rx == FAST_MODE)
4026                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
4027         else
4028                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4029
4030         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4031         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4032                         pwr_mode->lane_tx);
4033         if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4034                         pwr_mode->pwr_tx == FAST_MODE)
4035                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
4036         else
4037                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4038
4039         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4040             pwr_mode->pwr_tx == FASTAUTO_MODE ||
4041             pwr_mode->pwr_rx == FAST_MODE ||
4042             pwr_mode->pwr_tx == FAST_MODE)
4043                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4044                                                 pwr_mode->hs_rate);
4045
4046         ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4047                         | pwr_mode->pwr_tx);
4048
4049         if (ret) {
4050                 dev_err(hba->dev,
4051                         "%s: power mode change failed %d\n", __func__, ret);
4052         } else {
4053                 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4054                                                                 pwr_mode);
4055
4056                 memcpy(&hba->pwr_info, pwr_mode,
4057                         sizeof(struct ufs_pa_layer_attr));
4058         }
4059
4060         return ret;
4061 }
4062
4063 /**
4064  * ufshcd_config_pwr_mode - configure a new power mode
4065  * @hba: per-adapter instance
4066  * @desired_pwr_mode: desired power configuration
4067  */
4068 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4069                 struct ufs_pa_layer_attr *desired_pwr_mode)
4070 {
4071         struct ufs_pa_layer_attr final_params = { 0 };
4072         int ret;
4073
4074         ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4075                                         desired_pwr_mode, &final_params);
4076
4077         if (ret)
4078                 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4079
4080         ret = ufshcd_change_power_mode(hba, &final_params);
4081         if (!ret)
4082                 ufshcd_print_pwr_info(hba);
4083
4084         return ret;
4085 }
4086 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4087
4088 /**
4089  * ufshcd_complete_dev_init() - checks device readiness
4090  * @hba: per-adapter instance
4091  *
4092  * Set fDeviceInit flag and poll until device toggles it.
4093  */
4094 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4095 {
4096         int i;
4097         int err;
4098         bool flag_res = 1;
4099
4100         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4101                 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
4102         if (err) {
4103                 dev_err(hba->dev,
4104                         "%s setting fDeviceInit flag failed with error %d\n",
4105                         __func__, err);
4106                 goto out;
4107         }
4108
4109         /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4110         for (i = 0; i < 1000 && !err && flag_res; i++)
4111                 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4112                         QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4113
4114         if (err)
4115                 dev_err(hba->dev,
4116                         "%s reading fDeviceInit flag failed with error %d\n",
4117                         __func__, err);
4118         else if (flag_res)
4119                 dev_err(hba->dev,
4120                         "%s fDeviceInit was not cleared by the device\n",
4121                         __func__);
4122
4123 out:
4124         return err;
4125 }
4126
4127 /**
4128  * ufshcd_make_hba_operational - Make UFS controller operational
4129  * @hba: per adapter instance
4130  *
4131  * To bring UFS host controller to operational state,
4132  * 1. Enable required interrupts
4133  * 2. Configure interrupt aggregation
4134  * 3. Program UTRL and UTMRL base address
4135  * 4. Configure run-stop-registers
4136  *
4137  * Returns 0 on success, non-zero value on failure
4138  */
4139 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4140 {
4141         int err = 0;
4142         u32 reg;
4143
4144         /* Enable required interrupts */
4145         ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4146
4147         /* Configure interrupt aggregation */
4148         if (ufshcd_is_intr_aggr_allowed(hba))
4149                 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4150         else
4151                 ufshcd_disable_intr_aggr(hba);
4152
4153         /* Configure UTRL and UTMRL base address registers */
4154         ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4155                         REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4156         ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4157                         REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4158         ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4159                         REG_UTP_TASK_REQ_LIST_BASE_L);
4160         ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4161                         REG_UTP_TASK_REQ_LIST_BASE_H);
4162
4163         /*
4164          * Make sure base address and interrupt setup are updated before
4165          * enabling the run/stop registers below.
4166          */
4167         wmb();
4168
4169         /*
4170          * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4171          */
4172         reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4173         if (!(ufshcd_get_lists_status(reg))) {
4174                 ufshcd_enable_run_stop_reg(hba);
4175         } else {
4176                 dev_err(hba->dev,
4177                         "Host controller not ready to process requests");
4178                 err = -EIO;
4179                 goto out;
4180         }
4181
4182 out:
4183         return err;
4184 }
4185
4186 /**
4187  * ufshcd_hba_stop - Send controller to reset state
4188  * @hba: per adapter instance
4189  * @can_sleep: perform sleep or just spin
4190  */
4191 static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4192 {
4193         int err;
4194
4195         ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
4196         err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4197                                         CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4198                                         10, 1, can_sleep);
4199         if (err)
4200                 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4201 }
4202
4203 /**
4204  * ufshcd_hba_execute_hce - initialize the controller
4205  * @hba: per adapter instance
4206  *
4207  * The controller resets itself and controller firmware initialization
4208  * sequence kicks off. When controller is ready it will set
4209  * the Host Controller Enable bit to 1.
4210  *
4211  * Returns 0 on success, non-zero value on failure
4212  */
4213 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4214 {
4215         int retry;
4216
4217         /*
4218          * msleep of 1 and 5 used in this function might result in msleep(20),
4219          * but it was necessary to send the UFS FPGA to reset mode during
4220          * development and testing of this driver. msleep can be changed to
4221          * mdelay and retry count can be reduced based on the controller.
4222          */
4223         if (!ufshcd_is_hba_active(hba))
4224                 /* change controller state to "reset state" */
4225                 ufshcd_hba_stop(hba, true);
4226
4227         /* UniPro link is disabled at this point */
4228         ufshcd_set_link_off(hba);
4229
4230         ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4231
4232         /* start controller initialization sequence */
4233         ufshcd_hba_start(hba);
4234
4235         /*
4236          * To initialize a UFS host controller HCE bit must be set to 1.
4237          * During initialization the HCE bit value changes from 1->0->1.
4238          * When the host controller completes initialization sequence
4239          * it sets the value of HCE bit to 1. The same HCE bit is read back
4240          * to check if the controller has completed initialization sequence.
4241          * So without this delay the value HCE = 1, set in the previous
4242          * instruction might be read back.
4243          * This delay can be changed based on the controller.
4244          */
4245         msleep(1);
4246
4247         /* wait for the host controller to complete initialization */
4248         retry = 10;
4249         while (ufshcd_is_hba_active(hba)) {
4250                 if (retry) {
4251                         retry--;
4252                 } else {
4253                         dev_err(hba->dev,
4254                                 "Controller enable failed\n");
4255                         return -EIO;
4256                 }
4257                 msleep(5);
4258         }
4259
4260         /* enable UIC related interrupts */
4261         ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4262
4263         ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4264
4265         return 0;
4266 }
4267
4268 static int ufshcd_hba_enable(struct ufs_hba *hba)
4269 {
4270         int ret;
4271
4272         if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4273                 ufshcd_set_link_off(hba);
4274                 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4275
4276                 /* enable UIC related interrupts */
4277                 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4278                 ret = ufshcd_dme_reset(hba);
4279                 if (!ret) {
4280                         ret = ufshcd_dme_enable(hba);
4281                         if (!ret)
4282                                 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4283                         if (ret)
4284                                 dev_err(hba->dev,
4285                                         "Host controller enable failed with non-hce\n");
4286                 }
4287         } else {
4288                 ret = ufshcd_hba_execute_hce(hba);
4289         }
4290
4291         return ret;
4292 }
4293 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4294 {
4295         int tx_lanes, i, err = 0;
4296
4297         if (!peer)
4298                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4299                                &tx_lanes);
4300         else
4301                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4302                                     &tx_lanes);
4303         for (i = 0; i < tx_lanes; i++) {
4304                 if (!peer)
4305                         err = ufshcd_dme_set(hba,
4306                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4307                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4308                                         0);
4309                 else
4310                         err = ufshcd_dme_peer_set(hba,
4311                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4312                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4313                                         0);
4314                 if (err) {
4315                         dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4316                                 __func__, peer, i, err);
4317                         break;
4318                 }
4319         }
4320
4321         return err;
4322 }
4323
4324 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4325 {
4326         return ufshcd_disable_tx_lcc(hba, true);
4327 }
4328
4329 /**
4330  * ufshcd_link_startup - Initialize unipro link startup
4331  * @hba: per adapter instance
4332  *
4333  * Returns 0 for success, non-zero in case of failure
4334  */
4335 static int ufshcd_link_startup(struct ufs_hba *hba)
4336 {
4337         int ret;
4338         int retries = DME_LINKSTARTUP_RETRIES;
4339         bool link_startup_again = false;
4340
4341         /*
4342          * If UFS device isn't active then we will have to issue link startup
4343          * 2 times to make sure the device state move to active.
4344          */
4345         if (!ufshcd_is_ufs_dev_active(hba))
4346                 link_startup_again = true;
4347
4348 link_startup:
4349         do {
4350                 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4351
4352                 ret = ufshcd_dme_link_startup(hba);
4353
4354                 /* check if device is detected by inter-connect layer */
4355                 if (!ret && !ufshcd_is_device_present(hba)) {
4356                         dev_err(hba->dev, "%s: Device not present\n", __func__);
4357                         ret = -ENXIO;
4358                         goto out;
4359                 }
4360
4361                 /*
4362                  * DME link lost indication is only received when link is up,
4363                  * but we can't be sure if the link is up until link startup
4364                  * succeeds. So reset the local Uni-Pro and try again.
4365                  */
4366                 if (ret && ufshcd_hba_enable(hba))
4367                         goto out;
4368         } while (ret && retries--);
4369
4370         if (ret)
4371                 /* failed to get the link up... retire */
4372                 goto out;
4373
4374         if (link_startup_again) {
4375                 link_startup_again = false;
4376                 retries = DME_LINKSTARTUP_RETRIES;
4377                 goto link_startup;
4378         }
4379
4380         /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4381         ufshcd_init_pwr_info(hba);
4382         ufshcd_print_pwr_info(hba);
4383
4384         if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4385                 ret = ufshcd_disable_device_tx_lcc(hba);
4386                 if (ret)
4387                         goto out;
4388         }
4389
4390         /* Include any host controller configuration via UIC commands */
4391         ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4392         if (ret)
4393                 goto out;
4394
4395         ret = ufshcd_make_hba_operational(hba);
4396 out:
4397         if (ret) {
4398                 dev_err(hba->dev, "link startup failed %d\n", ret);
4399                 ufshcd_print_host_state(hba);
4400                 ufshcd_print_pwr_info(hba);
4401                 ufshcd_print_host_regs(hba);
4402         }
4403         return ret;
4404 }
4405
4406 /**
4407  * ufshcd_verify_dev_init() - Verify device initialization
4408  * @hba: per-adapter instance
4409  *
4410  * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4411  * device Transport Protocol (UTP) layer is ready after a reset.
4412  * If the UTP layer at the device side is not initialized, it may
4413  * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4414  * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4415  */
4416 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4417 {
4418         int err = 0;
4419         int retries;
4420
4421         ufshcd_hold(hba, false);
4422         mutex_lock(&hba->dev_cmd.lock);
4423         for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4424                 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4425                                                NOP_OUT_TIMEOUT);
4426
4427                 if (!err || err == -ETIMEDOUT)
4428                         break;
4429
4430                 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4431         }
4432         mutex_unlock(&hba->dev_cmd.lock);
4433         ufshcd_release(hba);
4434
4435         if (err)
4436                 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4437         return err;
4438 }
4439
4440 /**
4441  * ufshcd_set_queue_depth - set lun queue depth
4442  * @sdev: pointer to SCSI device
4443  *
4444  * Read bLUQueueDepth value and activate scsi tagged command
4445  * queueing. For WLUN, queue depth is set to 1. For best-effort
4446  * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4447  * value that host can queue.
4448  */
4449 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4450 {
4451         int ret = 0;
4452         u8 lun_qdepth;
4453         struct ufs_hba *hba;
4454
4455         hba = shost_priv(sdev->host);
4456
4457         lun_qdepth = hba->nutrs;
4458         ret = ufshcd_read_unit_desc_param(hba,
4459                                           ufshcd_scsi_to_upiu_lun(sdev->lun),
4460                                           UNIT_DESC_PARAM_LU_Q_DEPTH,
4461                                           &lun_qdepth,
4462                                           sizeof(lun_qdepth));
4463
4464         /* Some WLUN doesn't support unit descriptor */
4465         if (ret == -EOPNOTSUPP)
4466                 lun_qdepth = 1;
4467         else if (!lun_qdepth)
4468                 /* eventually, we can figure out the real queue depth */
4469                 lun_qdepth = hba->nutrs;
4470         else
4471                 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4472
4473         dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4474                         __func__, lun_qdepth);
4475         scsi_change_queue_depth(sdev, lun_qdepth);
4476 }
4477
4478 /*
4479  * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4480  * @hba: per-adapter instance
4481  * @lun: UFS device lun id
4482  * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4483  *
4484  * Returns 0 in case of success and b_lu_write_protect status would be returned
4485  * @b_lu_write_protect parameter.
4486  * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4487  * Returns -EINVAL in case of invalid parameters passed to this function.
4488  */
4489 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4490                             u8 lun,
4491                             u8 *b_lu_write_protect)
4492 {
4493         int ret;
4494
4495         if (!b_lu_write_protect)
4496                 ret = -EINVAL;
4497         /*
4498          * According to UFS device spec, RPMB LU can't be write
4499          * protected so skip reading bLUWriteProtect parameter for
4500          * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4501          */
4502         else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4503                 ret = -ENOTSUPP;
4504         else
4505                 ret = ufshcd_read_unit_desc_param(hba,
4506                                           lun,
4507                                           UNIT_DESC_PARAM_LU_WR_PROTECT,
4508                                           b_lu_write_protect,
4509                                           sizeof(*b_lu_write_protect));
4510         return ret;
4511 }
4512
4513 /**
4514  * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4515  * status
4516  * @hba: per-adapter instance
4517  * @sdev: pointer to SCSI device
4518  *
4519  */
4520 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4521                                                     struct scsi_device *sdev)
4522 {
4523         if (hba->dev_info.f_power_on_wp_en &&
4524             !hba->dev_info.is_lu_power_on_wp) {
4525                 u8 b_lu_write_protect;
4526
4527                 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4528                                       &b_lu_write_protect) &&
4529                     (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4530                         hba->dev_info.is_lu_power_on_wp = true;
4531         }
4532 }
4533
4534 /**
4535  * ufshcd_slave_alloc - handle initial SCSI device configurations
4536  * @sdev: pointer to SCSI device
4537  *
4538  * Returns success
4539  */
4540 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4541 {
4542         struct ufs_hba *hba;
4543
4544         hba = shost_priv(sdev->host);
4545
4546         /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4547         sdev->use_10_for_ms = 1;
4548
4549         /* allow SCSI layer to restart the device in case of errors */
4550         sdev->allow_restart = 1;
4551
4552         /* REPORT SUPPORTED OPERATION CODES is not supported */
4553         sdev->no_report_opcodes = 1;
4554
4555         /* WRITE_SAME command is not supported */
4556         sdev->no_write_same = 1;
4557
4558         ufshcd_set_queue_depth(sdev);
4559
4560         ufshcd_get_lu_power_on_wp_status(hba, sdev);
4561
4562         return 0;
4563 }
4564
4565 /**
4566  * ufshcd_change_queue_depth - change queue depth
4567  * @sdev: pointer to SCSI device
4568  * @depth: required depth to set
4569  *
4570  * Change queue depth and make sure the max. limits are not crossed.
4571  */
4572 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4573 {
4574         struct ufs_hba *hba = shost_priv(sdev->host);
4575
4576         if (depth > hba->nutrs)
4577                 depth = hba->nutrs;
4578         return scsi_change_queue_depth(sdev, depth);
4579 }
4580
4581 /**
4582  * ufshcd_slave_configure - adjust SCSI device configurations
4583  * @sdev: pointer to SCSI device
4584  */
4585 static int ufshcd_slave_configure(struct scsi_device *sdev)
4586 {
4587         struct request_queue *q = sdev->request_queue;
4588
4589         blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4590         blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4591
4592         return 0;
4593 }
4594
4595 /**
4596  * ufshcd_slave_destroy - remove SCSI device configurations
4597  * @sdev: pointer to SCSI device
4598  */
4599 static void ufshcd_slave_destroy(struct scsi_device *sdev)
4600 {
4601         struct ufs_hba *hba;
4602
4603         hba = shost_priv(sdev->host);
4604         /* Drop the reference as it won't be needed anymore */
4605         if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4606                 unsigned long flags;
4607
4608                 spin_lock_irqsave(hba->host->host_lock, flags);
4609                 hba->sdev_ufs_device = NULL;
4610                 spin_unlock_irqrestore(hba->host->host_lock, flags);
4611         }
4612 }
4613
4614 /**
4615  * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4616  * @lrbp: pointer to local reference block of completed command
4617  * @scsi_status: SCSI command status
4618  *
4619  * Returns value base on SCSI command status
4620  */
4621 static inline int
4622 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4623 {
4624         int result = 0;
4625
4626         switch (scsi_status) {
4627         case SAM_STAT_CHECK_CONDITION:
4628                 ufshcd_copy_sense_data(lrbp);
4629                 /* fallthrough */
4630         case SAM_STAT_GOOD:
4631                 result |= DID_OK << 16 |
4632                           COMMAND_COMPLETE << 8 |
4633                           scsi_status;
4634                 break;
4635         case SAM_STAT_TASK_SET_FULL:
4636         case SAM_STAT_BUSY:
4637         case SAM_STAT_TASK_ABORTED:
4638                 ufshcd_copy_sense_data(lrbp);
4639                 result |= scsi_status;
4640                 break;
4641         default:
4642                 result |= DID_ERROR << 16;
4643                 break;
4644         } /* end of switch */
4645
4646         return result;
4647 }
4648
4649 /**
4650  * ufshcd_transfer_rsp_status - Get overall status of the response
4651  * @hba: per adapter instance
4652  * @lrbp: pointer to local reference block of completed command
4653  *
4654  * Returns result of the command to notify SCSI midlayer
4655  */
4656 static inline int
4657 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4658 {
4659         int result = 0;
4660         int scsi_status;
4661         int ocs;
4662
4663         /* overall command status of utrd */
4664         ocs = ufshcd_get_tr_ocs(lrbp);
4665
4666         switch (ocs) {
4667         case OCS_SUCCESS:
4668                 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
4669                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
4670                 switch (result) {
4671                 case UPIU_TRANSACTION_RESPONSE:
4672                         /*
4673                          * get the response UPIU result to extract
4674                          * the SCSI command status
4675                          */
4676                         result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4677
4678                         /*
4679                          * get the result based on SCSI status response
4680                          * to notify the SCSI midlayer of the command status
4681                          */
4682                         scsi_status = result & MASK_SCSI_STATUS;
4683                         result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
4684
4685                         /*
4686                          * Currently we are only supporting BKOPs exception
4687                          * events hence we can ignore BKOPs exception event
4688                          * during power management callbacks. BKOPs exception
4689                          * event is not expected to be raised in runtime suspend
4690                          * callback as it allows the urgent bkops.
4691                          * During system suspend, we are anyway forcefully
4692                          * disabling the bkops and if urgent bkops is needed
4693                          * it will be enabled on system resume. Long term
4694                          * solution could be to abort the system suspend if
4695                          * UFS device needs urgent BKOPs.
4696                          */
4697                         if (!hba->pm_op_in_progress &&
4698                             ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
4699                                 schedule_work(&hba->eeh_work);
4700                         break;
4701                 case UPIU_TRANSACTION_REJECT_UPIU:
4702                         /* TODO: handle Reject UPIU Response */
4703                         result = DID_ERROR << 16;
4704                         dev_err(hba->dev,
4705                                 "Reject UPIU not fully implemented\n");
4706                         break;
4707                 default:
4708                         dev_err(hba->dev,
4709                                 "Unexpected request response code = %x\n",
4710                                 result);
4711                         result = DID_ERROR << 16;
4712                         break;
4713                 }
4714                 break;
4715         case OCS_ABORTED:
4716                 result |= DID_ABORT << 16;
4717                 break;
4718         case OCS_INVALID_COMMAND_STATUS:
4719                 result |= DID_REQUEUE << 16;
4720                 break;
4721         case OCS_INVALID_CMD_TABLE_ATTR:
4722         case OCS_INVALID_PRDT_ATTR:
4723         case OCS_MISMATCH_DATA_BUF_SIZE:
4724         case OCS_MISMATCH_RESP_UPIU_SIZE:
4725         case OCS_PEER_COMM_FAILURE:
4726         case OCS_FATAL_ERROR:
4727         default:
4728                 result |= DID_ERROR << 16;
4729                 dev_err(hba->dev,
4730                                 "OCS error from controller = %x for tag %d\n",
4731                                 ocs, lrbp->task_tag);
4732                 ufshcd_print_host_regs(hba);
4733                 ufshcd_print_host_state(hba);
4734                 break;
4735         } /* end of switch */
4736
4737         if (host_byte(result) != DID_OK)
4738                 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
4739         return result;
4740 }
4741
4742 /**
4743  * ufshcd_uic_cmd_compl - handle completion of uic command
4744  * @hba: per adapter instance
4745  * @intr_status: interrupt status generated by the controller
4746  */
4747 static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
4748 {
4749         if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
4750                 hba->active_uic_cmd->argument2 |=
4751                         ufshcd_get_uic_cmd_result(hba);
4752                 hba->active_uic_cmd->argument3 =
4753                         ufshcd_get_dme_attr_val(hba);
4754                 complete(&hba->active_uic_cmd->done);
4755         }
4756
4757         if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
4758                 complete(hba->uic_async_done);
4759 }
4760
4761 /**
4762  * __ufshcd_transfer_req_compl - handle SCSI and query command completion
4763  * @hba: per adapter instance
4764  * @completed_reqs: requests to complete
4765  */
4766 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4767                                         unsigned long completed_reqs)
4768 {
4769         struct ufshcd_lrb *lrbp;
4770         struct scsi_cmnd *cmd;
4771         int result;
4772         int index;
4773
4774         for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4775                 lrbp = &hba->lrb[index];
4776                 cmd = lrbp->cmd;
4777                 if (cmd) {
4778                         ufshcd_add_command_trace(hba, index, "complete");
4779                         result = ufshcd_transfer_rsp_status(hba, lrbp);
4780                         scsi_dma_unmap(cmd);
4781                         cmd->result = result;
4782                         /* Mark completed command as NULL in LRB */
4783                         lrbp->cmd = NULL;
4784                         clear_bit_unlock(index, &hba->lrb_in_use);
4785                         /* Do not touch lrbp after scsi done */
4786                         cmd->scsi_done(cmd);
4787                         __ufshcd_release(hba);
4788                 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4789                         lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
4790                         if (hba->dev_cmd.complete) {
4791                                 ufshcd_add_command_trace(hba, index,
4792                                                 "dev_complete");
4793                                 complete(hba->dev_cmd.complete);
4794                         }
4795                 }
4796                 if (ufshcd_is_clkscaling_supported(hba))
4797                         hba->clk_scaling.active_reqs--;
4798
4799                 lrbp->compl_time_stamp = ktime_get();
4800         }
4801
4802         /* clear corresponding bits of completed commands */
4803         hba->outstanding_reqs ^= completed_reqs;
4804
4805         ufshcd_clk_scaling_update_busy(hba);
4806
4807         /* we might have free'd some tags above */
4808         wake_up(&hba->dev_cmd.tag_wq);
4809 }
4810
4811 /**
4812  * ufshcd_transfer_req_compl - handle SCSI and query command completion
4813  * @hba: per adapter instance
4814  */
4815 static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
4816 {
4817         unsigned long completed_reqs;
4818         u32 tr_doorbell;
4819
4820         /* Resetting interrupt aggregation counters first and reading the
4821          * DOOR_BELL afterward allows us to handle all the completed requests.
4822          * In order to prevent other interrupts starvation the DB is read once
4823          * after reset. The down side of this solution is the possibility of
4824          * false interrupt if device completes another request after resetting
4825          * aggregation and before reading the DB.
4826          */
4827         if (ufshcd_is_intr_aggr_allowed(hba) &&
4828             !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
4829                 ufshcd_reset_intr_aggr(hba);
4830
4831         tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4832         completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4833
4834         __ufshcd_transfer_req_compl(hba, completed_reqs);
4835 }
4836
4837 /**
4838  * ufshcd_disable_ee - disable exception event
4839  * @hba: per-adapter instance
4840  * @mask: exception event to disable
4841  *
4842  * Disables exception event in the device so that the EVENT_ALERT
4843  * bit is not set.
4844  *
4845  * Returns zero on success, non-zero error value on failure.
4846  */
4847 static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4848 {
4849         int err = 0;
4850         u32 val;
4851
4852         if (!(hba->ee_ctrl_mask & mask))
4853                 goto out;
4854
4855         val = hba->ee_ctrl_mask & ~mask;
4856         val &= MASK_EE_STATUS;
4857         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4858                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4859         if (!err)
4860                 hba->ee_ctrl_mask &= ~mask;
4861 out:
4862         return err;
4863 }
4864
4865 /**
4866  * ufshcd_enable_ee - enable exception event
4867  * @hba: per-adapter instance
4868  * @mask: exception event to enable
4869  *
4870  * Enable corresponding exception event in the device to allow
4871  * device to alert host in critical scenarios.
4872  *
4873  * Returns zero on success, non-zero error value on failure.
4874  */
4875 static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4876 {
4877         int err = 0;
4878         u32 val;
4879
4880         if (hba->ee_ctrl_mask & mask)
4881                 goto out;
4882
4883         val = hba->ee_ctrl_mask | mask;
4884         val &= MASK_EE_STATUS;
4885         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4886                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4887         if (!err)
4888                 hba->ee_ctrl_mask |= mask;
4889 out:
4890         return err;
4891 }
4892
4893 /**
4894  * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4895  * @hba: per-adapter instance
4896  *
4897  * Allow device to manage background operations on its own. Enabling
4898  * this might lead to inconsistent latencies during normal data transfers
4899  * as the device is allowed to manage its own way of handling background
4900  * operations.
4901  *
4902  * Returns zero on success, non-zero on failure.
4903  */
4904 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4905 {
4906         int err = 0;
4907
4908         if (hba->auto_bkops_enabled)
4909                 goto out;
4910
4911         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4912                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
4913         if (err) {
4914                 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4915                                 __func__, err);
4916                 goto out;
4917         }
4918
4919         hba->auto_bkops_enabled = true;
4920         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
4921
4922         /* No need of URGENT_BKOPS exception from the device */
4923         err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4924         if (err)
4925                 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4926                                 __func__, err);
4927 out:
4928         return err;
4929 }
4930
4931 /**
4932  * ufshcd_disable_auto_bkops - block device in doing background operations
4933  * @hba: per-adapter instance
4934  *
4935  * Disabling background operations improves command response latency but
4936  * has drawback of device moving into critical state where the device is
4937  * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4938  * host is idle so that BKOPS are managed effectively without any negative
4939  * impacts.
4940  *
4941  * Returns zero on success, non-zero on failure.
4942  */
4943 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4944 {
4945         int err = 0;
4946
4947         if (!hba->auto_bkops_enabled)
4948                 goto out;
4949
4950         /*
4951          * If host assisted BKOPs is to be enabled, make sure
4952          * urgent bkops exception is allowed.
4953          */
4954         err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4955         if (err) {
4956                 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4957                                 __func__, err);
4958                 goto out;
4959         }
4960
4961         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
4962                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
4963         if (err) {
4964                 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
4965                                 __func__, err);
4966                 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4967                 goto out;
4968         }
4969
4970         hba->auto_bkops_enabled = false;
4971         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
4972 out:
4973         return err;
4974 }
4975
4976 /**
4977  * ufshcd_force_reset_auto_bkops - force reset auto bkops state
4978  * @hba: per adapter instance
4979  *
4980  * After a device reset the device may toggle the BKOPS_EN flag
4981  * to default value. The s/w tracking variables should be updated
4982  * as well. This function would change the auto-bkops state based on
4983  * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
4984  */
4985 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
4986 {
4987         if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
4988                 hba->auto_bkops_enabled = false;
4989                 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
4990                 ufshcd_enable_auto_bkops(hba);
4991         } else {
4992                 hba->auto_bkops_enabled = true;
4993                 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
4994                 ufshcd_disable_auto_bkops(hba);
4995         }
4996 }
4997
4998 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
4999 {
5000         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5001                         QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5002 }
5003
5004 /**
5005  * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5006  * @hba: per-adapter instance
5007  * @status: bkops_status value
5008  *
5009  * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5010  * flag in the device to permit background operations if the device
5011  * bkops_status is greater than or equal to "status" argument passed to
5012  * this function, disable otherwise.
5013  *
5014  * Returns 0 for success, non-zero in case of failure.
5015  *
5016  * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5017  * to know whether auto bkops is enabled or disabled after this function
5018  * returns control to it.
5019  */
5020 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5021                              enum bkops_status status)
5022 {
5023         int err;
5024         u32 curr_status = 0;
5025
5026         err = ufshcd_get_bkops_status(hba, &curr_status);
5027         if (err) {
5028                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5029                                 __func__, err);
5030                 goto out;
5031         } else if (curr_status > BKOPS_STATUS_MAX) {
5032                 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5033                                 __func__, curr_status);
5034                 err = -EINVAL;
5035                 goto out;
5036         }
5037
5038         if (curr_status >= status)
5039                 err = ufshcd_enable_auto_bkops(hba);
5040         else
5041                 err = ufshcd_disable_auto_bkops(hba);
5042 out:
5043         return err;
5044 }
5045
5046 /**
5047  * ufshcd_urgent_bkops - handle urgent bkops exception event
5048  * @hba: per-adapter instance
5049  *
5050  * Enable fBackgroundOpsEn flag in the device to permit background
5051  * operations.
5052  *
5053  * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5054  * and negative error value for any other failure.
5055  */
5056 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5057 {
5058         return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5059 }
5060
5061 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5062 {
5063         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5064                         QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5065 }
5066
5067 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5068 {
5069         int err;
5070         u32 curr_status = 0;
5071
5072         if (hba->is_urgent_bkops_lvl_checked)
5073                 goto enable_auto_bkops;
5074
5075         err = ufshcd_get_bkops_status(hba, &curr_status);
5076         if (err) {
5077                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5078                                 __func__, err);
5079                 goto out;
5080         }
5081
5082         /*
5083          * We are seeing that some devices are raising the urgent bkops
5084          * exception events even when BKOPS status doesn't indicate performace
5085          * impacted or critical. Handle these device by determining their urgent
5086          * bkops status at runtime.
5087          */
5088         if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5089                 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5090                                 __func__, curr_status);
5091                 /* update the current status as the urgent bkops level */
5092                 hba->urgent_bkops_lvl = curr_status;
5093                 hba->is_urgent_bkops_lvl_checked = true;
5094         }
5095
5096 enable_auto_bkops:
5097         err = ufshcd_enable_auto_bkops(hba);
5098 out:
5099         if (err < 0)
5100                 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5101                                 __func__, err);
5102 }
5103
5104 /**
5105  * ufshcd_exception_event_handler - handle exceptions raised by device
5106  * @work: pointer to work data
5107  *
5108  * Read bExceptionEventStatus attribute from the device and handle the
5109  * exception event accordingly.
5110  */
5111 static void ufshcd_exception_event_handler(struct work_struct *work)
5112 {
5113         struct ufs_hba *hba;
5114         int err;
5115         u32 status = 0;
5116         hba = container_of(work, struct ufs_hba, eeh_work);
5117
5118         pm_runtime_get_sync(hba->dev);
5119         scsi_block_requests(hba->host);
5120         err = ufshcd_get_ee_status(hba, &status);
5121         if (err) {
5122                 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5123                                 __func__, err);
5124                 goto out;
5125         }
5126
5127         status &= hba->ee_ctrl_mask;
5128
5129         if (status & MASK_EE_URGENT_BKOPS)
5130                 ufshcd_bkops_exception_event_handler(hba);
5131
5132 out:
5133         scsi_unblock_requests(hba->host);
5134         pm_runtime_put_sync(hba->dev);
5135         return;
5136 }
5137
5138 /* Complete requests that have door-bell cleared */
5139 static void ufshcd_complete_requests(struct ufs_hba *hba)
5140 {
5141         ufshcd_transfer_req_compl(hba);
5142         ufshcd_tmc_handler(hba);
5143 }
5144
5145 /**
5146  * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5147  *                              to recover from the DL NAC errors or not.
5148  * @hba: per-adapter instance
5149  *
5150  * Returns true if error handling is required, false otherwise
5151  */
5152 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5153 {
5154         unsigned long flags;
5155         bool err_handling = true;
5156
5157         spin_lock_irqsave(hba->host->host_lock, flags);
5158         /*
5159          * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5160          * device fatal error and/or DL NAC & REPLAY timeout errors.
5161          */
5162         if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5163                 goto out;
5164
5165         if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5166             ((hba->saved_err & UIC_ERROR) &&
5167              (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5168                 goto out;
5169
5170         if ((hba->saved_err & UIC_ERROR) &&
5171             (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5172                 int err;
5173                 /*
5174                  * wait for 50ms to see if we can get any other errors or not.
5175                  */
5176                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5177                 msleep(50);
5178                 spin_lock_irqsave(hba->host->host_lock, flags);
5179
5180                 /*
5181                  * now check if we have got any other severe errors other than
5182                  * DL NAC error?
5183                  */
5184                 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5185                     ((hba->saved_err & UIC_ERROR) &&
5186                     (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5187                         goto out;
5188
5189                 /*
5190                  * As DL NAC is the only error received so far, send out NOP
5191                  * command to confirm if link is still active or not.
5192                  *   - If we don't get any response then do error recovery.
5193                  *   - If we get response then clear the DL NAC error bit.
5194                  */
5195
5196                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5197                 err = ufshcd_verify_dev_init(hba);
5198                 spin_lock_irqsave(hba->host->host_lock, flags);
5199
5200                 if (err)
5201                         goto out;
5202
5203                 /* Link seems to be alive hence ignore the DL NAC errors */
5204                 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5205                         hba->saved_err &= ~UIC_ERROR;
5206                 /* clear NAC error */
5207                 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5208                 if (!hba->saved_uic_err) {
5209                         err_handling = false;
5210                         goto out;
5211                 }
5212         }
5213 out:
5214         spin_unlock_irqrestore(hba->host->host_lock, flags);
5215         return err_handling;
5216 }
5217
5218 /**
5219  * ufshcd_err_handler - handle UFS errors that require s/w attention
5220  * @work: pointer to work structure
5221  */
5222 static void ufshcd_err_handler(struct work_struct *work)
5223 {
5224         struct ufs_hba *hba;
5225         unsigned long flags;
5226         u32 err_xfer = 0;
5227         u32 err_tm = 0;
5228         int err = 0;
5229         int tag;
5230         bool needs_reset = false;
5231
5232         hba = container_of(work, struct ufs_hba, eh_work);
5233
5234         pm_runtime_get_sync(hba->dev);
5235         ufshcd_hold(hba, false);
5236
5237         spin_lock_irqsave(hba->host->host_lock, flags);
5238         if (hba->ufshcd_state == UFSHCD_STATE_RESET)
5239                 goto out;
5240
5241         hba->ufshcd_state = UFSHCD_STATE_RESET;
5242         ufshcd_set_eh_in_progress(hba);
5243
5244         /* Complete requests that have door-bell cleared by h/w */
5245         ufshcd_complete_requests(hba);
5246
5247         if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5248                 bool ret;
5249
5250                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5251                 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5252                 ret = ufshcd_quirk_dl_nac_errors(hba);
5253                 spin_lock_irqsave(hba->host->host_lock, flags);
5254                 if (!ret)
5255                         goto skip_err_handling;
5256         }
5257         if ((hba->saved_err & INT_FATAL_ERRORS) ||
5258             (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
5259             ((hba->saved_err & UIC_ERROR) &&
5260             (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5261                                    UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5262                                    UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5263                 needs_reset = true;
5264
5265         /*
5266          * if host reset is required then skip clearing the pending
5267          * transfers forcefully because they will automatically get
5268          * cleared after link startup.
5269          */
5270         if (needs_reset)
5271                 goto skip_pending_xfer_clear;
5272
5273         /* release lock as clear command might sleep */
5274         spin_unlock_irqrestore(hba->host->host_lock, flags);
5275         /* Clear pending transfer requests */
5276         for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5277                 if (ufshcd_clear_cmd(hba, tag)) {
5278                         err_xfer = true;
5279                         goto lock_skip_pending_xfer_clear;
5280                 }
5281         }
5282
5283         /* Clear pending task management requests */
5284         for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5285                 if (ufshcd_clear_tm_cmd(hba, tag)) {
5286                         err_tm = true;
5287                         goto lock_skip_pending_xfer_clear;
5288                 }
5289         }
5290
5291 lock_skip_pending_xfer_clear:
5292         spin_lock_irqsave(hba->host->host_lock, flags);
5293
5294         /* Complete the requests that are cleared by s/w */
5295         ufshcd_complete_requests(hba);
5296
5297         if (err_xfer || err_tm)
5298                 needs_reset = true;
5299
5300 skip_pending_xfer_clear:
5301         /* Fatal errors need reset */
5302         if (needs_reset) {
5303                 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5304
5305                 /*
5306                  * ufshcd_reset_and_restore() does the link reinitialization
5307                  * which will need atleast one empty doorbell slot to send the
5308                  * device management commands (NOP and query commands).
5309                  * If there is no slot empty at this moment then free up last
5310                  * slot forcefully.
5311                  */
5312                 if (hba->outstanding_reqs == max_doorbells)
5313                         __ufshcd_transfer_req_compl(hba,
5314                                                     (1UL << (hba->nutrs - 1)));
5315
5316                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5317                 err = ufshcd_reset_and_restore(hba);
5318                 spin_lock_irqsave(hba->host->host_lock, flags);
5319                 if (err) {
5320                         dev_err(hba->dev, "%s: reset and restore failed\n",
5321                                         __func__);
5322                         hba->ufshcd_state = UFSHCD_STATE_ERROR;
5323                 }
5324                 /*
5325                  * Inform scsi mid-layer that we did reset and allow to handle
5326                  * Unit Attention properly.
5327                  */
5328                 scsi_report_bus_reset(hba->host, 0);
5329                 hba->saved_err = 0;
5330                 hba->saved_uic_err = 0;
5331         }
5332
5333 skip_err_handling:
5334         if (!needs_reset) {
5335                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5336                 if (hba->saved_err || hba->saved_uic_err)
5337                         dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5338                             __func__, hba->saved_err, hba->saved_uic_err);
5339         }
5340
5341         ufshcd_clear_eh_in_progress(hba);
5342
5343 out:
5344         spin_unlock_irqrestore(hba->host->host_lock, flags);
5345         ufshcd_scsi_unblock_requests(hba);
5346         ufshcd_release(hba);
5347         pm_runtime_put_sync(hba->dev);
5348 }
5349
5350 static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5351                 u32 reg)
5352 {
5353         reg_hist->reg[reg_hist->pos] = reg;
5354         reg_hist->tstamp[reg_hist->pos] = ktime_get();
5355         reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5356 }
5357
5358 /**
5359  * ufshcd_update_uic_error - check and set fatal UIC error flags.
5360  * @hba: per-adapter instance
5361  */
5362 static void ufshcd_update_uic_error(struct ufs_hba *hba)
5363 {
5364         u32 reg;
5365
5366         /* PHY layer lane error */
5367         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5368         /* Ignore LINERESET indication, as this is not an error */
5369         if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5370                         (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5371                 /*
5372                  * To know whether this error is fatal or not, DB timeout
5373                  * must be checked but this error is handled separately.
5374                  */
5375                 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
5376                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5377         }
5378
5379         /* PA_INIT_ERROR is fatal and needs UIC reset */
5380         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
5381         if (reg)
5382                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5383
5384         if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5385                 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5386         else if (hba->dev_quirks &
5387                    UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5388                 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5389                         hba->uic_error |=
5390                                 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5391                 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5392                         hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5393         }
5394
5395         /* UIC NL/TL/DME errors needs software retry */
5396         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
5397         if (reg) {
5398                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
5399                 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
5400         }
5401
5402         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
5403         if (reg) {
5404                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
5405                 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
5406         }
5407
5408         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
5409         if (reg) {
5410                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
5411                 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
5412         }
5413
5414         dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5415                         __func__, hba->uic_error);
5416 }
5417
5418 static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5419                                          u32 intr_mask)
5420 {
5421         if (!ufshcd_is_auto_hibern8_supported(hba))
5422                 return false;
5423
5424         if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5425                 return false;
5426
5427         if (hba->active_uic_cmd &&
5428             (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5429             hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5430                 return false;
5431
5432         return true;
5433 }
5434
5435 /**
5436  * ufshcd_check_errors - Check for errors that need s/w attention
5437  * @hba: per-adapter instance
5438  */
5439 static void ufshcd_check_errors(struct ufs_hba *hba)
5440 {
5441         bool queue_eh_work = false;
5442
5443         if (hba->errors & INT_FATAL_ERRORS)
5444                 queue_eh_work = true;
5445
5446         if (hba->errors & UIC_ERROR) {
5447                 hba->uic_error = 0;
5448                 ufshcd_update_uic_error(hba);
5449                 if (hba->uic_error)
5450                         queue_eh_work = true;
5451         }
5452
5453         if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5454                 dev_err(hba->dev,
5455                         "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5456                         __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5457                         "Enter" : "Exit",
5458                         hba->errors, ufshcd_get_upmcrs(hba));
5459                 queue_eh_work = true;
5460         }
5461
5462         if (queue_eh_work) {
5463                 /*
5464                  * update the transfer error masks to sticky bits, let's do this
5465                  * irrespective of current ufshcd_state.
5466                  */
5467                 hba->saved_err |= hba->errors;
5468                 hba->saved_uic_err |= hba->uic_error;
5469
5470                 /* handle fatal errors only when link is functional */
5471                 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5472                         /* block commands from scsi mid-layer */
5473                         ufshcd_scsi_block_requests(hba);
5474
5475                         hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
5476
5477                         /* dump controller state before resetting */
5478                         if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5479                                 bool pr_prdt = !!(hba->saved_err &
5480                                                 SYSTEM_BUS_FATAL_ERROR);
5481
5482                                 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5483                                         __func__, hba->saved_err,
5484                                         hba->saved_uic_err);
5485
5486                                 ufshcd_print_host_regs(hba);
5487                                 ufshcd_print_pwr_info(hba);
5488                                 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5489                                 ufshcd_print_trs(hba, hba->outstanding_reqs,
5490                                                         pr_prdt);
5491                         }
5492                         schedule_work(&hba->eh_work);
5493                 }
5494         }
5495         /*
5496          * if (!queue_eh_work) -
5497          * Other errors are either non-fatal where host recovers
5498          * itself without s/w intervention or errors that will be
5499          * handled by the SCSI core layer.
5500          */
5501 }
5502
5503 /**
5504  * ufshcd_tmc_handler - handle task management function completion
5505  * @hba: per adapter instance
5506  */
5507 static void ufshcd_tmc_handler(struct ufs_hba *hba)
5508 {
5509         u32 tm_doorbell;
5510
5511         tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
5512         hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
5513         wake_up(&hba->tm_wq);
5514 }
5515
5516 /**
5517  * ufshcd_sl_intr - Interrupt service routine
5518  * @hba: per adapter instance
5519  * @intr_status: contains interrupts generated by the controller
5520  */
5521 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5522 {
5523         hba->errors = UFSHCD_ERROR_MASK & intr_status;
5524
5525         if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5526                 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5527
5528         if (hba->errors)
5529                 ufshcd_check_errors(hba);
5530
5531         if (intr_status & UFSHCD_UIC_MASK)
5532                 ufshcd_uic_cmd_compl(hba, intr_status);
5533
5534         if (intr_status & UTP_TASK_REQ_COMPL)
5535                 ufshcd_tmc_handler(hba);
5536
5537         if (intr_status & UTP_TRANSFER_REQ_COMPL)
5538                 ufshcd_transfer_req_compl(hba);
5539 }
5540
5541 /**
5542  * ufshcd_intr - Main interrupt service routine
5543  * @irq: irq number
5544  * @__hba: pointer to adapter instance
5545  *
5546  * Returns IRQ_HANDLED - If interrupt is valid
5547  *              IRQ_NONE - If invalid interrupt
5548  */
5549 static irqreturn_t ufshcd_intr(int irq, void *__hba)
5550 {
5551         u32 intr_status, enabled_intr_status;
5552         irqreturn_t retval = IRQ_NONE;
5553         struct ufs_hba *hba = __hba;
5554         int retries = hba->nutrs;
5555
5556         spin_lock(hba->host->host_lock);
5557         intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5558
5559         /*
5560          * There could be max of hba->nutrs reqs in flight and in worst case
5561          * if the reqs get finished 1 by 1 after the interrupt status is
5562          * read, make sure we handle them by checking the interrupt status
5563          * again in a loop until we process all of the reqs before returning.
5564          */
5565         do {
5566                 enabled_intr_status =
5567                         intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5568                 if (intr_status)
5569                         ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5570                 if (enabled_intr_status) {
5571                         ufshcd_sl_intr(hba, enabled_intr_status);
5572                         retval = IRQ_HANDLED;
5573                 }
5574
5575                 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5576         } while (intr_status && --retries);
5577
5578         spin_unlock(hba->host->host_lock);
5579         return retval;
5580 }
5581
5582 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5583 {
5584         int err = 0;
5585         u32 mask = 1 << tag;
5586         unsigned long flags;
5587
5588         if (!test_bit(tag, &hba->outstanding_tasks))
5589                 goto out;
5590
5591         spin_lock_irqsave(hba->host->host_lock, flags);
5592         ufshcd_utmrl_clear(hba, tag);
5593         spin_unlock_irqrestore(hba->host->host_lock, flags);
5594
5595         /* poll for max. 1 sec to clear door bell register by h/w */
5596         err = ufshcd_wait_for_register(hba,
5597                         REG_UTP_TASK_REQ_DOOR_BELL,
5598                         mask, 0, 1000, 1000, true);
5599 out:
5600         return err;
5601 }
5602
5603 static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5604                 struct utp_task_req_desc *treq, u8 tm_function)
5605 {
5606         struct Scsi_Host *host = hba->host;
5607         unsigned long flags;
5608         int free_slot, task_tag, err;
5609
5610         /*
5611          * Get free slot, sleep if slots are unavailable.
5612          * Even though we use wait_event() which sleeps indefinitely,
5613          * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5614          */
5615         wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
5616         ufshcd_hold(hba, false);
5617
5618         spin_lock_irqsave(host->host_lock, flags);
5619         task_tag = hba->nutrs + free_slot;
5620
5621         treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5622
5623         memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
5624         ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5625
5626         /* send command to the controller */
5627         __set_bit(free_slot, &hba->outstanding_tasks);
5628
5629         /* Make sure descriptors are ready before ringing the task doorbell */
5630         wmb();
5631
5632         ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
5633         /* Make sure that doorbell is committed immediately */
5634         wmb();
5635
5636         spin_unlock_irqrestore(host->host_lock, flags);
5637
5638         ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5639
5640         /* wait until the task management command is completed */
5641         err = wait_event_timeout(hba->tm_wq,
5642                         test_bit(free_slot, &hba->tm_condition),
5643                         msecs_to_jiffies(TM_CMD_TIMEOUT));
5644         if (!err) {
5645                 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
5646                 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5647                                 __func__, tm_function);
5648                 if (ufshcd_clear_tm_cmd(hba, free_slot))
5649                         dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5650                                         __func__, free_slot);
5651                 err = -ETIMEDOUT;
5652         } else {
5653                 err = 0;
5654                 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5655
5656                 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
5657
5658                 spin_lock_irqsave(hba->host->host_lock, flags);
5659                 __clear_bit(free_slot, &hba->outstanding_tasks);
5660                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5661
5662         }
5663
5664         clear_bit(free_slot, &hba->tm_condition);
5665         ufshcd_put_tm_slot(hba, free_slot);
5666         wake_up(&hba->tm_tag_wq);
5667
5668         ufshcd_release(hba);
5669         return err;
5670 }
5671
5672 /**
5673  * ufshcd_issue_tm_cmd - issues task management commands to controller
5674  * @hba: per adapter instance
5675  * @lun_id: LUN ID to which TM command is sent
5676  * @task_id: task ID to which the TM command is applicable
5677  * @tm_function: task management function opcode
5678  * @tm_response: task management service response return value
5679  *
5680  * Returns non-zero value on error, zero on success.
5681  */
5682 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5683                 u8 tm_function, u8 *tm_response)
5684 {
5685         struct utp_task_req_desc treq = { { 0 }, };
5686         int ocs_value, err;
5687
5688         /* Configure task request descriptor */
5689         treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5690         treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5691
5692         /* Configure task request UPIU */
5693         treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5694                                   cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5695         treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5696
5697         /*
5698          * The host shall provide the same value for LUN field in the basic
5699          * header and for Input Parameter.
5700          */
5701         treq.input_param1 = cpu_to_be32(lun_id);
5702         treq.input_param2 = cpu_to_be32(task_id);
5703
5704         err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5705         if (err == -ETIMEDOUT)
5706                 return err;
5707
5708         ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5709         if (ocs_value != OCS_SUCCESS)
5710                 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5711                                 __func__, ocs_value);
5712         else if (tm_response)
5713                 *tm_response = be32_to_cpu(treq.output_param1) &
5714                                 MASK_TM_SERVICE_RESP;
5715         return err;
5716 }
5717
5718 /**
5719  * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5720  * @hba:        per-adapter instance
5721  * @req_upiu:   upiu request
5722  * @rsp_upiu:   upiu reply
5723  * @msgcode:    message code, one of UPIU Transaction Codes Initiator to Target
5724  * @desc_buff:  pointer to descriptor buffer, NULL if NA
5725  * @buff_len:   descriptor size, 0 if NA
5726  * @desc_op:    descriptor operation
5727  *
5728  * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5729  * Therefore, it "rides" the device management infrastructure: uses its tag and
5730  * tasks work queues.
5731  *
5732  * Since there is only one available tag for device management commands,
5733  * the caller is expected to hold the hba->dev_cmd.lock mutex.
5734  */
5735 static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5736                                         struct utp_upiu_req *req_upiu,
5737                                         struct utp_upiu_req *rsp_upiu,
5738                                         u8 *desc_buff, int *buff_len,
5739                                         int cmd_type,
5740                                         enum query_opcode desc_op)
5741 {
5742         struct ufshcd_lrb *lrbp;
5743         int err = 0;
5744         int tag;
5745         struct completion wait;
5746         unsigned long flags;
5747         u32 upiu_flags;
5748
5749         down_read(&hba->clk_scaling_lock);
5750
5751         wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
5752
5753         init_completion(&wait);
5754         lrbp = &hba->lrb[tag];
5755         WARN_ON(lrbp->cmd);
5756
5757         lrbp->cmd = NULL;
5758         lrbp->sense_bufflen = 0;
5759         lrbp->sense_buffer = NULL;
5760         lrbp->task_tag = tag;
5761         lrbp->lun = 0;
5762         lrbp->intr_cmd = true;
5763         hba->dev_cmd.type = cmd_type;
5764
5765         switch (hba->ufs_version) {
5766         case UFSHCI_VERSION_10:
5767         case UFSHCI_VERSION_11:
5768                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5769                 break;
5770         default:
5771                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5772                 break;
5773         }
5774
5775         /* update the task tag in the request upiu */
5776         req_upiu->header.dword_0 |= cpu_to_be32(tag);
5777
5778         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5779
5780         /* just copy the upiu request as it is */
5781         memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5782         if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5783                 /* The Data Segment Area is optional depending upon the query
5784                  * function value. for WRITE DESCRIPTOR, the data segment
5785                  * follows right after the tsf.
5786                  */
5787                 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5788                 *buff_len = 0;
5789         }
5790
5791         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5792
5793         hba->dev_cmd.complete = &wait;
5794
5795         /* Make sure descriptors are ready before ringing the doorbell */
5796         wmb();
5797         spin_lock_irqsave(hba->host->host_lock, flags);
5798         ufshcd_send_command(hba, tag);
5799         spin_unlock_irqrestore(hba->host->host_lock, flags);
5800
5801         /*
5802          * ignore the returning value here - ufshcd_check_query_response is
5803          * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5804          * read the response directly ignoring all errors.
5805          */
5806         ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5807
5808         /* just copy the upiu response as it is */
5809         memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
5810         if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
5811                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
5812                 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
5813                                MASK_QUERY_DATA_SEG_LEN;
5814
5815                 if (*buff_len >= resp_len) {
5816                         memcpy(desc_buff, descp, resp_len);
5817                         *buff_len = resp_len;
5818                 } else {
5819                         dev_warn(hba->dev, "rsp size is bigger than buffer");
5820                         *buff_len = 0;
5821                         err = -EINVAL;
5822                 }
5823         }
5824
5825         ufshcd_put_dev_cmd_tag(hba, tag);
5826         wake_up(&hba->dev_cmd.tag_wq);
5827         up_read(&hba->clk_scaling_lock);
5828         return err;
5829 }
5830
5831 /**
5832  * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5833  * @hba:        per-adapter instance
5834  * @req_upiu:   upiu request
5835  * @rsp_upiu:   upiu reply - only 8 DW as we do not support scsi commands
5836  * @msgcode:    message code, one of UPIU Transaction Codes Initiator to Target
5837  * @desc_buff:  pointer to descriptor buffer, NULL if NA
5838  * @buff_len:   descriptor size, 0 if NA
5839  * @desc_op:    descriptor operation
5840  *
5841  * Supports UTP Transfer requests (nop and query), and UTP Task
5842  * Management requests.
5843  * It is up to the caller to fill the upiu conent properly, as it will
5844  * be copied without any further input validations.
5845  */
5846 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5847                              struct utp_upiu_req *req_upiu,
5848                              struct utp_upiu_req *rsp_upiu,
5849                              int msgcode,
5850                              u8 *desc_buff, int *buff_len,
5851                              enum query_opcode desc_op)
5852 {
5853         int err;
5854         int cmd_type = DEV_CMD_TYPE_QUERY;
5855         struct utp_task_req_desc treq = { { 0 }, };
5856         int ocs_value;
5857         u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5858
5859         switch (msgcode) {
5860         case UPIU_TRANSACTION_NOP_OUT:
5861                 cmd_type = DEV_CMD_TYPE_NOP;
5862                 /* fall through */
5863         case UPIU_TRANSACTION_QUERY_REQ:
5864                 ufshcd_hold(hba, false);
5865                 mutex_lock(&hba->dev_cmd.lock);
5866                 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5867                                                    desc_buff, buff_len,
5868                                                    cmd_type, desc_op);
5869                 mutex_unlock(&hba->dev_cmd.lock);
5870                 ufshcd_release(hba);
5871
5872                 break;
5873         case UPIU_TRANSACTION_TASK_REQ:
5874                 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5875                 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5876
5877                 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
5878
5879                 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
5880                 if (err == -ETIMEDOUT)
5881                         break;
5882
5883                 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5884                 if (ocs_value != OCS_SUCCESS) {
5885                         dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
5886                                 ocs_value);
5887                         break;
5888                 }
5889
5890                 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
5891
5892                 break;
5893         default:
5894                 err = -EINVAL;
5895
5896                 break;
5897         }
5898
5899         return err;
5900 }
5901
5902 /**
5903  * ufshcd_eh_device_reset_handler - device reset handler registered to
5904  *                                    scsi layer.
5905  * @cmd: SCSI command pointer
5906  *
5907  * Returns SUCCESS/FAILED
5908  */
5909 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
5910 {
5911         struct Scsi_Host *host;
5912         struct ufs_hba *hba;
5913         unsigned int tag;
5914         u32 pos;
5915         int err;
5916         u8 resp = 0xF;
5917         struct ufshcd_lrb *lrbp;
5918         unsigned long flags;
5919
5920         host = cmd->device->host;
5921         hba = shost_priv(host);
5922         tag = cmd->request->tag;
5923
5924         lrbp = &hba->lrb[tag];
5925         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
5926         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
5927                 if (!err)
5928                         err = resp;
5929                 goto out;
5930         }
5931
5932         /* clear the commands that were pending for corresponding LUN */
5933         for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
5934                 if (hba->lrb[pos].lun == lrbp->lun) {
5935                         err = ufshcd_clear_cmd(hba, pos);
5936                         if (err)
5937                                 break;
5938                 }
5939         }
5940         spin_lock_irqsave(host->host_lock, flags);
5941         ufshcd_transfer_req_compl(hba);
5942         spin_unlock_irqrestore(host->host_lock, flags);
5943
5944 out:
5945         hba->req_abort_count = 0;
5946         if (!err) {
5947                 err = SUCCESS;
5948         } else {
5949                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5950                 err = FAILED;
5951         }
5952         return err;
5953 }
5954
5955 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
5956 {
5957         struct ufshcd_lrb *lrbp;
5958         int tag;
5959
5960         for_each_set_bit(tag, &bitmap, hba->nutrs) {
5961                 lrbp = &hba->lrb[tag];
5962                 lrbp->req_abort_skip = true;
5963         }
5964 }
5965
5966 /**
5967  * ufshcd_abort - abort a specific command
5968  * @cmd: SCSI command pointer
5969  *
5970  * Abort the pending command in device by sending UFS_ABORT_TASK task management
5971  * command, and in host controller by clearing the door-bell register. There can
5972  * be race between controller sending the command to the device while abort is
5973  * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
5974  * really issued and then try to abort it.
5975  *
5976  * Returns SUCCESS/FAILED
5977  */
5978 static int ufshcd_abort(struct scsi_cmnd *cmd)
5979 {
5980         struct Scsi_Host *host;
5981         struct ufs_hba *hba;
5982         unsigned long flags;
5983         unsigned int tag;
5984         int err = 0;
5985         int poll_cnt;
5986         u8 resp = 0xF;
5987         struct ufshcd_lrb *lrbp;
5988         u32 reg;
5989
5990         host = cmd->device->host;
5991         hba = shost_priv(host);
5992         tag = cmd->request->tag;
5993         lrbp = &hba->lrb[tag];
5994         if (!ufshcd_valid_tag(hba, tag)) {
5995                 dev_err(hba->dev,
5996                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
5997                         __func__, tag, cmd, cmd->request);
5998                 BUG();
5999         }
6000
6001         /*
6002          * Task abort to the device W-LUN is illegal. When this command
6003          * will fail, due to spec violation, scsi err handling next step
6004          * will be to send LU reset which, again, is a spec violation.
6005          * To avoid these unnecessary/illegal step we skip to the last error
6006          * handling stage: reset and restore.
6007          */
6008         if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6009                 return ufshcd_eh_host_reset_handler(cmd);
6010
6011         ufshcd_hold(hba, false);
6012         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6013         /* If command is already aborted/completed, return SUCCESS */
6014         if (!(test_bit(tag, &hba->outstanding_reqs))) {
6015                 dev_err(hba->dev,
6016                         "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6017                         __func__, tag, hba->outstanding_reqs, reg);
6018                 goto out;
6019         }
6020
6021         if (!(reg & (1 << tag))) {
6022                 dev_err(hba->dev,
6023                 "%s: cmd was completed, but without a notifying intr, tag = %d",
6024                 __func__, tag);
6025         }
6026
6027         /* Print Transfer Request of aborted task */
6028         dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
6029
6030         /*
6031          * Print detailed info about aborted request.
6032          * As more than one request might get aborted at the same time,
6033          * print full information only for the first aborted request in order
6034          * to reduce repeated printouts. For other aborted requests only print
6035          * basic details.
6036          */
6037         scsi_print_command(hba->lrb[tag].cmd);
6038         if (!hba->req_abort_count) {
6039                 ufshcd_print_host_regs(hba);
6040                 ufshcd_print_host_state(hba);
6041                 ufshcd_print_pwr_info(hba);
6042                 ufshcd_print_trs(hba, 1 << tag, true);
6043         } else {
6044                 ufshcd_print_trs(hba, 1 << tag, false);
6045         }
6046         hba->req_abort_count++;
6047
6048         /* Skip task abort in case previous aborts failed and report failure */
6049         if (lrbp->req_abort_skip) {
6050                 err = -EIO;
6051                 goto out;
6052         }
6053
6054         for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6055                 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6056                                 UFS_QUERY_TASK, &resp);
6057                 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6058                         /* cmd pending in the device */
6059                         dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6060                                 __func__, tag);
6061                         break;
6062                 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6063                         /*
6064                          * cmd not pending in the device, check if it is
6065                          * in transition.
6066                          */
6067                         dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6068                                 __func__, tag);
6069                         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6070                         if (reg & (1 << tag)) {
6071                                 /* sleep for max. 200us to stabilize */
6072                                 usleep_range(100, 200);
6073                                 continue;
6074                         }
6075                         /* command completed already */
6076                         dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6077                                 __func__, tag);
6078                         goto out;
6079                 } else {
6080                         dev_err(hba->dev,
6081                                 "%s: no response from device. tag = %d, err %d\n",
6082                                 __func__, tag, err);
6083                         if (!err)
6084                                 err = resp; /* service response error */
6085                         goto out;
6086                 }
6087         }
6088
6089         if (!poll_cnt) {
6090                 err = -EBUSY;
6091                 goto out;
6092         }
6093
6094         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6095                         UFS_ABORT_TASK, &resp);
6096         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6097                 if (!err) {
6098                         err = resp; /* service response error */
6099                         dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6100                                 __func__, tag, err);
6101                 }
6102                 goto out;
6103         }
6104
6105         err = ufshcd_clear_cmd(hba, tag);
6106         if (err) {
6107                 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6108                         __func__, tag, err);
6109                 goto out;
6110         }
6111
6112         scsi_dma_unmap(cmd);
6113
6114         spin_lock_irqsave(host->host_lock, flags);
6115         ufshcd_outstanding_req_clear(hba, tag);
6116         hba->lrb[tag].cmd = NULL;
6117         spin_unlock_irqrestore(host->host_lock, flags);
6118
6119         clear_bit_unlock(tag, &hba->lrb_in_use);
6120         wake_up(&hba->dev_cmd.tag_wq);
6121
6122 out:
6123         if (!err) {
6124                 err = SUCCESS;
6125         } else {
6126                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6127                 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
6128                 err = FAILED;
6129         }
6130
6131         /*
6132          * This ufshcd_release() corresponds to the original scsi cmd that got
6133          * aborted here (as we won't get any IRQ for it).
6134          */
6135         ufshcd_release(hba);
6136         return err;
6137 }
6138
6139 /**
6140  * ufshcd_host_reset_and_restore - reset and restore host controller
6141  * @hba: per-adapter instance
6142  *
6143  * Note that host controller reset may issue DME_RESET to
6144  * local and remote (device) Uni-Pro stack and the attributes
6145  * are reset to default state.
6146  *
6147  * Returns zero on success, non-zero on failure
6148  */
6149 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6150 {
6151         int err;
6152         unsigned long flags;
6153
6154         /* Reset the host controller */
6155         spin_lock_irqsave(hba->host->host_lock, flags);
6156         ufshcd_hba_stop(hba, false);
6157         spin_unlock_irqrestore(hba->host->host_lock, flags);
6158
6159         /* scale up clocks to max frequency before full reinitialization */
6160         ufshcd_scale_clks(hba, true);
6161
6162         err = ufshcd_hba_enable(hba);
6163         if (err)
6164                 goto out;
6165
6166         /* Establish the link again and restore the device */
6167         err = ufshcd_probe_hba(hba);
6168
6169         if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
6170                 err = -EIO;
6171 out:
6172         if (err)
6173                 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6174
6175         return err;
6176 }
6177
6178 /**
6179  * ufshcd_reset_and_restore - reset and re-initialize host/device
6180  * @hba: per-adapter instance
6181  *
6182  * Reset and recover device, host and re-establish link. This
6183  * is helpful to recover the communication in fatal error conditions.
6184  *
6185  * Returns zero on success, non-zero on failure
6186  */
6187 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6188 {
6189         int err = 0;
6190         unsigned long flags;
6191         int retries = MAX_HOST_RESET_RETRIES;
6192
6193         do {
6194                 err = ufshcd_host_reset_and_restore(hba);
6195         } while (err && --retries);
6196
6197         /*
6198          * After reset the door-bell might be cleared, complete
6199          * outstanding requests in s/w here.
6200          */
6201         spin_lock_irqsave(hba->host->host_lock, flags);
6202         ufshcd_transfer_req_compl(hba);
6203         ufshcd_tmc_handler(hba);
6204         spin_unlock_irqrestore(hba->host->host_lock, flags);
6205
6206         return err;
6207 }
6208
6209 /**
6210  * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
6211  * @cmd: SCSI command pointer
6212  *
6213  * Returns SUCCESS/FAILED
6214  */
6215 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6216 {
6217         int err;
6218         unsigned long flags;
6219         struct ufs_hba *hba;
6220
6221         hba = shost_priv(cmd->device->host);
6222
6223         ufshcd_hold(hba, false);
6224         /*
6225          * Check if there is any race with fatal error handling.
6226          * If so, wait for it to complete. Even though fatal error
6227          * handling does reset and restore in some cases, don't assume
6228          * anything out of it. We are just avoiding race here.
6229          */
6230         do {
6231                 spin_lock_irqsave(hba->host->host_lock, flags);
6232                 if (!(work_pending(&hba->eh_work) ||
6233                             hba->ufshcd_state == UFSHCD_STATE_RESET ||
6234                             hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
6235                         break;
6236                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6237                 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
6238                 flush_work(&hba->eh_work);
6239         } while (1);
6240
6241         hba->ufshcd_state = UFSHCD_STATE_RESET;
6242         ufshcd_set_eh_in_progress(hba);
6243         spin_unlock_irqrestore(hba->host->host_lock, flags);
6244
6245         err = ufshcd_reset_and_restore(hba);
6246
6247         spin_lock_irqsave(hba->host->host_lock, flags);
6248         if (!err) {
6249                 err = SUCCESS;
6250                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6251         } else {
6252                 err = FAILED;
6253                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6254         }
6255         ufshcd_clear_eh_in_progress(hba);
6256         spin_unlock_irqrestore(hba->host->host_lock, flags);
6257
6258         ufshcd_release(hba);
6259         return err;
6260 }
6261
6262 /**
6263  * ufshcd_get_max_icc_level - calculate the ICC level
6264  * @sup_curr_uA: max. current supported by the regulator
6265  * @start_scan: row at the desc table to start scan from
6266  * @buff: power descriptor buffer
6267  *
6268  * Returns calculated max ICC level for specific regulator
6269  */
6270 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6271 {
6272         int i;
6273         int curr_uA;
6274         u16 data;
6275         u16 unit;
6276
6277         for (i = start_scan; i >= 0; i--) {
6278                 data = be16_to_cpup((__be16 *)&buff[2 * i]);
6279                 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6280                                                 ATTR_ICC_LVL_UNIT_OFFSET;
6281                 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6282                 switch (unit) {
6283                 case UFSHCD_NANO_AMP:
6284                         curr_uA = curr_uA / 1000;
6285                         break;
6286                 case UFSHCD_MILI_AMP:
6287                         curr_uA = curr_uA * 1000;
6288                         break;
6289                 case UFSHCD_AMP:
6290                         curr_uA = curr_uA * 1000 * 1000;
6291                         break;
6292                 case UFSHCD_MICRO_AMP:
6293                 default:
6294                         break;
6295                 }
6296                 if (sup_curr_uA >= curr_uA)
6297                         break;
6298         }
6299         if (i < 0) {
6300                 i = 0;
6301                 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6302         }
6303
6304         return (u32)i;
6305 }
6306
6307 /**
6308  * ufshcd_calc_icc_level - calculate the max ICC level
6309  * In case regulators are not initialized we'll return 0
6310  * @hba: per-adapter instance
6311  * @desc_buf: power descriptor buffer to extract ICC levels from.
6312  * @len: length of desc_buff
6313  *
6314  * Returns calculated ICC level
6315  */
6316 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6317                                                         u8 *desc_buf, int len)
6318 {
6319         u32 icc_level = 0;
6320
6321         if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6322                                                 !hba->vreg_info.vccq2) {
6323                 dev_err(hba->dev,
6324                         "%s: Regulator capability was not set, actvIccLevel=%d",
6325                                                         __func__, icc_level);
6326                 goto out;
6327         }
6328
6329         if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
6330                 icc_level = ufshcd_get_max_icc_level(
6331                                 hba->vreg_info.vcc->max_uA,
6332                                 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6333                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6334
6335         if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
6336                 icc_level = ufshcd_get_max_icc_level(
6337                                 hba->vreg_info.vccq->max_uA,
6338                                 icc_level,
6339                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6340
6341         if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
6342                 icc_level = ufshcd_get_max_icc_level(
6343                                 hba->vreg_info.vccq2->max_uA,
6344                                 icc_level,
6345                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6346 out:
6347         return icc_level;
6348 }
6349
6350 static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6351 {
6352         int ret;
6353         int buff_len = hba->desc_size.pwr_desc;
6354         u8 *desc_buf;
6355
6356         desc_buf = kmalloc(buff_len, GFP_KERNEL);
6357         if (!desc_buf)
6358                 return;
6359
6360         ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6361         if (ret) {
6362                 dev_err(hba->dev,
6363                         "%s: Failed reading power descriptor.len = %d ret = %d",
6364                         __func__, buff_len, ret);
6365                 goto out;
6366         }
6367
6368         hba->init_prefetch_data.icc_level =
6369                         ufshcd_find_max_sup_active_icc_level(hba,
6370                         desc_buf, buff_len);
6371         dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6372                         __func__, hba->init_prefetch_data.icc_level);
6373
6374         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6375                 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6376                 &hba->init_prefetch_data.icc_level);
6377
6378         if (ret)
6379                 dev_err(hba->dev,
6380                         "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6381                         __func__, hba->init_prefetch_data.icc_level , ret);
6382
6383 out:
6384         kfree(desc_buf);
6385 }
6386
6387 /**
6388  * ufshcd_scsi_add_wlus - Adds required W-LUs
6389  * @hba: per-adapter instance
6390  *
6391  * UFS device specification requires the UFS devices to support 4 well known
6392  * logical units:
6393  *      "REPORT_LUNS" (address: 01h)
6394  *      "UFS Device" (address: 50h)
6395  *      "RPMB" (address: 44h)
6396  *      "BOOT" (address: 30h)
6397  * UFS device's power management needs to be controlled by "POWER CONDITION"
6398  * field of SSU (START STOP UNIT) command. But this "power condition" field
6399  * will take effect only when its sent to "UFS device" well known logical unit
6400  * hence we require the scsi_device instance to represent this logical unit in
6401  * order for the UFS host driver to send the SSU command for power management.
6402  *
6403  * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6404  * Block) LU so user space process can control this LU. User space may also
6405  * want to have access to BOOT LU.
6406  *
6407  * This function adds scsi device instances for each of all well known LUs
6408  * (except "REPORT LUNS" LU).
6409  *
6410  * Returns zero on success (all required W-LUs are added successfully),
6411  * non-zero error value on failure (if failed to add any of the required W-LU).
6412  */
6413 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6414 {
6415         int ret = 0;
6416         struct scsi_device *sdev_rpmb;
6417         struct scsi_device *sdev_boot;
6418
6419         hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6420                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6421         if (IS_ERR(hba->sdev_ufs_device)) {
6422                 ret = PTR_ERR(hba->sdev_ufs_device);
6423                 hba->sdev_ufs_device = NULL;
6424                 goto out;
6425         }
6426         scsi_device_put(hba->sdev_ufs_device);
6427
6428         sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
6429                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
6430         if (IS_ERR(sdev_rpmb)) {
6431                 ret = PTR_ERR(sdev_rpmb);
6432                 goto remove_sdev_ufs_device;
6433         }
6434         scsi_device_put(sdev_rpmb);
6435
6436         sdev_boot = __scsi_add_device(hba->host, 0, 0,
6437                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6438         if (IS_ERR(sdev_boot))
6439                 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6440         else
6441                 scsi_device_put(sdev_boot);
6442         goto out;
6443
6444 remove_sdev_ufs_device:
6445         scsi_remove_device(hba->sdev_ufs_device);
6446 out:
6447         return ret;
6448 }
6449
6450 static int ufs_get_device_desc(struct ufs_hba *hba,
6451                                struct ufs_dev_desc *dev_desc)
6452 {
6453         int err;
6454         size_t buff_len;
6455         u8 model_index;
6456         u8 *desc_buf;
6457
6458         buff_len = max_t(size_t, hba->desc_size.dev_desc,
6459                          QUERY_DESC_MAX_SIZE + 1);
6460         desc_buf = kmalloc(buff_len, GFP_KERNEL);
6461         if (!desc_buf) {
6462                 err = -ENOMEM;
6463                 goto out;
6464         }
6465
6466         err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
6467         if (err) {
6468                 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6469                         __func__, err);
6470                 goto out;
6471         }
6472
6473         /*
6474          * getting vendor (manufacturerID) and Bank Index in big endian
6475          * format
6476          */
6477         dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
6478                                      desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6479
6480         model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6481
6482         /* Zero-pad entire buffer for string termination. */
6483         memset(desc_buf, 0, buff_len);
6484
6485         err = ufshcd_read_string_desc(hba, model_index, desc_buf,
6486                                       QUERY_DESC_MAX_SIZE, true/*ASCII*/);
6487         if (err) {
6488                 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6489                         __func__, err);
6490                 goto out;
6491         }
6492
6493         desc_buf[QUERY_DESC_MAX_SIZE] = '\0';
6494         strlcpy(dev_desc->model, (desc_buf + QUERY_DESC_HDR_SIZE),
6495                 min_t(u8, desc_buf[QUERY_DESC_LENGTH_OFFSET],
6496                       MAX_MODEL_LEN));
6497
6498         /* Null terminate the model string */
6499         dev_desc->model[MAX_MODEL_LEN] = '\0';
6500
6501 out:
6502         kfree(desc_buf);
6503         return err;
6504 }
6505
6506 static void ufs_fixup_device_setup(struct ufs_hba *hba,
6507                                    struct ufs_dev_desc *dev_desc)
6508 {
6509         struct ufs_dev_fix *f;
6510
6511         for (f = ufs_fixups; f->quirk; f++) {
6512                 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6513                      f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6514                     (STR_PRFX_EQUAL(f->card.model, dev_desc->model) ||
6515                      !strcmp(f->card.model, UFS_ANY_MODEL)))
6516                         hba->dev_quirks |= f->quirk;
6517         }
6518 }
6519
6520 /**
6521  * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6522  * @hba: per-adapter instance
6523  *
6524  * PA_TActivate parameter can be tuned manually if UniPro version is less than
6525  * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6526  * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6527  * the hibern8 exit latency.
6528  *
6529  * Returns zero on success, non-zero error value on failure.
6530  */
6531 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6532 {
6533         int ret = 0;
6534         u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6535
6536         ret = ufshcd_dme_peer_get(hba,
6537                                   UIC_ARG_MIB_SEL(
6538                                         RX_MIN_ACTIVATETIME_CAPABILITY,
6539                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6540                                   &peer_rx_min_activatetime);
6541         if (ret)
6542                 goto out;
6543
6544         /* make sure proper unit conversion is applied */
6545         tuned_pa_tactivate =
6546                 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6547                  / PA_TACTIVATE_TIME_UNIT_US);
6548         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6549                              tuned_pa_tactivate);
6550
6551 out:
6552         return ret;
6553 }
6554
6555 /**
6556  * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6557  * @hba: per-adapter instance
6558  *
6559  * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6560  * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6561  * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6562  * This optimal value can help reduce the hibern8 exit latency.
6563  *
6564  * Returns zero on success, non-zero error value on failure.
6565  */
6566 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6567 {
6568         int ret = 0;
6569         u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6570         u32 max_hibern8_time, tuned_pa_hibern8time;
6571
6572         ret = ufshcd_dme_get(hba,
6573                              UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6574                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6575                                   &local_tx_hibern8_time_cap);
6576         if (ret)
6577                 goto out;
6578
6579         ret = ufshcd_dme_peer_get(hba,
6580                                   UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6581                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6582                                   &peer_rx_hibern8_time_cap);
6583         if (ret)
6584                 goto out;
6585
6586         max_hibern8_time = max(local_tx_hibern8_time_cap,
6587                                peer_rx_hibern8_time_cap);
6588         /* make sure proper unit conversion is applied */
6589         tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6590                                 / PA_HIBERN8_TIME_UNIT_US);
6591         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6592                              tuned_pa_hibern8time);
6593 out:
6594         return ret;
6595 }
6596
6597 /**
6598  * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6599  * less than device PA_TACTIVATE time.
6600  * @hba: per-adapter instance
6601  *
6602  * Some UFS devices require host PA_TACTIVATE to be lower than device
6603  * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6604  * for such devices.
6605  *
6606  * Returns zero on success, non-zero error value on failure.
6607  */
6608 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6609 {
6610         int ret = 0;
6611         u32 granularity, peer_granularity;
6612         u32 pa_tactivate, peer_pa_tactivate;
6613         u32 pa_tactivate_us, peer_pa_tactivate_us;
6614         u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6615
6616         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6617                                   &granularity);
6618         if (ret)
6619                 goto out;
6620
6621         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6622                                   &peer_granularity);
6623         if (ret)
6624                 goto out;
6625
6626         if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6627             (granularity > PA_GRANULARITY_MAX_VAL)) {
6628                 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6629                         __func__, granularity);
6630                 return -EINVAL;
6631         }
6632
6633         if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6634             (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6635                 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6636                         __func__, peer_granularity);
6637                 return -EINVAL;
6638         }
6639
6640         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6641         if (ret)
6642                 goto out;
6643
6644         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6645                                   &peer_pa_tactivate);
6646         if (ret)
6647                 goto out;
6648
6649         pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6650         peer_pa_tactivate_us = peer_pa_tactivate *
6651                              gran_to_us_table[peer_granularity - 1];
6652
6653         if (pa_tactivate_us > peer_pa_tactivate_us) {
6654                 u32 new_peer_pa_tactivate;
6655
6656                 new_peer_pa_tactivate = pa_tactivate_us /
6657                                       gran_to_us_table[peer_granularity - 1];
6658                 new_peer_pa_tactivate++;
6659                 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6660                                           new_peer_pa_tactivate);
6661         }
6662
6663 out:
6664         return ret;
6665 }
6666
6667 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6668 {
6669         if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6670                 ufshcd_tune_pa_tactivate(hba);
6671                 ufshcd_tune_pa_hibern8time(hba);
6672         }
6673
6674         if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6675                 /* set 1ms timeout for PA_TACTIVATE */
6676                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
6677
6678         if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6679                 ufshcd_quirk_tune_host_pa_tactivate(hba);
6680
6681         ufshcd_vops_apply_dev_quirks(hba);
6682 }
6683
6684 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6685 {
6686         int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6687
6688         hba->ufs_stats.hibern8_exit_cnt = 0;
6689         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6690
6691         memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6692         memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6693         memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6694         memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6695         memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
6696
6697         hba->req_abort_count = 0;
6698 }
6699
6700 static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6701 {
6702         int err;
6703
6704         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6705                 &hba->desc_size.dev_desc);
6706         if (err)
6707                 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6708
6709         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6710                 &hba->desc_size.pwr_desc);
6711         if (err)
6712                 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6713
6714         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6715                 &hba->desc_size.interc_desc);
6716         if (err)
6717                 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6718
6719         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6720                 &hba->desc_size.conf_desc);
6721         if (err)
6722                 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6723
6724         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6725                 &hba->desc_size.unit_desc);
6726         if (err)
6727                 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6728
6729         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6730                 &hba->desc_size.geom_desc);
6731         if (err)
6732                 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6733         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6734                 &hba->desc_size.hlth_desc);
6735         if (err)
6736                 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6737 }
6738
6739 static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
6740 {
6741         hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6742         hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6743         hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6744         hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6745         hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6746         hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6747         hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6748 }
6749
6750 static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6751         {19200000, REF_CLK_FREQ_19_2_MHZ},
6752         {26000000, REF_CLK_FREQ_26_MHZ},
6753         {38400000, REF_CLK_FREQ_38_4_MHZ},
6754         {52000000, REF_CLK_FREQ_52_MHZ},
6755         {0, REF_CLK_FREQ_INVAL},
6756 };
6757
6758 static enum ufs_ref_clk_freq
6759 ufs_get_bref_clk_from_hz(unsigned long freq)
6760 {
6761         int i;
6762
6763         for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6764                 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6765                         return ufs_ref_clk_freqs[i].val;
6766
6767         return REF_CLK_FREQ_INVAL;
6768 }
6769
6770 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6771 {
6772         unsigned long freq;
6773
6774         freq = clk_get_rate(refclk);
6775
6776         hba->dev_ref_clk_freq =
6777                 ufs_get_bref_clk_from_hz(freq);
6778
6779         if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6780                 dev_err(hba->dev,
6781                 "invalid ref_clk setting = %ld\n", freq);
6782 }
6783
6784 static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6785 {
6786         int err;
6787         u32 ref_clk;
6788         u32 freq = hba->dev_ref_clk_freq;
6789
6790         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6791                         QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6792
6793         if (err) {
6794                 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6795                         err);
6796                 goto out;
6797         }
6798
6799         if (ref_clk == freq)
6800                 goto out; /* nothing to update */
6801
6802         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6803                         QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6804
6805         if (err) {
6806                 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6807                         ufs_ref_clk_freqs[freq].freq_hz);
6808                 goto out;
6809         }
6810
6811         dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6812                         ufs_ref_clk_freqs[freq].freq_hz);
6813
6814 out:
6815         return err;
6816 }
6817
6818 /**
6819  * ufshcd_probe_hba - probe hba to detect device and initialize
6820  * @hba: per-adapter instance
6821  *
6822  * Execute link-startup and verify device initialization
6823  */
6824 static int ufshcd_probe_hba(struct ufs_hba *hba)
6825 {
6826         struct ufs_dev_desc card = {0};
6827         int ret;
6828         ktime_t start = ktime_get();
6829
6830         ret = ufshcd_link_startup(hba);
6831         if (ret)
6832                 goto out;
6833
6834         /* set the default level for urgent bkops */
6835         hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6836         hba->is_urgent_bkops_lvl_checked = false;
6837
6838         /* Debug counters initialization */
6839         ufshcd_clear_dbg_ufs_stats(hba);
6840
6841         /* UniPro link is active now */
6842         ufshcd_set_link_active(hba);
6843
6844         /* Enable Auto-Hibernate if configured */
6845         ufshcd_auto_hibern8_enable(hba);
6846
6847         ret = ufshcd_verify_dev_init(hba);
6848         if (ret)
6849                 goto out;
6850
6851         ret = ufshcd_complete_dev_init(hba);
6852         if (ret)
6853                 goto out;
6854
6855         /* Init check for device descriptor sizes */
6856         ufshcd_init_desc_sizes(hba);
6857
6858         ret = ufs_get_device_desc(hba, &card);
6859         if (ret) {
6860                 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6861                         __func__, ret);
6862                 goto out;
6863         }
6864
6865         ufs_fixup_device_setup(hba, &card);
6866         ufshcd_tune_unipro_params(hba);
6867
6868         /* UFS device is also active now */
6869         ufshcd_set_ufs_dev_active(hba);
6870         ufshcd_force_reset_auto_bkops(hba);
6871         hba->wlun_dev_clr_ua = true;
6872
6873         if (ufshcd_get_max_pwr_mode(hba)) {
6874                 dev_err(hba->dev,
6875                         "%s: Failed getting max supported power mode\n",
6876                         __func__);
6877         } else {
6878                 /*
6879                  * Set the right value to bRefClkFreq before attempting to
6880                  * switch to HS gears.
6881                  */
6882                 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6883                         ufshcd_set_dev_ref_clk(hba);
6884                 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
6885                 if (ret) {
6886                         dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6887                                         __func__, ret);
6888                         goto out;
6889                 }
6890         }
6891
6892         /* set the state as operational after switching to desired gear */
6893         hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6894
6895         /*
6896          * If we are in error handling context or in power management callbacks
6897          * context, no need to scan the host
6898          */
6899         if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6900                 bool flag;
6901
6902                 /* clear any previous UFS device information */
6903                 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
6904                 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6905                                 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
6906                         hba->dev_info.f_power_on_wp_en = flag;
6907
6908                 if (!hba->is_init_prefetch)
6909                         ufshcd_init_icc_levels(hba);
6910
6911                 /* Add required well known logical units to scsi mid layer */
6912                 if (ufshcd_scsi_add_wlus(hba))
6913                         goto out;
6914
6915                 /* Initialize devfreq after UFS device is detected */
6916                 if (ufshcd_is_clkscaling_supported(hba)) {
6917                         memcpy(&hba->clk_scaling.saved_pwr_info.info,
6918                                 &hba->pwr_info,
6919                                 sizeof(struct ufs_pa_layer_attr));
6920                         hba->clk_scaling.saved_pwr_info.is_valid = true;
6921                         if (!hba->devfreq) {
6922                                 ret = ufshcd_devfreq_init(hba);
6923                                 if (ret)
6924                                         goto out;
6925                         }
6926                         hba->clk_scaling.is_allowed = true;
6927                 }
6928
6929                 ufs_bsg_probe(hba);
6930
6931                 scsi_scan_host(hba->host);
6932                 pm_runtime_put_sync(hba->dev);
6933         }
6934
6935         if (!hba->is_init_prefetch)
6936                 hba->is_init_prefetch = true;
6937
6938 out:
6939         /*
6940          * If we failed to initialize the device or the device is not
6941          * present, turn off the power/clocks etc.
6942          */
6943         if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6944                 pm_runtime_put_sync(hba->dev);
6945                 ufshcd_exit_clk_scaling(hba);
6946                 ufshcd_hba_exit(hba);
6947         }
6948
6949         trace_ufshcd_init(dev_name(hba->dev), ret,
6950                 ktime_to_us(ktime_sub(ktime_get(), start)),
6951                 hba->curr_dev_pwr_mode, hba->uic_link_state);
6952         return ret;
6953 }
6954
6955 /**
6956  * ufshcd_async_scan - asynchronous execution for probing hba
6957  * @data: data pointer to pass to this function
6958  * @cookie: cookie data
6959  */
6960 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6961 {
6962         struct ufs_hba *hba = (struct ufs_hba *)data;
6963
6964         ufshcd_probe_hba(hba);
6965 }
6966
6967 static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
6968 {
6969         unsigned long flags;
6970         struct Scsi_Host *host;
6971         struct ufs_hba *hba;
6972         int index;
6973         bool found = false;
6974
6975         if (!scmd || !scmd->device || !scmd->device->host)
6976                 return BLK_EH_DONE;
6977
6978         host = scmd->device->host;
6979         hba = shost_priv(host);
6980         if (!hba)
6981                 return BLK_EH_DONE;
6982
6983         spin_lock_irqsave(host->host_lock, flags);
6984
6985         for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
6986                 if (hba->lrb[index].cmd == scmd) {
6987                         found = true;
6988                         break;
6989                 }
6990         }
6991
6992         spin_unlock_irqrestore(host->host_lock, flags);
6993
6994         /*
6995          * Bypass SCSI error handling and reset the block layer timer if this
6996          * SCSI command was not actually dispatched to UFS driver, otherwise
6997          * let SCSI layer handle the error as usual.
6998          */
6999         return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
7000 }
7001
7002 static const struct attribute_group *ufshcd_driver_groups[] = {
7003         &ufs_sysfs_unit_descriptor_group,
7004         &ufs_sysfs_lun_attributes_group,
7005         NULL,
7006 };
7007
7008 static struct scsi_host_template ufshcd_driver_template = {
7009         .module                 = THIS_MODULE,
7010         .name                   = UFSHCD,
7011         .proc_name              = UFSHCD,
7012         .queuecommand           = ufshcd_queuecommand,
7013         .slave_alloc            = ufshcd_slave_alloc,
7014         .slave_configure        = ufshcd_slave_configure,
7015         .slave_destroy          = ufshcd_slave_destroy,
7016         .change_queue_depth     = ufshcd_change_queue_depth,
7017         .eh_abort_handler       = ufshcd_abort,
7018         .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7019         .eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
7020         .eh_timed_out           = ufshcd_eh_timed_out,
7021         .this_id                = -1,
7022         .sg_tablesize           = SG_ALL,
7023         .cmd_per_lun            = UFSHCD_CMD_PER_LUN,
7024         .can_queue              = UFSHCD_CAN_QUEUE,
7025         .max_host_blocked       = 1,
7026         .track_queue_depth      = 1,
7027         .sdev_groups            = ufshcd_driver_groups,
7028         .dma_boundary           = PAGE_SIZE - 1,
7029 };
7030
7031 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7032                                    int ua)
7033 {
7034         int ret;
7035
7036         if (!vreg)
7037                 return 0;
7038
7039         /*
7040          * "set_load" operation shall be required on those regulators
7041          * which specifically configured current limitation. Otherwise
7042          * zero max_uA may cause unexpected behavior when regulator is
7043          * enabled or set as high power mode.
7044          */
7045         if (!vreg->max_uA)
7046                 return 0;
7047
7048         ret = regulator_set_load(vreg->reg, ua);
7049         if (ret < 0) {
7050                 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7051                                 __func__, vreg->name, ua, ret);
7052         }
7053
7054         return ret;
7055 }
7056
7057 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7058                                          struct ufs_vreg *vreg)
7059 {
7060         return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
7061 }
7062
7063 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7064                                          struct ufs_vreg *vreg)
7065 {
7066         return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
7067 }
7068
7069 static int ufshcd_config_vreg(struct device *dev,
7070                 struct ufs_vreg *vreg, bool on)
7071 {
7072         int ret = 0;
7073         struct regulator *reg;
7074         const char *name;
7075         int min_uV, uA_load;
7076
7077         BUG_ON(!vreg);
7078
7079         reg = vreg->reg;
7080         name = vreg->name;
7081
7082         if (regulator_count_voltages(reg) > 0) {
7083                 if (vreg->min_uV && vreg->max_uV) {
7084                         min_uV = on ? vreg->min_uV : 0;
7085                         ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7086                         if (ret) {
7087                                 dev_err(dev,
7088                                         "%s: %s set voltage failed, err=%d\n",
7089                                         __func__, name, ret);
7090                                 goto out;
7091                         }
7092                 }
7093
7094                 uA_load = on ? vreg->max_uA : 0;
7095                 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7096                 if (ret)
7097                         goto out;
7098         }
7099 out:
7100         return ret;
7101 }
7102
7103 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7104 {
7105         int ret = 0;
7106
7107         if (!vreg || vreg->enabled)
7108                 goto out;
7109
7110         ret = ufshcd_config_vreg(dev, vreg, true);
7111         if (!ret)
7112                 ret = regulator_enable(vreg->reg);
7113
7114         if (!ret)
7115                 vreg->enabled = true;
7116         else
7117                 dev_err(dev, "%s: %s enable failed, err=%d\n",
7118                                 __func__, vreg->name, ret);
7119 out:
7120         return ret;
7121 }
7122
7123 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7124 {
7125         int ret = 0;
7126
7127         if (!vreg || !vreg->enabled)
7128                 goto out;
7129
7130         ret = regulator_disable(vreg->reg);
7131
7132         if (!ret) {
7133                 /* ignore errors on applying disable config */
7134                 ufshcd_config_vreg(dev, vreg, false);
7135                 vreg->enabled = false;
7136         } else {
7137                 dev_err(dev, "%s: %s disable failed, err=%d\n",
7138                                 __func__, vreg->name, ret);
7139         }
7140 out:
7141         return ret;
7142 }
7143
7144 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7145 {
7146         int ret = 0;
7147         struct device *dev = hba->dev;
7148         struct ufs_vreg_info *info = &hba->vreg_info;
7149
7150         ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7151         if (ret)
7152                 goto out;
7153
7154         ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7155         if (ret)
7156                 goto out;
7157
7158         ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7159         if (ret)
7160                 goto out;
7161
7162 out:
7163         if (ret) {
7164                 ufshcd_toggle_vreg(dev, info->vccq2, false);
7165                 ufshcd_toggle_vreg(dev, info->vccq, false);
7166                 ufshcd_toggle_vreg(dev, info->vcc, false);
7167         }
7168         return ret;
7169 }
7170
7171 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7172 {
7173         struct ufs_vreg_info *info = &hba->vreg_info;
7174
7175         return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
7176 }
7177
7178 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7179 {
7180         int ret = 0;
7181
7182         if (!vreg)
7183                 goto out;
7184
7185         vreg->reg = devm_regulator_get(dev, vreg->name);
7186         if (IS_ERR(vreg->reg)) {
7187                 ret = PTR_ERR(vreg->reg);
7188                 dev_err(dev, "%s: %s get failed, err=%d\n",
7189                                 __func__, vreg->name, ret);
7190         }
7191 out:
7192         return ret;
7193 }
7194
7195 static int ufshcd_init_vreg(struct ufs_hba *hba)
7196 {
7197         int ret = 0;
7198         struct device *dev = hba->dev;
7199         struct ufs_vreg_info *info = &hba->vreg_info;
7200
7201         ret = ufshcd_get_vreg(dev, info->vcc);
7202         if (ret)
7203                 goto out;
7204
7205         ret = ufshcd_get_vreg(dev, info->vccq);
7206         if (ret)
7207                 goto out;
7208
7209         ret = ufshcd_get_vreg(dev, info->vccq2);
7210 out:
7211         return ret;
7212 }
7213
7214 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7215 {
7216         struct ufs_vreg_info *info = &hba->vreg_info;
7217
7218         if (info)
7219                 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7220
7221         return 0;
7222 }
7223
7224 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7225                                         bool skip_ref_clk)
7226 {
7227         int ret = 0;
7228         struct ufs_clk_info *clki;
7229         struct list_head *head = &hba->clk_list_head;
7230         unsigned long flags;
7231         ktime_t start = ktime_get();
7232         bool clk_state_changed = false;
7233
7234         if (list_empty(head))
7235                 goto out;
7236
7237         /*
7238          * vendor specific setup_clocks ops may depend on clocks managed by
7239          * this standard driver hence call the vendor specific setup_clocks
7240          * before disabling the clocks managed here.
7241          */
7242         if (!on) {
7243                 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7244                 if (ret)
7245                         return ret;
7246         }
7247
7248         list_for_each_entry(clki, head, list) {
7249                 if (!IS_ERR_OR_NULL(clki->clk)) {
7250                         if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7251                                 continue;
7252
7253                         clk_state_changed = on ^ clki->enabled;
7254                         if (on && !clki->enabled) {
7255                                 ret = clk_prepare_enable(clki->clk);
7256                                 if (ret) {
7257                                         dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7258                                                 __func__, clki->name, ret);
7259                                         goto out;
7260                                 }
7261                         } else if (!on && clki->enabled) {
7262                                 clk_disable_unprepare(clki->clk);
7263                         }
7264                         clki->enabled = on;
7265                         dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7266                                         clki->name, on ? "en" : "dis");
7267                 }
7268         }
7269
7270         /*
7271          * vendor specific setup_clocks ops may depend on clocks managed by
7272          * this standard driver hence call the vendor specific setup_clocks
7273          * after enabling the clocks managed here.
7274          */
7275         if (on) {
7276                 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7277                 if (ret)
7278                         return ret;
7279         }
7280
7281 out:
7282         if (ret) {
7283                 list_for_each_entry(clki, head, list) {
7284                         if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7285                                 clk_disable_unprepare(clki->clk);
7286                 }
7287         } else if (!ret && on) {
7288                 spin_lock_irqsave(hba->host->host_lock, flags);
7289                 hba->clk_gating.state = CLKS_ON;
7290                 trace_ufshcd_clk_gating(dev_name(hba->dev),
7291                                         hba->clk_gating.state);
7292                 spin_unlock_irqrestore(hba->host->host_lock, flags);
7293         }
7294
7295         if (clk_state_changed)
7296                 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7297                         (on ? "on" : "off"),
7298                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
7299         return ret;
7300 }
7301
7302 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7303 {
7304         return  __ufshcd_setup_clocks(hba, on, false);
7305 }
7306
7307 static int ufshcd_init_clocks(struct ufs_hba *hba)
7308 {
7309         int ret = 0;
7310         struct ufs_clk_info *clki;
7311         struct device *dev = hba->dev;
7312         struct list_head *head = &hba->clk_list_head;
7313
7314         if (list_empty(head))
7315                 goto out;
7316
7317         list_for_each_entry(clki, head, list) {
7318                 if (!clki->name)
7319                         continue;
7320
7321                 clki->clk = devm_clk_get(dev, clki->name);
7322                 if (IS_ERR(clki->clk)) {
7323                         ret = PTR_ERR(clki->clk);
7324                         dev_err(dev, "%s: %s clk get failed, %d\n",
7325                                         __func__, clki->name, ret);
7326                         goto out;
7327                 }
7328
7329                 /*
7330                  * Parse device ref clk freq as per device tree "ref_clk".
7331                  * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7332                  * in ufshcd_alloc_host().
7333                  */
7334                 if (!strcmp(clki->name, "ref_clk"))
7335                         ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7336
7337                 if (clki->max_freq) {
7338                         ret = clk_set_rate(clki->clk, clki->max_freq);
7339                         if (ret) {
7340                                 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7341                                         __func__, clki->name,
7342                                         clki->max_freq, ret);
7343                                 goto out;
7344                         }
7345                         clki->curr_freq = clki->max_freq;
7346                 }
7347                 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7348                                 clki->name, clk_get_rate(clki->clk));
7349         }
7350 out:
7351         return ret;
7352 }
7353
7354 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7355 {
7356         int err = 0;
7357
7358         if (!hba->vops)
7359                 goto out;
7360
7361         err = ufshcd_vops_init(hba);
7362         if (err)
7363                 goto out;
7364
7365         err = ufshcd_vops_setup_regulators(hba, true);
7366         if (err)
7367                 goto out_exit;
7368
7369         goto out;
7370
7371 out_exit:
7372         ufshcd_vops_exit(hba);
7373 out:
7374         if (err)
7375                 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
7376                         __func__, ufshcd_get_var_name(hba), err);
7377         return err;
7378 }
7379
7380 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7381 {
7382         if (!hba->vops)
7383                 return;
7384
7385         ufshcd_vops_setup_regulators(hba, false);
7386
7387         ufshcd_vops_exit(hba);
7388 }
7389
7390 static int ufshcd_hba_init(struct ufs_hba *hba)
7391 {
7392         int err;
7393
7394         /*
7395          * Handle host controller power separately from the UFS device power
7396          * rails as it will help controlling the UFS host controller power
7397          * collapse easily which is different than UFS device power collapse.
7398          * Also, enable the host controller power before we go ahead with rest
7399          * of the initialization here.
7400          */
7401         err = ufshcd_init_hba_vreg(hba);
7402         if (err)
7403                 goto out;
7404
7405         err = ufshcd_setup_hba_vreg(hba, true);
7406         if (err)
7407                 goto out;
7408
7409         err = ufshcd_init_clocks(hba);
7410         if (err)
7411                 goto out_disable_hba_vreg;
7412
7413         err = ufshcd_setup_clocks(hba, true);
7414         if (err)
7415                 goto out_disable_hba_vreg;
7416
7417         err = ufshcd_init_vreg(hba);
7418         if (err)
7419                 goto out_disable_clks;
7420
7421         err = ufshcd_setup_vreg(hba, true);
7422         if (err)
7423                 goto out_disable_clks;
7424
7425         err = ufshcd_variant_hba_init(hba);
7426         if (err)
7427                 goto out_disable_vreg;
7428
7429         hba->is_powered = true;
7430         goto out;
7431
7432 out_disable_vreg:
7433         ufshcd_setup_vreg(hba, false);
7434 out_disable_clks:
7435         ufshcd_setup_clocks(hba, false);
7436 out_disable_hba_vreg:
7437         ufshcd_setup_hba_vreg(hba, false);
7438 out:
7439         return err;
7440 }
7441
7442 static void ufshcd_hba_exit(struct ufs_hba *hba)
7443 {
7444         if (hba->is_powered) {
7445                 ufshcd_variant_hba_exit(hba);
7446                 ufshcd_setup_vreg(hba, false);
7447                 ufshcd_suspend_clkscaling(hba);
7448                 if (ufshcd_is_clkscaling_supported(hba))
7449                         if (hba->devfreq)
7450                                 ufshcd_suspend_clkscaling(hba);
7451                 ufshcd_setup_clocks(hba, false);
7452                 ufshcd_setup_hba_vreg(hba, false);
7453                 hba->is_powered = false;
7454         }
7455 }
7456
7457 static int
7458 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
7459 {
7460         unsigned char cmd[6] = {REQUEST_SENSE,
7461                                 0,
7462                                 0,
7463                                 0,
7464                                 UFS_SENSE_SIZE,
7465                                 0};
7466         char *buffer;
7467         int ret;
7468
7469         buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
7470         if (!buffer) {
7471                 ret = -ENOMEM;
7472                 goto out;
7473         }
7474
7475         ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7476                         UFS_SENSE_SIZE, NULL, NULL,
7477                         msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
7478         if (ret)
7479                 pr_err("%s: failed with err %d\n", __func__, ret);
7480
7481         kfree(buffer);
7482 out:
7483         return ret;
7484 }
7485
7486 /**
7487  * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7488  *                           power mode
7489  * @hba: per adapter instance
7490  * @pwr_mode: device power mode to set
7491  *
7492  * Returns 0 if requested power mode is set successfully
7493  * Returns non-zero if failed to set the requested power mode
7494  */
7495 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7496                                      enum ufs_dev_pwr_mode pwr_mode)
7497 {
7498         unsigned char cmd[6] = { START_STOP };
7499         struct scsi_sense_hdr sshdr;
7500         struct scsi_device *sdp;
7501         unsigned long flags;
7502         int ret;
7503
7504         spin_lock_irqsave(hba->host->host_lock, flags);
7505         sdp = hba->sdev_ufs_device;
7506         if (sdp) {
7507                 ret = scsi_device_get(sdp);
7508                 if (!ret && !scsi_device_online(sdp)) {
7509                         ret = -ENODEV;
7510                         scsi_device_put(sdp);
7511                 }
7512         } else {
7513                 ret = -ENODEV;
7514         }
7515         spin_unlock_irqrestore(hba->host->host_lock, flags);
7516
7517         if (ret)
7518                 return ret;
7519
7520         /*
7521          * If scsi commands fail, the scsi mid-layer schedules scsi error-
7522          * handling, which would wait for host to be resumed. Since we know
7523          * we are functional while we are here, skip host resume in error
7524          * handling context.
7525          */
7526         hba->host->eh_noresume = 1;
7527         if (hba->wlun_dev_clr_ua) {
7528                 ret = ufshcd_send_request_sense(hba, sdp);
7529                 if (ret)
7530                         goto out;
7531                 /* Unit attention condition is cleared now */
7532                 hba->wlun_dev_clr_ua = false;
7533         }
7534
7535         cmd[4] = pwr_mode << 4;
7536
7537         /*
7538          * Current function would be generally called from the power management
7539          * callbacks hence set the RQF_PM flag so that it doesn't resume the
7540          * already suspended childs.
7541          */
7542         ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7543                         START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
7544         if (ret) {
7545                 sdev_printk(KERN_WARNING, sdp,
7546                             "START_STOP failed for power mode: %d, result %x\n",
7547                             pwr_mode, ret);
7548                 if (driver_byte(ret) == DRIVER_SENSE)
7549                         scsi_print_sense_hdr(sdp, NULL, &sshdr);
7550         }
7551
7552         if (!ret)
7553                 hba->curr_dev_pwr_mode = pwr_mode;
7554 out:
7555         scsi_device_put(sdp);
7556         hba->host->eh_noresume = 0;
7557         return ret;
7558 }
7559
7560 static int ufshcd_link_state_transition(struct ufs_hba *hba,
7561                                         enum uic_link_state req_link_state,
7562                                         int check_for_bkops)
7563 {
7564         int ret = 0;
7565
7566         if (req_link_state == hba->uic_link_state)
7567                 return 0;
7568
7569         if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7570                 ret = ufshcd_uic_hibern8_enter(hba);
7571                 if (!ret)
7572                         ufshcd_set_link_hibern8(hba);
7573                 else
7574                         goto out;
7575         }
7576         /*
7577          * If autobkops is enabled, link can't be turned off because
7578          * turning off the link would also turn off the device.
7579          */
7580         else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7581                    (!check_for_bkops || (check_for_bkops &&
7582                     !hba->auto_bkops_enabled))) {
7583                 /*
7584                  * Let's make sure that link is in low power mode, we are doing
7585                  * this currently by putting the link in Hibern8. Otherway to
7586                  * put the link in low power mode is to send the DME end point
7587                  * to device and then send the DME reset command to local
7588                  * unipro. But putting the link in hibern8 is much faster.
7589                  */
7590                 ret = ufshcd_uic_hibern8_enter(hba);
7591                 if (ret)
7592                         goto out;
7593                 /*
7594                  * Change controller state to "reset state" which
7595                  * should also put the link in off/reset state
7596                  */
7597                 ufshcd_hba_stop(hba, true);
7598                 /*
7599                  * TODO: Check if we need any delay to make sure that
7600                  * controller is reset
7601                  */
7602                 ufshcd_set_link_off(hba);
7603         }
7604
7605 out:
7606         return ret;
7607 }
7608
7609 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7610 {
7611         /*
7612          * It seems some UFS devices may keep drawing more than sleep current
7613          * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7614          * To avoid this situation, add 2ms delay before putting these UFS
7615          * rails in LPM mode.
7616          */
7617         if (!ufshcd_is_link_active(hba) &&
7618             hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7619                 usleep_range(2000, 2100);
7620
7621         /*
7622          * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7623          * power.
7624          *
7625          * If UFS device and link is in OFF state, all power supplies (VCC,
7626          * VCCQ, VCCQ2) can be turned off if power on write protect is not
7627          * required. If UFS link is inactive (Hibern8 or OFF state) and device
7628          * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7629          *
7630          * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7631          * in low power state which would save some power.
7632          */
7633         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7634             !hba->dev_info.is_lu_power_on_wp) {
7635                 ufshcd_setup_vreg(hba, false);
7636         } else if (!ufshcd_is_ufs_dev_active(hba)) {
7637                 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7638                 if (!ufshcd_is_link_active(hba)) {
7639                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7640                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7641                 }
7642         }
7643 }
7644
7645 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7646 {
7647         int ret = 0;
7648
7649         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7650             !hba->dev_info.is_lu_power_on_wp) {
7651                 ret = ufshcd_setup_vreg(hba, true);
7652         } else if (!ufshcd_is_ufs_dev_active(hba)) {
7653                 if (!ret && !ufshcd_is_link_active(hba)) {
7654                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7655                         if (ret)
7656                                 goto vcc_disable;
7657                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7658                         if (ret)
7659                                 goto vccq_lpm;
7660                 }
7661                 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
7662         }
7663         goto out;
7664
7665 vccq_lpm:
7666         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7667 vcc_disable:
7668         ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7669 out:
7670         return ret;
7671 }
7672
7673 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7674 {
7675         if (ufshcd_is_link_off(hba))
7676                 ufshcd_setup_hba_vreg(hba, false);
7677 }
7678
7679 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7680 {
7681         if (ufshcd_is_link_off(hba))
7682                 ufshcd_setup_hba_vreg(hba, true);
7683 }
7684
7685 /**
7686  * ufshcd_suspend - helper function for suspend operations
7687  * @hba: per adapter instance
7688  * @pm_op: desired low power operation type
7689  *
7690  * This function will try to put the UFS device and link into low power
7691  * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7692  * (System PM level).
7693  *
7694  * If this function is called during shutdown, it will make sure that
7695  * both UFS device and UFS link is powered off.
7696  *
7697  * NOTE: UFS device & link must be active before we enter in this function.
7698  *
7699  * Returns 0 for success and non-zero for failure
7700  */
7701 static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7702 {
7703         int ret = 0;
7704         enum ufs_pm_level pm_lvl;
7705         enum ufs_dev_pwr_mode req_dev_pwr_mode;
7706         enum uic_link_state req_link_state;
7707
7708         hba->pm_op_in_progress = 1;
7709         if (!ufshcd_is_shutdown_pm(pm_op)) {
7710                 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7711                          hba->rpm_lvl : hba->spm_lvl;
7712                 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7713                 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7714         } else {
7715                 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7716                 req_link_state = UIC_LINK_OFF_STATE;
7717         }
7718
7719         /*
7720          * If we can't transition into any of the low power modes
7721          * just gate the clocks.
7722          */
7723         ufshcd_hold(hba, false);
7724         hba->clk_gating.is_suspended = true;
7725
7726         if (hba->clk_scaling.is_allowed) {
7727                 cancel_work_sync(&hba->clk_scaling.suspend_work);
7728                 cancel_work_sync(&hba->clk_scaling.resume_work);
7729                 ufshcd_suspend_clkscaling(hba);
7730         }
7731
7732         if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7733                         req_link_state == UIC_LINK_ACTIVE_STATE) {
7734                 goto disable_clks;
7735         }
7736
7737         if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7738             (req_link_state == hba->uic_link_state))
7739                 goto enable_gating;
7740
7741         /* UFS device & link must be active before we enter in this function */
7742         if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7743                 ret = -EINVAL;
7744                 goto enable_gating;
7745         }
7746
7747         if (ufshcd_is_runtime_pm(pm_op)) {
7748                 if (ufshcd_can_autobkops_during_suspend(hba)) {
7749                         /*
7750                          * The device is idle with no requests in the queue,
7751                          * allow background operations if bkops status shows
7752                          * that performance might be impacted.
7753                          */
7754                         ret = ufshcd_urgent_bkops(hba);
7755                         if (ret)
7756                                 goto enable_gating;
7757                 } else {
7758                         /* make sure that auto bkops is disabled */
7759                         ufshcd_disable_auto_bkops(hba);
7760                 }
7761         }
7762
7763         if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7764              ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7765                !ufshcd_is_runtime_pm(pm_op))) {
7766                 /* ensure that bkops is disabled */
7767                 ufshcd_disable_auto_bkops(hba);
7768                 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7769                 if (ret)
7770                         goto enable_gating;
7771         }
7772
7773         ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7774         if (ret)
7775                 goto set_dev_active;
7776
7777         ufshcd_vreg_set_lpm(hba);
7778
7779 disable_clks:
7780         /*
7781          * Call vendor specific suspend callback. As these callbacks may access
7782          * vendor specific host controller register space call them before the
7783          * host clocks are ON.
7784          */
7785         ret = ufshcd_vops_suspend(hba, pm_op);
7786         if (ret)
7787                 goto set_link_active;
7788
7789         if (!ufshcd_is_link_active(hba))
7790                 ufshcd_setup_clocks(hba, false);
7791         else
7792                 /* If link is active, device ref_clk can't be switched off */
7793                 __ufshcd_setup_clocks(hba, false, true);
7794
7795         hba->clk_gating.state = CLKS_OFF;
7796         trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
7797         /*
7798          * Disable the host irq as host controller as there won't be any
7799          * host controller transaction expected till resume.
7800          */
7801         ufshcd_disable_irq(hba);
7802         /* Put the host controller in low power mode if possible */
7803         ufshcd_hba_vreg_set_lpm(hba);
7804         goto out;
7805
7806 set_link_active:
7807         if (hba->clk_scaling.is_allowed)
7808                 ufshcd_resume_clkscaling(hba);
7809         ufshcd_vreg_set_hpm(hba);
7810         if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7811                 ufshcd_set_link_active(hba);
7812         else if (ufshcd_is_link_off(hba))
7813                 ufshcd_host_reset_and_restore(hba);
7814 set_dev_active:
7815         if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7816                 ufshcd_disable_auto_bkops(hba);
7817 enable_gating:
7818         if (hba->clk_scaling.is_allowed)
7819                 ufshcd_resume_clkscaling(hba);
7820         hba->clk_gating.is_suspended = false;
7821         ufshcd_release(hba);
7822 out:
7823         hba->pm_op_in_progress = 0;
7824         return ret;
7825 }
7826
7827 /**
7828  * ufshcd_resume - helper function for resume operations
7829  * @hba: per adapter instance
7830  * @pm_op: runtime PM or system PM
7831  *
7832  * This function basically brings the UFS device, UniPro link and controller
7833  * to active state.
7834  *
7835  * Returns 0 for success and non-zero for failure
7836  */
7837 static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7838 {
7839         int ret;
7840         enum uic_link_state old_link_state;
7841
7842         hba->pm_op_in_progress = 1;
7843         old_link_state = hba->uic_link_state;
7844
7845         ufshcd_hba_vreg_set_hpm(hba);
7846         /* Make sure clocks are enabled before accessing controller */
7847         ret = ufshcd_setup_clocks(hba, true);
7848         if (ret)
7849                 goto out;
7850
7851         /* enable the host irq as host controller would be active soon */
7852         ret = ufshcd_enable_irq(hba);
7853         if (ret)
7854                 goto disable_irq_and_vops_clks;
7855
7856         ret = ufshcd_vreg_set_hpm(hba);
7857         if (ret)
7858                 goto disable_irq_and_vops_clks;
7859
7860         /*
7861          * Call vendor specific resume callback. As these callbacks may access
7862          * vendor specific host controller register space call them when the
7863          * host clocks are ON.
7864          */
7865         ret = ufshcd_vops_resume(hba, pm_op);
7866         if (ret)
7867                 goto disable_vreg;
7868
7869         if (ufshcd_is_link_hibern8(hba)) {
7870                 ret = ufshcd_uic_hibern8_exit(hba);
7871                 if (!ret)
7872                         ufshcd_set_link_active(hba);
7873                 else
7874                         goto vendor_suspend;
7875         } else if (ufshcd_is_link_off(hba)) {
7876                 ret = ufshcd_host_reset_and_restore(hba);
7877                 /*
7878                  * ufshcd_host_reset_and_restore() should have already
7879                  * set the link state as active
7880                  */
7881                 if (ret || !ufshcd_is_link_active(hba))
7882                         goto vendor_suspend;
7883         }
7884
7885         if (!ufshcd_is_ufs_dev_active(hba)) {
7886                 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7887                 if (ret)
7888                         goto set_old_link_state;
7889         }
7890
7891         if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7892                 ufshcd_enable_auto_bkops(hba);
7893         else
7894                 /*
7895                  * If BKOPs operations are urgently needed at this moment then
7896                  * keep auto-bkops enabled or else disable it.
7897                  */
7898                 ufshcd_urgent_bkops(hba);
7899
7900         hba->clk_gating.is_suspended = false;
7901
7902         if (hba->clk_scaling.is_allowed)
7903                 ufshcd_resume_clkscaling(hba);
7904
7905         /* Schedule clock gating in case of no access to UFS device yet */
7906         ufshcd_release(hba);
7907
7908         /* Enable Auto-Hibernate if configured */
7909         ufshcd_auto_hibern8_enable(hba);
7910
7911         goto out;
7912
7913 set_old_link_state:
7914         ufshcd_link_state_transition(hba, old_link_state, 0);
7915 vendor_suspend:
7916         ufshcd_vops_suspend(hba, pm_op);
7917 disable_vreg:
7918         ufshcd_vreg_set_lpm(hba);
7919 disable_irq_and_vops_clks:
7920         ufshcd_disable_irq(hba);
7921         if (hba->clk_scaling.is_allowed)
7922                 ufshcd_suspend_clkscaling(hba);
7923         ufshcd_setup_clocks(hba, false);
7924 out:
7925         hba->pm_op_in_progress = 0;
7926         return ret;
7927 }
7928
7929 /**
7930  * ufshcd_system_suspend - system suspend routine
7931  * @hba: per adapter instance
7932  *
7933  * Check the description of ufshcd_suspend() function for more details.
7934  *
7935  * Returns 0 for success and non-zero for failure
7936  */
7937 int ufshcd_system_suspend(struct ufs_hba *hba)
7938 {
7939         int ret = 0;
7940         ktime_t start = ktime_get();
7941
7942         if (!hba || !hba->is_powered)
7943                 return 0;
7944
7945         if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
7946              hba->curr_dev_pwr_mode) &&
7947             (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7948              hba->uic_link_state))
7949                 goto out;
7950
7951         if (pm_runtime_suspended(hba->dev)) {
7952                 /*
7953                  * UFS device and/or UFS link low power states during runtime
7954                  * suspend seems to be different than what is expected during
7955                  * system suspend. Hence runtime resume the devic & link and
7956                  * let the system suspend low power states to take effect.
7957                  * TODO: If resume takes longer time, we might have optimize
7958                  * it in future by not resuming everything if possible.
7959                  */
7960                 ret = ufshcd_runtime_resume(hba);
7961                 if (ret)
7962                         goto out;
7963         }
7964
7965         ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
7966 out:
7967         trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
7968                 ktime_to_us(ktime_sub(ktime_get(), start)),
7969                 hba->curr_dev_pwr_mode, hba->uic_link_state);
7970         if (!ret)
7971                 hba->is_sys_suspended = true;
7972         return ret;
7973 }
7974 EXPORT_SYMBOL(ufshcd_system_suspend);
7975
7976 /**
7977  * ufshcd_system_resume - system resume routine
7978  * @hba: per adapter instance
7979  *
7980  * Returns 0 for success and non-zero for failure
7981  */
7982
7983 int ufshcd_system_resume(struct ufs_hba *hba)
7984 {
7985         int ret = 0;
7986         ktime_t start = ktime_get();
7987
7988         if (!hba)
7989                 return -EINVAL;
7990
7991         if (!hba->is_powered || pm_runtime_suspended(hba->dev))
7992                 /*
7993                  * Let the runtime resume take care of resuming
7994                  * if runtime suspended.
7995                  */
7996                 goto out;
7997         else
7998                 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
7999 out:
8000         trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8001                 ktime_to_us(ktime_sub(ktime_get(), start)),
8002                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8003         if (!ret)
8004                 hba->is_sys_suspended = false;
8005         return ret;
8006 }
8007 EXPORT_SYMBOL(ufshcd_system_resume);
8008
8009 /**
8010  * ufshcd_runtime_suspend - runtime suspend routine
8011  * @hba: per adapter instance
8012  *
8013  * Check the description of ufshcd_suspend() function for more details.
8014  *
8015  * Returns 0 for success and non-zero for failure
8016  */
8017 int ufshcd_runtime_suspend(struct ufs_hba *hba)
8018 {
8019         int ret = 0;
8020         ktime_t start = ktime_get();
8021
8022         if (!hba)
8023                 return -EINVAL;
8024
8025         if (!hba->is_powered)
8026                 goto out;
8027         else
8028                 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8029 out:
8030         trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8031                 ktime_to_us(ktime_sub(ktime_get(), start)),
8032                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8033         return ret;
8034 }
8035 EXPORT_SYMBOL(ufshcd_runtime_suspend);
8036
8037 /**
8038  * ufshcd_runtime_resume - runtime resume routine
8039  * @hba: per adapter instance
8040  *
8041  * This function basically brings the UFS device, UniPro link and controller
8042  * to active state. Following operations are done in this function:
8043  *
8044  * 1. Turn on all the controller related clocks
8045  * 2. Bring the UniPro link out of Hibernate state
8046  * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8047  *    to active state.
8048  * 4. If auto-bkops is enabled on the device, disable it.
8049  *
8050  * So following would be the possible power state after this function return
8051  * successfully:
8052  *      S1: UFS device in Active state with VCC rail ON
8053  *          UniPro link in Active state
8054  *          All the UFS/UniPro controller clocks are ON
8055  *
8056  * Returns 0 for success and non-zero for failure
8057  */
8058 int ufshcd_runtime_resume(struct ufs_hba *hba)
8059 {
8060         int ret = 0;
8061         ktime_t start = ktime_get();
8062
8063         if (!hba)
8064                 return -EINVAL;
8065
8066         if (!hba->is_powered)
8067                 goto out;
8068         else
8069                 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8070 out:
8071         trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8072                 ktime_to_us(ktime_sub(ktime_get(), start)),
8073                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8074         return ret;
8075 }
8076 EXPORT_SYMBOL(ufshcd_runtime_resume);
8077
8078 int ufshcd_runtime_idle(struct ufs_hba *hba)
8079 {
8080         return 0;
8081 }
8082 EXPORT_SYMBOL(ufshcd_runtime_idle);
8083
8084 /**
8085  * ufshcd_shutdown - shutdown routine
8086  * @hba: per adapter instance
8087  *
8088  * This function would power off both UFS device and UFS link.
8089  *
8090  * Returns 0 always to allow force shutdown even in case of errors.
8091  */
8092 int ufshcd_shutdown(struct ufs_hba *hba)
8093 {
8094         int ret = 0;
8095
8096         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8097                 goto out;
8098
8099         if (pm_runtime_suspended(hba->dev)) {
8100                 ret = ufshcd_runtime_resume(hba);
8101                 if (ret)
8102                         goto out;
8103         }
8104
8105         ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8106 out:
8107         if (ret)
8108                 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8109         /* allow force shutdown even in case of errors */
8110         return 0;
8111 }
8112 EXPORT_SYMBOL(ufshcd_shutdown);
8113
8114 /**
8115  * ufshcd_remove - de-allocate SCSI host and host memory space
8116  *              data structure memory
8117  * @hba: per adapter instance
8118  */
8119 void ufshcd_remove(struct ufs_hba *hba)
8120 {
8121         ufs_bsg_remove(hba);
8122         ufs_sysfs_remove_nodes(hba->dev);
8123         scsi_remove_host(hba->host);
8124         /* disable interrupts */
8125         ufshcd_disable_intr(hba, hba->intr_mask);
8126         ufshcd_hba_stop(hba, true);
8127
8128         ufshcd_exit_clk_scaling(hba);
8129         ufshcd_exit_clk_gating(hba);
8130         if (ufshcd_is_clkscaling_supported(hba))
8131                 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
8132         ufshcd_hba_exit(hba);
8133 }
8134 EXPORT_SYMBOL_GPL(ufshcd_remove);
8135
8136 /**
8137  * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8138  * @hba: pointer to Host Bus Adapter (HBA)
8139  */
8140 void ufshcd_dealloc_host(struct ufs_hba *hba)
8141 {
8142         scsi_host_put(hba->host);
8143 }
8144 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8145
8146 /**
8147  * ufshcd_set_dma_mask - Set dma mask based on the controller
8148  *                       addressing capability
8149  * @hba: per adapter instance
8150  *
8151  * Returns 0 for success, non-zero for failure
8152  */
8153 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8154 {
8155         if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8156                 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8157                         return 0;
8158         }
8159         return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8160 }
8161
8162 /**
8163  * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
8164  * @dev: pointer to device handle
8165  * @hba_handle: driver private handle
8166  * Returns 0 on success, non-zero value on failure
8167  */
8168 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
8169 {
8170         struct Scsi_Host *host;
8171         struct ufs_hba *hba;
8172         int err = 0;
8173
8174         if (!dev) {
8175                 dev_err(dev,
8176                 "Invalid memory reference for dev is NULL\n");
8177                 err = -ENODEV;
8178                 goto out_error;
8179         }
8180
8181         host = scsi_host_alloc(&ufshcd_driver_template,
8182                                 sizeof(struct ufs_hba));
8183         if (!host) {
8184                 dev_err(dev, "scsi_host_alloc failed\n");
8185                 err = -ENOMEM;
8186                 goto out_error;
8187         }
8188         hba = shost_priv(host);
8189         hba->host = host;
8190         hba->dev = dev;
8191         *hba_handle = hba;
8192         hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
8193
8194         INIT_LIST_HEAD(&hba->clk_list_head);
8195
8196 out_error:
8197         return err;
8198 }
8199 EXPORT_SYMBOL(ufshcd_alloc_host);
8200
8201 /**
8202  * ufshcd_init - Driver initialization routine
8203  * @hba: per-adapter instance
8204  * @mmio_base: base register address
8205  * @irq: Interrupt line of device
8206  * Returns 0 on success, non-zero value on failure
8207  */
8208 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8209 {
8210         int err;
8211         struct Scsi_Host *host = hba->host;
8212         struct device *dev = hba->dev;
8213
8214         if (!mmio_base) {
8215                 dev_err(hba->dev,
8216                 "Invalid memory reference for mmio_base is NULL\n");
8217                 err = -ENODEV;
8218                 goto out_error;
8219         }
8220
8221         hba->mmio_base = mmio_base;
8222         hba->irq = irq;
8223
8224         /* Set descriptor lengths to specification defaults */
8225         ufshcd_def_desc_sizes(hba);
8226
8227         err = ufshcd_hba_init(hba);
8228         if (err)
8229                 goto out_error;
8230
8231         /* Read capabilities registers */
8232         ufshcd_hba_capabilities(hba);
8233
8234         /* Get UFS version supported by the controller */
8235         hba->ufs_version = ufshcd_get_ufs_version(hba);
8236
8237         if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8238             (hba->ufs_version != UFSHCI_VERSION_11) &&
8239             (hba->ufs_version != UFSHCI_VERSION_20) &&
8240             (hba->ufs_version != UFSHCI_VERSION_21))
8241                 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8242                         hba->ufs_version);
8243
8244         /* Get Interrupt bit mask per version */
8245         hba->intr_mask = ufshcd_get_intr_mask(hba);
8246
8247         err = ufshcd_set_dma_mask(hba);
8248         if (err) {
8249                 dev_err(hba->dev, "set dma mask failed\n");
8250                 goto out_disable;
8251         }
8252
8253         /* Allocate memory for host memory space */
8254         err = ufshcd_memory_alloc(hba);
8255         if (err) {
8256                 dev_err(hba->dev, "Memory allocation failed\n");
8257                 goto out_disable;
8258         }
8259
8260         /* Configure LRB */
8261         ufshcd_host_memory_configure(hba);
8262
8263         host->can_queue = hba->nutrs;
8264         host->cmd_per_lun = hba->nutrs;
8265         host->max_id = UFSHCD_MAX_ID;
8266         host->max_lun = UFS_MAX_LUNS;
8267         host->max_channel = UFSHCD_MAX_CHANNEL;
8268         host->unique_id = host->host_no;
8269         host->max_cmd_len = UFS_CDB_SIZE;
8270
8271         hba->max_pwr_info.is_valid = false;
8272
8273         /* Initailize wait queue for task management */
8274         init_waitqueue_head(&hba->tm_wq);
8275         init_waitqueue_head(&hba->tm_tag_wq);
8276
8277         /* Initialize work queues */
8278         INIT_WORK(&hba->eh_work, ufshcd_err_handler);
8279         INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
8280
8281         /* Initialize UIC command mutex */
8282         mutex_init(&hba->uic_cmd_mutex);
8283
8284         /* Initialize mutex for device management commands */
8285         mutex_init(&hba->dev_cmd.lock);
8286
8287         init_rwsem(&hba->clk_scaling_lock);
8288
8289         /* Initialize device management tag acquire wait queue */
8290         init_waitqueue_head(&hba->dev_cmd.tag_wq);
8291
8292         ufshcd_init_clk_gating(hba);
8293
8294         ufshcd_init_clk_scaling(hba);
8295
8296         /*
8297          * In order to avoid any spurious interrupt immediately after
8298          * registering UFS controller interrupt handler, clear any pending UFS
8299          * interrupt status and disable all the UFS interrupts.
8300          */
8301         ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8302                       REG_INTERRUPT_STATUS);
8303         ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8304         /*
8305          * Make sure that UFS interrupts are disabled and any pending interrupt
8306          * status is cleared before registering UFS interrupt handler.
8307          */
8308         mb();
8309
8310         /* IRQ registration */
8311         err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
8312         if (err) {
8313                 dev_err(hba->dev, "request irq failed\n");
8314                 goto exit_gating;
8315         } else {
8316                 hba->is_irq_enabled = true;
8317         }
8318
8319         err = scsi_add_host(host, hba->dev);
8320         if (err) {
8321                 dev_err(hba->dev, "scsi_add_host failed\n");
8322                 goto exit_gating;
8323         }
8324
8325         /* Host controller enable */
8326         err = ufshcd_hba_enable(hba);
8327         if (err) {
8328                 dev_err(hba->dev, "Host controller enable failed\n");
8329                 ufshcd_print_host_regs(hba);
8330                 ufshcd_print_host_state(hba);
8331                 goto out_remove_scsi_host;
8332         }
8333
8334         /*
8335          * Set the default power management level for runtime and system PM.
8336          * Default power saving mode is to keep UFS link in Hibern8 state
8337          * and UFS device in sleep state.
8338          */
8339         hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8340                                                 UFS_SLEEP_PWR_MODE,
8341                                                 UIC_LINK_HIBERN8_STATE);
8342         hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8343                                                 UFS_SLEEP_PWR_MODE,
8344                                                 UIC_LINK_HIBERN8_STATE);
8345
8346         /* Set the default auto-hiberate idle timer value to 150 ms */
8347         if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
8348                 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8349                             FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8350         }
8351
8352         /* Hold auto suspend until async scan completes */
8353         pm_runtime_get_sync(dev);
8354         atomic_set(&hba->scsi_block_reqs_cnt, 0);
8355         /*
8356          * We are assuming that device wasn't put in sleep/power-down
8357          * state exclusively during the boot stage before kernel.
8358          * This assumption helps avoid doing link startup twice during
8359          * ufshcd_probe_hba().
8360          */
8361         ufshcd_set_ufs_dev_active(hba);
8362
8363         async_schedule(ufshcd_async_scan, hba);
8364         ufs_sysfs_add_nodes(hba->dev);
8365
8366         return 0;
8367
8368 out_remove_scsi_host:
8369         scsi_remove_host(hba->host);
8370 exit_gating:
8371         ufshcd_exit_clk_scaling(hba);
8372         ufshcd_exit_clk_gating(hba);
8373 out_disable:
8374         hba->is_irq_enabled = false;
8375         ufshcd_hba_exit(hba);
8376 out_error:
8377         return err;
8378 }
8379 EXPORT_SYMBOL_GPL(ufshcd_init);
8380
8381 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8382 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
8383 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
8384 MODULE_LICENSE("GPL");
8385 MODULE_VERSION(UFSHCD_DRIVER_VERSION);