drivers/scsi/qla2xxx/qla_tmpl.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8 #include "qla_tmpl.h"
   9
  10 /* note default template is in big endian */
  11 static const uint32_t ql27xx_fwdt_default_template[] = {
  12         0x63000000, 0xa4000000, 0x7c050000, 0x00000000,
  13         0x30000000, 0x01000000, 0x00000000, 0xc0406eb4,
  14         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  15         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  16         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  17         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  18         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  19         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  20         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  21         0x00000000, 0x00000000, 0x00000000, 0x00000000,
  22         0x00000000, 0x04010000, 0x14000000, 0x00000000,
  23         0x02000000, 0x44000000, 0x09010000, 0x10000000,
  24         0x00000000, 0x02000000, 0x01010000, 0x1c000000,
  25         0x00000000, 0x02000000, 0x00600000, 0x00000000,
  26         0xc0000000, 0x01010000, 0x1c000000, 0x00000000,
  27         0x02000000, 0x00600000, 0x00000000, 0xcc000000,
  28         0x01010000, 0x1c000000, 0x00000000, 0x02000000,
  29         0x10600000, 0x00000000, 0xd4000000, 0x01010000,
  30         0x1c000000, 0x00000000, 0x02000000, 0x700f0000,
  31         0x00000060, 0xf0000000, 0x00010000, 0x18000000,
  32         0x00000000, 0x02000000, 0x00700000, 0x041000c0,
  33         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  34         0x10700000, 0x041000c0, 0x00010000, 0x18000000,
  35         0x00000000, 0x02000000, 0x40700000, 0x041000c0,
  36         0x01010000, 0x1c000000, 0x00000000, 0x02000000,
  37         0x007c0000, 0x01000000, 0xc0000000, 0x00010000,
  38         0x18000000, 0x00000000, 0x02000000, 0x007c0000,
  39         0x040300c4, 0x00010000, 0x18000000, 0x00000000,
  40         0x02000000, 0x007c0000, 0x040100c0, 0x01010000,
  41         0x1c000000, 0x00000000, 0x02000000, 0x007c0000,
  42         0x00000000, 0xc0000000, 0x00010000, 0x18000000,
  43         0x00000000, 0x02000000, 0x007c0000, 0x04200000,
  44         0x0b010000, 0x18000000, 0x00000000, 0x02000000,
  45         0x0c000000, 0x00000000, 0x02010000, 0x20000000,
  46         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  47         0xf0000000, 0x000000b0, 0x02010000, 0x20000000,
  48         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  49         0xf0000000, 0x000010b0, 0x02010000, 0x20000000,
  50         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  51         0xf0000000, 0x000020b0, 0x02010000, 0x20000000,
  52         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  53         0xf0000000, 0x000030b0, 0x02010000, 0x20000000,
  54         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  55         0xf0000000, 0x000040b0, 0x02010000, 0x20000000,
  56         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  57         0xf0000000, 0x000050b0, 0x02010000, 0x20000000,
  58         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  59         0xf0000000, 0x000060b0, 0x02010000, 0x20000000,
  60         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  61         0xf0000000, 0x000070b0, 0x02010000, 0x20000000,
  62         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  63         0xf0000000, 0x000080b0, 0x02010000, 0x20000000,
  64         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  65         0xf0000000, 0x000090b0, 0x02010000, 0x20000000,
  66         0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
  67         0xf0000000, 0x0000a0b0, 0x00010000, 0x18000000,
  68         0x00000000, 0x02000000, 0x0a000000, 0x040100c0,
  69         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  70         0x0a000000, 0x04200080, 0x00010000, 0x18000000,
  71         0x00000000, 0x02000000, 0x00be0000, 0x041000c0,
  72         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  73         0x10be0000, 0x041000c0, 0x00010000, 0x18000000,
  74         0x00000000, 0x02000000, 0x20be0000, 0x041000c0,
  75         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  76         0x30be0000, 0x041000c0, 0x00010000, 0x18000000,
  77         0x00000000, 0x02000000, 0x00b00000, 0x041000c0,
  78         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  79         0x10b00000, 0x041000c0, 0x00010000, 0x18000000,
  80         0x00000000, 0x02000000, 0x20b00000, 0x041000c0,
  81         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  82         0x30b00000, 0x041000c0, 0x00010000, 0x18000000,
  83         0x00000000, 0x02000000, 0x00300000, 0x041000c0,
  84         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  85         0x10300000, 0x041000c0, 0x00010000, 0x18000000,
  86         0x00000000, 0x02000000, 0x20300000, 0x041000c0,
  87         0x00010000, 0x18000000, 0x00000000, 0x02000000,
  88         0x30300000, 0x041000c0, 0x0a010000, 0x10000000,
  89         0x00000000, 0x02000000, 0x06010000, 0x1c000000,
  90         0x00000000, 0x02000000, 0x01000000, 0x00000200,
  91         0xff230200, 0x06010000, 0x1c000000, 0x00000000,
  92         0x02000000, 0x02000000, 0x00001000, 0x00000000,
  93         0x07010000, 0x18000000, 0x00000000, 0x02000000,
  94         0x00000000, 0x01000000, 0x07010000, 0x18000000,
  95         0x00000000, 0x02000000, 0x00000000, 0x02000000,
  96         0x07010000, 0x18000000, 0x00000000, 0x02000000,
  97         0x00000000, 0x03000000, 0x0d010000, 0x14000000,
  98         0x00000000, 0x02000000, 0x00000000, 0xff000000,
  99         0x10000000, 0x00000000, 0x00000080,
 100 };
 101
 102 static inline void __iomem *
 103 qla27xx_isp_reg(struct scsi_qla_host *vha)
 104 {
 105         return &vha->hw->iobase->isp24;
 106 }
 107
 108 static inline void
 109 qla27xx_insert16(uint16_t value, void *buf, ulong *len)
 110 {
 111         if (buf) {
 112                 buf += *len;
 113                 *(__le16 *)buf = cpu_to_le16(value);
 114         }
 115         *len += sizeof(value);
 116 }
 117
 118 static inline void
 119 qla27xx_insert32(uint32_t value, void *buf, ulong *len)
 120 {
 121         if (buf) {
 122                 buf += *len;
 123                 *(__le32 *)buf = cpu_to_le32(value);
 124         }
 125         *len += sizeof(value);
 126 }
 127
 128 static inline void
 129 qla27xx_insertbuf(void *mem, ulong size, void *buf, ulong *len)
 130 {
 131
 132         if (buf && mem && size) {
 133                 buf += *len;
 134                 memcpy(buf, mem, size);
 135         }
 136         *len += size;
 137 }
 138
 139 static inline void
 140 qla27xx_read8(void __iomem *window, void *buf, ulong *len)
 141 {
 142         uint8_t value = ~0;
 143
 144         if (buf) {
 145                 value = RD_REG_BYTE(window);
 146         }
 147         qla27xx_insert32(value, buf, len);
 148 }
 149
 150 static inline void
 151 qla27xx_read16(void __iomem *window, void *buf, ulong *len)
 152 {
 153         uint16_t value = ~0;
 154
 155         if (buf) {
 156                 value = RD_REG_WORD(window);
 157         }
 158         qla27xx_insert32(value, buf, len);
 159 }
 160
 161 static inline void
 162 qla27xx_read32(void __iomem *window, void *buf, ulong *len)
 163 {
 164         uint32_t value = ~0;
 165
 166         if (buf) {
 167                 value = RD_REG_DWORD(window);
 168         }
 169         qla27xx_insert32(value, buf, len);
 170 }
 171
 172 static inline void (*qla27xx_read_vector(uint width))(void __iomem*, void *, ulong *)
 173 {
 174         return
 175             (width == 1) ? qla27xx_read8 :
 176             (width == 2) ? qla27xx_read16 :
 177                            qla27xx_read32;
 178 }
 179
 180 static inline void
 181 qla27xx_read_reg(__iomem struct device_reg_24xx *reg,
 182         uint offset, void *buf, ulong *len)
 183 {
 184         void __iomem *window = (void __iomem *)reg + offset;
 185
 186         qla27xx_read32(window, buf, len);
 187 }
 188
 189 static inline void
 190 qla27xx_write_reg(__iomem struct device_reg_24xx *reg,
 191         uint offset, uint32_t data, void *buf)
 192 {
 193         __iomem void *window = (void __iomem *)reg + offset;
 194
 195         if (buf) {
 196                 WRT_REG_DWORD(window, data);
 197         }
 198 }
 199
 200 static inline void
 201 qla27xx_read_window(__iomem struct device_reg_24xx *reg,
 202         uint32_t addr, uint offset, uint count, uint width, void *buf,
 203         ulong *len)
 204 {
 205         void __iomem *window = (void __iomem *)reg + offset;
 206         void (*readn)(void __iomem*, void *, ulong *) = qla27xx_read_vector(width);
 207
 208         qla27xx_write_reg(reg, IOBASE_ADDR, addr, buf);
 209         while (count--) {
 210                 qla27xx_insert32(addr, buf, len);
 211                 readn(window, buf, len);
 212                 window += width;
 213                 addr++;
 214         }
 215 }
 216
 217 static inline void
 218 qla27xx_skip_entry(struct qla27xx_fwdt_entry *ent, void *buf)
 219 {
 220         if (buf)
 221                 ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY;
 222         ql_dbg(ql_dbg_misc + ql_dbg_verbose, NULL, 0xd011,
 223             "Skipping entry %d\n", ent->hdr.entry_type);
 224 }
 225
 226 static int
 227 qla27xx_fwdt_entry_t0(struct scsi_qla_host *vha,
 228         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 229 {
 230         ql_dbg(ql_dbg_misc, vha, 0xd100,
 231             "%s: nop [%lx]\n", __func__, *len);
 232         qla27xx_skip_entry(ent, buf);
 233
 234         return false;
 235 }
 236
 237 static int
 238 qla27xx_fwdt_entry_t255(struct scsi_qla_host *vha,
 239         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 240 {
 241         ql_dbg(ql_dbg_misc, vha, 0xd1ff,
 242             "%s: end [%lx]\n", __func__, *len);
 243         qla27xx_skip_entry(ent, buf);
 244
 245         /* terminate */
 246         return true;
 247 }
 248
 249 static int
 250 qla27xx_fwdt_entry_t256(struct scsi_qla_host *vha,
 251         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 252 {
 253         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 254
 255         ql_dbg(ql_dbg_misc, vha, 0xd200,
 256             "%s: rdio t1 [%lx]\n", __func__, *len);
 257         qla27xx_read_window(reg, ent->t256.base_addr, ent->t256.pci_offset,
 258             ent->t256.reg_count, ent->t256.reg_width, buf, len);
 259
 260         return false;
 261 }
 262
 263 static int
 264 qla27xx_fwdt_entry_t257(struct scsi_qla_host *vha,
 265         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 266 {
 267         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 268
 269         ql_dbg(ql_dbg_misc, vha, 0xd201,
 270             "%s: wrio t1 [%lx]\n", __func__, *len);
 271         qla27xx_write_reg(reg, IOBASE_ADDR, ent->t257.base_addr, buf);
 272         qla27xx_write_reg(reg, ent->t257.pci_offset, ent->t257.write_data, buf);
 273
 274         return false;
 275 }
 276
 277 static int
 278 qla27xx_fwdt_entry_t258(struct scsi_qla_host *vha,
 279         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 280 {
 281         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 282
 283         ql_dbg(ql_dbg_misc, vha, 0xd202,
 284             "%s: rdio t2 [%lx]\n", __func__, *len);
 285         qla27xx_write_reg(reg, ent->t258.banksel_offset, ent->t258.bank, buf);
 286         qla27xx_read_window(reg, ent->t258.base_addr, ent->t258.pci_offset,
 287             ent->t258.reg_count, ent->t258.reg_width, buf, len);
 288
 289         return false;
 290 }
 291
 292 static int
 293 qla27xx_fwdt_entry_t259(struct scsi_qla_host *vha,
 294         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 295 {
 296         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 297
 298         ql_dbg(ql_dbg_misc, vha, 0xd203,
 299             "%s: wrio t2 [%lx]\n", __func__, *len);
 300         qla27xx_write_reg(reg, IOBASE_ADDR, ent->t259.base_addr, buf);
 301         qla27xx_write_reg(reg, ent->t259.banksel_offset, ent->t259.bank, buf);
 302         qla27xx_write_reg(reg, ent->t259.pci_offset, ent->t259.write_data, buf);
 303
 304         return false;
 305 }
 306
 307 static int
 308 qla27xx_fwdt_entry_t260(struct scsi_qla_host *vha,
 309         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 310 {
 311         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 312
 313         ql_dbg(ql_dbg_misc, vha, 0xd204,
 314             "%s: rdpci [%lx]\n", __func__, *len);
 315         qla27xx_insert32(ent->t260.pci_offset, buf, len);
 316         qla27xx_read_reg(reg, ent->t260.pci_offset, buf, len);
 317
 318         return false;
 319 }
 320
 321 static int
 322 qla27xx_fwdt_entry_t261(struct scsi_qla_host *vha,
 323         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 324 {
 325         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 326
 327         ql_dbg(ql_dbg_misc, vha, 0xd205,
 328             "%s: wrpci [%lx]\n", __func__, *len);
 329         qla27xx_write_reg(reg, ent->t261.pci_offset, ent->t261.write_data, buf);
 330
 331         return false;
 332 }
 333
 334 static int
 335 qla27xx_fwdt_entry_t262(struct scsi_qla_host *vha,
 336         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 337 {
 338         ulong dwords;
 339         ulong start;
 340         ulong end;
 341
 342         ql_dbg(ql_dbg_misc, vha, 0xd206,
 343             "%s: rdram(%x) [%lx]\n", __func__, ent->t262.ram_area, *len);
 344         start = ent->t262.start_addr;
 345         end = ent->t262.end_addr;
 346
 347         if (ent->t262.ram_area == T262_RAM_AREA_CRITICAL_RAM) {
 348                 ;
 349         } else if (ent->t262.ram_area == T262_RAM_AREA_EXTERNAL_RAM) {
 350                 end = vha->hw->fw_memory_size;
 351                 if (buf)
 352                         ent->t262.end_addr = end;
 353         } else if (ent->t262.ram_area == T262_RAM_AREA_SHARED_RAM) {
 354                 start = vha->hw->fw_shared_ram_start;
 355                 end = vha->hw->fw_shared_ram_end;
 356                 if (buf) {
 357                         ent->t262.start_addr = start;
 358                         ent->t262.end_addr = end;
 359                 }
 360         } else if (ent->t262.ram_area == T262_RAM_AREA_DDR_RAM) {
 361                 start = vha->hw->fw_ddr_ram_start;
 362                 end = vha->hw->fw_ddr_ram_end;
 363                 if (buf) {
 364                         ent->t262.start_addr = start;
 365                         ent->t262.end_addr = end;
 366                 }
 367         } else {
 368                 ql_dbg(ql_dbg_misc, vha, 0xd022,
 369                     "%s: unknown area %x\n", __func__, ent->t262.ram_area);
 370                 qla27xx_skip_entry(ent, buf);
 371                 goto done;
 372         }
 373
 374         if (end < start || start == 0 || end == 0) {
 375                 ql_dbg(ql_dbg_misc, vha, 0xd023,
 376                     "%s: unusable range (start=%x end=%x)\n", __func__,
 377                     ent->t262.end_addr, ent->t262.start_addr);
 378                 qla27xx_skip_entry(ent, buf);
 379                 goto done;
 380         }
 381
 382         dwords = end - start + 1;
 383         if (buf) {
 384                 buf += *len;
 385                 qla24xx_dump_ram(vha->hw, start, buf, dwords, &buf);
 386         }
 387         *len += dwords * sizeof(uint32_t);
 388 done:
 389         return false;
 390 }
 391
 392 static int
 393 qla27xx_fwdt_entry_t263(struct scsi_qla_host *vha,
 394         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 395 {
 396         uint count = 0;
 397         uint i;
 398         uint length;
 399
 400         ql_dbg(ql_dbg_misc, vha, 0xd207,
 401             "%s: getq(%x) [%lx]\n", __func__, ent->t263.queue_type, *len);
 402         if (ent->t263.queue_type == T263_QUEUE_TYPE_REQ) {
 403                 for (i = 0; i < vha->hw->max_req_queues; i++) {
 404                         struct req_que *req = vha->hw->req_q_map[i];
 405
 406                         if (!test_bit(i, vha->hw->req_qid_map))
 407                                 continue;
 408
 409                         if (req || !buf) {
 410                                 length = req ?
 411                                     req->length : REQUEST_ENTRY_CNT_24XX;
 412                                 qla27xx_insert16(i, buf, len);
 413                                 qla27xx_insert16(length, buf, len);
 414                                 qla27xx_insertbuf(req ? req->ring : NULL,
 415                                     length * sizeof(*req->ring), buf, len);
 416                                 count++;
 417                         }
 418                 }
 419         } else if (ent->t263.queue_type == T263_QUEUE_TYPE_RSP) {
 420                 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
 421                         struct rsp_que *rsp = vha->hw->rsp_q_map[i];
 422
 423                         if (!test_bit(i, vha->hw->rsp_qid_map))
 424                                 continue;
 425
 426                         if (rsp || !buf) {
 427                                 length = rsp ?
 428                                     rsp->length : RESPONSE_ENTRY_CNT_MQ;
 429                                 qla27xx_insert16(i, buf, len);
 430                                 qla27xx_insert16(length, buf, len);
 431                                 qla27xx_insertbuf(rsp ? rsp->ring : NULL,
 432                                     length * sizeof(*rsp->ring), buf, len);
 433                                 count++;
 434                         }
 435                 }
 436         } else if (QLA_TGT_MODE_ENABLED() &&
 437             ent->t263.queue_type == T263_QUEUE_TYPE_ATIO) {
 438                 struct qla_hw_data *ha = vha->hw;
 439                 struct atio *atr = ha->tgt.atio_ring;
 440
 441                 if (atr || !buf) {
 442                         length = ha->tgt.atio_q_length;
 443                         qla27xx_insert16(0, buf, len);
 444                         qla27xx_insert16(length, buf, len);
 445                         qla27xx_insertbuf(atr, length * sizeof(*atr), buf, len);
 446                         count++;
 447                 }
 448         } else {
 449                 ql_dbg(ql_dbg_misc, vha, 0xd026,
 450                     "%s: unknown queue %x\n", __func__, ent->t263.queue_type);
 451                 qla27xx_skip_entry(ent, buf);
 452         }
 453
 454         if (buf)
 455                 ent->t263.num_queues = count;
 456
 457         return false;
 458 }
 459
 460 static int
 461 qla27xx_fwdt_entry_t264(struct scsi_qla_host *vha,
 462         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 463 {
 464         ql_dbg(ql_dbg_misc, vha, 0xd208,
 465             "%s: getfce [%lx]\n", __func__, *len);
 466         if (vha->hw->fce) {
 467                 if (buf) {
 468                         ent->t264.fce_trace_size = FCE_SIZE;
 469                         ent->t264.write_pointer = vha->hw->fce_wr;
 470                         ent->t264.base_pointer = vha->hw->fce_dma;
 471                         ent->t264.fce_enable_mb0 = vha->hw->fce_mb[0];
 472                         ent->t264.fce_enable_mb2 = vha->hw->fce_mb[2];
 473                         ent->t264.fce_enable_mb3 = vha->hw->fce_mb[3];
 474                         ent->t264.fce_enable_mb4 = vha->hw->fce_mb[4];
 475                         ent->t264.fce_enable_mb5 = vha->hw->fce_mb[5];
 476                         ent->t264.fce_enable_mb6 = vha->hw->fce_mb[6];
 477                 }
 478                 qla27xx_insertbuf(vha->hw->fce, FCE_SIZE, buf, len);
 479         } else {
 480                 ql_dbg(ql_dbg_misc, vha, 0xd027,
 481                     "%s: missing fce\n", __func__);
 482                 qla27xx_skip_entry(ent, buf);
 483         }
 484
 485         return false;
 486 }
 487
 488 static int
 489 qla27xx_fwdt_entry_t265(struct scsi_qla_host *vha,
 490         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 491 {
 492         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 493
 494         ql_dbg(ql_dbg_misc, vha, 0xd209,
 495             "%s: pause risc [%lx]\n", __func__, *len);
 496         if (buf)
 497                 qla24xx_pause_risc(reg, vha->hw);
 498
 499         return false;
 500 }
 501
 502 static int
 503 qla27xx_fwdt_entry_t266(struct scsi_qla_host *vha,
 504         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 505 {
 506         ql_dbg(ql_dbg_misc, vha, 0xd20a,
 507             "%s: reset risc [%lx]\n", __func__, *len);
 508         if (buf)
 509                 qla24xx_soft_reset(vha->hw);
 510
 511         return false;
 512 }
 513
 514 static int
 515 qla27xx_fwdt_entry_t267(struct scsi_qla_host *vha,
 516         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 517 {
 518         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 519
 520         ql_dbg(ql_dbg_misc, vha, 0xd20b,
 521             "%s: dis intr [%lx]\n", __func__, *len);
 522         qla27xx_write_reg(reg, ent->t267.pci_offset, ent->t267.data, buf);
 523
 524         return false;
 525 }
 526
 527 static int
 528 qla27xx_fwdt_entry_t268(struct scsi_qla_host *vha,
 529         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 530 {
 531         ql_dbg(ql_dbg_misc, vha, 0xd20c,
 532             "%s: gethb(%x) [%lx]\n", __func__, ent->t268.buf_type, *len);
 533         if (ent->t268.buf_type == T268_BUF_TYPE_EXTD_TRACE) {
 534                 if (vha->hw->eft) {
 535                         if (buf) {
 536                                 ent->t268.buf_size = EFT_SIZE;
 537                                 ent->t268.start_addr = vha->hw->eft_dma;
 538                         }
 539                         qla27xx_insertbuf(vha->hw->eft, EFT_SIZE, buf, len);
 540                 } else {
 541                         ql_dbg(ql_dbg_misc, vha, 0xd028,
 542                             "%s: missing eft\n", __func__);
 543                         qla27xx_skip_entry(ent, buf);
 544                 }
 545         } else {
 546                 ql_dbg(ql_dbg_misc, vha, 0xd02b,
 547                     "%s: unknown buffer %x\n", __func__, ent->t268.buf_type);
 548                 qla27xx_skip_entry(ent, buf);
 549         }
 550
 551         return false;
 552 }
 553
 554 static int
 555 qla27xx_fwdt_entry_t269(struct scsi_qla_host *vha,
 556         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 557 {
 558         ql_dbg(ql_dbg_misc, vha, 0xd20d,
 559             "%s: scratch [%lx]\n", __func__, *len);
 560         qla27xx_insert32(0xaaaaaaaa, buf, len);
 561         qla27xx_insert32(0xbbbbbbbb, buf, len);
 562         qla27xx_insert32(0xcccccccc, buf, len);
 563         qla27xx_insert32(0xdddddddd, buf, len);
 564         qla27xx_insert32(*len + sizeof(uint32_t), buf, len);
 565         if (buf)
 566                 ent->t269.scratch_size = 5 * sizeof(uint32_t);
 567
 568         return false;
 569 }
 570
 571 static int
 572 qla27xx_fwdt_entry_t270(struct scsi_qla_host *vha,
 573         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 574 {
 575         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 576         ulong dwords = ent->t270.count;
 577         ulong addr = ent->t270.addr;
 578
 579         ql_dbg(ql_dbg_misc, vha, 0xd20e,
 580             "%s: rdremreg [%lx]\n", __func__, *len);
 581         qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf);
 582         while (dwords--) {
 583                 qla27xx_write_reg(reg, 0xc0, addr|0x80000000, buf);
 584                 qla27xx_insert32(addr, buf, len);
 585                 qla27xx_read_reg(reg, 0xc4, buf, len);
 586                 addr += sizeof(uint32_t);
 587         }
 588
 589         return false;
 590 }
 591
 592 static int
 593 qla27xx_fwdt_entry_t271(struct scsi_qla_host *vha,
 594         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 595 {
 596         struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
 597         ulong addr = ent->t271.addr;
 598         ulong data = ent->t271.data;
 599
 600         ql_dbg(ql_dbg_misc, vha, 0xd20f,
 601             "%s: wrremreg [%lx]\n", __func__, *len);
 602         qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf);
 603         qla27xx_write_reg(reg, 0xc4, data, buf);
 604         qla27xx_write_reg(reg, 0xc0, addr, buf);
 605
 606         return false;
 607 }
 608
 609 static int
 610 qla27xx_fwdt_entry_t272(struct scsi_qla_host *vha,
 611         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 612 {
 613         ulong dwords = ent->t272.count;
 614         ulong start = ent->t272.addr;
 615
 616         ql_dbg(ql_dbg_misc, vha, 0xd210,
 617             "%s: rdremram [%lx]\n", __func__, *len);
 618         if (buf) {
 619                 ql_dbg(ql_dbg_misc, vha, 0xd02c,
 620                     "%s: @%lx -> (%lx dwords)\n", __func__, start, dwords);
 621                 buf += *len;
 622                 qla27xx_dump_mpi_ram(vha->hw, start, buf, dwords, &buf);
 623         }
 624         *len += dwords * sizeof(uint32_t);
 625
 626         return false;
 627 }
 628
 629 static int
 630 qla27xx_fwdt_entry_t273(struct scsi_qla_host *vha,
 631         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 632 {
 633         ulong dwords = ent->t273.count;
 634         ulong addr = ent->t273.addr;
 635         uint32_t value;
 636
 637         ql_dbg(ql_dbg_misc, vha, 0xd211,
 638             "%s: pcicfg [%lx]\n", __func__, *len);
 639         while (dwords--) {
 640                 value = ~0;
 641                 if (pci_read_config_dword(vha->hw->pdev, addr, &value))
 642                         ql_dbg(ql_dbg_misc, vha, 0xd02d,
 643                             "%s: failed pcicfg read at %lx\n", __func__, addr);
 644                 qla27xx_insert32(addr, buf, len);
 645                 qla27xx_insert32(value, buf, len);
 646                 addr += sizeof(uint32_t);
 647         }
 648
 649         return false;
 650 }
 651
 652 static int
 653 qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha,
 654         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 655 {
 656         uint count = 0;
 657         uint i;
 658
 659         ql_dbg(ql_dbg_misc, vha, 0xd212,
 660             "%s: getqsh(%x) [%lx]\n", __func__, ent->t274.queue_type, *len);
 661         if (ent->t274.queue_type == T274_QUEUE_TYPE_REQ_SHAD) {
 662                 for (i = 0; i < vha->hw->max_req_queues; i++) {
 663                         struct req_que *req = vha->hw->req_q_map[i];
 664
 665                         if (!test_bit(i, vha->hw->req_qid_map))
 666                                 continue;
 667
 668                         if (req || !buf) {
 669                                 qla27xx_insert16(i, buf, len);
 670                                 qla27xx_insert16(1, buf, len);
 671                                 qla27xx_insert32(req && req->out_ptr ?
 672                                     *req->out_ptr : 0, buf, len);
 673                                 count++;
 674                         }
 675                 }
 676         } else if (ent->t274.queue_type == T274_QUEUE_TYPE_RSP_SHAD) {
 677                 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
 678                         struct rsp_que *rsp = vha->hw->rsp_q_map[i];
 679
 680                         if (!test_bit(i, vha->hw->rsp_qid_map))
 681                                 continue;
 682
 683                         if (rsp || !buf) {
 684                                 qla27xx_insert16(i, buf, len);
 685                                 qla27xx_insert16(1, buf, len);
 686                                 qla27xx_insert32(rsp && rsp->in_ptr ?
 687                                     *rsp->in_ptr : 0, buf, len);
 688                                 count++;
 689                         }
 690                 }
 691         } else if (QLA_TGT_MODE_ENABLED() &&
 692             ent->t274.queue_type == T274_QUEUE_TYPE_ATIO_SHAD) {
 693                 struct qla_hw_data *ha = vha->hw;
 694                 struct atio *atr = ha->tgt.atio_ring_ptr;
 695
 696                 if (atr || !buf) {
 697                         qla27xx_insert16(0, buf, len);
 698                         qla27xx_insert16(1, buf, len);
 699                         qla27xx_insert32(ha->tgt.atio_q_in ?
 700                             readl(ha->tgt.atio_q_in) : 0, buf, len);
 701                         count++;
 702                 }
 703         } else {
 704                 ql_dbg(ql_dbg_misc, vha, 0xd02f,
 705                     "%s: unknown queue %x\n", __func__, ent->t274.queue_type);
 706                 qla27xx_skip_entry(ent, buf);
 707         }
 708
 709         if (buf)
 710                 ent->t274.num_queues = count;
 711
 712         if (!count)
 713                 qla27xx_skip_entry(ent, buf);
 714
 715         return false;
 716 }
 717
 718 static int
 719 qla27xx_fwdt_entry_t275(struct scsi_qla_host *vha,
 720         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 721 {
 722         ulong offset = offsetof(typeof(*ent), t275.buffer);
 723
 724         ql_dbg(ql_dbg_misc, vha, 0xd213,
 725             "%s: buffer(%x) [%lx]\n", __func__, ent->t275.length, *len);
 726         if (!ent->t275.length) {
 727                 ql_dbg(ql_dbg_misc, vha, 0xd020,
 728                     "%s: buffer zero length\n", __func__);
 729                 qla27xx_skip_entry(ent, buf);
 730                 goto done;
 731         }
 732         if (offset + ent->t275.length > ent->hdr.entry_size) {
 733                 ql_dbg(ql_dbg_misc, vha, 0xd030,
 734                     "%s: buffer overflow\n", __func__);
 735                 qla27xx_skip_entry(ent, buf);
 736                 goto done;
 737         }
 738
 739         qla27xx_insertbuf(ent->t275.buffer, ent->t275.length, buf, len);
 740 done:
 741         return false;
 742 }
 743
 744 static int
 745 qla27xx_fwdt_entry_other(struct scsi_qla_host *vha,
 746         struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
 747 {
 748         ql_dbg(ql_dbg_misc, vha, 0xd2ff,
 749             "%s: type %x [%lx]\n", __func__, ent->hdr.entry_type, *len);
 750         qla27xx_skip_entry(ent, buf);
 751
 752         return false;
 753 }
 754
 755 struct qla27xx_fwdt_entry_call {
 756         uint type;
 757         int (*call)(
 758             struct scsi_qla_host *,
 759             struct qla27xx_fwdt_entry *,
 760             void *,
 761             ulong *);
 762 };
 763
 764 static struct qla27xx_fwdt_entry_call ql27xx_fwdt_entry_call_list[] = {
 765         { ENTRY_TYPE_NOP                , qla27xx_fwdt_entry_t0    } ,
 766         { ENTRY_TYPE_TMP_END            , qla27xx_fwdt_entry_t255  } ,
 767         { ENTRY_TYPE_RD_IOB_T1          , qla27xx_fwdt_entry_t256  } ,
 768         { ENTRY_TYPE_WR_IOB_T1          , qla27xx_fwdt_entry_t257  } ,
 769         { ENTRY_TYPE_RD_IOB_T2          , qla27xx_fwdt_entry_t258  } ,
 770         { ENTRY_TYPE_WR_IOB_T2          , qla27xx_fwdt_entry_t259  } ,
 771         { ENTRY_TYPE_RD_PCI             , qla27xx_fwdt_entry_t260  } ,
 772         { ENTRY_TYPE_WR_PCI             , qla27xx_fwdt_entry_t261  } ,
 773         { ENTRY_TYPE_RD_RAM             , qla27xx_fwdt_entry_t262  } ,
 774         { ENTRY_TYPE_GET_QUEUE          , qla27xx_fwdt_entry_t263  } ,
 775         { ENTRY_TYPE_GET_FCE            , qla27xx_fwdt_entry_t264  } ,
 776         { ENTRY_TYPE_PSE_RISC           , qla27xx_fwdt_entry_t265  } ,
 777         { ENTRY_TYPE_RST_RISC           , qla27xx_fwdt_entry_t266  } ,
 778         { ENTRY_TYPE_DIS_INTR           , qla27xx_fwdt_entry_t267  } ,
 779         { ENTRY_TYPE_GET_HBUF           , qla27xx_fwdt_entry_t268  } ,
 780         { ENTRY_TYPE_SCRATCH            , qla27xx_fwdt_entry_t269  } ,
 781         { ENTRY_TYPE_RDREMREG           , qla27xx_fwdt_entry_t270  } ,
 782         { ENTRY_TYPE_WRREMREG           , qla27xx_fwdt_entry_t271  } ,
 783         { ENTRY_TYPE_RDREMRAM           , qla27xx_fwdt_entry_t272  } ,
 784         { ENTRY_TYPE_PCICFG             , qla27xx_fwdt_entry_t273  } ,
 785         { ENTRY_TYPE_GET_SHADOW         , qla27xx_fwdt_entry_t274  } ,
 786         { ENTRY_TYPE_WRITE_BUF          , qla27xx_fwdt_entry_t275  } ,
 787         { -1                            , qla27xx_fwdt_entry_other }
 788 };
 789
 790 static inline int (*qla27xx_find_entry(uint type))
 791         (struct scsi_qla_host *, struct qla27xx_fwdt_entry *, void *, ulong *)
 792 {
 793         struct qla27xx_fwdt_entry_call *list = ql27xx_fwdt_entry_call_list;
 794
 795         while (list->type < type)
 796                 list++;
 797
 798         if (list->type == type)
 799                 return list->call;
 800         return qla27xx_fwdt_entry_other;
 801 }
 802
 803 static inline void *
 804 qla27xx_next_entry(void *p)
 805 {
 806         struct qla27xx_fwdt_entry *ent = p;
 807
 808         return p + ent->hdr.entry_size;
 809 }
 810
 811 static void
 812 qla27xx_walk_template(struct scsi_qla_host *vha,
 813         struct qla27xx_fwdt_template *tmp, void *buf, ulong *len)
 814 {
 815         struct qla27xx_fwdt_entry *ent = (void *)tmp + tmp->entry_offset;
 816         ulong count = tmp->entry_count;
 817
 818         ql_dbg(ql_dbg_misc, vha, 0xd01a,
 819             "%s: entry count %lx\n", __func__, count);
 820         while (count--) {
 821                 if (qla27xx_find_entry(ent->hdr.entry_type)(vha, ent, buf, len))
 822                         break;
 823                 ent = qla27xx_next_entry(ent);
 824         }
 825
 826         if (count)
 827                 ql_dbg(ql_dbg_misc, vha, 0xd018,
 828                     "%s: residual count (%lx)\n", __func__, count);
 829
 830         if (ent->hdr.entry_type != ENTRY_TYPE_TMP_END)
 831                 ql_dbg(ql_dbg_misc, vha, 0xd019,
 832                     "%s: missing end (%lx)\n", __func__, count);
 833
 834         ql_dbg(ql_dbg_misc, vha, 0xd01b,
 835             "%s: len=%lx\n", __func__, *len);
 836
 837         if (buf) {
 838                 ql_log(ql_log_warn, vha, 0xd015,
 839                     "Firmware dump saved to temp buffer (%ld/%p)\n",
 840                     vha->host_no, vha->hw->fw_dump);
 841                 qla2x00_post_uevent_work(vha, QLA_UEVENT_CODE_FW_DUMP);
 842         }
 843 }
 844
 845 static void
 846 qla27xx_time_stamp(struct qla27xx_fwdt_template *tmp)
 847 {
 848         tmp->capture_timestamp = jiffies;
 849 }
 850
 851 static void
 852 qla27xx_driver_info(struct qla27xx_fwdt_template *tmp)
 853 {
 854         uint8_t v[] = { 0, 0, 0, 0, 0, 0 };
 855
 856         sscanf(qla2x00_version_str, "%hhu.%hhu.%hhu.%hhu.%hhu.%hhu",
 857             v+0, v+1, v+2, v+3, v+4, v+5);
 858
 859         tmp->driver_info[0] = v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0];
 860         tmp->driver_info[1] = v[5] << 8 | v[4];
 861         tmp->driver_info[2] = 0x12345678;
 862 }
 863
 864 static void
 865 qla27xx_firmware_info(struct qla27xx_fwdt_template *tmp,
 866         struct scsi_qla_host *vha)
 867 {
 868         tmp->firmware_version[0] = vha->hw->fw_major_version;
 869         tmp->firmware_version[1] = vha->hw->fw_minor_version;
 870         tmp->firmware_version[2] = vha->hw->fw_subminor_version;
 871         tmp->firmware_version[3] =
 872             vha->hw->fw_attributes_h << 16 | vha->hw->fw_attributes;
 873         tmp->firmware_version[4] =
 874             vha->hw->fw_attributes_ext[1] << 16 | vha->hw->fw_attributes_ext[0];
 875 }
 876
 877 static void
 878 ql27xx_edit_template(struct scsi_qla_host *vha,
 879         struct qla27xx_fwdt_template *tmp)
 880 {
 881         qla27xx_time_stamp(tmp);
 882         qla27xx_driver_info(tmp);
 883         qla27xx_firmware_info(tmp, vha);
 884 }
 885
 886 static inline uint32_t
 887 qla27xx_template_checksum(void *p, ulong size)
 888 {
 889         uint32_t *buf = p;
 890         uint64_t sum = 0;
 891
 892         size /= sizeof(*buf);
 893
 894         while (size--)
 895                 sum += *buf++;
 896
 897         sum = (sum & 0xffffffff) + (sum >> 32);
 898
 899         return ~sum;
 900 }
 901
 902 static inline int
 903 qla27xx_verify_template_checksum(struct qla27xx_fwdt_template *tmp)
 904 {
 905         return qla27xx_template_checksum(tmp, tmp->template_size) == 0;
 906 }
 907
 908 static inline int
 909 qla27xx_verify_template_header(struct qla27xx_fwdt_template *tmp)
 910 {
 911         return tmp->template_type == TEMPLATE_TYPE_FWDUMP;
 912 }
 913
 914 static void
 915 qla27xx_execute_fwdt_template(struct scsi_qla_host *vha)
 916 {
 917         struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template;
 918         ulong len;
 919
 920         if (qla27xx_fwdt_template_valid(tmp)) {
 921                 len = tmp->template_size;
 922                 tmp = memcpy(vha->hw->fw_dump, tmp, len);
 923                 ql27xx_edit_template(vha, tmp);
 924                 qla27xx_walk_template(vha, tmp, tmp, &len);
 925                 vha->hw->fw_dump_len = len;
 926                 vha->hw->fw_dumped = 1;
 927         }
 928 }
 929
 930 ulong
 931 qla27xx_fwdt_calculate_dump_size(struct scsi_qla_host *vha)
 932 {
 933         struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template;
 934         ulong len = 0;
 935
 936         if (qla27xx_fwdt_template_valid(tmp)) {
 937                 len = tmp->template_size;
 938                 qla27xx_walk_template(vha, tmp, NULL, &len);
 939         }
 940
 941         return len;
 942 }
 943
 944 ulong
 945 qla27xx_fwdt_template_size(void *p)
 946 {
 947         struct qla27xx_fwdt_template *tmp = p;
 948
 949         return tmp->template_size;
 950 }
 951
 952 ulong
 953 qla27xx_fwdt_template_default_size(void)
 954 {
 955         return sizeof(ql27xx_fwdt_default_template);
 956 }
 957
 958 const void *
 959 qla27xx_fwdt_template_default(void)
 960 {
 961         return ql27xx_fwdt_default_template;
 962 }
 963
 964 int
 965 qla27xx_fwdt_template_valid(void *p)
 966 {
 967         struct qla27xx_fwdt_template *tmp = p;
 968
 969         if (!qla27xx_verify_template_header(tmp)) {
 970                 ql_log(ql_log_warn, NULL, 0xd01c,
 971                     "%s: template type %x\n", __func__, tmp->template_type);
 972                 return false;
 973         }
 974
 975         if (!qla27xx_verify_template_checksum(tmp)) {
 976                 ql_log(ql_log_warn, NULL, 0xd01d,
 977                     "%s: failed template checksum\n", __func__);
 978                 return false;
 979         }
 980
 981         return true;
 982 }
 983
 984 void
 985 qla27xx_fwdump(scsi_qla_host_t *vha, int hardware_locked)
 986 {
 987         ulong flags = 0;
 988
 989 #ifndef __CHECKER__
 990         if (!hardware_locked)
 991                 spin_lock_irqsave(&vha->hw->hardware_lock, flags);
 992 #endif
 993
 994         if (!vha->hw->fw_dump)
 995                 ql_log(ql_log_warn, vha, 0xd01e, "fwdump buffer missing.\n");
 996         else if (!vha->hw->fw_dump_template)
 997                 ql_log(ql_log_warn, vha, 0xd01f, "fwdump template missing.\n");
 998         else if (vha->hw->fw_dumped)
 999                 ql_log(ql_log_warn, vha, 0xd300,
1000                     "Firmware has been previously dumped (%p),"
1001                     " -- ignoring request\n", vha->hw->fw_dump);
1002         else
1003                 qla27xx_execute_fwdt_template(vha);
1004
1005 #ifndef __CHECKER__
1006         if (!hardware_locked)
1007                 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
1008 #endif
1009 }