drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <scsi/scsi_tcq.h>
  18 #include <scsi/scsicam.h>
  19 #include <scsi/scsi_transport.h>
  20 #include <scsi/scsi_transport_fc.h>
  21
  22 #include "qla_target.h"
  23
  24 /*
  25  * Driver version
  26  */
  27 char qla2x00_version_str[40];
  28
  29 static int apidev_major;
  30
  31 /*
  32  * SRB allocation cache
  33  */
  34 struct kmem_cache *srb_cachep;
  35
  36 /*
  37  * CT6 CTX allocation cache
  38  */
  39 static struct kmem_cache *ctx_cachep;
  40 /*
  41  * error level for logging
  42  */
  43 int ql_errlev = ql_log_all;
  44
  45 static int ql2xenableclass2;
  46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  47 MODULE_PARM_DESC(ql2xenableclass2,
  48                 "Specify if Class 2 operations are supported from the very "
  49                 "beginning. Default is 0 - class 2 not supported.");
  50
  51
  52 int ql2xlogintimeout = 20;
  53 module_param(ql2xlogintimeout, int, S_IRUGO);
  54 MODULE_PARM_DESC(ql2xlogintimeout,
  55                 "Login timeout value in seconds.");
  56
  57 int qlport_down_retry;
  58 module_param(qlport_down_retry, int, S_IRUGO);
  59 MODULE_PARM_DESC(qlport_down_retry,
  60                 "Maximum number of command retries to a port that returns "
  61                 "a PORT-DOWN status.");
  62
  63 int ql2xplogiabsentdevice;
  64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  66                 "Option to enable PLOGI to devices that are not present after "
  67                 "a Fabric scan.  This is needed for several broken switches. "
  68                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  69
  70 int ql2xloginretrycount = 0;
  71 module_param(ql2xloginretrycount, int, S_IRUGO);
  72 MODULE_PARM_DESC(ql2xloginretrycount,
  73                 "Specify an alternate value for the NVRAM login retry count.");
  74
  75 int ql2xallocfwdump = 1;
  76 module_param(ql2xallocfwdump, int, S_IRUGO);
  77 MODULE_PARM_DESC(ql2xallocfwdump,
  78                 "Option to enable allocation of memory for a firmware dump "
  79                 "during HBA initialization.  Memory allocation requirements "
  80                 "vary by ISP type.  Default is 1 - allocate memory.");
  81
  82 int ql2xextended_error_logging;
  83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  85 MODULE_PARM_DESC(ql2xextended_error_logging,
  86                 "Option to enable extended error logging,\n"
  87                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  88                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  89                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  90                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  91                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  92                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  93                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  94                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  95                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  96                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  97                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  98                 "\t\t0x1e400000 - Preferred value for capturing essential "
  99                 "debug information (equivalent to old "
 100                 "ql2xextended_error_logging=1).\n"
 101                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 102
 103 int ql2xshiftctondsd = 6;
 104 module_param(ql2xshiftctondsd, int, S_IRUGO);
 105 MODULE_PARM_DESC(ql2xshiftctondsd,
 106                 "Set to control shifting of command type processing "
 107                 "based on total number of SG elements.");
 108
 109 int ql2xfdmienable=1;
 110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 112 MODULE_PARM_DESC(ql2xfdmienable,
 113                 "Enables FDMI registrations. "
 114                 "0 - no FDMI. Default is 1 - perform FDMI.");
 115
 116 #define MAX_Q_DEPTH     64
 117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xmaxqdepth,
 120                 "Maximum queue depth to set for each LUN. "
 121                 "Default is 64.");
 122
 123 #if (IS_ENABLED(CONFIG_NVME_FC))
 124 int ql2xenabledif;
 125 #else
 126 int ql2xenabledif = 2;
 127 #endif
 128 module_param(ql2xenabledif, int, S_IRUGO);
 129 MODULE_PARM_DESC(ql2xenabledif,
 130                 " Enable T10-CRC-DIF:\n"
 131                 " Default is 2.\n"
 132                 "  0 -- No DIF Support\n"
 133                 "  1 -- Enable DIF for all types\n"
 134                 "  2 -- Enable DIF for all types, except Type 0.\n");
 135
 136 #if (IS_ENABLED(CONFIG_NVME_FC))
 137 int ql2xnvmeenable = 1;
 138 #else
 139 int ql2xnvmeenable;
 140 #endif
 141 module_param(ql2xnvmeenable, int, 0644);
 142 MODULE_PARM_DESC(ql2xnvmeenable,
 143     "Enables NVME support. "
 144     "0 - no NVMe.  Default is Y");
 145
 146 int ql2xenablehba_err_chk = 2;
 147 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 148 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 149                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 150                 " Default is 2.\n"
 151                 "  0 -- Error isolation disabled\n"
 152                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 153                 "  2 -- Error isolation enabled for all Types\n");
 154
 155 int ql2xiidmaenable=1;
 156 module_param(ql2xiidmaenable, int, S_IRUGO);
 157 MODULE_PARM_DESC(ql2xiidmaenable,
 158                 "Enables iIDMA settings "
 159                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 160
 161 int ql2xmqsupport = 1;
 162 module_param(ql2xmqsupport, int, S_IRUGO);
 163 MODULE_PARM_DESC(ql2xmqsupport,
 164                 "Enable on demand multiple queue pairs support "
 165                 "Default is 1 for supported. "
 166                 "Set it to 0 to turn off mq qpair support.");
 167
 168 int ql2xfwloadbin;
 169 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 170 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 171 MODULE_PARM_DESC(ql2xfwloadbin,
 172                 "Option to specify location from which to load ISP firmware:.\n"
 173                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 174                 "      interface.\n"
 175                 " 1 -- load firmware from flash.\n"
 176                 " 0 -- use default semantics.\n");
 177
 178 int ql2xetsenable;
 179 module_param(ql2xetsenable, int, S_IRUGO);
 180 MODULE_PARM_DESC(ql2xetsenable,
 181                 "Enables firmware ETS burst."
 182                 "Default is 0 - skip ETS enablement.");
 183
 184 int ql2xdbwr = 1;
 185 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 186 MODULE_PARM_DESC(ql2xdbwr,
 187                 "Option to specify scheme for request queue posting.\n"
 188                 " 0 -- Regular doorbell.\n"
 189                 " 1 -- CAMRAM doorbell (faster).\n");
 190
 191 int ql2xtargetreset = 1;
 192 module_param(ql2xtargetreset, int, S_IRUGO);
 193 MODULE_PARM_DESC(ql2xtargetreset,
 194                  "Enable target reset."
 195                  "Default is 1 - use hw defaults.");
 196
 197 int ql2xgffidenable;
 198 module_param(ql2xgffidenable, int, S_IRUGO);
 199 MODULE_PARM_DESC(ql2xgffidenable,
 200                 "Enables GFF_ID checks of port type. "
 201                 "Default is 0 - Do not use GFF_ID information.");
 202
 203 int ql2xasynctmfenable = 1;
 204 module_param(ql2xasynctmfenable, int, S_IRUGO);
 205 MODULE_PARM_DESC(ql2xasynctmfenable,
 206                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 207                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 208
 209 int ql2xdontresethba;
 210 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 211 MODULE_PARM_DESC(ql2xdontresethba,
 212                 "Option to specify reset behaviour.\n"
 213                 " 0 (Default) -- Reset on failure.\n"
 214                 " 1 -- Do not reset on failure.\n");
 215
 216 uint64_t ql2xmaxlun = MAX_LUNS;
 217 module_param(ql2xmaxlun, ullong, S_IRUGO);
 218 MODULE_PARM_DESC(ql2xmaxlun,
 219                 "Defines the maximum LU number to register with the SCSI "
 220                 "midlayer. Default is 65535.");
 221
 222 int ql2xmdcapmask = 0x1F;
 223 module_param(ql2xmdcapmask, int, S_IRUGO);
 224 MODULE_PARM_DESC(ql2xmdcapmask,
 225                 "Set the Minidump driver capture mask level. "
 226                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 227
 228 int ql2xmdenable = 1;
 229 module_param(ql2xmdenable, int, S_IRUGO);
 230 MODULE_PARM_DESC(ql2xmdenable,
 231                 "Enable/disable MiniDump. "
 232                 "0 - MiniDump disabled. "
 233                 "1 (Default) - MiniDump enabled.");
 234
 235 int ql2xexlogins = 0;
 236 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 237 MODULE_PARM_DESC(ql2xexlogins,
 238                  "Number of extended Logins. "
 239                  "0 (Default)- Disabled.");
 240
 241 int ql2xexchoffld = 1024;
 242 module_param(ql2xexchoffld, uint, 0644);
 243 MODULE_PARM_DESC(ql2xexchoffld,
 244         "Number of target exchanges.");
 245
 246 int ql2xiniexchg = 1024;
 247 module_param(ql2xiniexchg, uint, 0644);
 248 MODULE_PARM_DESC(ql2xiniexchg,
 249         "Number of initiator exchanges.");
 250
 251 int ql2xfwholdabts = 0;
 252 module_param(ql2xfwholdabts, int, S_IRUGO);
 253 MODULE_PARM_DESC(ql2xfwholdabts,
 254                 "Allow FW to hold status IOCB until ABTS rsp received. "
 255                 "0 (Default) Do not set fw option. "
 256                 "1 - Set fw option to hold ABTS.");
 257
 258 int ql2xmvasynctoatio = 1;
 259 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 260 MODULE_PARM_DESC(ql2xmvasynctoatio,
 261                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 262                 "0 (Default). Do not move IOCBs"
 263                 "1 - Move IOCBs.");
 264
 265 int ql2xautodetectsfp = 1;
 266 module_param(ql2xautodetectsfp, int, 0444);
 267 MODULE_PARM_DESC(ql2xautodetectsfp,
 268                  "Detect SFP range and set appropriate distance.\n"
 269                  "1 (Default): Enable\n");
 270
 271 /*
 272  * SCSI host template entry points
 273  */
 274 static int qla2xxx_slave_configure(struct scsi_device * device);
 275 static int qla2xxx_slave_alloc(struct scsi_device *);
 276 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 277 static void qla2xxx_scan_start(struct Scsi_Host *);
 278 static void qla2xxx_slave_destroy(struct scsi_device *);
 279 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 280 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 281 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 282 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 283 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 284 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 285
 286 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 287 static void qla2x00_free_device(scsi_qla_host_t *);
 288 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 289 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 290 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 291
 292 struct scsi_host_template qla2xxx_driver_template = {
 293         .module                 = THIS_MODULE,
 294         .name                   = QLA2XXX_DRIVER_NAME,
 295         .queuecommand           = qla2xxx_queuecommand,
 296
 297         .eh_timed_out           = fc_eh_timed_out,
 298         .eh_abort_handler       = qla2xxx_eh_abort,
 299         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 300         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 301         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 302         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 303
 304         .slave_configure        = qla2xxx_slave_configure,
 305
 306         .slave_alloc            = qla2xxx_slave_alloc,
 307         .slave_destroy          = qla2xxx_slave_destroy,
 308         .scan_finished          = qla2xxx_scan_finished,
 309         .scan_start             = qla2xxx_scan_start,
 310         .change_queue_depth     = scsi_change_queue_depth,
 311         .map_queues             = qla2xxx_map_queues,
 312         .this_id                = -1,
 313         .cmd_per_lun            = 3,
 314         .use_clustering         = ENABLE_CLUSTERING,
 315         .sg_tablesize           = SG_ALL,
 316
 317         .max_sectors            = 0xFFFF,
 318         .shost_attrs            = qla2x00_host_attrs,
 319
 320         .supported_mode         = MODE_INITIATOR,
 321         .track_queue_depth      = 1,
 322 };
 323
 324 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 325 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 326
 327 /* TODO Convert to inlines
 328  *
 329  * Timer routines
 330  */
 331
 332 __inline__ void
 333 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 334 {
 335         init_timer(&vha->timer);
 336         vha->timer.expires = jiffies + interval * HZ;
 337         vha->timer.data = (unsigned long)vha;
 338         vha->timer.function = (void (*)(unsigned long))func;
 339         add_timer(&vha->timer);
 340         vha->timer_active = 1;
 341 }
 342
 343 static inline void
 344 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 345 {
 346         /* Currently used for 82XX only. */
 347         if (vha->device_flags & DFLG_DEV_FAILED) {
 348                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 349                     "Device in a failed state, returning.\n");
 350                 return;
 351         }
 352
 353         mod_timer(&vha->timer, jiffies + interval * HZ);
 354 }
 355
 356 static __inline__ void
 357 qla2x00_stop_timer(scsi_qla_host_t *vha)
 358 {
 359         del_timer_sync(&vha->timer);
 360         vha->timer_active = 0;
 361 }
 362
 363 static int qla2x00_do_dpc(void *data);
 364
 365 static void qla2x00_rst_aen(scsi_qla_host_t *);
 366
 367 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 368         struct req_que **, struct rsp_que **);
 369 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 370 static void qla2x00_mem_free(struct qla_hw_data *);
 371 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 372         struct qla_qpair *qpair);
 373
 374 /* -------------------------------------------------------------------------- */
 375 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 376     struct rsp_que *rsp)
 377 {
 378         struct qla_hw_data *ha = vha->hw;
 379         rsp->qpair = ha->base_qpair;
 380         rsp->req = req;
 381         ha->base_qpair->req = req;
 382         ha->base_qpair->rsp = rsp;
 383         ha->base_qpair->vha = vha;
 384         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 385         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 386         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 387         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 388         INIT_LIST_HEAD(&ha->base_qpair->nvme_done_list);
 389         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 390         /* init qpair to this cpu. Will adjust at run time. */
 391         qla_cpu_update(rsp->qpair, smp_processor_id());
 392         ha->base_qpair->pdev = ha->pdev;
 393
 394         if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
 395                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 396 }
 397
 398 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 399                                 struct rsp_que *rsp)
 400 {
 401         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 402         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 403                                 GFP_KERNEL);
 404         if (!ha->req_q_map) {
 405                 ql_log(ql_log_fatal, vha, 0x003b,
 406                     "Unable to allocate memory for request queue ptrs.\n");
 407                 goto fail_req_map;
 408         }
 409
 410         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 411                                 GFP_KERNEL);
 412         if (!ha->rsp_q_map) {
 413                 ql_log(ql_log_fatal, vha, 0x003c,
 414                     "Unable to allocate memory for response queue ptrs.\n");
 415                 goto fail_rsp_map;
 416         }
 417
 418         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 419         if (ha->base_qpair == NULL) {
 420                 ql_log(ql_log_warn, vha, 0x00e0,
 421                     "Failed to allocate base queue pair memory.\n");
 422                 goto fail_base_qpair;
 423         }
 424
 425         qla_init_base_qpair(vha, req, rsp);
 426
 427         if (ql2xmqsupport && ha->max_qpairs) {
 428                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 429                         GFP_KERNEL);
 430                 if (!ha->queue_pair_map) {
 431                         ql_log(ql_log_fatal, vha, 0x0180,
 432                             "Unable to allocate memory for queue pair ptrs.\n");
 433                         goto fail_qpair_map;
 434                 }
 435         }
 436
 437         /*
 438          * Make sure we record at least the request and response queue zero in
 439          * case we need to free them if part of the probe fails.
 440          */
 441         ha->rsp_q_map[0] = rsp;
 442         ha->req_q_map[0] = req;
 443         set_bit(0, ha->rsp_qid_map);
 444         set_bit(0, ha->req_qid_map);
 445         return 1;
 446
 447 fail_qpair_map:
 448         kfree(ha->base_qpair);
 449         ha->base_qpair = NULL;
 450 fail_base_qpair:
 451         kfree(ha->rsp_q_map);
 452         ha->rsp_q_map = NULL;
 453 fail_rsp_map:
 454         kfree(ha->req_q_map);
 455         ha->req_q_map = NULL;
 456 fail_req_map:
 457         return -ENOMEM;
 458 }
 459
 460 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 461 {
 462         if (IS_QLAFX00(ha)) {
 463                 if (req && req->ring_fx00)
 464                         dma_free_coherent(&ha->pdev->dev,
 465                             (req->length_fx00 + 1) * sizeof(request_t),
 466                             req->ring_fx00, req->dma_fx00);
 467         } else if (req && req->ring)
 468                 dma_free_coherent(&ha->pdev->dev,
 469                 (req->length + 1) * sizeof(request_t),
 470                 req->ring, req->dma);
 471
 472         if (req)
 473                 kfree(req->outstanding_cmds);
 474
 475         kfree(req);
 476 }
 477
 478 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 479 {
 480         if (IS_QLAFX00(ha)) {
 481                 if (rsp && rsp->ring)
 482                         dma_free_coherent(&ha->pdev->dev,
 483                             (rsp->length_fx00 + 1) * sizeof(request_t),
 484                             rsp->ring_fx00, rsp->dma_fx00);
 485         } else if (rsp && rsp->ring) {
 486                 dma_free_coherent(&ha->pdev->dev,
 487                 (rsp->length + 1) * sizeof(response_t),
 488                 rsp->ring, rsp->dma);
 489         }
 490         kfree(rsp);
 491 }
 492
 493 static void qla2x00_free_queues(struct qla_hw_data *ha)
 494 {
 495         struct req_que *req;
 496         struct rsp_que *rsp;
 497         int cnt;
 498         unsigned long flags;
 499
 500         if (ha->queue_pair_map) {
 501                 kfree(ha->queue_pair_map);
 502                 ha->queue_pair_map = NULL;
 503         }
 504         if (ha->base_qpair) {
 505                 kfree(ha->base_qpair);
 506                 ha->base_qpair = NULL;
 507         }
 508
 509         spin_lock_irqsave(&ha->hardware_lock, flags);
 510         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 511                 if (!test_bit(cnt, ha->req_qid_map))
 512                         continue;
 513
 514                 req = ha->req_q_map[cnt];
 515                 clear_bit(cnt, ha->req_qid_map);
 516                 ha->req_q_map[cnt] = NULL;
 517
 518                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 519                 qla2x00_free_req_que(ha, req);
 520                 spin_lock_irqsave(&ha->hardware_lock, flags);
 521         }
 522         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 523
 524         kfree(ha->req_q_map);
 525         ha->req_q_map = NULL;
 526
 527
 528         spin_lock_irqsave(&ha->hardware_lock, flags);
 529         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 530                 if (!test_bit(cnt, ha->rsp_qid_map))
 531                         continue;
 532
 533                 rsp = ha->rsp_q_map[cnt];
 534                 clear_bit(cnt, ha->rsp_qid_map);
 535                 ha->rsp_q_map[cnt] =  NULL;
 536                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 537                 qla2x00_free_rsp_que(ha, rsp);
 538                 spin_lock_irqsave(&ha->hardware_lock, flags);
 539         }
 540         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 541
 542         kfree(ha->rsp_q_map);
 543         ha->rsp_q_map = NULL;
 544 }
 545
 546 static char *
 547 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 548 {
 549         struct qla_hw_data *ha = vha->hw;
 550         static char *pci_bus_modes[] = {
 551                 "33", "66", "100", "133",
 552         };
 553         uint16_t pci_bus;
 554
 555         strcpy(str, "PCI");
 556         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 557         if (pci_bus) {
 558                 strcat(str, "-X (");
 559                 strcat(str, pci_bus_modes[pci_bus]);
 560         } else {
 561                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 562                 strcat(str, " (");
 563                 strcat(str, pci_bus_modes[pci_bus]);
 564         }
 565         strcat(str, " MHz)");
 566
 567         return (str);
 568 }
 569
 570 static char *
 571 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 572 {
 573         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 574         struct qla_hw_data *ha = vha->hw;
 575         uint32_t pci_bus;
 576
 577         if (pci_is_pcie(ha->pdev)) {
 578                 char lwstr[6];
 579                 uint32_t lstat, lspeed, lwidth;
 580
 581                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 582                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 583                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 584
 585                 strcpy(str, "PCIe (");
 586                 switch (lspeed) {
 587                 case 1:
 588                         strcat(str, "2.5GT/s ");
 589                         break;
 590                 case 2:
 591                         strcat(str, "5.0GT/s ");
 592                         break;
 593                 case 3:
 594                         strcat(str, "8.0GT/s ");
 595                         break;
 596                 default:
 597                         strcat(str, "<unknown> ");
 598                         break;
 599                 }
 600                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 601                 strcat(str, lwstr);
 602
 603                 return str;
 604         }
 605
 606         strcpy(str, "PCI");
 607         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 608         if (pci_bus == 0 || pci_bus == 8) {
 609                 strcat(str, " (");
 610                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 611         } else {
 612                 strcat(str, "-X ");
 613                 if (pci_bus & BIT_2)
 614                         strcat(str, "Mode 2");
 615                 else
 616                         strcat(str, "Mode 1");
 617                 strcat(str, " (");
 618                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 619         }
 620         strcat(str, " MHz)");
 621
 622         return str;
 623 }
 624
 625 static char *
 626 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 627 {
 628         char un_str[10];
 629         struct qla_hw_data *ha = vha->hw;
 630
 631         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 632             ha->fw_minor_version, ha->fw_subminor_version);
 633
 634         if (ha->fw_attributes & BIT_9) {
 635                 strcat(str, "FLX");
 636                 return (str);
 637         }
 638
 639         switch (ha->fw_attributes & 0xFF) {
 640         case 0x7:
 641                 strcat(str, "EF");
 642                 break;
 643         case 0x17:
 644                 strcat(str, "TP");
 645                 break;
 646         case 0x37:
 647                 strcat(str, "IP");
 648                 break;
 649         case 0x77:
 650                 strcat(str, "VI");
 651                 break;
 652         default:
 653                 sprintf(un_str, "(%x)", ha->fw_attributes);
 654                 strcat(str, un_str);
 655                 break;
 656         }
 657         if (ha->fw_attributes & 0x100)
 658                 strcat(str, "X");
 659
 660         return (str);
 661 }
 662
 663 static char *
 664 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 665 {
 666         struct qla_hw_data *ha = vha->hw;
 667
 668         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 669             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 670         return str;
 671 }
 672
 673 void
 674 qla2x00_sp_free_dma(void *ptr)
 675 {
 676         srb_t *sp = ptr;
 677         struct qla_hw_data *ha = sp->vha->hw;
 678         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 679         void *ctx = GET_CMD_CTX_SP(sp);
 680
 681         if (sp->flags & SRB_DMA_VALID) {
 682                 scsi_dma_unmap(cmd);
 683                 sp->flags &= ~SRB_DMA_VALID;
 684         }
 685
 686         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 687                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 688                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 689                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 690         }
 691
 692         if (!ctx)
 693                 goto end;
 694
 695         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 696                 /* List assured to be having elements */
 697                 qla2x00_clean_dsd_pool(ha, ctx);
 698                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 699         }
 700
 701         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 702                 struct crc_context *ctx0 = ctx;
 703
 704                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 705                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 706         }
 707
 708         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 709                 struct ct6_dsd *ctx1 = ctx;
 710
 711                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 712                     ctx1->fcp_cmnd_dma);
 713                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 714                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 715                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 716                 mempool_free(ctx1, ha->ctx_mempool);
 717         }
 718
 719 end:
 720         if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
 721                 CMD_SP(cmd) = NULL;
 722                 qla2x00_rel_sp(sp);
 723         }
 724 }
 725
 726 void
 727 qla2x00_sp_compl(void *ptr, int res)
 728 {
 729         srb_t *sp = ptr;
 730         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 731
 732         cmd->result = res;
 733
 734         if (atomic_read(&sp->ref_count) == 0) {
 735                 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
 736                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 737                     sp, GET_CMD_SP(sp));
 738                 if (ql2xextended_error_logging & ql_dbg_io)
 739                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 740                 return;
 741         }
 742         if (!atomic_dec_and_test(&sp->ref_count))
 743                 return;
 744
 745         sp->free(sp);
 746         cmd->scsi_done(cmd);
 747 }
 748
 749 void
 750 qla2xxx_qpair_sp_free_dma(void *ptr)
 751 {
 752         srb_t *sp = (srb_t *)ptr;
 753         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 754         struct qla_hw_data *ha = sp->fcport->vha->hw;
 755         void *ctx = GET_CMD_CTX_SP(sp);
 756
 757         if (sp->flags & SRB_DMA_VALID) {
 758                 scsi_dma_unmap(cmd);
 759                 sp->flags &= ~SRB_DMA_VALID;
 760         }
 761
 762         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 763                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 764                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 765                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 766         }
 767
 768         if (!ctx)
 769                 goto end;
 770
 771         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 772                 /* List assured to be having elements */
 773                 qla2x00_clean_dsd_pool(ha, ctx);
 774                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 775         }
 776
 777         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 778                 struct crc_context *ctx0 = ctx;
 779
 780                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 781                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 782         }
 783
 784         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 785                 struct ct6_dsd *ctx1 = ctx;
 786                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 787                     ctx1->fcp_cmnd_dma);
 788                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 789                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 790                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 791                 mempool_free(ctx1, ha->ctx_mempool);
 792         }
 793 end:
 794         CMD_SP(cmd) = NULL;
 795         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 796 }
 797
 798 void
 799 qla2xxx_qpair_sp_compl(void *ptr, int res)
 800 {
 801         srb_t *sp = ptr;
 802         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 803
 804         cmd->result = res;
 805
 806         if (atomic_read(&sp->ref_count) == 0) {
 807                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 808                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 809                     sp, GET_CMD_SP(sp));
 810                 if (ql2xextended_error_logging & ql_dbg_io)
 811                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 812                 return;
 813         }
 814         if (!atomic_dec_and_test(&sp->ref_count))
 815                 return;
 816
 817         sp->free(sp);
 818         cmd->scsi_done(cmd);
 819 }
 820
 821 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 822  * does not have the changes necessary to avoid taking host->host_lock.
 823  */
 824 static int
 825 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 826 {
 827         scsi_qla_host_t *vha = shost_priv(host);
 828         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 829         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 830         struct qla_hw_data *ha = vha->hw;
 831         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 832         srb_t *sp;
 833         int rval;
 834         struct qla_qpair *qpair = NULL;
 835         uint32_t tag;
 836         uint16_t hwq;
 837
 838         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 839                 cmd->result = DID_NO_CONNECT << 16;
 840                 goto qc24_fail_command;
 841         }
 842
 843         if (ha->mqenable) {
 844                 if (shost_use_blk_mq(vha->host)) {
 845                         tag = blk_mq_unique_tag(cmd->request);
 846                         hwq = blk_mq_unique_tag_to_hwq(tag);
 847                         qpair = ha->queue_pair_map[hwq];
 848                 } else if (vha->vp_idx && vha->qpair) {
 849                         qpair = vha->qpair;
 850                 }
 851
 852                 if (qpair)
 853                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 854         }
 855
 856         if (ha->flags.eeh_busy) {
 857                 if (ha->flags.pci_channel_io_perm_failure) {
 858                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 859                             "PCI Channel IO permanent failure, exiting "
 860                             "cmd=%p.\n", cmd);
 861                         cmd->result = DID_NO_CONNECT << 16;
 862                 } else {
 863                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 864                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 865                         cmd->result = DID_REQUEUE << 16;
 866                 }
 867                 goto qc24_fail_command;
 868         }
 869
 870         rval = fc_remote_port_chkready(rport);
 871         if (rval) {
 872                 cmd->result = rval;
 873                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 874                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 875                     cmd, rval);
 876                 goto qc24_fail_command;
 877         }
 878
 879         if (!vha->flags.difdix_supported &&
 880                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 881                         ql_dbg(ql_dbg_io, vha, 0x3004,
 882                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 883                             cmd);
 884                         cmd->result = DID_NO_CONNECT << 16;
 885                         goto qc24_fail_command;
 886         }
 887
 888         if (!fcport) {
 889                 cmd->result = DID_NO_CONNECT << 16;
 890                 goto qc24_fail_command;
 891         }
 892
 893         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 894                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 895                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 896                         ql_dbg(ql_dbg_io, vha, 0x3005,
 897                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 898                             atomic_read(&fcport->state),
 899                             atomic_read(&base_vha->loop_state));
 900                         cmd->result = DID_NO_CONNECT << 16;
 901                         goto qc24_fail_command;
 902                 }
 903                 goto qc24_target_busy;
 904         }
 905
 906         /*
 907          * Return target busy if we've received a non-zero retry_delay_timer
 908          * in a FCP_RSP.
 909          */
 910         if (fcport->retry_delay_timestamp == 0) {
 911                 /* retry delay not set */
 912         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 913                 fcport->retry_delay_timestamp = 0;
 914         else
 915                 goto qc24_target_busy;
 916
 917         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 918         if (!sp)
 919                 goto qc24_host_busy;
 920
 921         sp->u.scmd.cmd = cmd;
 922         sp->type = SRB_SCSI_CMD;
 923         atomic_set(&sp->ref_count, 1);
 924         CMD_SP(cmd) = (void *)sp;
 925         sp->free = qla2x00_sp_free_dma;
 926         sp->done = qla2x00_sp_compl;
 927
 928         rval = ha->isp_ops->start_scsi(sp);
 929         if (rval != QLA_SUCCESS) {
 930                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 931                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 932                 goto qc24_host_busy_free_sp;
 933         }
 934
 935         return 0;
 936
 937 qc24_host_busy_free_sp:
 938         sp->free(sp);
 939
 940 qc24_host_busy:
 941         return SCSI_MLQUEUE_HOST_BUSY;
 942
 943 qc24_target_busy:
 944         return SCSI_MLQUEUE_TARGET_BUSY;
 945
 946 qc24_fail_command:
 947         cmd->scsi_done(cmd);
 948
 949         return 0;
 950 }
 951
 952 /* For MQ supported I/O */
 953 int
 954 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 955     struct qla_qpair *qpair)
 956 {
 957         scsi_qla_host_t *vha = shost_priv(host);
 958         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 959         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 960         struct qla_hw_data *ha = vha->hw;
 961         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 962         srb_t *sp;
 963         int rval;
 964
 965         rval = fc_remote_port_chkready(rport);
 966         if (rval) {
 967                 cmd->result = rval;
 968                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 969                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 970                     cmd, rval);
 971                 goto qc24_fail_command;
 972         }
 973
 974         if (!fcport) {
 975                 cmd->result = DID_NO_CONNECT << 16;
 976                 goto qc24_fail_command;
 977         }
 978
 979         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 980                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 981                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 982                         ql_dbg(ql_dbg_io, vha, 0x3077,
 983                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 984                             atomic_read(&fcport->state),
 985                             atomic_read(&base_vha->loop_state));
 986                         cmd->result = DID_NO_CONNECT << 16;
 987                         goto qc24_fail_command;
 988                 }
 989                 goto qc24_target_busy;
 990         }
 991
 992         /*
 993          * Return target busy if we've received a non-zero retry_delay_timer
 994          * in a FCP_RSP.
 995          */
 996         if (fcport->retry_delay_timestamp == 0) {
 997                 /* retry delay not set */
 998         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 999                 fcport->retry_delay_timestamp = 0;
1000         else
1001                 goto qc24_target_busy;
1002
1003         sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
1004         if (!sp)
1005                 goto qc24_host_busy;
1006
1007         sp->u.scmd.cmd = cmd;
1008         sp->type = SRB_SCSI_CMD;
1009         atomic_set(&sp->ref_count, 1);
1010         CMD_SP(cmd) = (void *)sp;
1011         sp->free = qla2xxx_qpair_sp_free_dma;
1012         sp->done = qla2xxx_qpair_sp_compl;
1013         sp->qpair = qpair;
1014
1015         rval = ha->isp_ops->start_scsi_mq(sp);
1016         if (rval != QLA_SUCCESS) {
1017                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1018                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1019                 if (rval == QLA_INTERFACE_ERROR)
1020                         goto qc24_fail_command;
1021                 goto qc24_host_busy_free_sp;
1022         }
1023
1024         return 0;
1025
1026 qc24_host_busy_free_sp:
1027         sp->free(sp);
1028
1029 qc24_host_busy:
1030         return SCSI_MLQUEUE_HOST_BUSY;
1031
1032 qc24_target_busy:
1033         return SCSI_MLQUEUE_TARGET_BUSY;
1034
1035 qc24_fail_command:
1036         cmd->scsi_done(cmd);
1037
1038         return 0;
1039 }
1040
1041 /*
1042  * qla2x00_eh_wait_on_command
1043  *    Waits for the command to be returned by the Firmware for some
1044  *    max time.
1045  *
1046  * Input:
1047  *    cmd = Scsi Command to wait on.
1048  *
1049  * Return:
1050  *    Not Found : 0
1051  *    Found : 1
1052  */
1053 static int
1054 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1055 {
1056 #define ABORT_POLLING_PERIOD    1000
1057 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1058         unsigned long wait_iter = ABORT_WAIT_ITER;
1059         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1060         struct qla_hw_data *ha = vha->hw;
1061         int ret = QLA_SUCCESS;
1062
1063         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1064                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1065                     "Return:eh_wait.\n");
1066                 return ret;
1067         }
1068
1069         while (CMD_SP(cmd) && wait_iter--) {
1070                 msleep(ABORT_POLLING_PERIOD);
1071         }
1072         if (CMD_SP(cmd))
1073                 ret = QLA_FUNCTION_FAILED;
1074
1075         return ret;
1076 }
1077
1078 /*
1079  * qla2x00_wait_for_hba_online
1080  *    Wait till the HBA is online after going through
1081  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1082  *    finally HBA is disabled ie marked offline
1083  *
1084  * Input:
1085  *     ha - pointer to host adapter structure
1086  *
1087  * Note:
1088  *    Does context switching-Release SPIN_LOCK
1089  *    (if any) before calling this routine.
1090  *
1091  * Return:
1092  *    Success (Adapter is online) : 0
1093  *    Failed  (Adapter is offline/disabled) : 1
1094  */
1095 int
1096 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1097 {
1098         int             return_status;
1099         unsigned long   wait_online;
1100         struct qla_hw_data *ha = vha->hw;
1101         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1102
1103         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1104         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1105             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1106             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1107             ha->dpc_active) && time_before(jiffies, wait_online)) {
1108
1109                 msleep(1000);
1110         }
1111         if (base_vha->flags.online)
1112                 return_status = QLA_SUCCESS;
1113         else
1114                 return_status = QLA_FUNCTION_FAILED;
1115
1116         return (return_status);
1117 }
1118
1119 static inline int test_fcport_count(scsi_qla_host_t *vha)
1120 {
1121         struct qla_hw_data *ha = vha->hw;
1122         unsigned long flags;
1123         int res;
1124
1125         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1126         ql_dbg(ql_dbg_init, vha, 0x00ec,
1127             "tgt %p, fcport_count=%d\n",
1128             vha, vha->fcport_count);
1129         res = (vha->fcport_count == 0);
1130         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1131
1132         return res;
1133 }
1134
1135 /*
1136  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1137  * it has dependency on UNLOADING flag to stop device discovery
1138  */
1139 static void
1140 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1141 {
1142         qla2x00_mark_all_devices_lost(vha, 0);
1143
1144         wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1145 }
1146
1147 /*
1148  * qla2x00_wait_for_hba_ready
1149  * Wait till the HBA is ready before doing driver unload
1150  *
1151  * Input:
1152  *     ha - pointer to host adapter structure
1153  *
1154  * Note:
1155  *    Does context switching-Release SPIN_LOCK
1156  *    (if any) before calling this routine.
1157  *
1158  */
1159 static void
1160 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1161 {
1162         struct qla_hw_data *ha = vha->hw;
1163         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1164
1165         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1166                 ha->flags.mbox_busy) ||
1167                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1168                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1169                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1170                         break;
1171                 msleep(1000);
1172         }
1173 }
1174
1175 int
1176 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1177 {
1178         int             return_status;
1179         unsigned long   wait_reset;
1180         struct qla_hw_data *ha = vha->hw;
1181         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1182
1183         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1184         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1185             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1186             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1187             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1188
1189                 msleep(1000);
1190
1191                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1192                     ha->flags.chip_reset_done)
1193                         break;
1194         }
1195         if (ha->flags.chip_reset_done)
1196                 return_status = QLA_SUCCESS;
1197         else
1198                 return_status = QLA_FUNCTION_FAILED;
1199
1200         return return_status;
1201 }
1202
1203 static void
1204 sp_get(struct srb *sp)
1205 {
1206         atomic_inc(&sp->ref_count);
1207 }
1208
1209 #define ISP_REG_DISCONNECT 0xffffffffU
1210 /**************************************************************************
1211 * qla2x00_isp_reg_stat
1212 *
1213 * Description:
1214 *       Read the host status register of ISP before aborting the command.
1215 *
1216 * Input:
1217 *       ha = pointer to host adapter structure.
1218 *
1219 *
1220 * Returns:
1221 *       Either true or false.
1222 *
1223 * Note: Return true if there is register disconnect.
1224 **************************************************************************/
1225 static inline
1226 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1227 {
1228         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1229         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1230
1231         if (IS_P3P_TYPE(ha))
1232                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1233         else
1234                 return ((RD_REG_DWORD(&reg->host_status)) ==
1235                         ISP_REG_DISCONNECT);
1236 }
1237
1238 /**************************************************************************
1239 * qla2xxx_eh_abort
1240 *
1241 * Description:
1242 *    The abort function will abort the specified command.
1243 *
1244 * Input:
1245 *    cmd = Linux SCSI command packet to be aborted.
1246 *
1247 * Returns:
1248 *    Either SUCCESS or FAILED.
1249 *
1250 * Note:
1251 *    Only return FAILED if command not returned by firmware.
1252 **************************************************************************/
1253 static int
1254 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1255 {
1256         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1257         srb_t *sp;
1258         int ret;
1259         unsigned int id;
1260         uint64_t lun;
1261         unsigned long flags;
1262         int rval, wait = 0;
1263         struct qla_hw_data *ha = vha->hw;
1264
1265         if (qla2x00_isp_reg_stat(ha)) {
1266                 ql_log(ql_log_info, vha, 0x8042,
1267                     "PCI/Register disconnect, exiting.\n");
1268                 return FAILED;
1269         }
1270         if (!CMD_SP(cmd))
1271                 return SUCCESS;
1272
1273         ret = fc_block_scsi_eh(cmd);
1274         if (ret != 0)
1275                 return ret;
1276         ret = SUCCESS;
1277
1278         id = cmd->device->id;
1279         lun = cmd->device->lun;
1280
1281         spin_lock_irqsave(&ha->hardware_lock, flags);
1282         sp = (srb_t *) CMD_SP(cmd);
1283         if (!sp) {
1284                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1285                 return SUCCESS;
1286         }
1287
1288         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1289             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1290             vha->host_no, id, lun, sp, cmd, sp->handle);
1291
1292         /* Get a reference to the sp and drop the lock.*/
1293         sp_get(sp);
1294
1295         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1296         rval = ha->isp_ops->abort_command(sp);
1297         if (rval) {
1298                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1299                         ret = SUCCESS;
1300                 else
1301                         ret = FAILED;
1302
1303                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1304                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1305         } else {
1306                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1307                     "Abort command mbx success cmd=%p.\n", cmd);
1308                 wait = 1;
1309         }
1310
1311         spin_lock_irqsave(&ha->hardware_lock, flags);
1312         sp->done(sp, 0);
1313         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1314
1315         /* Did the command return during mailbox execution? */
1316         if (ret == FAILED && !CMD_SP(cmd))
1317                 ret = SUCCESS;
1318
1319         /* Wait for the command to be returned. */
1320         if (wait) {
1321                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1322                         ql_log(ql_log_warn, vha, 0x8006,
1323                             "Abort handler timed out cmd=%p.\n", cmd);
1324                         ret = FAILED;
1325                 }
1326         }
1327
1328         ql_log(ql_log_info, vha, 0x801c,
1329             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1330             vha->host_no, id, lun, wait, ret);
1331
1332         return ret;
1333 }
1334
1335 int
1336 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1337         uint64_t l, enum nexus_wait_type type)
1338 {
1339         int cnt, match, status;
1340         unsigned long flags;
1341         struct qla_hw_data *ha = vha->hw;
1342         struct req_que *req;
1343         srb_t *sp;
1344         struct scsi_cmnd *cmd;
1345
1346         status = QLA_SUCCESS;
1347
1348         spin_lock_irqsave(&ha->hardware_lock, flags);
1349         req = vha->req;
1350         for (cnt = 1; status == QLA_SUCCESS &&
1351                 cnt < req->num_outstanding_cmds; cnt++) {
1352                 sp = req->outstanding_cmds[cnt];
1353                 if (!sp)
1354                         continue;
1355                 if (sp->type != SRB_SCSI_CMD)
1356                         continue;
1357                 if (vha->vp_idx != sp->vha->vp_idx)
1358                         continue;
1359                 match = 0;
1360                 cmd = GET_CMD_SP(sp);
1361                 switch (type) {
1362                 case WAIT_HOST:
1363                         match = 1;
1364                         break;
1365                 case WAIT_TARGET:
1366                         match = cmd->device->id == t;
1367                         break;
1368                 case WAIT_LUN:
1369                         match = (cmd->device->id == t &&
1370                                 cmd->device->lun == l);
1371                         break;
1372                 }
1373                 if (!match)
1374                         continue;
1375
1376                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1377                 status = qla2x00_eh_wait_on_command(cmd);
1378                 spin_lock_irqsave(&ha->hardware_lock, flags);
1379         }
1380         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1381
1382         return status;
1383 }
1384
1385 static char *reset_errors[] = {
1386         "HBA not online",
1387         "HBA not ready",
1388         "Task management failed",
1389         "Waiting for command completions",
1390 };
1391
1392 static int
1393 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1394     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1395 {
1396         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1397         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1398         int err;
1399
1400         if (!fcport) {
1401                 return FAILED;
1402         }
1403
1404         err = fc_block_scsi_eh(cmd);
1405         if (err != 0)
1406                 return err;
1407
1408         ql_log(ql_log_info, vha, 0x8009,
1409             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1410             cmd->device->id, cmd->device->lun, cmd);
1411
1412         err = 0;
1413         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1414                 ql_log(ql_log_warn, vha, 0x800a,
1415                     "Wait for hba online failed for cmd=%p.\n", cmd);
1416                 goto eh_reset_failed;
1417         }
1418         err = 2;
1419         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1420                 != QLA_SUCCESS) {
1421                 ql_log(ql_log_warn, vha, 0x800c,
1422                     "do_reset failed for cmd=%p.\n", cmd);
1423                 goto eh_reset_failed;
1424         }
1425         err = 3;
1426         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1427             cmd->device->lun, type) != QLA_SUCCESS) {
1428                 ql_log(ql_log_warn, vha, 0x800d,
1429                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1430                 goto eh_reset_failed;
1431         }
1432
1433         ql_log(ql_log_info, vha, 0x800e,
1434             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1435             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1436
1437         return SUCCESS;
1438
1439 eh_reset_failed:
1440         ql_log(ql_log_info, vha, 0x800f,
1441             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1442             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1443             cmd);
1444         return FAILED;
1445 }
1446
1447 static int
1448 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1449 {
1450         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1451         struct qla_hw_data *ha = vha->hw;
1452
1453         if (qla2x00_isp_reg_stat(ha)) {
1454                 ql_log(ql_log_info, vha, 0x803e,
1455                     "PCI/Register disconnect, exiting.\n");
1456                 return FAILED;
1457         }
1458
1459         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1460             ha->isp_ops->lun_reset);
1461 }
1462
1463 static int
1464 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1465 {
1466         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1467         struct qla_hw_data *ha = vha->hw;
1468
1469         if (qla2x00_isp_reg_stat(ha)) {
1470                 ql_log(ql_log_info, vha, 0x803f,
1471                     "PCI/Register disconnect, exiting.\n");
1472                 return FAILED;
1473         }
1474
1475         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1476             ha->isp_ops->target_reset);
1477 }
1478
1479 /**************************************************************************
1480 * qla2xxx_eh_bus_reset
1481 *
1482 * Description:
1483 *    The bus reset function will reset the bus and abort any executing
1484 *    commands.
1485 *
1486 * Input:
1487 *    cmd = Linux SCSI command packet of the command that cause the
1488 *          bus reset.
1489 *
1490 * Returns:
1491 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1492 *
1493 **************************************************************************/
1494 static int
1495 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1496 {
1497         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1498         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1499         int ret = FAILED;
1500         unsigned int id;
1501         uint64_t lun;
1502         struct qla_hw_data *ha = vha->hw;
1503
1504         if (qla2x00_isp_reg_stat(ha)) {
1505                 ql_log(ql_log_info, vha, 0x8040,
1506                     "PCI/Register disconnect, exiting.\n");
1507                 return FAILED;
1508         }
1509
1510         id = cmd->device->id;
1511         lun = cmd->device->lun;
1512
1513         if (!fcport) {
1514                 return ret;
1515         }
1516
1517         ret = fc_block_scsi_eh(cmd);
1518         if (ret != 0)
1519                 return ret;
1520         ret = FAILED;
1521
1522         ql_log(ql_log_info, vha, 0x8012,
1523             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1524
1525         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1526                 ql_log(ql_log_fatal, vha, 0x8013,
1527                     "Wait for hba online failed board disabled.\n");
1528                 goto eh_bus_reset_done;
1529         }
1530
1531         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1532                 ret = SUCCESS;
1533
1534         if (ret == FAILED)
1535                 goto eh_bus_reset_done;
1536
1537         /* Flush outstanding commands. */
1538         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1539             QLA_SUCCESS) {
1540                 ql_log(ql_log_warn, vha, 0x8014,
1541                     "Wait for pending commands failed.\n");
1542                 ret = FAILED;
1543         }
1544
1545 eh_bus_reset_done:
1546         ql_log(ql_log_warn, vha, 0x802b,
1547             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1548             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1549
1550         return ret;
1551 }
1552
1553 /**************************************************************************
1554 * qla2xxx_eh_host_reset
1555 *
1556 * Description:
1557 *    The reset function will reset the Adapter.
1558 *
1559 * Input:
1560 *      cmd = Linux SCSI command packet of the command that cause the
1561 *            adapter reset.
1562 *
1563 * Returns:
1564 *      Either SUCCESS or FAILED.
1565 *
1566 * Note:
1567 **************************************************************************/
1568 static int
1569 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1570 {
1571         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1572         struct qla_hw_data *ha = vha->hw;
1573         int ret = FAILED;
1574         unsigned int id;
1575         uint64_t lun;
1576         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1577
1578         if (qla2x00_isp_reg_stat(ha)) {
1579                 ql_log(ql_log_info, vha, 0x8041,
1580                     "PCI/Register disconnect, exiting.\n");
1581                 schedule_work(&ha->board_disable);
1582                 return SUCCESS;
1583         }
1584
1585         id = cmd->device->id;
1586         lun = cmd->device->lun;
1587
1588         ql_log(ql_log_info, vha, 0x8018,
1589             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1590
1591         /*
1592          * No point in issuing another reset if one is active.  Also do not
1593          * attempt a reset if we are updating flash.
1594          */
1595         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1596                 goto eh_host_reset_lock;
1597
1598         if (vha != base_vha) {
1599                 if (qla2x00_vp_abort_isp(vha))
1600                         goto eh_host_reset_lock;
1601         } else {
1602                 if (IS_P3P_TYPE(vha->hw)) {
1603                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1604                                 /* Ctx reset success */
1605                                 ret = SUCCESS;
1606                                 goto eh_host_reset_lock;
1607                         }
1608                         /* fall thru if ctx reset failed */
1609                 }
1610                 if (ha->wq)
1611                         flush_workqueue(ha->wq);
1612
1613                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1614                 if (ha->isp_ops->abort_isp(base_vha)) {
1615                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1616                         /* failed. schedule dpc to try */
1617                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1618
1619                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1620                                 ql_log(ql_log_warn, vha, 0x802a,
1621                                     "wait for hba online failed.\n");
1622                                 goto eh_host_reset_lock;
1623                         }
1624                 }
1625                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1626         }
1627
1628         /* Waiting for command to be returned to OS.*/
1629         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1630                 QLA_SUCCESS)
1631                 ret = SUCCESS;
1632
1633 eh_host_reset_lock:
1634         ql_log(ql_log_info, vha, 0x8017,
1635             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1636             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1637
1638         return ret;
1639 }
1640
1641 /*
1642 * qla2x00_loop_reset
1643 *      Issue loop reset.
1644 *
1645 * Input:
1646 *      ha = adapter block pointer.
1647 *
1648 * Returns:
1649 *      0 = success
1650 */
1651 int
1652 qla2x00_loop_reset(scsi_qla_host_t *vha)
1653 {
1654         int ret;
1655         struct fc_port *fcport;
1656         struct qla_hw_data *ha = vha->hw;
1657
1658         if (IS_QLAFX00(ha)) {
1659                 return qlafx00_loop_reset(vha);
1660         }
1661
1662         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1663                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1664                         if (fcport->port_type != FCT_TARGET)
1665                                 continue;
1666
1667                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1668                         if (ret != QLA_SUCCESS) {
1669                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1670                                     "Bus Reset failed: Reset=%d "
1671                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1672                         }
1673                 }
1674         }
1675
1676
1677         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1678                 atomic_set(&vha->loop_state, LOOP_DOWN);
1679                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1680                 qla2x00_mark_all_devices_lost(vha, 0);
1681                 ret = qla2x00_full_login_lip(vha);
1682                 if (ret != QLA_SUCCESS) {
1683                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1684                             "full_login_lip=%d.\n", ret);
1685                 }
1686         }
1687
1688         if (ha->flags.enable_lip_reset) {
1689                 ret = qla2x00_lip_reset(vha);
1690                 if (ret != QLA_SUCCESS)
1691                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1692                             "lip_reset failed (%d).\n", ret);
1693         }
1694
1695         /* Issue marker command only when we are going to start the I/O */
1696         vha->marker_needed = 1;
1697
1698         return QLA_SUCCESS;
1699 }
1700
1701 void
1702 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1703 {
1704         int que, cnt, status;
1705         unsigned long flags;
1706         srb_t *sp;
1707         struct qla_hw_data *ha = vha->hw;
1708         struct req_que *req;
1709         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1710         struct qla_tgt_cmd *cmd;
1711         uint8_t trace = 0;
1712
1713         spin_lock_irqsave(&ha->hardware_lock, flags);
1714         for (que = 0; que < ha->max_req_queues; que++) {
1715                 req = ha->req_q_map[que];
1716                 if (!req)
1717                         continue;
1718                 if (!req->outstanding_cmds)
1719                         continue;
1720                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1721                         sp = req->outstanding_cmds[cnt];
1722                         if (sp) {
1723                                 req->outstanding_cmds[cnt] = NULL;
1724                                 if (sp->cmd_type == TYPE_SRB) {
1725                                         if (sp->type == SRB_NVME_CMD ||
1726                                             sp->type == SRB_NVME_LS) {
1727                                                 sp_get(sp);
1728                                                 spin_unlock_irqrestore(
1729                                                     &ha->hardware_lock, flags);
1730                                                 qla_nvme_abort(ha, sp);
1731                                                 spin_lock_irqsave(
1732                                                     &ha->hardware_lock, flags);
1733                                         } else if (GET_CMD_SP(sp) &&
1734                                             !ha->flags.eeh_busy &&
1735                                             (!test_bit(ABORT_ISP_ACTIVE,
1736                                                 &vha->dpc_flags)) &&
1737                                             (sp->type == SRB_SCSI_CMD)) {
1738                                                 /*
1739                                                  * Don't abort commands in
1740                                                  * adapter during EEH
1741                                                  * recovery as it's not
1742                                                  * accessible/responding.
1743                                                  *
1744                                                  * Get a reference to the sp
1745                                                  * and drop the lock. The
1746                                                  * reference ensures this
1747                                                  * sp->done() call and not the
1748                                                  * call in qla2xxx_eh_abort()
1749                                                  * ends the SCSI command (with
1750                                                  * result 'res').
1751                                                  */
1752                                                 sp_get(sp);
1753                                                 spin_unlock_irqrestore(
1754                                                     &ha->hardware_lock, flags);
1755                                                 status = qla2xxx_eh_abort(
1756                                                     GET_CMD_SP(sp));
1757                                                 spin_lock_irqsave(
1758                                                     &ha->hardware_lock, flags);
1759                                                 /*
1760                                                  * Get rid of extra reference
1761                                                  * if immediate exit from
1762                                                  * ql2xxx_eh_abort
1763                                                  */
1764                                                 if (status == FAILED &&
1765                                                     (qla2x00_isp_reg_stat(ha)))
1766                                                         atomic_dec(
1767                                                             &sp->ref_count);
1768                                         }
1769                                         sp->done(sp, res);
1770                                 } else {
1771                                         if (!vha->hw->tgt.tgt_ops || !tgt ||
1772                                             qla_ini_mode_enabled(vha)) {
1773                                                 if (!trace)
1774                                                         ql_dbg(ql_dbg_tgt_mgt,
1775                                                             vha, 0xf003,
1776                                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1777                                                             vha->dpc_flags);
1778                                                 continue;
1779                                         }
1780                                         cmd = (struct qla_tgt_cmd *)sp;
1781                                         qlt_abort_cmd_on_host_reset(cmd->vha,
1782                                             cmd);
1783                                 }
1784                         }
1785                 }
1786         }
1787         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1788 }
1789
1790 static int
1791 qla2xxx_slave_alloc(struct scsi_device *sdev)
1792 {
1793         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1794
1795         if (!rport || fc_remote_port_chkready(rport))
1796                 return -ENXIO;
1797
1798         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1799
1800         return 0;
1801 }
1802
1803 static int
1804 qla2xxx_slave_configure(struct scsi_device *sdev)
1805 {
1806         scsi_qla_host_t *vha = shost_priv(sdev->host);
1807         struct req_que *req = vha->req;
1808
1809         if (IS_T10_PI_CAPABLE(vha->hw))
1810                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1811
1812         scsi_change_queue_depth(sdev, req->max_q_depth);
1813         return 0;
1814 }
1815
1816 static void
1817 qla2xxx_slave_destroy(struct scsi_device *sdev)
1818 {
1819         sdev->hostdata = NULL;
1820 }
1821
1822 /**
1823  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1824  * @ha: HA context
1825  *
1826  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1827  * supported addressing method.
1828  */
1829 static void
1830 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1831 {
1832         /* Assume a 32bit DMA mask. */
1833         ha->flags.enable_64bit_addressing = 0;
1834
1835         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1836                 /* Any upper-dword bits set? */
1837                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1838                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1839                         /* Ok, a 64bit DMA mask is applicable. */
1840                         ha->flags.enable_64bit_addressing = 1;
1841                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1842                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1843                         return;
1844                 }
1845         }
1846
1847         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1848         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1849 }
1850
1851 static void
1852 qla2x00_enable_intrs(struct qla_hw_data *ha)
1853 {
1854         unsigned long flags = 0;
1855         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1856
1857         spin_lock_irqsave(&ha->hardware_lock, flags);
1858         ha->interrupts_on = 1;
1859         /* enable risc and host interrupts */
1860         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1861         RD_REG_WORD(&reg->ictrl);
1862         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1863
1864 }
1865
1866 static void
1867 qla2x00_disable_intrs(struct qla_hw_data *ha)
1868 {
1869         unsigned long flags = 0;
1870         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1871
1872         spin_lock_irqsave(&ha->hardware_lock, flags);
1873         ha->interrupts_on = 0;
1874         /* disable risc and host interrupts */
1875         WRT_REG_WORD(&reg->ictrl, 0);
1876         RD_REG_WORD(&reg->ictrl);
1877         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1878 }
1879
1880 static void
1881 qla24xx_enable_intrs(struct qla_hw_data *ha)
1882 {
1883         unsigned long flags = 0;
1884         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1885
1886         spin_lock_irqsave(&ha->hardware_lock, flags);
1887         ha->interrupts_on = 1;
1888         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1889         RD_REG_DWORD(&reg->ictrl);
1890         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1891 }
1892
1893 static void
1894 qla24xx_disable_intrs(struct qla_hw_data *ha)
1895 {
1896         unsigned long flags = 0;
1897         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1898
1899         if (IS_NOPOLLING_TYPE(ha))
1900                 return;
1901         spin_lock_irqsave(&ha->hardware_lock, flags);
1902         ha->interrupts_on = 0;
1903         WRT_REG_DWORD(&reg->ictrl, 0);
1904         RD_REG_DWORD(&reg->ictrl);
1905         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1906 }
1907
1908 static int
1909 qla2x00_iospace_config(struct qla_hw_data *ha)
1910 {
1911         resource_size_t pio;
1912         uint16_t msix;
1913
1914         if (pci_request_selected_regions(ha->pdev, ha->bars,
1915             QLA2XXX_DRIVER_NAME)) {
1916                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1917                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1918                     pci_name(ha->pdev));
1919                 goto iospace_error_exit;
1920         }
1921         if (!(ha->bars & 1))
1922                 goto skip_pio;
1923
1924         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1925         pio = pci_resource_start(ha->pdev, 0);
1926         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1927                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1928                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1929                             "Invalid pci I/O region size (%s).\n",
1930                             pci_name(ha->pdev));
1931                         pio = 0;
1932                 }
1933         } else {
1934                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1935                     "Region #0 no a PIO resource (%s).\n",
1936                     pci_name(ha->pdev));
1937                 pio = 0;
1938         }
1939         ha->pio_address = pio;
1940         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1941             "PIO address=%llu.\n",
1942             (unsigned long long)ha->pio_address);
1943
1944 skip_pio:
1945         /* Use MMIO operations for all accesses. */
1946         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1947                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1948                     "Region #1 not an MMIO resource (%s), aborting.\n",
1949                     pci_name(ha->pdev));
1950                 goto iospace_error_exit;
1951         }
1952         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1953                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1954                     "Invalid PCI mem region size (%s), aborting.\n",
1955                     pci_name(ha->pdev));
1956                 goto iospace_error_exit;
1957         }
1958
1959         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1960         if (!ha->iobase) {
1961                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1962                     "Cannot remap MMIO (%s), aborting.\n",
1963                     pci_name(ha->pdev));
1964                 goto iospace_error_exit;
1965         }
1966
1967         /* Determine queue resources */
1968         ha->max_req_queues = ha->max_rsp_queues = 1;
1969         ha->msix_count = QLA_BASE_VECTORS;
1970         if (!ql2xmqsupport || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1971                 goto mqiobase_exit;
1972
1973         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1974                         pci_resource_len(ha->pdev, 3));
1975         if (ha->mqiobase) {
1976                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1977                     "MQIO Base=%p.\n", ha->mqiobase);
1978                 /* Read MSIX vector size of the board */
1979                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1980                 ha->msix_count = msix + 1;
1981                 /* Max queues are bounded by available msix vectors */
1982                 /* MB interrupt uses 1 vector */
1983                 ha->max_req_queues = ha->msix_count - 1;
1984                 ha->max_rsp_queues = ha->max_req_queues;
1985                 /* Queue pairs is the max value minus the base queue pair */
1986                 ha->max_qpairs = ha->max_rsp_queues - 1;
1987                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1988                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
1989
1990                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1991                     "MSI-X vector count: %d.\n", ha->msix_count);
1992         } else
1993                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1994                     "BAR 3 not enabled.\n");
1995
1996 mqiobase_exit:
1997         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1998             "MSIX Count: %d.\n", ha->msix_count);
1999         return (0);
2000
2001 iospace_error_exit:
2002         return (-ENOMEM);
2003 }
2004
2005
2006 static int
2007 qla83xx_iospace_config(struct qla_hw_data *ha)
2008 {
2009         uint16_t msix;
2010
2011         if (pci_request_selected_regions(ha->pdev, ha->bars,
2012             QLA2XXX_DRIVER_NAME)) {
2013                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2014                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2015                     pci_name(ha->pdev));
2016
2017                 goto iospace_error_exit;
2018         }
2019
2020         /* Use MMIO operations for all accesses. */
2021         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2022                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2023                     "Invalid pci I/O region size (%s).\n",
2024                     pci_name(ha->pdev));
2025                 goto iospace_error_exit;
2026         }
2027         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2028                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2029                     "Invalid PCI mem region size (%s), aborting\n",
2030                         pci_name(ha->pdev));
2031                 goto iospace_error_exit;
2032         }
2033
2034         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2035         if (!ha->iobase) {
2036                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2037                     "Cannot remap MMIO (%s), aborting.\n",
2038                     pci_name(ha->pdev));
2039                 goto iospace_error_exit;
2040         }
2041
2042         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2043         /* 83XX 26XX always use MQ type access for queues
2044          * - mbar 2, a.k.a region 4 */
2045         ha->max_req_queues = ha->max_rsp_queues = 1;
2046         ha->msix_count = QLA_BASE_VECTORS;
2047         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2048                         pci_resource_len(ha->pdev, 4));
2049
2050         if (!ha->mqiobase) {
2051                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2052                     "BAR2/region4 not enabled\n");
2053                 goto mqiobase_exit;
2054         }
2055
2056         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2057                         pci_resource_len(ha->pdev, 2));
2058         if (ha->msixbase) {
2059                 /* Read MSIX vector size of the board */
2060                 pci_read_config_word(ha->pdev,
2061                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2062                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2063                 /*
2064                  * By default, driver uses at least two msix vectors
2065                  * (default & rspq)
2066                  */
2067                 if (ql2xmqsupport) {
2068                         /* MB interrupt uses 1 vector */
2069                         ha->max_req_queues = ha->msix_count - 1;
2070
2071                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2072                         if (QLA_TGT_MODE_ENABLED())
2073                                 ha->max_req_queues--;
2074
2075                         ha->max_rsp_queues = ha->max_req_queues;
2076
2077                         /* Queue pairs is the max value minus
2078                          * the base queue pair */
2079                         ha->max_qpairs = ha->max_req_queues - 1;
2080                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2081                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2082                 }
2083                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2084                     "MSI-X vector count: %d.\n", ha->msix_count);
2085         } else
2086                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2087                     "BAR 1 not enabled.\n");
2088
2089 mqiobase_exit:
2090         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2091             "MSIX Count: %d.\n", ha->msix_count);
2092         return 0;
2093
2094 iospace_error_exit:
2095         return -ENOMEM;
2096 }
2097
2098 static struct isp_operations qla2100_isp_ops = {
2099         .pci_config             = qla2100_pci_config,
2100         .reset_chip             = qla2x00_reset_chip,
2101         .chip_diag              = qla2x00_chip_diag,
2102         .config_rings           = qla2x00_config_rings,
2103         .reset_adapter          = qla2x00_reset_adapter,
2104         .nvram_config           = qla2x00_nvram_config,
2105         .update_fw_options      = qla2x00_update_fw_options,
2106         .load_risc              = qla2x00_load_risc,
2107         .pci_info_str           = qla2x00_pci_info_str,
2108         .fw_version_str         = qla2x00_fw_version_str,
2109         .intr_handler           = qla2100_intr_handler,
2110         .enable_intrs           = qla2x00_enable_intrs,
2111         .disable_intrs          = qla2x00_disable_intrs,
2112         .abort_command          = qla2x00_abort_command,
2113         .target_reset           = qla2x00_abort_target,
2114         .lun_reset              = qla2x00_lun_reset,
2115         .fabric_login           = qla2x00_login_fabric,
2116         .fabric_logout          = qla2x00_fabric_logout,
2117         .calc_req_entries       = qla2x00_calc_iocbs_32,
2118         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2119         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2120         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2121         .read_nvram             = qla2x00_read_nvram_data,
2122         .write_nvram            = qla2x00_write_nvram_data,
2123         .fw_dump                = qla2100_fw_dump,
2124         .beacon_on              = NULL,
2125         .beacon_off             = NULL,
2126         .beacon_blink           = NULL,
2127         .read_optrom            = qla2x00_read_optrom_data,
2128         .write_optrom           = qla2x00_write_optrom_data,
2129         .get_flash_version      = qla2x00_get_flash_version,
2130         .start_scsi             = qla2x00_start_scsi,
2131         .start_scsi_mq          = NULL,
2132         .abort_isp              = qla2x00_abort_isp,
2133         .iospace_config         = qla2x00_iospace_config,
2134         .initialize_adapter     = qla2x00_initialize_adapter,
2135 };
2136
2137 static struct isp_operations qla2300_isp_ops = {
2138         .pci_config             = qla2300_pci_config,
2139         .reset_chip             = qla2x00_reset_chip,
2140         .chip_diag              = qla2x00_chip_diag,
2141         .config_rings           = qla2x00_config_rings,
2142         .reset_adapter          = qla2x00_reset_adapter,
2143         .nvram_config           = qla2x00_nvram_config,
2144         .update_fw_options      = qla2x00_update_fw_options,
2145         .load_risc              = qla2x00_load_risc,
2146         .pci_info_str           = qla2x00_pci_info_str,
2147         .fw_version_str         = qla2x00_fw_version_str,
2148         .intr_handler           = qla2300_intr_handler,
2149         .enable_intrs           = qla2x00_enable_intrs,
2150         .disable_intrs          = qla2x00_disable_intrs,
2151         .abort_command          = qla2x00_abort_command,
2152         .target_reset           = qla2x00_abort_target,
2153         .lun_reset              = qla2x00_lun_reset,
2154         .fabric_login           = qla2x00_login_fabric,
2155         .fabric_logout          = qla2x00_fabric_logout,
2156         .calc_req_entries       = qla2x00_calc_iocbs_32,
2157         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2158         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2159         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2160         .read_nvram             = qla2x00_read_nvram_data,
2161         .write_nvram            = qla2x00_write_nvram_data,
2162         .fw_dump                = qla2300_fw_dump,
2163         .beacon_on              = qla2x00_beacon_on,
2164         .beacon_off             = qla2x00_beacon_off,
2165         .beacon_blink           = qla2x00_beacon_blink,
2166         .read_optrom            = qla2x00_read_optrom_data,
2167         .write_optrom           = qla2x00_write_optrom_data,
2168         .get_flash_version      = qla2x00_get_flash_version,
2169         .start_scsi             = qla2x00_start_scsi,
2170         .start_scsi_mq          = NULL,
2171         .abort_isp              = qla2x00_abort_isp,
2172         .iospace_config         = qla2x00_iospace_config,
2173         .initialize_adapter     = qla2x00_initialize_adapter,
2174 };
2175
2176 static struct isp_operations qla24xx_isp_ops = {
2177         .pci_config             = qla24xx_pci_config,
2178         .reset_chip             = qla24xx_reset_chip,
2179         .chip_diag              = qla24xx_chip_diag,
2180         .config_rings           = qla24xx_config_rings,
2181         .reset_adapter          = qla24xx_reset_adapter,
2182         .nvram_config           = qla24xx_nvram_config,
2183         .update_fw_options      = qla24xx_update_fw_options,
2184         .load_risc              = qla24xx_load_risc,
2185         .pci_info_str           = qla24xx_pci_info_str,
2186         .fw_version_str         = qla24xx_fw_version_str,
2187         .intr_handler           = qla24xx_intr_handler,
2188         .enable_intrs           = qla24xx_enable_intrs,
2189         .disable_intrs          = qla24xx_disable_intrs,
2190         .abort_command          = qla24xx_abort_command,
2191         .target_reset           = qla24xx_abort_target,
2192         .lun_reset              = qla24xx_lun_reset,
2193         .fabric_login           = qla24xx_login_fabric,
2194         .fabric_logout          = qla24xx_fabric_logout,
2195         .calc_req_entries       = NULL,
2196         .build_iocbs            = NULL,
2197         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2198         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2199         .read_nvram             = qla24xx_read_nvram_data,
2200         .write_nvram            = qla24xx_write_nvram_data,
2201         .fw_dump                = qla24xx_fw_dump,
2202         .beacon_on              = qla24xx_beacon_on,
2203         .beacon_off             = qla24xx_beacon_off,
2204         .beacon_blink           = qla24xx_beacon_blink,
2205         .read_optrom            = qla24xx_read_optrom_data,
2206         .write_optrom           = qla24xx_write_optrom_data,
2207         .get_flash_version      = qla24xx_get_flash_version,
2208         .start_scsi             = qla24xx_start_scsi,
2209         .start_scsi_mq          = NULL,
2210         .abort_isp              = qla2x00_abort_isp,
2211         .iospace_config         = qla2x00_iospace_config,
2212         .initialize_adapter     = qla2x00_initialize_adapter,
2213 };
2214
2215 static struct isp_operations qla25xx_isp_ops = {
2216         .pci_config             = qla25xx_pci_config,
2217         .reset_chip             = qla24xx_reset_chip,
2218         .chip_diag              = qla24xx_chip_diag,
2219         .config_rings           = qla24xx_config_rings,
2220         .reset_adapter          = qla24xx_reset_adapter,
2221         .nvram_config           = qla24xx_nvram_config,
2222         .update_fw_options      = qla24xx_update_fw_options,
2223         .load_risc              = qla24xx_load_risc,
2224         .pci_info_str           = qla24xx_pci_info_str,
2225         .fw_version_str         = qla24xx_fw_version_str,
2226         .intr_handler           = qla24xx_intr_handler,
2227         .enable_intrs           = qla24xx_enable_intrs,
2228         .disable_intrs          = qla24xx_disable_intrs,
2229         .abort_command          = qla24xx_abort_command,
2230         .target_reset           = qla24xx_abort_target,
2231         .lun_reset              = qla24xx_lun_reset,
2232         .fabric_login           = qla24xx_login_fabric,
2233         .fabric_logout          = qla24xx_fabric_logout,
2234         .calc_req_entries       = NULL,
2235         .build_iocbs            = NULL,
2236         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2237         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2238         .read_nvram             = qla25xx_read_nvram_data,
2239         .write_nvram            = qla25xx_write_nvram_data,
2240         .fw_dump                = qla25xx_fw_dump,
2241         .beacon_on              = qla24xx_beacon_on,
2242         .beacon_off             = qla24xx_beacon_off,
2243         .beacon_blink           = qla24xx_beacon_blink,
2244         .read_optrom            = qla25xx_read_optrom_data,
2245         .write_optrom           = qla24xx_write_optrom_data,
2246         .get_flash_version      = qla24xx_get_flash_version,
2247         .start_scsi             = qla24xx_dif_start_scsi,
2248         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2249         .abort_isp              = qla2x00_abort_isp,
2250         .iospace_config         = qla2x00_iospace_config,
2251         .initialize_adapter     = qla2x00_initialize_adapter,
2252 };
2253
2254 static struct isp_operations qla81xx_isp_ops = {
2255         .pci_config             = qla25xx_pci_config,
2256         .reset_chip             = qla24xx_reset_chip,
2257         .chip_diag              = qla24xx_chip_diag,
2258         .config_rings           = qla24xx_config_rings,
2259         .reset_adapter          = qla24xx_reset_adapter,
2260         .nvram_config           = qla81xx_nvram_config,
2261         .update_fw_options      = qla81xx_update_fw_options,
2262         .load_risc              = qla81xx_load_risc,
2263         .pci_info_str           = qla24xx_pci_info_str,
2264         .fw_version_str         = qla24xx_fw_version_str,
2265         .intr_handler           = qla24xx_intr_handler,
2266         .enable_intrs           = qla24xx_enable_intrs,
2267         .disable_intrs          = qla24xx_disable_intrs,
2268         .abort_command          = qla24xx_abort_command,
2269         .target_reset           = qla24xx_abort_target,
2270         .lun_reset              = qla24xx_lun_reset,
2271         .fabric_login           = qla24xx_login_fabric,
2272         .fabric_logout          = qla24xx_fabric_logout,
2273         .calc_req_entries       = NULL,
2274         .build_iocbs            = NULL,
2275         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2276         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2277         .read_nvram             = NULL,
2278         .write_nvram            = NULL,
2279         .fw_dump                = qla81xx_fw_dump,
2280         .beacon_on              = qla24xx_beacon_on,
2281         .beacon_off             = qla24xx_beacon_off,
2282         .beacon_blink           = qla83xx_beacon_blink,
2283         .read_optrom            = qla25xx_read_optrom_data,
2284         .write_optrom           = qla24xx_write_optrom_data,
2285         .get_flash_version      = qla24xx_get_flash_version,
2286         .start_scsi             = qla24xx_dif_start_scsi,
2287         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2288         .abort_isp              = qla2x00_abort_isp,
2289         .iospace_config         = qla2x00_iospace_config,
2290         .initialize_adapter     = qla2x00_initialize_adapter,
2291 };
2292
2293 static struct isp_operations qla82xx_isp_ops = {
2294         .pci_config             = qla82xx_pci_config,
2295         .reset_chip             = qla82xx_reset_chip,
2296         .chip_diag              = qla24xx_chip_diag,
2297         .config_rings           = qla82xx_config_rings,
2298         .reset_adapter          = qla24xx_reset_adapter,
2299         .nvram_config           = qla81xx_nvram_config,
2300         .update_fw_options      = qla24xx_update_fw_options,
2301         .load_risc              = qla82xx_load_risc,
2302         .pci_info_str           = qla24xx_pci_info_str,
2303         .fw_version_str         = qla24xx_fw_version_str,
2304         .intr_handler           = qla82xx_intr_handler,
2305         .enable_intrs           = qla82xx_enable_intrs,
2306         .disable_intrs          = qla82xx_disable_intrs,
2307         .abort_command          = qla24xx_abort_command,
2308         .target_reset           = qla24xx_abort_target,
2309         .lun_reset              = qla24xx_lun_reset,
2310         .fabric_login           = qla24xx_login_fabric,
2311         .fabric_logout          = qla24xx_fabric_logout,
2312         .calc_req_entries       = NULL,
2313         .build_iocbs            = NULL,
2314         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2315         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2316         .read_nvram             = qla24xx_read_nvram_data,
2317         .write_nvram            = qla24xx_write_nvram_data,
2318         .fw_dump                = qla82xx_fw_dump,
2319         .beacon_on              = qla82xx_beacon_on,
2320         .beacon_off             = qla82xx_beacon_off,
2321         .beacon_blink           = NULL,
2322         .read_optrom            = qla82xx_read_optrom_data,
2323         .write_optrom           = qla82xx_write_optrom_data,
2324         .get_flash_version      = qla82xx_get_flash_version,
2325         .start_scsi             = qla82xx_start_scsi,
2326         .start_scsi_mq          = NULL,
2327         .abort_isp              = qla82xx_abort_isp,
2328         .iospace_config         = qla82xx_iospace_config,
2329         .initialize_adapter     = qla2x00_initialize_adapter,
2330 };
2331
2332 static struct isp_operations qla8044_isp_ops = {
2333         .pci_config             = qla82xx_pci_config,
2334         .reset_chip             = qla82xx_reset_chip,
2335         .chip_diag              = qla24xx_chip_diag,
2336         .config_rings           = qla82xx_config_rings,
2337         .reset_adapter          = qla24xx_reset_adapter,
2338         .nvram_config           = qla81xx_nvram_config,
2339         .update_fw_options      = qla24xx_update_fw_options,
2340         .load_risc              = qla82xx_load_risc,
2341         .pci_info_str           = qla24xx_pci_info_str,
2342         .fw_version_str         = qla24xx_fw_version_str,
2343         .intr_handler           = qla8044_intr_handler,
2344         .enable_intrs           = qla82xx_enable_intrs,
2345         .disable_intrs          = qla82xx_disable_intrs,
2346         .abort_command          = qla24xx_abort_command,
2347         .target_reset           = qla24xx_abort_target,
2348         .lun_reset              = qla24xx_lun_reset,
2349         .fabric_login           = qla24xx_login_fabric,
2350         .fabric_logout          = qla24xx_fabric_logout,
2351         .calc_req_entries       = NULL,
2352         .build_iocbs            = NULL,
2353         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2354         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2355         .read_nvram             = NULL,
2356         .write_nvram            = NULL,
2357         .fw_dump                = qla8044_fw_dump,
2358         .beacon_on              = qla82xx_beacon_on,
2359         .beacon_off             = qla82xx_beacon_off,
2360         .beacon_blink           = NULL,
2361         .read_optrom            = qla8044_read_optrom_data,
2362         .write_optrom           = qla8044_write_optrom_data,
2363         .get_flash_version      = qla82xx_get_flash_version,
2364         .start_scsi             = qla82xx_start_scsi,
2365         .start_scsi_mq          = NULL,
2366         .abort_isp              = qla8044_abort_isp,
2367         .iospace_config         = qla82xx_iospace_config,
2368         .initialize_adapter     = qla2x00_initialize_adapter,
2369 };
2370
2371 static struct isp_operations qla83xx_isp_ops = {
2372         .pci_config             = qla25xx_pci_config,
2373         .reset_chip             = qla24xx_reset_chip,
2374         .chip_diag              = qla24xx_chip_diag,
2375         .config_rings           = qla24xx_config_rings,
2376         .reset_adapter          = qla24xx_reset_adapter,
2377         .nvram_config           = qla81xx_nvram_config,
2378         .update_fw_options      = qla81xx_update_fw_options,
2379         .load_risc              = qla81xx_load_risc,
2380         .pci_info_str           = qla24xx_pci_info_str,
2381         .fw_version_str         = qla24xx_fw_version_str,
2382         .intr_handler           = qla24xx_intr_handler,
2383         .enable_intrs           = qla24xx_enable_intrs,
2384         .disable_intrs          = qla24xx_disable_intrs,
2385         .abort_command          = qla24xx_abort_command,
2386         .target_reset           = qla24xx_abort_target,
2387         .lun_reset              = qla24xx_lun_reset,
2388         .fabric_login           = qla24xx_login_fabric,
2389         .fabric_logout          = qla24xx_fabric_logout,
2390         .calc_req_entries       = NULL,
2391         .build_iocbs            = NULL,
2392         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2393         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2394         .read_nvram             = NULL,
2395         .write_nvram            = NULL,
2396         .fw_dump                = qla83xx_fw_dump,
2397         .beacon_on              = qla24xx_beacon_on,
2398         .beacon_off             = qla24xx_beacon_off,
2399         .beacon_blink           = qla83xx_beacon_blink,
2400         .read_optrom            = qla25xx_read_optrom_data,
2401         .write_optrom           = qla24xx_write_optrom_data,
2402         .get_flash_version      = qla24xx_get_flash_version,
2403         .start_scsi             = qla24xx_dif_start_scsi,
2404         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2405         .abort_isp              = qla2x00_abort_isp,
2406         .iospace_config         = qla83xx_iospace_config,
2407         .initialize_adapter     = qla2x00_initialize_adapter,
2408 };
2409
2410 static struct isp_operations qlafx00_isp_ops = {
2411         .pci_config             = qlafx00_pci_config,
2412         .reset_chip             = qlafx00_soft_reset,
2413         .chip_diag              = qlafx00_chip_diag,
2414         .config_rings           = qlafx00_config_rings,
2415         .reset_adapter          = qlafx00_soft_reset,
2416         .nvram_config           = NULL,
2417         .update_fw_options      = NULL,
2418         .load_risc              = NULL,
2419         .pci_info_str           = qlafx00_pci_info_str,
2420         .fw_version_str         = qlafx00_fw_version_str,
2421         .intr_handler           = qlafx00_intr_handler,
2422         .enable_intrs           = qlafx00_enable_intrs,
2423         .disable_intrs          = qlafx00_disable_intrs,
2424         .abort_command          = qla24xx_async_abort_command,
2425         .target_reset           = qlafx00_abort_target,
2426         .lun_reset              = qlafx00_lun_reset,
2427         .fabric_login           = NULL,
2428         .fabric_logout          = NULL,
2429         .calc_req_entries       = NULL,
2430         .build_iocbs            = NULL,
2431         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2432         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2433         .read_nvram             = qla24xx_read_nvram_data,
2434         .write_nvram            = qla24xx_write_nvram_data,
2435         .fw_dump                = NULL,
2436         .beacon_on              = qla24xx_beacon_on,
2437         .beacon_off             = qla24xx_beacon_off,
2438         .beacon_blink           = NULL,
2439         .read_optrom            = qla24xx_read_optrom_data,
2440         .write_optrom           = qla24xx_write_optrom_data,
2441         .get_flash_version      = qla24xx_get_flash_version,
2442         .start_scsi             = qlafx00_start_scsi,
2443         .start_scsi_mq          = NULL,
2444         .abort_isp              = qlafx00_abort_isp,
2445         .iospace_config         = qlafx00_iospace_config,
2446         .initialize_adapter     = qlafx00_initialize_adapter,
2447 };
2448
2449 static struct isp_operations qla27xx_isp_ops = {
2450         .pci_config             = qla25xx_pci_config,
2451         .reset_chip             = qla24xx_reset_chip,
2452         .chip_diag              = qla24xx_chip_diag,
2453         .config_rings           = qla24xx_config_rings,
2454         .reset_adapter          = qla24xx_reset_adapter,
2455         .nvram_config           = qla81xx_nvram_config,
2456         .update_fw_options      = qla81xx_update_fw_options,
2457         .load_risc              = qla81xx_load_risc,
2458         .pci_info_str           = qla24xx_pci_info_str,
2459         .fw_version_str         = qla24xx_fw_version_str,
2460         .intr_handler           = qla24xx_intr_handler,
2461         .enable_intrs           = qla24xx_enable_intrs,
2462         .disable_intrs          = qla24xx_disable_intrs,
2463         .abort_command          = qla24xx_abort_command,
2464         .target_reset           = qla24xx_abort_target,
2465         .lun_reset              = qla24xx_lun_reset,
2466         .fabric_login           = qla24xx_login_fabric,
2467         .fabric_logout          = qla24xx_fabric_logout,
2468         .calc_req_entries       = NULL,
2469         .build_iocbs            = NULL,
2470         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2471         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2472         .read_nvram             = NULL,
2473         .write_nvram            = NULL,
2474         .fw_dump                = qla27xx_fwdump,
2475         .beacon_on              = qla24xx_beacon_on,
2476         .beacon_off             = qla24xx_beacon_off,
2477         .beacon_blink           = qla83xx_beacon_blink,
2478         .read_optrom            = qla25xx_read_optrom_data,
2479         .write_optrom           = qla24xx_write_optrom_data,
2480         .get_flash_version      = qla24xx_get_flash_version,
2481         .start_scsi             = qla24xx_dif_start_scsi,
2482         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2483         .abort_isp              = qla2x00_abort_isp,
2484         .iospace_config         = qla83xx_iospace_config,
2485         .initialize_adapter     = qla2x00_initialize_adapter,
2486 };
2487
2488 static inline void
2489 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2490 {
2491         ha->device_type = DT_EXTENDED_IDS;
2492         switch (ha->pdev->device) {
2493         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2494                 ha->isp_type |= DT_ISP2100;
2495                 ha->device_type &= ~DT_EXTENDED_IDS;
2496                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2497                 break;
2498         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2499                 ha->isp_type |= DT_ISP2200;
2500                 ha->device_type &= ~DT_EXTENDED_IDS;
2501                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2502                 break;
2503         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2504                 ha->isp_type |= DT_ISP2300;
2505                 ha->device_type |= DT_ZIO_SUPPORTED;
2506                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2507                 break;
2508         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2509                 ha->isp_type |= DT_ISP2312;
2510                 ha->device_type |= DT_ZIO_SUPPORTED;
2511                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2512                 break;
2513         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2514                 ha->isp_type |= DT_ISP2322;
2515                 ha->device_type |= DT_ZIO_SUPPORTED;
2516                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2517                     ha->pdev->subsystem_device == 0x0170)
2518                         ha->device_type |= DT_OEM_001;
2519                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2520                 break;
2521         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2522                 ha->isp_type |= DT_ISP6312;
2523                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2524                 break;
2525         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2526                 ha->isp_type |= DT_ISP6322;
2527                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2528                 break;
2529         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2530                 ha->isp_type |= DT_ISP2422;
2531                 ha->device_type |= DT_ZIO_SUPPORTED;
2532                 ha->device_type |= DT_FWI2;
2533                 ha->device_type |= DT_IIDMA;
2534                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2535                 break;
2536         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2537                 ha->isp_type |= DT_ISP2432;
2538                 ha->device_type |= DT_ZIO_SUPPORTED;
2539                 ha->device_type |= DT_FWI2;
2540                 ha->device_type |= DT_IIDMA;
2541                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2542                 break;
2543         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2544                 ha->isp_type |= DT_ISP8432;
2545                 ha->device_type |= DT_ZIO_SUPPORTED;
2546                 ha->device_type |= DT_FWI2;
2547                 ha->device_type |= DT_IIDMA;
2548                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2549                 break;
2550         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2551                 ha->isp_type |= DT_ISP5422;
2552                 ha->device_type |= DT_FWI2;
2553                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2554                 break;
2555         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2556                 ha->isp_type |= DT_ISP5432;
2557                 ha->device_type |= DT_FWI2;
2558                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2559                 break;
2560         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2561                 ha->isp_type |= DT_ISP2532;
2562                 ha->device_type |= DT_ZIO_SUPPORTED;
2563                 ha->device_type |= DT_FWI2;
2564                 ha->device_type |= DT_IIDMA;
2565                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2566                 break;
2567         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2568                 ha->isp_type |= DT_ISP8001;
2569                 ha->device_type |= DT_ZIO_SUPPORTED;
2570                 ha->device_type |= DT_FWI2;
2571                 ha->device_type |= DT_IIDMA;
2572                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2573                 break;
2574         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2575                 ha->isp_type |= DT_ISP8021;
2576                 ha->device_type |= DT_ZIO_SUPPORTED;
2577                 ha->device_type |= DT_FWI2;
2578                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2579                 /* Initialize 82XX ISP flags */
2580                 qla82xx_init_flags(ha);
2581                 break;
2582          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2583                 ha->isp_type |= DT_ISP8044;
2584                 ha->device_type |= DT_ZIO_SUPPORTED;
2585                 ha->device_type |= DT_FWI2;
2586                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2587                 /* Initialize 82XX ISP flags */
2588                 qla82xx_init_flags(ha);
2589                 break;
2590         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2591                 ha->isp_type |= DT_ISP2031;
2592                 ha->device_type |= DT_ZIO_SUPPORTED;
2593                 ha->device_type |= DT_FWI2;
2594                 ha->device_type |= DT_IIDMA;
2595                 ha->device_type |= DT_T10_PI;
2596                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2597                 break;
2598         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2599                 ha->isp_type |= DT_ISP8031;
2600                 ha->device_type |= DT_ZIO_SUPPORTED;
2601                 ha->device_type |= DT_FWI2;
2602                 ha->device_type |= DT_IIDMA;
2603                 ha->device_type |= DT_T10_PI;
2604                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2605                 break;
2606         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2607                 ha->isp_type |= DT_ISPFX00;
2608                 break;
2609         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2610                 ha->isp_type |= DT_ISP2071;
2611                 ha->device_type |= DT_ZIO_SUPPORTED;
2612                 ha->device_type |= DT_FWI2;
2613                 ha->device_type |= DT_IIDMA;
2614                 ha->device_type |= DT_T10_PI;
2615                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2616                 break;
2617         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2618                 ha->isp_type |= DT_ISP2271;
2619                 ha->device_type |= DT_ZIO_SUPPORTED;
2620                 ha->device_type |= DT_FWI2;
2621                 ha->device_type |= DT_IIDMA;
2622                 ha->device_type |= DT_T10_PI;
2623                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2624                 break;
2625         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2626                 ha->isp_type |= DT_ISP2261;
2627                 ha->device_type |= DT_ZIO_SUPPORTED;
2628                 ha->device_type |= DT_FWI2;
2629                 ha->device_type |= DT_IIDMA;
2630                 ha->device_type |= DT_T10_PI;
2631                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2632                 break;
2633         }
2634
2635         if (IS_QLA82XX(ha))
2636                 ha->port_no = ha->portnum & 1;
2637         else {
2638                 /* Get adapter physical port no from interrupt pin register. */
2639                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2640                 if (IS_QLA27XX(ha))
2641                         ha->port_no--;
2642                 else
2643                         ha->port_no = !(ha->port_no & 1);
2644         }
2645
2646         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2647             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2648             ha->device_type, ha->port_no, ha->fw_srisc_address);
2649 }
2650
2651 static void
2652 qla2xxx_scan_start(struct Scsi_Host *shost)
2653 {
2654         scsi_qla_host_t *vha = shost_priv(shost);
2655
2656         if (vha->hw->flags.running_gold_fw)
2657                 return;
2658
2659         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2660         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2661         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2662         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2663 }
2664
2665 static int
2666 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2667 {
2668         scsi_qla_host_t *vha = shost_priv(shost);
2669
2670         if (test_bit(UNLOADING, &vha->dpc_flags))
2671                 return 1;
2672         if (!vha->host)
2673                 return 1;
2674         if (time > vha->hw->loop_reset_delay * HZ)
2675                 return 1;
2676
2677         return atomic_read(&vha->loop_state) == LOOP_READY;
2678 }
2679
2680 static void qla2x00_iocb_work_fn(struct work_struct *work)
2681 {
2682         struct scsi_qla_host *vha = container_of(work,
2683                 struct scsi_qla_host, iocb_work);
2684         int cnt = 0;
2685
2686         while (!list_empty(&vha->work_list)) {
2687                 qla2x00_do_work(vha);
2688                 cnt++;
2689                 if (cnt > 10)
2690                         break;
2691         }
2692 }
2693
2694 /*
2695  * PCI driver interface
2696  */
2697 static int
2698 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2699 {
2700         int     ret = -ENODEV;
2701         struct Scsi_Host *host;
2702         scsi_qla_host_t *base_vha = NULL;
2703         struct qla_hw_data *ha;
2704         char pci_info[30];
2705         char fw_str[30], wq_name[30];
2706         struct scsi_host_template *sht;
2707         int bars, mem_only = 0;
2708         uint16_t req_length = 0, rsp_length = 0;
2709         struct req_que *req = NULL;
2710         struct rsp_que *rsp = NULL;
2711         int i;
2712
2713         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2714         sht = &qla2xxx_driver_template;
2715         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2716             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2717             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2718             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2719             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2720             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2721             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2722             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2723             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2724             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2725             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2726             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2727             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2728             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2729             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2730                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2731                 mem_only = 1;
2732                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2733                     "Mem only adapter.\n");
2734         }
2735         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2736             "Bars=%d.\n", bars);
2737
2738         if (mem_only) {
2739                 if (pci_enable_device_mem(pdev))
2740                         return ret;
2741         } else {
2742                 if (pci_enable_device(pdev))
2743                         return ret;
2744         }
2745
2746         /* This may fail but that's ok */
2747         pci_enable_pcie_error_reporting(pdev);
2748
2749         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2750         if (!ha) {
2751                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2752                     "Unable to allocate memory for ha.\n");
2753                 goto disable_device;
2754         }
2755         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2756             "Memory allocated for ha=%p.\n", ha);
2757         ha->pdev = pdev;
2758         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2759         spin_lock_init(&ha->tgt.q_full_lock);
2760         spin_lock_init(&ha->tgt.sess_lock);
2761         spin_lock_init(&ha->tgt.atio_lock);
2762
2763         atomic_set(&ha->nvme_active_aen_cnt, 0);
2764
2765         /* Clear our data area */
2766         ha->bars = bars;
2767         ha->mem_only = mem_only;
2768         spin_lock_init(&ha->hardware_lock);
2769         spin_lock_init(&ha->vport_slock);
2770         mutex_init(&ha->selflogin_lock);
2771         mutex_init(&ha->optrom_mutex);
2772
2773         /* Set ISP-type information. */
2774         qla2x00_set_isp_flags(ha);
2775
2776         /* Set EEH reset type to fundamental if required by hba */
2777         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2778             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2779                 pdev->needs_freset = 1;
2780
2781         ha->prev_topology = 0;
2782         ha->init_cb_size = sizeof(init_cb_t);
2783         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2784         ha->optrom_size = OPTROM_SIZE_2300;
2785
2786         /* Assign ISP specific operations. */
2787         if (IS_QLA2100(ha)) {
2788                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2789                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2790                 req_length = REQUEST_ENTRY_CNT_2100;
2791                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2792                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2793                 ha->gid_list_info_size = 4;
2794                 ha->flash_conf_off = ~0;
2795                 ha->flash_data_off = ~0;
2796                 ha->nvram_conf_off = ~0;
2797                 ha->nvram_data_off = ~0;
2798                 ha->isp_ops = &qla2100_isp_ops;
2799         } else if (IS_QLA2200(ha)) {
2800                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2801                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2802                 req_length = REQUEST_ENTRY_CNT_2200;
2803                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2804                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2805                 ha->gid_list_info_size = 4;
2806                 ha->flash_conf_off = ~0;
2807                 ha->flash_data_off = ~0;
2808                 ha->nvram_conf_off = ~0;
2809                 ha->nvram_data_off = ~0;
2810                 ha->isp_ops = &qla2100_isp_ops;
2811         } else if (IS_QLA23XX(ha)) {
2812                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2813                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2814                 req_length = REQUEST_ENTRY_CNT_2200;
2815                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2816                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2817                 ha->gid_list_info_size = 6;
2818                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2819                         ha->optrom_size = OPTROM_SIZE_2322;
2820                 ha->flash_conf_off = ~0;
2821                 ha->flash_data_off = ~0;
2822                 ha->nvram_conf_off = ~0;
2823                 ha->nvram_data_off = ~0;
2824                 ha->isp_ops = &qla2300_isp_ops;
2825         } else if (IS_QLA24XX_TYPE(ha)) {
2826                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2827                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2828                 req_length = REQUEST_ENTRY_CNT_24XX;
2829                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2830                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2831                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2832                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2833                 ha->gid_list_info_size = 8;
2834                 ha->optrom_size = OPTROM_SIZE_24XX;
2835                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2836                 ha->isp_ops = &qla24xx_isp_ops;
2837                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2838                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2839                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2840                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2841         } else if (IS_QLA25XX(ha)) {
2842                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2843                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2844                 req_length = REQUEST_ENTRY_CNT_24XX;
2845                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2846                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2847                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2848                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2849                 ha->gid_list_info_size = 8;
2850                 ha->optrom_size = OPTROM_SIZE_25XX;
2851                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2852                 ha->isp_ops = &qla25xx_isp_ops;
2853                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2854                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2855                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2856                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2857         } else if (IS_QLA81XX(ha)) {
2858                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2859                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2860                 req_length = REQUEST_ENTRY_CNT_24XX;
2861                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2862                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2863                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2864                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2865                 ha->gid_list_info_size = 8;
2866                 ha->optrom_size = OPTROM_SIZE_81XX;
2867                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2868                 ha->isp_ops = &qla81xx_isp_ops;
2869                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2870                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2871                 ha->nvram_conf_off = ~0;
2872                 ha->nvram_data_off = ~0;
2873         } else if (IS_QLA82XX(ha)) {
2874                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2875                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2876                 req_length = REQUEST_ENTRY_CNT_82XX;
2877                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2878                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2879                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2880                 ha->gid_list_info_size = 8;
2881                 ha->optrom_size = OPTROM_SIZE_82XX;
2882                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2883                 ha->isp_ops = &qla82xx_isp_ops;
2884                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2885                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2886                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2887                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2888         } else if (IS_QLA8044(ha)) {
2889                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2890                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2891                 req_length = REQUEST_ENTRY_CNT_82XX;
2892                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2893                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2894                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2895                 ha->gid_list_info_size = 8;
2896                 ha->optrom_size = OPTROM_SIZE_83XX;
2897                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2898                 ha->isp_ops = &qla8044_isp_ops;
2899                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2900                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2901                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2902                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2903         } else if (IS_QLA83XX(ha)) {
2904                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2905                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2906                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2907                 req_length = REQUEST_ENTRY_CNT_83XX;
2908                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2909                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2910                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2911                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2912                 ha->gid_list_info_size = 8;
2913                 ha->optrom_size = OPTROM_SIZE_83XX;
2914                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2915                 ha->isp_ops = &qla83xx_isp_ops;
2916                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2917                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2918                 ha->nvram_conf_off = ~0;
2919                 ha->nvram_data_off = ~0;
2920         }  else if (IS_QLAFX00(ha)) {
2921                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2922                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2923                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2924                 req_length = REQUEST_ENTRY_CNT_FX00;
2925                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2926                 ha->isp_ops = &qlafx00_isp_ops;
2927                 ha->port_down_retry_count = 30; /* default value */
2928                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2929                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2930                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2931                 ha->mr.fw_hbt_en = 1;
2932                 ha->mr.host_info_resend = false;
2933                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2934         } else if (IS_QLA27XX(ha)) {
2935                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2936                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2937                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2938                 req_length = REQUEST_ENTRY_CNT_83XX;
2939                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2940                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2941                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2942                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2943                 ha->gid_list_info_size = 8;
2944                 ha->optrom_size = OPTROM_SIZE_83XX;
2945                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2946                 ha->isp_ops = &qla27xx_isp_ops;
2947                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2948                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2949                 ha->nvram_conf_off = ~0;
2950                 ha->nvram_data_off = ~0;
2951         }
2952
2953         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2954             "mbx_count=%d, req_length=%d, "
2955             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2956             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2957             "max_fibre_devices=%d.\n",
2958             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2959             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2960             ha->nvram_npiv_size, ha->max_fibre_devices);
2961         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2962             "isp_ops=%p, flash_conf_off=%d, "
2963             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2964             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2965             ha->nvram_conf_off, ha->nvram_data_off);
2966
2967         /* Configure PCI I/O space */
2968         ret = ha->isp_ops->iospace_config(ha);
2969         if (ret)
2970                 goto iospace_config_failed;
2971
2972         ql_log_pci(ql_log_info, pdev, 0x001d,
2973             "Found an ISP%04X irq %d iobase 0x%p.\n",
2974             pdev->device, pdev->irq, ha->iobase);
2975         mutex_init(&ha->vport_lock);
2976         mutex_init(&ha->mq_lock);
2977         init_completion(&ha->mbx_cmd_comp);
2978         complete(&ha->mbx_cmd_comp);
2979         init_completion(&ha->mbx_intr_comp);
2980         init_completion(&ha->dcbx_comp);
2981         init_completion(&ha->lb_portup_comp);
2982
2983         set_bit(0, (unsigned long *) ha->vp_idx_map);
2984
2985         qla2x00_config_dma_addressing(ha);
2986         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2987             "64 Bit addressing is %s.\n",
2988             ha->flags.enable_64bit_addressing ? "enable" :
2989             "disable");
2990         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2991         if (ret) {
2992                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2993                     "Failed to allocate memory for adapter, aborting.\n");
2994
2995                 goto probe_hw_failed;
2996         }
2997
2998         req->max_q_depth = MAX_Q_DEPTH;
2999         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3000                 req->max_q_depth = ql2xmaxqdepth;
3001
3002
3003         base_vha = qla2x00_create_host(sht, ha);
3004         if (!base_vha) {
3005                 ret = -ENOMEM;
3006                 qla2x00_mem_free(ha);
3007                 qla2x00_free_req_que(ha, req);
3008                 qla2x00_free_rsp_que(ha, rsp);
3009                 goto probe_hw_failed;
3010         }
3011
3012         pci_set_drvdata(pdev, base_vha);
3013         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3014
3015         host = base_vha->host;
3016         base_vha->req = req;
3017         if (IS_QLA2XXX_MIDTYPE(ha))
3018                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
3019         else
3020                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3021                                                 base_vha->vp_idx;
3022
3023         /* Setup fcport template structure. */
3024         ha->mr.fcport.vha = base_vha;
3025         ha->mr.fcport.port_type = FCT_UNKNOWN;
3026         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3027         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3028         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3029         ha->mr.fcport.scan_state = 1;
3030
3031         /* Set the SG table size based on ISP type */
3032         if (!IS_FWI2_CAPABLE(ha)) {
3033                 if (IS_QLA2100(ha))
3034                         host->sg_tablesize = 32;
3035         } else {
3036                 if (!IS_QLA82XX(ha))
3037                         host->sg_tablesize = QLA_SG_ALL;
3038         }
3039         host->max_id = ha->max_fibre_devices;
3040         host->cmd_per_lun = 3;
3041         host->unique_id = host->host_no;
3042         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3043                 host->max_cmd_len = 32;
3044         else
3045                 host->max_cmd_len = MAX_CMDSZ;
3046         host->max_channel = MAX_BUSES - 1;
3047         /* Older HBAs support only 16-bit LUNs */
3048         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3049             ql2xmaxlun > 0xffff)
3050                 host->max_lun = 0xffff;
3051         else
3052                 host->max_lun = ql2xmaxlun;
3053         host->transportt = qla2xxx_transport_template;
3054         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3055
3056         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3057             "max_id=%d this_id=%d "
3058             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3059             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3060             host->this_id, host->cmd_per_lun, host->unique_id,
3061             host->max_cmd_len, host->max_channel, host->max_lun,
3062             host->transportt, sht->vendor_id);
3063
3064         /* Set up the irqs */
3065         ret = qla2x00_request_irqs(ha, rsp);
3066         if (ret)
3067                 goto probe_init_failed;
3068
3069         /* Alloc arrays of request and response ring ptrs */
3070         if (!qla2x00_alloc_queues(ha, req, rsp)) {
3071                 ql_log(ql_log_fatal, base_vha, 0x003d,
3072                     "Failed to allocate memory for queue pointers..."
3073                     "aborting.\n");
3074                 goto probe_init_failed;
3075         }
3076
3077         if (ha->mqenable && shost_use_blk_mq(host)) {
3078                 /* number of hardware queues supported by blk/scsi-mq*/
3079                 host->nr_hw_queues = ha->max_qpairs;
3080
3081                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3082                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3083         } else
3084                 ql_dbg(ql_dbg_init, base_vha, 0x0193,
3085                         "blk/scsi-mq disabled.\n");
3086
3087         qlt_probe_one_stage1(base_vha, ha);
3088
3089         pci_save_state(pdev);
3090
3091         /* Assign back pointers */
3092         rsp->req = req;
3093         req->rsp = rsp;
3094
3095         if (IS_QLAFX00(ha)) {
3096                 ha->rsp_q_map[0] = rsp;
3097                 ha->req_q_map[0] = req;
3098                 set_bit(0, ha->req_qid_map);
3099                 set_bit(0, ha->rsp_qid_map);
3100         }
3101
3102         /* FWI2-capable only. */
3103         req->req_q_in = &ha->iobase->isp24.req_q_in;
3104         req->req_q_out = &ha->iobase->isp24.req_q_out;
3105         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3106         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3107         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3108                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3109                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3110                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3111                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3112         }
3113
3114         if (IS_QLAFX00(ha)) {
3115                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3116                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3117                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3118                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3119         }
3120
3121         if (IS_P3P_TYPE(ha)) {
3122                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3123                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3124                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3125         }
3126
3127         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3128             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3129             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3130         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3131             "req->req_q_in=%p req->req_q_out=%p "
3132             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3133             req->req_q_in, req->req_q_out,
3134             rsp->rsp_q_in, rsp->rsp_q_out);
3135         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3136             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3137             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3138         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3139             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3140             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3141
3142         if (ha->isp_ops->initialize_adapter(base_vha)) {
3143                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3144                     "Failed to initialize adapter - Adapter flags %x.\n",
3145                     base_vha->device_flags);
3146
3147                 if (IS_QLA82XX(ha)) {
3148                         qla82xx_idc_lock(ha);
3149                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3150                                 QLA8XXX_DEV_FAILED);
3151                         qla82xx_idc_unlock(ha);
3152                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3153                             "HW State: FAILED.\n");
3154                 } else if (IS_QLA8044(ha)) {
3155                         qla8044_idc_lock(ha);
3156                         qla8044_wr_direct(base_vha,
3157                                 QLA8044_CRB_DEV_STATE_INDEX,
3158                                 QLA8XXX_DEV_FAILED);
3159                         qla8044_idc_unlock(ha);
3160                         ql_log(ql_log_fatal, base_vha, 0x0150,
3161                             "HW State: FAILED.\n");
3162                 }
3163
3164                 ret = -ENODEV;
3165                 goto probe_failed;
3166         }
3167
3168         if (IS_QLAFX00(ha))
3169                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3170         else
3171                 host->can_queue = req->num_outstanding_cmds - 10;
3172
3173         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3174             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3175             host->can_queue, base_vha->req,
3176             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3177
3178         if (ha->mqenable) {
3179                 bool mq = false;
3180                 bool startit = false;
3181                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 0);
3182
3183                 if (QLA_TGT_MODE_ENABLED()) {
3184                         mq = true;
3185                         startit = false;
3186                 }
3187
3188                 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3189                     shost_use_blk_mq(host)) {
3190                         mq = true;
3191                         startit = true;
3192                 }
3193
3194                 if (mq) {
3195                         /* Create start of day qpairs for Block MQ */
3196                         for (i = 0; i < ha->max_qpairs; i++)
3197                                 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3198                 }
3199         }
3200
3201         if (ha->flags.running_gold_fw)
3202                 goto skip_dpc;
3203
3204         /*
3205          * Startup the kernel thread for this host adapter
3206          */
3207         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3208             "%s_dpc", base_vha->host_str);
3209         if (IS_ERR(ha->dpc_thread)) {
3210                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3211                     "Failed to start DPC thread.\n");
3212                 ret = PTR_ERR(ha->dpc_thread);
3213                 goto probe_failed;
3214         }
3215         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3216             "DPC thread started successfully.\n");
3217
3218         /*
3219          * If we're not coming up in initiator mode, we might sit for
3220          * a while without waking up the dpc thread, which leads to a
3221          * stuck process warning.  So just kick the dpc once here and
3222          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3223          */
3224         qla2xxx_wake_dpc(base_vha);
3225
3226         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3227         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3228
3229         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3230                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3231                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3232                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3233
3234                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3235                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3236                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3237                 INIT_WORK(&ha->idc_state_handler,
3238                     qla83xx_idc_state_handler_work);
3239                 INIT_WORK(&ha->nic_core_unrecoverable,
3240                     qla83xx_nic_core_unrecoverable_work);
3241         }
3242
3243 skip_dpc:
3244         list_add_tail(&base_vha->list, &ha->vp_list);
3245         base_vha->host->irq = ha->pdev->irq;
3246
3247         /* Initialized the timer */
3248         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
3249         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3250             "Started qla2x00_timer with "
3251             "interval=%d.\n", WATCH_INTERVAL);
3252         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3253             "Detected hba at address=%p.\n",
3254             ha);
3255
3256         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3257                 if (ha->fw_attributes & BIT_4) {
3258                         int prot = 0, guard;
3259                         base_vha->flags.difdix_supported = 1;
3260                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3261                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3262                         if (ql2xenabledif == 1)
3263                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3264                         scsi_host_set_prot(host,
3265                             prot | SHOST_DIF_TYPE1_PROTECTION
3266                             | SHOST_DIF_TYPE2_PROTECTION
3267                             | SHOST_DIF_TYPE3_PROTECTION
3268                             | SHOST_DIX_TYPE1_PROTECTION
3269                             | SHOST_DIX_TYPE2_PROTECTION
3270                             | SHOST_DIX_TYPE3_PROTECTION);
3271
3272                         guard = SHOST_DIX_GUARD_CRC;
3273
3274                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3275                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3276                                 guard |= SHOST_DIX_GUARD_IP;
3277
3278                         scsi_host_set_guard(host, guard);
3279                 } else
3280                         base_vha->flags.difdix_supported = 0;
3281         }
3282
3283         ha->isp_ops->enable_intrs(ha);
3284
3285         if (IS_QLAFX00(ha)) {
3286                 ret = qlafx00_fx_disc(base_vha,
3287                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3288                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3289                     QLA_SG_ALL : 128;
3290         }
3291
3292         ret = scsi_add_host(host, &pdev->dev);
3293         if (ret)
3294                 goto probe_failed;
3295
3296         base_vha->flags.init_done = 1;
3297         base_vha->flags.online = 1;
3298         ha->prev_minidump_failed = 0;
3299
3300         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3301             "Init done and hba is online.\n");
3302
3303         if (qla_ini_mode_enabled(base_vha) ||
3304                 qla_dual_mode_enabled(base_vha))
3305                 scsi_scan_host(host);
3306         else
3307                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3308                         "skipping scsi_scan_host() for non-initiator port\n");
3309
3310         qla2x00_alloc_sysfs_attr(base_vha);
3311
3312         if (IS_QLAFX00(ha)) {
3313                 ret = qlafx00_fx_disc(base_vha,
3314                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3315
3316                 /* Register system information */
3317                 ret =  qlafx00_fx_disc(base_vha,
3318                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3319         }
3320
3321         qla2x00_init_host_attr(base_vha);
3322
3323         qla2x00_dfs_setup(base_vha);
3324
3325         ql_log(ql_log_info, base_vha, 0x00fb,
3326             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3327         ql_log(ql_log_info, base_vha, 0x00fc,
3328             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3329             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3330             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3331             base_vha->host_no,
3332             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3333
3334         qlt_add_target(ha, base_vha);
3335
3336         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3337
3338         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3339                 return -ENODEV;
3340
3341         if (ha->flags.detected_lr_sfp) {
3342                 ql_log(ql_log_info, base_vha, 0xffff,
3343                     "Reset chip to pick up LR SFP setting\n");
3344                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3345                 qla2xxx_wake_dpc(base_vha);
3346         }
3347
3348         return 0;
3349
3350 probe_init_failed:
3351         qla2x00_free_req_que(ha, req);
3352         ha->req_q_map[0] = NULL;
3353         clear_bit(0, ha->req_qid_map);
3354         qla2x00_free_rsp_que(ha, rsp);
3355         ha->rsp_q_map[0] = NULL;
3356         clear_bit(0, ha->rsp_qid_map);
3357         ha->max_req_queues = ha->max_rsp_queues = 0;
3358
3359 probe_failed:
3360         if (base_vha->timer_active)
3361                 qla2x00_stop_timer(base_vha);
3362         base_vha->flags.online = 0;
3363         if (ha->dpc_thread) {
3364                 struct task_struct *t = ha->dpc_thread;
3365
3366                 ha->dpc_thread = NULL;
3367                 kthread_stop(t);
3368         }
3369
3370         qla2x00_free_device(base_vha);
3371
3372         scsi_host_put(base_vha->host);
3373
3374 probe_hw_failed:
3375         qla2x00_clear_drv_active(ha);
3376
3377 iospace_config_failed:
3378         if (IS_P3P_TYPE(ha)) {
3379                 if (!ha->nx_pcibase)
3380                         iounmap((device_reg_t *)ha->nx_pcibase);
3381                 if (!ql2xdbwr)
3382                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3383         } else {
3384                 if (ha->iobase)
3385                         iounmap(ha->iobase);
3386                 if (ha->cregbase)
3387                         iounmap(ha->cregbase);
3388         }
3389         pci_release_selected_regions(ha->pdev, ha->bars);
3390         kfree(ha);
3391
3392 disable_device:
3393         pci_disable_device(pdev);
3394         return ret;
3395 }
3396
3397 static void
3398 qla2x00_shutdown(struct pci_dev *pdev)
3399 {
3400         scsi_qla_host_t *vha;
3401         struct qla_hw_data  *ha;
3402
3403         vha = pci_get_drvdata(pdev);
3404         ha = vha->hw;
3405
3406         ql_log(ql_log_info, vha, 0xfffa,
3407                 "Adapter shutdown\n");
3408
3409         /*
3410          * Prevent future board_disable and wait
3411          * until any pending board_disable has completed.
3412          */
3413         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3414         cancel_work_sync(&ha->board_disable);
3415
3416         if (!atomic_read(&pdev->enable_cnt))
3417                 return;
3418
3419         /* Notify ISPFX00 firmware */
3420         if (IS_QLAFX00(ha))
3421                 qlafx00_driver_shutdown(vha, 20);
3422
3423         /* Turn-off FCE trace */
3424         if (ha->flags.fce_enabled) {
3425                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3426                 ha->flags.fce_enabled = 0;
3427         }
3428
3429         /* Turn-off EFT trace */
3430         if (ha->eft)
3431                 qla2x00_disable_eft_trace(vha);
3432
3433         /* Stop currently executing firmware. */
3434         qla2x00_try_to_stop_firmware(vha);
3435
3436         /* Turn adapter off line */
3437         vha->flags.online = 0;
3438
3439         /* turn-off interrupts on the card */
3440         if (ha->interrupts_on) {
3441                 vha->flags.init_done = 0;
3442                 ha->isp_ops->disable_intrs(ha);
3443         }
3444
3445         qla2x00_free_irqs(vha);
3446
3447         qla2x00_free_fw_dump(ha);
3448
3449         pci_disable_device(pdev);
3450         ql_log(ql_log_info, vha, 0xfffe,
3451                 "Adapter shutdown successfully.\n");
3452 }
3453
3454 /* Deletes all the virtual ports for a given ha */
3455 static void
3456 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3457 {
3458         scsi_qla_host_t *vha;
3459         unsigned long flags;
3460
3461         mutex_lock(&ha->vport_lock);
3462         while (ha->cur_vport_count) {
3463                 spin_lock_irqsave(&ha->vport_slock, flags);
3464
3465                 BUG_ON(base_vha->list.next == &ha->vp_list);
3466                 /* This assumes first entry in ha->vp_list is always base vha */
3467                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3468                 scsi_host_get(vha->host);
3469
3470                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3471                 mutex_unlock(&ha->vport_lock);
3472
3473                 fc_vport_terminate(vha->fc_vport);
3474                 scsi_host_put(vha->host);
3475
3476                 mutex_lock(&ha->vport_lock);
3477         }
3478         mutex_unlock(&ha->vport_lock);
3479 }
3480
3481 /* Stops all deferred work threads */
3482 static void
3483 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3484 {
3485         /* Cancel all work and destroy DPC workqueues */
3486         if (ha->dpc_lp_wq) {
3487                 cancel_work_sync(&ha->idc_aen);
3488                 destroy_workqueue(ha->dpc_lp_wq);
3489                 ha->dpc_lp_wq = NULL;
3490         }
3491
3492         if (ha->dpc_hp_wq) {
3493                 cancel_work_sync(&ha->nic_core_reset);
3494                 cancel_work_sync(&ha->idc_state_handler);
3495                 cancel_work_sync(&ha->nic_core_unrecoverable);
3496                 destroy_workqueue(ha->dpc_hp_wq);
3497                 ha->dpc_hp_wq = NULL;
3498         }
3499
3500         /* Kill the kernel thread for this host */
3501         if (ha->dpc_thread) {
3502                 struct task_struct *t = ha->dpc_thread;
3503
3504                 /*
3505                  * qla2xxx_wake_dpc checks for ->dpc_thread
3506                  * so we need to zero it out.
3507                  */
3508                 ha->dpc_thread = NULL;
3509                 kthread_stop(t);
3510         }
3511 }
3512
3513 static void
3514 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3515 {
3516         if (IS_QLA82XX(ha)) {
3517
3518                 iounmap((device_reg_t *)ha->nx_pcibase);
3519                 if (!ql2xdbwr)
3520                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3521         } else {
3522                 if (ha->iobase)
3523                         iounmap(ha->iobase);
3524
3525                 if (ha->cregbase)
3526                         iounmap(ha->cregbase);
3527
3528                 if (ha->mqiobase)
3529                         iounmap(ha->mqiobase);
3530
3531                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3532                         iounmap(ha->msixbase);
3533         }
3534 }
3535
3536 static void
3537 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3538 {
3539         if (IS_QLA8044(ha)) {
3540                 qla8044_idc_lock(ha);
3541                 qla8044_clear_drv_active(ha);
3542                 qla8044_idc_unlock(ha);
3543         } else if (IS_QLA82XX(ha)) {
3544                 qla82xx_idc_lock(ha);
3545                 qla82xx_clear_drv_active(ha);
3546                 qla82xx_idc_unlock(ha);
3547         }
3548 }
3549
3550 static void
3551 qla2x00_remove_one(struct pci_dev *pdev)
3552 {
3553         scsi_qla_host_t *base_vha;
3554         struct qla_hw_data  *ha;
3555
3556         base_vha = pci_get_drvdata(pdev);
3557         ha = base_vha->hw;
3558
3559         /* Indicate device removal to prevent future board_disable and wait
3560          * until any pending board_disable has completed. */
3561         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3562         cancel_work_sync(&ha->board_disable);
3563
3564         /*
3565          * If the PCI device is disabled then there was a PCI-disconnect and
3566          * qla2x00_disable_board_on_pci_error has taken care of most of the
3567          * resources.
3568          */
3569         if (!atomic_read(&pdev->enable_cnt)) {
3570                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3571                     base_vha->gnl.l, base_vha->gnl.ldma);
3572
3573                 scsi_host_put(base_vha->host);
3574                 kfree(ha);
3575                 pci_set_drvdata(pdev, NULL);
3576                 return;
3577         }
3578         qla2x00_wait_for_hba_ready(base_vha);
3579
3580         /*
3581          * if UNLOAD flag is already set, then continue unload,
3582          * where it was set first.
3583          */
3584         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3585                 return;
3586
3587         set_bit(UNLOADING, &base_vha->dpc_flags);
3588
3589         qla_nvme_delete(base_vha);
3590
3591         dma_free_coherent(&ha->pdev->dev,
3592                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3593
3594         if (IS_QLAFX00(ha))
3595                 qlafx00_driver_shutdown(base_vha, 20);
3596
3597         qla2x00_delete_all_vps(ha, base_vha);
3598
3599         if (IS_QLA8031(ha)) {
3600                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3601                     "Clearing fcoe driver presence.\n");
3602                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3603                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3604                             "Error while clearing DRV-Presence.\n");
3605         }
3606
3607         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3608
3609         qla2x00_dfs_remove(base_vha);
3610
3611         qla84xx_put_chip(base_vha);
3612
3613         /* Laser should be disabled only for ISP2031 */
3614         if (IS_QLA2031(ha))
3615                 qla83xx_disable_laser(base_vha);
3616
3617         /* Disable timer */
3618         if (base_vha->timer_active)
3619                 qla2x00_stop_timer(base_vha);
3620
3621         base_vha->flags.online = 0;
3622
3623         /* free DMA memory */
3624         if (ha->exlogin_buf)
3625                 qla2x00_free_exlogin_buffer(ha);
3626
3627         /* free DMA memory */
3628         if (ha->exchoffld_buf)
3629                 qla2x00_free_exchoffld_buffer(ha);
3630
3631         qla2x00_destroy_deferred_work(ha);
3632
3633         qlt_remove_target(ha, base_vha);
3634
3635         qla2x00_free_sysfs_attr(base_vha, true);
3636
3637         fc_remove_host(base_vha->host);
3638         qlt_remove_target_resources(ha);
3639
3640         scsi_remove_host(base_vha->host);
3641
3642         qla2x00_free_device(base_vha);
3643
3644         qla2x00_clear_drv_active(ha);
3645
3646         scsi_host_put(base_vha->host);
3647
3648         qla2x00_unmap_iobases(ha);
3649
3650         pci_release_selected_regions(ha->pdev, ha->bars);
3651         kfree(ha);
3652
3653         pci_disable_pcie_error_reporting(pdev);
3654
3655         pci_disable_device(pdev);
3656 }
3657
3658 static void
3659 qla2x00_free_device(scsi_qla_host_t *vha)
3660 {
3661         struct qla_hw_data *ha = vha->hw;
3662
3663         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3664
3665         /* Disable timer */
3666         if (vha->timer_active)
3667                 qla2x00_stop_timer(vha);
3668
3669         qla25xx_delete_queues(vha);
3670
3671         if (ha->flags.fce_enabled)
3672                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3673
3674         if (ha->eft)
3675                 qla2x00_disable_eft_trace(vha);
3676
3677         /* Stop currently executing firmware. */
3678         qla2x00_try_to_stop_firmware(vha);
3679
3680         vha->flags.online = 0;
3681
3682         /* turn-off interrupts on the card */
3683         if (ha->interrupts_on) {
3684                 vha->flags.init_done = 0;
3685                 ha->isp_ops->disable_intrs(ha);
3686         }
3687
3688         qla2x00_free_fcports(vha);
3689
3690         qla2x00_free_irqs(vha);
3691
3692         /* Flush the work queue and remove it */
3693         if (ha->wq) {
3694                 flush_workqueue(ha->wq);
3695                 destroy_workqueue(ha->wq);
3696                 ha->wq = NULL;
3697         }
3698
3699
3700         qla2x00_mem_free(ha);
3701
3702         qla82xx_md_free(vha);
3703
3704         qla2x00_free_queues(ha);
3705 }
3706
3707 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3708 {
3709         fc_port_t *fcport, *tfcport;
3710
3711         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3712                 list_del(&fcport->list);
3713                 qla2x00_clear_loop_id(fcport);
3714                 kfree(fcport);
3715         }
3716 }
3717
3718 static inline void
3719 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3720     int defer)
3721 {
3722         struct fc_rport *rport;
3723         scsi_qla_host_t *base_vha;
3724         unsigned long flags;
3725
3726         if (!fcport->rport)
3727                 return;
3728
3729         rport = fcport->rport;
3730         if (defer) {
3731                 base_vha = pci_get_drvdata(vha->hw->pdev);
3732                 spin_lock_irqsave(vha->host->host_lock, flags);
3733                 fcport->drport = rport;
3734                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3735                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3736                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3737                 qla2xxx_wake_dpc(base_vha);
3738         } else {
3739                 int now;
3740                 if (rport) {
3741                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3742                             "%s %8phN. rport %p roles %x\n",
3743                             __func__, fcport->port_name, rport,
3744                             rport->roles);
3745                         fc_remote_port_delete(rport);
3746                 }
3747                 qlt_do_generation_tick(vha, &now);
3748         }
3749 }
3750
3751 /*
3752  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3753  *
3754  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3755  *
3756  * Return: None.
3757  *
3758  * Context:
3759  */
3760 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3761     int do_login, int defer)
3762 {
3763         if (IS_QLAFX00(vha->hw)) {
3764                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3765                 qla2x00_schedule_rport_del(vha, fcport, defer);
3766                 return;
3767         }
3768
3769         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3770             vha->vp_idx == fcport->vha->vp_idx) {
3771                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3772                 qla2x00_schedule_rport_del(vha, fcport, defer);
3773         }
3774         /*
3775          * We may need to retry the login, so don't change the state of the
3776          * port but do the retries.
3777          */
3778         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3779                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3780
3781         if (!do_login)
3782                 return;
3783
3784         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3785
3786         if (fcport->login_retry == 0) {
3787                 fcport->login_retry = vha->hw->login_retry_count;
3788
3789                 ql_dbg(ql_dbg_disc, vha, 0x20a3,
3790                     "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
3791                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3792         }
3793 }
3794
3795 /*
3796  * qla2x00_mark_all_devices_lost
3797  *      Updates fcport state when device goes offline.
3798  *
3799  * Input:
3800  *      ha = adapter block pointer.
3801  *      fcport = port structure pointer.
3802  *
3803  * Return:
3804  *      None.
3805  *
3806  * Context:
3807  */
3808 void
3809 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3810 {
3811         fc_port_t *fcport;
3812
3813         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3814             "Mark all dev lost\n");
3815
3816         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3817                 fcport->scan_state = 0;
3818                 qlt_schedule_sess_for_deletion_lock(fcport);
3819
3820                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3821                         continue;
3822
3823                 /*
3824                  * No point in marking the device as lost, if the device is
3825                  * already DEAD.
3826                  */
3827                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3828                         continue;
3829                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3830                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3831                         if (defer)
3832                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3833                         else if (vha->vp_idx == fcport->vha->vp_idx)
3834                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3835                 }
3836         }
3837 }
3838
3839 /*
3840 * qla2x00_mem_alloc
3841 *      Allocates adapter memory.
3842 *
3843 * Returns:
3844 *      0  = success.
3845 *      !0  = failure.
3846 */
3847 static int
3848 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3849         struct req_que **req, struct rsp_que **rsp)
3850 {
3851         char    name[16];
3852
3853         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3854                 &ha->init_cb_dma, GFP_KERNEL);
3855         if (!ha->init_cb)
3856                 goto fail;
3857
3858         if (qlt_mem_alloc(ha) < 0)
3859                 goto fail_free_init_cb;
3860
3861         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3862                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3863         if (!ha->gid_list)
3864                 goto fail_free_tgt_mem;
3865
3866         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3867         if (!ha->srb_mempool)
3868                 goto fail_free_gid_list;
3869
3870         if (IS_P3P_TYPE(ha)) {
3871                 /* Allocate cache for CT6 Ctx. */
3872                 if (!ctx_cachep) {
3873                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3874                                 sizeof(struct ct6_dsd), 0,
3875                                 SLAB_HWCACHE_ALIGN, NULL);
3876                         if (!ctx_cachep)
3877                                 goto fail_free_srb_mempool;
3878                 }
3879                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3880                         ctx_cachep);
3881                 if (!ha->ctx_mempool)
3882                         goto fail_free_srb_mempool;
3883                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3884                     "ctx_cachep=%p ctx_mempool=%p.\n",
3885                     ctx_cachep, ha->ctx_mempool);
3886         }
3887
3888         /* Get memory for cached NVRAM */
3889         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3890         if (!ha->nvram)
3891                 goto fail_free_ctx_mempool;
3892
3893         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3894                 ha->pdev->device);
3895         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3896                 DMA_POOL_SIZE, 8, 0);
3897         if (!ha->s_dma_pool)
3898                 goto fail_free_nvram;
3899
3900         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3901             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3902             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3903
3904         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3905                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3906                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3907                 if (!ha->dl_dma_pool) {
3908                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3909                             "Failed to allocate memory for dl_dma_pool.\n");
3910                         goto fail_s_dma_pool;
3911                 }
3912
3913                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3914                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3915                 if (!ha->fcp_cmnd_dma_pool) {
3916                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3917                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3918                         goto fail_dl_dma_pool;
3919                 }
3920                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3921                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3922                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3923         }
3924
3925         /* Allocate memory for SNS commands */
3926         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3927         /* Get consistent memory allocated for SNS commands */
3928                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3929                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3930                 if (!ha->sns_cmd)
3931                         goto fail_dma_pool;
3932                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3933                     "sns_cmd: %p.\n", ha->sns_cmd);
3934         } else {
3935         /* Get consistent memory allocated for MS IOCB */
3936                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3937                         &ha->ms_iocb_dma);
3938                 if (!ha->ms_iocb)
3939                         goto fail_dma_pool;
3940         /* Get consistent memory allocated for CT SNS commands */
3941                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3942                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3943                 if (!ha->ct_sns)
3944                         goto fail_free_ms_iocb;
3945                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3946                     "ms_iocb=%p ct_sns=%p.\n",
3947                     ha->ms_iocb, ha->ct_sns);
3948         }
3949
3950         /* Allocate memory for request ring */
3951         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3952         if (!*req) {
3953                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3954                     "Failed to allocate memory for req.\n");
3955                 goto fail_req;
3956         }
3957         (*req)->length = req_len;
3958         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3959                 ((*req)->length + 1) * sizeof(request_t),
3960                 &(*req)->dma, GFP_KERNEL);
3961         if (!(*req)->ring) {
3962                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3963                     "Failed to allocate memory for req_ring.\n");
3964                 goto fail_req_ring;
3965         }
3966         /* Allocate memory for response ring */
3967         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3968         if (!*rsp) {
3969                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3970                     "Failed to allocate memory for rsp.\n");
3971                 goto fail_rsp;
3972         }
3973         (*rsp)->hw = ha;
3974         (*rsp)->length = rsp_len;
3975         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3976                 ((*rsp)->length + 1) * sizeof(response_t),
3977                 &(*rsp)->dma, GFP_KERNEL);
3978         if (!(*rsp)->ring) {
3979                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3980                     "Failed to allocate memory for rsp_ring.\n");
3981                 goto fail_rsp_ring;
3982         }
3983         (*req)->rsp = *rsp;
3984         (*rsp)->req = *req;
3985         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3986             "req=%p req->length=%d req->ring=%p rsp=%p "
3987             "rsp->length=%d rsp->ring=%p.\n",
3988             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3989             (*rsp)->ring);
3990         /* Allocate memory for NVRAM data for vports */
3991         if (ha->nvram_npiv_size) {
3992                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3993                     ha->nvram_npiv_size, GFP_KERNEL);
3994                 if (!ha->npiv_info) {
3995                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3996                             "Failed to allocate memory for npiv_info.\n");
3997                         goto fail_npiv_info;
3998                 }
3999         } else
4000                 ha->npiv_info = NULL;
4001
4002         /* Get consistent memory allocated for EX-INIT-CB. */
4003         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
4004                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4005                     &ha->ex_init_cb_dma);
4006                 if (!ha->ex_init_cb)
4007                         goto fail_ex_init_cb;
4008                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4009                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4010         }
4011
4012         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4013
4014         /* Get consistent memory allocated for Async Port-Database. */
4015         if (!IS_FWI2_CAPABLE(ha)) {
4016                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4017                         &ha->async_pd_dma);
4018                 if (!ha->async_pd)
4019                         goto fail_async_pd;
4020                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4021                     "async_pd=%p.\n", ha->async_pd);
4022         }
4023
4024         INIT_LIST_HEAD(&ha->vp_list);
4025
4026         /* Allocate memory for our loop_id bitmap */
4027         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
4028             GFP_KERNEL);
4029         if (!ha->loop_id_map)
4030                 goto fail_loop_id_map;
4031         else {
4032                 qla2x00_set_reserved_loop_ids(ha);
4033                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4034                     "loop_id_map=%p.\n", ha->loop_id_map);
4035         }
4036
4037         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4038             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4039         if (!ha->sfp_data) {
4040                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4041                     "Unable to allocate memory for SFP read-data.\n");
4042                 goto fail_sfp_data;
4043         }
4044
4045         return 0;
4046
4047 fail_sfp_data:
4048         kfree(ha->loop_id_map);
4049 fail_loop_id_map:
4050         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4051 fail_async_pd:
4052         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4053 fail_ex_init_cb:
4054         kfree(ha->npiv_info);
4055 fail_npiv_info:
4056         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4057                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4058         (*rsp)->ring = NULL;
4059         (*rsp)->dma = 0;
4060 fail_rsp_ring:
4061         kfree(*rsp);
4062 fail_rsp:
4063         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4064                 sizeof(request_t), (*req)->ring, (*req)->dma);
4065         (*req)->ring = NULL;
4066         (*req)->dma = 0;
4067 fail_req_ring:
4068         kfree(*req);
4069 fail_req:
4070         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4071                 ha->ct_sns, ha->ct_sns_dma);
4072         ha->ct_sns = NULL;
4073         ha->ct_sns_dma = 0;
4074 fail_free_ms_iocb:
4075         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4076         ha->ms_iocb = NULL;
4077         ha->ms_iocb_dma = 0;
4078
4079         if (ha->sns_cmd)
4080                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4081                     ha->sns_cmd, ha->sns_cmd_dma);
4082 fail_dma_pool:
4083         if (IS_QLA82XX(ha) || ql2xenabledif) {
4084                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4085                 ha->fcp_cmnd_dma_pool = NULL;
4086         }
4087 fail_dl_dma_pool:
4088         if (IS_QLA82XX(ha) || ql2xenabledif) {
4089                 dma_pool_destroy(ha->dl_dma_pool);
4090                 ha->dl_dma_pool = NULL;
4091         }
4092 fail_s_dma_pool:
4093         dma_pool_destroy(ha->s_dma_pool);
4094         ha->s_dma_pool = NULL;
4095 fail_free_nvram:
4096         kfree(ha->nvram);
4097         ha->nvram = NULL;
4098 fail_free_ctx_mempool:
4099         if (ha->ctx_mempool)
4100                 mempool_destroy(ha->ctx_mempool);
4101         ha->ctx_mempool = NULL;
4102 fail_free_srb_mempool:
4103         if (ha->srb_mempool)
4104                 mempool_destroy(ha->srb_mempool);
4105         ha->srb_mempool = NULL;
4106 fail_free_gid_list:
4107         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4108         ha->gid_list,
4109         ha->gid_list_dma);
4110         ha->gid_list = NULL;
4111         ha->gid_list_dma = 0;
4112 fail_free_tgt_mem:
4113         qlt_mem_free(ha);
4114 fail_free_init_cb:
4115         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4116         ha->init_cb_dma);
4117         ha->init_cb = NULL;
4118         ha->init_cb_dma = 0;
4119 fail:
4120         ql_log(ql_log_fatal, NULL, 0x0030,
4121             "Memory allocation failure.\n");
4122         return -ENOMEM;
4123 }
4124
4125 int
4126 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4127 {
4128         int rval;
4129         uint16_t        size, max_cnt, temp;
4130         struct qla_hw_data *ha = vha->hw;
4131
4132         /* Return if we don't need to alloacate any extended logins */
4133         if (!ql2xexlogins)
4134                 return QLA_SUCCESS;
4135
4136         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4137                 return QLA_SUCCESS;
4138
4139         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4140         max_cnt = 0;
4141         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4142         if (rval != QLA_SUCCESS) {
4143                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4144                     "Failed to get exlogin status.\n");
4145                 return rval;
4146         }
4147
4148         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4149         temp *= size;
4150
4151         if (temp != ha->exlogin_size) {
4152                 qla2x00_free_exlogin_buffer(ha);
4153                 ha->exlogin_size = temp;
4154
4155                 ql_log(ql_log_info, vha, 0xd024,
4156                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4157                     max_cnt, size, temp);
4158
4159                 ql_log(ql_log_info, vha, 0xd025,
4160                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4161
4162                 /* Get consistent memory for extended logins */
4163                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4164                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4165                 if (!ha->exlogin_buf) {
4166                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4167                     "Failed to allocate memory for exlogin_buf_dma.\n");
4168                         return -ENOMEM;
4169                 }
4170         }
4171
4172         /* Now configure the dma buffer */
4173         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4174         if (rval) {
4175                 ql_log(ql_log_fatal, vha, 0xd033,
4176                     "Setup extended login buffer  ****FAILED****.\n");
4177                 qla2x00_free_exlogin_buffer(ha);
4178         }
4179
4180         return rval;
4181 }
4182
4183 /*
4184 * qla2x00_free_exlogin_buffer
4185 *
4186 * Input:
4187 *       ha = adapter block pointer
4188 */
4189 void
4190 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4191 {
4192         if (ha->exlogin_buf) {
4193                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4194                     ha->exlogin_buf, ha->exlogin_buf_dma);
4195                 ha->exlogin_buf = NULL;
4196                 ha->exlogin_size = 0;
4197         }
4198 }
4199
4200 static void
4201 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4202 {
4203         u32 temp;
4204         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4205
4206         if (qla_ini_mode_enabled(vha)) {
4207                 if (ql2xiniexchg > max_cnt)
4208                         ql2xiniexchg = max_cnt;
4209
4210                 if (ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4211                         *ret_cnt = ql2xiniexchg;
4212         } else if (qla_tgt_mode_enabled(vha)) {
4213                 if (ql2xexchoffld > max_cnt)
4214                         ql2xexchoffld = max_cnt;
4215
4216                 if (ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4217                         *ret_cnt = ql2xexchoffld;
4218         } else if (qla_dual_mode_enabled(vha)) {
4219                 temp = ql2xiniexchg + ql2xexchoffld;
4220                 if (temp > max_cnt) {
4221                         ql2xiniexchg -= (temp - max_cnt)/2;
4222                         ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4223                         temp = max_cnt;
4224                 }
4225
4226                 if (temp > FW_DEF_EXCHANGES_CNT)
4227                         *ret_cnt = temp;
4228         }
4229 }
4230
4231 int
4232 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4233 {
4234         int rval;
4235         u16 size, max_cnt;
4236         u32 temp;
4237         struct qla_hw_data *ha = vha->hw;
4238
4239         if (!ha->flags.exchoffld_enabled)
4240                 return QLA_SUCCESS;
4241
4242         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4243                 return QLA_SUCCESS;
4244
4245         max_cnt = 0;
4246         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4247         if (rval != QLA_SUCCESS) {
4248                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4249                     "Failed to get exlogin status.\n");
4250                 return rval;
4251         }
4252
4253         qla2x00_number_of_exch(vha, &temp, max_cnt);
4254         temp *= size;
4255
4256         if (temp != ha->exchoffld_size) {
4257                 qla2x00_free_exchoffld_buffer(ha);
4258                 ha->exchoffld_size = temp;
4259
4260                 ql_log(ql_log_info, vha, 0xd016,
4261                     "Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
4262                     max_cnt, size, temp);
4263
4264                 ql_log(ql_log_info, vha, 0xd017,
4265                     "Exchange Buffers requested size = 0x%x\n",
4266                     ha->exchoffld_size);
4267
4268                 /* Get consistent memory for extended logins */
4269                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4270                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4271                 if (!ha->exchoffld_buf) {
4272                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4273                         "Failed to allocate memory for exchoffld_buf_dma.\n");
4274                         return -ENOMEM;
4275                 }
4276         }
4277
4278         /* Now configure the dma buffer */
4279         rval = qla_set_exchoffld_mem_cfg(vha);
4280         if (rval) {
4281                 ql_log(ql_log_fatal, vha, 0xd02e,
4282                     "Setup exchange offload buffer ****FAILED****.\n");
4283                 qla2x00_free_exchoffld_buffer(ha);
4284         } else {
4285                 /* re-adjust number of target exchange */
4286                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4287
4288                 if (qla_ini_mode_enabled(vha))
4289                         icb->exchange_count = 0;
4290                 else
4291                         icb->exchange_count = cpu_to_le16(ql2xexchoffld);
4292         }
4293
4294         return rval;
4295 }
4296
4297 /*
4298 * qla2x00_free_exchoffld_buffer
4299 *
4300 * Input:
4301 *       ha = adapter block pointer
4302 */
4303 void
4304 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4305 {
4306         if (ha->exchoffld_buf) {
4307                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4308                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4309                 ha->exchoffld_buf = NULL;
4310                 ha->exchoffld_size = 0;
4311         }
4312 }
4313
4314 /*
4315 * qla2x00_free_fw_dump
4316 *       Frees fw dump stuff.
4317 *
4318 * Input:
4319 *       ha = adapter block pointer
4320 */
4321 static void
4322 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4323 {
4324         if (ha->fce)
4325                 dma_free_coherent(&ha->pdev->dev,
4326                     FCE_SIZE, ha->fce, ha->fce_dma);
4327
4328         if (ha->eft)
4329                 dma_free_coherent(&ha->pdev->dev,
4330                     EFT_SIZE, ha->eft, ha->eft_dma);
4331
4332         if (ha->fw_dump)
4333                 vfree(ha->fw_dump);
4334         if (ha->fw_dump_template)
4335                 vfree(ha->fw_dump_template);
4336
4337         ha->fce = NULL;
4338         ha->fce_dma = 0;
4339         ha->eft = NULL;
4340         ha->eft_dma = 0;
4341         ha->fw_dumped = 0;
4342         ha->fw_dump_cap_flags = 0;
4343         ha->fw_dump_reading = 0;
4344         ha->fw_dump = NULL;
4345         ha->fw_dump_len = 0;
4346         ha->fw_dump_template = NULL;
4347         ha->fw_dump_template_len = 0;
4348 }
4349
4350 /*
4351 * qla2x00_mem_free
4352 *      Frees all adapter allocated memory.
4353 *
4354 * Input:
4355 *      ha = adapter block pointer.
4356 */
4357 static void
4358 qla2x00_mem_free(struct qla_hw_data *ha)
4359 {
4360         qla2x00_free_fw_dump(ha);
4361
4362         if (ha->mctp_dump)
4363                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4364                     ha->mctp_dump_dma);
4365
4366         if (ha->srb_mempool)
4367                 mempool_destroy(ha->srb_mempool);
4368
4369         if (ha->dcbx_tlv)
4370                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4371                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4372
4373         if (ha->xgmac_data)
4374                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4375                     ha->xgmac_data, ha->xgmac_data_dma);
4376
4377         if (ha->sns_cmd)
4378                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4379                 ha->sns_cmd, ha->sns_cmd_dma);
4380
4381         if (ha->ct_sns)
4382                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4383                 ha->ct_sns, ha->ct_sns_dma);
4384
4385         if (ha->sfp_data)
4386                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4387                     ha->sfp_data_dma);
4388
4389         if (ha->ms_iocb)
4390                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4391
4392         if (ha->ex_init_cb)
4393                 dma_pool_free(ha->s_dma_pool,
4394                         ha->ex_init_cb, ha->ex_init_cb_dma);
4395
4396         if (ha->async_pd)
4397                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4398
4399         if (ha->s_dma_pool)
4400                 dma_pool_destroy(ha->s_dma_pool);
4401
4402         if (ha->gid_list)
4403                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4404                 ha->gid_list, ha->gid_list_dma);
4405
4406         if (IS_QLA82XX(ha)) {
4407                 if (!list_empty(&ha->gbl_dsd_list)) {
4408                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4409
4410                         /* clean up allocated prev pool */
4411                         list_for_each_entry_safe(dsd_ptr,
4412                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4413                                 dma_pool_free(ha->dl_dma_pool,
4414                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4415                                 list_del(&dsd_ptr->list);
4416                                 kfree(dsd_ptr);
4417                         }
4418                 }
4419         }
4420
4421         if (ha->dl_dma_pool)
4422                 dma_pool_destroy(ha->dl_dma_pool);
4423
4424         if (ha->fcp_cmnd_dma_pool)
4425                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4426
4427         if (ha->ctx_mempool)
4428                 mempool_destroy(ha->ctx_mempool);
4429
4430         qlt_mem_free(ha);
4431
4432         if (ha->init_cb)
4433                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4434                         ha->init_cb, ha->init_cb_dma);
4435         vfree(ha->optrom_buffer);
4436         kfree(ha->nvram);
4437         kfree(ha->npiv_info);
4438         kfree(ha->swl);
4439         kfree(ha->loop_id_map);
4440
4441         ha->srb_mempool = NULL;
4442         ha->ctx_mempool = NULL;
4443         ha->sns_cmd = NULL;
4444         ha->sns_cmd_dma = 0;
4445         ha->ct_sns = NULL;
4446         ha->ct_sns_dma = 0;
4447         ha->ms_iocb = NULL;
4448         ha->ms_iocb_dma = 0;
4449         ha->init_cb = NULL;
4450         ha->init_cb_dma = 0;
4451         ha->ex_init_cb = NULL;
4452         ha->ex_init_cb_dma = 0;
4453         ha->async_pd = NULL;
4454         ha->async_pd_dma = 0;
4455
4456         ha->s_dma_pool = NULL;
4457         ha->dl_dma_pool = NULL;
4458         ha->fcp_cmnd_dma_pool = NULL;
4459
4460         ha->gid_list = NULL;
4461         ha->gid_list_dma = 0;
4462
4463         ha->tgt.atio_ring = NULL;
4464         ha->tgt.atio_dma = 0;
4465         ha->tgt.tgt_vp_map = NULL;
4466 }
4467
4468 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4469                                                 struct qla_hw_data *ha)
4470 {
4471         struct Scsi_Host *host;
4472         struct scsi_qla_host *vha = NULL;
4473
4474         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4475         if (!host) {
4476                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4477                     "Failed to allocate host from the scsi layer, aborting.\n");
4478                 return NULL;
4479         }
4480
4481         /* Clear our data area */
4482         vha = shost_priv(host);
4483         memset(vha, 0, sizeof(scsi_qla_host_t));
4484
4485         vha->host = host;
4486         vha->host_no = host->host_no;
4487         vha->hw = ha;
4488
4489         INIT_LIST_HEAD(&vha->vp_fcports);
4490         INIT_LIST_HEAD(&vha->work_list);
4491         INIT_LIST_HEAD(&vha->list);
4492         INIT_LIST_HEAD(&vha->qla_cmd_list);
4493         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4494         INIT_LIST_HEAD(&vha->logo_list);
4495         INIT_LIST_HEAD(&vha->plogi_ack_list);
4496         INIT_LIST_HEAD(&vha->qp_list);
4497         INIT_LIST_HEAD(&vha->gnl.fcports);
4498         INIT_LIST_HEAD(&vha->nvme_rport_list);
4499
4500         spin_lock_init(&vha->work_lock);
4501         spin_lock_init(&vha->cmd_list_lock);
4502         init_waitqueue_head(&vha->fcport_waitQ);
4503         init_waitqueue_head(&vha->vref_waitq);
4504
4505         vha->gnl.size = sizeof(struct get_name_list_extended) *
4506                         (ha->max_loop_id + 1);
4507         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4508             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4509         if (!vha->gnl.l) {
4510                 ql_log(ql_log_fatal, vha, 0xd04a,
4511                     "Alloc failed for name list.\n");
4512                 scsi_remove_host(vha->host);
4513                 return NULL;
4514         }
4515
4516         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4517         ql_dbg(ql_dbg_init, vha, 0x0041,
4518             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4519             vha->host, vha->hw, vha,
4520             dev_name(&(ha->pdev->dev)));
4521
4522         return vha;
4523 }
4524
4525 struct qla_work_evt *
4526 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4527 {
4528         struct qla_work_evt *e;
4529         uint8_t bail;
4530
4531         QLA_VHA_MARK_BUSY(vha, bail);
4532         if (bail)
4533                 return NULL;
4534
4535         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4536         if (!e) {
4537                 QLA_VHA_MARK_NOT_BUSY(vha);
4538                 return NULL;
4539         }
4540
4541         INIT_LIST_HEAD(&e->list);
4542         e->type = type;
4543         e->flags = QLA_EVT_FLAG_FREE;
4544         return e;
4545 }
4546
4547 int
4548 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4549 {
4550         unsigned long flags;
4551
4552         spin_lock_irqsave(&vha->work_lock, flags);
4553         list_add_tail(&e->list, &vha->work_list);
4554         spin_unlock_irqrestore(&vha->work_lock, flags);
4555
4556         if (QLA_EARLY_LINKUP(vha->hw))
4557                 schedule_work(&vha->iocb_work);
4558         else
4559                 qla2xxx_wake_dpc(vha);
4560
4561         return QLA_SUCCESS;
4562 }
4563
4564 int
4565 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4566     u32 data)
4567 {
4568         struct qla_work_evt *e;
4569
4570         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4571         if (!e)
4572                 return QLA_FUNCTION_FAILED;
4573
4574         e->u.aen.code = code;
4575         e->u.aen.data = data;
4576         return qla2x00_post_work(vha, e);
4577 }
4578
4579 int
4580 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4581 {
4582         struct qla_work_evt *e;
4583
4584         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4585         if (!e)
4586                 return QLA_FUNCTION_FAILED;
4587
4588         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4589         return qla2x00_post_work(vha, e);
4590 }
4591
4592 #define qla2x00_post_async_work(name, type)     \
4593 int qla2x00_post_async_##name##_work(           \
4594     struct scsi_qla_host *vha,                  \
4595     fc_port_t *fcport, uint16_t *data)          \
4596 {                                               \
4597         struct qla_work_evt *e;                 \
4598                                                 \
4599         e = qla2x00_alloc_work(vha, type);      \
4600         if (!e)                                 \
4601                 return QLA_FUNCTION_FAILED;     \
4602                                                 \
4603         e->u.logio.fcport = fcport;             \
4604         if (data) {                             \
4605                 e->u.logio.data[0] = data[0];   \
4606                 e->u.logio.data[1] = data[1];   \
4607         }                                       \
4608         return qla2x00_post_work(vha, e);       \
4609 }
4610
4611 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4612 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4613 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4614 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4615 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4616
4617 int
4618 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4619 {
4620         struct qla_work_evt *e;
4621
4622         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4623         if (!e)
4624                 return QLA_FUNCTION_FAILED;
4625
4626         e->u.uevent.code = code;
4627         return qla2x00_post_work(vha, e);
4628 }
4629
4630 static void
4631 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4632 {
4633         char event_string[40];
4634         char *envp[] = { event_string, NULL };
4635
4636         switch (code) {
4637         case QLA_UEVENT_CODE_FW_DUMP:
4638                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4639                     vha->host_no);
4640                 break;
4641         default:
4642                 /* do nothing */
4643                 break;
4644         }
4645         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4646 }
4647
4648 int
4649 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4650                         uint32_t *data, int cnt)
4651 {
4652         struct qla_work_evt *e;
4653
4654         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4655         if (!e)
4656                 return QLA_FUNCTION_FAILED;
4657
4658         e->u.aenfx.evtcode = evtcode;
4659         e->u.aenfx.count = cnt;
4660         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4661         return qla2x00_post_work(vha, e);
4662 }
4663
4664 int qla24xx_post_upd_fcport_work(struct scsi_qla_host *vha, fc_port_t *fcport)
4665 {
4666         struct qla_work_evt *e;
4667
4668         e = qla2x00_alloc_work(vha, QLA_EVT_UPD_FCPORT);
4669         if (!e)
4670                 return QLA_FUNCTION_FAILED;
4671
4672         e->u.fcport.fcport = fcport;
4673         return qla2x00_post_work(vha, e);
4674 }
4675
4676 static
4677 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4678 {
4679         unsigned long flags;
4680         fc_port_t *fcport =  NULL, *tfcp;
4681         struct qlt_plogi_ack_t *pla =
4682             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4683         uint8_t free_fcport = 0;
4684
4685         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4686         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4687         if (fcport) {
4688                 fcport->d_id = e->u.new_sess.id;
4689                 if (pla) {
4690                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4691                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4692                         /* we took an extra ref_count to prevent PLOGI ACK when
4693                          * fcport/sess has not been created.
4694                          */
4695                         pla->ref_count--;
4696                 }
4697         } else {
4698                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4699                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4700                 if (fcport) {
4701                         fcport->d_id = e->u.new_sess.id;
4702                         fcport->scan_state = QLA_FCPORT_FOUND;
4703                         fcport->flags |= FCF_FABRIC_DEVICE;
4704                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4705
4706                         memcpy(fcport->port_name, e->u.new_sess.port_name,
4707                             WWN_SIZE);
4708                 } else {
4709                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4710                                    "%s %8phC mem alloc fail.\n",
4711                                    __func__, e->u.new_sess.port_name);
4712
4713                         if (pla)
4714                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4715                         return;
4716                 }
4717
4718                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4719                 /* search again to make sure one else got ahead */
4720                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
4721                     e->u.new_sess.port_name, 1);
4722                 if (tfcp) {
4723                         /* should rarily happen */
4724                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4725                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
4726                             __func__, tfcp->port_name, tfcp->disc_state,
4727                             tfcp->fw_login_state);
4728
4729                         free_fcport = 1;
4730                 } else {
4731                         list_add_tail(&fcport->list, &vha->vp_fcports);
4732
4733                         if (pla) {
4734                                 qlt_plogi_ack_link(vha, pla, fcport,
4735                                     QLT_PLOGI_LINK_SAME_WWN);
4736                                 pla->ref_count--;
4737                         }
4738                 }
4739         }
4740         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4741
4742         if (fcport) {
4743                 if (pla)
4744                         qlt_plogi_ack_unref(vha, pla);
4745                 else
4746                         qla24xx_async_gnl(vha, fcport);
4747         }
4748
4749         if (free_fcport) {
4750                 qla2x00_free_fcport(fcport);
4751                 if (pla)
4752                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
4753         }
4754 }
4755
4756 void
4757 qla2x00_do_work(struct scsi_qla_host *vha)
4758 {
4759         struct qla_work_evt *e, *tmp;
4760         unsigned long flags;
4761         LIST_HEAD(work);
4762
4763         spin_lock_irqsave(&vha->work_lock, flags);
4764         list_splice_init(&vha->work_list, &work);
4765         spin_unlock_irqrestore(&vha->work_lock, flags);
4766
4767         list_for_each_entry_safe(e, tmp, &work, list) {
4768                 list_del_init(&e->list);
4769
4770                 switch (e->type) {
4771                 case QLA_EVT_AEN:
4772                         fc_host_post_event(vha->host, fc_get_event_number(),
4773                             e->u.aen.code, e->u.aen.data);
4774                         break;
4775                 case QLA_EVT_IDC_ACK:
4776                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4777                         break;
4778                 case QLA_EVT_ASYNC_LOGIN:
4779                         qla2x00_async_login(vha, e->u.logio.fcport,
4780                             e->u.logio.data);
4781                         break;
4782                 case QLA_EVT_ASYNC_LOGOUT:
4783                         qla2x00_async_logout(vha, e->u.logio.fcport);
4784                         break;
4785                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4786                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4787                             e->u.logio.data);
4788                         break;
4789                 case QLA_EVT_ASYNC_ADISC:
4790                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4791                             e->u.logio.data);
4792                         break;
4793                 case QLA_EVT_ASYNC_ADISC_DONE:
4794                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4795                             e->u.logio.data);
4796                         break;
4797                 case QLA_EVT_UEVENT:
4798                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4799                         break;
4800                 case QLA_EVT_AENFX:
4801                         qlafx00_process_aen(vha, e);
4802                         break;
4803                 case QLA_EVT_GIDPN:
4804                         qla24xx_async_gidpn(vha, e->u.fcport.fcport);
4805                         break;
4806                 case QLA_EVT_GPNID:
4807                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
4808                         break;
4809                 case QLA_EVT_GPNID_DONE:
4810                         qla24xx_async_gpnid_done(vha, e->u.iosb.sp);
4811                         break;
4812                 case QLA_EVT_NEW_SESS:
4813                         qla24xx_create_new_sess(vha, e);
4814                         break;
4815                 case QLA_EVT_GPDB:
4816                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
4817                             e->u.fcport.opt);
4818                         break;
4819                 case QLA_EVT_PRLI:
4820                         qla24xx_async_prli(vha, e->u.fcport.fcport);
4821                         break;
4822                 case QLA_EVT_GPSC:
4823                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
4824                         break;
4825                 case QLA_EVT_UPD_FCPORT:
4826                         qla2x00_update_fcport(vha, e->u.fcport.fcport);
4827                         break;
4828                 case QLA_EVT_GNL:
4829                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
4830                         break;
4831                 case QLA_EVT_NACK:
4832                         qla24xx_do_nack_work(vha, e);
4833                         break;
4834                 }
4835                 if (e->flags & QLA_EVT_FLAG_FREE)
4836                         kfree(e);
4837
4838                 /* For each work completed decrement vha ref count */
4839                 QLA_VHA_MARK_NOT_BUSY(vha);
4840         }
4841 }
4842
4843 /* Relogins all the fcports of a vport
4844  * Context: dpc thread
4845  */
4846 void qla2x00_relogin(struct scsi_qla_host *vha)
4847 {
4848         fc_port_t       *fcport;
4849         int status;
4850         struct event_arg ea;
4851
4852         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4853         /*
4854          * If the port is not ONLINE then try to login
4855          * to it if we haven't run out of retries.
4856          */
4857                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4858                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4859                         fcport->login_retry--;
4860                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4861                                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2108,
4862                                     "%s %8phC DS %d LS %d\n", __func__,
4863                                     fcport->port_name, fcport->disc_state,
4864                                     fcport->fw_login_state);
4865                                 memset(&ea, 0, sizeof(ea));
4866                                 ea.event = FCME_RELOGIN;
4867                                 ea.fcport = fcport;
4868                                 qla2x00_fcport_event_handler(vha, &ea);
4869                         } else {
4870                                 status = qla2x00_local_device_login(vha,
4871                                                                 fcport);
4872                                 if (status == QLA_SUCCESS) {
4873                                         fcport->old_loop_id = fcport->loop_id;
4874                                         ql_dbg(ql_dbg_disc, vha, 0x2003,
4875                                             "Port login OK: logged in ID 0x%x.\n",
4876                                             fcport->loop_id);
4877                                         qla2x00_update_fcport(vha, fcport);
4878                                 } else if (status == 1) {
4879                                         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4880                                         /* retry the login again */
4881                                         ql_dbg(ql_dbg_disc, vha, 0x2007,
4882                                             "Retrying %d login again loop_id 0x%x.\n",
4883                                             fcport->login_retry,
4884                                             fcport->loop_id);
4885                                 } else {
4886                                         fcport->login_retry = 0;
4887                                 }
4888
4889                                 if (fcport->login_retry == 0 &&
4890                                     status != QLA_SUCCESS)
4891                                         qla2x00_clear_loop_id(fcport);
4892                         }
4893                 }
4894                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4895                         break;
4896         }
4897 }
4898
4899 /* Schedule work on any of the dpc-workqueues */
4900 void
4901 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4902 {
4903         struct qla_hw_data *ha = base_vha->hw;
4904
4905         switch (work_code) {
4906         case MBA_IDC_AEN: /* 0x8200 */
4907                 if (ha->dpc_lp_wq)
4908                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4909                 break;
4910
4911         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4912                 if (!ha->flags.nic_core_reset_hdlr_active) {
4913                         if (ha->dpc_hp_wq)
4914                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4915                 } else
4916                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4917                             "NIC Core reset is already active. Skip "
4918                             "scheduling it again.\n");
4919                 break;
4920         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4921                 if (ha->dpc_hp_wq)
4922                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4923                 break;
4924         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4925                 if (ha->dpc_hp_wq)
4926                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4927                 break;
4928         default:
4929                 ql_log(ql_log_warn, base_vha, 0xb05f,
4930                     "Unknown work-code=0x%x.\n", work_code);
4931         }
4932
4933         return;
4934 }
4935
4936 /* Work: Perform NIC Core Unrecoverable state handling */
4937 void
4938 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4939 {
4940         struct qla_hw_data *ha =
4941                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4942         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4943         uint32_t dev_state = 0;
4944
4945         qla83xx_idc_lock(base_vha, 0);
4946         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4947         qla83xx_reset_ownership(base_vha);
4948         if (ha->flags.nic_core_reset_owner) {
4949                 ha->flags.nic_core_reset_owner = 0;
4950                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4951                     QLA8XXX_DEV_FAILED);
4952                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4953                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4954         }
4955         qla83xx_idc_unlock(base_vha, 0);
4956 }
4957
4958 /* Work: Execute IDC state handler */
4959 void
4960 qla83xx_idc_state_handler_work(struct work_struct *work)
4961 {
4962         struct qla_hw_data *ha =
4963                 container_of(work, struct qla_hw_data, idc_state_handler);
4964         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4965         uint32_t dev_state = 0;
4966
4967         qla83xx_idc_lock(base_vha, 0);
4968         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4969         if (dev_state == QLA8XXX_DEV_FAILED ||
4970                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4971                 qla83xx_idc_state_handler(base_vha);
4972         qla83xx_idc_unlock(base_vha, 0);
4973 }
4974
4975 static int
4976 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4977 {
4978         int rval = QLA_SUCCESS;
4979         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4980         uint32_t heart_beat_counter1, heart_beat_counter2;
4981
4982         do {
4983                 if (time_after(jiffies, heart_beat_wait)) {
4984                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4985                             "Nic Core f/w is not alive.\n");
4986                         rval = QLA_FUNCTION_FAILED;
4987                         break;
4988                 }
4989
4990                 qla83xx_idc_lock(base_vha, 0);
4991                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4992                     &heart_beat_counter1);
4993                 qla83xx_idc_unlock(base_vha, 0);
4994                 msleep(100);
4995                 qla83xx_idc_lock(base_vha, 0);
4996                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4997                     &heart_beat_counter2);
4998                 qla83xx_idc_unlock(base_vha, 0);
4999         } while (heart_beat_counter1 == heart_beat_counter2);
5000
5001         return rval;
5002 }
5003
5004 /* Work: Perform NIC Core Reset handling */
5005 void
5006 qla83xx_nic_core_reset_work(struct work_struct *work)
5007 {
5008         struct qla_hw_data *ha =
5009                 container_of(work, struct qla_hw_data, nic_core_reset);
5010         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5011         uint32_t dev_state = 0;
5012
5013         if (IS_QLA2031(ha)) {
5014                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5015                         ql_log(ql_log_warn, base_vha, 0xb081,
5016                             "Failed to dump mctp\n");
5017                 return;
5018         }
5019
5020         if (!ha->flags.nic_core_reset_hdlr_active) {
5021                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5022                         qla83xx_idc_lock(base_vha, 0);
5023                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5024                             &dev_state);
5025                         qla83xx_idc_unlock(base_vha, 0);
5026                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5027                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5028                                     "Nic Core f/w is alive.\n");
5029                                 return;
5030                         }
5031                 }
5032
5033                 ha->flags.nic_core_reset_hdlr_active = 1;
5034                 if (qla83xx_nic_core_reset(base_vha)) {
5035                         /* NIC Core reset failed. */
5036                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5037                             "NIC Core reset failed.\n");
5038                 }
5039                 ha->flags.nic_core_reset_hdlr_active = 0;
5040         }
5041 }
5042
5043 /* Work: Handle 8200 IDC aens */
5044 void
5045 qla83xx_service_idc_aen(struct work_struct *work)
5046 {
5047         struct qla_hw_data *ha =
5048                 container_of(work, struct qla_hw_data, idc_aen);
5049         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5050         uint32_t dev_state, idc_control;
5051
5052         qla83xx_idc_lock(base_vha, 0);
5053         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5054         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5055         qla83xx_idc_unlock(base_vha, 0);
5056         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5057                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5058                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5059                             "Application requested NIC Core Reset.\n");
5060                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5061                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5062                     QLA_SUCCESS) {
5063                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5064                             "Other protocol driver requested NIC Core Reset.\n");
5065                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5066                 }
5067         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5068                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5069                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5070         }
5071 }
5072
5073 static void
5074 qla83xx_wait_logic(void)
5075 {
5076         int i;
5077
5078         /* Yield CPU */
5079         if (!in_interrupt()) {
5080                 /*
5081                  * Wait about 200ms before retrying again.
5082                  * This controls the number of retries for single
5083                  * lock operation.
5084                  */
5085                 msleep(100);
5086                 schedule();
5087         } else {
5088                 for (i = 0; i < 20; i++)
5089                         cpu_relax(); /* This a nop instr on i386 */
5090         }
5091 }
5092
5093 static int
5094 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5095 {
5096         int rval;
5097         uint32_t data;
5098         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5099         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5100         struct qla_hw_data *ha = base_vha->hw;
5101         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5102             "Trying force recovery of the IDC lock.\n");
5103
5104         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5105         if (rval)
5106                 return rval;
5107
5108         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5109                 return QLA_SUCCESS;
5110         } else {
5111                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5112                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5113                     data);
5114                 if (rval)
5115                         return rval;
5116
5117                 msleep(200);
5118
5119                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5120                     &data);
5121                 if (rval)
5122                         return rval;
5123
5124                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5125                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5126                                         ~(idc_lck_rcvry_stage_mask));
5127                         rval = qla83xx_wr_reg(base_vha,
5128                             QLA83XX_IDC_LOCK_RECOVERY, data);
5129                         if (rval)
5130                                 return rval;
5131
5132                         /* Forcefully perform IDC UnLock */
5133                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5134                             &data);
5135                         if (rval)
5136                                 return rval;
5137                         /* Clear lock-id by setting 0xff */
5138                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5139                             0xff);
5140                         if (rval)
5141                                 return rval;
5142                         /* Clear lock-recovery by setting 0x0 */
5143                         rval = qla83xx_wr_reg(base_vha,
5144                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5145                         if (rval)
5146                                 return rval;
5147                 } else
5148                         return QLA_SUCCESS;
5149         }
5150
5151         return rval;
5152 }
5153
5154 static int
5155 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5156 {
5157         int rval = QLA_SUCCESS;
5158         uint32_t o_drv_lockid, n_drv_lockid;
5159         unsigned long lock_recovery_timeout;
5160
5161         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5162 retry_lockid:
5163         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5164         if (rval)
5165                 goto exit;
5166
5167         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5168         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5169                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5170                         return QLA_SUCCESS;
5171                 else
5172                         return QLA_FUNCTION_FAILED;
5173         }
5174
5175         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5176         if (rval)
5177                 goto exit;
5178
5179         if (o_drv_lockid == n_drv_lockid) {
5180                 qla83xx_wait_logic();
5181                 goto retry_lockid;
5182         } else
5183                 return QLA_SUCCESS;
5184
5185 exit:
5186         return rval;
5187 }
5188
5189 void
5190 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5191 {
5192         uint16_t options = (requester_id << 15) | BIT_6;
5193         uint32_t data;
5194         uint32_t lock_owner;
5195         struct qla_hw_data *ha = base_vha->hw;
5196
5197         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5198 retry_lock:
5199         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5200             == QLA_SUCCESS) {
5201                 if (data) {
5202                         /* Setting lock-id to our function-number */
5203                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5204                             ha->portnum);
5205                 } else {
5206                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5207                             &lock_owner);
5208                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5209                             "Failed to acquire IDC lock, acquired by %d, "
5210                             "retrying...\n", lock_owner);
5211
5212                         /* Retry/Perform IDC-Lock recovery */
5213                         if (qla83xx_idc_lock_recovery(base_vha)
5214                             == QLA_SUCCESS) {
5215                                 qla83xx_wait_logic();
5216                                 goto retry_lock;
5217                         } else
5218                                 ql_log(ql_log_warn, base_vha, 0xb075,
5219                                     "IDC Lock recovery FAILED.\n");
5220                 }
5221
5222         }
5223
5224         return;
5225
5226         /* XXX: IDC-lock implementation using access-control mbx */
5227 retry_lock2:
5228         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5229                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5230                     "Failed to acquire IDC lock. retrying...\n");
5231                 /* Retry/Perform IDC-Lock recovery */
5232                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5233                         qla83xx_wait_logic();
5234                         goto retry_lock2;
5235                 } else
5236                         ql_log(ql_log_warn, base_vha, 0xb076,
5237                             "IDC Lock recovery FAILED.\n");
5238         }
5239
5240         return;
5241 }
5242
5243 void
5244 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5245 {
5246 #if 0
5247         uint16_t options = (requester_id << 15) | BIT_7;
5248 #endif
5249         uint16_t retry;
5250         uint32_t data;
5251         struct qla_hw_data *ha = base_vha->hw;
5252
5253         /* IDC-unlock implementation using driver-unlock/lock-id
5254          * remote registers
5255          */
5256         retry = 0;
5257 retry_unlock:
5258         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5259             == QLA_SUCCESS) {
5260                 if (data == ha->portnum) {
5261                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5262                         /* Clearing lock-id by setting 0xff */
5263                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5264                 } else if (retry < 10) {
5265                         /* SV: XXX: IDC unlock retrying needed here? */
5266
5267                         /* Retry for IDC-unlock */
5268                         qla83xx_wait_logic();
5269                         retry++;
5270                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5271                             "Failed to release IDC lock, retrying=%d\n", retry);
5272                         goto retry_unlock;
5273                 }
5274         } else if (retry < 10) {
5275                 /* Retry for IDC-unlock */
5276                 qla83xx_wait_logic();
5277                 retry++;
5278                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5279                     "Failed to read drv-lockid, retrying=%d\n", retry);
5280                 goto retry_unlock;
5281         }
5282
5283         return;
5284
5285 #if 0
5286         /* XXX: IDC-unlock implementation using access-control mbx */
5287         retry = 0;
5288 retry_unlock2:
5289         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5290                 if (retry < 10) {
5291                         /* Retry for IDC-unlock */
5292                         qla83xx_wait_logic();
5293                         retry++;
5294                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5295                             "Failed to release IDC lock, retrying=%d\n", retry);
5296                         goto retry_unlock2;
5297                 }
5298         }
5299
5300         return;
5301 #endif
5302 }
5303
5304 int
5305 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5306 {
5307         int rval = QLA_SUCCESS;
5308         struct qla_hw_data *ha = vha->hw;
5309         uint32_t drv_presence;
5310
5311         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5312         if (rval == QLA_SUCCESS) {
5313                 drv_presence |= (1 << ha->portnum);
5314                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5315                     drv_presence);
5316         }
5317
5318         return rval;
5319 }
5320
5321 int
5322 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5323 {
5324         int rval = QLA_SUCCESS;
5325
5326         qla83xx_idc_lock(vha, 0);
5327         rval = __qla83xx_set_drv_presence(vha);
5328         qla83xx_idc_unlock(vha, 0);
5329
5330         return rval;
5331 }
5332
5333 int
5334 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5335 {
5336         int rval = QLA_SUCCESS;
5337         struct qla_hw_data *ha = vha->hw;
5338         uint32_t drv_presence;
5339
5340         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5341         if (rval == QLA_SUCCESS) {
5342                 drv_presence &= ~(1 << ha->portnum);
5343                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5344                     drv_presence);
5345         }
5346
5347         return rval;
5348 }
5349
5350 int
5351 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5352 {
5353         int rval = QLA_SUCCESS;
5354
5355         qla83xx_idc_lock(vha, 0);
5356         rval = __qla83xx_clear_drv_presence(vha);
5357         qla83xx_idc_unlock(vha, 0);
5358
5359         return rval;
5360 }
5361
5362 static void
5363 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5364 {
5365         struct qla_hw_data *ha = vha->hw;
5366         uint32_t drv_ack, drv_presence;
5367         unsigned long ack_timeout;
5368
5369         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5370         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5371         while (1) {
5372                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5373                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5374                 if ((drv_ack & drv_presence) == drv_presence)
5375                         break;
5376
5377                 if (time_after_eq(jiffies, ack_timeout)) {
5378                         ql_log(ql_log_warn, vha, 0xb067,
5379                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5380                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5381                         /*
5382                          * The function(s) which did not ack in time are forced
5383                          * to withdraw any further participation in the IDC
5384                          * reset.
5385                          */
5386                         if (drv_ack != drv_presence)
5387                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5388                                     drv_ack);
5389                         break;
5390                 }
5391
5392                 qla83xx_idc_unlock(vha, 0);
5393                 msleep(1000);
5394                 qla83xx_idc_lock(vha, 0);
5395         }
5396
5397         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5398         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5399 }
5400
5401 static int
5402 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5403 {
5404         int rval = QLA_SUCCESS;
5405         uint32_t idc_control;
5406
5407         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5408         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5409
5410         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5411         __qla83xx_get_idc_control(vha, &idc_control);
5412         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5413         __qla83xx_set_idc_control(vha, 0);
5414
5415         qla83xx_idc_unlock(vha, 0);
5416         rval = qla83xx_restart_nic_firmware(vha);
5417         qla83xx_idc_lock(vha, 0);
5418
5419         if (rval != QLA_SUCCESS) {
5420                 ql_log(ql_log_fatal, vha, 0xb06a,
5421                     "Failed to restart NIC f/w.\n");
5422                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5423                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5424         } else {
5425                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5426                     "Success in restarting nic f/w.\n");
5427                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5428                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5429         }
5430
5431         return rval;
5432 }
5433
5434 /* Assumes idc_lock always held on entry */
5435 int
5436 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5437 {
5438         struct qla_hw_data *ha = base_vha->hw;
5439         int rval = QLA_SUCCESS;
5440         unsigned long dev_init_timeout;
5441         uint32_t dev_state;
5442
5443         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5444         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5445
5446         while (1) {
5447
5448                 if (time_after_eq(jiffies, dev_init_timeout)) {
5449                         ql_log(ql_log_warn, base_vha, 0xb06e,
5450                             "Initialization TIMEOUT!\n");
5451                         /* Init timeout. Disable further NIC Core
5452                          * communication.
5453                          */
5454                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5455                                 QLA8XXX_DEV_FAILED);
5456                         ql_log(ql_log_info, base_vha, 0xb06f,
5457                             "HW State: FAILED.\n");
5458                 }
5459
5460                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5461                 switch (dev_state) {
5462                 case QLA8XXX_DEV_READY:
5463                         if (ha->flags.nic_core_reset_owner)
5464                                 qla83xx_idc_audit(base_vha,
5465                                     IDC_AUDIT_COMPLETION);
5466                         ha->flags.nic_core_reset_owner = 0;
5467                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5468                             "Reset_owner reset by 0x%x.\n",
5469                             ha->portnum);
5470                         goto exit;
5471                 case QLA8XXX_DEV_COLD:
5472                         if (ha->flags.nic_core_reset_owner)
5473                                 rval = qla83xx_device_bootstrap(base_vha);
5474                         else {
5475                         /* Wait for AEN to change device-state */
5476                                 qla83xx_idc_unlock(base_vha, 0);
5477                                 msleep(1000);
5478                                 qla83xx_idc_lock(base_vha, 0);
5479                         }
5480                         break;
5481                 case QLA8XXX_DEV_INITIALIZING:
5482                         /* Wait for AEN to change device-state */
5483                         qla83xx_idc_unlock(base_vha, 0);
5484                         msleep(1000);
5485                         qla83xx_idc_lock(base_vha, 0);
5486                         break;
5487                 case QLA8XXX_DEV_NEED_RESET:
5488                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5489                                 qla83xx_need_reset_handler(base_vha);
5490                         else {
5491                                 /* Wait for AEN to change device-state */
5492                                 qla83xx_idc_unlock(base_vha, 0);
5493                                 msleep(1000);
5494                                 qla83xx_idc_lock(base_vha, 0);
5495                         }
5496                         /* reset timeout value after need reset handler */
5497                         dev_init_timeout = jiffies +
5498                             (ha->fcoe_dev_init_timeout * HZ);
5499                         break;
5500                 case QLA8XXX_DEV_NEED_QUIESCENT:
5501                         /* XXX: DEBUG for now */
5502                         qla83xx_idc_unlock(base_vha, 0);
5503                         msleep(1000);
5504                         qla83xx_idc_lock(base_vha, 0);
5505                         break;
5506                 case QLA8XXX_DEV_QUIESCENT:
5507                         /* XXX: DEBUG for now */
5508                         if (ha->flags.quiesce_owner)
5509                                 goto exit;
5510
5511                         qla83xx_idc_unlock(base_vha, 0);
5512                         msleep(1000);
5513                         qla83xx_idc_lock(base_vha, 0);
5514                         dev_init_timeout = jiffies +
5515                             (ha->fcoe_dev_init_timeout * HZ);
5516                         break;
5517                 case QLA8XXX_DEV_FAILED:
5518                         if (ha->flags.nic_core_reset_owner)
5519                                 qla83xx_idc_audit(base_vha,
5520                                     IDC_AUDIT_COMPLETION);
5521                         ha->flags.nic_core_reset_owner = 0;
5522                         __qla83xx_clear_drv_presence(base_vha);
5523                         qla83xx_idc_unlock(base_vha, 0);
5524                         qla8xxx_dev_failed_handler(base_vha);
5525                         rval = QLA_FUNCTION_FAILED;
5526                         qla83xx_idc_lock(base_vha, 0);
5527                         goto exit;
5528                 case QLA8XXX_BAD_VALUE:
5529                         qla83xx_idc_unlock(base_vha, 0);
5530                         msleep(1000);
5531                         qla83xx_idc_lock(base_vha, 0);
5532                         break;
5533                 default:
5534                         ql_log(ql_log_warn, base_vha, 0xb071,
5535                             "Unknown Device State: %x.\n", dev_state);
5536                         qla83xx_idc_unlock(base_vha, 0);
5537                         qla8xxx_dev_failed_handler(base_vha);
5538                         rval = QLA_FUNCTION_FAILED;
5539                         qla83xx_idc_lock(base_vha, 0);
5540                         goto exit;
5541                 }
5542         }
5543
5544 exit:
5545         return rval;
5546 }
5547
5548 void
5549 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5550 {
5551         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5552             board_disable);
5553         struct pci_dev *pdev = ha->pdev;
5554         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5555
5556         /*
5557          * if UNLOAD flag is already set, then continue unload,
5558          * where it was set first.
5559          */
5560         if (test_bit(UNLOADING, &base_vha->dpc_flags))
5561                 return;
5562
5563         ql_log(ql_log_warn, base_vha, 0x015b,
5564             "Disabling adapter.\n");
5565
5566         if (!atomic_read(&pdev->enable_cnt)) {
5567                 ql_log(ql_log_info, base_vha, 0xfffc,
5568                     "PCI device disabled, no action req for PCI error=%lx\n",
5569                     base_vha->pci_flags);
5570                 return;
5571         }
5572
5573         qla2x00_wait_for_sess_deletion(base_vha);
5574
5575         set_bit(UNLOADING, &base_vha->dpc_flags);
5576
5577         qla2x00_delete_all_vps(ha, base_vha);
5578
5579         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5580
5581         qla2x00_dfs_remove(base_vha);
5582
5583         qla84xx_put_chip(base_vha);
5584
5585         if (base_vha->timer_active)
5586                 qla2x00_stop_timer(base_vha);
5587
5588         base_vha->flags.online = 0;
5589
5590         qla2x00_destroy_deferred_work(ha);
5591
5592         /*
5593          * Do not try to stop beacon blink as it will issue a mailbox
5594          * command.
5595          */
5596         qla2x00_free_sysfs_attr(base_vha, false);
5597
5598         fc_remove_host(base_vha->host);
5599
5600         scsi_remove_host(base_vha->host);
5601
5602         base_vha->flags.init_done = 0;
5603         qla25xx_delete_queues(base_vha);
5604         qla2x00_free_fcports(base_vha);
5605         qla2x00_free_irqs(base_vha);
5606         qla2x00_mem_free(ha);
5607         qla82xx_md_free(base_vha);
5608         qla2x00_free_queues(ha);
5609
5610         qla2x00_unmap_iobases(ha);
5611
5612         pci_release_selected_regions(ha->pdev, ha->bars);
5613         pci_disable_pcie_error_reporting(pdev);
5614         pci_disable_device(pdev);
5615
5616         /*
5617          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5618          */
5619 }
5620
5621 /**************************************************************************
5622 * qla2x00_do_dpc
5623 *   This kernel thread is a task that is schedule by the interrupt handler
5624 *   to perform the background processing for interrupts.
5625 *
5626 * Notes:
5627 * This task always run in the context of a kernel thread.  It
5628 * is kick-off by the driver's detect code and starts up
5629 * up one per adapter. It immediately goes to sleep and waits for
5630 * some fibre event.  When either the interrupt handler or
5631 * the timer routine detects a event it will one of the task
5632 * bits then wake us up.
5633 **************************************************************************/
5634 static int
5635 qla2x00_do_dpc(void *data)
5636 {
5637         scsi_qla_host_t *base_vha;
5638         struct qla_hw_data *ha;
5639         uint32_t online;
5640         struct qla_qpair *qpair;
5641
5642         ha = (struct qla_hw_data *)data;
5643         base_vha = pci_get_drvdata(ha->pdev);
5644
5645         set_user_nice(current, MIN_NICE);
5646
5647         set_current_state(TASK_INTERRUPTIBLE);
5648         while (!kthread_should_stop()) {
5649                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5650                     "DPC handler sleeping.\n");
5651
5652                 schedule();
5653
5654                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5655                         goto end_loop;
5656
5657                 if (ha->flags.eeh_busy) {
5658                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5659                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5660                         goto end_loop;
5661                 }
5662
5663                 ha->dpc_active = 1;
5664
5665                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5666                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5667                     base_vha->dpc_flags);
5668
5669                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5670                         break;
5671
5672                 qla2x00_do_work(base_vha);
5673
5674                 if (IS_P3P_TYPE(ha)) {
5675                         if (IS_QLA8044(ha)) {
5676                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5677                                         &base_vha->dpc_flags)) {
5678                                         qla8044_idc_lock(ha);
5679                                         qla8044_wr_direct(base_vha,
5680                                                 QLA8044_CRB_DEV_STATE_INDEX,
5681                                                 QLA8XXX_DEV_FAILED);
5682                                         qla8044_idc_unlock(ha);
5683                                         ql_log(ql_log_info, base_vha, 0x4004,
5684                                                 "HW State: FAILED.\n");
5685                                         qla8044_device_state_handler(base_vha);
5686                                         continue;
5687                                 }
5688
5689                         } else {
5690                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5691                                         &base_vha->dpc_flags)) {
5692                                         qla82xx_idc_lock(ha);
5693                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5694                                                 QLA8XXX_DEV_FAILED);
5695                                         qla82xx_idc_unlock(ha);
5696                                         ql_log(ql_log_info, base_vha, 0x0151,
5697                                                 "HW State: FAILED.\n");
5698                                         qla82xx_device_state_handler(base_vha);
5699                                         continue;
5700                                 }
5701                         }
5702
5703                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5704                                 &base_vha->dpc_flags)) {
5705
5706                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5707                                     "FCoE context reset scheduled.\n");
5708                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5709                                         &base_vha->dpc_flags))) {
5710                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
5711                                                 /* FCoE-ctx reset failed.
5712                                                  * Escalate to chip-reset
5713                                                  */
5714                                                 set_bit(ISP_ABORT_NEEDED,
5715                                                         &base_vha->dpc_flags);
5716                                         }
5717                                         clear_bit(ABORT_ISP_ACTIVE,
5718                                                 &base_vha->dpc_flags);
5719                                 }
5720
5721                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5722                                     "FCoE context reset end.\n");
5723                         }
5724                 } else if (IS_QLAFX00(ha)) {
5725                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
5726                                 &base_vha->dpc_flags)) {
5727                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5728                                     "Firmware Reset Recovery\n");
5729                                 if (qlafx00_reset_initialize(base_vha)) {
5730                                         /* Failed. Abort isp later. */
5731                                         if (!test_bit(UNLOADING,
5732                                             &base_vha->dpc_flags)) {
5733                                                 set_bit(ISP_UNRECOVERABLE,
5734                                                     &base_vha->dpc_flags);
5735                                                 ql_dbg(ql_dbg_dpc, base_vha,
5736                                                     0x4021,
5737                                                     "Reset Recovery Failed\n");
5738                                         }
5739                                 }
5740                         }
5741
5742                         if (test_and_clear_bit(FX00_TARGET_SCAN,
5743                                 &base_vha->dpc_flags)) {
5744                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5745                                     "ISPFx00 Target Scan scheduled\n");
5746                                 if (qlafx00_rescan_isp(base_vha)) {
5747                                         if (!test_bit(UNLOADING,
5748                                             &base_vha->dpc_flags))
5749                                                 set_bit(ISP_UNRECOVERABLE,
5750                                                     &base_vha->dpc_flags);
5751                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
5752                                             "ISPFx00 Target Scan Failed\n");
5753                                 }
5754                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
5755                                     "ISPFx00 Target Scan End\n");
5756                         }
5757                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
5758                                 &base_vha->dpc_flags)) {
5759                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
5760                                     "ISPFx00 Host Info resend scheduled\n");
5761                                 qlafx00_fx_disc(base_vha,
5762                                     &base_vha->hw->mr.fcport,
5763                                     FXDISC_REG_HOST_INFO);
5764                         }
5765                 }
5766
5767                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
5768                         &base_vha->dpc_flags) &&
5769                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
5770                         qla24xx_detect_sfp(base_vha);
5771
5772                         if (ha->flags.detected_lr_sfp !=
5773                             ha->flags.using_lr_setting)
5774                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
5775                 }
5776
5777                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
5778                                                 &base_vha->dpc_flags)) {
5779
5780                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5781                             "ISP abort scheduled.\n");
5782                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5783                             &base_vha->dpc_flags))) {
5784
5785                                 if (ha->isp_ops->abort_isp(base_vha)) {
5786                                         /* failed. retry later */
5787                                         set_bit(ISP_ABORT_NEEDED,
5788                                             &base_vha->dpc_flags);
5789                                 }
5790                                 clear_bit(ABORT_ISP_ACTIVE,
5791                                                 &base_vha->dpc_flags);
5792                         }
5793
5794                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5795                             "ISP abort end.\n");
5796                 }
5797
5798                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5799                     &base_vha->dpc_flags)) {
5800                         qla2x00_update_fcports(base_vha);
5801                 }
5802
5803                 if (IS_QLAFX00(ha))
5804                         goto loop_resync_check;
5805
5806                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5807                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5808                             "Quiescence mode scheduled.\n");
5809                         if (IS_P3P_TYPE(ha)) {
5810                                 if (IS_QLA82XX(ha))
5811                                         qla82xx_device_state_handler(base_vha);
5812                                 if (IS_QLA8044(ha))
5813                                         qla8044_device_state_handler(base_vha);
5814                                 clear_bit(ISP_QUIESCE_NEEDED,
5815                                     &base_vha->dpc_flags);
5816                                 if (!ha->flags.quiesce_owner) {
5817                                         qla2x00_perform_loop_resync(base_vha);
5818                                         if (IS_QLA82XX(ha)) {
5819                                                 qla82xx_idc_lock(ha);
5820                                                 qla82xx_clear_qsnt_ready(
5821                                                     base_vha);
5822                                                 qla82xx_idc_unlock(ha);
5823                                         } else if (IS_QLA8044(ha)) {
5824                                                 qla8044_idc_lock(ha);
5825                                                 qla8044_clear_qsnt_ready(
5826                                                     base_vha);
5827                                                 qla8044_idc_unlock(ha);
5828                                         }
5829                                 }
5830                         } else {
5831                                 clear_bit(ISP_QUIESCE_NEEDED,
5832                                     &base_vha->dpc_flags);
5833                                 qla2x00_quiesce_io(base_vha);
5834                         }
5835                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5836                             "Quiescence mode end.\n");
5837                 }
5838
5839                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5840                                 &base_vha->dpc_flags) &&
5841                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5842
5843                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5844                             "Reset marker scheduled.\n");
5845                         qla2x00_rst_aen(base_vha);
5846                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5847                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5848                             "Reset marker end.\n");
5849                 }
5850
5851                 /* Retry each device up to login retry count */
5852                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5853                                                 &base_vha->dpc_flags)) &&
5854                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5855                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5856
5857                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5858                             "Relogin scheduled.\n");
5859                         qla2x00_relogin(base_vha);
5860                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5861                             "Relogin end.\n");
5862                 }
5863 loop_resync_check:
5864                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5865                     &base_vha->dpc_flags)) {
5866
5867                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5868                             "Loop resync scheduled.\n");
5869
5870                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5871                             &base_vha->dpc_flags))) {
5872
5873                                 qla2x00_loop_resync(base_vha);
5874
5875                                 clear_bit(LOOP_RESYNC_ACTIVE,
5876                                                 &base_vha->dpc_flags);
5877                         }
5878
5879                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5880                             "Loop resync end.\n");
5881                 }
5882
5883                 if (IS_QLAFX00(ha))
5884                         goto intr_on_check;
5885
5886                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5887                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5888                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5889                         qla2xxx_flash_npiv_conf(base_vha);
5890                 }
5891
5892 intr_on_check:
5893                 if (!ha->interrupts_on)
5894                         ha->isp_ops->enable_intrs(ha);
5895
5896                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5897                                         &base_vha->dpc_flags)) {
5898                         if (ha->beacon_blink_led == 1)
5899                                 ha->isp_ops->beacon_blink(base_vha);
5900                 }
5901
5902                 /* qpair online check */
5903                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
5904                     &base_vha->dpc_flags)) {
5905                         if (ha->flags.eeh_busy ||
5906                             ha->flags.pci_channel_io_perm_failure)
5907                                 online = 0;
5908                         else
5909                                 online = 1;
5910
5911                         mutex_lock(&ha->mq_lock);
5912                         list_for_each_entry(qpair, &base_vha->qp_list,
5913                             qp_list_elem)
5914                         qpair->online = online;
5915                         mutex_unlock(&ha->mq_lock);
5916                 }
5917
5918                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED, &base_vha->dpc_flags)) {
5919                         ql_log(ql_log_info, base_vha, 0xffffff,
5920                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
5921                                                 ha->nvme_last_rptd_aen);
5922                         if (qla27xx_set_zio_threshold(base_vha, ha->nvme_last_rptd_aen)) {
5923                                 ql_log(ql_log_info, base_vha, 0xffffff,
5924                                         "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
5925                                                 ha->nvme_last_rptd_aen);
5926                         }
5927                 }
5928
5929                 if (!IS_QLAFX00(ha))
5930                         qla2x00_do_dpc_all_vps(base_vha);
5931
5932                 ha->dpc_active = 0;
5933 end_loop:
5934                 set_current_state(TASK_INTERRUPTIBLE);
5935         } /* End of while(1) */
5936         __set_current_state(TASK_RUNNING);
5937
5938         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5939             "DPC handler exiting.\n");
5940
5941         /*
5942          * Make sure that nobody tries to wake us up again.
5943          */
5944         ha->dpc_active = 0;
5945
5946         /* Cleanup any residual CTX SRBs. */
5947         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5948
5949         return 0;
5950 }
5951
5952 void
5953 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5954 {
5955         struct qla_hw_data *ha = vha->hw;
5956         struct task_struct *t = ha->dpc_thread;
5957
5958         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5959                 wake_up_process(t);
5960 }
5961
5962 /*
5963 *  qla2x00_rst_aen
5964 *      Processes asynchronous reset.
5965 *
5966 * Input:
5967 *      ha  = adapter block pointer.
5968 */
5969 static void
5970 qla2x00_rst_aen(scsi_qla_host_t *vha)
5971 {
5972         if (vha->flags.online && !vha->flags.reset_active &&
5973             !atomic_read(&vha->loop_down_timer) &&
5974             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5975                 do {
5976                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5977
5978                         /*
5979                          * Issue marker command only when we are going to start
5980                          * the I/O.
5981                          */
5982                         vha->marker_needed = 1;
5983                 } while (!atomic_read(&vha->loop_down_timer) &&
5984                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5985         }
5986 }
5987
5988 /**************************************************************************
5989 *   qla2x00_timer
5990 *
5991 * Description:
5992 *   One second timer
5993 *
5994 * Context: Interrupt
5995 ***************************************************************************/
5996 void
5997 qla2x00_timer(scsi_qla_host_t *vha)
5998 {
5999         unsigned long   cpu_flags = 0;
6000         int             start_dpc = 0;
6001         int             index;
6002         srb_t           *sp;
6003         uint16_t        w;
6004         struct qla_hw_data *ha = vha->hw;
6005         struct req_que *req;
6006
6007         if (ha->flags.eeh_busy) {
6008                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6009                     "EEH = %d, restarting timer.\n",
6010                     ha->flags.eeh_busy);
6011                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6012                 return;
6013         }
6014
6015         /*
6016          * Hardware read to raise pending EEH errors during mailbox waits. If
6017          * the read returns -1 then disable the board.
6018          */
6019         if (!pci_channel_offline(ha->pdev)) {
6020                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6021                 qla2x00_check_reg16_for_disconnect(vha, w);
6022         }
6023
6024         /* Make sure qla82xx_watchdog is run only for physical port */
6025         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6026                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6027                         start_dpc++;
6028                 if (IS_QLA82XX(ha))
6029                         qla82xx_watchdog(vha);
6030                 else if (IS_QLA8044(ha))
6031                         qla8044_watchdog(vha);
6032         }
6033
6034         if (!vha->vp_idx && IS_QLAFX00(ha))
6035                 qlafx00_timer_routine(vha);
6036
6037         /* Loop down handler. */
6038         if (atomic_read(&vha->loop_down_timer) > 0 &&
6039             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6040             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6041                 && vha->flags.online) {
6042
6043                 if (atomic_read(&vha->loop_down_timer) ==
6044                     vha->loop_down_abort_time) {
6045
6046                         ql_log(ql_log_info, vha, 0x6008,
6047                             "Loop down - aborting the queues before time expires.\n");
6048
6049                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6050                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6051
6052                         /*
6053                          * Schedule an ISP abort to return any FCP2-device
6054                          * commands.
6055                          */
6056                         /* NPIV - scan physical port only */
6057                         if (!vha->vp_idx) {
6058                                 spin_lock_irqsave(&ha->hardware_lock,
6059                                     cpu_flags);
6060                                 req = ha->req_q_map[0];
6061                                 for (index = 1;
6062                                     index < req->num_outstanding_cmds;
6063                                     index++) {
6064                                         fc_port_t *sfcp;
6065
6066                                         sp = req->outstanding_cmds[index];
6067                                         if (!sp)
6068                                                 continue;
6069                                         if (sp->cmd_type != TYPE_SRB)
6070                                                 continue;
6071                                         if (sp->type != SRB_SCSI_CMD)
6072                                                 continue;
6073                                         sfcp = sp->fcport;
6074                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6075                                                 continue;
6076
6077                                         if (IS_QLA82XX(ha))
6078                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6079                                                         &vha->dpc_flags);
6080                                         else
6081                                                 set_bit(ISP_ABORT_NEEDED,
6082                                                         &vha->dpc_flags);
6083                                         break;
6084                                 }
6085                                 spin_unlock_irqrestore(&ha->hardware_lock,
6086                                                                 cpu_flags);
6087                         }
6088                         start_dpc++;
6089                 }
6090
6091                 /* if the loop has been down for 4 minutes, reinit adapter */
6092                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6093                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6094                                 ql_log(ql_log_warn, vha, 0x6009,
6095                                     "Loop down - aborting ISP.\n");
6096
6097                                 if (IS_QLA82XX(ha))
6098                                         set_bit(FCOE_CTX_RESET_NEEDED,
6099                                                 &vha->dpc_flags);
6100                                 else
6101                                         set_bit(ISP_ABORT_NEEDED,
6102                                                 &vha->dpc_flags);
6103                         }
6104                 }
6105                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6106                     "Loop down - seconds remaining %d.\n",
6107                     atomic_read(&vha->loop_down_timer));
6108         }
6109         /* Check if beacon LED needs to be blinked for physical host only */
6110         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6111                 /* There is no beacon_blink function for ISP82xx */
6112                 if (!IS_P3P_TYPE(ha)) {
6113                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6114                         start_dpc++;
6115                 }
6116         }
6117
6118         /* Process any deferred work. */
6119         if (!list_empty(&vha->work_list))
6120                 start_dpc++;
6121
6122         /*
6123          * FC-NVME
6124          * see if the active AEN count has changed from what was last reported.
6125          */
6126         if (!vha->vp_idx &&
6127                 atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen &&
6128                 ha->zio_mode == QLA_ZIO_MODE_6) {
6129                 ql_log(ql_log_info, vha, 0x3002,
6130                         "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6131                         ha->nvme_last_rptd_aen);
6132                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6133                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6134                 start_dpc++;
6135         }
6136
6137         /* Schedule the DPC routine if needed */
6138         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6139             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6140             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6141             start_dpc ||
6142             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6143             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6144             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6145             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6146             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6147             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6148                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6149                     "isp_abort_needed=%d loop_resync_needed=%d "
6150                     "fcport_update_needed=%d start_dpc=%d "
6151                     "reset_marker_needed=%d",
6152                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6153                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6154                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6155                     start_dpc,
6156                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6157                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6158                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6159                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6160                     "relogin_needed=%d.\n",
6161                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6162                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6163                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6164                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6165                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6166                 qla2xxx_wake_dpc(vha);
6167         }
6168
6169         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6170 }
6171
6172 /* Firmware interface routines. */
6173
6174 #define FW_BLOBS        11
6175 #define FW_ISP21XX      0
6176 #define FW_ISP22XX      1
6177 #define FW_ISP2300      2
6178 #define FW_ISP2322      3
6179 #define FW_ISP24XX      4
6180 #define FW_ISP25XX      5
6181 #define FW_ISP81XX      6
6182 #define FW_ISP82XX      7
6183 #define FW_ISP2031      8
6184 #define FW_ISP8031      9
6185 #define FW_ISP27XX      10
6186
6187 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6188 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6189 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6190 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6191 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6192 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6193 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6194 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6195 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6196 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6197 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6198
6199
6200 static DEFINE_MUTEX(qla_fw_lock);
6201
6202 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6203         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6204         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6205         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6206         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6207         { .name = FW_FILE_ISP24XX, },
6208         { .name = FW_FILE_ISP25XX, },
6209         { .name = FW_FILE_ISP81XX, },
6210         { .name = FW_FILE_ISP82XX, },
6211         { .name = FW_FILE_ISP2031, },
6212         { .name = FW_FILE_ISP8031, },
6213         { .name = FW_FILE_ISP27XX, },
6214 };
6215
6216 struct fw_blob *
6217 qla2x00_request_firmware(scsi_qla_host_t *vha)
6218 {
6219         struct qla_hw_data *ha = vha->hw;
6220         struct fw_blob *blob;
6221
6222         if (IS_QLA2100(ha)) {
6223                 blob = &qla_fw_blobs[FW_ISP21XX];
6224         } else if (IS_QLA2200(ha)) {
6225                 blob = &qla_fw_blobs[FW_ISP22XX];
6226         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6227                 blob = &qla_fw_blobs[FW_ISP2300];
6228         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6229                 blob = &qla_fw_blobs[FW_ISP2322];
6230         } else if (IS_QLA24XX_TYPE(ha)) {
6231                 blob = &qla_fw_blobs[FW_ISP24XX];
6232         } else if (IS_QLA25XX(ha)) {
6233                 blob = &qla_fw_blobs[FW_ISP25XX];
6234         } else if (IS_QLA81XX(ha)) {
6235                 blob = &qla_fw_blobs[FW_ISP81XX];
6236         } else if (IS_QLA82XX(ha)) {
6237                 blob = &qla_fw_blobs[FW_ISP82XX];
6238         } else if (IS_QLA2031(ha)) {
6239                 blob = &qla_fw_blobs[FW_ISP2031];
6240         } else if (IS_QLA8031(ha)) {
6241                 blob = &qla_fw_blobs[FW_ISP8031];
6242         } else if (IS_QLA27XX(ha)) {
6243                 blob = &qla_fw_blobs[FW_ISP27XX];
6244         } else {
6245                 return NULL;
6246         }
6247
6248         mutex_lock(&qla_fw_lock);
6249         if (blob->fw)
6250                 goto out;
6251
6252         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6253                 ql_log(ql_log_warn, vha, 0x0063,
6254                     "Failed to load firmware image (%s).\n", blob->name);
6255                 blob->fw = NULL;
6256                 blob = NULL;
6257                 goto out;
6258         }
6259
6260 out:
6261         mutex_unlock(&qla_fw_lock);
6262         return blob;
6263 }
6264
6265 static void
6266 qla2x00_release_firmware(void)
6267 {
6268         int idx;
6269
6270         mutex_lock(&qla_fw_lock);
6271         for (idx = 0; idx < FW_BLOBS; idx++)
6272                 release_firmware(qla_fw_blobs[idx].fw);
6273         mutex_unlock(&qla_fw_lock);
6274 }
6275
6276 static pci_ers_result_t
6277 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6278 {
6279         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6280         struct qla_hw_data *ha = vha->hw;
6281
6282         ql_dbg(ql_dbg_aer, vha, 0x9000,
6283             "PCI error detected, state %x.\n", state);
6284
6285         if (!atomic_read(&pdev->enable_cnt)) {
6286                 ql_log(ql_log_info, vha, 0xffff,
6287                         "PCI device is disabled,state %x\n", state);
6288                 return PCI_ERS_RESULT_NEED_RESET;
6289         }
6290
6291         switch (state) {
6292         case pci_channel_io_normal:
6293                 ha->flags.eeh_busy = 0;
6294                 if (ql2xmqsupport) {
6295                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6296                         qla2xxx_wake_dpc(vha);
6297                 }
6298                 return PCI_ERS_RESULT_CAN_RECOVER;
6299         case pci_channel_io_frozen:
6300                 ha->flags.eeh_busy = 1;
6301                 /* For ISP82XX complete any pending mailbox cmd */
6302                 if (IS_QLA82XX(ha)) {
6303                         ha->flags.isp82xx_fw_hung = 1;
6304                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6305                         qla82xx_clear_pending_mbx(vha);
6306                 }
6307                 qla2x00_free_irqs(vha);
6308                 pci_disable_device(pdev);
6309                 /* Return back all IOs */
6310                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6311                 if (ql2xmqsupport) {
6312                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6313                         qla2xxx_wake_dpc(vha);
6314                 }
6315                 return PCI_ERS_RESULT_NEED_RESET;
6316         case pci_channel_io_perm_failure:
6317                 ha->flags.pci_channel_io_perm_failure = 1;
6318                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6319                 if (ql2xmqsupport) {
6320                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6321                         qla2xxx_wake_dpc(vha);
6322                 }
6323                 return PCI_ERS_RESULT_DISCONNECT;
6324         }
6325         return PCI_ERS_RESULT_NEED_RESET;
6326 }
6327
6328 static pci_ers_result_t
6329 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6330 {
6331         int risc_paused = 0;
6332         uint32_t stat;
6333         unsigned long flags;
6334         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6335         struct qla_hw_data *ha = base_vha->hw;
6336         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6337         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6338
6339         if (IS_QLA82XX(ha))
6340                 return PCI_ERS_RESULT_RECOVERED;
6341
6342         spin_lock_irqsave(&ha->hardware_lock, flags);
6343         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6344                 stat = RD_REG_DWORD(&reg->hccr);
6345                 if (stat & HCCR_RISC_PAUSE)
6346                         risc_paused = 1;
6347         } else if (IS_QLA23XX(ha)) {
6348                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6349                 if (stat & HSR_RISC_PAUSED)
6350                         risc_paused = 1;
6351         } else if (IS_FWI2_CAPABLE(ha)) {
6352                 stat = RD_REG_DWORD(&reg24->host_status);
6353                 if (stat & HSRX_RISC_PAUSED)
6354                         risc_paused = 1;
6355         }
6356         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6357
6358         if (risc_paused) {
6359                 ql_log(ql_log_info, base_vha, 0x9003,
6360                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6361                 ha->isp_ops->fw_dump(base_vha, 0);
6362
6363                 return PCI_ERS_RESULT_NEED_RESET;
6364         } else
6365                 return PCI_ERS_RESULT_RECOVERED;
6366 }
6367
6368 static uint32_t
6369 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6370 {
6371         uint32_t rval = QLA_FUNCTION_FAILED;
6372         uint32_t drv_active = 0;
6373         struct qla_hw_data *ha = base_vha->hw;
6374         int fn;
6375         struct pci_dev *other_pdev = NULL;
6376
6377         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6378             "Entered %s.\n", __func__);
6379
6380         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6381
6382         if (base_vha->flags.online) {
6383                 /* Abort all outstanding commands,
6384                  * so as to be requeued later */
6385                 qla2x00_abort_isp_cleanup(base_vha);
6386         }
6387
6388
6389         fn = PCI_FUNC(ha->pdev->devfn);
6390         while (fn > 0) {
6391                 fn--;
6392                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6393                     "Finding pci device at function = 0x%x.\n", fn);
6394                 other_pdev =
6395                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6396                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6397                     fn));
6398
6399                 if (!other_pdev)
6400                         continue;
6401                 if (atomic_read(&other_pdev->enable_cnt)) {
6402                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6403                             "Found PCI func available and enable at 0x%x.\n",
6404                             fn);
6405                         pci_dev_put(other_pdev);
6406                         break;
6407                 }
6408                 pci_dev_put(other_pdev);
6409         }
6410
6411         if (!fn) {
6412                 /* Reset owner */
6413                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6414                     "This devfn is reset owner = 0x%x.\n",
6415                     ha->pdev->devfn);
6416                 qla82xx_idc_lock(ha);
6417
6418                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6419                     QLA8XXX_DEV_INITIALIZING);
6420
6421                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6422                     QLA82XX_IDC_VERSION);
6423
6424                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6425                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6426                     "drv_active = 0x%x.\n", drv_active);
6427
6428                 qla82xx_idc_unlock(ha);
6429                 /* Reset if device is not already reset
6430                  * drv_active would be 0 if a reset has already been done
6431                  */
6432                 if (drv_active)
6433                         rval = qla82xx_start_firmware(base_vha);
6434                 else
6435                         rval = QLA_SUCCESS;
6436                 qla82xx_idc_lock(ha);
6437
6438                 if (rval != QLA_SUCCESS) {
6439                         ql_log(ql_log_info, base_vha, 0x900b,
6440                             "HW State: FAILED.\n");
6441                         qla82xx_clear_drv_active(ha);
6442                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6443                             QLA8XXX_DEV_FAILED);
6444                 } else {
6445                         ql_log(ql_log_info, base_vha, 0x900c,
6446                             "HW State: READY.\n");
6447                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6448                             QLA8XXX_DEV_READY);
6449                         qla82xx_idc_unlock(ha);
6450                         ha->flags.isp82xx_fw_hung = 0;
6451                         rval = qla82xx_restart_isp(base_vha);
6452                         qla82xx_idc_lock(ha);
6453                         /* Clear driver state register */
6454                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6455                         qla82xx_set_drv_active(base_vha);
6456                 }
6457                 qla82xx_idc_unlock(ha);
6458         } else {
6459                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6460                     "This devfn is not reset owner = 0x%x.\n",
6461                     ha->pdev->devfn);
6462                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6463                     QLA8XXX_DEV_READY)) {
6464                         ha->flags.isp82xx_fw_hung = 0;
6465                         rval = qla82xx_restart_isp(base_vha);
6466                         qla82xx_idc_lock(ha);
6467                         qla82xx_set_drv_active(base_vha);
6468                         qla82xx_idc_unlock(ha);
6469                 }
6470         }
6471         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6472
6473         return rval;
6474 }
6475
6476 static pci_ers_result_t
6477 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6478 {
6479         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6480         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6481         struct qla_hw_data *ha = base_vha->hw;
6482         struct rsp_que *rsp;
6483         int rc, retries = 10;
6484
6485         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6486             "Slot Reset.\n");
6487
6488         /* Workaround: qla2xxx driver which access hardware earlier
6489          * needs error state to be pci_channel_io_online.
6490          * Otherwise mailbox command timesout.
6491          */
6492         pdev->error_state = pci_channel_io_normal;
6493
6494         pci_restore_state(pdev);
6495
6496         /* pci_restore_state() clears the saved_state flag of the device
6497          * save restored state which resets saved_state flag
6498          */
6499         pci_save_state(pdev);
6500
6501         if (ha->mem_only)
6502                 rc = pci_enable_device_mem(pdev);
6503         else
6504                 rc = pci_enable_device(pdev);
6505
6506         if (rc) {
6507                 ql_log(ql_log_warn, base_vha, 0x9005,
6508                     "Can't re-enable PCI device after reset.\n");
6509                 goto exit_slot_reset;
6510         }
6511
6512         rsp = ha->rsp_q_map[0];
6513         if (qla2x00_request_irqs(ha, rsp))
6514                 goto exit_slot_reset;
6515
6516         if (ha->isp_ops->pci_config(base_vha))
6517                 goto exit_slot_reset;
6518
6519         if (IS_QLA82XX(ha)) {
6520                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6521                         ret = PCI_ERS_RESULT_RECOVERED;
6522                         goto exit_slot_reset;
6523                 } else
6524                         goto exit_slot_reset;
6525         }
6526
6527         while (ha->flags.mbox_busy && retries--)
6528                 msleep(1000);
6529
6530         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6531         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6532                 ret =  PCI_ERS_RESULT_RECOVERED;
6533         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6534
6535
6536 exit_slot_reset:
6537         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6538             "slot_reset return %x.\n", ret);
6539
6540         return ret;
6541 }
6542
6543 static void
6544 qla2xxx_pci_resume(struct pci_dev *pdev)
6545 {
6546         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6547         struct qla_hw_data *ha = base_vha->hw;
6548         int ret;
6549
6550         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6551             "pci_resume.\n");
6552
6553         ret = qla2x00_wait_for_hba_online(base_vha);
6554         if (ret != QLA_SUCCESS) {
6555                 ql_log(ql_log_fatal, base_vha, 0x9002,
6556                     "The device failed to resume I/O from slot/link_reset.\n");
6557         }
6558
6559         pci_cleanup_aer_uncorrect_error_status(pdev);
6560
6561         ha->flags.eeh_busy = 0;
6562 }
6563
6564 static void
6565 qla83xx_disable_laser(scsi_qla_host_t *vha)
6566 {
6567         uint32_t reg, data, fn;
6568         struct qla_hw_data *ha = vha->hw;
6569         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
6570
6571         /* pci func #/port # */
6572         ql_dbg(ql_dbg_init, vha, 0x004b,
6573             "Disabling Laser for hba: %p\n", vha);
6574
6575         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
6576                 (BIT_15|BIT_14|BIT_13|BIT_12));
6577
6578         fn = (fn >> 12);
6579
6580         if (fn & 1)
6581                 reg = PORT_1_2031;
6582         else
6583                 reg = PORT_0_2031;
6584
6585         data = LASER_OFF_2031;
6586
6587         qla83xx_wr_reg(vha, reg, data);
6588 }
6589
6590 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6591 {
6592         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6593
6594         return blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev);
6595 }
6596
6597 static const struct pci_error_handlers qla2xxx_err_handler = {
6598         .error_detected = qla2xxx_pci_error_detected,
6599         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6600         .slot_reset = qla2xxx_pci_slot_reset,
6601         .resume = qla2xxx_pci_resume,
6602 };
6603
6604 static struct pci_device_id qla2xxx_pci_tbl[] = {
6605         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6606         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6607         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6608         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6609         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6610         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6611         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6612         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6613         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6614         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6615         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6616         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6617         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6618         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6619         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6620         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6621         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6622         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6623         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6624         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6625         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6626         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6627         { 0 },
6628 };
6629 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6630
6631 static struct pci_driver qla2xxx_pci_driver = {
6632         .name           = QLA2XXX_DRIVER_NAME,
6633         .driver         = {
6634                 .owner          = THIS_MODULE,
6635         },
6636         .id_table       = qla2xxx_pci_tbl,
6637         .probe          = qla2x00_probe_one,
6638         .remove         = qla2x00_remove_one,
6639         .shutdown       = qla2x00_shutdown,
6640         .err_handler    = &qla2xxx_err_handler,
6641 };
6642
6643 static const struct file_operations apidev_fops = {
6644         .owner = THIS_MODULE,
6645         .llseek = noop_llseek,
6646 };
6647
6648 /**
6649  * qla2x00_module_init - Module initialization.
6650  **/
6651 static int __init
6652 qla2x00_module_init(void)
6653 {
6654         int ret = 0;
6655
6656         /* Allocate cache for SRBs. */
6657         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6658             SLAB_HWCACHE_ALIGN, NULL);
6659         if (srb_cachep == NULL) {
6660                 ql_log(ql_log_fatal, NULL, 0x0001,
6661                     "Unable to allocate SRB cache...Failing load!.\n");
6662                 return -ENOMEM;
6663         }
6664
6665         /* Initialize target kmem_cache and mem_pools */
6666         ret = qlt_init();
6667         if (ret < 0) {
6668                 kmem_cache_destroy(srb_cachep);
6669                 return ret;
6670         } else if (ret > 0) {
6671                 /*
6672                  * If initiator mode is explictly disabled by qlt_init(),
6673                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6674                  * performing scsi_scan_target() during LOOP UP event.
6675                  */
6676                 qla2xxx_transport_functions.disable_target_scan = 1;
6677                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6678         }
6679
6680         /* Derive version string. */
6681         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6682         if (ql2xextended_error_logging)
6683                 strcat(qla2x00_version_str, "-debug");
6684         if (ql2xextended_error_logging == 1)
6685                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
6686
6687         qla2xxx_transport_template =
6688             fc_attach_transport(&qla2xxx_transport_functions);
6689         if (!qla2xxx_transport_template) {
6690                 kmem_cache_destroy(srb_cachep);
6691                 ql_log(ql_log_fatal, NULL, 0x0002,
6692                     "fc_attach_transport failed...Failing load!.\n");
6693                 qlt_exit();
6694                 return -ENODEV;
6695         }
6696
6697         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6698         if (apidev_major < 0) {
6699                 ql_log(ql_log_fatal, NULL, 0x0003,
6700                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6701         }
6702
6703         qla2xxx_transport_vport_template =
6704             fc_attach_transport(&qla2xxx_transport_vport_functions);
6705         if (!qla2xxx_transport_vport_template) {
6706                 kmem_cache_destroy(srb_cachep);
6707                 qlt_exit();
6708                 fc_release_transport(qla2xxx_transport_template);
6709                 ql_log(ql_log_fatal, NULL, 0x0004,
6710                     "fc_attach_transport vport failed...Failing load!.\n");
6711                 return -ENODEV;
6712         }
6713         ql_log(ql_log_info, NULL, 0x0005,
6714             "QLogic Fibre Channel HBA Driver: %s.\n",
6715             qla2x00_version_str);
6716         ret = pci_register_driver(&qla2xxx_pci_driver);
6717         if (ret) {
6718                 kmem_cache_destroy(srb_cachep);
6719                 qlt_exit();
6720                 fc_release_transport(qla2xxx_transport_template);
6721                 fc_release_transport(qla2xxx_transport_vport_template);
6722                 ql_log(ql_log_fatal, NULL, 0x0006,
6723                     "pci_register_driver failed...ret=%d Failing load!.\n",
6724                     ret);
6725         }
6726         return ret;
6727 }
6728
6729 /**
6730  * qla2x00_module_exit - Module cleanup.
6731  **/
6732 static void __exit
6733 qla2x00_module_exit(void)
6734 {
6735         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6736         pci_unregister_driver(&qla2xxx_pci_driver);
6737         qla2x00_release_firmware();
6738         kmem_cache_destroy(srb_cachep);
6739         qlt_exit();
6740         if (ctx_cachep)
6741                 kmem_cache_destroy(ctx_cachep);
6742         fc_release_transport(qla2xxx_transport_template);
6743         fc_release_transport(qla2xxx_transport_vport_template);
6744 }
6745
6746 module_init(qla2x00_module_init);
6747 module_exit(qla2x00_module_exit);
6748
6749 MODULE_AUTHOR("QLogic Corporation");
6750 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6751 MODULE_LICENSE("GPL");
6752 MODULE_VERSION(QLA2XXX_VERSION);
6753 MODULE_FIRMWARE(FW_FILE_ISP21XX);
6754 MODULE_FIRMWARE(FW_FILE_ISP22XX);
6755 MODULE_FIRMWARE(FW_FILE_ISP2300);
6756 MODULE_FIRMWARE(FW_FILE_ISP2322);
6757 MODULE_FIRMWARE(FW_FILE_ISP24XX);
6758 MODULE_FIRMWARE(FW_FILE_ISP25XX);