2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <linux/blk-mq-pci.h>
17 #include <scsi/scsi_tcq.h>
18 #include <scsi/scsicam.h>
19 #include <scsi/scsi_transport.h>
20 #include <scsi/scsi_transport_fc.h>
22 #include "qla_target.h"
27 char qla2x00_version_str[40];
29 static int apidev_major;
32 * SRB allocation cache
34 struct kmem_cache *srb_cachep;
37 * CT6 CTX allocation cache
39 static struct kmem_cache *ctx_cachep;
41 * error level for logging
43 int ql_errlev = ql_log_all;
45 static int ql2xenableclass2;
46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
47 MODULE_PARM_DESC(ql2xenableclass2,
48 "Specify if Class 2 operations are supported from the very "
49 "beginning. Default is 0 - class 2 not supported.");
52 int ql2xlogintimeout = 20;
53 module_param(ql2xlogintimeout, int, S_IRUGO);
54 MODULE_PARM_DESC(ql2xlogintimeout,
55 "Login timeout value in seconds.");
57 int qlport_down_retry;
58 module_param(qlport_down_retry, int, S_IRUGO);
59 MODULE_PARM_DESC(qlport_down_retry,
60 "Maximum number of command retries to a port that returns "
61 "a PORT-DOWN status.");
63 int ql2xplogiabsentdevice;
64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
66 "Option to enable PLOGI to devices that are not present after "
67 "a Fabric scan. This is needed for several broken switches. "
68 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
70 int ql2xloginretrycount = 0;
71 module_param(ql2xloginretrycount, int, S_IRUGO);
72 MODULE_PARM_DESC(ql2xloginretrycount,
73 "Specify an alternate value for the NVRAM login retry count.");
75 int ql2xallocfwdump = 1;
76 module_param(ql2xallocfwdump, int, S_IRUGO);
77 MODULE_PARM_DESC(ql2xallocfwdump,
78 "Option to enable allocation of memory for a firmware dump "
79 "during HBA initialization. Memory allocation requirements "
80 "vary by ISP type. Default is 1 - allocate memory.");
82 int ql2xextended_error_logging;
83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
85 MODULE_PARM_DESC(ql2xextended_error_logging,
86 "Option to enable extended error logging,\n"
87 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
88 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
89 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
90 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
91 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
92 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
93 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
94 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
95 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
96 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
97 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
98 "\t\t0x1e400000 - Preferred value for capturing essential "
99 "debug information (equivalent to old "
100 "ql2xextended_error_logging=1).\n"
101 "\t\tDo LOGICAL OR of the value to enable more than one level");
103 int ql2xshiftctondsd = 6;
104 module_param(ql2xshiftctondsd, int, S_IRUGO);
105 MODULE_PARM_DESC(ql2xshiftctondsd,
106 "Set to control shifting of command type processing "
107 "based on total number of SG elements.");
109 int ql2xfdmienable=1;
110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
112 MODULE_PARM_DESC(ql2xfdmienable,
113 "Enables FDMI registrations. "
114 "0 - no FDMI. Default is 1 - perform FDMI.");
116 #define MAX_Q_DEPTH 32
117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
119 MODULE_PARM_DESC(ql2xmaxqdepth,
120 "Maximum queue depth to set for each LUN. "
123 #if (IS_ENABLED(CONFIG_NVME_FC))
126 int ql2xenabledif = 2;
128 module_param(ql2xenabledif, int, S_IRUGO);
129 MODULE_PARM_DESC(ql2xenabledif,
130 " Enable T10-CRC-DIF:\n"
132 " 0 -- No DIF Support\n"
133 " 1 -- Enable DIF for all types\n"
134 " 2 -- Enable DIF for all types, except Type 0.\n");
136 #if (IS_ENABLED(CONFIG_NVME_FC))
137 int ql2xnvmeenable = 1;
141 module_param(ql2xnvmeenable, int, 0644);
142 MODULE_PARM_DESC(ql2xnvmeenable,
143 "Enables NVME support. "
144 "0 - no NVMe. Default is Y");
146 int ql2xenablehba_err_chk = 2;
147 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
148 MODULE_PARM_DESC(ql2xenablehba_err_chk,
149 " Enable T10-CRC-DIF Error isolation by HBA:\n"
151 " 0 -- Error isolation disabled\n"
152 " 1 -- Error isolation enabled only for DIX Type 0\n"
153 " 2 -- Error isolation enabled for all Types\n");
155 int ql2xiidmaenable=1;
156 module_param(ql2xiidmaenable, int, S_IRUGO);
157 MODULE_PARM_DESC(ql2xiidmaenable,
158 "Enables iIDMA settings "
159 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
161 int ql2xmqsupport = 1;
162 module_param(ql2xmqsupport, int, S_IRUGO);
163 MODULE_PARM_DESC(ql2xmqsupport,
164 "Enable on demand multiple queue pairs support "
165 "Default is 1 for supported. "
166 "Set it to 0 to turn off mq qpair support.");
169 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
170 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
171 MODULE_PARM_DESC(ql2xfwloadbin,
172 "Option to specify location from which to load ISP firmware:.\n"
173 " 2 -- load firmware via the request_firmware() (hotplug).\n"
175 " 1 -- load firmware from flash.\n"
176 " 0 -- use default semantics.\n");
179 module_param(ql2xetsenable, int, S_IRUGO);
180 MODULE_PARM_DESC(ql2xetsenable,
181 "Enables firmware ETS burst."
182 "Default is 0 - skip ETS enablement.");
185 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
186 MODULE_PARM_DESC(ql2xdbwr,
187 "Option to specify scheme for request queue posting.\n"
188 " 0 -- Regular doorbell.\n"
189 " 1 -- CAMRAM doorbell (faster).\n");
191 int ql2xtargetreset = 1;
192 module_param(ql2xtargetreset, int, S_IRUGO);
193 MODULE_PARM_DESC(ql2xtargetreset,
194 "Enable target reset."
195 "Default is 1 - use hw defaults.");
198 module_param(ql2xgffidenable, int, S_IRUGO);
199 MODULE_PARM_DESC(ql2xgffidenable,
200 "Enables GFF_ID checks of port type. "
201 "Default is 0 - Do not use GFF_ID information.");
203 int ql2xasynctmfenable;
204 module_param(ql2xasynctmfenable, int, S_IRUGO);
205 MODULE_PARM_DESC(ql2xasynctmfenable,
206 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
207 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
209 int ql2xdontresethba;
210 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
211 MODULE_PARM_DESC(ql2xdontresethba,
212 "Option to specify reset behaviour.\n"
213 " 0 (Default) -- Reset on failure.\n"
214 " 1 -- Do not reset on failure.\n");
216 uint64_t ql2xmaxlun = MAX_LUNS;
217 module_param(ql2xmaxlun, ullong, S_IRUGO);
218 MODULE_PARM_DESC(ql2xmaxlun,
219 "Defines the maximum LU number to register with the SCSI "
220 "midlayer. Default is 65535.");
222 int ql2xmdcapmask = 0x1F;
223 module_param(ql2xmdcapmask, int, S_IRUGO);
224 MODULE_PARM_DESC(ql2xmdcapmask,
225 "Set the Minidump driver capture mask level. "
226 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
228 int ql2xmdenable = 1;
229 module_param(ql2xmdenable, int, S_IRUGO);
230 MODULE_PARM_DESC(ql2xmdenable,
231 "Enable/disable MiniDump. "
232 "0 - MiniDump disabled. "
233 "1 (Default) - MiniDump enabled.");
235 int ql2xexlogins = 0;
236 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
237 MODULE_PARM_DESC(ql2xexlogins,
238 "Number of extended Logins. "
239 "0 (Default)- Disabled.");
241 int ql2xexchoffld = 1024;
242 module_param(ql2xexchoffld, uint, 0644);
243 MODULE_PARM_DESC(ql2xexchoffld,
244 "Number of target exchanges.");
246 int ql2xiniexchg = 1024;
247 module_param(ql2xiniexchg, uint, 0644);
248 MODULE_PARM_DESC(ql2xiniexchg,
249 "Number of initiator exchanges.");
251 int ql2xfwholdabts = 0;
252 module_param(ql2xfwholdabts, int, S_IRUGO);
253 MODULE_PARM_DESC(ql2xfwholdabts,
254 "Allow FW to hold status IOCB until ABTS rsp received. "
255 "0 (Default) Do not set fw option. "
256 "1 - Set fw option to hold ABTS.");
258 int ql2xmvasynctoatio = 1;
259 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
260 MODULE_PARM_DESC(ql2xmvasynctoatio,
261 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
262 "0 (Default). Do not move IOCBs"
265 int ql2xautodetectsfp = 1;
266 module_param(ql2xautodetectsfp, int, 0444);
267 MODULE_PARM_DESC(ql2xautodetectsfp,
268 "Detect SFP range and set appropriate distance.\n"
269 "1 (Default): Enable\n");
272 * SCSI host template entry points
274 static int qla2xxx_slave_configure(struct scsi_device * device);
275 static int qla2xxx_slave_alloc(struct scsi_device *);
276 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
277 static void qla2xxx_scan_start(struct Scsi_Host *);
278 static void qla2xxx_slave_destroy(struct scsi_device *);
279 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
280 static int qla2xxx_eh_abort(struct scsi_cmnd *);
281 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
282 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
283 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
284 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
286 static void qla2x00_clear_drv_active(struct qla_hw_data *);
287 static void qla2x00_free_device(scsi_qla_host_t *);
288 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
289 static int qla2xxx_map_queues(struct Scsi_Host *shost);
290 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
292 struct scsi_host_template qla2xxx_driver_template = {
293 .module = THIS_MODULE,
294 .name = QLA2XXX_DRIVER_NAME,
295 .queuecommand = qla2xxx_queuecommand,
297 .eh_timed_out = fc_eh_timed_out,
298 .eh_abort_handler = qla2xxx_eh_abort,
299 .eh_device_reset_handler = qla2xxx_eh_device_reset,
300 .eh_target_reset_handler = qla2xxx_eh_target_reset,
301 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
302 .eh_host_reset_handler = qla2xxx_eh_host_reset,
304 .slave_configure = qla2xxx_slave_configure,
306 .slave_alloc = qla2xxx_slave_alloc,
307 .slave_destroy = qla2xxx_slave_destroy,
308 .scan_finished = qla2xxx_scan_finished,
309 .scan_start = qla2xxx_scan_start,
310 .change_queue_depth = scsi_change_queue_depth,
311 .map_queues = qla2xxx_map_queues,
314 .use_clustering = ENABLE_CLUSTERING,
315 .sg_tablesize = SG_ALL,
317 .max_sectors = 0xFFFF,
318 .shost_attrs = qla2x00_host_attrs,
320 .supported_mode = MODE_INITIATOR,
321 .track_queue_depth = 1,
324 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
325 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
327 /* TODO Convert to inlines
333 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
335 init_timer(&vha->timer);
336 vha->timer.expires = jiffies + interval * HZ;
337 vha->timer.data = (unsigned long)vha;
338 vha->timer.function = (void (*)(unsigned long))func;
339 add_timer(&vha->timer);
340 vha->timer_active = 1;
344 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
346 /* Currently used for 82XX only. */
347 if (vha->device_flags & DFLG_DEV_FAILED) {
348 ql_dbg(ql_dbg_timer, vha, 0x600d,
349 "Device in a failed state, returning.\n");
353 mod_timer(&vha->timer, jiffies + interval * HZ);
356 static __inline__ void
357 qla2x00_stop_timer(scsi_qla_host_t *vha)
359 del_timer_sync(&vha->timer);
360 vha->timer_active = 0;
363 static int qla2x00_do_dpc(void *data);
365 static void qla2x00_rst_aen(scsi_qla_host_t *);
367 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
368 struct req_que **, struct rsp_que **);
369 static void qla2x00_free_fw_dump(struct qla_hw_data *);
370 static void qla2x00_mem_free(struct qla_hw_data *);
371 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
372 struct qla_qpair *qpair);
374 /* -------------------------------------------------------------------------- */
375 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
378 struct qla_hw_data *ha = vha->hw;
379 rsp->qpair = ha->base_qpair;
381 ha->base_qpair->req = req;
382 ha->base_qpair->rsp = rsp;
383 ha->base_qpair->vha = vha;
384 ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
385 ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
386 ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
387 INIT_LIST_HEAD(&ha->base_qpair->hints_list);
388 INIT_LIST_HEAD(&ha->base_qpair->nvme_done_list);
389 ha->base_qpair->enable_class_2 = ql2xenableclass2;
390 /* init qpair to this cpu. Will adjust at run time. */
391 qla_cpu_update(rsp->qpair, smp_processor_id());
392 ha->base_qpair->pdev = ha->pdev;
394 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
395 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
398 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
401 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
402 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
404 if (!ha->req_q_map) {
405 ql_log(ql_log_fatal, vha, 0x003b,
406 "Unable to allocate memory for request queue ptrs.\n");
410 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
412 if (!ha->rsp_q_map) {
413 ql_log(ql_log_fatal, vha, 0x003c,
414 "Unable to allocate memory for response queue ptrs.\n");
418 ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
419 if (ha->base_qpair == NULL) {
420 ql_log(ql_log_warn, vha, 0x00e0,
421 "Failed to allocate base queue pair memory.\n");
422 goto fail_base_qpair;
425 qla_init_base_qpair(vha, req, rsp);
427 if (ql2xmqsupport && ha->max_qpairs) {
428 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
430 if (!ha->queue_pair_map) {
431 ql_log(ql_log_fatal, vha, 0x0180,
432 "Unable to allocate memory for queue pair ptrs.\n");
438 * Make sure we record at least the request and response queue zero in
439 * case we need to free them if part of the probe fails.
441 ha->rsp_q_map[0] = rsp;
442 ha->req_q_map[0] = req;
443 set_bit(0, ha->rsp_qid_map);
444 set_bit(0, ha->req_qid_map);
448 kfree(ha->base_qpair);
449 ha->base_qpair = NULL;
451 kfree(ha->rsp_q_map);
452 ha->rsp_q_map = NULL;
454 kfree(ha->req_q_map);
455 ha->req_q_map = NULL;
460 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
462 if (IS_QLAFX00(ha)) {
463 if (req && req->ring_fx00)
464 dma_free_coherent(&ha->pdev->dev,
465 (req->length_fx00 + 1) * sizeof(request_t),
466 req->ring_fx00, req->dma_fx00);
467 } else if (req && req->ring)
468 dma_free_coherent(&ha->pdev->dev,
469 (req->length + 1) * sizeof(request_t),
470 req->ring, req->dma);
473 kfree(req->outstanding_cmds);
478 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
480 if (IS_QLAFX00(ha)) {
481 if (rsp && rsp->ring)
482 dma_free_coherent(&ha->pdev->dev,
483 (rsp->length_fx00 + 1) * sizeof(request_t),
484 rsp->ring_fx00, rsp->dma_fx00);
485 } else if (rsp && rsp->ring) {
486 dma_free_coherent(&ha->pdev->dev,
487 (rsp->length + 1) * sizeof(response_t),
488 rsp->ring, rsp->dma);
493 static void qla2x00_free_queues(struct qla_hw_data *ha)
500 if (ha->queue_pair_map) {
501 kfree(ha->queue_pair_map);
502 ha->queue_pair_map = NULL;
504 if (ha->base_qpair) {
505 kfree(ha->base_qpair);
506 ha->base_qpair = NULL;
509 spin_lock_irqsave(&ha->hardware_lock, flags);
510 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
511 if (!test_bit(cnt, ha->req_qid_map))
514 req = ha->req_q_map[cnt];
515 clear_bit(cnt, ha->req_qid_map);
516 ha->req_q_map[cnt] = NULL;
518 spin_unlock_irqrestore(&ha->hardware_lock, flags);
519 qla2x00_free_req_que(ha, req);
520 spin_lock_irqsave(&ha->hardware_lock, flags);
522 spin_unlock_irqrestore(&ha->hardware_lock, flags);
524 kfree(ha->req_q_map);
525 ha->req_q_map = NULL;
528 spin_lock_irqsave(&ha->hardware_lock, flags);
529 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
530 if (!test_bit(cnt, ha->rsp_qid_map))
533 rsp = ha->rsp_q_map[cnt];
534 clear_bit(cnt, ha->rsp_qid_map);
535 ha->rsp_q_map[cnt] = NULL;
536 spin_unlock_irqrestore(&ha->hardware_lock, flags);
537 qla2x00_free_rsp_que(ha, rsp);
538 spin_lock_irqsave(&ha->hardware_lock, flags);
540 spin_unlock_irqrestore(&ha->hardware_lock, flags);
542 kfree(ha->rsp_q_map);
543 ha->rsp_q_map = NULL;
547 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
549 struct qla_hw_data *ha = vha->hw;
550 static char *pci_bus_modes[] = {
551 "33", "66", "100", "133",
556 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
559 strcat(str, pci_bus_modes[pci_bus]);
561 pci_bus = (ha->pci_attr & BIT_8) >> 8;
563 strcat(str, pci_bus_modes[pci_bus]);
565 strcat(str, " MHz)");
571 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
573 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
574 struct qla_hw_data *ha = vha->hw;
577 if (pci_is_pcie(ha->pdev)) {
579 uint32_t lstat, lspeed, lwidth;
581 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
582 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
583 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
585 strcpy(str, "PCIe (");
588 strcat(str, "2.5GT/s ");
591 strcat(str, "5.0GT/s ");
594 strcat(str, "8.0GT/s ");
597 strcat(str, "<unknown> ");
600 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
607 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
608 if (pci_bus == 0 || pci_bus == 8) {
610 strcat(str, pci_bus_modes[pci_bus >> 3]);
614 strcat(str, "Mode 2");
616 strcat(str, "Mode 1");
618 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
620 strcat(str, " MHz)");
626 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
629 struct qla_hw_data *ha = vha->hw;
631 snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
632 ha->fw_minor_version, ha->fw_subminor_version);
634 if (ha->fw_attributes & BIT_9) {
639 switch (ha->fw_attributes & 0xFF) {
653 sprintf(un_str, "(%x)", ha->fw_attributes);
657 if (ha->fw_attributes & 0x100)
664 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
666 struct qla_hw_data *ha = vha->hw;
668 snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
669 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
674 qla2x00_sp_free_dma(void *ptr)
677 struct qla_hw_data *ha = sp->vha->hw;
678 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
679 void *ctx = GET_CMD_CTX_SP(sp);
681 if (sp->flags & SRB_DMA_VALID) {
683 sp->flags &= ~SRB_DMA_VALID;
686 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
687 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
688 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
689 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
695 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
696 /* List assured to be having elements */
697 qla2x00_clean_dsd_pool(ha, ctx);
698 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
701 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
702 struct crc_context *ctx0 = ctx;
704 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
705 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
708 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
709 struct ct6_dsd *ctx1 = ctx;
711 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
713 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
714 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
715 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
716 mempool_free(ctx1, ha->ctx_mempool);
720 if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
727 qla2x00_sp_compl(void *ptr, int res)
730 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
734 if (atomic_read(&sp->ref_count) == 0) {
735 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
736 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
738 if (ql2xextended_error_logging & ql_dbg_io)
739 WARN_ON(atomic_read(&sp->ref_count) == 0);
742 if (!atomic_dec_and_test(&sp->ref_count))
750 qla2xxx_qpair_sp_free_dma(void *ptr)
752 srb_t *sp = (srb_t *)ptr;
753 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
754 struct qla_hw_data *ha = sp->fcport->vha->hw;
755 void *ctx = GET_CMD_CTX_SP(sp);
757 if (sp->flags & SRB_DMA_VALID) {
759 sp->flags &= ~SRB_DMA_VALID;
762 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
763 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
764 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
765 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
771 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
772 /* List assured to be having elements */
773 qla2x00_clean_dsd_pool(ha, ctx);
774 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
777 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
778 struct crc_context *ctx0 = ctx;
780 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
781 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
784 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
785 struct ct6_dsd *ctx1 = ctx;
786 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
788 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
789 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
790 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
791 mempool_free(ctx1, ha->ctx_mempool);
795 qla2xxx_rel_qpair_sp(sp->qpair, sp);
799 qla2xxx_qpair_sp_compl(void *ptr, int res)
802 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
806 if (atomic_read(&sp->ref_count) == 0) {
807 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
808 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
810 if (ql2xextended_error_logging & ql_dbg_io)
811 WARN_ON(atomic_read(&sp->ref_count) == 0);
814 if (!atomic_dec_and_test(&sp->ref_count))
821 /* If we are SP1 here, we need to still take and release the host_lock as SP1
822 * does not have the changes necessary to avoid taking host->host_lock.
825 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
827 scsi_qla_host_t *vha = shost_priv(host);
828 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
829 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
830 struct qla_hw_data *ha = vha->hw;
831 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
834 struct qla_qpair *qpair = NULL;
838 if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
839 cmd->result = DID_NO_CONNECT << 16;
840 goto qc24_fail_command;
844 if (shost_use_blk_mq(vha->host)) {
845 tag = blk_mq_unique_tag(cmd->request);
846 hwq = blk_mq_unique_tag_to_hwq(tag);
847 qpair = ha->queue_pair_map[hwq];
848 } else if (vha->vp_idx && vha->qpair) {
853 return qla2xxx_mqueuecommand(host, cmd, qpair);
856 if (ha->flags.eeh_busy) {
857 if (ha->flags.pci_channel_io_perm_failure) {
858 ql_dbg(ql_dbg_aer, vha, 0x9010,
859 "PCI Channel IO permanent failure, exiting "
861 cmd->result = DID_NO_CONNECT << 16;
863 ql_dbg(ql_dbg_aer, vha, 0x9011,
864 "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
865 cmd->result = DID_REQUEUE << 16;
867 goto qc24_fail_command;
870 rval = fc_remote_port_chkready(rport);
873 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
874 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
876 goto qc24_fail_command;
879 if (!vha->flags.difdix_supported &&
880 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
881 ql_dbg(ql_dbg_io, vha, 0x3004,
882 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
884 cmd->result = DID_NO_CONNECT << 16;
885 goto qc24_fail_command;
889 cmd->result = DID_NO_CONNECT << 16;
890 goto qc24_fail_command;
893 if (atomic_read(&fcport->state) != FCS_ONLINE) {
894 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
895 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
896 ql_dbg(ql_dbg_io, vha, 0x3005,
897 "Returning DNC, fcport_state=%d loop_state=%d.\n",
898 atomic_read(&fcport->state),
899 atomic_read(&base_vha->loop_state));
900 cmd->result = DID_NO_CONNECT << 16;
901 goto qc24_fail_command;
903 goto qc24_target_busy;
907 * Return target busy if we've received a non-zero retry_delay_timer
910 if (fcport->retry_delay_timestamp == 0) {
911 /* retry delay not set */
912 } else if (time_after(jiffies, fcport->retry_delay_timestamp))
913 fcport->retry_delay_timestamp = 0;
915 goto qc24_target_busy;
917 sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
921 sp->u.scmd.cmd = cmd;
922 sp->type = SRB_SCSI_CMD;
923 atomic_set(&sp->ref_count, 1);
924 CMD_SP(cmd) = (void *)sp;
925 sp->free = qla2x00_sp_free_dma;
926 sp->done = qla2x00_sp_compl;
928 rval = ha->isp_ops->start_scsi(sp);
929 if (rval != QLA_SUCCESS) {
930 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
931 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
932 goto qc24_host_busy_free_sp;
937 qc24_host_busy_free_sp:
941 return SCSI_MLQUEUE_HOST_BUSY;
944 return SCSI_MLQUEUE_TARGET_BUSY;
952 /* For MQ supported I/O */
954 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
955 struct qla_qpair *qpair)
957 scsi_qla_host_t *vha = shost_priv(host);
958 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
959 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
960 struct qla_hw_data *ha = vha->hw;
961 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
965 rval = fc_remote_port_chkready(rport);
968 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
969 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
971 goto qc24_fail_command;
975 cmd->result = DID_NO_CONNECT << 16;
976 goto qc24_fail_command;
979 if (atomic_read(&fcport->state) != FCS_ONLINE) {
980 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
981 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
982 ql_dbg(ql_dbg_io, vha, 0x3077,
983 "Returning DNC, fcport_state=%d loop_state=%d.\n",
984 atomic_read(&fcport->state),
985 atomic_read(&base_vha->loop_state));
986 cmd->result = DID_NO_CONNECT << 16;
987 goto qc24_fail_command;
989 goto qc24_target_busy;
993 * Return target busy if we've received a non-zero retry_delay_timer
996 if (fcport->retry_delay_timestamp == 0) {
997 /* retry delay not set */
998 } else if (time_after(jiffies, fcport->retry_delay_timestamp))
999 fcport->retry_delay_timestamp = 0;
1001 goto qc24_target_busy;
1003 sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
1005 goto qc24_host_busy;
1007 sp->u.scmd.cmd = cmd;
1008 sp->type = SRB_SCSI_CMD;
1009 atomic_set(&sp->ref_count, 1);
1010 CMD_SP(cmd) = (void *)sp;
1011 sp->free = qla2xxx_qpair_sp_free_dma;
1012 sp->done = qla2xxx_qpair_sp_compl;
1015 rval = ha->isp_ops->start_scsi_mq(sp);
1016 if (rval != QLA_SUCCESS) {
1017 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1018 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1019 if (rval == QLA_INTERFACE_ERROR)
1020 goto qc24_fail_command;
1021 goto qc24_host_busy_free_sp;
1026 qc24_host_busy_free_sp:
1030 return SCSI_MLQUEUE_HOST_BUSY;
1033 return SCSI_MLQUEUE_TARGET_BUSY;
1036 cmd->scsi_done(cmd);
1042 * qla2x00_eh_wait_on_command
1043 * Waits for the command to be returned by the Firmware for some
1047 * cmd = Scsi Command to wait on.
1054 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1056 #define ABORT_POLLING_PERIOD 1000
1057 #define ABORT_WAIT_ITER ((2 * 1000) / (ABORT_POLLING_PERIOD))
1058 unsigned long wait_iter = ABORT_WAIT_ITER;
1059 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1060 struct qla_hw_data *ha = vha->hw;
1061 int ret = QLA_SUCCESS;
1063 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1064 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1065 "Return:eh_wait.\n");
1069 while (CMD_SP(cmd) && wait_iter--) {
1070 msleep(ABORT_POLLING_PERIOD);
1073 ret = QLA_FUNCTION_FAILED;
1079 * qla2x00_wait_for_hba_online
1080 * Wait till the HBA is online after going through
1081 * <= MAX_RETRIES_OF_ISP_ABORT or
1082 * finally HBA is disabled ie marked offline
1085 * ha - pointer to host adapter structure
1088 * Does context switching-Release SPIN_LOCK
1089 * (if any) before calling this routine.
1092 * Success (Adapter is online) : 0
1093 * Failed (Adapter is offline/disabled) : 1
1096 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1099 unsigned long wait_online;
1100 struct qla_hw_data *ha = vha->hw;
1101 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1103 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1104 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1105 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1106 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1107 ha->dpc_active) && time_before(jiffies, wait_online)) {
1111 if (base_vha->flags.online)
1112 return_status = QLA_SUCCESS;
1114 return_status = QLA_FUNCTION_FAILED;
1116 return (return_status);
1119 static inline int test_fcport_count(scsi_qla_host_t *vha)
1121 struct qla_hw_data *ha = vha->hw;
1122 unsigned long flags;
1125 spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1126 ql_dbg(ql_dbg_init, vha, 0x00ec,
1127 "tgt %p, fcport_count=%d\n",
1128 vha, vha->fcport_count);
1129 res = (vha->fcport_count == 0);
1130 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1136 * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1137 * it has dependency on UNLOADING flag to stop device discovery
1140 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1142 qla2x00_mark_all_devices_lost(vha, 0);
1144 wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1148 * qla2x00_wait_for_hba_ready
1149 * Wait till the HBA is ready before doing driver unload
1152 * ha - pointer to host adapter structure
1155 * Does context switching-Release SPIN_LOCK
1156 * (if any) before calling this routine.
1160 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1162 struct qla_hw_data *ha = vha->hw;
1163 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1165 while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1166 ha->flags.mbox_busy) ||
1167 test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1168 test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1169 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1176 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1179 unsigned long wait_reset;
1180 struct qla_hw_data *ha = vha->hw;
1181 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1183 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1184 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1185 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1186 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1187 ha->dpc_active) && time_before(jiffies, wait_reset)) {
1191 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1192 ha->flags.chip_reset_done)
1195 if (ha->flags.chip_reset_done)
1196 return_status = QLA_SUCCESS;
1198 return_status = QLA_FUNCTION_FAILED;
1200 return return_status;
1204 sp_get(struct srb *sp)
1206 atomic_inc(&sp->ref_count);
1209 #define ISP_REG_DISCONNECT 0xffffffffU
1210 /**************************************************************************
1211 * qla2x00_isp_reg_stat
1214 * Read the host status register of ISP before aborting the command.
1217 * ha = pointer to host adapter structure.
1221 * Either true or false.
1223 * Note: Return true if there is register disconnect.
1224 **************************************************************************/
1226 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1228 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1229 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1231 if (IS_P3P_TYPE(ha))
1232 return ((RD_REG_DWORD(®82->host_int)) == ISP_REG_DISCONNECT);
1234 return ((RD_REG_DWORD(®->host_status)) ==
1235 ISP_REG_DISCONNECT);
1238 /**************************************************************************
1242 * The abort function will abort the specified command.
1245 * cmd = Linux SCSI command packet to be aborted.
1248 * Either SUCCESS or FAILED.
1251 * Only return FAILED if command not returned by firmware.
1252 **************************************************************************/
1254 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1256 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1261 unsigned long flags;
1263 struct qla_hw_data *ha = vha->hw;
1265 if (qla2x00_isp_reg_stat(ha)) {
1266 ql_log(ql_log_info, vha, 0x8042,
1267 "PCI/Register disconnect, exiting.\n");
1273 ret = fc_block_scsi_eh(cmd);
1278 id = cmd->device->id;
1279 lun = cmd->device->lun;
1281 spin_lock_irqsave(&ha->hardware_lock, flags);
1282 sp = (srb_t *) CMD_SP(cmd);
1284 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1288 ql_dbg(ql_dbg_taskm, vha, 0x8002,
1289 "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1290 vha->host_no, id, lun, sp, cmd, sp->handle);
1292 /* Get a reference to the sp and drop the lock.*/
1295 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1296 rval = ha->isp_ops->abort_command(sp);
1298 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1303 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1304 "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1306 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1307 "Abort command mbx success cmd=%p.\n", cmd);
1311 spin_lock_irqsave(&ha->hardware_lock, flags);
1313 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1315 /* Did the command return during mailbox execution? */
1316 if (ret == FAILED && !CMD_SP(cmd))
1319 /* Wait for the command to be returned. */
1321 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1322 ql_log(ql_log_warn, vha, 0x8006,
1323 "Abort handler timed out cmd=%p.\n", cmd);
1328 ql_log(ql_log_info, vha, 0x801c,
1329 "Abort command issued nexus=%ld:%d:%llu -- %d %x.\n",
1330 vha->host_no, id, lun, wait, ret);
1336 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1337 uint64_t l, enum nexus_wait_type type)
1339 int cnt, match, status;
1340 unsigned long flags;
1341 struct qla_hw_data *ha = vha->hw;
1342 struct req_que *req;
1344 struct scsi_cmnd *cmd;
1346 status = QLA_SUCCESS;
1348 spin_lock_irqsave(&ha->hardware_lock, flags);
1350 for (cnt = 1; status == QLA_SUCCESS &&
1351 cnt < req->num_outstanding_cmds; cnt++) {
1352 sp = req->outstanding_cmds[cnt];
1355 if (sp->type != SRB_SCSI_CMD)
1357 if (vha->vp_idx != sp->vha->vp_idx)
1360 cmd = GET_CMD_SP(sp);
1366 match = cmd->device->id == t;
1369 match = (cmd->device->id == t &&
1370 cmd->device->lun == l);
1376 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1377 status = qla2x00_eh_wait_on_command(cmd);
1378 spin_lock_irqsave(&ha->hardware_lock, flags);
1380 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1385 static char *reset_errors[] = {
1388 "Task management failed",
1389 "Waiting for command completions",
1393 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1394 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1396 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1397 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1404 err = fc_block_scsi_eh(cmd);
1408 ql_log(ql_log_info, vha, 0x8009,
1409 "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1410 cmd->device->id, cmd->device->lun, cmd);
1413 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1414 ql_log(ql_log_warn, vha, 0x800a,
1415 "Wait for hba online failed for cmd=%p.\n", cmd);
1416 goto eh_reset_failed;
1419 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1421 ql_log(ql_log_warn, vha, 0x800c,
1422 "do_reset failed for cmd=%p.\n", cmd);
1423 goto eh_reset_failed;
1426 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1427 cmd->device->lun, type) != QLA_SUCCESS) {
1428 ql_log(ql_log_warn, vha, 0x800d,
1429 "wait for pending cmds failed for cmd=%p.\n", cmd);
1430 goto eh_reset_failed;
1433 ql_log(ql_log_info, vha, 0x800e,
1434 "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1435 vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1440 ql_log(ql_log_info, vha, 0x800f,
1441 "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1442 reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1448 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1450 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1451 struct qla_hw_data *ha = vha->hw;
1453 if (qla2x00_isp_reg_stat(ha)) {
1454 ql_log(ql_log_info, vha, 0x803e,
1455 "PCI/Register disconnect, exiting.\n");
1459 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1460 ha->isp_ops->lun_reset);
1464 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1466 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1467 struct qla_hw_data *ha = vha->hw;
1469 if (qla2x00_isp_reg_stat(ha)) {
1470 ql_log(ql_log_info, vha, 0x803f,
1471 "PCI/Register disconnect, exiting.\n");
1475 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1476 ha->isp_ops->target_reset);
1479 /**************************************************************************
1480 * qla2xxx_eh_bus_reset
1483 * The bus reset function will reset the bus and abort any executing
1487 * cmd = Linux SCSI command packet of the command that cause the
1491 * SUCCESS/FAILURE (defined as macro in scsi.h).
1493 **************************************************************************/
1495 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1497 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1498 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1502 struct qla_hw_data *ha = vha->hw;
1504 if (qla2x00_isp_reg_stat(ha)) {
1505 ql_log(ql_log_info, vha, 0x8040,
1506 "PCI/Register disconnect, exiting.\n");
1510 id = cmd->device->id;
1511 lun = cmd->device->lun;
1517 ret = fc_block_scsi_eh(cmd);
1522 ql_log(ql_log_info, vha, 0x8012,
1523 "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1525 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1526 ql_log(ql_log_fatal, vha, 0x8013,
1527 "Wait for hba online failed board disabled.\n");
1528 goto eh_bus_reset_done;
1531 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1535 goto eh_bus_reset_done;
1537 /* Flush outstanding commands. */
1538 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1540 ql_log(ql_log_warn, vha, 0x8014,
1541 "Wait for pending commands failed.\n");
1546 ql_log(ql_log_warn, vha, 0x802b,
1547 "BUS RESET %s nexus=%ld:%d:%llu.\n",
1548 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1553 /**************************************************************************
1554 * qla2xxx_eh_host_reset
1557 * The reset function will reset the Adapter.
1560 * cmd = Linux SCSI command packet of the command that cause the
1564 * Either SUCCESS or FAILED.
1567 **************************************************************************/
1569 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1571 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1572 struct qla_hw_data *ha = vha->hw;
1576 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1578 if (qla2x00_isp_reg_stat(ha)) {
1579 ql_log(ql_log_info, vha, 0x8041,
1580 "PCI/Register disconnect, exiting.\n");
1581 schedule_work(&ha->board_disable);
1585 id = cmd->device->id;
1586 lun = cmd->device->lun;
1588 ql_log(ql_log_info, vha, 0x8018,
1589 "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1592 * No point in issuing another reset if one is active. Also do not
1593 * attempt a reset if we are updating flash.
1595 if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1596 goto eh_host_reset_lock;
1598 if (vha != base_vha) {
1599 if (qla2x00_vp_abort_isp(vha))
1600 goto eh_host_reset_lock;
1602 if (IS_P3P_TYPE(vha->hw)) {
1603 if (!qla82xx_fcoe_ctx_reset(vha)) {
1604 /* Ctx reset success */
1606 goto eh_host_reset_lock;
1608 /* fall thru if ctx reset failed */
1611 flush_workqueue(ha->wq);
1613 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1614 if (ha->isp_ops->abort_isp(base_vha)) {
1615 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1616 /* failed. schedule dpc to try */
1617 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1619 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1620 ql_log(ql_log_warn, vha, 0x802a,
1621 "wait for hba online failed.\n");
1622 goto eh_host_reset_lock;
1625 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1628 /* Waiting for command to be returned to OS.*/
1629 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1634 ql_log(ql_log_info, vha, 0x8017,
1635 "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1636 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1642 * qla2x00_loop_reset
1646 * ha = adapter block pointer.
1652 qla2x00_loop_reset(scsi_qla_host_t *vha)
1655 struct fc_port *fcport;
1656 struct qla_hw_data *ha = vha->hw;
1658 if (IS_QLAFX00(ha)) {
1659 return qlafx00_loop_reset(vha);
1662 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1663 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1664 if (fcport->port_type != FCT_TARGET)
1667 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1668 if (ret != QLA_SUCCESS) {
1669 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1670 "Bus Reset failed: Reset=%d "
1671 "d_id=%x.\n", ret, fcport->d_id.b24);
1677 if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1678 atomic_set(&vha->loop_state, LOOP_DOWN);
1679 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1680 qla2x00_mark_all_devices_lost(vha, 0);
1681 ret = qla2x00_full_login_lip(vha);
1682 if (ret != QLA_SUCCESS) {
1683 ql_dbg(ql_dbg_taskm, vha, 0x802d,
1684 "full_login_lip=%d.\n", ret);
1688 if (ha->flags.enable_lip_reset) {
1689 ret = qla2x00_lip_reset(vha);
1690 if (ret != QLA_SUCCESS)
1691 ql_dbg(ql_dbg_taskm, vha, 0x802e,
1692 "lip_reset failed (%d).\n", ret);
1695 /* Issue marker command only when we are going to start the I/O */
1696 vha->marker_needed = 1;
1702 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1704 int que, cnt, status;
1705 unsigned long flags;
1707 struct qla_hw_data *ha = vha->hw;
1708 struct req_que *req;
1709 struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1710 struct qla_tgt_cmd *cmd;
1713 spin_lock_irqsave(&ha->hardware_lock, flags);
1714 for (que = 0; que < ha->max_req_queues; que++) {
1715 req = ha->req_q_map[que];
1718 if (!req->outstanding_cmds)
1720 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1721 sp = req->outstanding_cmds[cnt];
1723 req->outstanding_cmds[cnt] = NULL;
1724 if (sp->cmd_type == TYPE_SRB) {
1725 if (sp->type == SRB_NVME_CMD ||
1726 sp->type == SRB_NVME_LS) {
1728 spin_unlock_irqrestore(
1729 &ha->hardware_lock, flags);
1730 qla_nvme_abort(ha, sp);
1732 &ha->hardware_lock, flags);
1733 } else if (GET_CMD_SP(sp) &&
1734 !ha->flags.eeh_busy &&
1735 (sp->type == SRB_SCSI_CMD)) {
1737 * Don't abort commands in
1738 * adapter during EEH
1739 * recovery as it's not
1740 * accessible/responding.
1742 * Get a reference to the sp
1743 * and drop the lock. The
1744 * reference ensures this
1745 * sp->done() call and not the
1746 * call in qla2xxx_eh_abort()
1747 * ends the SCSI command (with
1751 spin_unlock_irqrestore(
1752 &ha->hardware_lock, flags);
1753 status = qla2xxx_eh_abort(
1756 &ha->hardware_lock, flags);
1758 * Get rid of extra reference
1759 * if immediate exit from
1762 if (status == FAILED &&
1763 (qla2x00_isp_reg_stat(ha)))
1769 if (!vha->hw->tgt.tgt_ops || !tgt ||
1770 qla_ini_mode_enabled(vha)) {
1772 ql_dbg(ql_dbg_tgt_mgt,
1774 "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1778 cmd = (struct qla_tgt_cmd *)sp;
1779 qlt_abort_cmd_on_host_reset(cmd->vha,
1785 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1789 qla2xxx_slave_alloc(struct scsi_device *sdev)
1791 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1793 if (!rport || fc_remote_port_chkready(rport))
1796 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1802 qla2xxx_slave_configure(struct scsi_device *sdev)
1804 scsi_qla_host_t *vha = shost_priv(sdev->host);
1805 struct req_que *req = vha->req;
1807 if (IS_T10_PI_CAPABLE(vha->hw))
1808 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1810 scsi_change_queue_depth(sdev, req->max_q_depth);
1815 qla2xxx_slave_destroy(struct scsi_device *sdev)
1817 sdev->hostdata = NULL;
1821 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1824 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1825 * supported addressing method.
1828 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1830 /* Assume a 32bit DMA mask. */
1831 ha->flags.enable_64bit_addressing = 0;
1833 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1834 /* Any upper-dword bits set? */
1835 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1836 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1837 /* Ok, a 64bit DMA mask is applicable. */
1838 ha->flags.enable_64bit_addressing = 1;
1839 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1840 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1845 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1846 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1850 qla2x00_enable_intrs(struct qla_hw_data *ha)
1852 unsigned long flags = 0;
1853 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1855 spin_lock_irqsave(&ha->hardware_lock, flags);
1856 ha->interrupts_on = 1;
1857 /* enable risc and host interrupts */
1858 WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC);
1859 RD_REG_WORD(®->ictrl);
1860 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1865 qla2x00_disable_intrs(struct qla_hw_data *ha)
1867 unsigned long flags = 0;
1868 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1870 spin_lock_irqsave(&ha->hardware_lock, flags);
1871 ha->interrupts_on = 0;
1872 /* disable risc and host interrupts */
1873 WRT_REG_WORD(®->ictrl, 0);
1874 RD_REG_WORD(®->ictrl);
1875 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1879 qla24xx_enable_intrs(struct qla_hw_data *ha)
1881 unsigned long flags = 0;
1882 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1884 spin_lock_irqsave(&ha->hardware_lock, flags);
1885 ha->interrupts_on = 1;
1886 WRT_REG_DWORD(®->ictrl, ICRX_EN_RISC_INT);
1887 RD_REG_DWORD(®->ictrl);
1888 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1892 qla24xx_disable_intrs(struct qla_hw_data *ha)
1894 unsigned long flags = 0;
1895 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1897 if (IS_NOPOLLING_TYPE(ha))
1899 spin_lock_irqsave(&ha->hardware_lock, flags);
1900 ha->interrupts_on = 0;
1901 WRT_REG_DWORD(®->ictrl, 0);
1902 RD_REG_DWORD(®->ictrl);
1903 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1907 qla2x00_iospace_config(struct qla_hw_data *ha)
1909 resource_size_t pio;
1912 if (pci_request_selected_regions(ha->pdev, ha->bars,
1913 QLA2XXX_DRIVER_NAME)) {
1914 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1915 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1916 pci_name(ha->pdev));
1917 goto iospace_error_exit;
1919 if (!(ha->bars & 1))
1922 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1923 pio = pci_resource_start(ha->pdev, 0);
1924 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1925 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1926 ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1927 "Invalid pci I/O region size (%s).\n",
1928 pci_name(ha->pdev));
1932 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1933 "Region #0 no a PIO resource (%s).\n",
1934 pci_name(ha->pdev));
1937 ha->pio_address = pio;
1938 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1939 "PIO address=%llu.\n",
1940 (unsigned long long)ha->pio_address);
1943 /* Use MMIO operations for all accesses. */
1944 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1945 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1946 "Region #1 not an MMIO resource (%s), aborting.\n",
1947 pci_name(ha->pdev));
1948 goto iospace_error_exit;
1950 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1951 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1952 "Invalid PCI mem region size (%s), aborting.\n",
1953 pci_name(ha->pdev));
1954 goto iospace_error_exit;
1957 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1959 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1960 "Cannot remap MMIO (%s), aborting.\n",
1961 pci_name(ha->pdev));
1962 goto iospace_error_exit;
1965 /* Determine queue resources */
1966 ha->max_req_queues = ha->max_rsp_queues = 1;
1967 ha->msix_count = QLA_BASE_VECTORS;
1968 if (!ql2xmqsupport || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1971 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1972 pci_resource_len(ha->pdev, 3));
1974 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1975 "MQIO Base=%p.\n", ha->mqiobase);
1976 /* Read MSIX vector size of the board */
1977 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1978 ha->msix_count = msix + 1;
1979 /* Max queues are bounded by available msix vectors */
1980 /* MB interrupt uses 1 vector */
1981 ha->max_req_queues = ha->msix_count - 1;
1982 ha->max_rsp_queues = ha->max_req_queues;
1983 /* Queue pairs is the max value minus the base queue pair */
1984 ha->max_qpairs = ha->max_rsp_queues - 1;
1985 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1986 "Max no of queues pairs: %d.\n", ha->max_qpairs);
1988 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1989 "MSI-X vector count: %d.\n", ha->msix_count);
1991 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1992 "BAR 3 not enabled.\n");
1995 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1996 "MSIX Count: %d.\n", ha->msix_count);
2005 qla83xx_iospace_config(struct qla_hw_data *ha)
2009 if (pci_request_selected_regions(ha->pdev, ha->bars,
2010 QLA2XXX_DRIVER_NAME)) {
2011 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2012 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2013 pci_name(ha->pdev));
2015 goto iospace_error_exit;
2018 /* Use MMIO operations for all accesses. */
2019 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2020 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2021 "Invalid pci I/O region size (%s).\n",
2022 pci_name(ha->pdev));
2023 goto iospace_error_exit;
2025 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2026 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2027 "Invalid PCI mem region size (%s), aborting\n",
2028 pci_name(ha->pdev));
2029 goto iospace_error_exit;
2032 ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2034 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2035 "Cannot remap MMIO (%s), aborting.\n",
2036 pci_name(ha->pdev));
2037 goto iospace_error_exit;
2040 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2041 /* 83XX 26XX always use MQ type access for queues
2042 * - mbar 2, a.k.a region 4 */
2043 ha->max_req_queues = ha->max_rsp_queues = 1;
2044 ha->msix_count = QLA_BASE_VECTORS;
2045 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2046 pci_resource_len(ha->pdev, 4));
2048 if (!ha->mqiobase) {
2049 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2050 "BAR2/region4 not enabled\n");
2054 ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2055 pci_resource_len(ha->pdev, 2));
2057 /* Read MSIX vector size of the board */
2058 pci_read_config_word(ha->pdev,
2059 QLA_83XX_PCI_MSIX_CONTROL, &msix);
2060 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE) + 1;
2062 * By default, driver uses at least two msix vectors
2065 if (ql2xmqsupport) {
2066 /* MB interrupt uses 1 vector */
2067 ha->max_req_queues = ha->msix_count - 1;
2069 /* ATIOQ needs 1 vector. That's 1 less QPair */
2070 if (QLA_TGT_MODE_ENABLED())
2071 ha->max_req_queues--;
2073 ha->max_rsp_queues = ha->max_req_queues;
2075 /* Queue pairs is the max value minus
2076 * the base queue pair */
2077 ha->max_qpairs = ha->max_req_queues - 1;
2078 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2079 "Max no of queues pairs: %d.\n", ha->max_qpairs);
2081 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2082 "MSI-X vector count: %d.\n", ha->msix_count);
2084 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2085 "BAR 1 not enabled.\n");
2088 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2089 "MSIX Count: %d.\n", ha->msix_count);
2096 static struct isp_operations qla2100_isp_ops = {
2097 .pci_config = qla2100_pci_config,
2098 .reset_chip = qla2x00_reset_chip,
2099 .chip_diag = qla2x00_chip_diag,
2100 .config_rings = qla2x00_config_rings,
2101 .reset_adapter = qla2x00_reset_adapter,
2102 .nvram_config = qla2x00_nvram_config,
2103 .update_fw_options = qla2x00_update_fw_options,
2104 .load_risc = qla2x00_load_risc,
2105 .pci_info_str = qla2x00_pci_info_str,
2106 .fw_version_str = qla2x00_fw_version_str,
2107 .intr_handler = qla2100_intr_handler,
2108 .enable_intrs = qla2x00_enable_intrs,
2109 .disable_intrs = qla2x00_disable_intrs,
2110 .abort_command = qla2x00_abort_command,
2111 .target_reset = qla2x00_abort_target,
2112 .lun_reset = qla2x00_lun_reset,
2113 .fabric_login = qla2x00_login_fabric,
2114 .fabric_logout = qla2x00_fabric_logout,
2115 .calc_req_entries = qla2x00_calc_iocbs_32,
2116 .build_iocbs = qla2x00_build_scsi_iocbs_32,
2117 .prep_ms_iocb = qla2x00_prep_ms_iocb,
2118 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
2119 .read_nvram = qla2x00_read_nvram_data,
2120 .write_nvram = qla2x00_write_nvram_data,
2121 .fw_dump = qla2100_fw_dump,
2124 .beacon_blink = NULL,
2125 .read_optrom = qla2x00_read_optrom_data,
2126 .write_optrom = qla2x00_write_optrom_data,
2127 .get_flash_version = qla2x00_get_flash_version,
2128 .start_scsi = qla2x00_start_scsi,
2129 .start_scsi_mq = NULL,
2130 .abort_isp = qla2x00_abort_isp,
2131 .iospace_config = qla2x00_iospace_config,
2132 .initialize_adapter = qla2x00_initialize_adapter,
2135 static struct isp_operations qla2300_isp_ops = {
2136 .pci_config = qla2300_pci_config,
2137 .reset_chip = qla2x00_reset_chip,
2138 .chip_diag = qla2x00_chip_diag,
2139 .config_rings = qla2x00_config_rings,
2140 .reset_adapter = qla2x00_reset_adapter,
2141 .nvram_config = qla2x00_nvram_config,
2142 .update_fw_options = qla2x00_update_fw_options,
2143 .load_risc = qla2x00_load_risc,
2144 .pci_info_str = qla2x00_pci_info_str,
2145 .fw_version_str = qla2x00_fw_version_str,
2146 .intr_handler = qla2300_intr_handler,
2147 .enable_intrs = qla2x00_enable_intrs,
2148 .disable_intrs = qla2x00_disable_intrs,
2149 .abort_command = qla2x00_abort_command,
2150 .target_reset = qla2x00_abort_target,
2151 .lun_reset = qla2x00_lun_reset,
2152 .fabric_login = qla2x00_login_fabric,
2153 .fabric_logout = qla2x00_fabric_logout,
2154 .calc_req_entries = qla2x00_calc_iocbs_32,
2155 .build_iocbs = qla2x00_build_scsi_iocbs_32,
2156 .prep_ms_iocb = qla2x00_prep_ms_iocb,
2157 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
2158 .read_nvram = qla2x00_read_nvram_data,
2159 .write_nvram = qla2x00_write_nvram_data,
2160 .fw_dump = qla2300_fw_dump,
2161 .beacon_on = qla2x00_beacon_on,
2162 .beacon_off = qla2x00_beacon_off,
2163 .beacon_blink = qla2x00_beacon_blink,
2164 .read_optrom = qla2x00_read_optrom_data,
2165 .write_optrom = qla2x00_write_optrom_data,
2166 .get_flash_version = qla2x00_get_flash_version,
2167 .start_scsi = qla2x00_start_scsi,
2168 .start_scsi_mq = NULL,
2169 .abort_isp = qla2x00_abort_isp,
2170 .iospace_config = qla2x00_iospace_config,
2171 .initialize_adapter = qla2x00_initialize_adapter,
2174 static struct isp_operations qla24xx_isp_ops = {
2175 .pci_config = qla24xx_pci_config,
2176 .reset_chip = qla24xx_reset_chip,
2177 .chip_diag = qla24xx_chip_diag,
2178 .config_rings = qla24xx_config_rings,
2179 .reset_adapter = qla24xx_reset_adapter,
2180 .nvram_config = qla24xx_nvram_config,
2181 .update_fw_options = qla24xx_update_fw_options,
2182 .load_risc = qla24xx_load_risc,
2183 .pci_info_str = qla24xx_pci_info_str,
2184 .fw_version_str = qla24xx_fw_version_str,
2185 .intr_handler = qla24xx_intr_handler,
2186 .enable_intrs = qla24xx_enable_intrs,
2187 .disable_intrs = qla24xx_disable_intrs,
2188 .abort_command = qla24xx_abort_command,
2189 .target_reset = qla24xx_abort_target,
2190 .lun_reset = qla24xx_lun_reset,
2191 .fabric_login = qla24xx_login_fabric,
2192 .fabric_logout = qla24xx_fabric_logout,
2193 .calc_req_entries = NULL,
2194 .build_iocbs = NULL,
2195 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2196 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2197 .read_nvram = qla24xx_read_nvram_data,
2198 .write_nvram = qla24xx_write_nvram_data,
2199 .fw_dump = qla24xx_fw_dump,
2200 .beacon_on = qla24xx_beacon_on,
2201 .beacon_off = qla24xx_beacon_off,
2202 .beacon_blink = qla24xx_beacon_blink,
2203 .read_optrom = qla24xx_read_optrom_data,
2204 .write_optrom = qla24xx_write_optrom_data,
2205 .get_flash_version = qla24xx_get_flash_version,
2206 .start_scsi = qla24xx_start_scsi,
2207 .start_scsi_mq = NULL,
2208 .abort_isp = qla2x00_abort_isp,
2209 .iospace_config = qla2x00_iospace_config,
2210 .initialize_adapter = qla2x00_initialize_adapter,
2213 static struct isp_operations qla25xx_isp_ops = {
2214 .pci_config = qla25xx_pci_config,
2215 .reset_chip = qla24xx_reset_chip,
2216 .chip_diag = qla24xx_chip_diag,
2217 .config_rings = qla24xx_config_rings,
2218 .reset_adapter = qla24xx_reset_adapter,
2219 .nvram_config = qla24xx_nvram_config,
2220 .update_fw_options = qla24xx_update_fw_options,
2221 .load_risc = qla24xx_load_risc,
2222 .pci_info_str = qla24xx_pci_info_str,
2223 .fw_version_str = qla24xx_fw_version_str,
2224 .intr_handler = qla24xx_intr_handler,
2225 .enable_intrs = qla24xx_enable_intrs,
2226 .disable_intrs = qla24xx_disable_intrs,
2227 .abort_command = qla24xx_abort_command,
2228 .target_reset = qla24xx_abort_target,
2229 .lun_reset = qla24xx_lun_reset,
2230 .fabric_login = qla24xx_login_fabric,
2231 .fabric_logout = qla24xx_fabric_logout,
2232 .calc_req_entries = NULL,
2233 .build_iocbs = NULL,
2234 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2235 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2236 .read_nvram = qla25xx_read_nvram_data,
2237 .write_nvram = qla25xx_write_nvram_data,
2238 .fw_dump = qla25xx_fw_dump,
2239 .beacon_on = qla24xx_beacon_on,
2240 .beacon_off = qla24xx_beacon_off,
2241 .beacon_blink = qla24xx_beacon_blink,
2242 .read_optrom = qla25xx_read_optrom_data,
2243 .write_optrom = qla24xx_write_optrom_data,
2244 .get_flash_version = qla24xx_get_flash_version,
2245 .start_scsi = qla24xx_dif_start_scsi,
2246 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2247 .abort_isp = qla2x00_abort_isp,
2248 .iospace_config = qla2x00_iospace_config,
2249 .initialize_adapter = qla2x00_initialize_adapter,
2252 static struct isp_operations qla81xx_isp_ops = {
2253 .pci_config = qla25xx_pci_config,
2254 .reset_chip = qla24xx_reset_chip,
2255 .chip_diag = qla24xx_chip_diag,
2256 .config_rings = qla24xx_config_rings,
2257 .reset_adapter = qla24xx_reset_adapter,
2258 .nvram_config = qla81xx_nvram_config,
2259 .update_fw_options = qla81xx_update_fw_options,
2260 .load_risc = qla81xx_load_risc,
2261 .pci_info_str = qla24xx_pci_info_str,
2262 .fw_version_str = qla24xx_fw_version_str,
2263 .intr_handler = qla24xx_intr_handler,
2264 .enable_intrs = qla24xx_enable_intrs,
2265 .disable_intrs = qla24xx_disable_intrs,
2266 .abort_command = qla24xx_abort_command,
2267 .target_reset = qla24xx_abort_target,
2268 .lun_reset = qla24xx_lun_reset,
2269 .fabric_login = qla24xx_login_fabric,
2270 .fabric_logout = qla24xx_fabric_logout,
2271 .calc_req_entries = NULL,
2272 .build_iocbs = NULL,
2273 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2274 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2276 .write_nvram = NULL,
2277 .fw_dump = qla81xx_fw_dump,
2278 .beacon_on = qla24xx_beacon_on,
2279 .beacon_off = qla24xx_beacon_off,
2280 .beacon_blink = qla83xx_beacon_blink,
2281 .read_optrom = qla25xx_read_optrom_data,
2282 .write_optrom = qla24xx_write_optrom_data,
2283 .get_flash_version = qla24xx_get_flash_version,
2284 .start_scsi = qla24xx_dif_start_scsi,
2285 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2286 .abort_isp = qla2x00_abort_isp,
2287 .iospace_config = qla2x00_iospace_config,
2288 .initialize_adapter = qla2x00_initialize_adapter,
2291 static struct isp_operations qla82xx_isp_ops = {
2292 .pci_config = qla82xx_pci_config,
2293 .reset_chip = qla82xx_reset_chip,
2294 .chip_diag = qla24xx_chip_diag,
2295 .config_rings = qla82xx_config_rings,
2296 .reset_adapter = qla24xx_reset_adapter,
2297 .nvram_config = qla81xx_nvram_config,
2298 .update_fw_options = qla24xx_update_fw_options,
2299 .load_risc = qla82xx_load_risc,
2300 .pci_info_str = qla24xx_pci_info_str,
2301 .fw_version_str = qla24xx_fw_version_str,
2302 .intr_handler = qla82xx_intr_handler,
2303 .enable_intrs = qla82xx_enable_intrs,
2304 .disable_intrs = qla82xx_disable_intrs,
2305 .abort_command = qla24xx_abort_command,
2306 .target_reset = qla24xx_abort_target,
2307 .lun_reset = qla24xx_lun_reset,
2308 .fabric_login = qla24xx_login_fabric,
2309 .fabric_logout = qla24xx_fabric_logout,
2310 .calc_req_entries = NULL,
2311 .build_iocbs = NULL,
2312 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2313 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2314 .read_nvram = qla24xx_read_nvram_data,
2315 .write_nvram = qla24xx_write_nvram_data,
2316 .fw_dump = qla82xx_fw_dump,
2317 .beacon_on = qla82xx_beacon_on,
2318 .beacon_off = qla82xx_beacon_off,
2319 .beacon_blink = NULL,
2320 .read_optrom = qla82xx_read_optrom_data,
2321 .write_optrom = qla82xx_write_optrom_data,
2322 .get_flash_version = qla82xx_get_flash_version,
2323 .start_scsi = qla82xx_start_scsi,
2324 .start_scsi_mq = NULL,
2325 .abort_isp = qla82xx_abort_isp,
2326 .iospace_config = qla82xx_iospace_config,
2327 .initialize_adapter = qla2x00_initialize_adapter,
2330 static struct isp_operations qla8044_isp_ops = {
2331 .pci_config = qla82xx_pci_config,
2332 .reset_chip = qla82xx_reset_chip,
2333 .chip_diag = qla24xx_chip_diag,
2334 .config_rings = qla82xx_config_rings,
2335 .reset_adapter = qla24xx_reset_adapter,
2336 .nvram_config = qla81xx_nvram_config,
2337 .update_fw_options = qla24xx_update_fw_options,
2338 .load_risc = qla82xx_load_risc,
2339 .pci_info_str = qla24xx_pci_info_str,
2340 .fw_version_str = qla24xx_fw_version_str,
2341 .intr_handler = qla8044_intr_handler,
2342 .enable_intrs = qla82xx_enable_intrs,
2343 .disable_intrs = qla82xx_disable_intrs,
2344 .abort_command = qla24xx_abort_command,
2345 .target_reset = qla24xx_abort_target,
2346 .lun_reset = qla24xx_lun_reset,
2347 .fabric_login = qla24xx_login_fabric,
2348 .fabric_logout = qla24xx_fabric_logout,
2349 .calc_req_entries = NULL,
2350 .build_iocbs = NULL,
2351 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2352 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2354 .write_nvram = NULL,
2355 .fw_dump = qla8044_fw_dump,
2356 .beacon_on = qla82xx_beacon_on,
2357 .beacon_off = qla82xx_beacon_off,
2358 .beacon_blink = NULL,
2359 .read_optrom = qla8044_read_optrom_data,
2360 .write_optrom = qla8044_write_optrom_data,
2361 .get_flash_version = qla82xx_get_flash_version,
2362 .start_scsi = qla82xx_start_scsi,
2363 .start_scsi_mq = NULL,
2364 .abort_isp = qla8044_abort_isp,
2365 .iospace_config = qla82xx_iospace_config,
2366 .initialize_adapter = qla2x00_initialize_adapter,
2369 static struct isp_operations qla83xx_isp_ops = {
2370 .pci_config = qla25xx_pci_config,
2371 .reset_chip = qla24xx_reset_chip,
2372 .chip_diag = qla24xx_chip_diag,
2373 .config_rings = qla24xx_config_rings,
2374 .reset_adapter = qla24xx_reset_adapter,
2375 .nvram_config = qla81xx_nvram_config,
2376 .update_fw_options = qla81xx_update_fw_options,
2377 .load_risc = qla81xx_load_risc,
2378 .pci_info_str = qla24xx_pci_info_str,
2379 .fw_version_str = qla24xx_fw_version_str,
2380 .intr_handler = qla24xx_intr_handler,
2381 .enable_intrs = qla24xx_enable_intrs,
2382 .disable_intrs = qla24xx_disable_intrs,
2383 .abort_command = qla24xx_abort_command,
2384 .target_reset = qla24xx_abort_target,
2385 .lun_reset = qla24xx_lun_reset,
2386 .fabric_login = qla24xx_login_fabric,
2387 .fabric_logout = qla24xx_fabric_logout,
2388 .calc_req_entries = NULL,
2389 .build_iocbs = NULL,
2390 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2391 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2393 .write_nvram = NULL,
2394 .fw_dump = qla83xx_fw_dump,
2395 .beacon_on = qla24xx_beacon_on,
2396 .beacon_off = qla24xx_beacon_off,
2397 .beacon_blink = qla83xx_beacon_blink,
2398 .read_optrom = qla25xx_read_optrom_data,
2399 .write_optrom = qla24xx_write_optrom_data,
2400 .get_flash_version = qla24xx_get_flash_version,
2401 .start_scsi = qla24xx_dif_start_scsi,
2402 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2403 .abort_isp = qla2x00_abort_isp,
2404 .iospace_config = qla83xx_iospace_config,
2405 .initialize_adapter = qla2x00_initialize_adapter,
2408 static struct isp_operations qlafx00_isp_ops = {
2409 .pci_config = qlafx00_pci_config,
2410 .reset_chip = qlafx00_soft_reset,
2411 .chip_diag = qlafx00_chip_diag,
2412 .config_rings = qlafx00_config_rings,
2413 .reset_adapter = qlafx00_soft_reset,
2414 .nvram_config = NULL,
2415 .update_fw_options = NULL,
2417 .pci_info_str = qlafx00_pci_info_str,
2418 .fw_version_str = qlafx00_fw_version_str,
2419 .intr_handler = qlafx00_intr_handler,
2420 .enable_intrs = qlafx00_enable_intrs,
2421 .disable_intrs = qlafx00_disable_intrs,
2422 .abort_command = qla24xx_async_abort_command,
2423 .target_reset = qlafx00_abort_target,
2424 .lun_reset = qlafx00_lun_reset,
2425 .fabric_login = NULL,
2426 .fabric_logout = NULL,
2427 .calc_req_entries = NULL,
2428 .build_iocbs = NULL,
2429 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2430 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2431 .read_nvram = qla24xx_read_nvram_data,
2432 .write_nvram = qla24xx_write_nvram_data,
2434 .beacon_on = qla24xx_beacon_on,
2435 .beacon_off = qla24xx_beacon_off,
2436 .beacon_blink = NULL,
2437 .read_optrom = qla24xx_read_optrom_data,
2438 .write_optrom = qla24xx_write_optrom_data,
2439 .get_flash_version = qla24xx_get_flash_version,
2440 .start_scsi = qlafx00_start_scsi,
2441 .start_scsi_mq = NULL,
2442 .abort_isp = qlafx00_abort_isp,
2443 .iospace_config = qlafx00_iospace_config,
2444 .initialize_adapter = qlafx00_initialize_adapter,
2447 static struct isp_operations qla27xx_isp_ops = {
2448 .pci_config = qla25xx_pci_config,
2449 .reset_chip = qla24xx_reset_chip,
2450 .chip_diag = qla24xx_chip_diag,
2451 .config_rings = qla24xx_config_rings,
2452 .reset_adapter = qla24xx_reset_adapter,
2453 .nvram_config = qla81xx_nvram_config,
2454 .update_fw_options = qla81xx_update_fw_options,
2455 .load_risc = qla81xx_load_risc,
2456 .pci_info_str = qla24xx_pci_info_str,
2457 .fw_version_str = qla24xx_fw_version_str,
2458 .intr_handler = qla24xx_intr_handler,
2459 .enable_intrs = qla24xx_enable_intrs,
2460 .disable_intrs = qla24xx_disable_intrs,
2461 .abort_command = qla24xx_abort_command,
2462 .target_reset = qla24xx_abort_target,
2463 .lun_reset = qla24xx_lun_reset,
2464 .fabric_login = qla24xx_login_fabric,
2465 .fabric_logout = qla24xx_fabric_logout,
2466 .calc_req_entries = NULL,
2467 .build_iocbs = NULL,
2468 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2469 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2471 .write_nvram = NULL,
2472 .fw_dump = qla27xx_fwdump,
2473 .beacon_on = qla24xx_beacon_on,
2474 .beacon_off = qla24xx_beacon_off,
2475 .beacon_blink = qla83xx_beacon_blink,
2476 .read_optrom = qla25xx_read_optrom_data,
2477 .write_optrom = qla24xx_write_optrom_data,
2478 .get_flash_version = qla24xx_get_flash_version,
2479 .start_scsi = qla24xx_dif_start_scsi,
2480 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2481 .abort_isp = qla2x00_abort_isp,
2482 .iospace_config = qla83xx_iospace_config,
2483 .initialize_adapter = qla2x00_initialize_adapter,
2487 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2489 ha->device_type = DT_EXTENDED_IDS;
2490 switch (ha->pdev->device) {
2491 case PCI_DEVICE_ID_QLOGIC_ISP2100:
2492 ha->isp_type |= DT_ISP2100;
2493 ha->device_type &= ~DT_EXTENDED_IDS;
2494 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2496 case PCI_DEVICE_ID_QLOGIC_ISP2200:
2497 ha->isp_type |= DT_ISP2200;
2498 ha->device_type &= ~DT_EXTENDED_IDS;
2499 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2501 case PCI_DEVICE_ID_QLOGIC_ISP2300:
2502 ha->isp_type |= DT_ISP2300;
2503 ha->device_type |= DT_ZIO_SUPPORTED;
2504 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2506 case PCI_DEVICE_ID_QLOGIC_ISP2312:
2507 ha->isp_type |= DT_ISP2312;
2508 ha->device_type |= DT_ZIO_SUPPORTED;
2509 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2511 case PCI_DEVICE_ID_QLOGIC_ISP2322:
2512 ha->isp_type |= DT_ISP2322;
2513 ha->device_type |= DT_ZIO_SUPPORTED;
2514 if (ha->pdev->subsystem_vendor == 0x1028 &&
2515 ha->pdev->subsystem_device == 0x0170)
2516 ha->device_type |= DT_OEM_001;
2517 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2519 case PCI_DEVICE_ID_QLOGIC_ISP6312:
2520 ha->isp_type |= DT_ISP6312;
2521 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2523 case PCI_DEVICE_ID_QLOGIC_ISP6322:
2524 ha->isp_type |= DT_ISP6322;
2525 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2527 case PCI_DEVICE_ID_QLOGIC_ISP2422:
2528 ha->isp_type |= DT_ISP2422;
2529 ha->device_type |= DT_ZIO_SUPPORTED;
2530 ha->device_type |= DT_FWI2;
2531 ha->device_type |= DT_IIDMA;
2532 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2534 case PCI_DEVICE_ID_QLOGIC_ISP2432:
2535 ha->isp_type |= DT_ISP2432;
2536 ha->device_type |= DT_ZIO_SUPPORTED;
2537 ha->device_type |= DT_FWI2;
2538 ha->device_type |= DT_IIDMA;
2539 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2541 case PCI_DEVICE_ID_QLOGIC_ISP8432:
2542 ha->isp_type |= DT_ISP8432;
2543 ha->device_type |= DT_ZIO_SUPPORTED;
2544 ha->device_type |= DT_FWI2;
2545 ha->device_type |= DT_IIDMA;
2546 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2548 case PCI_DEVICE_ID_QLOGIC_ISP5422:
2549 ha->isp_type |= DT_ISP5422;
2550 ha->device_type |= DT_FWI2;
2551 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2553 case PCI_DEVICE_ID_QLOGIC_ISP5432:
2554 ha->isp_type |= DT_ISP5432;
2555 ha->device_type |= DT_FWI2;
2556 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2558 case PCI_DEVICE_ID_QLOGIC_ISP2532:
2559 ha->isp_type |= DT_ISP2532;
2560 ha->device_type |= DT_ZIO_SUPPORTED;
2561 ha->device_type |= DT_FWI2;
2562 ha->device_type |= DT_IIDMA;
2563 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2565 case PCI_DEVICE_ID_QLOGIC_ISP8001:
2566 ha->isp_type |= DT_ISP8001;
2567 ha->device_type |= DT_ZIO_SUPPORTED;
2568 ha->device_type |= DT_FWI2;
2569 ha->device_type |= DT_IIDMA;
2570 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2572 case PCI_DEVICE_ID_QLOGIC_ISP8021:
2573 ha->isp_type |= DT_ISP8021;
2574 ha->device_type |= DT_ZIO_SUPPORTED;
2575 ha->device_type |= DT_FWI2;
2576 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2577 /* Initialize 82XX ISP flags */
2578 qla82xx_init_flags(ha);
2580 case PCI_DEVICE_ID_QLOGIC_ISP8044:
2581 ha->isp_type |= DT_ISP8044;
2582 ha->device_type |= DT_ZIO_SUPPORTED;
2583 ha->device_type |= DT_FWI2;
2584 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2585 /* Initialize 82XX ISP flags */
2586 qla82xx_init_flags(ha);
2588 case PCI_DEVICE_ID_QLOGIC_ISP2031:
2589 ha->isp_type |= DT_ISP2031;
2590 ha->device_type |= DT_ZIO_SUPPORTED;
2591 ha->device_type |= DT_FWI2;
2592 ha->device_type |= DT_IIDMA;
2593 ha->device_type |= DT_T10_PI;
2594 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2596 case PCI_DEVICE_ID_QLOGIC_ISP8031:
2597 ha->isp_type |= DT_ISP8031;
2598 ha->device_type |= DT_ZIO_SUPPORTED;
2599 ha->device_type |= DT_FWI2;
2600 ha->device_type |= DT_IIDMA;
2601 ha->device_type |= DT_T10_PI;
2602 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2604 case PCI_DEVICE_ID_QLOGIC_ISPF001:
2605 ha->isp_type |= DT_ISPFX00;
2607 case PCI_DEVICE_ID_QLOGIC_ISP2071:
2608 ha->isp_type |= DT_ISP2071;
2609 ha->device_type |= DT_ZIO_SUPPORTED;
2610 ha->device_type |= DT_FWI2;
2611 ha->device_type |= DT_IIDMA;
2612 ha->device_type |= DT_T10_PI;
2613 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2615 case PCI_DEVICE_ID_QLOGIC_ISP2271:
2616 ha->isp_type |= DT_ISP2271;
2617 ha->device_type |= DT_ZIO_SUPPORTED;
2618 ha->device_type |= DT_FWI2;
2619 ha->device_type |= DT_IIDMA;
2620 ha->device_type |= DT_T10_PI;
2621 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2623 case PCI_DEVICE_ID_QLOGIC_ISP2261:
2624 ha->isp_type |= DT_ISP2261;
2625 ha->device_type |= DT_ZIO_SUPPORTED;
2626 ha->device_type |= DT_FWI2;
2627 ha->device_type |= DT_IIDMA;
2628 ha->device_type |= DT_T10_PI;
2629 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2634 ha->port_no = ha->portnum & 1;
2636 /* Get adapter physical port no from interrupt pin register. */
2637 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2641 ha->port_no = !(ha->port_no & 1);
2644 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2645 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2646 ha->device_type, ha->port_no, ha->fw_srisc_address);
2650 qla2xxx_scan_start(struct Scsi_Host *shost)
2652 scsi_qla_host_t *vha = shost_priv(shost);
2654 if (vha->hw->flags.running_gold_fw)
2657 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2658 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2659 set_bit(RSCN_UPDATE, &vha->dpc_flags);
2660 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2664 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2666 scsi_qla_host_t *vha = shost_priv(shost);
2668 if (test_bit(UNLOADING, &vha->dpc_flags))
2672 if (time > vha->hw->loop_reset_delay * HZ)
2675 return atomic_read(&vha->loop_state) == LOOP_READY;
2678 static void qla2x00_iocb_work_fn(struct work_struct *work)
2680 struct scsi_qla_host *vha = container_of(work,
2681 struct scsi_qla_host, iocb_work);
2684 while (!list_empty(&vha->work_list)) {
2685 qla2x00_do_work(vha);
2693 * PCI driver interface
2696 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2699 struct Scsi_Host *host;
2700 scsi_qla_host_t *base_vha = NULL;
2701 struct qla_hw_data *ha;
2703 char fw_str[30], wq_name[30];
2704 struct scsi_host_template *sht;
2705 int bars, mem_only = 0;
2706 uint16_t req_length = 0, rsp_length = 0;
2707 struct req_que *req = NULL;
2708 struct rsp_que *rsp = NULL;
2711 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2712 sht = &qla2xxx_driver_template;
2713 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2714 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2715 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2716 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2717 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2718 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2719 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2720 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2721 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2722 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2723 pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2724 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2725 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2726 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2727 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2728 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2730 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2731 "Mem only adapter.\n");
2733 ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2734 "Bars=%d.\n", bars);
2737 if (pci_enable_device_mem(pdev))
2740 if (pci_enable_device(pdev))
2744 /* This may fail but that's ok */
2745 pci_enable_pcie_error_reporting(pdev);
2747 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2749 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2750 "Unable to allocate memory for ha.\n");
2751 goto disable_device;
2753 ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2754 "Memory allocated for ha=%p.\n", ha);
2756 INIT_LIST_HEAD(&ha->tgt.q_full_list);
2757 spin_lock_init(&ha->tgt.q_full_lock);
2758 spin_lock_init(&ha->tgt.sess_lock);
2759 spin_lock_init(&ha->tgt.atio_lock);
2761 atomic_set(&ha->nvme_active_aen_cnt, 0);
2763 /* Clear our data area */
2765 ha->mem_only = mem_only;
2766 spin_lock_init(&ha->hardware_lock);
2767 spin_lock_init(&ha->vport_slock);
2768 mutex_init(&ha->selflogin_lock);
2769 mutex_init(&ha->optrom_mutex);
2771 /* Set ISP-type information. */
2772 qla2x00_set_isp_flags(ha);
2774 /* Set EEH reset type to fundamental if required by hba */
2775 if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2776 IS_QLA83XX(ha) || IS_QLA27XX(ha))
2777 pdev->needs_freset = 1;
2779 ha->prev_topology = 0;
2780 ha->init_cb_size = sizeof(init_cb_t);
2781 ha->link_data_rate = PORT_SPEED_UNKNOWN;
2782 ha->optrom_size = OPTROM_SIZE_2300;
2784 /* Assign ISP specific operations. */
2785 if (IS_QLA2100(ha)) {
2786 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2787 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2788 req_length = REQUEST_ENTRY_CNT_2100;
2789 rsp_length = RESPONSE_ENTRY_CNT_2100;
2790 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2791 ha->gid_list_info_size = 4;
2792 ha->flash_conf_off = ~0;
2793 ha->flash_data_off = ~0;
2794 ha->nvram_conf_off = ~0;
2795 ha->nvram_data_off = ~0;
2796 ha->isp_ops = &qla2100_isp_ops;
2797 } else if (IS_QLA2200(ha)) {
2798 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2799 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2800 req_length = REQUEST_ENTRY_CNT_2200;
2801 rsp_length = RESPONSE_ENTRY_CNT_2100;
2802 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2803 ha->gid_list_info_size = 4;
2804 ha->flash_conf_off = ~0;
2805 ha->flash_data_off = ~0;
2806 ha->nvram_conf_off = ~0;
2807 ha->nvram_data_off = ~0;
2808 ha->isp_ops = &qla2100_isp_ops;
2809 } else if (IS_QLA23XX(ha)) {
2810 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2811 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2812 req_length = REQUEST_ENTRY_CNT_2200;
2813 rsp_length = RESPONSE_ENTRY_CNT_2300;
2814 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2815 ha->gid_list_info_size = 6;
2816 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2817 ha->optrom_size = OPTROM_SIZE_2322;
2818 ha->flash_conf_off = ~0;
2819 ha->flash_data_off = ~0;
2820 ha->nvram_conf_off = ~0;
2821 ha->nvram_data_off = ~0;
2822 ha->isp_ops = &qla2300_isp_ops;
2823 } else if (IS_QLA24XX_TYPE(ha)) {
2824 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2825 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2826 req_length = REQUEST_ENTRY_CNT_24XX;
2827 rsp_length = RESPONSE_ENTRY_CNT_2300;
2828 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2829 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2830 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2831 ha->gid_list_info_size = 8;
2832 ha->optrom_size = OPTROM_SIZE_24XX;
2833 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2834 ha->isp_ops = &qla24xx_isp_ops;
2835 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2836 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2837 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2838 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2839 } else if (IS_QLA25XX(ha)) {
2840 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2841 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2842 req_length = REQUEST_ENTRY_CNT_24XX;
2843 rsp_length = RESPONSE_ENTRY_CNT_2300;
2844 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2845 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2846 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2847 ha->gid_list_info_size = 8;
2848 ha->optrom_size = OPTROM_SIZE_25XX;
2849 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2850 ha->isp_ops = &qla25xx_isp_ops;
2851 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2852 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2853 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2854 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2855 } else if (IS_QLA81XX(ha)) {
2856 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2857 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2858 req_length = REQUEST_ENTRY_CNT_24XX;
2859 rsp_length = RESPONSE_ENTRY_CNT_2300;
2860 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2861 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2862 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2863 ha->gid_list_info_size = 8;
2864 ha->optrom_size = OPTROM_SIZE_81XX;
2865 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2866 ha->isp_ops = &qla81xx_isp_ops;
2867 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2868 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2869 ha->nvram_conf_off = ~0;
2870 ha->nvram_data_off = ~0;
2871 } else if (IS_QLA82XX(ha)) {
2872 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2873 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2874 req_length = REQUEST_ENTRY_CNT_82XX;
2875 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2876 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2877 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2878 ha->gid_list_info_size = 8;
2879 ha->optrom_size = OPTROM_SIZE_82XX;
2880 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2881 ha->isp_ops = &qla82xx_isp_ops;
2882 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2883 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2884 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2885 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2886 } else if (IS_QLA8044(ha)) {
2887 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2888 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2889 req_length = REQUEST_ENTRY_CNT_82XX;
2890 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2891 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2892 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2893 ha->gid_list_info_size = 8;
2894 ha->optrom_size = OPTROM_SIZE_83XX;
2895 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2896 ha->isp_ops = &qla8044_isp_ops;
2897 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2898 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2899 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2900 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2901 } else if (IS_QLA83XX(ha)) {
2902 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2903 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2904 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2905 req_length = REQUEST_ENTRY_CNT_83XX;
2906 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2907 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2908 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2909 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2910 ha->gid_list_info_size = 8;
2911 ha->optrom_size = OPTROM_SIZE_83XX;
2912 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2913 ha->isp_ops = &qla83xx_isp_ops;
2914 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2915 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2916 ha->nvram_conf_off = ~0;
2917 ha->nvram_data_off = ~0;
2918 } else if (IS_QLAFX00(ha)) {
2919 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2920 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2921 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2922 req_length = REQUEST_ENTRY_CNT_FX00;
2923 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2924 ha->isp_ops = &qlafx00_isp_ops;
2925 ha->port_down_retry_count = 30; /* default value */
2926 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2927 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2928 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2929 ha->mr.fw_hbt_en = 1;
2930 ha->mr.host_info_resend = false;
2931 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2932 } else if (IS_QLA27XX(ha)) {
2933 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2934 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2935 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2936 req_length = REQUEST_ENTRY_CNT_83XX;
2937 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2938 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2939 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2940 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2941 ha->gid_list_info_size = 8;
2942 ha->optrom_size = OPTROM_SIZE_83XX;
2943 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2944 ha->isp_ops = &qla27xx_isp_ops;
2945 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2946 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2947 ha->nvram_conf_off = ~0;
2948 ha->nvram_data_off = ~0;
2951 ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2952 "mbx_count=%d, req_length=%d, "
2953 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2954 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2955 "max_fibre_devices=%d.\n",
2956 ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2957 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2958 ha->nvram_npiv_size, ha->max_fibre_devices);
2959 ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2960 "isp_ops=%p, flash_conf_off=%d, "
2961 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2962 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2963 ha->nvram_conf_off, ha->nvram_data_off);
2965 /* Configure PCI I/O space */
2966 ret = ha->isp_ops->iospace_config(ha);
2968 goto iospace_config_failed;
2970 ql_log_pci(ql_log_info, pdev, 0x001d,
2971 "Found an ISP%04X irq %d iobase 0x%p.\n",
2972 pdev->device, pdev->irq, ha->iobase);
2973 mutex_init(&ha->vport_lock);
2974 mutex_init(&ha->mq_lock);
2975 init_completion(&ha->mbx_cmd_comp);
2976 complete(&ha->mbx_cmd_comp);
2977 init_completion(&ha->mbx_intr_comp);
2978 init_completion(&ha->dcbx_comp);
2979 init_completion(&ha->lb_portup_comp);
2981 set_bit(0, (unsigned long *) ha->vp_idx_map);
2983 qla2x00_config_dma_addressing(ha);
2984 ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2985 "64 Bit addressing is %s.\n",
2986 ha->flags.enable_64bit_addressing ? "enable" :
2988 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2990 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2991 "Failed to allocate memory for adapter, aborting.\n");
2993 goto probe_hw_failed;
2996 req->max_q_depth = MAX_Q_DEPTH;
2997 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2998 req->max_q_depth = ql2xmaxqdepth;
3001 base_vha = qla2x00_create_host(sht, ha);
3004 qla2x00_mem_free(ha);
3005 qla2x00_free_req_que(ha, req);
3006 qla2x00_free_rsp_que(ha, rsp);
3007 goto probe_hw_failed;
3010 pci_set_drvdata(pdev, base_vha);
3011 set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3013 host = base_vha->host;
3014 base_vha->req = req;
3015 if (IS_QLA2XXX_MIDTYPE(ha))
3016 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
3018 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3021 /* Setup fcport template structure. */
3022 ha->mr.fcport.vha = base_vha;
3023 ha->mr.fcport.port_type = FCT_UNKNOWN;
3024 ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3025 qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3026 ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3027 ha->mr.fcport.scan_state = 1;
3029 /* Set the SG table size based on ISP type */
3030 if (!IS_FWI2_CAPABLE(ha)) {
3032 host->sg_tablesize = 32;
3034 if (!IS_QLA82XX(ha))
3035 host->sg_tablesize = QLA_SG_ALL;
3037 host->max_id = ha->max_fibre_devices;
3038 host->cmd_per_lun = 3;
3039 host->unique_id = host->host_no;
3040 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3041 host->max_cmd_len = 32;
3043 host->max_cmd_len = MAX_CMDSZ;
3044 host->max_channel = MAX_BUSES - 1;
3045 /* Older HBAs support only 16-bit LUNs */
3046 if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3047 ql2xmaxlun > 0xffff)
3048 host->max_lun = 0xffff;
3050 host->max_lun = ql2xmaxlun;
3051 host->transportt = qla2xxx_transport_template;
3052 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3054 ql_dbg(ql_dbg_init, base_vha, 0x0033,
3055 "max_id=%d this_id=%d "
3056 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3057 "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3058 host->this_id, host->cmd_per_lun, host->unique_id,
3059 host->max_cmd_len, host->max_channel, host->max_lun,
3060 host->transportt, sht->vendor_id);
3062 /* Set up the irqs */
3063 ret = qla2x00_request_irqs(ha, rsp);
3065 goto probe_init_failed;
3067 /* Alloc arrays of request and response ring ptrs */
3068 if (!qla2x00_alloc_queues(ha, req, rsp)) {
3069 ql_log(ql_log_fatal, base_vha, 0x003d,
3070 "Failed to allocate memory for queue pointers..."
3072 goto probe_init_failed;
3075 if (ha->mqenable && shost_use_blk_mq(host)) {
3076 /* number of hardware queues supported by blk/scsi-mq*/
3077 host->nr_hw_queues = ha->max_qpairs;
3079 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3080 "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3082 ql_dbg(ql_dbg_init, base_vha, 0x0193,
3083 "blk/scsi-mq disabled.\n");
3085 qlt_probe_one_stage1(base_vha, ha);
3087 pci_save_state(pdev);
3089 /* Assign back pointers */
3093 if (IS_QLAFX00(ha)) {
3094 ha->rsp_q_map[0] = rsp;
3095 ha->req_q_map[0] = req;
3096 set_bit(0, ha->req_qid_map);
3097 set_bit(0, ha->rsp_qid_map);
3100 /* FWI2-capable only. */
3101 req->req_q_in = &ha->iobase->isp24.req_q_in;
3102 req->req_q_out = &ha->iobase->isp24.req_q_out;
3103 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3104 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3105 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3106 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3107 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3108 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3109 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
3112 if (IS_QLAFX00(ha)) {
3113 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3114 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3115 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3116 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3119 if (IS_P3P_TYPE(ha)) {
3120 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3121 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3122 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3125 ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3126 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3127 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3128 ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3129 "req->req_q_in=%p req->req_q_out=%p "
3130 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3131 req->req_q_in, req->req_q_out,
3132 rsp->rsp_q_in, rsp->rsp_q_out);
3133 ql_dbg(ql_dbg_init, base_vha, 0x003e,
3134 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3135 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3136 ql_dbg(ql_dbg_init, base_vha, 0x003f,
3137 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3138 req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3140 if (ha->isp_ops->initialize_adapter(base_vha)) {
3141 ql_log(ql_log_fatal, base_vha, 0x00d6,
3142 "Failed to initialize adapter - Adapter flags %x.\n",
3143 base_vha->device_flags);
3145 if (IS_QLA82XX(ha)) {
3146 qla82xx_idc_lock(ha);
3147 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3148 QLA8XXX_DEV_FAILED);
3149 qla82xx_idc_unlock(ha);
3150 ql_log(ql_log_fatal, base_vha, 0x00d7,
3151 "HW State: FAILED.\n");
3152 } else if (IS_QLA8044(ha)) {
3153 qla8044_idc_lock(ha);
3154 qla8044_wr_direct(base_vha,
3155 QLA8044_CRB_DEV_STATE_INDEX,
3156 QLA8XXX_DEV_FAILED);
3157 qla8044_idc_unlock(ha);
3158 ql_log(ql_log_fatal, base_vha, 0x0150,
3159 "HW State: FAILED.\n");
3167 host->can_queue = QLAFX00_MAX_CANQUEUE;
3169 host->can_queue = req->num_outstanding_cmds - 10;
3171 ql_dbg(ql_dbg_init, base_vha, 0x0032,
3172 "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3173 host->can_queue, base_vha->req,
3174 base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3178 bool startit = false;
3179 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 0);
3181 if (QLA_TGT_MODE_ENABLED()) {
3186 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3187 shost_use_blk_mq(host)) {
3193 /* Create start of day qpairs for Block MQ */
3194 for (i = 0; i < ha->max_qpairs; i++)
3195 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3199 if (ha->flags.running_gold_fw)
3203 * Startup the kernel thread for this host adapter
3205 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3206 "%s_dpc", base_vha->host_str);
3207 if (IS_ERR(ha->dpc_thread)) {
3208 ql_log(ql_log_fatal, base_vha, 0x00ed,
3209 "Failed to start DPC thread.\n");
3210 ret = PTR_ERR(ha->dpc_thread);
3213 ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3214 "DPC thread started successfully.\n");
3217 * If we're not coming up in initiator mode, we might sit for
3218 * a while without waking up the dpc thread, which leads to a
3219 * stuck process warning. So just kick the dpc once here and
3220 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3222 qla2xxx_wake_dpc(base_vha);
3224 INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3225 INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3227 if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3228 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3229 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3230 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3232 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3233 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3234 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3235 INIT_WORK(&ha->idc_state_handler,
3236 qla83xx_idc_state_handler_work);
3237 INIT_WORK(&ha->nic_core_unrecoverable,
3238 qla83xx_nic_core_unrecoverable_work);
3242 list_add_tail(&base_vha->list, &ha->vp_list);
3243 base_vha->host->irq = ha->pdev->irq;
3245 /* Initialized the timer */
3246 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
3247 ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3248 "Started qla2x00_timer with "
3249 "interval=%d.\n", WATCH_INTERVAL);
3250 ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3251 "Detected hba at address=%p.\n",
3254 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3255 if (ha->fw_attributes & BIT_4) {
3256 int prot = 0, guard;
3257 base_vha->flags.difdix_supported = 1;
3258 ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3259 "Registering for DIF/DIX type 1 and 3 protection.\n");
3260 if (ql2xenabledif == 1)
3261 prot = SHOST_DIX_TYPE0_PROTECTION;
3262 scsi_host_set_prot(host,
3263 prot | SHOST_DIF_TYPE1_PROTECTION
3264 | SHOST_DIF_TYPE2_PROTECTION
3265 | SHOST_DIF_TYPE3_PROTECTION
3266 | SHOST_DIX_TYPE1_PROTECTION
3267 | SHOST_DIX_TYPE2_PROTECTION
3268 | SHOST_DIX_TYPE3_PROTECTION);
3270 guard = SHOST_DIX_GUARD_CRC;
3272 if (IS_PI_IPGUARD_CAPABLE(ha) &&
3273 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3274 guard |= SHOST_DIX_GUARD_IP;
3276 scsi_host_set_guard(host, guard);
3278 base_vha->flags.difdix_supported = 0;
3281 ha->isp_ops->enable_intrs(ha);
3283 if (IS_QLAFX00(ha)) {
3284 ret = qlafx00_fx_disc(base_vha,
3285 &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3286 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3290 ret = scsi_add_host(host, &pdev->dev);
3294 base_vha->flags.init_done = 1;
3295 base_vha->flags.online = 1;
3296 ha->prev_minidump_failed = 0;
3298 ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3299 "Init done and hba is online.\n");
3301 if (qla_ini_mode_enabled(base_vha) ||
3302 qla_dual_mode_enabled(base_vha))
3303 scsi_scan_host(host);
3305 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3306 "skipping scsi_scan_host() for non-initiator port\n");
3308 qla2x00_alloc_sysfs_attr(base_vha);
3310 if (IS_QLAFX00(ha)) {
3311 ret = qlafx00_fx_disc(base_vha,
3312 &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3314 /* Register system information */
3315 ret = qlafx00_fx_disc(base_vha,
3316 &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3319 qla2x00_init_host_attr(base_vha);
3321 qla2x00_dfs_setup(base_vha);
3323 ql_log(ql_log_info, base_vha, 0x00fb,
3324 "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3325 ql_log(ql_log_info, base_vha, 0x00fc,
3326 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3327 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3328 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3330 ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3332 qlt_add_target(ha, base_vha);
3334 clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3336 if (test_bit(UNLOADING, &base_vha->dpc_flags))
3339 if (ha->flags.detected_lr_sfp) {
3340 ql_log(ql_log_info, base_vha, 0xffff,
3341 "Reset chip to pick up LR SFP setting\n");
3342 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3343 qla2xxx_wake_dpc(base_vha);
3349 qla2x00_free_req_que(ha, req);
3350 ha->req_q_map[0] = NULL;
3351 clear_bit(0, ha->req_qid_map);
3352 qla2x00_free_rsp_que(ha, rsp);
3353 ha->rsp_q_map[0] = NULL;
3354 clear_bit(0, ha->rsp_qid_map);
3355 ha->max_req_queues = ha->max_rsp_queues = 0;
3358 if (base_vha->timer_active)
3359 qla2x00_stop_timer(base_vha);
3360 base_vha->flags.online = 0;
3361 if (ha->dpc_thread) {
3362 struct task_struct *t = ha->dpc_thread;
3364 ha->dpc_thread = NULL;
3368 qla2x00_free_device(base_vha);
3370 scsi_host_put(base_vha->host);
3373 qla2x00_clear_drv_active(ha);
3375 iospace_config_failed:
3376 if (IS_P3P_TYPE(ha)) {
3377 if (!ha->nx_pcibase)
3378 iounmap((device_reg_t *)ha->nx_pcibase);
3380 iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3383 iounmap(ha->iobase);
3385 iounmap(ha->cregbase);
3387 pci_release_selected_regions(ha->pdev, ha->bars);
3391 pci_disable_device(pdev);
3396 qla2x00_shutdown(struct pci_dev *pdev)
3398 scsi_qla_host_t *vha;
3399 struct qla_hw_data *ha;
3401 vha = pci_get_drvdata(pdev);
3404 ql_log(ql_log_info, vha, 0xfffa,
3405 "Adapter shutdown\n");
3408 * Prevent future board_disable and wait
3409 * until any pending board_disable has completed.
3411 set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3412 cancel_work_sync(&ha->board_disable);
3414 if (!atomic_read(&pdev->enable_cnt))
3417 /* Notify ISPFX00 firmware */
3419 qlafx00_driver_shutdown(vha, 20);
3421 /* Turn-off FCE trace */
3422 if (ha->flags.fce_enabled) {
3423 qla2x00_disable_fce_trace(vha, NULL, NULL);
3424 ha->flags.fce_enabled = 0;
3427 /* Turn-off EFT trace */
3429 qla2x00_disable_eft_trace(vha);
3431 /* Stop currently executing firmware. */
3432 qla2x00_try_to_stop_firmware(vha);
3434 /* Turn adapter off line */
3435 vha->flags.online = 0;
3437 /* turn-off interrupts on the card */
3438 if (ha->interrupts_on) {
3439 vha->flags.init_done = 0;
3440 ha->isp_ops->disable_intrs(ha);
3443 qla2x00_free_irqs(vha);
3445 qla2x00_free_fw_dump(ha);
3447 pci_disable_device(pdev);
3448 ql_log(ql_log_info, vha, 0xfffe,
3449 "Adapter shutdown successfully.\n");
3452 /* Deletes all the virtual ports for a given ha */
3454 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3456 scsi_qla_host_t *vha;
3457 unsigned long flags;
3459 mutex_lock(&ha->vport_lock);
3460 while (ha->cur_vport_count) {
3461 spin_lock_irqsave(&ha->vport_slock, flags);
3463 BUG_ON(base_vha->list.next == &ha->vp_list);
3464 /* This assumes first entry in ha->vp_list is always base vha */
3465 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3466 scsi_host_get(vha->host);
3468 spin_unlock_irqrestore(&ha->vport_slock, flags);
3469 mutex_unlock(&ha->vport_lock);
3471 fc_vport_terminate(vha->fc_vport);
3472 scsi_host_put(vha->host);
3474 mutex_lock(&ha->vport_lock);
3476 mutex_unlock(&ha->vport_lock);
3479 /* Stops all deferred work threads */
3481 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3483 /* Cancel all work and destroy DPC workqueues */
3484 if (ha->dpc_lp_wq) {
3485 cancel_work_sync(&ha->idc_aen);
3486 destroy_workqueue(ha->dpc_lp_wq);
3487 ha->dpc_lp_wq = NULL;
3490 if (ha->dpc_hp_wq) {
3491 cancel_work_sync(&ha->nic_core_reset);
3492 cancel_work_sync(&ha->idc_state_handler);
3493 cancel_work_sync(&ha->nic_core_unrecoverable);
3494 destroy_workqueue(ha->dpc_hp_wq);
3495 ha->dpc_hp_wq = NULL;
3498 /* Kill the kernel thread for this host */
3499 if (ha->dpc_thread) {
3500 struct task_struct *t = ha->dpc_thread;
3503 * qla2xxx_wake_dpc checks for ->dpc_thread
3504 * so we need to zero it out.
3506 ha->dpc_thread = NULL;
3512 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3514 if (IS_QLA82XX(ha)) {
3516 iounmap((device_reg_t *)ha->nx_pcibase);
3518 iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3521 iounmap(ha->iobase);
3524 iounmap(ha->cregbase);
3527 iounmap(ha->mqiobase);
3529 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3530 iounmap(ha->msixbase);
3535 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3537 if (IS_QLA8044(ha)) {
3538 qla8044_idc_lock(ha);
3539 qla8044_clear_drv_active(ha);
3540 qla8044_idc_unlock(ha);
3541 } else if (IS_QLA82XX(ha)) {
3542 qla82xx_idc_lock(ha);
3543 qla82xx_clear_drv_active(ha);
3544 qla82xx_idc_unlock(ha);
3549 qla2x00_remove_one(struct pci_dev *pdev)
3551 scsi_qla_host_t *base_vha;
3552 struct qla_hw_data *ha;
3554 base_vha = pci_get_drvdata(pdev);
3557 /* Indicate device removal to prevent future board_disable and wait
3558 * until any pending board_disable has completed. */
3559 set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3560 cancel_work_sync(&ha->board_disable);
3563 * If the PCI device is disabled then there was a PCI-disconnect and
3564 * qla2x00_disable_board_on_pci_error has taken care of most of the
3567 if (!atomic_read(&pdev->enable_cnt)) {
3568 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3569 base_vha->gnl.l, base_vha->gnl.ldma);
3571 scsi_host_put(base_vha->host);
3573 pci_set_drvdata(pdev, NULL);
3576 qla2x00_wait_for_hba_ready(base_vha);
3579 * if UNLOAD flag is already set, then continue unload,
3580 * where it was set first.
3582 if (test_bit(UNLOADING, &base_vha->dpc_flags))
3585 set_bit(UNLOADING, &base_vha->dpc_flags);
3587 qla_nvme_delete(base_vha);
3589 dma_free_coherent(&ha->pdev->dev,
3590 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3593 qlafx00_driver_shutdown(base_vha, 20);
3595 qla2x00_delete_all_vps(ha, base_vha);
3597 if (IS_QLA8031(ha)) {
3598 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3599 "Clearing fcoe driver presence.\n");
3600 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3601 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3602 "Error while clearing DRV-Presence.\n");
3605 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3607 qla2x00_dfs_remove(base_vha);
3609 qla84xx_put_chip(base_vha);
3611 /* Laser should be disabled only for ISP2031 */
3613 qla83xx_disable_laser(base_vha);
3616 if (base_vha->timer_active)
3617 qla2x00_stop_timer(base_vha);
3619 base_vha->flags.online = 0;
3621 /* free DMA memory */
3622 if (ha->exlogin_buf)
3623 qla2x00_free_exlogin_buffer(ha);
3625 /* free DMA memory */
3626 if (ha->exchoffld_buf)
3627 qla2x00_free_exchoffld_buffer(ha);
3629 qla2x00_destroy_deferred_work(ha);
3631 qlt_remove_target(ha, base_vha);
3633 qla2x00_free_sysfs_attr(base_vha, true);
3635 fc_remove_host(base_vha->host);
3636 qlt_remove_target_resources(ha);
3638 scsi_remove_host(base_vha->host);
3640 qla2x00_free_device(base_vha);
3642 qla2x00_clear_drv_active(ha);
3644 scsi_host_put(base_vha->host);
3646 qla2x00_unmap_iobases(ha);
3648 pci_release_selected_regions(ha->pdev, ha->bars);
3651 pci_disable_pcie_error_reporting(pdev);
3653 pci_disable_device(pdev);
3657 qla2x00_free_device(scsi_qla_host_t *vha)
3659 struct qla_hw_data *ha = vha->hw;
3661 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3664 if (vha->timer_active)
3665 qla2x00_stop_timer(vha);
3667 qla25xx_delete_queues(vha);
3669 if (ha->flags.fce_enabled)
3670 qla2x00_disable_fce_trace(vha, NULL, NULL);
3673 qla2x00_disable_eft_trace(vha);
3675 /* Stop currently executing firmware. */
3676 qla2x00_try_to_stop_firmware(vha);
3678 vha->flags.online = 0;
3680 /* turn-off interrupts on the card */
3681 if (ha->interrupts_on) {
3682 vha->flags.init_done = 0;
3683 ha->isp_ops->disable_intrs(ha);
3686 qla2x00_free_fcports(vha);
3688 qla2x00_free_irqs(vha);
3690 /* Flush the work queue and remove it */
3692 flush_workqueue(ha->wq);
3693 destroy_workqueue(ha->wq);
3698 qla2x00_mem_free(ha);
3700 qla82xx_md_free(vha);
3702 qla2x00_free_queues(ha);
3705 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3707 fc_port_t *fcport, *tfcport;
3709 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3710 list_del(&fcport->list);
3711 qla2x00_clear_loop_id(fcport);
3717 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3720 struct fc_rport *rport;
3721 scsi_qla_host_t *base_vha;
3722 unsigned long flags;
3727 rport = fcport->rport;
3729 base_vha = pci_get_drvdata(vha->hw->pdev);
3730 spin_lock_irqsave(vha->host->host_lock, flags);
3731 fcport->drport = rport;
3732 spin_unlock_irqrestore(vha->host->host_lock, flags);
3733 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3734 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3735 qla2xxx_wake_dpc(base_vha);
3739 ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3740 "%s %8phN. rport %p roles %x\n",
3741 __func__, fcport->port_name, rport,
3743 fc_remote_port_delete(rport);
3745 qlt_do_generation_tick(vha, &now);
3750 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3752 * Input: ha = adapter block pointer. fcport = port structure pointer.
3758 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3759 int do_login, int defer)
3761 if (IS_QLAFX00(vha->hw)) {
3762 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3763 qla2x00_schedule_rport_del(vha, fcport, defer);
3767 if (atomic_read(&fcport->state) == FCS_ONLINE &&
3768 vha->vp_idx == fcport->vha->vp_idx) {
3769 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3770 qla2x00_schedule_rport_del(vha, fcport, defer);
3773 * We may need to retry the login, so don't change the state of the
3774 * port but do the retries.
3776 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3777 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3782 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3784 if (fcport->login_retry == 0) {
3785 fcport->login_retry = vha->hw->login_retry_count;
3787 ql_dbg(ql_dbg_disc, vha, 0x20a3,
3788 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
3789 fcport->port_name, fcport->loop_id, fcport->login_retry);
3794 * qla2x00_mark_all_devices_lost
3795 * Updates fcport state when device goes offline.
3798 * ha = adapter block pointer.
3799 * fcport = port structure pointer.
3807 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3811 ql_dbg(ql_dbg_disc, vha, 0x20f1,
3812 "Mark all dev lost\n");
3814 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3815 fcport->scan_state = 0;
3816 qlt_schedule_sess_for_deletion_lock(fcport);
3818 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3822 * No point in marking the device as lost, if the device is
3825 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3827 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3828 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3830 qla2x00_schedule_rport_del(vha, fcport, defer);
3831 else if (vha->vp_idx == fcport->vha->vp_idx)
3832 qla2x00_schedule_rport_del(vha, fcport, defer);
3839 * Allocates adapter memory.
3846 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3847 struct req_que **req, struct rsp_que **rsp)
3851 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3852 &ha->init_cb_dma, GFP_KERNEL);
3856 if (qlt_mem_alloc(ha) < 0)
3857 goto fail_free_init_cb;
3859 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3860 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3862 goto fail_free_tgt_mem;
3864 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3865 if (!ha->srb_mempool)
3866 goto fail_free_gid_list;
3868 if (IS_P3P_TYPE(ha)) {
3869 /* Allocate cache for CT6 Ctx. */
3871 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3872 sizeof(struct ct6_dsd), 0,
3873 SLAB_HWCACHE_ALIGN, NULL);
3875 goto fail_free_srb_mempool;
3877 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3879 if (!ha->ctx_mempool)
3880 goto fail_free_srb_mempool;
3881 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3882 "ctx_cachep=%p ctx_mempool=%p.\n",
3883 ctx_cachep, ha->ctx_mempool);
3886 /* Get memory for cached NVRAM */
3887 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3889 goto fail_free_ctx_mempool;
3891 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3893 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3894 DMA_POOL_SIZE, 8, 0);
3895 if (!ha->s_dma_pool)
3896 goto fail_free_nvram;
3898 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3899 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3900 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3902 if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3903 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3904 DSD_LIST_DMA_POOL_SIZE, 8, 0);
3905 if (!ha->dl_dma_pool) {
3906 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3907 "Failed to allocate memory for dl_dma_pool.\n");
3908 goto fail_s_dma_pool;
3911 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3912 FCP_CMND_DMA_POOL_SIZE, 8, 0);
3913 if (!ha->fcp_cmnd_dma_pool) {
3914 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3915 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3916 goto fail_dl_dma_pool;
3918 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3919 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3920 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3923 /* Allocate memory for SNS commands */
3924 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3925 /* Get consistent memory allocated for SNS commands */
3926 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3927 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3930 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3931 "sns_cmd: %p.\n", ha->sns_cmd);
3933 /* Get consistent memory allocated for MS IOCB */
3934 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3938 /* Get consistent memory allocated for CT SNS commands */
3939 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3940 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3942 goto fail_free_ms_iocb;
3943 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3944 "ms_iocb=%p ct_sns=%p.\n",
3945 ha->ms_iocb, ha->ct_sns);
3948 /* Allocate memory for request ring */
3949 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3951 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3952 "Failed to allocate memory for req.\n");
3955 (*req)->length = req_len;
3956 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3957 ((*req)->length + 1) * sizeof(request_t),
3958 &(*req)->dma, GFP_KERNEL);
3959 if (!(*req)->ring) {
3960 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3961 "Failed to allocate memory for req_ring.\n");
3964 /* Allocate memory for response ring */
3965 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3967 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3968 "Failed to allocate memory for rsp.\n");
3972 (*rsp)->length = rsp_len;
3973 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3974 ((*rsp)->length + 1) * sizeof(response_t),
3975 &(*rsp)->dma, GFP_KERNEL);
3976 if (!(*rsp)->ring) {
3977 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3978 "Failed to allocate memory for rsp_ring.\n");
3983 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3984 "req=%p req->length=%d req->ring=%p rsp=%p "
3985 "rsp->length=%d rsp->ring=%p.\n",
3986 *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3988 /* Allocate memory for NVRAM data for vports */
3989 if (ha->nvram_npiv_size) {
3990 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3991 ha->nvram_npiv_size, GFP_KERNEL);
3992 if (!ha->npiv_info) {
3993 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3994 "Failed to allocate memory for npiv_info.\n");
3995 goto fail_npiv_info;
3998 ha->npiv_info = NULL;
4000 /* Get consistent memory allocated for EX-INIT-CB. */
4001 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
4002 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4003 &ha->ex_init_cb_dma);
4004 if (!ha->ex_init_cb)
4005 goto fail_ex_init_cb;
4006 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4007 "ex_init_cb=%p.\n", ha->ex_init_cb);
4010 INIT_LIST_HEAD(&ha->gbl_dsd_list);
4012 /* Get consistent memory allocated for Async Port-Database. */
4013 if (!IS_FWI2_CAPABLE(ha)) {
4014 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4018 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4019 "async_pd=%p.\n", ha->async_pd);
4022 INIT_LIST_HEAD(&ha->vp_list);
4024 /* Allocate memory for our loop_id bitmap */
4025 ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
4027 if (!ha->loop_id_map)
4028 goto fail_loop_id_map;
4030 qla2x00_set_reserved_loop_ids(ha);
4031 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4032 "loop_id_map=%p.\n", ha->loop_id_map);
4035 ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4036 SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4037 if (!ha->sfp_data) {
4038 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4039 "Unable to allocate memory for SFP read-data.\n");
4046 kfree(ha->loop_id_map);
4048 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4050 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4052 kfree(ha->npiv_info);
4054 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4055 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4056 (*rsp)->ring = NULL;
4061 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4062 sizeof(request_t), (*req)->ring, (*req)->dma);
4063 (*req)->ring = NULL;
4068 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4069 ha->ct_sns, ha->ct_sns_dma);
4073 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4075 ha->ms_iocb_dma = 0;
4078 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4079 ha->sns_cmd, ha->sns_cmd_dma);
4081 if (IS_QLA82XX(ha) || ql2xenabledif) {
4082 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4083 ha->fcp_cmnd_dma_pool = NULL;
4086 if (IS_QLA82XX(ha) || ql2xenabledif) {
4087 dma_pool_destroy(ha->dl_dma_pool);
4088 ha->dl_dma_pool = NULL;
4091 dma_pool_destroy(ha->s_dma_pool);
4092 ha->s_dma_pool = NULL;
4096 fail_free_ctx_mempool:
4097 if (ha->ctx_mempool)
4098 mempool_destroy(ha->ctx_mempool);
4099 ha->ctx_mempool = NULL;
4100 fail_free_srb_mempool:
4101 if (ha->srb_mempool)
4102 mempool_destroy(ha->srb_mempool);
4103 ha->srb_mempool = NULL;
4105 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4108 ha->gid_list = NULL;
4109 ha->gid_list_dma = 0;
4113 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4116 ha->init_cb_dma = 0;
4118 ql_log(ql_log_fatal, NULL, 0x0030,
4119 "Memory allocation failure.\n");
4124 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4127 uint16_t size, max_cnt, temp;
4128 struct qla_hw_data *ha = vha->hw;
4130 /* Return if we don't need to alloacate any extended logins */
4134 if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4137 ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4139 rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4140 if (rval != QLA_SUCCESS) {
4141 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4142 "Failed to get exlogin status.\n");
4146 temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4149 if (temp != ha->exlogin_size) {
4150 qla2x00_free_exlogin_buffer(ha);
4151 ha->exlogin_size = temp;
4153 ql_log(ql_log_info, vha, 0xd024,
4154 "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4155 max_cnt, size, temp);
4157 ql_log(ql_log_info, vha, 0xd025,
4158 "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4160 /* Get consistent memory for extended logins */
4161 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4162 ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4163 if (!ha->exlogin_buf) {
4164 ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4165 "Failed to allocate memory for exlogin_buf_dma.\n");
4170 /* Now configure the dma buffer */
4171 rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4173 ql_log(ql_log_fatal, vha, 0xd033,
4174 "Setup extended login buffer ****FAILED****.\n");
4175 qla2x00_free_exlogin_buffer(ha);
4182 * qla2x00_free_exlogin_buffer
4185 * ha = adapter block pointer
4188 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4190 if (ha->exlogin_buf) {
4191 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4192 ha->exlogin_buf, ha->exlogin_buf_dma);
4193 ha->exlogin_buf = NULL;
4194 ha->exlogin_size = 0;
4199 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4202 *ret_cnt = FW_DEF_EXCHANGES_CNT;
4204 if (qla_ini_mode_enabled(vha)) {
4205 if (ql2xiniexchg > max_cnt)
4206 ql2xiniexchg = max_cnt;
4208 if (ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4209 *ret_cnt = ql2xiniexchg;
4210 } else if (qla_tgt_mode_enabled(vha)) {
4211 if (ql2xexchoffld > max_cnt)
4212 ql2xexchoffld = max_cnt;
4214 if (ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4215 *ret_cnt = ql2xexchoffld;
4216 } else if (qla_dual_mode_enabled(vha)) {
4217 temp = ql2xiniexchg + ql2xexchoffld;
4218 if (temp > max_cnt) {
4219 ql2xiniexchg -= (temp - max_cnt)/2;
4220 ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4224 if (temp > FW_DEF_EXCHANGES_CNT)
4230 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4235 struct qla_hw_data *ha = vha->hw;
4237 if (!ha->flags.exchoffld_enabled)
4240 if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4244 rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4245 if (rval != QLA_SUCCESS) {
4246 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4247 "Failed to get exlogin status.\n");
4251 qla2x00_number_of_exch(vha, &temp, max_cnt);
4254 if (temp != ha->exchoffld_size) {
4255 qla2x00_free_exchoffld_buffer(ha);
4256 ha->exchoffld_size = temp;
4258 ql_log(ql_log_info, vha, 0xd016,
4259 "Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
4260 max_cnt, size, temp);
4262 ql_log(ql_log_info, vha, 0xd017,
4263 "Exchange Buffers requested size = 0x%x\n",
4264 ha->exchoffld_size);
4266 /* Get consistent memory for extended logins */
4267 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4268 ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4269 if (!ha->exchoffld_buf) {
4270 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4271 "Failed to allocate memory for exchoffld_buf_dma.\n");
4276 /* Now configure the dma buffer */
4277 rval = qla_set_exchoffld_mem_cfg(vha);
4279 ql_log(ql_log_fatal, vha, 0xd02e,
4280 "Setup exchange offload buffer ****FAILED****.\n");
4281 qla2x00_free_exchoffld_buffer(ha);
4283 /* re-adjust number of target exchange */
4284 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4286 if (qla_ini_mode_enabled(vha))
4287 icb->exchange_count = 0;
4289 icb->exchange_count = cpu_to_le16(ql2xexchoffld);
4296 * qla2x00_free_exchoffld_buffer
4299 * ha = adapter block pointer
4302 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4304 if (ha->exchoffld_buf) {
4305 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4306 ha->exchoffld_buf, ha->exchoffld_buf_dma);
4307 ha->exchoffld_buf = NULL;
4308 ha->exchoffld_size = 0;
4313 * qla2x00_free_fw_dump
4314 * Frees fw dump stuff.
4317 * ha = adapter block pointer
4320 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4323 dma_free_coherent(&ha->pdev->dev,
4324 FCE_SIZE, ha->fce, ha->fce_dma);
4327 dma_free_coherent(&ha->pdev->dev,
4328 EFT_SIZE, ha->eft, ha->eft_dma);
4332 if (ha->fw_dump_template)
4333 vfree(ha->fw_dump_template);
4340 ha->fw_dump_cap_flags = 0;
4341 ha->fw_dump_reading = 0;
4343 ha->fw_dump_len = 0;
4344 ha->fw_dump_template = NULL;
4345 ha->fw_dump_template_len = 0;
4350 * Frees all adapter allocated memory.
4353 * ha = adapter block pointer.
4356 qla2x00_mem_free(struct qla_hw_data *ha)
4358 qla2x00_free_fw_dump(ha);
4361 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4364 if (ha->srb_mempool)
4365 mempool_destroy(ha->srb_mempool);
4368 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4369 ha->dcbx_tlv, ha->dcbx_tlv_dma);
4372 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4373 ha->xgmac_data, ha->xgmac_data_dma);
4376 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4377 ha->sns_cmd, ha->sns_cmd_dma);
4380 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4381 ha->ct_sns, ha->ct_sns_dma);
4384 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4388 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4391 dma_pool_free(ha->s_dma_pool,
4392 ha->ex_init_cb, ha->ex_init_cb_dma);
4395 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4398 dma_pool_destroy(ha->s_dma_pool);
4401 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4402 ha->gid_list, ha->gid_list_dma);
4404 if (IS_QLA82XX(ha)) {
4405 if (!list_empty(&ha->gbl_dsd_list)) {
4406 struct dsd_dma *dsd_ptr, *tdsd_ptr;
4408 /* clean up allocated prev pool */
4409 list_for_each_entry_safe(dsd_ptr,
4410 tdsd_ptr, &ha->gbl_dsd_list, list) {
4411 dma_pool_free(ha->dl_dma_pool,
4412 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4413 list_del(&dsd_ptr->list);
4419 if (ha->dl_dma_pool)
4420 dma_pool_destroy(ha->dl_dma_pool);
4422 if (ha->fcp_cmnd_dma_pool)
4423 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4425 if (ha->ctx_mempool)
4426 mempool_destroy(ha->ctx_mempool);
4431 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4432 ha->init_cb, ha->init_cb_dma);
4433 vfree(ha->optrom_buffer);
4435 kfree(ha->npiv_info);
4437 kfree(ha->loop_id_map);
4439 ha->srb_mempool = NULL;
4440 ha->ctx_mempool = NULL;
4442 ha->sns_cmd_dma = 0;
4446 ha->ms_iocb_dma = 0;
4448 ha->init_cb_dma = 0;
4449 ha->ex_init_cb = NULL;
4450 ha->ex_init_cb_dma = 0;
4451 ha->async_pd = NULL;
4452 ha->async_pd_dma = 0;
4454 ha->s_dma_pool = NULL;
4455 ha->dl_dma_pool = NULL;
4456 ha->fcp_cmnd_dma_pool = NULL;
4458 ha->gid_list = NULL;
4459 ha->gid_list_dma = 0;
4461 ha->tgt.atio_ring = NULL;
4462 ha->tgt.atio_dma = 0;
4463 ha->tgt.tgt_vp_map = NULL;
4466 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4467 struct qla_hw_data *ha)
4469 struct Scsi_Host *host;
4470 struct scsi_qla_host *vha = NULL;
4472 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4474 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4475 "Failed to allocate host from the scsi layer, aborting.\n");
4479 /* Clear our data area */
4480 vha = shost_priv(host);
4481 memset(vha, 0, sizeof(scsi_qla_host_t));
4484 vha->host_no = host->host_no;
4487 INIT_LIST_HEAD(&vha->vp_fcports);
4488 INIT_LIST_HEAD(&vha->work_list);
4489 INIT_LIST_HEAD(&vha->list);
4490 INIT_LIST_HEAD(&vha->qla_cmd_list);
4491 INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4492 INIT_LIST_HEAD(&vha->logo_list);
4493 INIT_LIST_HEAD(&vha->plogi_ack_list);
4494 INIT_LIST_HEAD(&vha->qp_list);
4495 INIT_LIST_HEAD(&vha->gnl.fcports);
4496 INIT_LIST_HEAD(&vha->nvme_rport_list);
4498 spin_lock_init(&vha->work_lock);
4499 spin_lock_init(&vha->cmd_list_lock);
4500 init_waitqueue_head(&vha->fcport_waitQ);
4501 init_waitqueue_head(&vha->vref_waitq);
4503 vha->gnl.size = sizeof(struct get_name_list_extended) *
4504 (ha->max_loop_id + 1);
4505 vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4506 vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4508 ql_log(ql_log_fatal, vha, 0xd04a,
4509 "Alloc failed for name list.\n");
4510 scsi_remove_host(vha->host);
4514 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4515 ql_dbg(ql_dbg_init, vha, 0x0041,
4516 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4517 vha->host, vha->hw, vha,
4518 dev_name(&(ha->pdev->dev)));
4523 struct qla_work_evt *
4524 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4526 struct qla_work_evt *e;
4529 QLA_VHA_MARK_BUSY(vha, bail);
4533 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4535 QLA_VHA_MARK_NOT_BUSY(vha);
4539 INIT_LIST_HEAD(&e->list);
4541 e->flags = QLA_EVT_FLAG_FREE;
4546 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4548 unsigned long flags;
4550 spin_lock_irqsave(&vha->work_lock, flags);
4551 list_add_tail(&e->list, &vha->work_list);
4552 spin_unlock_irqrestore(&vha->work_lock, flags);
4554 if (QLA_EARLY_LINKUP(vha->hw))
4555 schedule_work(&vha->iocb_work);
4557 qla2xxx_wake_dpc(vha);
4563 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4566 struct qla_work_evt *e;
4568 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4570 return QLA_FUNCTION_FAILED;
4572 e->u.aen.code = code;
4573 e->u.aen.data = data;
4574 return qla2x00_post_work(vha, e);
4578 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4580 struct qla_work_evt *e;
4582 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4584 return QLA_FUNCTION_FAILED;
4586 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4587 return qla2x00_post_work(vha, e);
4590 #define qla2x00_post_async_work(name, type) \
4591 int qla2x00_post_async_##name##_work( \
4592 struct scsi_qla_host *vha, \
4593 fc_port_t *fcport, uint16_t *data) \
4595 struct qla_work_evt *e; \
4597 e = qla2x00_alloc_work(vha, type); \
4599 return QLA_FUNCTION_FAILED; \
4601 e->u.logio.fcport = fcport; \
4603 e->u.logio.data[0] = data[0]; \
4604 e->u.logio.data[1] = data[1]; \
4606 return qla2x00_post_work(vha, e); \
4609 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4610 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4611 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4612 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4613 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4616 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4618 struct qla_work_evt *e;
4620 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4622 return QLA_FUNCTION_FAILED;
4624 e->u.uevent.code = code;
4625 return qla2x00_post_work(vha, e);
4629 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4631 char event_string[40];
4632 char *envp[] = { event_string, NULL };
4635 case QLA_UEVENT_CODE_FW_DUMP:
4636 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4643 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4647 qlafx00_post_aenfx_work(struct scsi_qla_host *vha, uint32_t evtcode,
4648 uint32_t *data, int cnt)
4650 struct qla_work_evt *e;
4652 e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4654 return QLA_FUNCTION_FAILED;
4656 e->u.aenfx.evtcode = evtcode;
4657 e->u.aenfx.count = cnt;
4658 memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4659 return qla2x00_post_work(vha, e);
4662 int qla24xx_post_upd_fcport_work(struct scsi_qla_host *vha, fc_port_t *fcport)
4664 struct qla_work_evt *e;
4666 e = qla2x00_alloc_work(vha, QLA_EVT_UPD_FCPORT);
4668 return QLA_FUNCTION_FAILED;
4670 e->u.fcport.fcport = fcport;
4671 return qla2x00_post_work(vha, e);
4675 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4677 unsigned long flags;
4678 fc_port_t *fcport = NULL;
4679 struct qlt_plogi_ack_t *pla =
4680 (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4682 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4683 fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4685 fcport->d_id = e->u.new_sess.id;
4687 fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4688 qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4689 /* we took an extra ref_count to prevent PLOGI ACK when
4690 * fcport/sess has not been created.
4695 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4697 fcport->d_id = e->u.new_sess.id;
4698 fcport->scan_state = QLA_FCPORT_FOUND;
4699 fcport->flags |= FCF_FABRIC_DEVICE;
4700 fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4702 memcpy(fcport->port_name, e->u.new_sess.port_name,
4704 list_add_tail(&fcport->list, &vha->vp_fcports);
4707 qlt_plogi_ack_link(vha, pla, fcport,
4708 QLT_PLOGI_LINK_SAME_WWN);
4713 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4717 qlt_plogi_ack_unref(vha, pla);
4719 qla24xx_async_gnl(vha, fcport);
4724 qla2x00_do_work(struct scsi_qla_host *vha)
4726 struct qla_work_evt *e, *tmp;
4727 unsigned long flags;
4730 spin_lock_irqsave(&vha->work_lock, flags);
4731 list_splice_init(&vha->work_list, &work);
4732 spin_unlock_irqrestore(&vha->work_lock, flags);
4734 list_for_each_entry_safe(e, tmp, &work, list) {
4735 list_del_init(&e->list);
4739 fc_host_post_event(vha->host, fc_get_event_number(),
4740 e->u.aen.code, e->u.aen.data);
4742 case QLA_EVT_IDC_ACK:
4743 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4745 case QLA_EVT_ASYNC_LOGIN:
4746 qla2x00_async_login(vha, e->u.logio.fcport,
4749 case QLA_EVT_ASYNC_LOGOUT:
4750 qla2x00_async_logout(vha, e->u.logio.fcport);
4752 case QLA_EVT_ASYNC_LOGOUT_DONE:
4753 qla2x00_async_logout_done(vha, e->u.logio.fcport,
4756 case QLA_EVT_ASYNC_ADISC:
4757 qla2x00_async_adisc(vha, e->u.logio.fcport,
4760 case QLA_EVT_ASYNC_ADISC_DONE:
4761 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4764 case QLA_EVT_UEVENT:
4765 qla2x00_uevent_emit(vha, e->u.uevent.code);
4768 qlafx00_process_aen(vha, e);
4771 qla24xx_async_gidpn(vha, e->u.fcport.fcport);
4774 qla24xx_async_gpnid(vha, &e->u.gpnid.id);
4776 case QLA_EVT_GPNID_DONE:
4777 qla24xx_async_gpnid_done(vha, e->u.iosb.sp);
4779 case QLA_EVT_NEW_SESS:
4780 qla24xx_create_new_sess(vha, e);
4783 qla24xx_async_gpdb(vha, e->u.fcport.fcport,
4787 qla24xx_async_prli(vha, e->u.fcport.fcport);
4790 qla24xx_async_gpsc(vha, e->u.fcport.fcport);
4792 case QLA_EVT_UPD_FCPORT:
4793 qla2x00_update_fcport(vha, e->u.fcport.fcport);
4796 qla24xx_async_gnl(vha, e->u.fcport.fcport);
4799 qla24xx_do_nack_work(vha, e);
4802 if (e->flags & QLA_EVT_FLAG_FREE)
4805 /* For each work completed decrement vha ref count */
4806 QLA_VHA_MARK_NOT_BUSY(vha);
4810 /* Relogins all the fcports of a vport
4811 * Context: dpc thread
4813 void qla2x00_relogin(struct scsi_qla_host *vha)
4817 struct event_arg ea;
4819 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4821 * If the port is not ONLINE then try to login
4822 * to it if we haven't run out of retries.
4824 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4825 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4826 fcport->login_retry--;
4827 if (fcport->flags & FCF_FABRIC_DEVICE) {
4828 ql_dbg(ql_dbg_disc, fcport->vha, 0x2108,
4829 "%s %8phC DS %d LS %d\n", __func__,
4830 fcport->port_name, fcport->disc_state,
4831 fcport->fw_login_state);
4832 memset(&ea, 0, sizeof(ea));
4833 ea.event = FCME_RELOGIN;
4835 qla2x00_fcport_event_handler(vha, &ea);
4837 status = qla2x00_local_device_login(vha,
4839 if (status == QLA_SUCCESS) {
4840 fcport->old_loop_id = fcport->loop_id;
4841 ql_dbg(ql_dbg_disc, vha, 0x2003,
4842 "Port login OK: logged in ID 0x%x.\n",
4844 qla2x00_update_fcport(vha, fcport);
4845 } else if (status == 1) {
4846 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4847 /* retry the login again */
4848 ql_dbg(ql_dbg_disc, vha, 0x2007,
4849 "Retrying %d login again loop_id 0x%x.\n",
4850 fcport->login_retry,
4853 fcport->login_retry = 0;
4856 if (fcport->login_retry == 0 &&
4857 status != QLA_SUCCESS)
4858 qla2x00_clear_loop_id(fcport);
4861 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4866 /* Schedule work on any of the dpc-workqueues */
4868 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4870 struct qla_hw_data *ha = base_vha->hw;
4872 switch (work_code) {
4873 case MBA_IDC_AEN: /* 0x8200 */
4875 queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4878 case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4879 if (!ha->flags.nic_core_reset_hdlr_active) {
4881 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4883 ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4884 "NIC Core reset is already active. Skip "
4885 "scheduling it again.\n");
4887 case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4889 queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4891 case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4893 queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4896 ql_log(ql_log_warn, base_vha, 0xb05f,
4897 "Unknown work-code=0x%x.\n", work_code);
4903 /* Work: Perform NIC Core Unrecoverable state handling */
4905 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4907 struct qla_hw_data *ha =
4908 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4909 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4910 uint32_t dev_state = 0;
4912 qla83xx_idc_lock(base_vha, 0);
4913 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4914 qla83xx_reset_ownership(base_vha);
4915 if (ha->flags.nic_core_reset_owner) {
4916 ha->flags.nic_core_reset_owner = 0;
4917 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4918 QLA8XXX_DEV_FAILED);
4919 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4920 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4922 qla83xx_idc_unlock(base_vha, 0);
4925 /* Work: Execute IDC state handler */
4927 qla83xx_idc_state_handler_work(struct work_struct *work)
4929 struct qla_hw_data *ha =
4930 container_of(work, struct qla_hw_data, idc_state_handler);
4931 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4932 uint32_t dev_state = 0;
4934 qla83xx_idc_lock(base_vha, 0);
4935 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4936 if (dev_state == QLA8XXX_DEV_FAILED ||
4937 dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4938 qla83xx_idc_state_handler(base_vha);
4939 qla83xx_idc_unlock(base_vha, 0);
4943 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4945 int rval = QLA_SUCCESS;
4946 unsigned long heart_beat_wait = jiffies + (1 * HZ);
4947 uint32_t heart_beat_counter1, heart_beat_counter2;
4950 if (time_after(jiffies, heart_beat_wait)) {
4951 ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4952 "Nic Core f/w is not alive.\n");
4953 rval = QLA_FUNCTION_FAILED;
4957 qla83xx_idc_lock(base_vha, 0);
4958 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4959 &heart_beat_counter1);
4960 qla83xx_idc_unlock(base_vha, 0);
4962 qla83xx_idc_lock(base_vha, 0);
4963 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4964 &heart_beat_counter2);
4965 qla83xx_idc_unlock(base_vha, 0);
4966 } while (heart_beat_counter1 == heart_beat_counter2);
4971 /* Work: Perform NIC Core Reset handling */
4973 qla83xx_nic_core_reset_work(struct work_struct *work)
4975 struct qla_hw_data *ha =
4976 container_of(work, struct qla_hw_data, nic_core_reset);
4977 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4978 uint32_t dev_state = 0;
4980 if (IS_QLA2031(ha)) {
4981 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4982 ql_log(ql_log_warn, base_vha, 0xb081,
4983 "Failed to dump mctp\n");
4987 if (!ha->flags.nic_core_reset_hdlr_active) {
4988 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4989 qla83xx_idc_lock(base_vha, 0);
4990 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4992 qla83xx_idc_unlock(base_vha, 0);
4993 if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4994 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4995 "Nic Core f/w is alive.\n");
5000 ha->flags.nic_core_reset_hdlr_active = 1;
5001 if (qla83xx_nic_core_reset(base_vha)) {
5002 /* NIC Core reset failed. */
5003 ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5004 "NIC Core reset failed.\n");
5006 ha->flags.nic_core_reset_hdlr_active = 0;
5010 /* Work: Handle 8200 IDC aens */
5012 qla83xx_service_idc_aen(struct work_struct *work)
5014 struct qla_hw_data *ha =
5015 container_of(work, struct qla_hw_data, idc_aen);
5016 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5017 uint32_t dev_state, idc_control;
5019 qla83xx_idc_lock(base_vha, 0);
5020 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5021 qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5022 qla83xx_idc_unlock(base_vha, 0);
5023 if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5024 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5025 ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5026 "Application requested NIC Core Reset.\n");
5027 qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5028 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5030 ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5031 "Other protocol driver requested NIC Core Reset.\n");
5032 qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5034 } else if (dev_state == QLA8XXX_DEV_FAILED ||
5035 dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5036 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5041 qla83xx_wait_logic(void)
5046 if (!in_interrupt()) {
5048 * Wait about 200ms before retrying again.
5049 * This controls the number of retries for single
5055 for (i = 0; i < 20; i++)
5056 cpu_relax(); /* This a nop instr on i386 */
5061 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5065 uint32_t idc_lck_rcvry_stage_mask = 0x3;
5066 uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5067 struct qla_hw_data *ha = base_vha->hw;
5068 ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5069 "Trying force recovery of the IDC lock.\n");
5071 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5075 if ((data & idc_lck_rcvry_stage_mask) > 0) {
5078 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5079 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5086 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5091 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5092 data &= (IDC_LOCK_RECOVERY_STAGE2 |
5093 ~(idc_lck_rcvry_stage_mask));
5094 rval = qla83xx_wr_reg(base_vha,
5095 QLA83XX_IDC_LOCK_RECOVERY, data);
5099 /* Forcefully perform IDC UnLock */
5100 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5104 /* Clear lock-id by setting 0xff */
5105 rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5109 /* Clear lock-recovery by setting 0x0 */
5110 rval = qla83xx_wr_reg(base_vha,
5111 QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5122 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5124 int rval = QLA_SUCCESS;
5125 uint32_t o_drv_lockid, n_drv_lockid;
5126 unsigned long lock_recovery_timeout;
5128 lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5130 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5134 /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5135 if (time_after_eq(jiffies, lock_recovery_timeout)) {
5136 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5139 return QLA_FUNCTION_FAILED;
5142 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5146 if (o_drv_lockid == n_drv_lockid) {
5147 qla83xx_wait_logic();
5157 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5159 uint16_t options = (requester_id << 15) | BIT_6;
5161 uint32_t lock_owner;
5162 struct qla_hw_data *ha = base_vha->hw;
5164 /* IDC-lock implementation using driver-lock/lock-id remote registers */
5166 if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5169 /* Setting lock-id to our function-number */
5170 qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5173 qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5175 ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5176 "Failed to acquire IDC lock, acquired by %d, "
5177 "retrying...\n", lock_owner);
5179 /* Retry/Perform IDC-Lock recovery */
5180 if (qla83xx_idc_lock_recovery(base_vha)
5182 qla83xx_wait_logic();
5185 ql_log(ql_log_warn, base_vha, 0xb075,
5186 "IDC Lock recovery FAILED.\n");
5193 /* XXX: IDC-lock implementation using access-control mbx */
5195 if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5196 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5197 "Failed to acquire IDC lock. retrying...\n");
5198 /* Retry/Perform IDC-Lock recovery */
5199 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5200 qla83xx_wait_logic();
5203 ql_log(ql_log_warn, base_vha, 0xb076,
5204 "IDC Lock recovery FAILED.\n");
5211 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5214 uint16_t options = (requester_id << 15) | BIT_7;
5218 struct qla_hw_data *ha = base_vha->hw;
5220 /* IDC-unlock implementation using driver-unlock/lock-id
5225 if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5227 if (data == ha->portnum) {
5228 qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5229 /* Clearing lock-id by setting 0xff */
5230 qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5231 } else if (retry < 10) {
5232 /* SV: XXX: IDC unlock retrying needed here? */
5234 /* Retry for IDC-unlock */
5235 qla83xx_wait_logic();
5237 ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5238 "Failed to release IDC lock, retrying=%d\n", retry);
5241 } else if (retry < 10) {
5242 /* Retry for IDC-unlock */
5243 qla83xx_wait_logic();
5245 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5246 "Failed to read drv-lockid, retrying=%d\n", retry);
5253 /* XXX: IDC-unlock implementation using access-control mbx */
5256 if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5258 /* Retry for IDC-unlock */
5259 qla83xx_wait_logic();
5261 ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5262 "Failed to release IDC lock, retrying=%d\n", retry);
5272 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5274 int rval = QLA_SUCCESS;
5275 struct qla_hw_data *ha = vha->hw;
5276 uint32_t drv_presence;
5278 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5279 if (rval == QLA_SUCCESS) {
5280 drv_presence |= (1 << ha->portnum);
5281 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5289 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5291 int rval = QLA_SUCCESS;
5293 qla83xx_idc_lock(vha, 0);
5294 rval = __qla83xx_set_drv_presence(vha);
5295 qla83xx_idc_unlock(vha, 0);
5301 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5303 int rval = QLA_SUCCESS;
5304 struct qla_hw_data *ha = vha->hw;
5305 uint32_t drv_presence;
5307 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5308 if (rval == QLA_SUCCESS) {
5309 drv_presence &= ~(1 << ha->portnum);
5310 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5318 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5320 int rval = QLA_SUCCESS;
5322 qla83xx_idc_lock(vha, 0);
5323 rval = __qla83xx_clear_drv_presence(vha);
5324 qla83xx_idc_unlock(vha, 0);
5330 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5332 struct qla_hw_data *ha = vha->hw;
5333 uint32_t drv_ack, drv_presence;
5334 unsigned long ack_timeout;
5336 /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5337 ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5339 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5340 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5341 if ((drv_ack & drv_presence) == drv_presence)
5344 if (time_after_eq(jiffies, ack_timeout)) {
5345 ql_log(ql_log_warn, vha, 0xb067,
5346 "RESET ACK TIMEOUT! drv_presence=0x%x "
5347 "drv_ack=0x%x\n", drv_presence, drv_ack);
5349 * The function(s) which did not ack in time are forced
5350 * to withdraw any further participation in the IDC
5353 if (drv_ack != drv_presence)
5354 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5359 qla83xx_idc_unlock(vha, 0);
5361 qla83xx_idc_lock(vha, 0);
5364 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5365 ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5369 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5371 int rval = QLA_SUCCESS;
5372 uint32_t idc_control;
5374 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5375 ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5377 /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5378 __qla83xx_get_idc_control(vha, &idc_control);
5379 idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5380 __qla83xx_set_idc_control(vha, 0);
5382 qla83xx_idc_unlock(vha, 0);
5383 rval = qla83xx_restart_nic_firmware(vha);
5384 qla83xx_idc_lock(vha, 0);
5386 if (rval != QLA_SUCCESS) {
5387 ql_log(ql_log_fatal, vha, 0xb06a,
5388 "Failed to restart NIC f/w.\n");
5389 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5390 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5392 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5393 "Success in restarting nic f/w.\n");
5394 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5395 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5401 /* Assumes idc_lock always held on entry */
5403 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5405 struct qla_hw_data *ha = base_vha->hw;
5406 int rval = QLA_SUCCESS;
5407 unsigned long dev_init_timeout;
5410 /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5411 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5415 if (time_after_eq(jiffies, dev_init_timeout)) {
5416 ql_log(ql_log_warn, base_vha, 0xb06e,
5417 "Initialization TIMEOUT!\n");
5418 /* Init timeout. Disable further NIC Core
5421 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5422 QLA8XXX_DEV_FAILED);
5423 ql_log(ql_log_info, base_vha, 0xb06f,
5424 "HW State: FAILED.\n");
5427 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5428 switch (dev_state) {
5429 case QLA8XXX_DEV_READY:
5430 if (ha->flags.nic_core_reset_owner)
5431 qla83xx_idc_audit(base_vha,
5432 IDC_AUDIT_COMPLETION);
5433 ha->flags.nic_core_reset_owner = 0;
5434 ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5435 "Reset_owner reset by 0x%x.\n",
5438 case QLA8XXX_DEV_COLD:
5439 if (ha->flags.nic_core_reset_owner)
5440 rval = qla83xx_device_bootstrap(base_vha);
5442 /* Wait for AEN to change device-state */
5443 qla83xx_idc_unlock(base_vha, 0);
5445 qla83xx_idc_lock(base_vha, 0);
5448 case QLA8XXX_DEV_INITIALIZING:
5449 /* Wait for AEN to change device-state */
5450 qla83xx_idc_unlock(base_vha, 0);
5452 qla83xx_idc_lock(base_vha, 0);
5454 case QLA8XXX_DEV_NEED_RESET:
5455 if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5456 qla83xx_need_reset_handler(base_vha);
5458 /* Wait for AEN to change device-state */
5459 qla83xx_idc_unlock(base_vha, 0);
5461 qla83xx_idc_lock(base_vha, 0);
5463 /* reset timeout value after need reset handler */
5464 dev_init_timeout = jiffies +
5465 (ha->fcoe_dev_init_timeout * HZ);
5467 case QLA8XXX_DEV_NEED_QUIESCENT:
5468 /* XXX: DEBUG for now */
5469 qla83xx_idc_unlock(base_vha, 0);
5471 qla83xx_idc_lock(base_vha, 0);
5473 case QLA8XXX_DEV_QUIESCENT:
5474 /* XXX: DEBUG for now */
5475 if (ha->flags.quiesce_owner)
5478 qla83xx_idc_unlock(base_vha, 0);
5480 qla83xx_idc_lock(base_vha, 0);
5481 dev_init_timeout = jiffies +
5482 (ha->fcoe_dev_init_timeout * HZ);
5484 case QLA8XXX_DEV_FAILED:
5485 if (ha->flags.nic_core_reset_owner)
5486 qla83xx_idc_audit(base_vha,
5487 IDC_AUDIT_COMPLETION);
5488 ha->flags.nic_core_reset_owner = 0;
5489 __qla83xx_clear_drv_presence(base_vha);
5490 qla83xx_idc_unlock(base_vha, 0);
5491 qla8xxx_dev_failed_handler(base_vha);
5492 rval = QLA_FUNCTION_FAILED;
5493 qla83xx_idc_lock(base_vha, 0);
5495 case QLA8XXX_BAD_VALUE:
5496 qla83xx_idc_unlock(base_vha, 0);
5498 qla83xx_idc_lock(base_vha, 0);
5501 ql_log(ql_log_warn, base_vha, 0xb071,
5502 "Unknown Device State: %x.\n", dev_state);
5503 qla83xx_idc_unlock(base_vha, 0);
5504 qla8xxx_dev_failed_handler(base_vha);
5505 rval = QLA_FUNCTION_FAILED;
5506 qla83xx_idc_lock(base_vha, 0);
5516 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5518 struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5520 struct pci_dev *pdev = ha->pdev;
5521 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5524 * if UNLOAD flag is already set, then continue unload,
5525 * where it was set first.
5527 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5530 ql_log(ql_log_warn, base_vha, 0x015b,
5531 "Disabling adapter.\n");
5533 if (!atomic_read(&pdev->enable_cnt)) {
5534 ql_log(ql_log_info, base_vha, 0xfffc,
5535 "PCI device disabled, no action req for PCI error=%lx\n",
5536 base_vha->pci_flags);
5540 qla2x00_wait_for_sess_deletion(base_vha);
5542 set_bit(UNLOADING, &base_vha->dpc_flags);
5544 qla2x00_delete_all_vps(ha, base_vha);
5546 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5548 qla2x00_dfs_remove(base_vha);
5550 qla84xx_put_chip(base_vha);
5552 if (base_vha->timer_active)
5553 qla2x00_stop_timer(base_vha);
5555 base_vha->flags.online = 0;
5557 qla2x00_destroy_deferred_work(ha);
5560 * Do not try to stop beacon blink as it will issue a mailbox
5563 qla2x00_free_sysfs_attr(base_vha, false);
5565 fc_remove_host(base_vha->host);
5567 scsi_remove_host(base_vha->host);
5569 base_vha->flags.init_done = 0;
5570 qla25xx_delete_queues(base_vha);
5571 qla2x00_free_fcports(base_vha);
5572 qla2x00_free_irqs(base_vha);
5573 qla2x00_mem_free(ha);
5574 qla82xx_md_free(base_vha);
5575 qla2x00_free_queues(ha);
5577 qla2x00_unmap_iobases(ha);
5579 pci_release_selected_regions(ha->pdev, ha->bars);
5580 pci_disable_pcie_error_reporting(pdev);
5581 pci_disable_device(pdev);
5584 * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5588 /**************************************************************************
5590 * This kernel thread is a task that is schedule by the interrupt handler
5591 * to perform the background processing for interrupts.
5594 * This task always run in the context of a kernel thread. It
5595 * is kick-off by the driver's detect code and starts up
5596 * up one per adapter. It immediately goes to sleep and waits for
5597 * some fibre event. When either the interrupt handler or
5598 * the timer routine detects a event it will one of the task
5599 * bits then wake us up.
5600 **************************************************************************/
5602 qla2x00_do_dpc(void *data)
5604 scsi_qla_host_t *base_vha;
5605 struct qla_hw_data *ha;
5607 struct qla_qpair *qpair;
5609 ha = (struct qla_hw_data *)data;
5610 base_vha = pci_get_drvdata(ha->pdev);
5612 set_user_nice(current, MIN_NICE);
5614 set_current_state(TASK_INTERRUPTIBLE);
5615 while (!kthread_should_stop()) {
5616 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5617 "DPC handler sleeping.\n");
5621 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5624 if (ha->flags.eeh_busy) {
5625 ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5626 "eeh_busy=%d.\n", ha->flags.eeh_busy);
5632 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5633 "DPC handler waking up, dpc_flags=0x%lx.\n",
5634 base_vha->dpc_flags);
5636 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5639 qla2x00_do_work(base_vha);
5641 if (IS_P3P_TYPE(ha)) {
5642 if (IS_QLA8044(ha)) {
5643 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5644 &base_vha->dpc_flags)) {
5645 qla8044_idc_lock(ha);
5646 qla8044_wr_direct(base_vha,
5647 QLA8044_CRB_DEV_STATE_INDEX,
5648 QLA8XXX_DEV_FAILED);
5649 qla8044_idc_unlock(ha);
5650 ql_log(ql_log_info, base_vha, 0x4004,
5651 "HW State: FAILED.\n");
5652 qla8044_device_state_handler(base_vha);
5657 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5658 &base_vha->dpc_flags)) {
5659 qla82xx_idc_lock(ha);
5660 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5661 QLA8XXX_DEV_FAILED);
5662 qla82xx_idc_unlock(ha);
5663 ql_log(ql_log_info, base_vha, 0x0151,
5664 "HW State: FAILED.\n");
5665 qla82xx_device_state_handler(base_vha);
5670 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5671 &base_vha->dpc_flags)) {
5673 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5674 "FCoE context reset scheduled.\n");
5675 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5676 &base_vha->dpc_flags))) {
5677 if (qla82xx_fcoe_ctx_reset(base_vha)) {
5678 /* FCoE-ctx reset failed.
5679 * Escalate to chip-reset
5681 set_bit(ISP_ABORT_NEEDED,
5682 &base_vha->dpc_flags);
5684 clear_bit(ABORT_ISP_ACTIVE,
5685 &base_vha->dpc_flags);
5688 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5689 "FCoE context reset end.\n");
5691 } else if (IS_QLAFX00(ha)) {
5692 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5693 &base_vha->dpc_flags)) {
5694 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5695 "Firmware Reset Recovery\n");
5696 if (qlafx00_reset_initialize(base_vha)) {
5697 /* Failed. Abort isp later. */
5698 if (!test_bit(UNLOADING,
5699 &base_vha->dpc_flags)) {
5700 set_bit(ISP_UNRECOVERABLE,
5701 &base_vha->dpc_flags);
5702 ql_dbg(ql_dbg_dpc, base_vha,
5704 "Reset Recovery Failed\n");
5709 if (test_and_clear_bit(FX00_TARGET_SCAN,
5710 &base_vha->dpc_flags)) {
5711 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5712 "ISPFx00 Target Scan scheduled\n");
5713 if (qlafx00_rescan_isp(base_vha)) {
5714 if (!test_bit(UNLOADING,
5715 &base_vha->dpc_flags))
5716 set_bit(ISP_UNRECOVERABLE,
5717 &base_vha->dpc_flags);
5718 ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
5719 "ISPFx00 Target Scan Failed\n");
5721 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
5722 "ISPFx00 Target Scan End\n");
5724 if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
5725 &base_vha->dpc_flags)) {
5726 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
5727 "ISPFx00 Host Info resend scheduled\n");
5728 qlafx00_fx_disc(base_vha,
5729 &base_vha->hw->mr.fcport,
5730 FXDISC_REG_HOST_INFO);
5734 if (test_and_clear_bit(DETECT_SFP_CHANGE,
5735 &base_vha->dpc_flags) &&
5736 !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
5737 qla24xx_detect_sfp(base_vha);
5739 if (ha->flags.detected_lr_sfp !=
5740 ha->flags.using_lr_setting)
5741 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
5744 if (test_and_clear_bit(ISP_ABORT_NEEDED,
5745 &base_vha->dpc_flags)) {
5747 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5748 "ISP abort scheduled.\n");
5749 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5750 &base_vha->dpc_flags))) {
5752 if (ha->isp_ops->abort_isp(base_vha)) {
5753 /* failed. retry later */
5754 set_bit(ISP_ABORT_NEEDED,
5755 &base_vha->dpc_flags);
5757 clear_bit(ABORT_ISP_ACTIVE,
5758 &base_vha->dpc_flags);
5761 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5762 "ISP abort end.\n");
5765 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5766 &base_vha->dpc_flags)) {
5767 qla2x00_update_fcports(base_vha);
5771 goto loop_resync_check;
5773 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5774 ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5775 "Quiescence mode scheduled.\n");
5776 if (IS_P3P_TYPE(ha)) {
5778 qla82xx_device_state_handler(base_vha);
5780 qla8044_device_state_handler(base_vha);
5781 clear_bit(ISP_QUIESCE_NEEDED,
5782 &base_vha->dpc_flags);
5783 if (!ha->flags.quiesce_owner) {
5784 qla2x00_perform_loop_resync(base_vha);
5785 if (IS_QLA82XX(ha)) {
5786 qla82xx_idc_lock(ha);
5787 qla82xx_clear_qsnt_ready(
5789 qla82xx_idc_unlock(ha);
5790 } else if (IS_QLA8044(ha)) {
5791 qla8044_idc_lock(ha);
5792 qla8044_clear_qsnt_ready(
5794 qla8044_idc_unlock(ha);
5798 clear_bit(ISP_QUIESCE_NEEDED,
5799 &base_vha->dpc_flags);
5800 qla2x00_quiesce_io(base_vha);
5802 ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5803 "Quiescence mode end.\n");
5806 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5807 &base_vha->dpc_flags) &&
5808 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5810 ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5811 "Reset marker scheduled.\n");
5812 qla2x00_rst_aen(base_vha);
5813 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5814 ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5815 "Reset marker end.\n");
5818 /* Retry each device up to login retry count */
5819 if ((test_and_clear_bit(RELOGIN_NEEDED,
5820 &base_vha->dpc_flags)) &&
5821 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5822 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5824 ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5825 "Relogin scheduled.\n");
5826 qla2x00_relogin(base_vha);
5827 ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5831 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5832 &base_vha->dpc_flags)) {
5834 ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5835 "Loop resync scheduled.\n");
5837 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5838 &base_vha->dpc_flags))) {
5840 qla2x00_loop_resync(base_vha);
5842 clear_bit(LOOP_RESYNC_ACTIVE,
5843 &base_vha->dpc_flags);
5846 ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5847 "Loop resync end.\n");
5853 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5854 atomic_read(&base_vha->loop_state) == LOOP_READY) {
5855 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5856 qla2xxx_flash_npiv_conf(base_vha);
5860 if (!ha->interrupts_on)
5861 ha->isp_ops->enable_intrs(ha);
5863 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5864 &base_vha->dpc_flags)) {
5865 if (ha->beacon_blink_led == 1)
5866 ha->isp_ops->beacon_blink(base_vha);
5869 /* qpair online check */
5870 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
5871 &base_vha->dpc_flags)) {
5872 if (ha->flags.eeh_busy ||
5873 ha->flags.pci_channel_io_perm_failure)
5878 mutex_lock(&ha->mq_lock);
5879 list_for_each_entry(qpair, &base_vha->qp_list,
5881 qpair->online = online;
5882 mutex_unlock(&ha->mq_lock);
5885 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED, &base_vha->dpc_flags)) {
5886 ql_log(ql_log_info, base_vha, 0xffffff,
5887 "nvme: SET ZIO Activity exchange threshold to %d.\n",
5888 ha->nvme_last_rptd_aen);
5889 if (qla27xx_set_zio_threshold(base_vha, ha->nvme_last_rptd_aen)) {
5890 ql_log(ql_log_info, base_vha, 0xffffff,
5891 "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
5892 ha->nvme_last_rptd_aen);
5896 if (!IS_QLAFX00(ha))
5897 qla2x00_do_dpc_all_vps(base_vha);
5901 set_current_state(TASK_INTERRUPTIBLE);
5902 } /* End of while(1) */
5903 __set_current_state(TASK_RUNNING);
5905 ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5906 "DPC handler exiting.\n");
5909 * Make sure that nobody tries to wake us up again.
5913 /* Cleanup any residual CTX SRBs. */
5914 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5920 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5922 struct qla_hw_data *ha = vha->hw;
5923 struct task_struct *t = ha->dpc_thread;
5925 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5931 * Processes asynchronous reset.
5934 * ha = adapter block pointer.
5937 qla2x00_rst_aen(scsi_qla_host_t *vha)
5939 if (vha->flags.online && !vha->flags.reset_active &&
5940 !atomic_read(&vha->loop_down_timer) &&
5941 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5943 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5946 * Issue marker command only when we are going to start
5949 vha->marker_needed = 1;
5950 } while (!atomic_read(&vha->loop_down_timer) &&
5951 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5955 /**************************************************************************
5961 * Context: Interrupt
5962 ***************************************************************************/
5964 qla2x00_timer(scsi_qla_host_t *vha)
5966 unsigned long cpu_flags = 0;
5971 struct qla_hw_data *ha = vha->hw;
5972 struct req_que *req;
5974 if (ha->flags.eeh_busy) {
5975 ql_dbg(ql_dbg_timer, vha, 0x6000,
5976 "EEH = %d, restarting timer.\n",
5977 ha->flags.eeh_busy);
5978 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5983 * Hardware read to raise pending EEH errors during mailbox waits. If
5984 * the read returns -1 then disable the board.
5986 if (!pci_channel_offline(ha->pdev)) {
5987 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5988 qla2x00_check_reg16_for_disconnect(vha, w);
5991 /* Make sure qla82xx_watchdog is run only for physical port */
5992 if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5993 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5996 qla82xx_watchdog(vha);
5997 else if (IS_QLA8044(ha))
5998 qla8044_watchdog(vha);
6001 if (!vha->vp_idx && IS_QLAFX00(ha))
6002 qlafx00_timer_routine(vha);
6004 /* Loop down handler. */
6005 if (atomic_read(&vha->loop_down_timer) > 0 &&
6006 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6007 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6008 && vha->flags.online) {
6010 if (atomic_read(&vha->loop_down_timer) ==
6011 vha->loop_down_abort_time) {
6013 ql_log(ql_log_info, vha, 0x6008,
6014 "Loop down - aborting the queues before time expires.\n");
6016 if (!IS_QLA2100(ha) && vha->link_down_timeout)
6017 atomic_set(&vha->loop_state, LOOP_DEAD);
6020 * Schedule an ISP abort to return any FCP2-device
6023 /* NPIV - scan physical port only */
6025 spin_lock_irqsave(&ha->hardware_lock,
6027 req = ha->req_q_map[0];
6029 index < req->num_outstanding_cmds;
6033 sp = req->outstanding_cmds[index];
6036 if (sp->cmd_type != TYPE_SRB)
6038 if (sp->type != SRB_SCSI_CMD)
6041 if (!(sfcp->flags & FCF_FCP2_DEVICE))
6045 set_bit(FCOE_CTX_RESET_NEEDED,
6048 set_bit(ISP_ABORT_NEEDED,
6052 spin_unlock_irqrestore(&ha->hardware_lock,
6058 /* if the loop has been down for 4 minutes, reinit adapter */
6059 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6060 if (!(vha->device_flags & DFLG_NO_CABLE)) {
6061 ql_log(ql_log_warn, vha, 0x6009,
6062 "Loop down - aborting ISP.\n");
6065 set_bit(FCOE_CTX_RESET_NEEDED,
6068 set_bit(ISP_ABORT_NEEDED,
6072 ql_dbg(ql_dbg_timer, vha, 0x600a,
6073 "Loop down - seconds remaining %d.\n",
6074 atomic_read(&vha->loop_down_timer));
6076 /* Check if beacon LED needs to be blinked for physical host only */
6077 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6078 /* There is no beacon_blink function for ISP82xx */
6079 if (!IS_P3P_TYPE(ha)) {
6080 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6085 /* Process any deferred work. */
6086 if (!list_empty(&vha->work_list))
6091 * see if the active AEN count has changed from what was last reported.
6094 atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen &&
6095 ha->zio_mode == QLA_ZIO_MODE_6) {
6096 ql_log(ql_log_info, vha, 0x3002,
6097 "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6098 ha->nvme_last_rptd_aen);
6099 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6100 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6104 /* Schedule the DPC routine if needed */
6105 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6106 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6107 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6109 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6110 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6111 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6112 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6113 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6114 test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6115 ql_dbg(ql_dbg_timer, vha, 0x600b,
6116 "isp_abort_needed=%d loop_resync_needed=%d "
6117 "fcport_update_needed=%d start_dpc=%d "
6118 "reset_marker_needed=%d",
6119 test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6120 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6121 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6123 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6124 ql_dbg(ql_dbg_timer, vha, 0x600c,
6125 "beacon_blink_needed=%d isp_unrecoverable=%d "
6126 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6127 "relogin_needed=%d.\n",
6128 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6129 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6130 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6131 test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6132 test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6133 qla2xxx_wake_dpc(vha);
6136 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6139 /* Firmware interface routines. */
6142 #define FW_ISP21XX 0
6143 #define FW_ISP22XX 1
6144 #define FW_ISP2300 2
6145 #define FW_ISP2322 3
6146 #define FW_ISP24XX 4
6147 #define FW_ISP25XX 5
6148 #define FW_ISP81XX 6
6149 #define FW_ISP82XX 7
6150 #define FW_ISP2031 8
6151 #define FW_ISP8031 9
6152 #define FW_ISP27XX 10
6154 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6155 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6156 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6157 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6158 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6159 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6160 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6161 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6162 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6163 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6164 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6167 static DEFINE_MUTEX(qla_fw_lock);
6169 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6170 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6171 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6172 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6173 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6174 { .name = FW_FILE_ISP24XX, },
6175 { .name = FW_FILE_ISP25XX, },
6176 { .name = FW_FILE_ISP81XX, },
6177 { .name = FW_FILE_ISP82XX, },
6178 { .name = FW_FILE_ISP2031, },
6179 { .name = FW_FILE_ISP8031, },
6180 { .name = FW_FILE_ISP27XX, },
6184 qla2x00_request_firmware(scsi_qla_host_t *vha)
6186 struct qla_hw_data *ha = vha->hw;
6187 struct fw_blob *blob;
6189 if (IS_QLA2100(ha)) {
6190 blob = &qla_fw_blobs[FW_ISP21XX];
6191 } else if (IS_QLA2200(ha)) {
6192 blob = &qla_fw_blobs[FW_ISP22XX];
6193 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6194 blob = &qla_fw_blobs[FW_ISP2300];
6195 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6196 blob = &qla_fw_blobs[FW_ISP2322];
6197 } else if (IS_QLA24XX_TYPE(ha)) {
6198 blob = &qla_fw_blobs[FW_ISP24XX];
6199 } else if (IS_QLA25XX(ha)) {
6200 blob = &qla_fw_blobs[FW_ISP25XX];
6201 } else if (IS_QLA81XX(ha)) {
6202 blob = &qla_fw_blobs[FW_ISP81XX];
6203 } else if (IS_QLA82XX(ha)) {
6204 blob = &qla_fw_blobs[FW_ISP82XX];
6205 } else if (IS_QLA2031(ha)) {
6206 blob = &qla_fw_blobs[FW_ISP2031];
6207 } else if (IS_QLA8031(ha)) {
6208 blob = &qla_fw_blobs[FW_ISP8031];
6209 } else if (IS_QLA27XX(ha)) {
6210 blob = &qla_fw_blobs[FW_ISP27XX];
6215 mutex_lock(&qla_fw_lock);
6219 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6220 ql_log(ql_log_warn, vha, 0x0063,
6221 "Failed to load firmware image (%s).\n", blob->name);
6228 mutex_unlock(&qla_fw_lock);
6233 qla2x00_release_firmware(void)
6237 mutex_lock(&qla_fw_lock);
6238 for (idx = 0; idx < FW_BLOBS; idx++)
6239 release_firmware(qla_fw_blobs[idx].fw);
6240 mutex_unlock(&qla_fw_lock);
6243 static pci_ers_result_t
6244 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6246 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6247 struct qla_hw_data *ha = vha->hw;
6249 ql_dbg(ql_dbg_aer, vha, 0x9000,
6250 "PCI error detected, state %x.\n", state);
6252 if (!atomic_read(&pdev->enable_cnt)) {
6253 ql_log(ql_log_info, vha, 0xffff,
6254 "PCI device is disabled,state %x\n", state);
6255 return PCI_ERS_RESULT_NEED_RESET;
6259 case pci_channel_io_normal:
6260 ha->flags.eeh_busy = 0;
6261 if (ql2xmqsupport) {
6262 set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6263 qla2xxx_wake_dpc(vha);
6265 return PCI_ERS_RESULT_CAN_RECOVER;
6266 case pci_channel_io_frozen:
6267 ha->flags.eeh_busy = 1;
6268 /* For ISP82XX complete any pending mailbox cmd */
6269 if (IS_QLA82XX(ha)) {
6270 ha->flags.isp82xx_fw_hung = 1;
6271 ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6272 qla82xx_clear_pending_mbx(vha);
6274 qla2x00_free_irqs(vha);
6275 pci_disable_device(pdev);
6276 /* Return back all IOs */
6277 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6278 if (ql2xmqsupport) {
6279 set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6280 qla2xxx_wake_dpc(vha);
6282 return PCI_ERS_RESULT_NEED_RESET;
6283 case pci_channel_io_perm_failure:
6284 ha->flags.pci_channel_io_perm_failure = 1;
6285 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6286 if (ql2xmqsupport) {
6287 set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6288 qla2xxx_wake_dpc(vha);
6290 return PCI_ERS_RESULT_DISCONNECT;
6292 return PCI_ERS_RESULT_NEED_RESET;
6295 static pci_ers_result_t
6296 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6298 int risc_paused = 0;
6300 unsigned long flags;
6301 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6302 struct qla_hw_data *ha = base_vha->hw;
6303 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6304 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6307 return PCI_ERS_RESULT_RECOVERED;
6309 spin_lock_irqsave(&ha->hardware_lock, flags);
6310 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6311 stat = RD_REG_DWORD(®->hccr);
6312 if (stat & HCCR_RISC_PAUSE)
6314 } else if (IS_QLA23XX(ha)) {
6315 stat = RD_REG_DWORD(®->u.isp2300.host_status);
6316 if (stat & HSR_RISC_PAUSED)
6318 } else if (IS_FWI2_CAPABLE(ha)) {
6319 stat = RD_REG_DWORD(®24->host_status);
6320 if (stat & HSRX_RISC_PAUSED)
6323 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6326 ql_log(ql_log_info, base_vha, 0x9003,
6327 "RISC paused -- mmio_enabled, Dumping firmware.\n");
6328 ha->isp_ops->fw_dump(base_vha, 0);
6330 return PCI_ERS_RESULT_NEED_RESET;
6332 return PCI_ERS_RESULT_RECOVERED;
6336 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6338 uint32_t rval = QLA_FUNCTION_FAILED;
6339 uint32_t drv_active = 0;
6340 struct qla_hw_data *ha = base_vha->hw;
6342 struct pci_dev *other_pdev = NULL;
6344 ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6345 "Entered %s.\n", __func__);
6347 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6349 if (base_vha->flags.online) {
6350 /* Abort all outstanding commands,
6351 * so as to be requeued later */
6352 qla2x00_abort_isp_cleanup(base_vha);
6356 fn = PCI_FUNC(ha->pdev->devfn);
6359 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6360 "Finding pci device at function = 0x%x.\n", fn);
6362 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6363 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6368 if (atomic_read(&other_pdev->enable_cnt)) {
6369 ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6370 "Found PCI func available and enable at 0x%x.\n",
6372 pci_dev_put(other_pdev);
6375 pci_dev_put(other_pdev);
6380 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6381 "This devfn is reset owner = 0x%x.\n",
6383 qla82xx_idc_lock(ha);
6385 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6386 QLA8XXX_DEV_INITIALIZING);
6388 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6389 QLA82XX_IDC_VERSION);
6391 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6392 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6393 "drv_active = 0x%x.\n", drv_active);
6395 qla82xx_idc_unlock(ha);
6396 /* Reset if device is not already reset
6397 * drv_active would be 0 if a reset has already been done
6400 rval = qla82xx_start_firmware(base_vha);
6403 qla82xx_idc_lock(ha);
6405 if (rval != QLA_SUCCESS) {
6406 ql_log(ql_log_info, base_vha, 0x900b,
6407 "HW State: FAILED.\n");
6408 qla82xx_clear_drv_active(ha);
6409 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6410 QLA8XXX_DEV_FAILED);
6412 ql_log(ql_log_info, base_vha, 0x900c,
6413 "HW State: READY.\n");
6414 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6416 qla82xx_idc_unlock(ha);
6417 ha->flags.isp82xx_fw_hung = 0;
6418 rval = qla82xx_restart_isp(base_vha);
6419 qla82xx_idc_lock(ha);
6420 /* Clear driver state register */
6421 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6422 qla82xx_set_drv_active(base_vha);
6424 qla82xx_idc_unlock(ha);
6426 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6427 "This devfn is not reset owner = 0x%x.\n",
6429 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6430 QLA8XXX_DEV_READY)) {
6431 ha->flags.isp82xx_fw_hung = 0;
6432 rval = qla82xx_restart_isp(base_vha);
6433 qla82xx_idc_lock(ha);
6434 qla82xx_set_drv_active(base_vha);
6435 qla82xx_idc_unlock(ha);
6438 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6443 static pci_ers_result_t
6444 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6446 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6447 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6448 struct qla_hw_data *ha = base_vha->hw;
6449 struct rsp_que *rsp;
6450 int rc, retries = 10;
6452 ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6455 /* Workaround: qla2xxx driver which access hardware earlier
6456 * needs error state to be pci_channel_io_online.
6457 * Otherwise mailbox command timesout.
6459 pdev->error_state = pci_channel_io_normal;
6461 pci_restore_state(pdev);
6463 /* pci_restore_state() clears the saved_state flag of the device
6464 * save restored state which resets saved_state flag
6466 pci_save_state(pdev);
6469 rc = pci_enable_device_mem(pdev);
6471 rc = pci_enable_device(pdev);
6474 ql_log(ql_log_warn, base_vha, 0x9005,
6475 "Can't re-enable PCI device after reset.\n");
6476 goto exit_slot_reset;
6479 rsp = ha->rsp_q_map[0];
6480 if (qla2x00_request_irqs(ha, rsp))
6481 goto exit_slot_reset;
6483 if (ha->isp_ops->pci_config(base_vha))
6484 goto exit_slot_reset;
6486 if (IS_QLA82XX(ha)) {
6487 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6488 ret = PCI_ERS_RESULT_RECOVERED;
6489 goto exit_slot_reset;
6491 goto exit_slot_reset;
6494 while (ha->flags.mbox_busy && retries--)
6497 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6498 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6499 ret = PCI_ERS_RESULT_RECOVERED;
6500 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6504 ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6505 "slot_reset return %x.\n", ret);
6511 qla2xxx_pci_resume(struct pci_dev *pdev)
6513 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6514 struct qla_hw_data *ha = base_vha->hw;
6517 ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6520 ret = qla2x00_wait_for_hba_online(base_vha);
6521 if (ret != QLA_SUCCESS) {
6522 ql_log(ql_log_fatal, base_vha, 0x9002,
6523 "The device failed to resume I/O from slot/link_reset.\n");
6526 pci_cleanup_aer_uncorrect_error_status(pdev);
6528 ha->flags.eeh_busy = 0;
6532 qla83xx_disable_laser(scsi_qla_host_t *vha)
6534 uint32_t reg, data, fn;
6535 struct qla_hw_data *ha = vha->hw;
6536 struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
6538 /* pci func #/port # */
6539 ql_dbg(ql_dbg_init, vha, 0x004b,
6540 "Disabling Laser for hba: %p\n", vha);
6542 fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
6543 (BIT_15|BIT_14|BIT_13|BIT_12));
6552 data = LASER_OFF_2031;
6554 qla83xx_wr_reg(vha, reg, data);
6557 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6559 scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6561 return blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev);
6564 static const struct pci_error_handlers qla2xxx_err_handler = {
6565 .error_detected = qla2xxx_pci_error_detected,
6566 .mmio_enabled = qla2xxx_pci_mmio_enabled,
6567 .slot_reset = qla2xxx_pci_slot_reset,
6568 .resume = qla2xxx_pci_resume,
6571 static struct pci_device_id qla2xxx_pci_tbl[] = {
6572 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6573 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6574 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6575 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6576 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6577 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6578 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6579 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6580 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6581 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6582 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6583 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6584 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6585 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6586 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6587 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6588 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6589 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6590 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6591 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6592 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6593 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6596 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6598 static struct pci_driver qla2xxx_pci_driver = {
6599 .name = QLA2XXX_DRIVER_NAME,
6601 .owner = THIS_MODULE,
6603 .id_table = qla2xxx_pci_tbl,
6604 .probe = qla2x00_probe_one,
6605 .remove = qla2x00_remove_one,
6606 .shutdown = qla2x00_shutdown,
6607 .err_handler = &qla2xxx_err_handler,
6610 static const struct file_operations apidev_fops = {
6611 .owner = THIS_MODULE,
6612 .llseek = noop_llseek,
6616 * qla2x00_module_init - Module initialization.
6619 qla2x00_module_init(void)
6623 /* Allocate cache for SRBs. */
6624 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6625 SLAB_HWCACHE_ALIGN, NULL);
6626 if (srb_cachep == NULL) {
6627 ql_log(ql_log_fatal, NULL, 0x0001,
6628 "Unable to allocate SRB cache...Failing load!.\n");
6632 /* Initialize target kmem_cache and mem_pools */
6635 kmem_cache_destroy(srb_cachep);
6637 } else if (ret > 0) {
6639 * If initiator mode is explictly disabled by qlt_init(),
6640 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6641 * performing scsi_scan_target() during LOOP UP event.
6643 qla2xxx_transport_functions.disable_target_scan = 1;
6644 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6647 /* Derive version string. */
6648 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6649 if (ql2xextended_error_logging)
6650 strcat(qla2x00_version_str, "-debug");
6651 if (ql2xextended_error_logging == 1)
6652 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
6654 qla2xxx_transport_template =
6655 fc_attach_transport(&qla2xxx_transport_functions);
6656 if (!qla2xxx_transport_template) {
6657 kmem_cache_destroy(srb_cachep);
6658 ql_log(ql_log_fatal, NULL, 0x0002,
6659 "fc_attach_transport failed...Failing load!.\n");
6664 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6665 if (apidev_major < 0) {
6666 ql_log(ql_log_fatal, NULL, 0x0003,
6667 "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6670 qla2xxx_transport_vport_template =
6671 fc_attach_transport(&qla2xxx_transport_vport_functions);
6672 if (!qla2xxx_transport_vport_template) {
6673 kmem_cache_destroy(srb_cachep);
6675 fc_release_transport(qla2xxx_transport_template);
6676 ql_log(ql_log_fatal, NULL, 0x0004,
6677 "fc_attach_transport vport failed...Failing load!.\n");
6680 ql_log(ql_log_info, NULL, 0x0005,
6681 "QLogic Fibre Channel HBA Driver: %s.\n",
6682 qla2x00_version_str);
6683 ret = pci_register_driver(&qla2xxx_pci_driver);
6685 kmem_cache_destroy(srb_cachep);
6687 fc_release_transport(qla2xxx_transport_template);
6688 fc_release_transport(qla2xxx_transport_vport_template);
6689 ql_log(ql_log_fatal, NULL, 0x0006,
6690 "pci_register_driver failed...ret=%d Failing load!.\n",
6697 * qla2x00_module_exit - Module cleanup.
6700 qla2x00_module_exit(void)
6702 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6703 pci_unregister_driver(&qla2xxx_pci_driver);
6704 qla2x00_release_firmware();
6705 kmem_cache_destroy(srb_cachep);
6708 kmem_cache_destroy(ctx_cachep);
6709 fc_release_transport(qla2xxx_transport_template);
6710 fc_release_transport(qla2xxx_transport_vport_template);
6713 module_init(qla2x00_module_init);
6714 module_exit(qla2x00_module_exit);
6716 MODULE_AUTHOR("QLogic Corporation");
6717 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6718 MODULE_LICENSE("GPL");
6719 MODULE_VERSION(QLA2XXX_VERSION);
6720 MODULE_FIRMWARE(FW_FILE_ISP21XX);
6721 MODULE_FIRMWARE(FW_FILE_ISP22XX);
6722 MODULE_FIRMWARE(FW_FILE_ISP2300);
6723 MODULE_FIRMWARE(FW_FILE_ISP2322);
6724 MODULE_FIRMWARE(FW_FILE_ISP24XX);
6725 MODULE_FIRMWARE(FW_FILE_ISP25XX);