drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18
  19 #include <scsi/scsi_tcq.h>
  20 #include <scsi/scsicam.h>
  21 #include <scsi/scsi_transport.h>
  22 #include <scsi/scsi_transport_fc.h>
  23
  24 #include "qla_target.h"
  25
  26 /*
  27  * Driver version
  28  */
  29 char qla2x00_version_str[40];
  30
  31 static int apidev_major;
  32
  33 /*
  34  * SRB allocation cache
  35  */
  36 struct kmem_cache *srb_cachep;
  37
  38 /*
  39  * CT6 CTX allocation cache
  40  */
  41 static struct kmem_cache *ctx_cachep;
  42 /*
  43  * error level for logging
  44  */
  45 int ql_errlev = ql_log_all;
  46
  47 static int ql2xenableclass2;
  48 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  49 MODULE_PARM_DESC(ql2xenableclass2,
  50                 "Specify if Class 2 operations are supported from the very "
  51                 "beginning. Default is 0 - class 2 not supported.");
  52
  53
  54 int ql2xlogintimeout = 20;
  55 module_param(ql2xlogintimeout, int, S_IRUGO);
  56 MODULE_PARM_DESC(ql2xlogintimeout,
  57                 "Login timeout value in seconds.");
  58
  59 int qlport_down_retry;
  60 module_param(qlport_down_retry, int, S_IRUGO);
  61 MODULE_PARM_DESC(qlport_down_retry,
  62                 "Maximum number of command retries to a port that returns "
  63                 "a PORT-DOWN status.");
  64
  65 int ql2xplogiabsentdevice;
  66 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  67 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  68                 "Option to enable PLOGI to devices that are not present after "
  69                 "a Fabric scan.  This is needed for several broken switches. "
  70                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  71
  72 int ql2xloginretrycount = 0;
  73 module_param(ql2xloginretrycount, int, S_IRUGO);
  74 MODULE_PARM_DESC(ql2xloginretrycount,
  75                 "Specify an alternate value for the NVRAM login retry count.");
  76
  77 int ql2xallocfwdump = 1;
  78 module_param(ql2xallocfwdump, int, S_IRUGO);
  79 MODULE_PARM_DESC(ql2xallocfwdump,
  80                 "Option to enable allocation of memory for a firmware dump "
  81                 "during HBA initialization.  Memory allocation requirements "
  82                 "vary by ISP type.  Default is 1 - allocate memory.");
  83
  84 int ql2xextended_error_logging;
  85 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  86 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  87 MODULE_PARM_DESC(ql2xextended_error_logging,
  88                 "Option to enable extended error logging,\n"
  89                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  90                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  91                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  92                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  93                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  94                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  95                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  96                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  97                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  98                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  99                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 100                 "\t\t0x1e400000 - Preferred value for capturing essential "
 101                 "debug information (equivalent to old "
 102                 "ql2xextended_error_logging=1).\n"
 103                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 104
 105 int ql2xshiftctondsd = 6;
 106 module_param(ql2xshiftctondsd, int, S_IRUGO);
 107 MODULE_PARM_DESC(ql2xshiftctondsd,
 108                 "Set to control shifting of command type processing "
 109                 "based on total number of SG elements.");
 110
 111 int ql2xfdmienable=1;
 112 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 113 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 114 MODULE_PARM_DESC(ql2xfdmienable,
 115                 "Enables FDMI registrations. "
 116                 "0 - no FDMI. Default is 1 - perform FDMI.");
 117
 118 #define MAX_Q_DEPTH     64
 119 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 120 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 121 MODULE_PARM_DESC(ql2xmaxqdepth,
 122                 "Maximum queue depth to set for each LUN. "
 123                 "Default is 64.");
 124
 125 #if (IS_ENABLED(CONFIG_NVME_FC))
 126 int ql2xenabledif;
 127 #else
 128 int ql2xenabledif = 2;
 129 #endif
 130 module_param(ql2xenabledif, int, S_IRUGO);
 131 MODULE_PARM_DESC(ql2xenabledif,
 132                 " Enable T10-CRC-DIF:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- No DIF Support\n"
 135                 "  1 -- Enable DIF for all types\n"
 136                 "  2 -- Enable DIF for all types, except Type 0.\n");
 137
 138 #if (IS_ENABLED(CONFIG_NVME_FC))
 139 int ql2xnvmeenable = 1;
 140 #else
 141 int ql2xnvmeenable;
 142 #endif
 143 module_param(ql2xnvmeenable, int, 0644);
 144 MODULE_PARM_DESC(ql2xnvmeenable,
 145     "Enables NVME support. "
 146     "0 - no NVMe.  Default is Y");
 147
 148 int ql2xenablehba_err_chk = 2;
 149 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 150 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 151                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 152                 " Default is 2.\n"
 153                 "  0 -- Error isolation disabled\n"
 154                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 155                 "  2 -- Error isolation enabled for all Types\n");
 156
 157 int ql2xiidmaenable=1;
 158 module_param(ql2xiidmaenable, int, S_IRUGO);
 159 MODULE_PARM_DESC(ql2xiidmaenable,
 160                 "Enables iIDMA settings "
 161                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 162
 163 int ql2xmqsupport = 1;
 164 module_param(ql2xmqsupport, int, S_IRUGO);
 165 MODULE_PARM_DESC(ql2xmqsupport,
 166                 "Enable on demand multiple queue pairs support "
 167                 "Default is 1 for supported. "
 168                 "Set it to 0 to turn off mq qpair support.");
 169
 170 int ql2xfwloadbin;
 171 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 172 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 173 MODULE_PARM_DESC(ql2xfwloadbin,
 174                 "Option to specify location from which to load ISP firmware:.\n"
 175                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 176                 "      interface.\n"
 177                 " 1 -- load firmware from flash.\n"
 178                 " 0 -- use default semantics.\n");
 179
 180 int ql2xetsenable;
 181 module_param(ql2xetsenable, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xetsenable,
 183                 "Enables firmware ETS burst."
 184                 "Default is 0 - skip ETS enablement.");
 185
 186 int ql2xdbwr = 1;
 187 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 188 MODULE_PARM_DESC(ql2xdbwr,
 189                 "Option to specify scheme for request queue posting.\n"
 190                 " 0 -- Regular doorbell.\n"
 191                 " 1 -- CAMRAM doorbell (faster).\n");
 192
 193 int ql2xtargetreset = 1;
 194 module_param(ql2xtargetreset, int, S_IRUGO);
 195 MODULE_PARM_DESC(ql2xtargetreset,
 196                  "Enable target reset."
 197                  "Default is 1 - use hw defaults.");
 198
 199 int ql2xgffidenable;
 200 module_param(ql2xgffidenable, int, S_IRUGO);
 201 MODULE_PARM_DESC(ql2xgffidenable,
 202                 "Enables GFF_ID checks of port type. "
 203                 "Default is 0 - Do not use GFF_ID information.");
 204
 205 int ql2xasynctmfenable = 1;
 206 module_param(ql2xasynctmfenable, int, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xasynctmfenable,
 208                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 209                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 210
 211 int ql2xdontresethba;
 212 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 213 MODULE_PARM_DESC(ql2xdontresethba,
 214                 "Option to specify reset behaviour.\n"
 215                 " 0 (Default) -- Reset on failure.\n"
 216                 " 1 -- Do not reset on failure.\n");
 217
 218 uint64_t ql2xmaxlun = MAX_LUNS;
 219 module_param(ql2xmaxlun, ullong, S_IRUGO);
 220 MODULE_PARM_DESC(ql2xmaxlun,
 221                 "Defines the maximum LU number to register with the SCSI "
 222                 "midlayer. Default is 65535.");
 223
 224 int ql2xmdcapmask = 0x1F;
 225 module_param(ql2xmdcapmask, int, S_IRUGO);
 226 MODULE_PARM_DESC(ql2xmdcapmask,
 227                 "Set the Minidump driver capture mask level. "
 228                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 229
 230 int ql2xmdenable = 1;
 231 module_param(ql2xmdenable, int, S_IRUGO);
 232 MODULE_PARM_DESC(ql2xmdenable,
 233                 "Enable/disable MiniDump. "
 234                 "0 - MiniDump disabled. "
 235                 "1 (Default) - MiniDump enabled.");
 236
 237 int ql2xexlogins = 0;
 238 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 239 MODULE_PARM_DESC(ql2xexlogins,
 240                  "Number of extended Logins. "
 241                  "0 (Default)- Disabled.");
 242
 243 int ql2xexchoffld = 1024;
 244 module_param(ql2xexchoffld, uint, 0644);
 245 MODULE_PARM_DESC(ql2xexchoffld,
 246         "Number of target exchanges.");
 247
 248 int ql2xiniexchg = 1024;
 249 module_param(ql2xiniexchg, uint, 0644);
 250 MODULE_PARM_DESC(ql2xiniexchg,
 251         "Number of initiator exchanges.");
 252
 253 int ql2xfwholdabts = 0;
 254 module_param(ql2xfwholdabts, int, S_IRUGO);
 255 MODULE_PARM_DESC(ql2xfwholdabts,
 256                 "Allow FW to hold status IOCB until ABTS rsp received. "
 257                 "0 (Default) Do not set fw option. "
 258                 "1 - Set fw option to hold ABTS.");
 259
 260 int ql2xmvasynctoatio = 1;
 261 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 262 MODULE_PARM_DESC(ql2xmvasynctoatio,
 263                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 264                 "0 (Default). Do not move IOCBs"
 265                 "1 - Move IOCBs.");
 266
 267 int ql2xautodetectsfp = 1;
 268 module_param(ql2xautodetectsfp, int, 0444);
 269 MODULE_PARM_DESC(ql2xautodetectsfp,
 270                  "Detect SFP range and set appropriate distance.\n"
 271                  "1 (Default): Enable\n");
 272
 273 int ql2xenablemsix = 1;
 274 module_param(ql2xenablemsix, int, 0444);
 275 MODULE_PARM_DESC(ql2xenablemsix,
 276                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 277                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 278                  " 0 -- enable traditional pin-based mechanism.\n"
 279                  " 1 -- enable MSI-X interrupt mechanism.\n"
 280                  " 2 -- enable MSI interrupt mechanism.\n");
 281
 282 int qla2xuseresexchforels;
 283 module_param(qla2xuseresexchforels, int, 0444);
 284 MODULE_PARM_DESC(qla2xuseresexchforels,
 285                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 286                  " 0 (default): disabled");
 287
 288 /*
 289  * SCSI host template entry points
 290  */
 291 static int qla2xxx_slave_configure(struct scsi_device * device);
 292 static int qla2xxx_slave_alloc(struct scsi_device *);
 293 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 294 static void qla2xxx_scan_start(struct Scsi_Host *);
 295 static void qla2xxx_slave_destroy(struct scsi_device *);
 296 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 297 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 298 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 299 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 300 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 301 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 302
 303 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 304 static void qla2x00_free_device(scsi_qla_host_t *);
 305 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 306 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 307
 308
 309 struct scsi_host_template qla2xxx_driver_template = {
 310         .module                 = THIS_MODULE,
 311         .name                   = QLA2XXX_DRIVER_NAME,
 312         .queuecommand           = qla2xxx_queuecommand,
 313
 314         .eh_timed_out           = fc_eh_timed_out,
 315         .eh_abort_handler       = qla2xxx_eh_abort,
 316         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 317         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 318         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 319         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 320
 321         .slave_configure        = qla2xxx_slave_configure,
 322
 323         .slave_alloc            = qla2xxx_slave_alloc,
 324         .slave_destroy          = qla2xxx_slave_destroy,
 325         .scan_finished          = qla2xxx_scan_finished,
 326         .scan_start             = qla2xxx_scan_start,
 327         .change_queue_depth     = scsi_change_queue_depth,
 328         .map_queues             = qla2xxx_map_queues,
 329         .this_id                = -1,
 330         .cmd_per_lun            = 3,
 331         .sg_tablesize           = SG_ALL,
 332
 333         .max_sectors            = 0xFFFF,
 334         .shost_attrs            = qla2x00_host_attrs,
 335
 336         .supported_mode         = MODE_INITIATOR,
 337         .track_queue_depth      = 1,
 338 };
 339
 340 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 341 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 342
 343 /* TODO Convert to inlines
 344  *
 345  * Timer routines
 346  */
 347
 348 __inline__ void
 349 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 350 {
 351         timer_setup(&vha->timer, qla2x00_timer, 0);
 352         vha->timer.expires = jiffies + interval * HZ;
 353         add_timer(&vha->timer);
 354         vha->timer_active = 1;
 355 }
 356
 357 static inline void
 358 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 359 {
 360         /* Currently used for 82XX only. */
 361         if (vha->device_flags & DFLG_DEV_FAILED) {
 362                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 363                     "Device in a failed state, returning.\n");
 364                 return;
 365         }
 366
 367         mod_timer(&vha->timer, jiffies + interval * HZ);
 368 }
 369
 370 static __inline__ void
 371 qla2x00_stop_timer(scsi_qla_host_t *vha)
 372 {
 373         del_timer_sync(&vha->timer);
 374         vha->timer_active = 0;
 375 }
 376
 377 static int qla2x00_do_dpc(void *data);
 378
 379 static void qla2x00_rst_aen(scsi_qla_host_t *);
 380
 381 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 382         struct req_que **, struct rsp_que **);
 383 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 384 static void qla2x00_mem_free(struct qla_hw_data *);
 385 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 386         struct qla_qpair *qpair);
 387
 388 /* -------------------------------------------------------------------------- */
 389 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 390     struct rsp_que *rsp)
 391 {
 392         struct qla_hw_data *ha = vha->hw;
 393         rsp->qpair = ha->base_qpair;
 394         rsp->req = req;
 395         ha->base_qpair->hw = ha;
 396         ha->base_qpair->req = req;
 397         ha->base_qpair->rsp = rsp;
 398         ha->base_qpair->vha = vha;
 399         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 400         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 401         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 402         ha->base_qpair->srb_mempool = ha->srb_mempool;
 403         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 404         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 405         /* init qpair to this cpu. Will adjust at run time. */
 406         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 407         ha->base_qpair->pdev = ha->pdev;
 408
 409         if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
 410                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 411 }
 412
 413 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 414                                 struct rsp_que *rsp)
 415 {
 416         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 417         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 418                                 GFP_KERNEL);
 419         if (!ha->req_q_map) {
 420                 ql_log(ql_log_fatal, vha, 0x003b,
 421                     "Unable to allocate memory for request queue ptrs.\n");
 422                 goto fail_req_map;
 423         }
 424
 425         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 426                                 GFP_KERNEL);
 427         if (!ha->rsp_q_map) {
 428                 ql_log(ql_log_fatal, vha, 0x003c,
 429                     "Unable to allocate memory for response queue ptrs.\n");
 430                 goto fail_rsp_map;
 431         }
 432
 433         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 434         if (ha->base_qpair == NULL) {
 435                 ql_log(ql_log_warn, vha, 0x00e0,
 436                     "Failed to allocate base queue pair memory.\n");
 437                 goto fail_base_qpair;
 438         }
 439
 440         qla_init_base_qpair(vha, req, rsp);
 441
 442         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 443                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 444                         GFP_KERNEL);
 445                 if (!ha->queue_pair_map) {
 446                         ql_log(ql_log_fatal, vha, 0x0180,
 447                             "Unable to allocate memory for queue pair ptrs.\n");
 448                         goto fail_qpair_map;
 449                 }
 450         }
 451
 452         /*
 453          * Make sure we record at least the request and response queue zero in
 454          * case we need to free them if part of the probe fails.
 455          */
 456         ha->rsp_q_map[0] = rsp;
 457         ha->req_q_map[0] = req;
 458         set_bit(0, ha->rsp_qid_map);
 459         set_bit(0, ha->req_qid_map);
 460         return 0;
 461
 462 fail_qpair_map:
 463         kfree(ha->base_qpair);
 464         ha->base_qpair = NULL;
 465 fail_base_qpair:
 466         kfree(ha->rsp_q_map);
 467         ha->rsp_q_map = NULL;
 468 fail_rsp_map:
 469         kfree(ha->req_q_map);
 470         ha->req_q_map = NULL;
 471 fail_req_map:
 472         return -ENOMEM;
 473 }
 474
 475 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 476 {
 477         if (IS_QLAFX00(ha)) {
 478                 if (req && req->ring_fx00)
 479                         dma_free_coherent(&ha->pdev->dev,
 480                             (req->length_fx00 + 1) * sizeof(request_t),
 481                             req->ring_fx00, req->dma_fx00);
 482         } else if (req && req->ring)
 483                 dma_free_coherent(&ha->pdev->dev,
 484                 (req->length + 1) * sizeof(request_t),
 485                 req->ring, req->dma);
 486
 487         if (req)
 488                 kfree(req->outstanding_cmds);
 489
 490         kfree(req);
 491 }
 492
 493 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 494 {
 495         if (IS_QLAFX00(ha)) {
 496                 if (rsp && rsp->ring_fx00)
 497                         dma_free_coherent(&ha->pdev->dev,
 498                             (rsp->length_fx00 + 1) * sizeof(request_t),
 499                             rsp->ring_fx00, rsp->dma_fx00);
 500         } else if (rsp && rsp->ring) {
 501                 dma_free_coherent(&ha->pdev->dev,
 502                 (rsp->length + 1) * sizeof(response_t),
 503                 rsp->ring, rsp->dma);
 504         }
 505         kfree(rsp);
 506 }
 507
 508 static void qla2x00_free_queues(struct qla_hw_data *ha)
 509 {
 510         struct req_que *req;
 511         struct rsp_que *rsp;
 512         int cnt;
 513         unsigned long flags;
 514
 515         if (ha->queue_pair_map) {
 516                 kfree(ha->queue_pair_map);
 517                 ha->queue_pair_map = NULL;
 518         }
 519         if (ha->base_qpair) {
 520                 kfree(ha->base_qpair);
 521                 ha->base_qpair = NULL;
 522         }
 523
 524         spin_lock_irqsave(&ha->hardware_lock, flags);
 525         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 526                 if (!test_bit(cnt, ha->req_qid_map))
 527                         continue;
 528
 529                 req = ha->req_q_map[cnt];
 530                 clear_bit(cnt, ha->req_qid_map);
 531                 ha->req_q_map[cnt] = NULL;
 532
 533                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 534                 qla2x00_free_req_que(ha, req);
 535                 spin_lock_irqsave(&ha->hardware_lock, flags);
 536         }
 537         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 538
 539         kfree(ha->req_q_map);
 540         ha->req_q_map = NULL;
 541
 542
 543         spin_lock_irqsave(&ha->hardware_lock, flags);
 544         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 545                 if (!test_bit(cnt, ha->rsp_qid_map))
 546                         continue;
 547
 548                 rsp = ha->rsp_q_map[cnt];
 549                 clear_bit(cnt, ha->rsp_qid_map);
 550                 ha->rsp_q_map[cnt] =  NULL;
 551                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 552                 qla2x00_free_rsp_que(ha, rsp);
 553                 spin_lock_irqsave(&ha->hardware_lock, flags);
 554         }
 555         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 556
 557         kfree(ha->rsp_q_map);
 558         ha->rsp_q_map = NULL;
 559 }
 560
 561 static char *
 562 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 563 {
 564         struct qla_hw_data *ha = vha->hw;
 565         static char *pci_bus_modes[] = {
 566                 "33", "66", "100", "133",
 567         };
 568         uint16_t pci_bus;
 569
 570         strcpy(str, "PCI");
 571         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 572         if (pci_bus) {
 573                 strcat(str, "-X (");
 574                 strcat(str, pci_bus_modes[pci_bus]);
 575         } else {
 576                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 577                 strcat(str, " (");
 578                 strcat(str, pci_bus_modes[pci_bus]);
 579         }
 580         strcat(str, " MHz)");
 581
 582         return (str);
 583 }
 584
 585 static char *
 586 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 587 {
 588         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 589         struct qla_hw_data *ha = vha->hw;
 590         uint32_t pci_bus;
 591
 592         if (pci_is_pcie(ha->pdev)) {
 593                 char lwstr[6];
 594                 uint32_t lstat, lspeed, lwidth;
 595
 596                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 597                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 598                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 599
 600                 strcpy(str, "PCIe (");
 601                 switch (lspeed) {
 602                 case 1:
 603                         strcat(str, "2.5GT/s ");
 604                         break;
 605                 case 2:
 606                         strcat(str, "5.0GT/s ");
 607                         break;
 608                 case 3:
 609                         strcat(str, "8.0GT/s ");
 610                         break;
 611                 default:
 612                         strcat(str, "<unknown> ");
 613                         break;
 614                 }
 615                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 616                 strcat(str, lwstr);
 617
 618                 return str;
 619         }
 620
 621         strcpy(str, "PCI");
 622         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 623         if (pci_bus == 0 || pci_bus == 8) {
 624                 strcat(str, " (");
 625                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 626         } else {
 627                 strcat(str, "-X ");
 628                 if (pci_bus & BIT_2)
 629                         strcat(str, "Mode 2");
 630                 else
 631                         strcat(str, "Mode 1");
 632                 strcat(str, " (");
 633                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 634         }
 635         strcat(str, " MHz)");
 636
 637         return str;
 638 }
 639
 640 static char *
 641 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 642 {
 643         char un_str[10];
 644         struct qla_hw_data *ha = vha->hw;
 645
 646         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 647             ha->fw_minor_version, ha->fw_subminor_version);
 648
 649         if (ha->fw_attributes & BIT_9) {
 650                 strcat(str, "FLX");
 651                 return (str);
 652         }
 653
 654         switch (ha->fw_attributes & 0xFF) {
 655         case 0x7:
 656                 strcat(str, "EF");
 657                 break;
 658         case 0x17:
 659                 strcat(str, "TP");
 660                 break;
 661         case 0x37:
 662                 strcat(str, "IP");
 663                 break;
 664         case 0x77:
 665                 strcat(str, "VI");
 666                 break;
 667         default:
 668                 sprintf(un_str, "(%x)", ha->fw_attributes);
 669                 strcat(str, un_str);
 670                 break;
 671         }
 672         if (ha->fw_attributes & 0x100)
 673                 strcat(str, "X");
 674
 675         return (str);
 676 }
 677
 678 static char *
 679 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 680 {
 681         struct qla_hw_data *ha = vha->hw;
 682
 683         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 684             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 685         return str;
 686 }
 687
 688 void
 689 qla2x00_sp_free_dma(void *ptr)
 690 {
 691         srb_t *sp = ptr;
 692         struct qla_hw_data *ha = sp->vha->hw;
 693         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 694         void *ctx = GET_CMD_CTX_SP(sp);
 695
 696         if (sp->flags & SRB_DMA_VALID) {
 697                 scsi_dma_unmap(cmd);
 698                 sp->flags &= ~SRB_DMA_VALID;
 699         }
 700
 701         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 702                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 703                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 704                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 705         }
 706
 707         if (!ctx)
 708                 goto end;
 709
 710         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 711                 /* List assured to be having elements */
 712                 qla2x00_clean_dsd_pool(ha, ctx);
 713                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 714         }
 715
 716         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 717                 struct crc_context *ctx0 = ctx;
 718
 719                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 720                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 721         }
 722
 723         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 724                 struct ct6_dsd *ctx1 = ctx;
 725
 726                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 727                     ctx1->fcp_cmnd_dma);
 728                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 729                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 730                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 731                 mempool_free(ctx1, ha->ctx_mempool);
 732         }
 733
 734 end:
 735         if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
 736                 CMD_SP(cmd) = NULL;
 737                 qla2x00_rel_sp(sp);
 738         }
 739 }
 740
 741 void
 742 qla2x00_sp_compl(void *ptr, int res)
 743 {
 744         srb_t *sp = ptr;
 745         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 746
 747         cmd->result = res;
 748
 749         if (atomic_read(&sp->ref_count) == 0) {
 750                 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
 751                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 752                     sp, GET_CMD_SP(sp));
 753                 if (ql2xextended_error_logging & ql_dbg_io)
 754                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 755                 return;
 756         }
 757         if (!atomic_dec_and_test(&sp->ref_count))
 758                 return;
 759
 760         sp->free(sp);
 761         cmd->scsi_done(cmd);
 762 }
 763
 764 void
 765 qla2xxx_qpair_sp_free_dma(void *ptr)
 766 {
 767         srb_t *sp = (srb_t *)ptr;
 768         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 769         struct qla_hw_data *ha = sp->fcport->vha->hw;
 770         void *ctx = GET_CMD_CTX_SP(sp);
 771
 772         if (sp->flags & SRB_DMA_VALID) {
 773                 scsi_dma_unmap(cmd);
 774                 sp->flags &= ~SRB_DMA_VALID;
 775         }
 776
 777         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 778                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 779                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 780                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 781         }
 782
 783         if (!ctx)
 784                 goto end;
 785
 786         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 787                 /* List assured to be having elements */
 788                 qla2x00_clean_dsd_pool(ha, ctx);
 789                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 790         }
 791
 792         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 793                 struct crc_context *ctx0 = ctx;
 794
 795                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 796                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 797         }
 798
 799         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 800                 struct ct6_dsd *ctx1 = ctx;
 801                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 802                     ctx1->fcp_cmnd_dma);
 803                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 804                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 805                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 806                 mempool_free(ctx1, ha->ctx_mempool);
 807         }
 808 end:
 809         CMD_SP(cmd) = NULL;
 810         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 811 }
 812
 813 void
 814 qla2xxx_qpair_sp_compl(void *ptr, int res)
 815 {
 816         srb_t *sp = ptr;
 817         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 818
 819         cmd->result = res;
 820
 821         if (atomic_read(&sp->ref_count) == 0) {
 822                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 823                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 824                     sp, GET_CMD_SP(sp));
 825                 if (ql2xextended_error_logging & ql_dbg_io)
 826                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 827                 return;
 828         }
 829         if (!atomic_dec_and_test(&sp->ref_count))
 830                 return;
 831
 832         sp->free(sp);
 833         cmd->scsi_done(cmd);
 834 }
 835
 836 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 837  * does not have the changes necessary to avoid taking host->host_lock.
 838  */
 839 static int
 840 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 841 {
 842         scsi_qla_host_t *vha = shost_priv(host);
 843         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 844         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 845         struct qla_hw_data *ha = vha->hw;
 846         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 847         srb_t *sp;
 848         int rval;
 849         struct qla_qpair *qpair = NULL;
 850         uint32_t tag;
 851         uint16_t hwq;
 852
 853         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 854                 cmd->result = DID_NO_CONNECT << 16;
 855                 goto qc24_fail_command;
 856         }
 857
 858         if (ha->mqenable) {
 859                 tag = blk_mq_unique_tag(cmd->request);
 860                 hwq = blk_mq_unique_tag_to_hwq(tag);
 861                 qpair = ha->queue_pair_map[hwq];
 862
 863                 if (qpair)
 864                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 865         }
 866
 867         if (ha->flags.eeh_busy) {
 868                 if (ha->flags.pci_channel_io_perm_failure) {
 869                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 870                             "PCI Channel IO permanent failure, exiting "
 871                             "cmd=%p.\n", cmd);
 872                         cmd->result = DID_NO_CONNECT << 16;
 873                 } else {
 874                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 875                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 876                         cmd->result = DID_REQUEUE << 16;
 877                 }
 878                 goto qc24_fail_command;
 879         }
 880
 881         rval = fc_remote_port_chkready(rport);
 882         if (rval) {
 883                 cmd->result = rval;
 884                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 885                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 886                     cmd, rval);
 887                 goto qc24_fail_command;
 888         }
 889
 890         if (!vha->flags.difdix_supported &&
 891                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 892                         ql_dbg(ql_dbg_io, vha, 0x3004,
 893                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 894                             cmd);
 895                         cmd->result = DID_NO_CONNECT << 16;
 896                         goto qc24_fail_command;
 897         }
 898
 899         if (!fcport) {
 900                 cmd->result = DID_NO_CONNECT << 16;
 901                 goto qc24_fail_command;
 902         }
 903
 904         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 905                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 906                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 907                         ql_dbg(ql_dbg_io, vha, 0x3005,
 908                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 909                             atomic_read(&fcport->state),
 910                             atomic_read(&base_vha->loop_state));
 911                         cmd->result = DID_NO_CONNECT << 16;
 912                         goto qc24_fail_command;
 913                 }
 914                 goto qc24_target_busy;
 915         }
 916
 917         /*
 918          * Return target busy if we've received a non-zero retry_delay_timer
 919          * in a FCP_RSP.
 920          */
 921         if (fcport->retry_delay_timestamp == 0) {
 922                 /* retry delay not set */
 923         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 924                 fcport->retry_delay_timestamp = 0;
 925         else
 926                 goto qc24_target_busy;
 927
 928         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 929         if (!sp)
 930                 goto qc24_host_busy;
 931
 932         sp->u.scmd.cmd = cmd;
 933         sp->type = SRB_SCSI_CMD;
 934         atomic_set(&sp->ref_count, 1);
 935         CMD_SP(cmd) = (void *)sp;
 936         sp->free = qla2x00_sp_free_dma;
 937         sp->done = qla2x00_sp_compl;
 938
 939         rval = ha->isp_ops->start_scsi(sp);
 940         if (rval != QLA_SUCCESS) {
 941                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 942                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 943                 goto qc24_host_busy_free_sp;
 944         }
 945
 946         return 0;
 947
 948 qc24_host_busy_free_sp:
 949         sp->free(sp);
 950
 951 qc24_host_busy:
 952         return SCSI_MLQUEUE_HOST_BUSY;
 953
 954 qc24_target_busy:
 955         return SCSI_MLQUEUE_TARGET_BUSY;
 956
 957 qc24_fail_command:
 958         cmd->scsi_done(cmd);
 959
 960         return 0;
 961 }
 962
 963 /* For MQ supported I/O */
 964 int
 965 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 966     struct qla_qpair *qpair)
 967 {
 968         scsi_qla_host_t *vha = shost_priv(host);
 969         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 970         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 971         struct qla_hw_data *ha = vha->hw;
 972         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 973         srb_t *sp;
 974         int rval;
 975
 976         rval = fc_remote_port_chkready(rport);
 977         if (rval) {
 978                 cmd->result = rval;
 979                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 980                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 981                     cmd, rval);
 982                 goto qc24_fail_command;
 983         }
 984
 985         if (!fcport) {
 986                 cmd->result = DID_NO_CONNECT << 16;
 987                 goto qc24_fail_command;
 988         }
 989
 990         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 991                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 992                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 993                         ql_dbg(ql_dbg_io, vha, 0x3077,
 994                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 995                             atomic_read(&fcport->state),
 996                             atomic_read(&base_vha->loop_state));
 997                         cmd->result = DID_NO_CONNECT << 16;
 998                         goto qc24_fail_command;
 999                 }
1000                 goto qc24_target_busy;
1001         }
1002
1003         /*
1004          * Return target busy if we've received a non-zero retry_delay_timer
1005          * in a FCP_RSP.
1006          */
1007         if (fcport->retry_delay_timestamp == 0) {
1008                 /* retry delay not set */
1009         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1010                 fcport->retry_delay_timestamp = 0;
1011         else
1012                 goto qc24_target_busy;
1013
1014         sp = qla2xxx_get_qpair_sp(vha, qpair, fcport, GFP_ATOMIC);
1015         if (!sp)
1016                 goto qc24_host_busy;
1017
1018         sp->u.scmd.cmd = cmd;
1019         sp->type = SRB_SCSI_CMD;
1020         atomic_set(&sp->ref_count, 1);
1021         CMD_SP(cmd) = (void *)sp;
1022         sp->free = qla2xxx_qpair_sp_free_dma;
1023         sp->done = qla2xxx_qpair_sp_compl;
1024         sp->qpair = qpair;
1025
1026         rval = ha->isp_ops->start_scsi_mq(sp);
1027         if (rval != QLA_SUCCESS) {
1028                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1029                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1030                 if (rval == QLA_INTERFACE_ERROR)
1031                         goto qc24_fail_command;
1032                 goto qc24_host_busy_free_sp;
1033         }
1034
1035         return 0;
1036
1037 qc24_host_busy_free_sp:
1038         sp->free(sp);
1039
1040 qc24_host_busy:
1041         return SCSI_MLQUEUE_HOST_BUSY;
1042
1043 qc24_target_busy:
1044         return SCSI_MLQUEUE_TARGET_BUSY;
1045
1046 qc24_fail_command:
1047         cmd->scsi_done(cmd);
1048
1049         return 0;
1050 }
1051
1052 /*
1053  * qla2x00_eh_wait_on_command
1054  *    Waits for the command to be returned by the Firmware for some
1055  *    max time.
1056  *
1057  * Input:
1058  *    cmd = Scsi Command to wait on.
1059  *
1060  * Return:
1061  *    Not Found : 0
1062  *    Found : 1
1063  */
1064 static int
1065 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1066 {
1067 #define ABORT_POLLING_PERIOD    1000
1068 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1069         unsigned long wait_iter = ABORT_WAIT_ITER;
1070         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1071         struct qla_hw_data *ha = vha->hw;
1072         int ret = QLA_SUCCESS;
1073
1074         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1075                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1076                     "Return:eh_wait.\n");
1077                 return ret;
1078         }
1079
1080         while (CMD_SP(cmd) && wait_iter--) {
1081                 msleep(ABORT_POLLING_PERIOD);
1082         }
1083         if (CMD_SP(cmd))
1084                 ret = QLA_FUNCTION_FAILED;
1085
1086         return ret;
1087 }
1088
1089 /*
1090  * qla2x00_wait_for_hba_online
1091  *    Wait till the HBA is online after going through
1092  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1093  *    finally HBA is disabled ie marked offline
1094  *
1095  * Input:
1096  *     ha - pointer to host adapter structure
1097  *
1098  * Note:
1099  *    Does context switching-Release SPIN_LOCK
1100  *    (if any) before calling this routine.
1101  *
1102  * Return:
1103  *    Success (Adapter is online) : 0
1104  *    Failed  (Adapter is offline/disabled) : 1
1105  */
1106 int
1107 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1108 {
1109         int             return_status;
1110         unsigned long   wait_online;
1111         struct qla_hw_data *ha = vha->hw;
1112         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1113
1114         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1115         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1116             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1117             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1118             ha->dpc_active) && time_before(jiffies, wait_online)) {
1119
1120                 msleep(1000);
1121         }
1122         if (base_vha->flags.online)
1123                 return_status = QLA_SUCCESS;
1124         else
1125                 return_status = QLA_FUNCTION_FAILED;
1126
1127         return (return_status);
1128 }
1129
1130 static inline int test_fcport_count(scsi_qla_host_t *vha)
1131 {
1132         struct qla_hw_data *ha = vha->hw;
1133         unsigned long flags;
1134         int res;
1135
1136         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1137         ql_dbg(ql_dbg_init, vha, 0x00ec,
1138             "tgt %p, fcport_count=%d\n",
1139             vha, vha->fcport_count);
1140         res = (vha->fcport_count == 0);
1141         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1142
1143         return res;
1144 }
1145
1146 /*
1147  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1148  * it has dependency on UNLOADING flag to stop device discovery
1149  */
1150 void
1151 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1152 {
1153         qla2x00_mark_all_devices_lost(vha, 0);
1154
1155         wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1156 }
1157
1158 /*
1159  * qla2x00_wait_for_hba_ready
1160  * Wait till the HBA is ready before doing driver unload
1161  *
1162  * Input:
1163  *     ha - pointer to host adapter structure
1164  *
1165  * Note:
1166  *    Does context switching-Release SPIN_LOCK
1167  *    (if any) before calling this routine.
1168  *
1169  */
1170 static void
1171 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1172 {
1173         struct qla_hw_data *ha = vha->hw;
1174         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1175
1176         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1177                 ha->flags.mbox_busy) ||
1178                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1179                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1180                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1181                         break;
1182                 msleep(1000);
1183         }
1184 }
1185
1186 int
1187 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1188 {
1189         int             return_status;
1190         unsigned long   wait_reset;
1191         struct qla_hw_data *ha = vha->hw;
1192         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1193
1194         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1195         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1196             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1197             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1198             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1199
1200                 msleep(1000);
1201
1202                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1203                     ha->flags.chip_reset_done)
1204                         break;
1205         }
1206         if (ha->flags.chip_reset_done)
1207                 return_status = QLA_SUCCESS;
1208         else
1209                 return_status = QLA_FUNCTION_FAILED;
1210
1211         return return_status;
1212 }
1213
1214 static int
1215 sp_get(struct srb *sp)
1216 {
1217         if (!refcount_inc_not_zero((refcount_t*)&sp->ref_count))
1218                 /* kref get fail */
1219                 return ENXIO;
1220         else
1221                 return 0;
1222 }
1223
1224 #define ISP_REG_DISCONNECT 0xffffffffU
1225 /**************************************************************************
1226 * qla2x00_isp_reg_stat
1227 *
1228 * Description:
1229 *       Read the host status register of ISP before aborting the command.
1230 *
1231 * Input:
1232 *       ha = pointer to host adapter structure.
1233 *
1234 *
1235 * Returns:
1236 *       Either true or false.
1237 *
1238 * Note: Return true if there is register disconnect.
1239 **************************************************************************/
1240 static inline
1241 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1242 {
1243         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1244         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1245
1246         if (IS_P3P_TYPE(ha))
1247                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1248         else
1249                 return ((RD_REG_DWORD(&reg->host_status)) ==
1250                         ISP_REG_DISCONNECT);
1251 }
1252
1253 /**************************************************************************
1254 * qla2xxx_eh_abort
1255 *
1256 * Description:
1257 *    The abort function will abort the specified command.
1258 *
1259 * Input:
1260 *    cmd = Linux SCSI command packet to be aborted.
1261 *
1262 * Returns:
1263 *    Either SUCCESS or FAILED.
1264 *
1265 * Note:
1266 *    Only return FAILED if command not returned by firmware.
1267 **************************************************************************/
1268 static int
1269 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1270 {
1271         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1272         srb_t *sp;
1273         int ret;
1274         unsigned int id;
1275         uint64_t lun;
1276         unsigned long flags;
1277         int rval, wait = 0;
1278         struct qla_hw_data *ha = vha->hw;
1279         struct qla_qpair *qpair;
1280
1281         if (qla2x00_isp_reg_stat(ha)) {
1282                 ql_log(ql_log_info, vha, 0x8042,
1283                     "PCI/Register disconnect, exiting.\n");
1284                 return FAILED;
1285         }
1286
1287         ret = fc_block_scsi_eh(cmd);
1288         if (ret != 0)
1289                 return ret;
1290         ret = SUCCESS;
1291
1292         sp = (srb_t *) CMD_SP(cmd);
1293         if (!sp)
1294                 return SUCCESS;
1295
1296         qpair = sp->qpair;
1297         if (!qpair)
1298                 return SUCCESS;
1299
1300         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1301         if (!CMD_SP(cmd)) {
1302                 /* there's a chance an interrupt could clear
1303                    the ptr as part of done & free */
1304                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1305                 return SUCCESS;
1306         }
1307
1308         if (sp_get(sp)){
1309                 /* ref_count is already 0 */
1310                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1311                 return SUCCESS;
1312         }
1313         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1314
1315         id = cmd->device->id;
1316         lun = cmd->device->lun;
1317
1318         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1319             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1320             vha->host_no, id, lun, sp, cmd, sp->handle);
1321
1322         /* Get a reference to the sp and drop the lock.*/
1323
1324         rval = ha->isp_ops->abort_command(sp);
1325         if (rval) {
1326                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1327                         ret = SUCCESS;
1328                 else
1329                         ret = FAILED;
1330
1331                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1332                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1333         } else {
1334                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1335                     "Abort command mbx success cmd=%p.\n", cmd);
1336                 wait = 1;
1337         }
1338
1339         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1340         /*
1341          * Clear the slot in the oustanding_cmds array if we can't find the
1342          * command to reclaim the resources.
1343          */
1344         if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1345                 vha->req->outstanding_cmds[sp->handle] = NULL;
1346
1347         /*
1348          * sp->done will do ref_count--
1349          * sp_get() took an extra count above
1350          */
1351         sp->done(sp, DID_RESET << 16);
1352
1353         /* Did the command return during mailbox execution? */
1354         if (ret == FAILED && !CMD_SP(cmd))
1355                 ret = SUCCESS;
1356
1357         if (!CMD_SP(cmd))
1358                 wait = 0;
1359
1360         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1361
1362         /* Wait for the command to be returned. */
1363         if (wait) {
1364                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1365                         ql_log(ql_log_warn, vha, 0x8006,
1366                             "Abort handler timed out cmd=%p.\n", cmd);
1367                         ret = FAILED;
1368                 }
1369         }
1370
1371         ql_log(ql_log_info, vha, 0x801c,
1372             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1373             vha->host_no, id, lun, wait, ret);
1374
1375         return ret;
1376 }
1377
1378 int
1379 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1380         uint64_t l, enum nexus_wait_type type)
1381 {
1382         int cnt, match, status;
1383         unsigned long flags;
1384         struct qla_hw_data *ha = vha->hw;
1385         struct req_que *req;
1386         srb_t *sp;
1387         struct scsi_cmnd *cmd;
1388
1389         status = QLA_SUCCESS;
1390
1391         spin_lock_irqsave(&ha->hardware_lock, flags);
1392         req = vha->req;
1393         for (cnt = 1; status == QLA_SUCCESS &&
1394                 cnt < req->num_outstanding_cmds; cnt++) {
1395                 sp = req->outstanding_cmds[cnt];
1396                 if (!sp)
1397                         continue;
1398                 if (sp->type != SRB_SCSI_CMD)
1399                         continue;
1400                 if (vha->vp_idx != sp->vha->vp_idx)
1401                         continue;
1402                 match = 0;
1403                 cmd = GET_CMD_SP(sp);
1404                 switch (type) {
1405                 case WAIT_HOST:
1406                         match = 1;
1407                         break;
1408                 case WAIT_TARGET:
1409                         match = cmd->device->id == t;
1410                         break;
1411                 case WAIT_LUN:
1412                         match = (cmd->device->id == t &&
1413                                 cmd->device->lun == l);
1414                         break;
1415                 }
1416                 if (!match)
1417                         continue;
1418
1419                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1420                 status = qla2x00_eh_wait_on_command(cmd);
1421                 spin_lock_irqsave(&ha->hardware_lock, flags);
1422         }
1423         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1424
1425         return status;
1426 }
1427
1428 static char *reset_errors[] = {
1429         "HBA not online",
1430         "HBA not ready",
1431         "Task management failed",
1432         "Waiting for command completions",
1433 };
1434
1435 static int
1436 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1437     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1438 {
1439         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1440         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1441         int err;
1442
1443         if (!fcport) {
1444                 return FAILED;
1445         }
1446
1447         err = fc_block_scsi_eh(cmd);
1448         if (err != 0)
1449                 return err;
1450
1451         ql_log(ql_log_info, vha, 0x8009,
1452             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1453             cmd->device->id, cmd->device->lun, cmd);
1454
1455         err = 0;
1456         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1457                 ql_log(ql_log_warn, vha, 0x800a,
1458                     "Wait for hba online failed for cmd=%p.\n", cmd);
1459                 goto eh_reset_failed;
1460         }
1461         err = 2;
1462         if (do_reset(fcport, cmd->device->lun, blk_mq_rq_cpu(cmd->request) + 1)
1463                 != QLA_SUCCESS) {
1464                 ql_log(ql_log_warn, vha, 0x800c,
1465                     "do_reset failed for cmd=%p.\n", cmd);
1466                 goto eh_reset_failed;
1467         }
1468         err = 3;
1469         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1470             cmd->device->lun, type) != QLA_SUCCESS) {
1471                 ql_log(ql_log_warn, vha, 0x800d,
1472                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1473                 goto eh_reset_failed;
1474         }
1475
1476         ql_log(ql_log_info, vha, 0x800e,
1477             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1478             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1479
1480         return SUCCESS;
1481
1482 eh_reset_failed:
1483         ql_log(ql_log_info, vha, 0x800f,
1484             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1485             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1486             cmd);
1487         return FAILED;
1488 }
1489
1490 static int
1491 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1492 {
1493         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1494         struct qla_hw_data *ha = vha->hw;
1495
1496         if (qla2x00_isp_reg_stat(ha)) {
1497                 ql_log(ql_log_info, vha, 0x803e,
1498                     "PCI/Register disconnect, exiting.\n");
1499                 return FAILED;
1500         }
1501
1502         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1503             ha->isp_ops->lun_reset);
1504 }
1505
1506 static int
1507 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1508 {
1509         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1510         struct qla_hw_data *ha = vha->hw;
1511
1512         if (qla2x00_isp_reg_stat(ha)) {
1513                 ql_log(ql_log_info, vha, 0x803f,
1514                     "PCI/Register disconnect, exiting.\n");
1515                 return FAILED;
1516         }
1517
1518         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1519             ha->isp_ops->target_reset);
1520 }
1521
1522 /**************************************************************************
1523 * qla2xxx_eh_bus_reset
1524 *
1525 * Description:
1526 *    The bus reset function will reset the bus and abort any executing
1527 *    commands.
1528 *
1529 * Input:
1530 *    cmd = Linux SCSI command packet of the command that cause the
1531 *          bus reset.
1532 *
1533 * Returns:
1534 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1535 *
1536 **************************************************************************/
1537 static int
1538 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1539 {
1540         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1541         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1542         int ret = FAILED;
1543         unsigned int id;
1544         uint64_t lun;
1545         struct qla_hw_data *ha = vha->hw;
1546
1547         if (qla2x00_isp_reg_stat(ha)) {
1548                 ql_log(ql_log_info, vha, 0x8040,
1549                     "PCI/Register disconnect, exiting.\n");
1550                 return FAILED;
1551         }
1552
1553         id = cmd->device->id;
1554         lun = cmd->device->lun;
1555
1556         if (!fcport) {
1557                 return ret;
1558         }
1559
1560         ret = fc_block_scsi_eh(cmd);
1561         if (ret != 0)
1562                 return ret;
1563         ret = FAILED;
1564
1565         ql_log(ql_log_info, vha, 0x8012,
1566             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1567
1568         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1569                 ql_log(ql_log_fatal, vha, 0x8013,
1570                     "Wait for hba online failed board disabled.\n");
1571                 goto eh_bus_reset_done;
1572         }
1573
1574         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1575                 ret = SUCCESS;
1576
1577         if (ret == FAILED)
1578                 goto eh_bus_reset_done;
1579
1580         /* Flush outstanding commands. */
1581         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1582             QLA_SUCCESS) {
1583                 ql_log(ql_log_warn, vha, 0x8014,
1584                     "Wait for pending commands failed.\n");
1585                 ret = FAILED;
1586         }
1587
1588 eh_bus_reset_done:
1589         ql_log(ql_log_warn, vha, 0x802b,
1590             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1591             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1592
1593         return ret;
1594 }
1595
1596 /**************************************************************************
1597 * qla2xxx_eh_host_reset
1598 *
1599 * Description:
1600 *    The reset function will reset the Adapter.
1601 *
1602 * Input:
1603 *      cmd = Linux SCSI command packet of the command that cause the
1604 *            adapter reset.
1605 *
1606 * Returns:
1607 *      Either SUCCESS or FAILED.
1608 *
1609 * Note:
1610 **************************************************************************/
1611 static int
1612 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1613 {
1614         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1615         struct qla_hw_data *ha = vha->hw;
1616         int ret = FAILED;
1617         unsigned int id;
1618         uint64_t lun;
1619         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1620
1621         if (qla2x00_isp_reg_stat(ha)) {
1622                 ql_log(ql_log_info, vha, 0x8041,
1623                     "PCI/Register disconnect, exiting.\n");
1624                 schedule_work(&ha->board_disable);
1625                 return SUCCESS;
1626         }
1627
1628         id = cmd->device->id;
1629         lun = cmd->device->lun;
1630
1631         ql_log(ql_log_info, vha, 0x8018,
1632             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1633
1634         /*
1635          * No point in issuing another reset if one is active.  Also do not
1636          * attempt a reset if we are updating flash.
1637          */
1638         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1639                 goto eh_host_reset_lock;
1640
1641         if (vha != base_vha) {
1642                 if (qla2x00_vp_abort_isp(vha))
1643                         goto eh_host_reset_lock;
1644         } else {
1645                 if (IS_P3P_TYPE(vha->hw)) {
1646                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1647                                 /* Ctx reset success */
1648                                 ret = SUCCESS;
1649                                 goto eh_host_reset_lock;
1650                         }
1651                         /* fall thru if ctx reset failed */
1652                 }
1653                 if (ha->wq)
1654                         flush_workqueue(ha->wq);
1655
1656                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1657                 if (ha->isp_ops->abort_isp(base_vha)) {
1658                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1659                         /* failed. schedule dpc to try */
1660                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1661
1662                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1663                                 ql_log(ql_log_warn, vha, 0x802a,
1664                                     "wait for hba online failed.\n");
1665                                 goto eh_host_reset_lock;
1666                         }
1667                 }
1668                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1669         }
1670
1671         /* Waiting for command to be returned to OS.*/
1672         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1673                 QLA_SUCCESS)
1674                 ret = SUCCESS;
1675
1676 eh_host_reset_lock:
1677         ql_log(ql_log_info, vha, 0x8017,
1678             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1679             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1680
1681         return ret;
1682 }
1683
1684 /*
1685 * qla2x00_loop_reset
1686 *      Issue loop reset.
1687 *
1688 * Input:
1689 *      ha = adapter block pointer.
1690 *
1691 * Returns:
1692 *      0 = success
1693 */
1694 int
1695 qla2x00_loop_reset(scsi_qla_host_t *vha)
1696 {
1697         int ret;
1698         struct fc_port *fcport;
1699         struct qla_hw_data *ha = vha->hw;
1700
1701         if (IS_QLAFX00(ha)) {
1702                 return qlafx00_loop_reset(vha);
1703         }
1704
1705         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1706                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1707                         if (fcport->port_type != FCT_TARGET)
1708                                 continue;
1709
1710                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1711                         if (ret != QLA_SUCCESS) {
1712                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1713                                     "Bus Reset failed: Reset=%d "
1714                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1715                         }
1716                 }
1717         }
1718
1719
1720         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1721                 atomic_set(&vha->loop_state, LOOP_DOWN);
1722                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1723                 qla2x00_mark_all_devices_lost(vha, 0);
1724                 ret = qla2x00_full_login_lip(vha);
1725                 if (ret != QLA_SUCCESS) {
1726                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1727                             "full_login_lip=%d.\n", ret);
1728                 }
1729         }
1730
1731         if (ha->flags.enable_lip_reset) {
1732                 ret = qla2x00_lip_reset(vha);
1733                 if (ret != QLA_SUCCESS)
1734                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1735                             "lip_reset failed (%d).\n", ret);
1736         }
1737
1738         /* Issue marker command only when we are going to start the I/O */
1739         vha->marker_needed = 1;
1740
1741         return QLA_SUCCESS;
1742 }
1743
1744 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1745                               unsigned long *flags)
1746         __releases(qp->qp_lock_ptr)
1747         __acquires(qp->qp_lock_ptr)
1748 {
1749         scsi_qla_host_t *vha = qp->vha;
1750         struct qla_hw_data *ha = vha->hw;
1751
1752         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS) {
1753                 if (!sp_get(sp)) {
1754                         /* got sp */
1755                         spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1756                         qla_nvme_abort(ha, sp, res);
1757                         spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1758                 }
1759         } else if (GET_CMD_SP(sp) && !ha->flags.eeh_busy &&
1760                    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1761                    !qla2x00_isp_reg_stat(ha) && sp->type == SRB_SCSI_CMD) {
1762                 /*
1763                  * Don't abort commands in adapter during EEH recovery as it's
1764                  * not accessible/responding.
1765                  *
1766                  * Get a reference to the sp and drop the lock. The reference
1767                  * ensures this sp->done() call and not the call in
1768                  * qla2xxx_eh_abort() ends the SCSI cmd (with result 'res').
1769                  */
1770                 if (!sp_get(sp)) {
1771                         int status;
1772
1773                         spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1774                         status = qla2xxx_eh_abort(GET_CMD_SP(sp));
1775                         spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1776                         /*
1777                          * Get rid of extra reference caused
1778                          * by early exit from qla2xxx_eh_abort
1779                          */
1780                         if (status == FAST_IO_FAIL)
1781                                 atomic_dec(&sp->ref_count);
1782                 }
1783         }
1784         sp->done(sp, res);
1785 }
1786
1787 static void
1788 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1789 {
1790         int cnt;
1791         unsigned long flags;
1792         srb_t *sp;
1793         scsi_qla_host_t *vha = qp->vha;
1794         struct qla_hw_data *ha = vha->hw;
1795         struct req_que *req;
1796         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1797         struct qla_tgt_cmd *cmd;
1798
1799         if (!ha->req_q_map)
1800                 return;
1801         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1802         req = qp->req;
1803         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1804                 sp = req->outstanding_cmds[cnt];
1805                 if (sp) {
1806                         req->outstanding_cmds[cnt] = NULL;
1807                         switch (sp->cmd_type) {
1808                         case TYPE_SRB:
1809                                 qla2x00_abort_srb(qp, sp, res, &flags);
1810                                 break;
1811                         case TYPE_TGT_CMD:
1812                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1813                                     qla_ini_mode_enabled(vha)) {
1814                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1815                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1816                                             vha->dpc_flags);
1817                                         continue;
1818                                 }
1819                                 cmd = (struct qla_tgt_cmd *)sp;
1820                                 qlt_abort_cmd_on_host_reset(cmd->vha, cmd);
1821                                 break;
1822                         case TYPE_TGT_TMCMD:
1823                                 /*
1824                                  * Currently, only ABTS response gets on the
1825                                  * outstanding_cmds[]
1826                                  */
1827                                 ha->tgt.tgt_ops->free_mcmd(
1828                                    (struct qla_tgt_mgmt_cmd *)sp);
1829                                 break;
1830                         default:
1831                                 break;
1832                         }
1833                 }
1834         }
1835         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1836 }
1837
1838 void
1839 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1840 {
1841         int que;
1842         struct qla_hw_data *ha = vha->hw;
1843
1844         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1845
1846         for (que = 0; que < ha->max_qpairs; que++) {
1847                 if (!ha->queue_pair_map[que])
1848                         continue;
1849
1850                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1851         }
1852 }
1853
1854 static int
1855 qla2xxx_slave_alloc(struct scsi_device *sdev)
1856 {
1857         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1858
1859         if (!rport || fc_remote_port_chkready(rport))
1860                 return -ENXIO;
1861
1862         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1863
1864         return 0;
1865 }
1866
1867 static int
1868 qla2xxx_slave_configure(struct scsi_device *sdev)
1869 {
1870         scsi_qla_host_t *vha = shost_priv(sdev->host);
1871         struct req_que *req = vha->req;
1872
1873         if (IS_T10_PI_CAPABLE(vha->hw))
1874                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1875
1876         scsi_change_queue_depth(sdev, req->max_q_depth);
1877         return 0;
1878 }
1879
1880 static void
1881 qla2xxx_slave_destroy(struct scsi_device *sdev)
1882 {
1883         sdev->hostdata = NULL;
1884 }
1885
1886 /**
1887  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1888  * @ha: HA context
1889  *
1890  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1891  * supported addressing method.
1892  */
1893 static void
1894 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1895 {
1896         /* Assume a 32bit DMA mask. */
1897         ha->flags.enable_64bit_addressing = 0;
1898
1899         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1900                 /* Any upper-dword bits set? */
1901                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1902                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1903                         /* Ok, a 64bit DMA mask is applicable. */
1904                         ha->flags.enable_64bit_addressing = 1;
1905                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1906                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1907                         return;
1908                 }
1909         }
1910
1911         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1912         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1913 }
1914
1915 static void
1916 qla2x00_enable_intrs(struct qla_hw_data *ha)
1917 {
1918         unsigned long flags = 0;
1919         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1920
1921         spin_lock_irqsave(&ha->hardware_lock, flags);
1922         ha->interrupts_on = 1;
1923         /* enable risc and host interrupts */
1924         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1925         RD_REG_WORD(&reg->ictrl);
1926         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1927
1928 }
1929
1930 static void
1931 qla2x00_disable_intrs(struct qla_hw_data *ha)
1932 {
1933         unsigned long flags = 0;
1934         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1935
1936         spin_lock_irqsave(&ha->hardware_lock, flags);
1937         ha->interrupts_on = 0;
1938         /* disable risc and host interrupts */
1939         WRT_REG_WORD(&reg->ictrl, 0);
1940         RD_REG_WORD(&reg->ictrl);
1941         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1942 }
1943
1944 static void
1945 qla24xx_enable_intrs(struct qla_hw_data *ha)
1946 {
1947         unsigned long flags = 0;
1948         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1949
1950         spin_lock_irqsave(&ha->hardware_lock, flags);
1951         ha->interrupts_on = 1;
1952         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1953         RD_REG_DWORD(&reg->ictrl);
1954         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1955 }
1956
1957 static void
1958 qla24xx_disable_intrs(struct qla_hw_data *ha)
1959 {
1960         unsigned long flags = 0;
1961         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1962
1963         if (IS_NOPOLLING_TYPE(ha))
1964                 return;
1965         spin_lock_irqsave(&ha->hardware_lock, flags);
1966         ha->interrupts_on = 0;
1967         WRT_REG_DWORD(&reg->ictrl, 0);
1968         RD_REG_DWORD(&reg->ictrl);
1969         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1970 }
1971
1972 static int
1973 qla2x00_iospace_config(struct qla_hw_data *ha)
1974 {
1975         resource_size_t pio;
1976         uint16_t msix;
1977
1978         if (pci_request_selected_regions(ha->pdev, ha->bars,
1979             QLA2XXX_DRIVER_NAME)) {
1980                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1981                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1982                     pci_name(ha->pdev));
1983                 goto iospace_error_exit;
1984         }
1985         if (!(ha->bars & 1))
1986                 goto skip_pio;
1987
1988         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1989         pio = pci_resource_start(ha->pdev, 0);
1990         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1991                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1992                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1993                             "Invalid pci I/O region size (%s).\n",
1994                             pci_name(ha->pdev));
1995                         pio = 0;
1996                 }
1997         } else {
1998                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1999                     "Region #0 no a PIO resource (%s).\n",
2000                     pci_name(ha->pdev));
2001                 pio = 0;
2002         }
2003         ha->pio_address = pio;
2004         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
2005             "PIO address=%llu.\n",
2006             (unsigned long long)ha->pio_address);
2007
2008 skip_pio:
2009         /* Use MMIO operations for all accesses. */
2010         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
2011                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
2012                     "Region #1 not an MMIO resource (%s), aborting.\n",
2013                     pci_name(ha->pdev));
2014                 goto iospace_error_exit;
2015         }
2016         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
2017                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
2018                     "Invalid PCI mem region size (%s), aborting.\n",
2019                     pci_name(ha->pdev));
2020                 goto iospace_error_exit;
2021         }
2022
2023         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
2024         if (!ha->iobase) {
2025                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
2026                     "Cannot remap MMIO (%s), aborting.\n",
2027                     pci_name(ha->pdev));
2028                 goto iospace_error_exit;
2029         }
2030
2031         /* Determine queue resources */
2032         ha->max_req_queues = ha->max_rsp_queues = 1;
2033         ha->msix_count = QLA_BASE_VECTORS;
2034         if (!ql2xmqsupport || !ql2xnvmeenable ||
2035             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2036                 goto mqiobase_exit;
2037
2038         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2039                         pci_resource_len(ha->pdev, 3));
2040         if (ha->mqiobase) {
2041                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2042                     "MQIO Base=%p.\n", ha->mqiobase);
2043                 /* Read MSIX vector size of the board */
2044                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2045                 ha->msix_count = msix + 1;
2046                 /* Max queues are bounded by available msix vectors */
2047                 /* MB interrupt uses 1 vector */
2048                 ha->max_req_queues = ha->msix_count - 1;
2049                 ha->max_rsp_queues = ha->max_req_queues;
2050                 /* Queue pairs is the max value minus the base queue pair */
2051                 ha->max_qpairs = ha->max_rsp_queues - 1;
2052                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2053                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2054
2055                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2056                     "MSI-X vector count: %d.\n", ha->msix_count);
2057         } else
2058                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2059                     "BAR 3 not enabled.\n");
2060
2061 mqiobase_exit:
2062         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2063             "MSIX Count: %d.\n", ha->msix_count);
2064         return (0);
2065
2066 iospace_error_exit:
2067         return (-ENOMEM);
2068 }
2069
2070
2071 static int
2072 qla83xx_iospace_config(struct qla_hw_data *ha)
2073 {
2074         uint16_t msix;
2075
2076         if (pci_request_selected_regions(ha->pdev, ha->bars,
2077             QLA2XXX_DRIVER_NAME)) {
2078                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2079                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2080                     pci_name(ha->pdev));
2081
2082                 goto iospace_error_exit;
2083         }
2084
2085         /* Use MMIO operations for all accesses. */
2086         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2087                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2088                     "Invalid pci I/O region size (%s).\n",
2089                     pci_name(ha->pdev));
2090                 goto iospace_error_exit;
2091         }
2092         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2093                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2094                     "Invalid PCI mem region size (%s), aborting\n",
2095                         pci_name(ha->pdev));
2096                 goto iospace_error_exit;
2097         }
2098
2099         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2100         if (!ha->iobase) {
2101                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2102                     "Cannot remap MMIO (%s), aborting.\n",
2103                     pci_name(ha->pdev));
2104                 goto iospace_error_exit;
2105         }
2106
2107         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2108         /* 83XX 26XX always use MQ type access for queues
2109          * - mbar 2, a.k.a region 4 */
2110         ha->max_req_queues = ha->max_rsp_queues = 1;
2111         ha->msix_count = QLA_BASE_VECTORS;
2112         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2113                         pci_resource_len(ha->pdev, 4));
2114
2115         if (!ha->mqiobase) {
2116                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2117                     "BAR2/region4 not enabled\n");
2118                 goto mqiobase_exit;
2119         }
2120
2121         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2122                         pci_resource_len(ha->pdev, 2));
2123         if (ha->msixbase) {
2124                 /* Read MSIX vector size of the board */
2125                 pci_read_config_word(ha->pdev,
2126                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2127                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2128                 /*
2129                  * By default, driver uses at least two msix vectors
2130                  * (default & rspq)
2131                  */
2132                 if (ql2xmqsupport || ql2xnvmeenable) {
2133                         /* MB interrupt uses 1 vector */
2134                         ha->max_req_queues = ha->msix_count - 1;
2135
2136                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2137                         if (QLA_TGT_MODE_ENABLED())
2138                                 ha->max_req_queues--;
2139
2140                         ha->max_rsp_queues = ha->max_req_queues;
2141
2142                         /* Queue pairs is the max value minus
2143                          * the base queue pair */
2144                         ha->max_qpairs = ha->max_req_queues - 1;
2145                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2146                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2147                 }
2148                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2149                     "MSI-X vector count: %d.\n", ha->msix_count);
2150         } else
2151                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2152                     "BAR 1 not enabled.\n");
2153
2154 mqiobase_exit:
2155         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2156             "MSIX Count: %d.\n", ha->msix_count);
2157         return 0;
2158
2159 iospace_error_exit:
2160         return -ENOMEM;
2161 }
2162
2163 static struct isp_operations qla2100_isp_ops = {
2164         .pci_config             = qla2100_pci_config,
2165         .reset_chip             = qla2x00_reset_chip,
2166         .chip_diag              = qla2x00_chip_diag,
2167         .config_rings           = qla2x00_config_rings,
2168         .reset_adapter          = qla2x00_reset_adapter,
2169         .nvram_config           = qla2x00_nvram_config,
2170         .update_fw_options      = qla2x00_update_fw_options,
2171         .load_risc              = qla2x00_load_risc,
2172         .pci_info_str           = qla2x00_pci_info_str,
2173         .fw_version_str         = qla2x00_fw_version_str,
2174         .intr_handler           = qla2100_intr_handler,
2175         .enable_intrs           = qla2x00_enable_intrs,
2176         .disable_intrs          = qla2x00_disable_intrs,
2177         .abort_command          = qla2x00_abort_command,
2178         .target_reset           = qla2x00_abort_target,
2179         .lun_reset              = qla2x00_lun_reset,
2180         .fabric_login           = qla2x00_login_fabric,
2181         .fabric_logout          = qla2x00_fabric_logout,
2182         .calc_req_entries       = qla2x00_calc_iocbs_32,
2183         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2184         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2185         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2186         .read_nvram             = qla2x00_read_nvram_data,
2187         .write_nvram            = qla2x00_write_nvram_data,
2188         .fw_dump                = qla2100_fw_dump,
2189         .beacon_on              = NULL,
2190         .beacon_off             = NULL,
2191         .beacon_blink           = NULL,
2192         .read_optrom            = qla2x00_read_optrom_data,
2193         .write_optrom           = qla2x00_write_optrom_data,
2194         .get_flash_version      = qla2x00_get_flash_version,
2195         .start_scsi             = qla2x00_start_scsi,
2196         .start_scsi_mq          = NULL,
2197         .abort_isp              = qla2x00_abort_isp,
2198         .iospace_config         = qla2x00_iospace_config,
2199         .initialize_adapter     = qla2x00_initialize_adapter,
2200 };
2201
2202 static struct isp_operations qla2300_isp_ops = {
2203         .pci_config             = qla2300_pci_config,
2204         .reset_chip             = qla2x00_reset_chip,
2205         .chip_diag              = qla2x00_chip_diag,
2206         .config_rings           = qla2x00_config_rings,
2207         .reset_adapter          = qla2x00_reset_adapter,
2208         .nvram_config           = qla2x00_nvram_config,
2209         .update_fw_options      = qla2x00_update_fw_options,
2210         .load_risc              = qla2x00_load_risc,
2211         .pci_info_str           = qla2x00_pci_info_str,
2212         .fw_version_str         = qla2x00_fw_version_str,
2213         .intr_handler           = qla2300_intr_handler,
2214         .enable_intrs           = qla2x00_enable_intrs,
2215         .disable_intrs          = qla2x00_disable_intrs,
2216         .abort_command          = qla2x00_abort_command,
2217         .target_reset           = qla2x00_abort_target,
2218         .lun_reset              = qla2x00_lun_reset,
2219         .fabric_login           = qla2x00_login_fabric,
2220         .fabric_logout          = qla2x00_fabric_logout,
2221         .calc_req_entries       = qla2x00_calc_iocbs_32,
2222         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2223         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2224         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2225         .read_nvram             = qla2x00_read_nvram_data,
2226         .write_nvram            = qla2x00_write_nvram_data,
2227         .fw_dump                = qla2300_fw_dump,
2228         .beacon_on              = qla2x00_beacon_on,
2229         .beacon_off             = qla2x00_beacon_off,
2230         .beacon_blink           = qla2x00_beacon_blink,
2231         .read_optrom            = qla2x00_read_optrom_data,
2232         .write_optrom           = qla2x00_write_optrom_data,
2233         .get_flash_version      = qla2x00_get_flash_version,
2234         .start_scsi             = qla2x00_start_scsi,
2235         .start_scsi_mq          = NULL,
2236         .abort_isp              = qla2x00_abort_isp,
2237         .iospace_config         = qla2x00_iospace_config,
2238         .initialize_adapter     = qla2x00_initialize_adapter,
2239 };
2240
2241 static struct isp_operations qla24xx_isp_ops = {
2242         .pci_config             = qla24xx_pci_config,
2243         .reset_chip             = qla24xx_reset_chip,
2244         .chip_diag              = qla24xx_chip_diag,
2245         .config_rings           = qla24xx_config_rings,
2246         .reset_adapter          = qla24xx_reset_adapter,
2247         .nvram_config           = qla24xx_nvram_config,
2248         .update_fw_options      = qla24xx_update_fw_options,
2249         .load_risc              = qla24xx_load_risc,
2250         .pci_info_str           = qla24xx_pci_info_str,
2251         .fw_version_str         = qla24xx_fw_version_str,
2252         .intr_handler           = qla24xx_intr_handler,
2253         .enable_intrs           = qla24xx_enable_intrs,
2254         .disable_intrs          = qla24xx_disable_intrs,
2255         .abort_command          = qla24xx_abort_command,
2256         .target_reset           = qla24xx_abort_target,
2257         .lun_reset              = qla24xx_lun_reset,
2258         .fabric_login           = qla24xx_login_fabric,
2259         .fabric_logout          = qla24xx_fabric_logout,
2260         .calc_req_entries       = NULL,
2261         .build_iocbs            = NULL,
2262         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2263         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2264         .read_nvram             = qla24xx_read_nvram_data,
2265         .write_nvram            = qla24xx_write_nvram_data,
2266         .fw_dump                = qla24xx_fw_dump,
2267         .beacon_on              = qla24xx_beacon_on,
2268         .beacon_off             = qla24xx_beacon_off,
2269         .beacon_blink           = qla24xx_beacon_blink,
2270         .read_optrom            = qla24xx_read_optrom_data,
2271         .write_optrom           = qla24xx_write_optrom_data,
2272         .get_flash_version      = qla24xx_get_flash_version,
2273         .start_scsi             = qla24xx_start_scsi,
2274         .start_scsi_mq          = NULL,
2275         .abort_isp              = qla2x00_abort_isp,
2276         .iospace_config         = qla2x00_iospace_config,
2277         .initialize_adapter     = qla2x00_initialize_adapter,
2278 };
2279
2280 static struct isp_operations qla25xx_isp_ops = {
2281         .pci_config             = qla25xx_pci_config,
2282         .reset_chip             = qla24xx_reset_chip,
2283         .chip_diag              = qla24xx_chip_diag,
2284         .config_rings           = qla24xx_config_rings,
2285         .reset_adapter          = qla24xx_reset_adapter,
2286         .nvram_config           = qla24xx_nvram_config,
2287         .update_fw_options      = qla24xx_update_fw_options,
2288         .load_risc              = qla24xx_load_risc,
2289         .pci_info_str           = qla24xx_pci_info_str,
2290         .fw_version_str         = qla24xx_fw_version_str,
2291         .intr_handler           = qla24xx_intr_handler,
2292         .enable_intrs           = qla24xx_enable_intrs,
2293         .disable_intrs          = qla24xx_disable_intrs,
2294         .abort_command          = qla24xx_abort_command,
2295         .target_reset           = qla24xx_abort_target,
2296         .lun_reset              = qla24xx_lun_reset,
2297         .fabric_login           = qla24xx_login_fabric,
2298         .fabric_logout          = qla24xx_fabric_logout,
2299         .calc_req_entries       = NULL,
2300         .build_iocbs            = NULL,
2301         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2302         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2303         .read_nvram             = qla25xx_read_nvram_data,
2304         .write_nvram            = qla25xx_write_nvram_data,
2305         .fw_dump                = qla25xx_fw_dump,
2306         .beacon_on              = qla24xx_beacon_on,
2307         .beacon_off             = qla24xx_beacon_off,
2308         .beacon_blink           = qla24xx_beacon_blink,
2309         .read_optrom            = qla25xx_read_optrom_data,
2310         .write_optrom           = qla24xx_write_optrom_data,
2311         .get_flash_version      = qla24xx_get_flash_version,
2312         .start_scsi             = qla24xx_dif_start_scsi,
2313         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2314         .abort_isp              = qla2x00_abort_isp,
2315         .iospace_config         = qla2x00_iospace_config,
2316         .initialize_adapter     = qla2x00_initialize_adapter,
2317 };
2318
2319 static struct isp_operations qla81xx_isp_ops = {
2320         .pci_config             = qla25xx_pci_config,
2321         .reset_chip             = qla24xx_reset_chip,
2322         .chip_diag              = qla24xx_chip_diag,
2323         .config_rings           = qla24xx_config_rings,
2324         .reset_adapter          = qla24xx_reset_adapter,
2325         .nvram_config           = qla81xx_nvram_config,
2326         .update_fw_options      = qla81xx_update_fw_options,
2327         .load_risc              = qla81xx_load_risc,
2328         .pci_info_str           = qla24xx_pci_info_str,
2329         .fw_version_str         = qla24xx_fw_version_str,
2330         .intr_handler           = qla24xx_intr_handler,
2331         .enable_intrs           = qla24xx_enable_intrs,
2332         .disable_intrs          = qla24xx_disable_intrs,
2333         .abort_command          = qla24xx_abort_command,
2334         .target_reset           = qla24xx_abort_target,
2335         .lun_reset              = qla24xx_lun_reset,
2336         .fabric_login           = qla24xx_login_fabric,
2337         .fabric_logout          = qla24xx_fabric_logout,
2338         .calc_req_entries       = NULL,
2339         .build_iocbs            = NULL,
2340         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2341         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2342         .read_nvram             = NULL,
2343         .write_nvram            = NULL,
2344         .fw_dump                = qla81xx_fw_dump,
2345         .beacon_on              = qla24xx_beacon_on,
2346         .beacon_off             = qla24xx_beacon_off,
2347         .beacon_blink           = qla83xx_beacon_blink,
2348         .read_optrom            = qla25xx_read_optrom_data,
2349         .write_optrom           = qla24xx_write_optrom_data,
2350         .get_flash_version      = qla24xx_get_flash_version,
2351         .start_scsi             = qla24xx_dif_start_scsi,
2352         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2353         .abort_isp              = qla2x00_abort_isp,
2354         .iospace_config         = qla2x00_iospace_config,
2355         .initialize_adapter     = qla2x00_initialize_adapter,
2356 };
2357
2358 static struct isp_operations qla82xx_isp_ops = {
2359         .pci_config             = qla82xx_pci_config,
2360         .reset_chip             = qla82xx_reset_chip,
2361         .chip_diag              = qla24xx_chip_diag,
2362         .config_rings           = qla82xx_config_rings,
2363         .reset_adapter          = qla24xx_reset_adapter,
2364         .nvram_config           = qla81xx_nvram_config,
2365         .update_fw_options      = qla24xx_update_fw_options,
2366         .load_risc              = qla82xx_load_risc,
2367         .pci_info_str           = qla24xx_pci_info_str,
2368         .fw_version_str         = qla24xx_fw_version_str,
2369         .intr_handler           = qla82xx_intr_handler,
2370         .enable_intrs           = qla82xx_enable_intrs,
2371         .disable_intrs          = qla82xx_disable_intrs,
2372         .abort_command          = qla24xx_abort_command,
2373         .target_reset           = qla24xx_abort_target,
2374         .lun_reset              = qla24xx_lun_reset,
2375         .fabric_login           = qla24xx_login_fabric,
2376         .fabric_logout          = qla24xx_fabric_logout,
2377         .calc_req_entries       = NULL,
2378         .build_iocbs            = NULL,
2379         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2380         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2381         .read_nvram             = qla24xx_read_nvram_data,
2382         .write_nvram            = qla24xx_write_nvram_data,
2383         .fw_dump                = qla82xx_fw_dump,
2384         .beacon_on              = qla82xx_beacon_on,
2385         .beacon_off             = qla82xx_beacon_off,
2386         .beacon_blink           = NULL,
2387         .read_optrom            = qla82xx_read_optrom_data,
2388         .write_optrom           = qla82xx_write_optrom_data,
2389         .get_flash_version      = qla82xx_get_flash_version,
2390         .start_scsi             = qla82xx_start_scsi,
2391         .start_scsi_mq          = NULL,
2392         .abort_isp              = qla82xx_abort_isp,
2393         .iospace_config         = qla82xx_iospace_config,
2394         .initialize_adapter     = qla2x00_initialize_adapter,
2395 };
2396
2397 static struct isp_operations qla8044_isp_ops = {
2398         .pci_config             = qla82xx_pci_config,
2399         .reset_chip             = qla82xx_reset_chip,
2400         .chip_diag              = qla24xx_chip_diag,
2401         .config_rings           = qla82xx_config_rings,
2402         .reset_adapter          = qla24xx_reset_adapter,
2403         .nvram_config           = qla81xx_nvram_config,
2404         .update_fw_options      = qla24xx_update_fw_options,
2405         .load_risc              = qla82xx_load_risc,
2406         .pci_info_str           = qla24xx_pci_info_str,
2407         .fw_version_str         = qla24xx_fw_version_str,
2408         .intr_handler           = qla8044_intr_handler,
2409         .enable_intrs           = qla82xx_enable_intrs,
2410         .disable_intrs          = qla82xx_disable_intrs,
2411         .abort_command          = qla24xx_abort_command,
2412         .target_reset           = qla24xx_abort_target,
2413         .lun_reset              = qla24xx_lun_reset,
2414         .fabric_login           = qla24xx_login_fabric,
2415         .fabric_logout          = qla24xx_fabric_logout,
2416         .calc_req_entries       = NULL,
2417         .build_iocbs            = NULL,
2418         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2419         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2420         .read_nvram             = NULL,
2421         .write_nvram            = NULL,
2422         .fw_dump                = qla8044_fw_dump,
2423         .beacon_on              = qla82xx_beacon_on,
2424         .beacon_off             = qla82xx_beacon_off,
2425         .beacon_blink           = NULL,
2426         .read_optrom            = qla8044_read_optrom_data,
2427         .write_optrom           = qla8044_write_optrom_data,
2428         .get_flash_version      = qla82xx_get_flash_version,
2429         .start_scsi             = qla82xx_start_scsi,
2430         .start_scsi_mq          = NULL,
2431         .abort_isp              = qla8044_abort_isp,
2432         .iospace_config         = qla82xx_iospace_config,
2433         .initialize_adapter     = qla2x00_initialize_adapter,
2434 };
2435
2436 static struct isp_operations qla83xx_isp_ops = {
2437         .pci_config             = qla25xx_pci_config,
2438         .reset_chip             = qla24xx_reset_chip,
2439         .chip_diag              = qla24xx_chip_diag,
2440         .config_rings           = qla24xx_config_rings,
2441         .reset_adapter          = qla24xx_reset_adapter,
2442         .nvram_config           = qla81xx_nvram_config,
2443         .update_fw_options      = qla81xx_update_fw_options,
2444         .load_risc              = qla81xx_load_risc,
2445         .pci_info_str           = qla24xx_pci_info_str,
2446         .fw_version_str         = qla24xx_fw_version_str,
2447         .intr_handler           = qla24xx_intr_handler,
2448         .enable_intrs           = qla24xx_enable_intrs,
2449         .disable_intrs          = qla24xx_disable_intrs,
2450         .abort_command          = qla24xx_abort_command,
2451         .target_reset           = qla24xx_abort_target,
2452         .lun_reset              = qla24xx_lun_reset,
2453         .fabric_login           = qla24xx_login_fabric,
2454         .fabric_logout          = qla24xx_fabric_logout,
2455         .calc_req_entries       = NULL,
2456         .build_iocbs            = NULL,
2457         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2458         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2459         .read_nvram             = NULL,
2460         .write_nvram            = NULL,
2461         .fw_dump                = qla83xx_fw_dump,
2462         .beacon_on              = qla24xx_beacon_on,
2463         .beacon_off             = qla24xx_beacon_off,
2464         .beacon_blink           = qla83xx_beacon_blink,
2465         .read_optrom            = qla25xx_read_optrom_data,
2466         .write_optrom           = qla24xx_write_optrom_data,
2467         .get_flash_version      = qla24xx_get_flash_version,
2468         .start_scsi             = qla24xx_dif_start_scsi,
2469         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2470         .abort_isp              = qla2x00_abort_isp,
2471         .iospace_config         = qla83xx_iospace_config,
2472         .initialize_adapter     = qla2x00_initialize_adapter,
2473 };
2474
2475 static struct isp_operations qlafx00_isp_ops = {
2476         .pci_config             = qlafx00_pci_config,
2477         .reset_chip             = qlafx00_soft_reset,
2478         .chip_diag              = qlafx00_chip_diag,
2479         .config_rings           = qlafx00_config_rings,
2480         .reset_adapter          = qlafx00_soft_reset,
2481         .nvram_config           = NULL,
2482         .update_fw_options      = NULL,
2483         .load_risc              = NULL,
2484         .pci_info_str           = qlafx00_pci_info_str,
2485         .fw_version_str         = qlafx00_fw_version_str,
2486         .intr_handler           = qlafx00_intr_handler,
2487         .enable_intrs           = qlafx00_enable_intrs,
2488         .disable_intrs          = qlafx00_disable_intrs,
2489         .abort_command          = qla24xx_async_abort_command,
2490         .target_reset           = qlafx00_abort_target,
2491         .lun_reset              = qlafx00_lun_reset,
2492         .fabric_login           = NULL,
2493         .fabric_logout          = NULL,
2494         .calc_req_entries       = NULL,
2495         .build_iocbs            = NULL,
2496         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2497         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2498         .read_nvram             = qla24xx_read_nvram_data,
2499         .write_nvram            = qla24xx_write_nvram_data,
2500         .fw_dump                = NULL,
2501         .beacon_on              = qla24xx_beacon_on,
2502         .beacon_off             = qla24xx_beacon_off,
2503         .beacon_blink           = NULL,
2504         .read_optrom            = qla24xx_read_optrom_data,
2505         .write_optrom           = qla24xx_write_optrom_data,
2506         .get_flash_version      = qla24xx_get_flash_version,
2507         .start_scsi             = qlafx00_start_scsi,
2508         .start_scsi_mq          = NULL,
2509         .abort_isp              = qlafx00_abort_isp,
2510         .iospace_config         = qlafx00_iospace_config,
2511         .initialize_adapter     = qlafx00_initialize_adapter,
2512 };
2513
2514 static struct isp_operations qla27xx_isp_ops = {
2515         .pci_config             = qla25xx_pci_config,
2516         .reset_chip             = qla24xx_reset_chip,
2517         .chip_diag              = qla24xx_chip_diag,
2518         .config_rings           = qla24xx_config_rings,
2519         .reset_adapter          = qla24xx_reset_adapter,
2520         .nvram_config           = qla81xx_nvram_config,
2521         .update_fw_options      = qla81xx_update_fw_options,
2522         .load_risc              = qla81xx_load_risc,
2523         .pci_info_str           = qla24xx_pci_info_str,
2524         .fw_version_str         = qla24xx_fw_version_str,
2525         .intr_handler           = qla24xx_intr_handler,
2526         .enable_intrs           = qla24xx_enable_intrs,
2527         .disable_intrs          = qla24xx_disable_intrs,
2528         .abort_command          = qla24xx_abort_command,
2529         .target_reset           = qla24xx_abort_target,
2530         .lun_reset              = qla24xx_lun_reset,
2531         .fabric_login           = qla24xx_login_fabric,
2532         .fabric_logout          = qla24xx_fabric_logout,
2533         .calc_req_entries       = NULL,
2534         .build_iocbs            = NULL,
2535         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2536         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2537         .read_nvram             = NULL,
2538         .write_nvram            = NULL,
2539         .fw_dump                = qla27xx_fwdump,
2540         .beacon_on              = qla24xx_beacon_on,
2541         .beacon_off             = qla24xx_beacon_off,
2542         .beacon_blink           = qla83xx_beacon_blink,
2543         .read_optrom            = qla25xx_read_optrom_data,
2544         .write_optrom           = qla24xx_write_optrom_data,
2545         .get_flash_version      = qla24xx_get_flash_version,
2546         .start_scsi             = qla24xx_dif_start_scsi,
2547         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2548         .abort_isp              = qla2x00_abort_isp,
2549         .iospace_config         = qla83xx_iospace_config,
2550         .initialize_adapter     = qla2x00_initialize_adapter,
2551 };
2552
2553 static inline void
2554 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2555 {
2556         ha->device_type = DT_EXTENDED_IDS;
2557         switch (ha->pdev->device) {
2558         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2559                 ha->isp_type |= DT_ISP2100;
2560                 ha->device_type &= ~DT_EXTENDED_IDS;
2561                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2562                 break;
2563         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2564                 ha->isp_type |= DT_ISP2200;
2565                 ha->device_type &= ~DT_EXTENDED_IDS;
2566                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2567                 break;
2568         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2569                 ha->isp_type |= DT_ISP2300;
2570                 ha->device_type |= DT_ZIO_SUPPORTED;
2571                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2572                 break;
2573         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2574                 ha->isp_type |= DT_ISP2312;
2575                 ha->device_type |= DT_ZIO_SUPPORTED;
2576                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2577                 break;
2578         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2579                 ha->isp_type |= DT_ISP2322;
2580                 ha->device_type |= DT_ZIO_SUPPORTED;
2581                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2582                     ha->pdev->subsystem_device == 0x0170)
2583                         ha->device_type |= DT_OEM_001;
2584                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2585                 break;
2586         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2587                 ha->isp_type |= DT_ISP6312;
2588                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2589                 break;
2590         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2591                 ha->isp_type |= DT_ISP6322;
2592                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2593                 break;
2594         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2595                 ha->isp_type |= DT_ISP2422;
2596                 ha->device_type |= DT_ZIO_SUPPORTED;
2597                 ha->device_type |= DT_FWI2;
2598                 ha->device_type |= DT_IIDMA;
2599                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2600                 break;
2601         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2602                 ha->isp_type |= DT_ISP2432;
2603                 ha->device_type |= DT_ZIO_SUPPORTED;
2604                 ha->device_type |= DT_FWI2;
2605                 ha->device_type |= DT_IIDMA;
2606                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2607                 break;
2608         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2609                 ha->isp_type |= DT_ISP8432;
2610                 ha->device_type |= DT_ZIO_SUPPORTED;
2611                 ha->device_type |= DT_FWI2;
2612                 ha->device_type |= DT_IIDMA;
2613                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2614                 break;
2615         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2616                 ha->isp_type |= DT_ISP5422;
2617                 ha->device_type |= DT_FWI2;
2618                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2619                 break;
2620         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2621                 ha->isp_type |= DT_ISP5432;
2622                 ha->device_type |= DT_FWI2;
2623                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2624                 break;
2625         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2626                 ha->isp_type |= DT_ISP2532;
2627                 ha->device_type |= DT_ZIO_SUPPORTED;
2628                 ha->device_type |= DT_FWI2;
2629                 ha->device_type |= DT_IIDMA;
2630                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2631                 break;
2632         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2633                 ha->isp_type |= DT_ISP8001;
2634                 ha->device_type |= DT_ZIO_SUPPORTED;
2635                 ha->device_type |= DT_FWI2;
2636                 ha->device_type |= DT_IIDMA;
2637                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2638                 break;
2639         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2640                 ha->isp_type |= DT_ISP8021;
2641                 ha->device_type |= DT_ZIO_SUPPORTED;
2642                 ha->device_type |= DT_FWI2;
2643                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2644                 /* Initialize 82XX ISP flags */
2645                 qla82xx_init_flags(ha);
2646                 break;
2647          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2648                 ha->isp_type |= DT_ISP8044;
2649                 ha->device_type |= DT_ZIO_SUPPORTED;
2650                 ha->device_type |= DT_FWI2;
2651                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2652                 /* Initialize 82XX ISP flags */
2653                 qla82xx_init_flags(ha);
2654                 break;
2655         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2656                 ha->isp_type |= DT_ISP2031;
2657                 ha->device_type |= DT_ZIO_SUPPORTED;
2658                 ha->device_type |= DT_FWI2;
2659                 ha->device_type |= DT_IIDMA;
2660                 ha->device_type |= DT_T10_PI;
2661                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2662                 break;
2663         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2664                 ha->isp_type |= DT_ISP8031;
2665                 ha->device_type |= DT_ZIO_SUPPORTED;
2666                 ha->device_type |= DT_FWI2;
2667                 ha->device_type |= DT_IIDMA;
2668                 ha->device_type |= DT_T10_PI;
2669                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2670                 break;
2671         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2672                 ha->isp_type |= DT_ISPFX00;
2673                 break;
2674         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2675                 ha->isp_type |= DT_ISP2071;
2676                 ha->device_type |= DT_ZIO_SUPPORTED;
2677                 ha->device_type |= DT_FWI2;
2678                 ha->device_type |= DT_IIDMA;
2679                 ha->device_type |= DT_T10_PI;
2680                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2681                 break;
2682         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2683                 ha->isp_type |= DT_ISP2271;
2684                 ha->device_type |= DT_ZIO_SUPPORTED;
2685                 ha->device_type |= DT_FWI2;
2686                 ha->device_type |= DT_IIDMA;
2687                 ha->device_type |= DT_T10_PI;
2688                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2689                 break;
2690         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2691                 ha->isp_type |= DT_ISP2261;
2692                 ha->device_type |= DT_ZIO_SUPPORTED;
2693                 ha->device_type |= DT_FWI2;
2694                 ha->device_type |= DT_IIDMA;
2695                 ha->device_type |= DT_T10_PI;
2696                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2697                 break;
2698         }
2699
2700         if (IS_QLA82XX(ha))
2701                 ha->port_no = ha->portnum & 1;
2702         else {
2703                 /* Get adapter physical port no from interrupt pin register. */
2704                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2705                 if (IS_QLA27XX(ha))
2706                         ha->port_no--;
2707                 else
2708                         ha->port_no = !(ha->port_no & 1);
2709         }
2710
2711         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2712             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2713             ha->device_type, ha->port_no, ha->fw_srisc_address);
2714 }
2715
2716 static void
2717 qla2xxx_scan_start(struct Scsi_Host *shost)
2718 {
2719         scsi_qla_host_t *vha = shost_priv(shost);
2720
2721         if (vha->hw->flags.running_gold_fw)
2722                 return;
2723
2724         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2725         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2726         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2727         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2728 }
2729
2730 static int
2731 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2732 {
2733         scsi_qla_host_t *vha = shost_priv(shost);
2734
2735         if (test_bit(UNLOADING, &vha->dpc_flags))
2736                 return 1;
2737         if (!vha->host)
2738                 return 1;
2739         if (time > vha->hw->loop_reset_delay * HZ)
2740                 return 1;
2741
2742         return atomic_read(&vha->loop_state) == LOOP_READY;
2743 }
2744
2745 static void qla2x00_iocb_work_fn(struct work_struct *work)
2746 {
2747         struct scsi_qla_host *vha = container_of(work,
2748                 struct scsi_qla_host, iocb_work);
2749         struct qla_hw_data *ha = vha->hw;
2750         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2751         int i = 2;
2752         unsigned long flags;
2753
2754         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2755                 return;
2756
2757         while (!list_empty(&vha->work_list) && i > 0) {
2758                 qla2x00_do_work(vha);
2759                 i--;
2760         }
2761
2762         spin_lock_irqsave(&vha->work_lock, flags);
2763         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2764         spin_unlock_irqrestore(&vha->work_lock, flags);
2765 }
2766
2767 /*
2768  * PCI driver interface
2769  */
2770 static int
2771 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2772 {
2773         int     ret = -ENODEV;
2774         struct Scsi_Host *host;
2775         scsi_qla_host_t *base_vha = NULL;
2776         struct qla_hw_data *ha;
2777         char pci_info[30];
2778         char fw_str[30], wq_name[30];
2779         struct scsi_host_template *sht;
2780         int bars, mem_only = 0;
2781         uint16_t req_length = 0, rsp_length = 0;
2782         struct req_que *req = NULL;
2783         struct rsp_que *rsp = NULL;
2784         int i;
2785
2786         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2787         sht = &qla2xxx_driver_template;
2788         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2789             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2790             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2791             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2792             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2793             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2794             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2795             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2796             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2797             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2798             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2799             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2800             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2801             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2802             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2803                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2804                 mem_only = 1;
2805                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2806                     "Mem only adapter.\n");
2807         }
2808         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2809             "Bars=%d.\n", bars);
2810
2811         if (mem_only) {
2812                 if (pci_enable_device_mem(pdev))
2813                         return ret;
2814         } else {
2815                 if (pci_enable_device(pdev))
2816                         return ret;
2817         }
2818
2819         /* This may fail but that's ok */
2820         pci_enable_pcie_error_reporting(pdev);
2821
2822         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2823         if (!ha) {
2824                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2825                     "Unable to allocate memory for ha.\n");
2826                 goto disable_device;
2827         }
2828         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2829             "Memory allocated for ha=%p.\n", ha);
2830         ha->pdev = pdev;
2831         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2832         spin_lock_init(&ha->tgt.q_full_lock);
2833         spin_lock_init(&ha->tgt.sess_lock);
2834         spin_lock_init(&ha->tgt.atio_lock);
2835
2836         atomic_set(&ha->nvme_active_aen_cnt, 0);
2837
2838         /* Clear our data area */
2839         ha->bars = bars;
2840         ha->mem_only = mem_only;
2841         spin_lock_init(&ha->hardware_lock);
2842         spin_lock_init(&ha->vport_slock);
2843         mutex_init(&ha->selflogin_lock);
2844         mutex_init(&ha->optrom_mutex);
2845
2846         /* Set ISP-type information. */
2847         qla2x00_set_isp_flags(ha);
2848
2849         /* Set EEH reset type to fundamental if required by hba */
2850         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2851             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2852                 pdev->needs_freset = 1;
2853
2854         ha->prev_topology = 0;
2855         ha->init_cb_size = sizeof(init_cb_t);
2856         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2857         ha->optrom_size = OPTROM_SIZE_2300;
2858         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2859         atomic_set(&ha->num_pend_mbx_stage1, 0);
2860         atomic_set(&ha->num_pend_mbx_stage2, 0);
2861         atomic_set(&ha->num_pend_mbx_stage3, 0);
2862         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2863         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2864
2865         /* Assign ISP specific operations. */
2866         if (IS_QLA2100(ha)) {
2867                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2868                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2869                 req_length = REQUEST_ENTRY_CNT_2100;
2870                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2871                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2872                 ha->gid_list_info_size = 4;
2873                 ha->flash_conf_off = ~0;
2874                 ha->flash_data_off = ~0;
2875                 ha->nvram_conf_off = ~0;
2876                 ha->nvram_data_off = ~0;
2877                 ha->isp_ops = &qla2100_isp_ops;
2878         } else if (IS_QLA2200(ha)) {
2879                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2880                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2881                 req_length = REQUEST_ENTRY_CNT_2200;
2882                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2883                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2884                 ha->gid_list_info_size = 4;
2885                 ha->flash_conf_off = ~0;
2886                 ha->flash_data_off = ~0;
2887                 ha->nvram_conf_off = ~0;
2888                 ha->nvram_data_off = ~0;
2889                 ha->isp_ops = &qla2100_isp_ops;
2890         } else if (IS_QLA23XX(ha)) {
2891                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2892                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2893                 req_length = REQUEST_ENTRY_CNT_2200;
2894                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2895                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2896                 ha->gid_list_info_size = 6;
2897                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2898                         ha->optrom_size = OPTROM_SIZE_2322;
2899                 ha->flash_conf_off = ~0;
2900                 ha->flash_data_off = ~0;
2901                 ha->nvram_conf_off = ~0;
2902                 ha->nvram_data_off = ~0;
2903                 ha->isp_ops = &qla2300_isp_ops;
2904         } else if (IS_QLA24XX_TYPE(ha)) {
2905                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2906                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2907                 req_length = REQUEST_ENTRY_CNT_24XX;
2908                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2909                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2910                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2911                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2912                 ha->gid_list_info_size = 8;
2913                 ha->optrom_size = OPTROM_SIZE_24XX;
2914                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2915                 ha->isp_ops = &qla24xx_isp_ops;
2916                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2917                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2918                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2919                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2920         } else if (IS_QLA25XX(ha)) {
2921                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2922                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2923                 req_length = REQUEST_ENTRY_CNT_24XX;
2924                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2925                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2926                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2927                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2928                 ha->gid_list_info_size = 8;
2929                 ha->optrom_size = OPTROM_SIZE_25XX;
2930                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2931                 ha->isp_ops = &qla25xx_isp_ops;
2932                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2933                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2934                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2935                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2936         } else if (IS_QLA81XX(ha)) {
2937                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2938                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2939                 req_length = REQUEST_ENTRY_CNT_24XX;
2940                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2941                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2942                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2943                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2944                 ha->gid_list_info_size = 8;
2945                 ha->optrom_size = OPTROM_SIZE_81XX;
2946                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2947                 ha->isp_ops = &qla81xx_isp_ops;
2948                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2949                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2950                 ha->nvram_conf_off = ~0;
2951                 ha->nvram_data_off = ~0;
2952         } else if (IS_QLA82XX(ha)) {
2953                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2954                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2955                 req_length = REQUEST_ENTRY_CNT_82XX;
2956                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2957                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2958                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2959                 ha->gid_list_info_size = 8;
2960                 ha->optrom_size = OPTROM_SIZE_82XX;
2961                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2962                 ha->isp_ops = &qla82xx_isp_ops;
2963                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2964                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2965                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2966                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2967         } else if (IS_QLA8044(ha)) {
2968                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2969                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2970                 req_length = REQUEST_ENTRY_CNT_82XX;
2971                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2972                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2973                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2974                 ha->gid_list_info_size = 8;
2975                 ha->optrom_size = OPTROM_SIZE_83XX;
2976                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2977                 ha->isp_ops = &qla8044_isp_ops;
2978                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2979                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2980                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2981                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2982         } else if (IS_QLA83XX(ha)) {
2983                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2984                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2985                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2986                 req_length = REQUEST_ENTRY_CNT_83XX;
2987                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2988                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2989                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2990                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2991                 ha->gid_list_info_size = 8;
2992                 ha->optrom_size = OPTROM_SIZE_83XX;
2993                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2994                 ha->isp_ops = &qla83xx_isp_ops;
2995                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2996                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2997                 ha->nvram_conf_off = ~0;
2998                 ha->nvram_data_off = ~0;
2999         }  else if (IS_QLAFX00(ha)) {
3000                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3001                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3002                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3003                 req_length = REQUEST_ENTRY_CNT_FX00;
3004                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3005                 ha->isp_ops = &qlafx00_isp_ops;
3006                 ha->port_down_retry_count = 30; /* default value */
3007                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3008                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3009                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3010                 ha->mr.fw_hbt_en = 1;
3011                 ha->mr.host_info_resend = false;
3012                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3013         } else if (IS_QLA27XX(ha)) {
3014                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3015                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3016                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3017                 req_length = REQUEST_ENTRY_CNT_83XX;
3018                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3019                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3020                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3021                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3022                 ha->gid_list_info_size = 8;
3023                 ha->optrom_size = OPTROM_SIZE_83XX;
3024                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3025                 ha->isp_ops = &qla27xx_isp_ops;
3026                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3027                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3028                 ha->nvram_conf_off = ~0;
3029                 ha->nvram_data_off = ~0;
3030         }
3031
3032         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3033             "mbx_count=%d, req_length=%d, "
3034             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3035             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3036             "max_fibre_devices=%d.\n",
3037             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3038             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3039             ha->nvram_npiv_size, ha->max_fibre_devices);
3040         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3041             "isp_ops=%p, flash_conf_off=%d, "
3042             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3043             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3044             ha->nvram_conf_off, ha->nvram_data_off);
3045
3046         /* Configure PCI I/O space */
3047         ret = ha->isp_ops->iospace_config(ha);
3048         if (ret)
3049                 goto iospace_config_failed;
3050
3051         ql_log_pci(ql_log_info, pdev, 0x001d,
3052             "Found an ISP%04X irq %d iobase 0x%p.\n",
3053             pdev->device, pdev->irq, ha->iobase);
3054         mutex_init(&ha->vport_lock);
3055         mutex_init(&ha->mq_lock);
3056         init_completion(&ha->mbx_cmd_comp);
3057         complete(&ha->mbx_cmd_comp);
3058         init_completion(&ha->mbx_intr_comp);
3059         init_completion(&ha->dcbx_comp);
3060         init_completion(&ha->lb_portup_comp);
3061
3062         set_bit(0, (unsigned long *) ha->vp_idx_map);
3063
3064         qla2x00_config_dma_addressing(ha);
3065         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3066             "64 Bit addressing is %s.\n",
3067             ha->flags.enable_64bit_addressing ? "enable" :
3068             "disable");
3069         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3070         if (ret) {
3071                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3072                     "Failed to allocate memory for adapter, aborting.\n");
3073
3074                 goto probe_hw_failed;
3075         }
3076
3077         req->max_q_depth = MAX_Q_DEPTH;
3078         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3079                 req->max_q_depth = ql2xmaxqdepth;
3080
3081
3082         base_vha = qla2x00_create_host(sht, ha);
3083         if (!base_vha) {
3084                 ret = -ENOMEM;
3085                 goto probe_hw_failed;
3086         }
3087
3088         pci_set_drvdata(pdev, base_vha);
3089         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3090
3091         host = base_vha->host;
3092         base_vha->req = req;
3093         if (IS_QLA2XXX_MIDTYPE(ha))
3094                 base_vha->mgmt_svr_loop_id =
3095                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3096         else
3097                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3098                                                 base_vha->vp_idx;
3099
3100         /* Setup fcport template structure. */
3101         ha->mr.fcport.vha = base_vha;
3102         ha->mr.fcport.port_type = FCT_UNKNOWN;
3103         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3104         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3105         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3106         ha->mr.fcport.scan_state = 1;
3107
3108         /* Set the SG table size based on ISP type */
3109         if (!IS_FWI2_CAPABLE(ha)) {
3110                 if (IS_QLA2100(ha))
3111                         host->sg_tablesize = 32;
3112         } else {
3113                 if (!IS_QLA82XX(ha))
3114                         host->sg_tablesize = QLA_SG_ALL;
3115         }
3116         host->max_id = ha->max_fibre_devices;
3117         host->cmd_per_lun = 3;
3118         host->unique_id = host->host_no;
3119         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3120                 host->max_cmd_len = 32;
3121         else
3122                 host->max_cmd_len = MAX_CMDSZ;
3123         host->max_channel = MAX_BUSES - 1;
3124         /* Older HBAs support only 16-bit LUNs */
3125         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3126             ql2xmaxlun > 0xffff)
3127                 host->max_lun = 0xffff;
3128         else
3129                 host->max_lun = ql2xmaxlun;
3130         host->transportt = qla2xxx_transport_template;
3131         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3132
3133         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3134             "max_id=%d this_id=%d "
3135             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3136             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3137             host->this_id, host->cmd_per_lun, host->unique_id,
3138             host->max_cmd_len, host->max_channel, host->max_lun,
3139             host->transportt, sht->vendor_id);
3140
3141         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3142
3143         /* Set up the irqs */
3144         ret = qla2x00_request_irqs(ha, rsp);
3145         if (ret)
3146                 goto probe_failed;
3147
3148         /* Alloc arrays of request and response ring ptrs */
3149         ret = qla2x00_alloc_queues(ha, req, rsp);
3150         if (ret) {
3151                 ql_log(ql_log_fatal, base_vha, 0x003d,
3152                     "Failed to allocate memory for queue pointers..."
3153                     "aborting.\n");
3154                 goto probe_failed;
3155         }
3156
3157         if (ha->mqenable) {
3158                 /* number of hardware queues supported by blk/scsi-mq*/
3159                 host->nr_hw_queues = ha->max_qpairs;
3160
3161                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3162                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3163         } else {
3164                 if (ql2xnvmeenable) {
3165                         host->nr_hw_queues = ha->max_qpairs;
3166                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3167                             "FC-NVMe support is enabled, HW queues=%d\n",
3168                             host->nr_hw_queues);
3169                 } else {
3170                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3171                             "blk/scsi-mq disabled.\n");
3172                 }
3173         }
3174
3175         qlt_probe_one_stage1(base_vha, ha);
3176
3177         pci_save_state(pdev);
3178
3179         /* Assign back pointers */
3180         rsp->req = req;
3181         req->rsp = rsp;
3182
3183         if (IS_QLAFX00(ha)) {
3184                 ha->rsp_q_map[0] = rsp;
3185                 ha->req_q_map[0] = req;
3186                 set_bit(0, ha->req_qid_map);
3187                 set_bit(0, ha->rsp_qid_map);
3188         }
3189
3190         /* FWI2-capable only. */
3191         req->req_q_in = &ha->iobase->isp24.req_q_in;
3192         req->req_q_out = &ha->iobase->isp24.req_q_out;
3193         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3194         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3195         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3196                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3197                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3198                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3199                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3200         }
3201
3202         if (IS_QLAFX00(ha)) {
3203                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3204                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3205                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3206                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3207         }
3208
3209         if (IS_P3P_TYPE(ha)) {
3210                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3211                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3212                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3213         }
3214
3215         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3216             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3217             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3218         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3219             "req->req_q_in=%p req->req_q_out=%p "
3220             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3221             req->req_q_in, req->req_q_out,
3222             rsp->rsp_q_in, rsp->rsp_q_out);
3223         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3224             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3225             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3226         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3227             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3228             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3229
3230         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3231
3232         if (ha->isp_ops->initialize_adapter(base_vha)) {
3233                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3234                     "Failed to initialize adapter - Adapter flags %x.\n",
3235                     base_vha->device_flags);
3236
3237                 if (IS_QLA82XX(ha)) {
3238                         qla82xx_idc_lock(ha);
3239                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3240                                 QLA8XXX_DEV_FAILED);
3241                         qla82xx_idc_unlock(ha);
3242                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3243                             "HW State: FAILED.\n");
3244                 } else if (IS_QLA8044(ha)) {
3245                         qla8044_idc_lock(ha);
3246                         qla8044_wr_direct(base_vha,
3247                                 QLA8044_CRB_DEV_STATE_INDEX,
3248                                 QLA8XXX_DEV_FAILED);
3249                         qla8044_idc_unlock(ha);
3250                         ql_log(ql_log_fatal, base_vha, 0x0150,
3251                             "HW State: FAILED.\n");
3252                 }
3253
3254                 ret = -ENODEV;
3255                 goto probe_failed;
3256         }
3257
3258         if (IS_QLAFX00(ha))
3259                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3260         else
3261                 host->can_queue = req->num_outstanding_cmds - 10;
3262
3263         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3264             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3265             host->can_queue, base_vha->req,
3266             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3267
3268         if (ha->mqenable) {
3269                 bool startit = false;
3270
3271                 if (QLA_TGT_MODE_ENABLED())
3272                         startit = false;
3273
3274                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3275                         startit = true;
3276
3277                 /* Create start of day qpairs for Block MQ */
3278                 for (i = 0; i < ha->max_qpairs; i++)
3279                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3280         }
3281
3282         if (ha->flags.running_gold_fw)
3283                 goto skip_dpc;
3284
3285         /*
3286          * Startup the kernel thread for this host adapter
3287          */
3288         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3289             "%s_dpc", base_vha->host_str);
3290         if (IS_ERR(ha->dpc_thread)) {
3291                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3292                     "Failed to start DPC thread.\n");
3293                 ret = PTR_ERR(ha->dpc_thread);
3294                 ha->dpc_thread = NULL;
3295                 goto probe_failed;
3296         }
3297         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3298             "DPC thread started successfully.\n");
3299
3300         /*
3301          * If we're not coming up in initiator mode, we might sit for
3302          * a while without waking up the dpc thread, which leads to a
3303          * stuck process warning.  So just kick the dpc once here and
3304          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3305          */
3306         qla2xxx_wake_dpc(base_vha);
3307
3308         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3309
3310         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3311                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3312                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3313                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3314
3315                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3316                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3317                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3318                 INIT_WORK(&ha->idc_state_handler,
3319                     qla83xx_idc_state_handler_work);
3320                 INIT_WORK(&ha->nic_core_unrecoverable,
3321                     qla83xx_nic_core_unrecoverable_work);
3322         }
3323
3324 skip_dpc:
3325         list_add_tail(&base_vha->list, &ha->vp_list);
3326         base_vha->host->irq = ha->pdev->irq;
3327
3328         /* Initialized the timer */
3329         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3330         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3331             "Started qla2x00_timer with "
3332             "interval=%d.\n", WATCH_INTERVAL);
3333         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3334             "Detected hba at address=%p.\n",
3335             ha);
3336
3337         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3338                 if (ha->fw_attributes & BIT_4) {
3339                         int prot = 0, guard;
3340                         base_vha->flags.difdix_supported = 1;
3341                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3342                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3343                         if (ql2xenabledif == 1)
3344                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3345                         scsi_host_set_prot(host,
3346                             prot | SHOST_DIF_TYPE1_PROTECTION
3347                             | SHOST_DIF_TYPE2_PROTECTION
3348                             | SHOST_DIF_TYPE3_PROTECTION
3349                             | SHOST_DIX_TYPE1_PROTECTION
3350                             | SHOST_DIX_TYPE2_PROTECTION
3351                             | SHOST_DIX_TYPE3_PROTECTION);
3352
3353                         guard = SHOST_DIX_GUARD_CRC;
3354
3355                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3356                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3357                                 guard |= SHOST_DIX_GUARD_IP;
3358
3359                         scsi_host_set_guard(host, guard);
3360                 } else
3361                         base_vha->flags.difdix_supported = 0;
3362         }
3363
3364         ha->isp_ops->enable_intrs(ha);
3365
3366         if (IS_QLAFX00(ha)) {
3367                 ret = qlafx00_fx_disc(base_vha,
3368                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3369                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3370                     QLA_SG_ALL : 128;
3371         }
3372
3373         ret = scsi_add_host(host, &pdev->dev);
3374         if (ret)
3375                 goto probe_failed;
3376
3377         base_vha->flags.init_done = 1;
3378         base_vha->flags.online = 1;
3379         ha->prev_minidump_failed = 0;
3380
3381         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3382             "Init done and hba is online.\n");
3383
3384         if (qla_ini_mode_enabled(base_vha) ||
3385                 qla_dual_mode_enabled(base_vha))
3386                 scsi_scan_host(host);
3387         else
3388                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3389                         "skipping scsi_scan_host() for non-initiator port\n");
3390
3391         qla2x00_alloc_sysfs_attr(base_vha);
3392
3393         if (IS_QLAFX00(ha)) {
3394                 ret = qlafx00_fx_disc(base_vha,
3395                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3396
3397                 /* Register system information */
3398                 ret =  qlafx00_fx_disc(base_vha,
3399                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3400         }
3401
3402         qla2x00_init_host_attr(base_vha);
3403
3404         qla2x00_dfs_setup(base_vha);
3405
3406         ql_log(ql_log_info, base_vha, 0x00fb,
3407             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3408         ql_log(ql_log_info, base_vha, 0x00fc,
3409             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3410             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3411             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3412             base_vha->host_no,
3413             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3414
3415         qlt_add_target(ha, base_vha);
3416
3417         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3418
3419         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3420                 return -ENODEV;
3421
3422         if (ha->flags.detected_lr_sfp) {
3423                 ql_log(ql_log_info, base_vha, 0xffff,
3424                     "Reset chip to pick up LR SFP setting\n");
3425                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3426                 qla2xxx_wake_dpc(base_vha);
3427         }
3428
3429         return 0;
3430
3431 probe_failed:
3432         if (base_vha->timer_active)
3433                 qla2x00_stop_timer(base_vha);
3434         base_vha->flags.online = 0;
3435         if (ha->dpc_thread) {
3436                 struct task_struct *t = ha->dpc_thread;
3437
3438                 ha->dpc_thread = NULL;
3439                 kthread_stop(t);
3440         }
3441
3442         qla2x00_free_device(base_vha);
3443         scsi_host_put(base_vha->host);
3444         /*
3445          * Need to NULL out local req/rsp after
3446          * qla2x00_free_device => qla2x00_free_queues frees
3447          * what these are pointing to. Or else we'll
3448          * fall over below in qla2x00_free_req/rsp_que.
3449          */
3450         req = NULL;
3451         rsp = NULL;
3452
3453 probe_hw_failed:
3454         qla2x00_mem_free(ha);
3455         qla2x00_free_req_que(ha, req);
3456         qla2x00_free_rsp_que(ha, rsp);
3457         qla2x00_clear_drv_active(ha);
3458
3459 iospace_config_failed:
3460         if (IS_P3P_TYPE(ha)) {
3461                 if (!ha->nx_pcibase)
3462                         iounmap((device_reg_t *)ha->nx_pcibase);
3463                 if (!ql2xdbwr)
3464                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3465         } else {
3466                 if (ha->iobase)
3467                         iounmap(ha->iobase);
3468                 if (ha->cregbase)
3469                         iounmap(ha->cregbase);
3470         }
3471         pci_release_selected_regions(ha->pdev, ha->bars);
3472         kfree(ha);
3473
3474 disable_device:
3475         pci_disable_device(pdev);
3476         return ret;
3477 }
3478
3479 static void
3480 qla2x00_shutdown(struct pci_dev *pdev)
3481 {
3482         scsi_qla_host_t *vha;
3483         struct qla_hw_data  *ha;
3484
3485         vha = pci_get_drvdata(pdev);
3486         ha = vha->hw;
3487
3488         ql_log(ql_log_info, vha, 0xfffa,
3489                 "Adapter shutdown\n");
3490
3491         /*
3492          * Prevent future board_disable and wait
3493          * until any pending board_disable has completed.
3494          */
3495         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3496         cancel_work_sync(&ha->board_disable);
3497
3498         if (!atomic_read(&pdev->enable_cnt))
3499                 return;
3500
3501         /* Notify ISPFX00 firmware */
3502         if (IS_QLAFX00(ha))
3503                 qlafx00_driver_shutdown(vha, 20);
3504
3505         /* Turn-off FCE trace */
3506         if (ha->flags.fce_enabled) {
3507                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3508                 ha->flags.fce_enabled = 0;
3509         }
3510
3511         /* Turn-off EFT trace */
3512         if (ha->eft)
3513                 qla2x00_disable_eft_trace(vha);
3514
3515         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3516                 if (ha->flags.fw_started)
3517                         qla2x00_abort_isp_cleanup(vha);
3518         } else {
3519                 /* Stop currently executing firmware. */
3520                 qla2x00_try_to_stop_firmware(vha);
3521         }
3522
3523         /* Turn adapter off line */
3524         vha->flags.online = 0;
3525
3526         /* turn-off interrupts on the card */
3527         if (ha->interrupts_on) {
3528                 vha->flags.init_done = 0;
3529                 ha->isp_ops->disable_intrs(ha);
3530         }
3531
3532         qla2x00_free_irqs(vha);
3533
3534         qla2x00_free_fw_dump(ha);
3535
3536         pci_disable_device(pdev);
3537         ql_log(ql_log_info, vha, 0xfffe,
3538                 "Adapter shutdown successfully.\n");
3539 }
3540
3541 /* Deletes all the virtual ports for a given ha */
3542 static void
3543 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3544 {
3545         scsi_qla_host_t *vha;
3546         unsigned long flags;
3547
3548         mutex_lock(&ha->vport_lock);
3549         while (ha->cur_vport_count) {
3550                 spin_lock_irqsave(&ha->vport_slock, flags);
3551
3552                 BUG_ON(base_vha->list.next == &ha->vp_list);
3553                 /* This assumes first entry in ha->vp_list is always base vha */
3554                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3555                 scsi_host_get(vha->host);
3556
3557                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3558                 mutex_unlock(&ha->vport_lock);
3559
3560                 qla_nvme_delete(vha);
3561
3562                 fc_vport_terminate(vha->fc_vport);
3563                 scsi_host_put(vha->host);
3564
3565                 mutex_lock(&ha->vport_lock);
3566         }
3567         mutex_unlock(&ha->vport_lock);
3568 }
3569
3570 /* Stops all deferred work threads */
3571 static void
3572 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3573 {
3574         /* Cancel all work and destroy DPC workqueues */
3575         if (ha->dpc_lp_wq) {
3576                 cancel_work_sync(&ha->idc_aen);
3577                 destroy_workqueue(ha->dpc_lp_wq);
3578                 ha->dpc_lp_wq = NULL;
3579         }
3580
3581         if (ha->dpc_hp_wq) {
3582                 cancel_work_sync(&ha->nic_core_reset);
3583                 cancel_work_sync(&ha->idc_state_handler);
3584                 cancel_work_sync(&ha->nic_core_unrecoverable);
3585                 destroy_workqueue(ha->dpc_hp_wq);
3586                 ha->dpc_hp_wq = NULL;
3587         }
3588
3589         /* Kill the kernel thread for this host */
3590         if (ha->dpc_thread) {
3591                 struct task_struct *t = ha->dpc_thread;
3592
3593                 /*
3594                  * qla2xxx_wake_dpc checks for ->dpc_thread
3595                  * so we need to zero it out.
3596                  */
3597                 ha->dpc_thread = NULL;
3598                 kthread_stop(t);
3599         }
3600 }
3601
3602 static void
3603 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3604 {
3605         if (IS_QLA82XX(ha)) {
3606
3607                 iounmap((device_reg_t *)ha->nx_pcibase);
3608                 if (!ql2xdbwr)
3609                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3610         } else {
3611                 if (ha->iobase)
3612                         iounmap(ha->iobase);
3613
3614                 if (ha->cregbase)
3615                         iounmap(ha->cregbase);
3616
3617                 if (ha->mqiobase)
3618                         iounmap(ha->mqiobase);
3619
3620                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3621                         iounmap(ha->msixbase);
3622         }
3623 }
3624
3625 static void
3626 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3627 {
3628         if (IS_QLA8044(ha)) {
3629                 qla8044_idc_lock(ha);
3630                 qla8044_clear_drv_active(ha);
3631                 qla8044_idc_unlock(ha);
3632         } else if (IS_QLA82XX(ha)) {
3633                 qla82xx_idc_lock(ha);
3634                 qla82xx_clear_drv_active(ha);
3635                 qla82xx_idc_unlock(ha);
3636         }
3637 }
3638
3639 static void
3640 qla2x00_remove_one(struct pci_dev *pdev)
3641 {
3642         scsi_qla_host_t *base_vha;
3643         struct qla_hw_data  *ha;
3644
3645         base_vha = pci_get_drvdata(pdev);
3646         ha = base_vha->hw;
3647         ql_log(ql_log_info, base_vha, 0xb079,
3648             "Removing driver\n");
3649
3650         /* Indicate device removal to prevent future board_disable and wait
3651          * until any pending board_disable has completed. */
3652         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3653         cancel_work_sync(&ha->board_disable);
3654
3655         /*
3656          * If the PCI device is disabled then there was a PCI-disconnect and
3657          * qla2x00_disable_board_on_pci_error has taken care of most of the
3658          * resources.
3659          */
3660         if (!atomic_read(&pdev->enable_cnt)) {
3661                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3662                     base_vha->gnl.l, base_vha->gnl.ldma);
3663
3664                 scsi_host_put(base_vha->host);
3665                 kfree(ha);
3666                 pci_set_drvdata(pdev, NULL);
3667                 return;
3668         }
3669         qla2x00_wait_for_hba_ready(base_vha);
3670
3671         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3672                 if (ha->flags.fw_started)
3673                         qla2x00_abort_isp_cleanup(base_vha);
3674         } else if (!IS_QLAFX00(ha)) {
3675                 if (IS_QLA8031(ha)) {
3676                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3677                             "Clearing fcoe driver presence.\n");
3678                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3679                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3680                                     "Error while clearing DRV-Presence.\n");
3681                 }
3682
3683                 qla2x00_try_to_stop_firmware(base_vha);
3684         }
3685
3686         qla2x00_wait_for_sess_deletion(base_vha);
3687
3688         /*
3689          * if UNLOAD flag is already set, then continue unload,
3690          * where it was set first.
3691          */
3692         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3693                 return;
3694
3695         set_bit(UNLOADING, &base_vha->dpc_flags);
3696
3697         qla_nvme_delete(base_vha);
3698
3699         dma_free_coherent(&ha->pdev->dev,
3700                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3701
3702         vfree(base_vha->scan.l);
3703
3704         if (IS_QLAFX00(ha))
3705                 qlafx00_driver_shutdown(base_vha, 20);
3706
3707         qla2x00_delete_all_vps(ha, base_vha);
3708
3709         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3710
3711         qla2x00_dfs_remove(base_vha);
3712
3713         qla84xx_put_chip(base_vha);
3714
3715         /* Disable timer */
3716         if (base_vha->timer_active)
3717                 qla2x00_stop_timer(base_vha);
3718
3719         base_vha->flags.online = 0;
3720
3721         /* free DMA memory */
3722         if (ha->exlogin_buf)
3723                 qla2x00_free_exlogin_buffer(ha);
3724
3725         /* free DMA memory */
3726         if (ha->exchoffld_buf)
3727                 qla2x00_free_exchoffld_buffer(ha);
3728
3729         qla2x00_destroy_deferred_work(ha);
3730
3731         qlt_remove_target(ha, base_vha);
3732
3733         qla2x00_free_sysfs_attr(base_vha, true);
3734
3735         fc_remove_host(base_vha->host);
3736         qlt_remove_target_resources(ha);
3737
3738         scsi_remove_host(base_vha->host);
3739
3740         qla2x00_free_device(base_vha);
3741
3742         qla2x00_clear_drv_active(ha);
3743
3744         scsi_host_put(base_vha->host);
3745
3746         qla2x00_unmap_iobases(ha);
3747
3748         pci_release_selected_regions(ha->pdev, ha->bars);
3749         kfree(ha);
3750
3751         pci_disable_pcie_error_reporting(pdev);
3752
3753         pci_disable_device(pdev);
3754 }
3755
3756 static void
3757 qla2x00_free_device(scsi_qla_host_t *vha)
3758 {
3759         struct qla_hw_data *ha = vha->hw;
3760
3761         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3762
3763         /* Disable timer */
3764         if (vha->timer_active)
3765                 qla2x00_stop_timer(vha);
3766
3767         qla25xx_delete_queues(vha);
3768         vha->flags.online = 0;
3769
3770         /* turn-off interrupts on the card */
3771         if (ha->interrupts_on) {
3772                 vha->flags.init_done = 0;
3773                 ha->isp_ops->disable_intrs(ha);
3774         }
3775
3776         qla2x00_free_fcports(vha);
3777
3778         qla2x00_free_irqs(vha);
3779
3780         /* Flush the work queue and remove it */
3781         if (ha->wq) {
3782                 flush_workqueue(ha->wq);
3783                 destroy_workqueue(ha->wq);
3784                 ha->wq = NULL;
3785         }
3786
3787
3788         qla2x00_mem_free(ha);
3789
3790         qla82xx_md_free(vha);
3791
3792         qla2x00_free_queues(ha);
3793 }
3794
3795 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3796 {
3797         fc_port_t *fcport, *tfcport;
3798
3799         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3800                 list_del(&fcport->list);
3801                 qla2x00_clear_loop_id(fcport);
3802                 kfree(fcport);
3803         }
3804 }
3805
3806 static inline void
3807 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3808     int defer)
3809 {
3810         struct fc_rport *rport;
3811         scsi_qla_host_t *base_vha;
3812         unsigned long flags;
3813
3814         if (!fcport->rport)
3815                 return;
3816
3817         rport = fcport->rport;
3818         if (defer) {
3819                 base_vha = pci_get_drvdata(vha->hw->pdev);
3820                 spin_lock_irqsave(vha->host->host_lock, flags);
3821                 fcport->drport = rport;
3822                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3823                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3824                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3825                 qla2xxx_wake_dpc(base_vha);
3826         } else {
3827                 int now;
3828                 if (rport) {
3829                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3830                             "%s %8phN. rport %p roles %x\n",
3831                             __func__, fcport->port_name, rport,
3832                             rport->roles);
3833                         fc_remote_port_delete(rport);
3834                 }
3835                 qlt_do_generation_tick(vha, &now);
3836         }
3837 }
3838
3839 /*
3840  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3841  *
3842  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3843  *
3844  * Return: None.
3845  *
3846  * Context:
3847  */
3848 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3849     int do_login, int defer)
3850 {
3851         if (IS_QLAFX00(vha->hw)) {
3852                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3853                 qla2x00_schedule_rport_del(vha, fcport, defer);
3854                 return;
3855         }
3856
3857         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3858             vha->vp_idx == fcport->vha->vp_idx) {
3859                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3860                 qla2x00_schedule_rport_del(vha, fcport, defer);
3861         }
3862         /*
3863          * We may need to retry the login, so don't change the state of the
3864          * port but do the retries.
3865          */
3866         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3867                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3868
3869         if (!do_login)
3870                 return;
3871
3872         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3873 }
3874
3875 /*
3876  * qla2x00_mark_all_devices_lost
3877  *      Updates fcport state when device goes offline.
3878  *
3879  * Input:
3880  *      ha = adapter block pointer.
3881  *      fcport = port structure pointer.
3882  *
3883  * Return:
3884  *      None.
3885  *
3886  * Context:
3887  */
3888 void
3889 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3890 {
3891         fc_port_t *fcport;
3892
3893         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3894             "Mark all dev lost\n");
3895
3896         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3897                 fcport->scan_state = 0;
3898                 qlt_schedule_sess_for_deletion(fcport);
3899
3900                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3901                         continue;
3902
3903                 /*
3904                  * No point in marking the device as lost, if the device is
3905                  * already DEAD.
3906                  */
3907                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3908                         continue;
3909                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3910                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3911                         if (defer)
3912                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3913                         else if (vha->vp_idx == fcport->vha->vp_idx)
3914                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3915                 }
3916         }
3917 }
3918
3919 /*
3920 * qla2x00_mem_alloc
3921 *      Allocates adapter memory.
3922 *
3923 * Returns:
3924 *      0  = success.
3925 *      !0  = failure.
3926 */
3927 static int
3928 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3929         struct req_que **req, struct rsp_que **rsp)
3930 {
3931         char    name[16];
3932
3933         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3934                 &ha->init_cb_dma, GFP_KERNEL);
3935         if (!ha->init_cb)
3936                 goto fail;
3937
3938         if (qlt_mem_alloc(ha) < 0)
3939                 goto fail_free_init_cb;
3940
3941         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3942                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3943         if (!ha->gid_list)
3944                 goto fail_free_tgt_mem;
3945
3946         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3947         if (!ha->srb_mempool)
3948                 goto fail_free_gid_list;
3949
3950         if (IS_P3P_TYPE(ha)) {
3951                 /* Allocate cache for CT6 Ctx. */
3952                 if (!ctx_cachep) {
3953                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3954                                 sizeof(struct ct6_dsd), 0,
3955                                 SLAB_HWCACHE_ALIGN, NULL);
3956                         if (!ctx_cachep)
3957                                 goto fail_free_srb_mempool;
3958                 }
3959                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3960                         ctx_cachep);
3961                 if (!ha->ctx_mempool)
3962                         goto fail_free_srb_mempool;
3963                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3964                     "ctx_cachep=%p ctx_mempool=%p.\n",
3965                     ctx_cachep, ha->ctx_mempool);
3966         }
3967
3968         /* Get memory for cached NVRAM */
3969         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3970         if (!ha->nvram)
3971                 goto fail_free_ctx_mempool;
3972
3973         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3974                 ha->pdev->device);
3975         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3976                 DMA_POOL_SIZE, 8, 0);
3977         if (!ha->s_dma_pool)
3978                 goto fail_free_nvram;
3979
3980         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3981             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3982             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3983
3984         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3985                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3986                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3987                 if (!ha->dl_dma_pool) {
3988                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3989                             "Failed to allocate memory for dl_dma_pool.\n");
3990                         goto fail_s_dma_pool;
3991                 }
3992
3993                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3994                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3995                 if (!ha->fcp_cmnd_dma_pool) {
3996                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3997                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3998                         goto fail_dl_dma_pool;
3999                 }
4000                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4001                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
4002                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
4003         }
4004
4005         /* Allocate memory for SNS commands */
4006         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4007         /* Get consistent memory allocated for SNS commands */
4008                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4009                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4010                 if (!ha->sns_cmd)
4011                         goto fail_dma_pool;
4012                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4013                     "sns_cmd: %p.\n", ha->sns_cmd);
4014         } else {
4015         /* Get consistent memory allocated for MS IOCB */
4016                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4017                         &ha->ms_iocb_dma);
4018                 if (!ha->ms_iocb)
4019                         goto fail_dma_pool;
4020         /* Get consistent memory allocated for CT SNS commands */
4021                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4022                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4023                 if (!ha->ct_sns)
4024                         goto fail_free_ms_iocb;
4025                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4026                     "ms_iocb=%p ct_sns=%p.\n",
4027                     ha->ms_iocb, ha->ct_sns);
4028         }
4029
4030         /* Allocate memory for request ring */
4031         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4032         if (!*req) {
4033                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4034                     "Failed to allocate memory for req.\n");
4035                 goto fail_req;
4036         }
4037         (*req)->length = req_len;
4038         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4039                 ((*req)->length + 1) * sizeof(request_t),
4040                 &(*req)->dma, GFP_KERNEL);
4041         if (!(*req)->ring) {
4042                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4043                     "Failed to allocate memory for req_ring.\n");
4044                 goto fail_req_ring;
4045         }
4046         /* Allocate memory for response ring */
4047         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4048         if (!*rsp) {
4049                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4050                     "Failed to allocate memory for rsp.\n");
4051                 goto fail_rsp;
4052         }
4053         (*rsp)->hw = ha;
4054         (*rsp)->length = rsp_len;
4055         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4056                 ((*rsp)->length + 1) * sizeof(response_t),
4057                 &(*rsp)->dma, GFP_KERNEL);
4058         if (!(*rsp)->ring) {
4059                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4060                     "Failed to allocate memory for rsp_ring.\n");
4061                 goto fail_rsp_ring;
4062         }
4063         (*req)->rsp = *rsp;
4064         (*rsp)->req = *req;
4065         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4066             "req=%p req->length=%d req->ring=%p rsp=%p "
4067             "rsp->length=%d rsp->ring=%p.\n",
4068             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4069             (*rsp)->ring);
4070         /* Allocate memory for NVRAM data for vports */
4071         if (ha->nvram_npiv_size) {
4072                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4073                                         sizeof(struct qla_npiv_entry),
4074                                         GFP_KERNEL);
4075                 if (!ha->npiv_info) {
4076                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4077                             "Failed to allocate memory for npiv_info.\n");
4078                         goto fail_npiv_info;
4079                 }
4080         } else
4081                 ha->npiv_info = NULL;
4082
4083         /* Get consistent memory allocated for EX-INIT-CB. */
4084         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
4085                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4086                     &ha->ex_init_cb_dma);
4087                 if (!ha->ex_init_cb)
4088                         goto fail_ex_init_cb;
4089                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4090                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4091         }
4092
4093         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4094
4095         /* Get consistent memory allocated for Async Port-Database. */
4096         if (!IS_FWI2_CAPABLE(ha)) {
4097                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4098                         &ha->async_pd_dma);
4099                 if (!ha->async_pd)
4100                         goto fail_async_pd;
4101                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4102                     "async_pd=%p.\n", ha->async_pd);
4103         }
4104
4105         INIT_LIST_HEAD(&ha->vp_list);
4106
4107         /* Allocate memory for our loop_id bitmap */
4108         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4109                                   sizeof(long),
4110                                   GFP_KERNEL);
4111         if (!ha->loop_id_map)
4112                 goto fail_loop_id_map;
4113         else {
4114                 qla2x00_set_reserved_loop_ids(ha);
4115                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4116                     "loop_id_map=%p.\n", ha->loop_id_map);
4117         }
4118
4119         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4120             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4121         if (!ha->sfp_data) {
4122                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4123                     "Unable to allocate memory for SFP read-data.\n");
4124                 goto fail_sfp_data;
4125         }
4126
4127         return 0;
4128
4129 fail_sfp_data:
4130         kfree(ha->loop_id_map);
4131 fail_loop_id_map:
4132         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4133 fail_async_pd:
4134         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4135 fail_ex_init_cb:
4136         kfree(ha->npiv_info);
4137 fail_npiv_info:
4138         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4139                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4140         (*rsp)->ring = NULL;
4141         (*rsp)->dma = 0;
4142 fail_rsp_ring:
4143         kfree(*rsp);
4144         *rsp = NULL;
4145 fail_rsp:
4146         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4147                 sizeof(request_t), (*req)->ring, (*req)->dma);
4148         (*req)->ring = NULL;
4149         (*req)->dma = 0;
4150 fail_req_ring:
4151         kfree(*req);
4152         *req = NULL;
4153 fail_req:
4154         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4155                 ha->ct_sns, ha->ct_sns_dma);
4156         ha->ct_sns = NULL;
4157         ha->ct_sns_dma = 0;
4158 fail_free_ms_iocb:
4159         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4160         ha->ms_iocb = NULL;
4161         ha->ms_iocb_dma = 0;
4162
4163         if (ha->sns_cmd)
4164                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4165                     ha->sns_cmd, ha->sns_cmd_dma);
4166 fail_dma_pool:
4167         if (IS_QLA82XX(ha) || ql2xenabledif) {
4168                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4169                 ha->fcp_cmnd_dma_pool = NULL;
4170         }
4171 fail_dl_dma_pool:
4172         if (IS_QLA82XX(ha) || ql2xenabledif) {
4173                 dma_pool_destroy(ha->dl_dma_pool);
4174                 ha->dl_dma_pool = NULL;
4175         }
4176 fail_s_dma_pool:
4177         dma_pool_destroy(ha->s_dma_pool);
4178         ha->s_dma_pool = NULL;
4179 fail_free_nvram:
4180         kfree(ha->nvram);
4181         ha->nvram = NULL;
4182 fail_free_ctx_mempool:
4183         mempool_destroy(ha->ctx_mempool);
4184         ha->ctx_mempool = NULL;
4185 fail_free_srb_mempool:
4186         mempool_destroy(ha->srb_mempool);
4187         ha->srb_mempool = NULL;
4188 fail_free_gid_list:
4189         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4190         ha->gid_list,
4191         ha->gid_list_dma);
4192         ha->gid_list = NULL;
4193         ha->gid_list_dma = 0;
4194 fail_free_tgt_mem:
4195         qlt_mem_free(ha);
4196 fail_free_init_cb:
4197         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4198         ha->init_cb_dma);
4199         ha->init_cb = NULL;
4200         ha->init_cb_dma = 0;
4201 fail:
4202         ql_log(ql_log_fatal, NULL, 0x0030,
4203             "Memory allocation failure.\n");
4204         return -ENOMEM;
4205 }
4206
4207 int
4208 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4209 {
4210         int rval;
4211         uint16_t        size, max_cnt, temp;
4212         struct qla_hw_data *ha = vha->hw;
4213
4214         /* Return if we don't need to alloacate any extended logins */
4215         if (!ql2xexlogins)
4216                 return QLA_SUCCESS;
4217
4218         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4219                 return QLA_SUCCESS;
4220
4221         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4222         max_cnt = 0;
4223         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4224         if (rval != QLA_SUCCESS) {
4225                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4226                     "Failed to get exlogin status.\n");
4227                 return rval;
4228         }
4229
4230         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4231         temp *= size;
4232
4233         if (temp != ha->exlogin_size) {
4234                 qla2x00_free_exlogin_buffer(ha);
4235                 ha->exlogin_size = temp;
4236
4237                 ql_log(ql_log_info, vha, 0xd024,
4238                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4239                     max_cnt, size, temp);
4240
4241                 ql_log(ql_log_info, vha, 0xd025,
4242                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4243
4244                 /* Get consistent memory for extended logins */
4245                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4246                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4247                 if (!ha->exlogin_buf) {
4248                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4249                     "Failed to allocate memory for exlogin_buf_dma.\n");
4250                         return -ENOMEM;
4251                 }
4252         }
4253
4254         /* Now configure the dma buffer */
4255         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4256         if (rval) {
4257                 ql_log(ql_log_fatal, vha, 0xd033,
4258                     "Setup extended login buffer  ****FAILED****.\n");
4259                 qla2x00_free_exlogin_buffer(ha);
4260         }
4261
4262         return rval;
4263 }
4264
4265 /*
4266 * qla2x00_free_exlogin_buffer
4267 *
4268 * Input:
4269 *       ha = adapter block pointer
4270 */
4271 void
4272 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4273 {
4274         if (ha->exlogin_buf) {
4275                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4276                     ha->exlogin_buf, ha->exlogin_buf_dma);
4277                 ha->exlogin_buf = NULL;
4278                 ha->exlogin_size = 0;
4279         }
4280 }
4281
4282 static void
4283 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4284 {
4285         u32 temp;
4286         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4287         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4288
4289         if (max_cnt > vha->hw->max_exchg)
4290                 max_cnt = vha->hw->max_exchg;
4291
4292         if (qla_ini_mode_enabled(vha)) {
4293                 if (vha->ql2xiniexchg > max_cnt)
4294                         vha->ql2xiniexchg = max_cnt;
4295
4296                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4297                         *ret_cnt = vha->ql2xiniexchg;
4298
4299         } else if (qla_tgt_mode_enabled(vha)) {
4300                 if (vha->ql2xexchoffld > max_cnt) {
4301                         vha->ql2xexchoffld = max_cnt;
4302                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4303                 }
4304
4305                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4306                         *ret_cnt = vha->ql2xexchoffld;
4307         } else if (qla_dual_mode_enabled(vha)) {
4308                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4309                 if (temp > max_cnt) {
4310                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4311                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4312                         temp = max_cnt;
4313                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4314                 }
4315
4316                 if (temp > FW_DEF_EXCHANGES_CNT)
4317                         *ret_cnt = temp;
4318         }
4319 }
4320
4321 int
4322 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4323 {
4324         int rval;
4325         u16     size, max_cnt;
4326         u32 actual_cnt, totsz;
4327         struct qla_hw_data *ha = vha->hw;
4328
4329         if (!ha->flags.exchoffld_enabled)
4330                 return QLA_SUCCESS;
4331
4332         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4333                 return QLA_SUCCESS;
4334
4335         max_cnt = 0;
4336         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4337         if (rval != QLA_SUCCESS) {
4338                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4339                     "Failed to get exlogin status.\n");
4340                 return rval;
4341         }
4342
4343         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4344         ql_log(ql_log_info, vha, 0xd014,
4345             "Actual exchange offload count: %d.\n", actual_cnt);
4346
4347         totsz = actual_cnt * size;
4348
4349         if (totsz != ha->exchoffld_size) {
4350                 qla2x00_free_exchoffld_buffer(ha);
4351                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4352                         ha->exchoffld_size = 0;
4353                         ha->flags.exchoffld_enabled = 0;
4354                         return QLA_SUCCESS;
4355                 }
4356
4357                 ha->exchoffld_size = totsz;
4358
4359                 ql_log(ql_log_info, vha, 0xd016,
4360                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4361                     max_cnt, actual_cnt, size, totsz);
4362
4363                 ql_log(ql_log_info, vha, 0xd017,
4364                     "Exchange Buffers requested size = 0x%x\n",
4365                     ha->exchoffld_size);
4366
4367                 /* Get consistent memory for extended logins */
4368                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4369                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4370                 if (!ha->exchoffld_buf) {
4371                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4372                         "Failed to allocate memory for Exchange Offload.\n");
4373
4374                         if (ha->max_exchg >
4375                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4376                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4377                         } else if (ha->max_exchg >
4378                             (FW_DEF_EXCHANGES_CNT + 512)) {
4379                                 ha->max_exchg -= 512;
4380                         } else {
4381                                 ha->flags.exchoffld_enabled = 0;
4382                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4383                                     "Disabling Exchange offload due to lack of memory\n");
4384                         }
4385                         ha->exchoffld_size = 0;
4386
4387                         return -ENOMEM;
4388                 }
4389         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4390                 /* pathological case */
4391                 qla2x00_free_exchoffld_buffer(ha);
4392                 ha->exchoffld_size = 0;
4393                 ha->flags.exchoffld_enabled = 0;
4394                 ql_log(ql_log_info, vha, 0xd016,
4395                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4396                     ha->exchoffld_size, actual_cnt, size, totsz);
4397                 return 0;
4398         }
4399
4400         /* Now configure the dma buffer */
4401         rval = qla_set_exchoffld_mem_cfg(vha);
4402         if (rval) {
4403                 ql_log(ql_log_fatal, vha, 0xd02e,
4404                     "Setup exchange offload buffer ****FAILED****.\n");
4405                 qla2x00_free_exchoffld_buffer(ha);
4406         } else {
4407                 /* re-adjust number of target exchange */
4408                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4409
4410                 if (qla_ini_mode_enabled(vha))
4411                         icb->exchange_count = 0;
4412                 else
4413                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4414         }
4415
4416         return rval;
4417 }
4418
4419 /*
4420 * qla2x00_free_exchoffld_buffer
4421 *
4422 * Input:
4423 *       ha = adapter block pointer
4424 */
4425 void
4426 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4427 {
4428         if (ha->exchoffld_buf) {
4429                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4430                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4431                 ha->exchoffld_buf = NULL;
4432                 ha->exchoffld_size = 0;
4433         }
4434 }
4435
4436 /*
4437 * qla2x00_free_fw_dump
4438 *       Frees fw dump stuff.
4439 *
4440 * Input:
4441 *       ha = adapter block pointer
4442 */
4443 static void
4444 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4445 {
4446         if (ha->fce)
4447                 dma_free_coherent(&ha->pdev->dev,
4448                     FCE_SIZE, ha->fce, ha->fce_dma);
4449
4450         if (ha->eft)
4451                 dma_free_coherent(&ha->pdev->dev,
4452                     EFT_SIZE, ha->eft, ha->eft_dma);
4453
4454         if (ha->fw_dump)
4455                 vfree(ha->fw_dump);
4456         if (ha->fw_dump_template)
4457                 vfree(ha->fw_dump_template);
4458
4459         ha->fce = NULL;
4460         ha->fce_dma = 0;
4461         ha->eft = NULL;
4462         ha->eft_dma = 0;
4463         ha->fw_dumped = 0;
4464         ha->fw_dump_cap_flags = 0;
4465         ha->fw_dump_reading = 0;
4466         ha->fw_dump = NULL;
4467         ha->fw_dump_len = 0;
4468         ha->fw_dump_template = NULL;
4469         ha->fw_dump_template_len = 0;
4470 }
4471
4472 /*
4473 * qla2x00_mem_free
4474 *      Frees all adapter allocated memory.
4475 *
4476 * Input:
4477 *      ha = adapter block pointer.
4478 */
4479 static void
4480 qla2x00_mem_free(struct qla_hw_data *ha)
4481 {
4482         qla2x00_free_fw_dump(ha);
4483
4484         if (ha->mctp_dump)
4485                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4486                     ha->mctp_dump_dma);
4487
4488         mempool_destroy(ha->srb_mempool);
4489
4490         if (ha->dcbx_tlv)
4491                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4492                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4493
4494         if (ha->xgmac_data)
4495                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4496                     ha->xgmac_data, ha->xgmac_data_dma);
4497
4498         if (ha->sns_cmd)
4499                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4500                 ha->sns_cmd, ha->sns_cmd_dma);
4501
4502         if (ha->ct_sns)
4503                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4504                 ha->ct_sns, ha->ct_sns_dma);
4505
4506         if (ha->sfp_data)
4507                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4508                     ha->sfp_data_dma);
4509
4510         if (ha->ms_iocb)
4511                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4512
4513         if (ha->ex_init_cb)
4514                 dma_pool_free(ha->s_dma_pool,
4515                         ha->ex_init_cb, ha->ex_init_cb_dma);
4516
4517         if (ha->async_pd)
4518                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4519
4520         dma_pool_destroy(ha->s_dma_pool);
4521
4522         if (ha->gid_list)
4523                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4524                 ha->gid_list, ha->gid_list_dma);
4525
4526         if (IS_QLA82XX(ha)) {
4527                 if (!list_empty(&ha->gbl_dsd_list)) {
4528                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4529
4530                         /* clean up allocated prev pool */
4531                         list_for_each_entry_safe(dsd_ptr,
4532                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4533                                 dma_pool_free(ha->dl_dma_pool,
4534                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4535                                 list_del(&dsd_ptr->list);
4536                                 kfree(dsd_ptr);
4537                         }
4538                 }
4539         }
4540
4541         dma_pool_destroy(ha->dl_dma_pool);
4542
4543         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4544
4545         mempool_destroy(ha->ctx_mempool);
4546
4547         qlt_mem_free(ha);
4548
4549         if (ha->init_cb)
4550                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4551                         ha->init_cb, ha->init_cb_dma);
4552
4553         vfree(ha->optrom_buffer);
4554         kfree(ha->nvram);
4555         kfree(ha->npiv_info);
4556         kfree(ha->swl);
4557         kfree(ha->loop_id_map);
4558
4559         ha->srb_mempool = NULL;
4560         ha->ctx_mempool = NULL;
4561         ha->sns_cmd = NULL;
4562         ha->sns_cmd_dma = 0;
4563         ha->ct_sns = NULL;
4564         ha->ct_sns_dma = 0;
4565         ha->ms_iocb = NULL;
4566         ha->ms_iocb_dma = 0;
4567         ha->init_cb = NULL;
4568         ha->init_cb_dma = 0;
4569         ha->ex_init_cb = NULL;
4570         ha->ex_init_cb_dma = 0;
4571         ha->async_pd = NULL;
4572         ha->async_pd_dma = 0;
4573         ha->loop_id_map = NULL;
4574         ha->npiv_info = NULL;
4575         ha->optrom_buffer = NULL;
4576         ha->swl = NULL;
4577         ha->nvram = NULL;
4578         ha->mctp_dump = NULL;
4579         ha->dcbx_tlv = NULL;
4580         ha->xgmac_data = NULL;
4581         ha->sfp_data = NULL;
4582
4583         ha->s_dma_pool = NULL;
4584         ha->dl_dma_pool = NULL;
4585         ha->fcp_cmnd_dma_pool = NULL;
4586
4587         ha->gid_list = NULL;
4588         ha->gid_list_dma = 0;
4589
4590         ha->tgt.atio_ring = NULL;
4591         ha->tgt.atio_dma = 0;
4592         ha->tgt.tgt_vp_map = NULL;
4593 }
4594
4595 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4596                                                 struct qla_hw_data *ha)
4597 {
4598         struct Scsi_Host *host;
4599         struct scsi_qla_host *vha = NULL;
4600
4601         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4602         if (!host) {
4603                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4604                     "Failed to allocate host from the scsi layer, aborting.\n");
4605                 return NULL;
4606         }
4607
4608         /* Clear our data area */
4609         vha = shost_priv(host);
4610         memset(vha, 0, sizeof(scsi_qla_host_t));
4611
4612         vha->host = host;
4613         vha->host_no = host->host_no;
4614         vha->hw = ha;
4615
4616         vha->qlini_mode = ql2x_ini_mode;
4617         vha->ql2xexchoffld = ql2xexchoffld;
4618         vha->ql2xiniexchg = ql2xiniexchg;
4619
4620         INIT_LIST_HEAD(&vha->vp_fcports);
4621         INIT_LIST_HEAD(&vha->work_list);
4622         INIT_LIST_HEAD(&vha->list);
4623         INIT_LIST_HEAD(&vha->qla_cmd_list);
4624         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4625         INIT_LIST_HEAD(&vha->logo_list);
4626         INIT_LIST_HEAD(&vha->plogi_ack_list);
4627         INIT_LIST_HEAD(&vha->qp_list);
4628         INIT_LIST_HEAD(&vha->gnl.fcports);
4629         INIT_LIST_HEAD(&vha->nvme_rport_list);
4630         INIT_LIST_HEAD(&vha->gpnid_list);
4631         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4632
4633         spin_lock_init(&vha->work_lock);
4634         spin_lock_init(&vha->cmd_list_lock);
4635         init_waitqueue_head(&vha->fcport_waitQ);
4636         init_waitqueue_head(&vha->vref_waitq);
4637
4638         vha->gnl.size = sizeof(struct get_name_list_extended) *
4639                         (ha->max_loop_id + 1);
4640         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4641             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4642         if (!vha->gnl.l) {
4643                 ql_log(ql_log_fatal, vha, 0xd04a,
4644                     "Alloc failed for name list.\n");
4645                 scsi_remove_host(vha->host);
4646                 return NULL;
4647         }
4648
4649         /* todo: what about ext login? */
4650         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4651         vha->scan.l = vmalloc(vha->scan.size);
4652         if (!vha->scan.l) {
4653                 ql_log(ql_log_fatal, vha, 0xd04a,
4654                     "Alloc failed for scan database.\n");
4655                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4656                     vha->gnl.l, vha->gnl.ldma);
4657                 scsi_remove_host(vha->host);
4658                 return NULL;
4659         }
4660         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4661
4662         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4663         ql_dbg(ql_dbg_init, vha, 0x0041,
4664             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4665             vha->host, vha->hw, vha,
4666             dev_name(&(ha->pdev->dev)));
4667
4668         return vha;
4669 }
4670
4671 struct qla_work_evt *
4672 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4673 {
4674         struct qla_work_evt *e;
4675         uint8_t bail;
4676
4677         QLA_VHA_MARK_BUSY(vha, bail);
4678         if (bail)
4679                 return NULL;
4680
4681         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4682         if (!e) {
4683                 QLA_VHA_MARK_NOT_BUSY(vha);
4684                 return NULL;
4685         }
4686
4687         INIT_LIST_HEAD(&e->list);
4688         e->type = type;
4689         e->flags = QLA_EVT_FLAG_FREE;
4690         return e;
4691 }
4692
4693 int
4694 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4695 {
4696         unsigned long flags;
4697         bool q = false;
4698
4699         spin_lock_irqsave(&vha->work_lock, flags);
4700         list_add_tail(&e->list, &vha->work_list);
4701
4702         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4703                 q = true;
4704
4705         spin_unlock_irqrestore(&vha->work_lock, flags);
4706
4707         if (q)
4708                 queue_work(vha->hw->wq, &vha->iocb_work);
4709
4710         return QLA_SUCCESS;
4711 }
4712
4713 int
4714 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4715     u32 data)
4716 {
4717         struct qla_work_evt *e;
4718
4719         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4720         if (!e)
4721                 return QLA_FUNCTION_FAILED;
4722
4723         e->u.aen.code = code;
4724         e->u.aen.data = data;
4725         return qla2x00_post_work(vha, e);
4726 }
4727
4728 int
4729 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4730 {
4731         struct qla_work_evt *e;
4732
4733         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4734         if (!e)
4735                 return QLA_FUNCTION_FAILED;
4736
4737         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4738         return qla2x00_post_work(vha, e);
4739 }
4740
4741 #define qla2x00_post_async_work(name, type)     \
4742 int qla2x00_post_async_##name##_work(           \
4743     struct scsi_qla_host *vha,                  \
4744     fc_port_t *fcport, uint16_t *data)          \
4745 {                                               \
4746         struct qla_work_evt *e;                 \
4747                                                 \
4748         e = qla2x00_alloc_work(vha, type);      \
4749         if (!e)                                 \
4750                 return QLA_FUNCTION_FAILED;     \
4751                                                 \
4752         e->u.logio.fcport = fcport;             \
4753         if (data) {                             \
4754                 e->u.logio.data[0] = data[0];   \
4755                 e->u.logio.data[1] = data[1];   \
4756         }                                       \
4757         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4758         return qla2x00_post_work(vha, e);       \
4759 }
4760
4761 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4762 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4763 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4764 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4765 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4766 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4767
4768 int
4769 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4770 {
4771         struct qla_work_evt *e;
4772
4773         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4774         if (!e)
4775                 return QLA_FUNCTION_FAILED;
4776
4777         e->u.uevent.code = code;
4778         return qla2x00_post_work(vha, e);
4779 }
4780
4781 static void
4782 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4783 {
4784         char event_string[40];
4785         char *envp[] = { event_string, NULL };
4786
4787         switch (code) {
4788         case QLA_UEVENT_CODE_FW_DUMP:
4789                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4790                     vha->host_no);
4791                 break;
4792         default:
4793                 /* do nothing */
4794                 break;
4795         }
4796         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4797 }
4798
4799 int
4800 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4801                         uint32_t *data, int cnt)
4802 {
4803         struct qla_work_evt *e;
4804
4805         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4806         if (!e)
4807                 return QLA_FUNCTION_FAILED;
4808
4809         e->u.aenfx.evtcode = evtcode;
4810         e->u.aenfx.count = cnt;
4811         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4812         return qla2x00_post_work(vha, e);
4813 }
4814
4815 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
4816 {
4817         unsigned long flags;
4818
4819         if (IS_SW_RESV_ADDR(fcport->d_id))
4820                 return;
4821
4822         spin_lock_irqsave(&fcport->vha->work_lock, flags);
4823         if (fcport->disc_state == DSC_UPD_FCPORT) {
4824                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4825                 return;
4826         }
4827         fcport->jiffies_at_registration = jiffies;
4828         fcport->sec_since_registration = 0;
4829         fcport->next_disc_state = DSC_DELETED;
4830         fcport->disc_state = DSC_UPD_FCPORT;
4831         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4832
4833         queue_work(system_unbound_wq, &fcport->reg_work);
4834 }
4835
4836 static
4837 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4838 {
4839         unsigned long flags;
4840         fc_port_t *fcport =  NULL, *tfcp;
4841         struct qlt_plogi_ack_t *pla =
4842             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4843         uint8_t free_fcport = 0;
4844
4845         ql_dbg(ql_dbg_disc, vha, 0xffff,
4846             "%s %d %8phC enter\n",
4847             __func__, __LINE__, e->u.new_sess.port_name);
4848
4849         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4850         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4851         if (fcport) {
4852                 fcport->d_id = e->u.new_sess.id;
4853                 if (pla) {
4854                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4855                         memcpy(fcport->node_name,
4856                             pla->iocb.u.isp24.u.plogi.node_name,
4857                             WWN_SIZE);
4858                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4859                         /* we took an extra ref_count to prevent PLOGI ACK when
4860                          * fcport/sess has not been created.
4861                          */
4862                         pla->ref_count--;
4863                 }
4864         } else {
4865                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4866                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4867                 if (fcport) {
4868                         fcport->d_id = e->u.new_sess.id;
4869                         fcport->flags |= FCF_FABRIC_DEVICE;
4870                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4871                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_FCP)
4872                                 fcport->fc4_type = FC4_TYPE_FCP_SCSI;
4873
4874                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_NVME) {
4875                                 fcport->fc4_type = FC4_TYPE_OTHER;
4876                                 fcport->fc4f_nvme = FC4_TYPE_NVME;
4877                         }
4878
4879                         memcpy(fcport->port_name, e->u.new_sess.port_name,
4880                             WWN_SIZE);
4881                 } else {
4882                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4883                                    "%s %8phC mem alloc fail.\n",
4884                                    __func__, e->u.new_sess.port_name);
4885
4886                         if (pla)
4887                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4888                         return;
4889                 }
4890
4891                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4892                 /* search again to make sure no one else got ahead */
4893                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
4894                     e->u.new_sess.port_name, 1);
4895                 if (tfcp) {
4896                         /* should rarily happen */
4897                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4898                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
4899                             __func__, tfcp->port_name, tfcp->disc_state,
4900                             tfcp->fw_login_state);
4901
4902                         free_fcport = 1;
4903                 } else {
4904                         list_add_tail(&fcport->list, &vha->vp_fcports);
4905
4906                 }
4907                 if (pla) {
4908                         qlt_plogi_ack_link(vha, pla, fcport,
4909                             QLT_PLOGI_LINK_SAME_WWN);
4910                         pla->ref_count--;
4911                 }
4912         }
4913         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4914
4915         if (fcport) {
4916                 fcport->id_changed = 1;
4917                 fcport->scan_state = QLA_FCPORT_FOUND;
4918                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
4919
4920                 if (pla) {
4921                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
4922                                 u16 wd3_lo;
4923
4924                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4925                                 fcport->local = 0;
4926                                 fcport->loop_id =
4927                                         le16_to_cpu(
4928                                             pla->iocb.u.isp24.nport_handle);
4929                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4930                                 wd3_lo =
4931                                     le16_to_cpu(
4932                                         pla->iocb.u.isp24.u.prli.wd3_lo);
4933
4934                                 if (wd3_lo & BIT_7)
4935                                         fcport->conf_compl_supported = 1;
4936
4937                                 if ((wd3_lo & BIT_4) == 0)
4938                                         fcport->port_type = FCT_INITIATOR;
4939                                 else
4940                                         fcport->port_type = FCT_TARGET;
4941                         }
4942                         qlt_plogi_ack_unref(vha, pla);
4943                 } else {
4944                         fc_port_t *dfcp = NULL;
4945
4946                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4947                         tfcp = qla2x00_find_fcport_by_nportid(vha,
4948                             &e->u.new_sess.id, 1);
4949                         if (tfcp && (tfcp != fcport)) {
4950                                 /*
4951                                  * We have a conflict fcport with same NportID.
4952                                  */
4953                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
4954                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
4955                                     __func__, tfcp->port_name, tfcp->disc_state,
4956                                     tfcp->fw_login_state);
4957
4958                                 switch (tfcp->disc_state) {
4959                                 case DSC_DELETED:
4960                                         break;
4961                                 case DSC_DELETE_PEND:
4962                                         fcport->login_pause = 1;
4963                                         tfcp->conflict = fcport;
4964                                         break;
4965                                 default:
4966                                         fcport->login_pause = 1;
4967                                         tfcp->conflict = fcport;
4968                                         dfcp = tfcp;
4969                                         break;
4970                                 }
4971                         }
4972                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4973                         if (dfcp)
4974                                 qlt_schedule_sess_for_deletion(tfcp);
4975
4976
4977                         if (N2N_TOPO(vha->hw))
4978                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
4979
4980                         if (N2N_TOPO(vha->hw)) {
4981                                 if (vha->flags.nvme_enabled) {
4982                                         fcport->fc4f_nvme = 1;
4983                                         fcport->n2n_flag = 1;
4984                                 }
4985                                 fcport->fw_login_state = 0;
4986                                 /*
4987                                  * wait link init done before sending login
4988                                  */
4989                         } else {
4990                                 qla24xx_fcport_handle_login(vha, fcport);
4991                         }
4992                 }
4993         }
4994
4995         if (free_fcport) {
4996                 qla2x00_free_fcport(fcport);
4997                 if (pla)
4998                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
4999         }
5000 }
5001
5002 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5003 {
5004         struct srb *sp = e->u.iosb.sp;
5005         int rval;
5006
5007         rval = qla2x00_start_sp(sp);
5008         if (rval != QLA_SUCCESS) {
5009                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5010                     "%s: %s: Re-issue IOCB failed (%d).\n",
5011                     __func__, sp->name, rval);
5012                 qla24xx_sp_unmap(vha, sp);
5013         }
5014 }
5015
5016 void
5017 qla2x00_do_work(struct scsi_qla_host *vha)
5018 {
5019         struct qla_work_evt *e, *tmp;
5020         unsigned long flags;
5021         LIST_HEAD(work);
5022
5023         spin_lock_irqsave(&vha->work_lock, flags);
5024         list_splice_init(&vha->work_list, &work);
5025         spin_unlock_irqrestore(&vha->work_lock, flags);
5026
5027         list_for_each_entry_safe(e, tmp, &work, list) {
5028                 list_del_init(&e->list);
5029
5030                 switch (e->type) {
5031                 case QLA_EVT_AEN:
5032                         fc_host_post_event(vha->host, fc_get_event_number(),
5033                             e->u.aen.code, e->u.aen.data);
5034                         break;
5035                 case QLA_EVT_IDC_ACK:
5036                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5037                         break;
5038                 case QLA_EVT_ASYNC_LOGIN:
5039                         qla2x00_async_login(vha, e->u.logio.fcport,
5040                             e->u.logio.data);
5041                         break;
5042                 case QLA_EVT_ASYNC_LOGOUT:
5043                         qla2x00_async_logout(vha, e->u.logio.fcport);
5044                         break;
5045                 case QLA_EVT_ASYNC_LOGOUT_DONE:
5046                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
5047                             e->u.logio.data);
5048                         break;
5049                 case QLA_EVT_ASYNC_ADISC:
5050                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5051                             e->u.logio.data);
5052                         break;
5053                 case QLA_EVT_UEVENT:
5054                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5055                         break;
5056                 case QLA_EVT_AENFX:
5057                         qlafx00_process_aen(vha, e);
5058                         break;
5059                 case QLA_EVT_GPNID:
5060                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5061                         break;
5062                 case QLA_EVT_UNMAP:
5063                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5064                         break;
5065                 case QLA_EVT_RELOGIN:
5066                         qla2x00_relogin(vha);
5067                         break;
5068                 case QLA_EVT_NEW_SESS:
5069                         qla24xx_create_new_sess(vha, e);
5070                         break;
5071                 case QLA_EVT_GPDB:
5072                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5073                             e->u.fcport.opt);
5074                         break;
5075                 case QLA_EVT_PRLI:
5076                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5077                         break;
5078                 case QLA_EVT_GPSC:
5079                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5080                         break;
5081                 case QLA_EVT_GNL:
5082                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5083                         break;
5084                 case QLA_EVT_NACK:
5085                         qla24xx_do_nack_work(vha, e);
5086                         break;
5087                 case QLA_EVT_ASYNC_PRLO:
5088                         qla2x00_async_prlo(vha, e->u.logio.fcport);
5089                         break;
5090                 case QLA_EVT_ASYNC_PRLO_DONE:
5091                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5092                             e->u.logio.data);
5093                         break;
5094                 case QLA_EVT_GPNFT:
5095                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5096                             e->u.gpnft.sp);
5097                         break;
5098                 case QLA_EVT_GPNFT_DONE:
5099                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5100                         break;
5101                 case QLA_EVT_GNNFT_DONE:
5102                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5103                         break;
5104                 case QLA_EVT_GNNID:
5105                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5106                         break;
5107                 case QLA_EVT_GFPNID:
5108                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5109                         break;
5110                 case QLA_EVT_SP_RETRY:
5111                         qla_sp_retry(vha, e);
5112                         break;
5113                 case QLA_EVT_IIDMA:
5114                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5115                         break;
5116                 case QLA_EVT_ELS_PLOGI:
5117                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5118                             e->u.fcport.fcport, false);
5119                         break;
5120                 }
5121                 if (e->flags & QLA_EVT_FLAG_FREE)
5122                         kfree(e);
5123
5124                 /* For each work completed decrement vha ref count */
5125                 QLA_VHA_MARK_NOT_BUSY(vha);
5126         }
5127 }
5128
5129 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5130 {
5131         struct qla_work_evt *e;
5132
5133         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5134
5135         if (!e) {
5136                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5137                 return QLA_FUNCTION_FAILED;
5138         }
5139
5140         return qla2x00_post_work(vha, e);
5141 }
5142
5143 /* Relogins all the fcports of a vport
5144  * Context: dpc thread
5145  */
5146 void qla2x00_relogin(struct scsi_qla_host *vha)
5147 {
5148         fc_port_t       *fcport;
5149         int status, relogin_needed = 0;
5150         struct event_arg ea;
5151
5152         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5153                 /*
5154                  * If the port is not ONLINE then try to login
5155                  * to it if we haven't run out of retries.
5156                  */
5157                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5158                     fcport->login_retry) {
5159                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5160                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5161                                 continue;
5162
5163                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5164                                 fcport->disc_state == DSC_DELETE_PEND) {
5165                                 relogin_needed = 1;
5166                         } else {
5167                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5168                                         memset(&ea, 0, sizeof(ea));
5169                                         ea.event = FCME_RELOGIN;
5170                                         ea.fcport = fcport;
5171                                         qla2x00_fcport_event_handler(vha, &ea);
5172                                 } else if (vha->hw->current_topology ==
5173                                     ISP_CFG_NL) {
5174                                         fcport->login_retry--;
5175                                         status =
5176                                             qla2x00_local_device_login(vha,
5177                                                 fcport);
5178                                         if (status == QLA_SUCCESS) {
5179                                                 fcport->old_loop_id =
5180                                                     fcport->loop_id;
5181                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5182                                                     "Port login OK: logged in ID 0x%x.\n",
5183                                                     fcport->loop_id);
5184                                                 qla2x00_update_fcport
5185                                                         (vha, fcport);
5186                                         } else if (status == 1) {
5187                                                 set_bit(RELOGIN_NEEDED,
5188                                                     &vha->dpc_flags);
5189                                                 /* retry the login again */
5190                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5191                                                     "Retrying %d login again loop_id 0x%x.\n",
5192                                                     fcport->login_retry,
5193                                                     fcport->loop_id);
5194                                         } else {
5195                                                 fcport->login_retry = 0;
5196                                         }
5197
5198                                         if (fcport->login_retry == 0 &&
5199                                             status != QLA_SUCCESS)
5200                                                 qla2x00_clear_loop_id(fcport);
5201                                 }
5202                         }
5203                 }
5204                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5205                         break;
5206         }
5207
5208         if (relogin_needed)
5209                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5210
5211         ql_dbg(ql_dbg_disc, vha, 0x400e,
5212             "Relogin end.\n");
5213 }
5214
5215 /* Schedule work on any of the dpc-workqueues */
5216 void
5217 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5218 {
5219         struct qla_hw_data *ha = base_vha->hw;
5220
5221         switch (work_code) {
5222         case MBA_IDC_AEN: /* 0x8200 */
5223                 if (ha->dpc_lp_wq)
5224                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5225                 break;
5226
5227         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5228                 if (!ha->flags.nic_core_reset_hdlr_active) {
5229                         if (ha->dpc_hp_wq)
5230                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5231                 } else
5232                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5233                             "NIC Core reset is already active. Skip "
5234                             "scheduling it again.\n");
5235                 break;
5236         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5237                 if (ha->dpc_hp_wq)
5238                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5239                 break;
5240         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5241                 if (ha->dpc_hp_wq)
5242                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5243                 break;
5244         default:
5245                 ql_log(ql_log_warn, base_vha, 0xb05f,
5246                     "Unknown work-code=0x%x.\n", work_code);
5247         }
5248
5249         return;
5250 }
5251
5252 /* Work: Perform NIC Core Unrecoverable state handling */
5253 void
5254 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5255 {
5256         struct qla_hw_data *ha =
5257                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5258         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5259         uint32_t dev_state = 0;
5260
5261         qla83xx_idc_lock(base_vha, 0);
5262         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5263         qla83xx_reset_ownership(base_vha);
5264         if (ha->flags.nic_core_reset_owner) {
5265                 ha->flags.nic_core_reset_owner = 0;
5266                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5267                     QLA8XXX_DEV_FAILED);
5268                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5269                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5270         }
5271         qla83xx_idc_unlock(base_vha, 0);
5272 }
5273
5274 /* Work: Execute IDC state handler */
5275 void
5276 qla83xx_idc_state_handler_work(struct work_struct *work)
5277 {
5278         struct qla_hw_data *ha =
5279                 container_of(work, struct qla_hw_data, idc_state_handler);
5280         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5281         uint32_t dev_state = 0;
5282
5283         qla83xx_idc_lock(base_vha, 0);
5284         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5285         if (dev_state == QLA8XXX_DEV_FAILED ||
5286                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5287                 qla83xx_idc_state_handler(base_vha);
5288         qla83xx_idc_unlock(base_vha, 0);
5289 }
5290
5291 static int
5292 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5293 {
5294         int rval = QLA_SUCCESS;
5295         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5296         uint32_t heart_beat_counter1, heart_beat_counter2;
5297
5298         do {
5299                 if (time_after(jiffies, heart_beat_wait)) {
5300                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5301                             "Nic Core f/w is not alive.\n");
5302                         rval = QLA_FUNCTION_FAILED;
5303                         break;
5304                 }
5305
5306                 qla83xx_idc_lock(base_vha, 0);
5307                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5308                     &heart_beat_counter1);
5309                 qla83xx_idc_unlock(base_vha, 0);
5310                 msleep(100);
5311                 qla83xx_idc_lock(base_vha, 0);
5312                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5313                     &heart_beat_counter2);
5314                 qla83xx_idc_unlock(base_vha, 0);
5315         } while (heart_beat_counter1 == heart_beat_counter2);
5316
5317         return rval;
5318 }
5319
5320 /* Work: Perform NIC Core Reset handling */
5321 void
5322 qla83xx_nic_core_reset_work(struct work_struct *work)
5323 {
5324         struct qla_hw_data *ha =
5325                 container_of(work, struct qla_hw_data, nic_core_reset);
5326         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5327         uint32_t dev_state = 0;
5328
5329         if (IS_QLA2031(ha)) {
5330                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5331                         ql_log(ql_log_warn, base_vha, 0xb081,
5332                             "Failed to dump mctp\n");
5333                 return;
5334         }
5335
5336         if (!ha->flags.nic_core_reset_hdlr_active) {
5337                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5338                         qla83xx_idc_lock(base_vha, 0);
5339                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5340                             &dev_state);
5341                         qla83xx_idc_unlock(base_vha, 0);
5342                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5343                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5344                                     "Nic Core f/w is alive.\n");
5345                                 return;
5346                         }
5347                 }
5348
5349                 ha->flags.nic_core_reset_hdlr_active = 1;
5350                 if (qla83xx_nic_core_reset(base_vha)) {
5351                         /* NIC Core reset failed. */
5352                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5353                             "NIC Core reset failed.\n");
5354                 }
5355                 ha->flags.nic_core_reset_hdlr_active = 0;
5356         }
5357 }
5358
5359 /* Work: Handle 8200 IDC aens */
5360 void
5361 qla83xx_service_idc_aen(struct work_struct *work)
5362 {
5363         struct qla_hw_data *ha =
5364                 container_of(work, struct qla_hw_data, idc_aen);
5365         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5366         uint32_t dev_state, idc_control;
5367
5368         qla83xx_idc_lock(base_vha, 0);
5369         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5370         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5371         qla83xx_idc_unlock(base_vha, 0);
5372         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5373                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5374                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5375                             "Application requested NIC Core Reset.\n");
5376                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5377                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5378                     QLA_SUCCESS) {
5379                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5380                             "Other protocol driver requested NIC Core Reset.\n");
5381                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5382                 }
5383         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5384                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5385                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5386         }
5387 }
5388
5389 static void
5390 qla83xx_wait_logic(void)
5391 {
5392         int i;
5393
5394         /* Yield CPU */
5395         if (!in_interrupt()) {
5396                 /*
5397                  * Wait about 200ms before retrying again.
5398                  * This controls the number of retries for single
5399                  * lock operation.
5400                  */
5401                 msleep(100);
5402                 schedule();
5403         } else {
5404                 for (i = 0; i < 20; i++)
5405                         cpu_relax(); /* This a nop instr on i386 */
5406         }
5407 }
5408
5409 static int
5410 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5411 {
5412         int rval;
5413         uint32_t data;
5414         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5415         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5416         struct qla_hw_data *ha = base_vha->hw;
5417         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5418             "Trying force recovery of the IDC lock.\n");
5419
5420         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5421         if (rval)
5422                 return rval;
5423
5424         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5425                 return QLA_SUCCESS;
5426         } else {
5427                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5428                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5429                     data);
5430                 if (rval)
5431                         return rval;
5432
5433                 msleep(200);
5434
5435                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5436                     &data);
5437                 if (rval)
5438                         return rval;
5439
5440                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5441                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5442                                         ~(idc_lck_rcvry_stage_mask));
5443                         rval = qla83xx_wr_reg(base_vha,
5444                             QLA83XX_IDC_LOCK_RECOVERY, data);
5445                         if (rval)
5446                                 return rval;
5447
5448                         /* Forcefully perform IDC UnLock */
5449                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5450                             &data);
5451                         if (rval)
5452                                 return rval;
5453                         /* Clear lock-id by setting 0xff */
5454                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5455                             0xff);
5456                         if (rval)
5457                                 return rval;
5458                         /* Clear lock-recovery by setting 0x0 */
5459                         rval = qla83xx_wr_reg(base_vha,
5460                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5461                         if (rval)
5462                                 return rval;
5463                 } else
5464                         return QLA_SUCCESS;
5465         }
5466
5467         return rval;
5468 }
5469
5470 static int
5471 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5472 {
5473         int rval = QLA_SUCCESS;
5474         uint32_t o_drv_lockid, n_drv_lockid;
5475         unsigned long lock_recovery_timeout;
5476
5477         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5478 retry_lockid:
5479         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5480         if (rval)
5481                 goto exit;
5482
5483         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5484         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5485                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5486                         return QLA_SUCCESS;
5487                 else
5488                         return QLA_FUNCTION_FAILED;
5489         }
5490
5491         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5492         if (rval)
5493                 goto exit;
5494
5495         if (o_drv_lockid == n_drv_lockid) {
5496                 qla83xx_wait_logic();
5497                 goto retry_lockid;
5498         } else
5499                 return QLA_SUCCESS;
5500
5501 exit:
5502         return rval;
5503 }
5504
5505 void
5506 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5507 {
5508         uint16_t options = (requester_id << 15) | BIT_6;
5509         uint32_t data;
5510         uint32_t lock_owner;
5511         struct qla_hw_data *ha = base_vha->hw;
5512
5513         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5514 retry_lock:
5515         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5516             == QLA_SUCCESS) {
5517                 if (data) {
5518                         /* Setting lock-id to our function-number */
5519                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5520                             ha->portnum);
5521                 } else {
5522                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5523                             &lock_owner);
5524                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5525                             "Failed to acquire IDC lock, acquired by %d, "
5526                             "retrying...\n", lock_owner);
5527
5528                         /* Retry/Perform IDC-Lock recovery */
5529                         if (qla83xx_idc_lock_recovery(base_vha)
5530                             == QLA_SUCCESS) {
5531                                 qla83xx_wait_logic();
5532                                 goto retry_lock;
5533                         } else
5534                                 ql_log(ql_log_warn, base_vha, 0xb075,
5535                                     "IDC Lock recovery FAILED.\n");
5536                 }
5537
5538         }
5539
5540         return;
5541
5542         /* XXX: IDC-lock implementation using access-control mbx */
5543 retry_lock2:
5544         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5545                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5546                     "Failed to acquire IDC lock. retrying...\n");
5547                 /* Retry/Perform IDC-Lock recovery */
5548                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5549                         qla83xx_wait_logic();
5550                         goto retry_lock2;
5551                 } else
5552                         ql_log(ql_log_warn, base_vha, 0xb076,
5553                             "IDC Lock recovery FAILED.\n");
5554         }
5555
5556         return;
5557 }
5558
5559 void
5560 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5561 {
5562 #if 0
5563         uint16_t options = (requester_id << 15) | BIT_7;
5564 #endif
5565         uint16_t retry;
5566         uint32_t data;
5567         struct qla_hw_data *ha = base_vha->hw;
5568
5569         /* IDC-unlock implementation using driver-unlock/lock-id
5570          * remote registers
5571          */
5572         retry = 0;
5573 retry_unlock:
5574         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5575             == QLA_SUCCESS) {
5576                 if (data == ha->portnum) {
5577                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5578                         /* Clearing lock-id by setting 0xff */
5579                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5580                 } else if (retry < 10) {
5581                         /* SV: XXX: IDC unlock retrying needed here? */
5582
5583                         /* Retry for IDC-unlock */
5584                         qla83xx_wait_logic();
5585                         retry++;
5586                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5587                             "Failed to release IDC lock, retrying=%d\n", retry);
5588                         goto retry_unlock;
5589                 }
5590         } else if (retry < 10) {
5591                 /* Retry for IDC-unlock */
5592                 qla83xx_wait_logic();
5593                 retry++;
5594                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5595                     "Failed to read drv-lockid, retrying=%d\n", retry);
5596                 goto retry_unlock;
5597         }
5598
5599         return;
5600
5601 #if 0
5602         /* XXX: IDC-unlock implementation using access-control mbx */
5603         retry = 0;
5604 retry_unlock2:
5605         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5606                 if (retry < 10) {
5607                         /* Retry for IDC-unlock */
5608                         qla83xx_wait_logic();
5609                         retry++;
5610                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5611                             "Failed to release IDC lock, retrying=%d\n", retry);
5612                         goto retry_unlock2;
5613                 }
5614         }
5615
5616         return;
5617 #endif
5618 }
5619
5620 int
5621 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5622 {
5623         int rval = QLA_SUCCESS;
5624         struct qla_hw_data *ha = vha->hw;
5625         uint32_t drv_presence;
5626
5627         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5628         if (rval == QLA_SUCCESS) {
5629                 drv_presence |= (1 << ha->portnum);
5630                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5631                     drv_presence);
5632         }
5633
5634         return rval;
5635 }
5636
5637 int
5638 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5639 {
5640         int rval = QLA_SUCCESS;
5641
5642         qla83xx_idc_lock(vha, 0);
5643         rval = __qla83xx_set_drv_presence(vha);
5644         qla83xx_idc_unlock(vha, 0);
5645
5646         return rval;
5647 }
5648
5649 int
5650 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5651 {
5652         int rval = QLA_SUCCESS;
5653         struct qla_hw_data *ha = vha->hw;
5654         uint32_t drv_presence;
5655
5656         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5657         if (rval == QLA_SUCCESS) {
5658                 drv_presence &= ~(1 << ha->portnum);
5659                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5660                     drv_presence);
5661         }
5662
5663         return rval;
5664 }
5665
5666 int
5667 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5668 {
5669         int rval = QLA_SUCCESS;
5670
5671         qla83xx_idc_lock(vha, 0);
5672         rval = __qla83xx_clear_drv_presence(vha);
5673         qla83xx_idc_unlock(vha, 0);
5674
5675         return rval;
5676 }
5677
5678 static void
5679 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5680 {
5681         struct qla_hw_data *ha = vha->hw;
5682         uint32_t drv_ack, drv_presence;
5683         unsigned long ack_timeout;
5684
5685         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5686         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5687         while (1) {
5688                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5689                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5690                 if ((drv_ack & drv_presence) == drv_presence)
5691                         break;
5692
5693                 if (time_after_eq(jiffies, ack_timeout)) {
5694                         ql_log(ql_log_warn, vha, 0xb067,
5695                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5696                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5697                         /*
5698                          * The function(s) which did not ack in time are forced
5699                          * to withdraw any further participation in the IDC
5700                          * reset.
5701                          */
5702                         if (drv_ack != drv_presence)
5703                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5704                                     drv_ack);
5705                         break;
5706                 }
5707
5708                 qla83xx_idc_unlock(vha, 0);
5709                 msleep(1000);
5710                 qla83xx_idc_lock(vha, 0);
5711         }
5712
5713         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5714         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5715 }
5716
5717 static int
5718 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5719 {
5720         int rval = QLA_SUCCESS;
5721         uint32_t idc_control;
5722
5723         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5724         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5725
5726         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5727         __qla83xx_get_idc_control(vha, &idc_control);
5728         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5729         __qla83xx_set_idc_control(vha, 0);
5730
5731         qla83xx_idc_unlock(vha, 0);
5732         rval = qla83xx_restart_nic_firmware(vha);
5733         qla83xx_idc_lock(vha, 0);
5734
5735         if (rval != QLA_SUCCESS) {
5736                 ql_log(ql_log_fatal, vha, 0xb06a,
5737                     "Failed to restart NIC f/w.\n");
5738                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5739                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5740         } else {
5741                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5742                     "Success in restarting nic f/w.\n");
5743                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5744                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5745         }
5746
5747         return rval;
5748 }
5749
5750 /* Assumes idc_lock always held on entry */
5751 int
5752 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5753 {
5754         struct qla_hw_data *ha = base_vha->hw;
5755         int rval = QLA_SUCCESS;
5756         unsigned long dev_init_timeout;
5757         uint32_t dev_state;
5758
5759         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5760         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5761
5762         while (1) {
5763
5764                 if (time_after_eq(jiffies, dev_init_timeout)) {
5765                         ql_log(ql_log_warn, base_vha, 0xb06e,
5766                             "Initialization TIMEOUT!\n");
5767                         /* Init timeout. Disable further NIC Core
5768                          * communication.
5769                          */
5770                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5771                                 QLA8XXX_DEV_FAILED);
5772                         ql_log(ql_log_info, base_vha, 0xb06f,
5773                             "HW State: FAILED.\n");
5774                 }
5775
5776                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5777                 switch (dev_state) {
5778                 case QLA8XXX_DEV_READY:
5779                         if (ha->flags.nic_core_reset_owner)
5780                                 qla83xx_idc_audit(base_vha,
5781                                     IDC_AUDIT_COMPLETION);
5782                         ha->flags.nic_core_reset_owner = 0;
5783                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5784                             "Reset_owner reset by 0x%x.\n",
5785                             ha->portnum);
5786                         goto exit;
5787                 case QLA8XXX_DEV_COLD:
5788                         if (ha->flags.nic_core_reset_owner)
5789                                 rval = qla83xx_device_bootstrap(base_vha);
5790                         else {
5791                         /* Wait for AEN to change device-state */
5792                                 qla83xx_idc_unlock(base_vha, 0);
5793                                 msleep(1000);
5794                                 qla83xx_idc_lock(base_vha, 0);
5795                         }
5796                         break;
5797                 case QLA8XXX_DEV_INITIALIZING:
5798                         /* Wait for AEN to change device-state */
5799                         qla83xx_idc_unlock(base_vha, 0);
5800                         msleep(1000);
5801                         qla83xx_idc_lock(base_vha, 0);
5802                         break;
5803                 case QLA8XXX_DEV_NEED_RESET:
5804                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5805                                 qla83xx_need_reset_handler(base_vha);
5806                         else {
5807                                 /* Wait for AEN to change device-state */
5808                                 qla83xx_idc_unlock(base_vha, 0);
5809                                 msleep(1000);
5810                                 qla83xx_idc_lock(base_vha, 0);
5811                         }
5812                         /* reset timeout value after need reset handler */
5813                         dev_init_timeout = jiffies +
5814                             (ha->fcoe_dev_init_timeout * HZ);
5815                         break;
5816                 case QLA8XXX_DEV_NEED_QUIESCENT:
5817                         /* XXX: DEBUG for now */
5818                         qla83xx_idc_unlock(base_vha, 0);
5819                         msleep(1000);
5820                         qla83xx_idc_lock(base_vha, 0);
5821                         break;
5822                 case QLA8XXX_DEV_QUIESCENT:
5823                         /* XXX: DEBUG for now */
5824                         if (ha->flags.quiesce_owner)
5825                                 goto exit;
5826
5827                         qla83xx_idc_unlock(base_vha, 0);
5828                         msleep(1000);
5829                         qla83xx_idc_lock(base_vha, 0);
5830                         dev_init_timeout = jiffies +
5831                             (ha->fcoe_dev_init_timeout * HZ);
5832                         break;
5833                 case QLA8XXX_DEV_FAILED:
5834                         if (ha->flags.nic_core_reset_owner)
5835                                 qla83xx_idc_audit(base_vha,
5836                                     IDC_AUDIT_COMPLETION);
5837                         ha->flags.nic_core_reset_owner = 0;
5838                         __qla83xx_clear_drv_presence(base_vha);
5839                         qla83xx_idc_unlock(base_vha, 0);
5840                         qla8xxx_dev_failed_handler(base_vha);
5841                         rval = QLA_FUNCTION_FAILED;
5842                         qla83xx_idc_lock(base_vha, 0);
5843                         goto exit;
5844                 case QLA8XXX_BAD_VALUE:
5845                         qla83xx_idc_unlock(base_vha, 0);
5846                         msleep(1000);
5847                         qla83xx_idc_lock(base_vha, 0);
5848                         break;
5849                 default:
5850                         ql_log(ql_log_warn, base_vha, 0xb071,
5851                             "Unknown Device State: %x.\n", dev_state);
5852                         qla83xx_idc_unlock(base_vha, 0);
5853                         qla8xxx_dev_failed_handler(base_vha);
5854                         rval = QLA_FUNCTION_FAILED;
5855                         qla83xx_idc_lock(base_vha, 0);
5856                         goto exit;
5857                 }
5858         }
5859
5860 exit:
5861         return rval;
5862 }
5863
5864 void
5865 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5866 {
5867         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5868             board_disable);
5869         struct pci_dev *pdev = ha->pdev;
5870         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5871
5872         /*
5873          * if UNLOAD flag is already set, then continue unload,
5874          * where it was set first.
5875          */
5876         if (test_bit(UNLOADING, &base_vha->dpc_flags))
5877                 return;
5878
5879         ql_log(ql_log_warn, base_vha, 0x015b,
5880             "Disabling adapter.\n");
5881
5882         if (!atomic_read(&pdev->enable_cnt)) {
5883                 ql_log(ql_log_info, base_vha, 0xfffc,
5884                     "PCI device disabled, no action req for PCI error=%lx\n",
5885                     base_vha->pci_flags);
5886                 return;
5887         }
5888
5889         qla2x00_wait_for_sess_deletion(base_vha);
5890
5891         set_bit(UNLOADING, &base_vha->dpc_flags);
5892
5893         qla2x00_delete_all_vps(ha, base_vha);
5894
5895         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5896
5897         qla2x00_dfs_remove(base_vha);
5898
5899         qla84xx_put_chip(base_vha);
5900
5901         if (base_vha->timer_active)
5902                 qla2x00_stop_timer(base_vha);
5903
5904         base_vha->flags.online = 0;
5905
5906         qla2x00_destroy_deferred_work(ha);
5907
5908         /*
5909          * Do not try to stop beacon blink as it will issue a mailbox
5910          * command.
5911          */
5912         qla2x00_free_sysfs_attr(base_vha, false);
5913
5914         fc_remove_host(base_vha->host);
5915
5916         scsi_remove_host(base_vha->host);
5917
5918         base_vha->flags.init_done = 0;
5919         qla25xx_delete_queues(base_vha);
5920         qla2x00_free_fcports(base_vha);
5921         qla2x00_free_irqs(base_vha);
5922         qla2x00_mem_free(ha);
5923         qla82xx_md_free(base_vha);
5924         qla2x00_free_queues(ha);
5925
5926         qla2x00_unmap_iobases(ha);
5927
5928         pci_release_selected_regions(ha->pdev, ha->bars);
5929         pci_disable_pcie_error_reporting(pdev);
5930         pci_disable_device(pdev);
5931
5932         /*
5933          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5934          */
5935 }
5936
5937 /**************************************************************************
5938 * qla2x00_do_dpc
5939 *   This kernel thread is a task that is schedule by the interrupt handler
5940 *   to perform the background processing for interrupts.
5941 *
5942 * Notes:
5943 * This task always run in the context of a kernel thread.  It
5944 * is kick-off by the driver's detect code and starts up
5945 * up one per adapter. It immediately goes to sleep and waits for
5946 * some fibre event.  When either the interrupt handler or
5947 * the timer routine detects a event it will one of the task
5948 * bits then wake us up.
5949 **************************************************************************/
5950 static int
5951 qla2x00_do_dpc(void *data)
5952 {
5953         scsi_qla_host_t *base_vha;
5954         struct qla_hw_data *ha;
5955         uint32_t online;
5956         struct qla_qpair *qpair;
5957
5958         ha = (struct qla_hw_data *)data;
5959         base_vha = pci_get_drvdata(ha->pdev);
5960
5961         set_user_nice(current, MIN_NICE);
5962
5963         set_current_state(TASK_INTERRUPTIBLE);
5964         while (!kthread_should_stop()) {
5965                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5966                     "DPC handler sleeping.\n");
5967
5968                 schedule();
5969
5970                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5971                         goto end_loop;
5972
5973                 if (ha->flags.eeh_busy) {
5974                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5975                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5976                         goto end_loop;
5977                 }
5978
5979                 ha->dpc_active = 1;
5980
5981                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5982                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5983                     base_vha->dpc_flags);
5984
5985                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5986                         break;
5987
5988                 if (IS_P3P_TYPE(ha)) {
5989                         if (IS_QLA8044(ha)) {
5990                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5991                                         &base_vha->dpc_flags)) {
5992                                         qla8044_idc_lock(ha);
5993                                         qla8044_wr_direct(base_vha,
5994                                                 QLA8044_CRB_DEV_STATE_INDEX,
5995                                                 QLA8XXX_DEV_FAILED);
5996                                         qla8044_idc_unlock(ha);
5997                                         ql_log(ql_log_info, base_vha, 0x4004,
5998                                                 "HW State: FAILED.\n");
5999                                         qla8044_device_state_handler(base_vha);
6000                                         continue;
6001                                 }
6002
6003                         } else {
6004                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6005                                         &base_vha->dpc_flags)) {
6006                                         qla82xx_idc_lock(ha);
6007                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6008                                                 QLA8XXX_DEV_FAILED);
6009                                         qla82xx_idc_unlock(ha);
6010                                         ql_log(ql_log_info, base_vha, 0x0151,
6011                                                 "HW State: FAILED.\n");
6012                                         qla82xx_device_state_handler(base_vha);
6013                                         continue;
6014                                 }
6015                         }
6016
6017                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6018                                 &base_vha->dpc_flags)) {
6019
6020                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6021                                     "FCoE context reset scheduled.\n");
6022                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6023                                         &base_vha->dpc_flags))) {
6024                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6025                                                 /* FCoE-ctx reset failed.
6026                                                  * Escalate to chip-reset
6027                                                  */
6028                                                 set_bit(ISP_ABORT_NEEDED,
6029                                                         &base_vha->dpc_flags);
6030                                         }
6031                                         clear_bit(ABORT_ISP_ACTIVE,
6032                                                 &base_vha->dpc_flags);
6033                                 }
6034
6035                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6036                                     "FCoE context reset end.\n");
6037                         }
6038                 } else if (IS_QLAFX00(ha)) {
6039                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6040                                 &base_vha->dpc_flags)) {
6041                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6042                                     "Firmware Reset Recovery\n");
6043                                 if (qlafx00_reset_initialize(base_vha)) {
6044                                         /* Failed. Abort isp later. */
6045                                         if (!test_bit(UNLOADING,
6046                                             &base_vha->dpc_flags)) {
6047                                                 set_bit(ISP_UNRECOVERABLE,
6048                                                     &base_vha->dpc_flags);
6049                                                 ql_dbg(ql_dbg_dpc, base_vha,
6050                                                     0x4021,
6051                                                     "Reset Recovery Failed\n");
6052                                         }
6053                                 }
6054                         }
6055
6056                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6057                                 &base_vha->dpc_flags)) {
6058                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6059                                     "ISPFx00 Target Scan scheduled\n");
6060                                 if (qlafx00_rescan_isp(base_vha)) {
6061                                         if (!test_bit(UNLOADING,
6062                                             &base_vha->dpc_flags))
6063                                                 set_bit(ISP_UNRECOVERABLE,
6064                                                     &base_vha->dpc_flags);
6065                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6066                                             "ISPFx00 Target Scan Failed\n");
6067                                 }
6068                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6069                                     "ISPFx00 Target Scan End\n");
6070                         }
6071                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6072                                 &base_vha->dpc_flags)) {
6073                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6074                                     "ISPFx00 Host Info resend scheduled\n");
6075                                 qlafx00_fx_disc(base_vha,
6076                                     &base_vha->hw->mr.fcport,
6077                                     FXDISC_REG_HOST_INFO);
6078                         }
6079                 }
6080
6081                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6082                         &base_vha->dpc_flags) &&
6083                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6084                         qla24xx_detect_sfp(base_vha);
6085
6086                         if (ha->flags.detected_lr_sfp !=
6087                             ha->flags.using_lr_setting)
6088                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6089                 }
6090
6091                 if (test_and_clear_bit
6092                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6093                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6094                         bool do_reset = true;
6095
6096                         switch (base_vha->qlini_mode) {
6097                         case QLA2XXX_INI_MODE_ENABLED:
6098                                 break;
6099                         case QLA2XXX_INI_MODE_DISABLED:
6100                                 if (!qla_tgt_mode_enabled(base_vha) &&
6101                                     !ha->flags.fw_started)
6102                                         do_reset = false;
6103                                 break;
6104                         case QLA2XXX_INI_MODE_DUAL:
6105                                 if (!qla_dual_mode_enabled(base_vha) &&
6106                                     !ha->flags.fw_started)
6107                                         do_reset = false;
6108                                 break;
6109                         default:
6110                                 break;
6111                         }
6112
6113                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6114                             &base_vha->dpc_flags))) {
6115                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6116                                     "ISP abort scheduled.\n");
6117                                 if (ha->isp_ops->abort_isp(base_vha)) {
6118                                         /* failed. retry later */
6119                                         set_bit(ISP_ABORT_NEEDED,
6120                                             &base_vha->dpc_flags);
6121                                 }
6122                                 clear_bit(ABORT_ISP_ACTIVE,
6123                                                 &base_vha->dpc_flags);
6124                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6125                                     "ISP abort end.\n");
6126                         }
6127                 }
6128
6129                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6130                     &base_vha->dpc_flags)) {
6131                         qla2x00_update_fcports(base_vha);
6132                 }
6133
6134                 if (IS_QLAFX00(ha))
6135                         goto loop_resync_check;
6136
6137                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6138                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6139                             "Quiescence mode scheduled.\n");
6140                         if (IS_P3P_TYPE(ha)) {
6141                                 if (IS_QLA82XX(ha))
6142                                         qla82xx_device_state_handler(base_vha);
6143                                 if (IS_QLA8044(ha))
6144                                         qla8044_device_state_handler(base_vha);
6145                                 clear_bit(ISP_QUIESCE_NEEDED,
6146                                     &base_vha->dpc_flags);
6147                                 if (!ha->flags.quiesce_owner) {
6148                                         qla2x00_perform_loop_resync(base_vha);
6149                                         if (IS_QLA82XX(ha)) {
6150                                                 qla82xx_idc_lock(ha);
6151                                                 qla82xx_clear_qsnt_ready(
6152                                                     base_vha);
6153                                                 qla82xx_idc_unlock(ha);
6154                                         } else if (IS_QLA8044(ha)) {
6155                                                 qla8044_idc_lock(ha);
6156                                                 qla8044_clear_qsnt_ready(
6157                                                     base_vha);
6158                                                 qla8044_idc_unlock(ha);
6159                                         }
6160                                 }
6161                         } else {
6162                                 clear_bit(ISP_QUIESCE_NEEDED,
6163                                     &base_vha->dpc_flags);
6164                                 qla2x00_quiesce_io(base_vha);
6165                         }
6166                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6167                             "Quiescence mode end.\n");
6168                 }
6169
6170                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6171                                 &base_vha->dpc_flags) &&
6172                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6173
6174                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6175                             "Reset marker scheduled.\n");
6176                         qla2x00_rst_aen(base_vha);
6177                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6178                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6179                             "Reset marker end.\n");
6180                 }
6181
6182                 /* Retry each device up to login retry count */
6183                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6184                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6185                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6186
6187                         if (!base_vha->relogin_jif ||
6188                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6189                                 base_vha->relogin_jif = jiffies + HZ;
6190                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6191
6192                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6193                                     "Relogin scheduled.\n");
6194                                 qla24xx_post_relogin_work(base_vha);
6195                         }
6196                 }
6197 loop_resync_check:
6198                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6199                     &base_vha->dpc_flags)) {
6200
6201                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6202                             "Loop resync scheduled.\n");
6203
6204                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6205                             &base_vha->dpc_flags))) {
6206
6207                                 qla2x00_loop_resync(base_vha);
6208
6209                                 clear_bit(LOOP_RESYNC_ACTIVE,
6210                                                 &base_vha->dpc_flags);
6211                         }
6212
6213                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6214                             "Loop resync end.\n");
6215                 }
6216
6217                 if (IS_QLAFX00(ha))
6218                         goto intr_on_check;
6219
6220                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6221                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6222                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6223                         qla2xxx_flash_npiv_conf(base_vha);
6224                 }
6225
6226 intr_on_check:
6227                 if (!ha->interrupts_on)
6228                         ha->isp_ops->enable_intrs(ha);
6229
6230                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6231                                         &base_vha->dpc_flags)) {
6232                         if (ha->beacon_blink_led == 1)
6233                                 ha->isp_ops->beacon_blink(base_vha);
6234                 }
6235
6236                 /* qpair online check */
6237                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6238                     &base_vha->dpc_flags)) {
6239                         if (ha->flags.eeh_busy ||
6240                             ha->flags.pci_channel_io_perm_failure)
6241                                 online = 0;
6242                         else
6243                                 online = 1;
6244
6245                         mutex_lock(&ha->mq_lock);
6246                         list_for_each_entry(qpair, &base_vha->qp_list,
6247                             qp_list_elem)
6248                         qpair->online = online;
6249                         mutex_unlock(&ha->mq_lock);
6250                 }
6251
6252                 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED,
6253                     &base_vha->dpc_flags)) {
6254                         ql_log(ql_log_info, base_vha, 0xffffff,
6255                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6256                                                 ha->nvme_last_rptd_aen);
6257                         if (qla27xx_set_zio_threshold(base_vha,
6258                             ha->nvme_last_rptd_aen)) {
6259                                 ql_log(ql_log_info, base_vha, 0xffffff,
6260                                     "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6261                                     ha->nvme_last_rptd_aen);
6262                         }
6263                 }
6264
6265                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
6266                     &base_vha->dpc_flags)) {
6267                         ql_log(ql_log_info, base_vha, 0xffffff,
6268                             "SET ZIO Activity exchange threshold to %d.\n",
6269                             ha->last_zio_threshold);
6270                         qla27xx_set_zio_threshold(base_vha,
6271                             ha->last_zio_threshold);
6272                 }
6273
6274                 if (!IS_QLAFX00(ha))
6275                         qla2x00_do_dpc_all_vps(base_vha);
6276
6277                 if (test_and_clear_bit(N2N_LINK_RESET,
6278                         &base_vha->dpc_flags)) {
6279                         qla2x00_lip_reset(base_vha);
6280                 }
6281
6282                 ha->dpc_active = 0;
6283 end_loop:
6284                 set_current_state(TASK_INTERRUPTIBLE);
6285         } /* End of while(1) */
6286         __set_current_state(TASK_RUNNING);
6287
6288         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6289             "DPC handler exiting.\n");
6290
6291         /*
6292          * Make sure that nobody tries to wake us up again.
6293          */
6294         ha->dpc_active = 0;
6295
6296         /* Cleanup any residual CTX SRBs. */
6297         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6298
6299         return 0;
6300 }
6301
6302 void
6303 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6304 {
6305         struct qla_hw_data *ha = vha->hw;
6306         struct task_struct *t = ha->dpc_thread;
6307
6308         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6309                 wake_up_process(t);
6310 }
6311
6312 /*
6313 *  qla2x00_rst_aen
6314 *      Processes asynchronous reset.
6315 *
6316 * Input:
6317 *      ha  = adapter block pointer.
6318 */
6319 static void
6320 qla2x00_rst_aen(scsi_qla_host_t *vha)
6321 {
6322         if (vha->flags.online && !vha->flags.reset_active &&
6323             !atomic_read(&vha->loop_down_timer) &&
6324             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6325                 do {
6326                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6327
6328                         /*
6329                          * Issue marker command only when we are going to start
6330                          * the I/O.
6331                          */
6332                         vha->marker_needed = 1;
6333                 } while (!atomic_read(&vha->loop_down_timer) &&
6334                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6335         }
6336 }
6337
6338 /**************************************************************************
6339 *   qla2x00_timer
6340 *
6341 * Description:
6342 *   One second timer
6343 *
6344 * Context: Interrupt
6345 ***************************************************************************/
6346 void
6347 qla2x00_timer(struct timer_list *t)
6348 {
6349         scsi_qla_host_t *vha = from_timer(vha, t, timer);
6350         unsigned long   cpu_flags = 0;
6351         int             start_dpc = 0;
6352         int             index;
6353         srb_t           *sp;
6354         uint16_t        w;
6355         struct qla_hw_data *ha = vha->hw;
6356         struct req_que *req;
6357
6358         if (ha->flags.eeh_busy) {
6359                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6360                     "EEH = %d, restarting timer.\n",
6361                     ha->flags.eeh_busy);
6362                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6363                 return;
6364         }
6365
6366         /*
6367          * Hardware read to raise pending EEH errors during mailbox waits. If
6368          * the read returns -1 then disable the board.
6369          */
6370         if (!pci_channel_offline(ha->pdev)) {
6371                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6372                 qla2x00_check_reg16_for_disconnect(vha, w);
6373         }
6374
6375         /* Make sure qla82xx_watchdog is run only for physical port */
6376         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6377                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6378                         start_dpc++;
6379                 if (IS_QLA82XX(ha))
6380                         qla82xx_watchdog(vha);
6381                 else if (IS_QLA8044(ha))
6382                         qla8044_watchdog(vha);
6383         }
6384
6385         if (!vha->vp_idx && IS_QLAFX00(ha))
6386                 qlafx00_timer_routine(vha);
6387
6388         /* Loop down handler. */
6389         if (atomic_read(&vha->loop_down_timer) > 0 &&
6390             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6391             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6392                 && vha->flags.online) {
6393
6394                 if (atomic_read(&vha->loop_down_timer) ==
6395                     vha->loop_down_abort_time) {
6396
6397                         ql_log(ql_log_info, vha, 0x6008,
6398                             "Loop down - aborting the queues before time expires.\n");
6399
6400                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6401                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6402
6403                         /*
6404                          * Schedule an ISP abort to return any FCP2-device
6405                          * commands.
6406                          */
6407                         /* NPIV - scan physical port only */
6408                         if (!vha->vp_idx) {
6409                                 spin_lock_irqsave(&ha->hardware_lock,
6410                                     cpu_flags);
6411                                 req = ha->req_q_map[0];
6412                                 for (index = 1;
6413                                     index < req->num_outstanding_cmds;
6414                                     index++) {
6415                                         fc_port_t *sfcp;
6416
6417                                         sp = req->outstanding_cmds[index];
6418                                         if (!sp)
6419                                                 continue;
6420                                         if (sp->cmd_type != TYPE_SRB)
6421                                                 continue;
6422                                         if (sp->type != SRB_SCSI_CMD)
6423                                                 continue;
6424                                         sfcp = sp->fcport;
6425                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6426                                                 continue;
6427
6428                                         if (IS_QLA82XX(ha))
6429                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6430                                                         &vha->dpc_flags);
6431                                         else
6432                                                 set_bit(ISP_ABORT_NEEDED,
6433                                                         &vha->dpc_flags);
6434                                         break;
6435                                 }
6436                                 spin_unlock_irqrestore(&ha->hardware_lock,
6437                                                                 cpu_flags);
6438                         }
6439                         start_dpc++;
6440                 }
6441
6442                 /* if the loop has been down for 4 minutes, reinit adapter */
6443                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6444                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6445                                 ql_log(ql_log_warn, vha, 0x6009,
6446                                     "Loop down - aborting ISP.\n");
6447
6448                                 if (IS_QLA82XX(ha))
6449                                         set_bit(FCOE_CTX_RESET_NEEDED,
6450                                                 &vha->dpc_flags);
6451                                 else
6452                                         set_bit(ISP_ABORT_NEEDED,
6453                                                 &vha->dpc_flags);
6454                         }
6455                 }
6456                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6457                     "Loop down - seconds remaining %d.\n",
6458                     atomic_read(&vha->loop_down_timer));
6459         }
6460         /* Check if beacon LED needs to be blinked for physical host only */
6461         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6462                 /* There is no beacon_blink function for ISP82xx */
6463                 if (!IS_P3P_TYPE(ha)) {
6464                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6465                         start_dpc++;
6466                 }
6467         }
6468
6469         /* Process any deferred work. */
6470         if (!list_empty(&vha->work_list)) {
6471                 unsigned long flags;
6472                 bool q = false;
6473
6474                 spin_lock_irqsave(&vha->work_lock, flags);
6475                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6476                         q = true;
6477                 spin_unlock_irqrestore(&vha->work_lock, flags);
6478                 if (q)
6479                         queue_work(vha->hw->wq, &vha->iocb_work);
6480         }
6481
6482         /*
6483          * FC-NVME
6484          * see if the active AEN count has changed from what was last reported.
6485          */
6486         if (!vha->vp_idx && (atomic_read(&ha->nvme_active_aen_cnt) !=
6487             ha->nvme_last_rptd_aen) && ha->zio_mode == QLA_ZIO_MODE_6) {
6488                 ql_log(ql_log_info, vha, 0x3002,
6489                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6490                     ha->nvme_last_rptd_aen);
6491                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6492                 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6493                 start_dpc++;
6494         }
6495
6496         if (!vha->vp_idx &&
6497             (atomic_read(&ha->zio_threshold) != ha->last_zio_threshold) &&
6498             (ha->zio_mode == QLA_ZIO_MODE_6) &&
6499             (IS_QLA83XX(ha) || IS_QLA27XX(ha))) {
6500                 ql_log(ql_log_info, vha, 0x3002,
6501                     "Sched: Set ZIO exchange threshold to %d.\n",
6502                     ha->last_zio_threshold);
6503                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
6504                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6505                 start_dpc++;
6506         }
6507
6508         /* Schedule the DPC routine if needed */
6509         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6510             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6511             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6512             start_dpc ||
6513             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6514             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6515             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6516             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6517             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6518             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6519                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6520                     "isp_abort_needed=%d loop_resync_needed=%d "
6521                     "fcport_update_needed=%d start_dpc=%d "
6522                     "reset_marker_needed=%d",
6523                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6524                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6525                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6526                     start_dpc,
6527                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6528                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6529                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6530                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6531                     "relogin_needed=%d.\n",
6532                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6533                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6534                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6535                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6536                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6537                 qla2xxx_wake_dpc(vha);
6538         }
6539
6540         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6541 }
6542
6543 /* Firmware interface routines. */
6544
6545 #define FW_BLOBS        11
6546 #define FW_ISP21XX      0
6547 #define FW_ISP22XX      1
6548 #define FW_ISP2300      2
6549 #define FW_ISP2322      3
6550 #define FW_ISP24XX      4
6551 #define FW_ISP25XX      5
6552 #define FW_ISP81XX      6
6553 #define FW_ISP82XX      7
6554 #define FW_ISP2031      8
6555 #define FW_ISP8031      9
6556 #define FW_ISP27XX      10
6557
6558 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6559 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6560 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6561 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6562 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6563 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6564 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6565 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6566 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6567 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6568 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6569
6570
6571 static DEFINE_MUTEX(qla_fw_lock);
6572
6573 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6574         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6575         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6576         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6577         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6578         { .name = FW_FILE_ISP24XX, },
6579         { .name = FW_FILE_ISP25XX, },
6580         { .name = FW_FILE_ISP81XX, },
6581         { .name = FW_FILE_ISP82XX, },
6582         { .name = FW_FILE_ISP2031, },
6583         { .name = FW_FILE_ISP8031, },
6584         { .name = FW_FILE_ISP27XX, },
6585 };
6586
6587 struct fw_blob *
6588 qla2x00_request_firmware(scsi_qla_host_t *vha)
6589 {
6590         struct qla_hw_data *ha = vha->hw;
6591         struct fw_blob *blob;
6592
6593         if (IS_QLA2100(ha)) {
6594                 blob = &qla_fw_blobs[FW_ISP21XX];
6595         } else if (IS_QLA2200(ha)) {
6596                 blob = &qla_fw_blobs[FW_ISP22XX];
6597         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6598                 blob = &qla_fw_blobs[FW_ISP2300];
6599         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6600                 blob = &qla_fw_blobs[FW_ISP2322];
6601         } else if (IS_QLA24XX_TYPE(ha)) {
6602                 blob = &qla_fw_blobs[FW_ISP24XX];
6603         } else if (IS_QLA25XX(ha)) {
6604                 blob = &qla_fw_blobs[FW_ISP25XX];
6605         } else if (IS_QLA81XX(ha)) {
6606                 blob = &qla_fw_blobs[FW_ISP81XX];
6607         } else if (IS_QLA82XX(ha)) {
6608                 blob = &qla_fw_blobs[FW_ISP82XX];
6609         } else if (IS_QLA2031(ha)) {
6610                 blob = &qla_fw_blobs[FW_ISP2031];
6611         } else if (IS_QLA8031(ha)) {
6612                 blob = &qla_fw_blobs[FW_ISP8031];
6613         } else if (IS_QLA27XX(ha)) {
6614                 blob = &qla_fw_blobs[FW_ISP27XX];
6615         } else {
6616                 return NULL;
6617         }
6618
6619         mutex_lock(&qla_fw_lock);
6620         if (blob->fw)
6621                 goto out;
6622
6623         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6624                 ql_log(ql_log_warn, vha, 0x0063,
6625                     "Failed to load firmware image (%s).\n", blob->name);
6626                 blob->fw = NULL;
6627                 blob = NULL;
6628                 goto out;
6629         }
6630
6631 out:
6632         mutex_unlock(&qla_fw_lock);
6633         return blob;
6634 }
6635
6636 static void
6637 qla2x00_release_firmware(void)
6638 {
6639         int idx;
6640
6641         mutex_lock(&qla_fw_lock);
6642         for (idx = 0; idx < FW_BLOBS; idx++)
6643                 release_firmware(qla_fw_blobs[idx].fw);
6644         mutex_unlock(&qla_fw_lock);
6645 }
6646
6647 static pci_ers_result_t
6648 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6649 {
6650         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6651         struct qla_hw_data *ha = vha->hw;
6652
6653         ql_dbg(ql_dbg_aer, vha, 0x9000,
6654             "PCI error detected, state %x.\n", state);
6655
6656         if (!atomic_read(&pdev->enable_cnt)) {
6657                 ql_log(ql_log_info, vha, 0xffff,
6658                         "PCI device is disabled,state %x\n", state);
6659                 return PCI_ERS_RESULT_NEED_RESET;
6660         }
6661
6662         switch (state) {
6663         case pci_channel_io_normal:
6664                 ha->flags.eeh_busy = 0;
6665                 if (ql2xmqsupport || ql2xnvmeenable) {
6666                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6667                         qla2xxx_wake_dpc(vha);
6668                 }
6669                 return PCI_ERS_RESULT_CAN_RECOVER;
6670         case pci_channel_io_frozen:
6671                 ha->flags.eeh_busy = 1;
6672                 /* For ISP82XX complete any pending mailbox cmd */
6673                 if (IS_QLA82XX(ha)) {
6674                         ha->flags.isp82xx_fw_hung = 1;
6675                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6676                         qla82xx_clear_pending_mbx(vha);
6677                 }
6678                 qla2x00_free_irqs(vha);
6679                 pci_disable_device(pdev);
6680                 /* Return back all IOs */
6681                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6682                 if (ql2xmqsupport || ql2xnvmeenable) {
6683                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6684                         qla2xxx_wake_dpc(vha);
6685                 }
6686                 return PCI_ERS_RESULT_NEED_RESET;
6687         case pci_channel_io_perm_failure:
6688                 ha->flags.pci_channel_io_perm_failure = 1;
6689                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6690                 if (ql2xmqsupport || ql2xnvmeenable) {
6691                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6692                         qla2xxx_wake_dpc(vha);
6693                 }
6694                 return PCI_ERS_RESULT_DISCONNECT;
6695         }
6696         return PCI_ERS_RESULT_NEED_RESET;
6697 }
6698
6699 static pci_ers_result_t
6700 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6701 {
6702         int risc_paused = 0;
6703         uint32_t stat;
6704         unsigned long flags;
6705         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6706         struct qla_hw_data *ha = base_vha->hw;
6707         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6708         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6709
6710         if (IS_QLA82XX(ha))
6711                 return PCI_ERS_RESULT_RECOVERED;
6712
6713         spin_lock_irqsave(&ha->hardware_lock, flags);
6714         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6715                 stat = RD_REG_DWORD(&reg->hccr);
6716                 if (stat & HCCR_RISC_PAUSE)
6717                         risc_paused = 1;
6718         } else if (IS_QLA23XX(ha)) {
6719                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6720                 if (stat & HSR_RISC_PAUSED)
6721                         risc_paused = 1;
6722         } else if (IS_FWI2_CAPABLE(ha)) {
6723                 stat = RD_REG_DWORD(&reg24->host_status);
6724                 if (stat & HSRX_RISC_PAUSED)
6725                         risc_paused = 1;
6726         }
6727         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6728
6729         if (risc_paused) {
6730                 ql_log(ql_log_info, base_vha, 0x9003,
6731                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6732                 ha->isp_ops->fw_dump(base_vha, 0);
6733
6734                 return PCI_ERS_RESULT_NEED_RESET;
6735         } else
6736                 return PCI_ERS_RESULT_RECOVERED;
6737 }
6738
6739 static uint32_t
6740 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6741 {
6742         uint32_t rval = QLA_FUNCTION_FAILED;
6743         uint32_t drv_active = 0;
6744         struct qla_hw_data *ha = base_vha->hw;
6745         int fn;
6746         struct pci_dev *other_pdev = NULL;
6747
6748         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6749             "Entered %s.\n", __func__);
6750
6751         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6752
6753         if (base_vha->flags.online) {
6754                 /* Abort all outstanding commands,
6755                  * so as to be requeued later */
6756                 qla2x00_abort_isp_cleanup(base_vha);
6757         }
6758
6759
6760         fn = PCI_FUNC(ha->pdev->devfn);
6761         while (fn > 0) {
6762                 fn--;
6763                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6764                     "Finding pci device at function = 0x%x.\n", fn);
6765                 other_pdev =
6766                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6767                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6768                     fn));
6769
6770                 if (!other_pdev)
6771                         continue;
6772                 if (atomic_read(&other_pdev->enable_cnt)) {
6773                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6774                             "Found PCI func available and enable at 0x%x.\n",
6775                             fn);
6776                         pci_dev_put(other_pdev);
6777                         break;
6778                 }
6779                 pci_dev_put(other_pdev);
6780         }
6781
6782         if (!fn) {
6783                 /* Reset owner */
6784                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6785                     "This devfn is reset owner = 0x%x.\n",
6786                     ha->pdev->devfn);
6787                 qla82xx_idc_lock(ha);
6788
6789                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6790                     QLA8XXX_DEV_INITIALIZING);
6791
6792                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6793                     QLA82XX_IDC_VERSION);
6794
6795                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6796                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6797                     "drv_active = 0x%x.\n", drv_active);
6798
6799                 qla82xx_idc_unlock(ha);
6800                 /* Reset if device is not already reset
6801                  * drv_active would be 0 if a reset has already been done
6802                  */
6803                 if (drv_active)
6804                         rval = qla82xx_start_firmware(base_vha);
6805                 else
6806                         rval = QLA_SUCCESS;
6807                 qla82xx_idc_lock(ha);
6808
6809                 if (rval != QLA_SUCCESS) {
6810                         ql_log(ql_log_info, base_vha, 0x900b,
6811                             "HW State: FAILED.\n");
6812                         qla82xx_clear_drv_active(ha);
6813                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6814                             QLA8XXX_DEV_FAILED);
6815                 } else {
6816                         ql_log(ql_log_info, base_vha, 0x900c,
6817                             "HW State: READY.\n");
6818                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6819                             QLA8XXX_DEV_READY);
6820                         qla82xx_idc_unlock(ha);
6821                         ha->flags.isp82xx_fw_hung = 0;
6822                         rval = qla82xx_restart_isp(base_vha);
6823                         qla82xx_idc_lock(ha);
6824                         /* Clear driver state register */
6825                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6826                         qla82xx_set_drv_active(base_vha);
6827                 }
6828                 qla82xx_idc_unlock(ha);
6829         } else {
6830                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6831                     "This devfn is not reset owner = 0x%x.\n",
6832                     ha->pdev->devfn);
6833                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6834                     QLA8XXX_DEV_READY)) {
6835                         ha->flags.isp82xx_fw_hung = 0;
6836                         rval = qla82xx_restart_isp(base_vha);
6837                         qla82xx_idc_lock(ha);
6838                         qla82xx_set_drv_active(base_vha);
6839                         qla82xx_idc_unlock(ha);
6840                 }
6841         }
6842         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6843
6844         return rval;
6845 }
6846
6847 static pci_ers_result_t
6848 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6849 {
6850         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6851         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6852         struct qla_hw_data *ha = base_vha->hw;
6853         struct rsp_que *rsp;
6854         int rc, retries = 10;
6855
6856         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6857             "Slot Reset.\n");
6858
6859         /* Workaround: qla2xxx driver which access hardware earlier
6860          * needs error state to be pci_channel_io_online.
6861          * Otherwise mailbox command timesout.
6862          */
6863         pdev->error_state = pci_channel_io_normal;
6864
6865         pci_restore_state(pdev);
6866
6867         /* pci_restore_state() clears the saved_state flag of the device
6868          * save restored state which resets saved_state flag
6869          */
6870         pci_save_state(pdev);
6871
6872         if (ha->mem_only)
6873                 rc = pci_enable_device_mem(pdev);
6874         else
6875                 rc = pci_enable_device(pdev);
6876
6877         if (rc) {
6878                 ql_log(ql_log_warn, base_vha, 0x9005,
6879                     "Can't re-enable PCI device after reset.\n");
6880                 goto exit_slot_reset;
6881         }
6882
6883         rsp = ha->rsp_q_map[0];
6884         if (qla2x00_request_irqs(ha, rsp))
6885                 goto exit_slot_reset;
6886
6887         if (ha->isp_ops->pci_config(base_vha))
6888                 goto exit_slot_reset;
6889
6890         if (IS_QLA82XX(ha)) {
6891                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6892                         ret = PCI_ERS_RESULT_RECOVERED;
6893                         goto exit_slot_reset;
6894                 } else
6895                         goto exit_slot_reset;
6896         }
6897
6898         while (ha->flags.mbox_busy && retries--)
6899                 msleep(1000);
6900
6901         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6902         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6903                 ret =  PCI_ERS_RESULT_RECOVERED;
6904         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6905
6906
6907 exit_slot_reset:
6908         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6909             "slot_reset return %x.\n", ret);
6910
6911         return ret;
6912 }
6913
6914 static void
6915 qla2xxx_pci_resume(struct pci_dev *pdev)
6916 {
6917         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6918         struct qla_hw_data *ha = base_vha->hw;
6919         int ret;
6920
6921         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6922             "pci_resume.\n");
6923
6924         ret = qla2x00_wait_for_hba_online(base_vha);
6925         if (ret != QLA_SUCCESS) {
6926                 ql_log(ql_log_fatal, base_vha, 0x9002,
6927                     "The device failed to resume I/O from slot/link_reset.\n");
6928         }
6929
6930         ha->flags.eeh_busy = 0;
6931 }
6932
6933 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6934 {
6935         int rc;
6936         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6937         struct blk_mq_queue_map *qmap = &shost->tag_set.map[0];
6938
6939         if (USER_CTRL_IRQ(vha->hw))
6940                 rc = blk_mq_map_queues(qmap);
6941         else
6942                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
6943         return rc;
6944 }
6945
6946 static const struct pci_error_handlers qla2xxx_err_handler = {
6947         .error_detected = qla2xxx_pci_error_detected,
6948         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6949         .slot_reset = qla2xxx_pci_slot_reset,
6950         .resume = qla2xxx_pci_resume,
6951 };
6952
6953 static struct pci_device_id qla2xxx_pci_tbl[] = {
6954         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6955         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6956         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6957         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6958         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6959         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6960         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6961         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6962         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6963         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6964         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6965         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6966         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6967         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6968         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6969         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6970         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6971         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6972         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6973         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6974         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6975         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6976         { 0 },
6977 };
6978 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6979
6980 static struct pci_driver qla2xxx_pci_driver = {
6981         .name           = QLA2XXX_DRIVER_NAME,
6982         .driver         = {
6983                 .owner          = THIS_MODULE,
6984         },
6985         .id_table       = qla2xxx_pci_tbl,
6986         .probe          = qla2x00_probe_one,
6987         .remove         = qla2x00_remove_one,
6988         .shutdown       = qla2x00_shutdown,
6989         .err_handler    = &qla2xxx_err_handler,
6990 };
6991
6992 static const struct file_operations apidev_fops = {
6993         .owner = THIS_MODULE,
6994         .llseek = noop_llseek,
6995 };
6996
6997 /**
6998  * qla2x00_module_init - Module initialization.
6999  **/
7000 static int __init
7001 qla2x00_module_init(void)
7002 {
7003         int ret = 0;
7004
7005         /* Allocate cache for SRBs. */
7006         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
7007             SLAB_HWCACHE_ALIGN, NULL);
7008         if (srb_cachep == NULL) {
7009                 ql_log(ql_log_fatal, NULL, 0x0001,
7010                     "Unable to allocate SRB cache...Failing load!.\n");
7011                 return -ENOMEM;
7012         }
7013
7014         /* Initialize target kmem_cache and mem_pools */
7015         ret = qlt_init();
7016         if (ret < 0) {
7017                 kmem_cache_destroy(srb_cachep);
7018                 return ret;
7019         } else if (ret > 0) {
7020                 /*
7021                  * If initiator mode is explictly disabled by qlt_init(),
7022                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7023                  * performing scsi_scan_target() during LOOP UP event.
7024                  */
7025                 qla2xxx_transport_functions.disable_target_scan = 1;
7026                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
7027         }
7028
7029         /* Derive version string. */
7030         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
7031         if (ql2xextended_error_logging)
7032                 strcat(qla2x00_version_str, "-debug");
7033         if (ql2xextended_error_logging == 1)
7034                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
7035
7036         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
7037                 qla_insert_tgt_attrs();
7038
7039         qla2xxx_transport_template =
7040             fc_attach_transport(&qla2xxx_transport_functions);
7041         if (!qla2xxx_transport_template) {
7042                 kmem_cache_destroy(srb_cachep);
7043                 ql_log(ql_log_fatal, NULL, 0x0002,
7044                     "fc_attach_transport failed...Failing load!.\n");
7045                 qlt_exit();
7046                 return -ENODEV;
7047         }
7048
7049         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7050         if (apidev_major < 0) {
7051                 ql_log(ql_log_fatal, NULL, 0x0003,
7052                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7053         }
7054
7055         qla2xxx_transport_vport_template =
7056             fc_attach_transport(&qla2xxx_transport_vport_functions);
7057         if (!qla2xxx_transport_vport_template) {
7058                 kmem_cache_destroy(srb_cachep);
7059                 qlt_exit();
7060                 fc_release_transport(qla2xxx_transport_template);
7061                 ql_log(ql_log_fatal, NULL, 0x0004,
7062                     "fc_attach_transport vport failed...Failing load!.\n");
7063                 return -ENODEV;
7064         }
7065         ql_log(ql_log_info, NULL, 0x0005,
7066             "QLogic Fibre Channel HBA Driver: %s.\n",
7067             qla2x00_version_str);
7068         ret = pci_register_driver(&qla2xxx_pci_driver);
7069         if (ret) {
7070                 kmem_cache_destroy(srb_cachep);
7071                 qlt_exit();
7072                 fc_release_transport(qla2xxx_transport_template);
7073                 fc_release_transport(qla2xxx_transport_vport_template);
7074                 ql_log(ql_log_fatal, NULL, 0x0006,
7075                     "pci_register_driver failed...ret=%d Failing load!.\n",
7076                     ret);
7077         }
7078         return ret;
7079 }
7080
7081 /**
7082  * qla2x00_module_exit - Module cleanup.
7083  **/
7084 static void __exit
7085 qla2x00_module_exit(void)
7086 {
7087         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7088         pci_unregister_driver(&qla2xxx_pci_driver);
7089         qla2x00_release_firmware();
7090         kmem_cache_destroy(srb_cachep);
7091         qlt_exit();
7092         kmem_cache_destroy(ctx_cachep);
7093         fc_release_transport(qla2xxx_transport_template);
7094         fc_release_transport(qla2xxx_transport_vport_template);
7095 }
7096
7097 module_init(qla2x00_module_init);
7098 module_exit(qla2x00_module_exit);
7099
7100 MODULE_AUTHOR("QLogic Corporation");
7101 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7102 MODULE_LICENSE("GPL");
7103 MODULE_VERSION(QLA2XXX_VERSION);
7104 MODULE_FIRMWARE(FW_FILE_ISP21XX);
7105 MODULE_FIRMWARE(FW_FILE_ISP22XX);
7106 MODULE_FIRMWARE(FW_FILE_ISP2300);
7107 MODULE_FIRMWARE(FW_FILE_ISP2322);
7108 MODULE_FIRMWARE(FW_FILE_ISP24XX);
7109 MODULE_FIRMWARE(FW_FILE_ISP25XX);