2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <linux/blk-mq-pci.h>
17 #include <linux/refcount.h>
19 #include <scsi/scsi_tcq.h>
20 #include <scsi/scsicam.h>
21 #include <scsi/scsi_transport.h>
22 #include <scsi/scsi_transport_fc.h>
24 #include "qla_target.h"
29 char qla2x00_version_str[40];
31 static int apidev_major;
34 * SRB allocation cache
36 struct kmem_cache *srb_cachep;
39 * CT6 CTX allocation cache
41 static struct kmem_cache *ctx_cachep;
43 * error level for logging
45 int ql_errlev = ql_log_all;
47 static int ql2xenableclass2;
48 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
49 MODULE_PARM_DESC(ql2xenableclass2,
50 "Specify if Class 2 operations are supported from the very "
51 "beginning. Default is 0 - class 2 not supported.");
54 int ql2xlogintimeout = 20;
55 module_param(ql2xlogintimeout, int, S_IRUGO);
56 MODULE_PARM_DESC(ql2xlogintimeout,
57 "Login timeout value in seconds.");
59 int qlport_down_retry;
60 module_param(qlport_down_retry, int, S_IRUGO);
61 MODULE_PARM_DESC(qlport_down_retry,
62 "Maximum number of command retries to a port that returns "
63 "a PORT-DOWN status.");
65 int ql2xplogiabsentdevice;
66 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
67 MODULE_PARM_DESC(ql2xplogiabsentdevice,
68 "Option to enable PLOGI to devices that are not present after "
69 "a Fabric scan. This is needed for several broken switches. "
70 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
72 int ql2xloginretrycount = 0;
73 module_param(ql2xloginretrycount, int, S_IRUGO);
74 MODULE_PARM_DESC(ql2xloginretrycount,
75 "Specify an alternate value for the NVRAM login retry count.");
77 int ql2xallocfwdump = 1;
78 module_param(ql2xallocfwdump, int, S_IRUGO);
79 MODULE_PARM_DESC(ql2xallocfwdump,
80 "Option to enable allocation of memory for a firmware dump "
81 "during HBA initialization. Memory allocation requirements "
82 "vary by ISP type. Default is 1 - allocate memory.");
84 int ql2xextended_error_logging;
85 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
86 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
87 MODULE_PARM_DESC(ql2xextended_error_logging,
88 "Option to enable extended error logging,\n"
89 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
90 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
91 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
92 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
93 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
94 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
95 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
96 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
97 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
98 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
99 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
100 "\t\t0x1e400000 - Preferred value for capturing essential "
101 "debug information (equivalent to old "
102 "ql2xextended_error_logging=1).\n"
103 "\t\tDo LOGICAL OR of the value to enable more than one level");
105 int ql2xshiftctondsd = 6;
106 module_param(ql2xshiftctondsd, int, S_IRUGO);
107 MODULE_PARM_DESC(ql2xshiftctondsd,
108 "Set to control shifting of command type processing "
109 "based on total number of SG elements.");
111 int ql2xfdmienable=1;
112 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
113 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
114 MODULE_PARM_DESC(ql2xfdmienable,
115 "Enables FDMI registrations. "
116 "0 - no FDMI. Default is 1 - perform FDMI.");
118 #define MAX_Q_DEPTH 64
119 static int ql2xmaxqdepth = MAX_Q_DEPTH;
120 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
121 MODULE_PARM_DESC(ql2xmaxqdepth,
122 "Maximum queue depth to set for each LUN. "
125 #if (IS_ENABLED(CONFIG_NVME_FC))
128 int ql2xenabledif = 2;
130 module_param(ql2xenabledif, int, S_IRUGO);
131 MODULE_PARM_DESC(ql2xenabledif,
132 " Enable T10-CRC-DIF:\n"
134 " 0 -- No DIF Support\n"
135 " 1 -- Enable DIF for all types\n"
136 " 2 -- Enable DIF for all types, except Type 0.\n");
138 #if (IS_ENABLED(CONFIG_NVME_FC))
139 int ql2xnvmeenable = 1;
143 module_param(ql2xnvmeenable, int, 0644);
144 MODULE_PARM_DESC(ql2xnvmeenable,
145 "Enables NVME support. "
146 "0 - no NVMe. Default is Y");
148 int ql2xenablehba_err_chk = 2;
149 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
150 MODULE_PARM_DESC(ql2xenablehba_err_chk,
151 " Enable T10-CRC-DIF Error isolation by HBA:\n"
153 " 0 -- Error isolation disabled\n"
154 " 1 -- Error isolation enabled only for DIX Type 0\n"
155 " 2 -- Error isolation enabled for all Types\n");
157 int ql2xiidmaenable=1;
158 module_param(ql2xiidmaenable, int, S_IRUGO);
159 MODULE_PARM_DESC(ql2xiidmaenable,
160 "Enables iIDMA settings "
161 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
163 int ql2xmqsupport = 1;
164 module_param(ql2xmqsupport, int, S_IRUGO);
165 MODULE_PARM_DESC(ql2xmqsupport,
166 "Enable on demand multiple queue pairs support "
167 "Default is 1 for supported. "
168 "Set it to 0 to turn off mq qpair support.");
171 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
172 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
173 MODULE_PARM_DESC(ql2xfwloadbin,
174 "Option to specify location from which to load ISP firmware:.\n"
175 " 2 -- load firmware via the request_firmware() (hotplug).\n"
177 " 1 -- load firmware from flash.\n"
178 " 0 -- use default semantics.\n");
181 module_param(ql2xetsenable, int, S_IRUGO);
182 MODULE_PARM_DESC(ql2xetsenable,
183 "Enables firmware ETS burst."
184 "Default is 0 - skip ETS enablement.");
187 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
188 MODULE_PARM_DESC(ql2xdbwr,
189 "Option to specify scheme for request queue posting.\n"
190 " 0 -- Regular doorbell.\n"
191 " 1 -- CAMRAM doorbell (faster).\n");
193 int ql2xtargetreset = 1;
194 module_param(ql2xtargetreset, int, S_IRUGO);
195 MODULE_PARM_DESC(ql2xtargetreset,
196 "Enable target reset."
197 "Default is 1 - use hw defaults.");
200 module_param(ql2xgffidenable, int, S_IRUGO);
201 MODULE_PARM_DESC(ql2xgffidenable,
202 "Enables GFF_ID checks of port type. "
203 "Default is 0 - Do not use GFF_ID information.");
205 int ql2xasynctmfenable = 1;
206 module_param(ql2xasynctmfenable, int, S_IRUGO);
207 MODULE_PARM_DESC(ql2xasynctmfenable,
208 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
209 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
211 int ql2xdontresethba;
212 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
213 MODULE_PARM_DESC(ql2xdontresethba,
214 "Option to specify reset behaviour.\n"
215 " 0 (Default) -- Reset on failure.\n"
216 " 1 -- Do not reset on failure.\n");
218 uint64_t ql2xmaxlun = MAX_LUNS;
219 module_param(ql2xmaxlun, ullong, S_IRUGO);
220 MODULE_PARM_DESC(ql2xmaxlun,
221 "Defines the maximum LU number to register with the SCSI "
222 "midlayer. Default is 65535.");
224 int ql2xmdcapmask = 0x1F;
225 module_param(ql2xmdcapmask, int, S_IRUGO);
226 MODULE_PARM_DESC(ql2xmdcapmask,
227 "Set the Minidump driver capture mask level. "
228 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
230 int ql2xmdenable = 1;
231 module_param(ql2xmdenable, int, S_IRUGO);
232 MODULE_PARM_DESC(ql2xmdenable,
233 "Enable/disable MiniDump. "
234 "0 - MiniDump disabled. "
235 "1 (Default) - MiniDump enabled.");
237 int ql2xexlogins = 0;
238 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
239 MODULE_PARM_DESC(ql2xexlogins,
240 "Number of extended Logins. "
241 "0 (Default)- Disabled.");
243 int ql2xexchoffld = 1024;
244 module_param(ql2xexchoffld, uint, 0644);
245 MODULE_PARM_DESC(ql2xexchoffld,
246 "Number of target exchanges.");
248 int ql2xiniexchg = 1024;
249 module_param(ql2xiniexchg, uint, 0644);
250 MODULE_PARM_DESC(ql2xiniexchg,
251 "Number of initiator exchanges.");
253 int ql2xfwholdabts = 0;
254 module_param(ql2xfwholdabts, int, S_IRUGO);
255 MODULE_PARM_DESC(ql2xfwholdabts,
256 "Allow FW to hold status IOCB until ABTS rsp received. "
257 "0 (Default) Do not set fw option. "
258 "1 - Set fw option to hold ABTS.");
260 int ql2xmvasynctoatio = 1;
261 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
262 MODULE_PARM_DESC(ql2xmvasynctoatio,
263 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
264 "0 (Default). Do not move IOCBs"
267 int ql2xautodetectsfp = 1;
268 module_param(ql2xautodetectsfp, int, 0444);
269 MODULE_PARM_DESC(ql2xautodetectsfp,
270 "Detect SFP range and set appropriate distance.\n"
271 "1 (Default): Enable\n");
273 int ql2xenablemsix = 1;
274 module_param(ql2xenablemsix, int, 0444);
275 MODULE_PARM_DESC(ql2xenablemsix,
276 "Set to enable MSI or MSI-X interrupt mechanism.\n"
277 " Default is 1, enable MSI-X interrupt mechanism.\n"
278 " 0 -- enable traditional pin-based mechanism.\n"
279 " 1 -- enable MSI-X interrupt mechanism.\n"
280 " 2 -- enable MSI interrupt mechanism.\n");
282 int qla2xuseresexchforels;
283 module_param(qla2xuseresexchforels, int, 0444);
284 MODULE_PARM_DESC(qla2xuseresexchforels,
285 "Reserve 1/2 of emergency exchanges for ELS.\n"
286 " 0 (default): disabled");
289 * SCSI host template entry points
291 static int qla2xxx_slave_configure(struct scsi_device * device);
292 static int qla2xxx_slave_alloc(struct scsi_device *);
293 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
294 static void qla2xxx_scan_start(struct Scsi_Host *);
295 static void qla2xxx_slave_destroy(struct scsi_device *);
296 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
297 static int qla2xxx_eh_abort(struct scsi_cmnd *);
298 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
299 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
300 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
301 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
303 static void qla2x00_clear_drv_active(struct qla_hw_data *);
304 static void qla2x00_free_device(scsi_qla_host_t *);
305 static int qla2xxx_map_queues(struct Scsi_Host *shost);
306 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
309 struct scsi_host_template qla2xxx_driver_template = {
310 .module = THIS_MODULE,
311 .name = QLA2XXX_DRIVER_NAME,
312 .queuecommand = qla2xxx_queuecommand,
314 .eh_timed_out = fc_eh_timed_out,
315 .eh_abort_handler = qla2xxx_eh_abort,
316 .eh_device_reset_handler = qla2xxx_eh_device_reset,
317 .eh_target_reset_handler = qla2xxx_eh_target_reset,
318 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
319 .eh_host_reset_handler = qla2xxx_eh_host_reset,
321 .slave_configure = qla2xxx_slave_configure,
323 .slave_alloc = qla2xxx_slave_alloc,
324 .slave_destroy = qla2xxx_slave_destroy,
325 .scan_finished = qla2xxx_scan_finished,
326 .scan_start = qla2xxx_scan_start,
327 .change_queue_depth = scsi_change_queue_depth,
328 .map_queues = qla2xxx_map_queues,
331 .use_clustering = ENABLE_CLUSTERING,
332 .sg_tablesize = SG_ALL,
334 .max_sectors = 0xFFFF,
335 .shost_attrs = qla2x00_host_attrs,
337 .supported_mode = MODE_INITIATOR,
338 .track_queue_depth = 1,
341 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
342 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
344 /* TODO Convert to inlines
350 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
352 timer_setup(&vha->timer, qla2x00_timer, 0);
353 vha->timer.expires = jiffies + interval * HZ;
354 add_timer(&vha->timer);
355 vha->timer_active = 1;
359 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
361 /* Currently used for 82XX only. */
362 if (vha->device_flags & DFLG_DEV_FAILED) {
363 ql_dbg(ql_dbg_timer, vha, 0x600d,
364 "Device in a failed state, returning.\n");
368 mod_timer(&vha->timer, jiffies + interval * HZ);
371 static __inline__ void
372 qla2x00_stop_timer(scsi_qla_host_t *vha)
374 del_timer_sync(&vha->timer);
375 vha->timer_active = 0;
378 static int qla2x00_do_dpc(void *data);
380 static void qla2x00_rst_aen(scsi_qla_host_t *);
382 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
383 struct req_que **, struct rsp_que **);
384 static void qla2x00_free_fw_dump(struct qla_hw_data *);
385 static void qla2x00_mem_free(struct qla_hw_data *);
386 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
387 struct qla_qpair *qpair);
389 /* -------------------------------------------------------------------------- */
390 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
393 struct qla_hw_data *ha = vha->hw;
394 rsp->qpair = ha->base_qpair;
396 ha->base_qpair->hw = ha;
397 ha->base_qpair->req = req;
398 ha->base_qpair->rsp = rsp;
399 ha->base_qpair->vha = vha;
400 ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
401 ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
402 ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
403 ha->base_qpair->srb_mempool = ha->srb_mempool;
404 INIT_LIST_HEAD(&ha->base_qpair->hints_list);
405 ha->base_qpair->enable_class_2 = ql2xenableclass2;
406 /* init qpair to this cpu. Will adjust at run time. */
407 qla_cpu_update(rsp->qpair, raw_smp_processor_id());
408 ha->base_qpair->pdev = ha->pdev;
410 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
411 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
414 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
417 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
418 ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
420 if (!ha->req_q_map) {
421 ql_log(ql_log_fatal, vha, 0x003b,
422 "Unable to allocate memory for request queue ptrs.\n");
426 ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
428 if (!ha->rsp_q_map) {
429 ql_log(ql_log_fatal, vha, 0x003c,
430 "Unable to allocate memory for response queue ptrs.\n");
434 ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
435 if (ha->base_qpair == NULL) {
436 ql_log(ql_log_warn, vha, 0x00e0,
437 "Failed to allocate base queue pair memory.\n");
438 goto fail_base_qpair;
441 qla_init_base_qpair(vha, req, rsp);
443 if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
444 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
446 if (!ha->queue_pair_map) {
447 ql_log(ql_log_fatal, vha, 0x0180,
448 "Unable to allocate memory for queue pair ptrs.\n");
454 * Make sure we record at least the request and response queue zero in
455 * case we need to free them if part of the probe fails.
457 ha->rsp_q_map[0] = rsp;
458 ha->req_q_map[0] = req;
459 set_bit(0, ha->rsp_qid_map);
460 set_bit(0, ha->req_qid_map);
464 kfree(ha->base_qpair);
465 ha->base_qpair = NULL;
467 kfree(ha->rsp_q_map);
468 ha->rsp_q_map = NULL;
470 kfree(ha->req_q_map);
471 ha->req_q_map = NULL;
476 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
478 if (IS_QLAFX00(ha)) {
479 if (req && req->ring_fx00)
480 dma_free_coherent(&ha->pdev->dev,
481 (req->length_fx00 + 1) * sizeof(request_t),
482 req->ring_fx00, req->dma_fx00);
483 } else if (req && req->ring)
484 dma_free_coherent(&ha->pdev->dev,
485 (req->length + 1) * sizeof(request_t),
486 req->ring, req->dma);
489 kfree(req->outstanding_cmds);
494 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
496 if (IS_QLAFX00(ha)) {
497 if (rsp && rsp->ring_fx00)
498 dma_free_coherent(&ha->pdev->dev,
499 (rsp->length_fx00 + 1) * sizeof(request_t),
500 rsp->ring_fx00, rsp->dma_fx00);
501 } else if (rsp && rsp->ring) {
502 dma_free_coherent(&ha->pdev->dev,
503 (rsp->length + 1) * sizeof(response_t),
504 rsp->ring, rsp->dma);
509 static void qla2x00_free_queues(struct qla_hw_data *ha)
516 if (ha->queue_pair_map) {
517 kfree(ha->queue_pair_map);
518 ha->queue_pair_map = NULL;
520 if (ha->base_qpair) {
521 kfree(ha->base_qpair);
522 ha->base_qpair = NULL;
525 spin_lock_irqsave(&ha->hardware_lock, flags);
526 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
527 if (!test_bit(cnt, ha->req_qid_map))
530 req = ha->req_q_map[cnt];
531 clear_bit(cnt, ha->req_qid_map);
532 ha->req_q_map[cnt] = NULL;
534 spin_unlock_irqrestore(&ha->hardware_lock, flags);
535 qla2x00_free_req_que(ha, req);
536 spin_lock_irqsave(&ha->hardware_lock, flags);
538 spin_unlock_irqrestore(&ha->hardware_lock, flags);
540 kfree(ha->req_q_map);
541 ha->req_q_map = NULL;
544 spin_lock_irqsave(&ha->hardware_lock, flags);
545 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
546 if (!test_bit(cnt, ha->rsp_qid_map))
549 rsp = ha->rsp_q_map[cnt];
550 clear_bit(cnt, ha->rsp_qid_map);
551 ha->rsp_q_map[cnt] = NULL;
552 spin_unlock_irqrestore(&ha->hardware_lock, flags);
553 qla2x00_free_rsp_que(ha, rsp);
554 spin_lock_irqsave(&ha->hardware_lock, flags);
556 spin_unlock_irqrestore(&ha->hardware_lock, flags);
558 kfree(ha->rsp_q_map);
559 ha->rsp_q_map = NULL;
563 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
565 struct qla_hw_data *ha = vha->hw;
566 static char *pci_bus_modes[] = {
567 "33", "66", "100", "133",
572 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
575 strcat(str, pci_bus_modes[pci_bus]);
577 pci_bus = (ha->pci_attr & BIT_8) >> 8;
579 strcat(str, pci_bus_modes[pci_bus]);
581 strcat(str, " MHz)");
587 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
589 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
590 struct qla_hw_data *ha = vha->hw;
593 if (pci_is_pcie(ha->pdev)) {
595 uint32_t lstat, lspeed, lwidth;
597 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
598 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
599 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
601 strcpy(str, "PCIe (");
604 strcat(str, "2.5GT/s ");
607 strcat(str, "5.0GT/s ");
610 strcat(str, "8.0GT/s ");
613 strcat(str, "<unknown> ");
616 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
623 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
624 if (pci_bus == 0 || pci_bus == 8) {
626 strcat(str, pci_bus_modes[pci_bus >> 3]);
630 strcat(str, "Mode 2");
632 strcat(str, "Mode 1");
634 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
636 strcat(str, " MHz)");
642 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
645 struct qla_hw_data *ha = vha->hw;
647 snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
648 ha->fw_minor_version, ha->fw_subminor_version);
650 if (ha->fw_attributes & BIT_9) {
655 switch (ha->fw_attributes & 0xFF) {
669 sprintf(un_str, "(%x)", ha->fw_attributes);
673 if (ha->fw_attributes & 0x100)
680 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
682 struct qla_hw_data *ha = vha->hw;
684 snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
685 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
690 qla2x00_sp_free_dma(void *ptr)
693 struct qla_hw_data *ha = sp->vha->hw;
694 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
695 void *ctx = GET_CMD_CTX_SP(sp);
697 if (sp->flags & SRB_DMA_VALID) {
699 sp->flags &= ~SRB_DMA_VALID;
702 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
703 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
704 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
705 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
711 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
712 /* List assured to be having elements */
713 qla2x00_clean_dsd_pool(ha, ctx);
714 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
717 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
718 struct crc_context *ctx0 = ctx;
720 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
721 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
724 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
725 struct ct6_dsd *ctx1 = ctx;
727 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
729 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
730 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
731 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
732 mempool_free(ctx1, ha->ctx_mempool);
736 if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
743 qla2x00_sp_compl(void *ptr, int res)
746 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
750 if (atomic_read(&sp->ref_count) == 0) {
751 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
752 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
754 if (ql2xextended_error_logging & ql_dbg_io)
755 WARN_ON(atomic_read(&sp->ref_count) == 0);
758 if (!atomic_dec_and_test(&sp->ref_count))
766 qla2xxx_qpair_sp_free_dma(void *ptr)
768 srb_t *sp = (srb_t *)ptr;
769 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
770 struct qla_hw_data *ha = sp->fcport->vha->hw;
771 void *ctx = GET_CMD_CTX_SP(sp);
773 if (sp->flags & SRB_DMA_VALID) {
775 sp->flags &= ~SRB_DMA_VALID;
778 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
779 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
780 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
781 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
787 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
788 /* List assured to be having elements */
789 qla2x00_clean_dsd_pool(ha, ctx);
790 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
793 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
794 struct crc_context *ctx0 = ctx;
796 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
797 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
800 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
801 struct ct6_dsd *ctx1 = ctx;
802 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
804 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
805 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
806 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
807 mempool_free(ctx1, ha->ctx_mempool);
811 qla2xxx_rel_qpair_sp(sp->qpair, sp);
815 qla2xxx_qpair_sp_compl(void *ptr, int res)
818 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
822 if (atomic_read(&sp->ref_count) == 0) {
823 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
824 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
826 if (ql2xextended_error_logging & ql_dbg_io)
827 WARN_ON(atomic_read(&sp->ref_count) == 0);
830 if (!atomic_dec_and_test(&sp->ref_count))
837 /* If we are SP1 here, we need to still take and release the host_lock as SP1
838 * does not have the changes necessary to avoid taking host->host_lock.
841 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
843 scsi_qla_host_t *vha = shost_priv(host);
844 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
845 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
846 struct qla_hw_data *ha = vha->hw;
847 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
850 struct qla_qpair *qpair = NULL;
854 if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
855 cmd->result = DID_NO_CONNECT << 16;
856 goto qc24_fail_command;
860 if (shost_use_blk_mq(vha->host)) {
861 tag = blk_mq_unique_tag(cmd->request);
862 hwq = blk_mq_unique_tag_to_hwq(tag);
863 qpair = ha->queue_pair_map[hwq];
864 } else if (vha->vp_idx && vha->qpair) {
869 return qla2xxx_mqueuecommand(host, cmd, qpair);
872 if (ha->flags.eeh_busy) {
873 if (ha->flags.pci_channel_io_perm_failure) {
874 ql_dbg(ql_dbg_aer, vha, 0x9010,
875 "PCI Channel IO permanent failure, exiting "
877 cmd->result = DID_NO_CONNECT << 16;
879 ql_dbg(ql_dbg_aer, vha, 0x9011,
880 "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
881 cmd->result = DID_REQUEUE << 16;
883 goto qc24_fail_command;
886 rval = fc_remote_port_chkready(rport);
889 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
890 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
892 goto qc24_fail_command;
895 if (!vha->flags.difdix_supported &&
896 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
897 ql_dbg(ql_dbg_io, vha, 0x3004,
898 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
900 cmd->result = DID_NO_CONNECT << 16;
901 goto qc24_fail_command;
905 cmd->result = DID_NO_CONNECT << 16;
906 goto qc24_fail_command;
909 if (atomic_read(&fcport->state) != FCS_ONLINE) {
910 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
911 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
912 ql_dbg(ql_dbg_io, vha, 0x3005,
913 "Returning DNC, fcport_state=%d loop_state=%d.\n",
914 atomic_read(&fcport->state),
915 atomic_read(&base_vha->loop_state));
916 cmd->result = DID_NO_CONNECT << 16;
917 goto qc24_fail_command;
919 goto qc24_target_busy;
923 * Return target busy if we've received a non-zero retry_delay_timer
926 if (fcport->retry_delay_timestamp == 0) {
927 /* retry delay not set */
928 } else if (time_after(jiffies, fcport->retry_delay_timestamp))
929 fcport->retry_delay_timestamp = 0;
931 goto qc24_target_busy;
933 sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
937 sp->u.scmd.cmd = cmd;
938 sp->type = SRB_SCSI_CMD;
939 atomic_set(&sp->ref_count, 1);
940 CMD_SP(cmd) = (void *)sp;
941 sp->free = qla2x00_sp_free_dma;
942 sp->done = qla2x00_sp_compl;
944 rval = ha->isp_ops->start_scsi(sp);
945 if (rval != QLA_SUCCESS) {
946 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
947 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
948 goto qc24_host_busy_free_sp;
953 qc24_host_busy_free_sp:
957 return SCSI_MLQUEUE_HOST_BUSY;
960 return SCSI_MLQUEUE_TARGET_BUSY;
968 /* For MQ supported I/O */
970 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
971 struct qla_qpair *qpair)
973 scsi_qla_host_t *vha = shost_priv(host);
974 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
975 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
976 struct qla_hw_data *ha = vha->hw;
977 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
981 rval = fc_remote_port_chkready(rport);
984 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
985 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
987 goto qc24_fail_command;
991 cmd->result = DID_NO_CONNECT << 16;
992 goto qc24_fail_command;
995 if (atomic_read(&fcport->state) != FCS_ONLINE) {
996 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
997 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
998 ql_dbg(ql_dbg_io, vha, 0x3077,
999 "Returning DNC, fcport_state=%d loop_state=%d.\n",
1000 atomic_read(&fcport->state),
1001 atomic_read(&base_vha->loop_state));
1002 cmd->result = DID_NO_CONNECT << 16;
1003 goto qc24_fail_command;
1005 goto qc24_target_busy;
1009 * Return target busy if we've received a non-zero retry_delay_timer
1012 if (fcport->retry_delay_timestamp == 0) {
1013 /* retry delay not set */
1014 } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1015 fcport->retry_delay_timestamp = 0;
1017 goto qc24_target_busy;
1019 sp = qla2xxx_get_qpair_sp(vha, qpair, fcport, GFP_ATOMIC);
1021 goto qc24_host_busy;
1023 sp->u.scmd.cmd = cmd;
1024 sp->type = SRB_SCSI_CMD;
1025 atomic_set(&sp->ref_count, 1);
1026 CMD_SP(cmd) = (void *)sp;
1027 sp->free = qla2xxx_qpair_sp_free_dma;
1028 sp->done = qla2xxx_qpair_sp_compl;
1031 rval = ha->isp_ops->start_scsi_mq(sp);
1032 if (rval != QLA_SUCCESS) {
1033 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1034 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1035 if (rval == QLA_INTERFACE_ERROR)
1036 goto qc24_fail_command;
1037 goto qc24_host_busy_free_sp;
1042 qc24_host_busy_free_sp:
1046 return SCSI_MLQUEUE_HOST_BUSY;
1049 return SCSI_MLQUEUE_TARGET_BUSY;
1052 cmd->scsi_done(cmd);
1058 * qla2x00_eh_wait_on_command
1059 * Waits for the command to be returned by the Firmware for some
1063 * cmd = Scsi Command to wait on.
1070 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1072 #define ABORT_POLLING_PERIOD 1000
1073 #define ABORT_WAIT_ITER ((2 * 1000) / (ABORT_POLLING_PERIOD))
1074 unsigned long wait_iter = ABORT_WAIT_ITER;
1075 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1076 struct qla_hw_data *ha = vha->hw;
1077 int ret = QLA_SUCCESS;
1079 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1080 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1081 "Return:eh_wait.\n");
1085 while (CMD_SP(cmd) && wait_iter--) {
1086 msleep(ABORT_POLLING_PERIOD);
1089 ret = QLA_FUNCTION_FAILED;
1095 * qla2x00_wait_for_hba_online
1096 * Wait till the HBA is online after going through
1097 * <= MAX_RETRIES_OF_ISP_ABORT or
1098 * finally HBA is disabled ie marked offline
1101 * ha - pointer to host adapter structure
1104 * Does context switching-Release SPIN_LOCK
1105 * (if any) before calling this routine.
1108 * Success (Adapter is online) : 0
1109 * Failed (Adapter is offline/disabled) : 1
1112 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1115 unsigned long wait_online;
1116 struct qla_hw_data *ha = vha->hw;
1117 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1119 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1120 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1121 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1122 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1123 ha->dpc_active) && time_before(jiffies, wait_online)) {
1127 if (base_vha->flags.online)
1128 return_status = QLA_SUCCESS;
1130 return_status = QLA_FUNCTION_FAILED;
1132 return (return_status);
1135 static inline int test_fcport_count(scsi_qla_host_t *vha)
1137 struct qla_hw_data *ha = vha->hw;
1138 unsigned long flags;
1141 spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1142 ql_dbg(ql_dbg_init, vha, 0x00ec,
1143 "tgt %p, fcport_count=%d\n",
1144 vha, vha->fcport_count);
1145 res = (vha->fcport_count == 0);
1146 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1152 * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1153 * it has dependency on UNLOADING flag to stop device discovery
1156 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1158 qla2x00_mark_all_devices_lost(vha, 0);
1160 wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1164 * qla2x00_wait_for_hba_ready
1165 * Wait till the HBA is ready before doing driver unload
1168 * ha - pointer to host adapter structure
1171 * Does context switching-Release SPIN_LOCK
1172 * (if any) before calling this routine.
1176 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1178 struct qla_hw_data *ha = vha->hw;
1179 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1181 while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1182 ha->flags.mbox_busy) ||
1183 test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1184 test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1185 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1192 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1195 unsigned long wait_reset;
1196 struct qla_hw_data *ha = vha->hw;
1197 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1199 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1200 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1201 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1202 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1203 ha->dpc_active) && time_before(jiffies, wait_reset)) {
1207 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1208 ha->flags.chip_reset_done)
1211 if (ha->flags.chip_reset_done)
1212 return_status = QLA_SUCCESS;
1214 return_status = QLA_FUNCTION_FAILED;
1216 return return_status;
1220 sp_get(struct srb *sp)
1222 if (!refcount_inc_not_zero((refcount_t*)&sp->ref_count))
1229 #define ISP_REG_DISCONNECT 0xffffffffU
1230 /**************************************************************************
1231 * qla2x00_isp_reg_stat
1234 * Read the host status register of ISP before aborting the command.
1237 * ha = pointer to host adapter structure.
1241 * Either true or false.
1243 * Note: Return true if there is register disconnect.
1244 **************************************************************************/
1246 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1248 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1249 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1251 if (IS_P3P_TYPE(ha))
1252 return ((RD_REG_DWORD(®82->host_int)) == ISP_REG_DISCONNECT);
1254 return ((RD_REG_DWORD(®->host_status)) ==
1255 ISP_REG_DISCONNECT);
1258 /**************************************************************************
1262 * The abort function will abort the specified command.
1265 * cmd = Linux SCSI command packet to be aborted.
1268 * Either SUCCESS or FAILED.
1271 * Only return FAILED if command not returned by firmware.
1272 **************************************************************************/
1274 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1276 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1281 unsigned long flags;
1283 struct qla_hw_data *ha = vha->hw;
1284 struct qla_qpair *qpair;
1286 if (qla2x00_isp_reg_stat(ha)) {
1287 ql_log(ql_log_info, vha, 0x8042,
1288 "PCI/Register disconnect, exiting.\n");
1292 ret = fc_block_scsi_eh(cmd);
1297 sp = (srb_t *) CMD_SP(cmd);
1305 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1307 /* there's a chance an interrupt could clear
1308 the ptr as part of done & free */
1309 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1314 /* ref_count is already 0 */
1315 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1318 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1320 id = cmd->device->id;
1321 lun = cmd->device->lun;
1323 ql_dbg(ql_dbg_taskm, vha, 0x8002,
1324 "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1325 vha->host_no, id, lun, sp, cmd, sp->handle);
1327 /* Get a reference to the sp and drop the lock.*/
1329 rval = ha->isp_ops->abort_command(sp);
1331 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1336 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1337 "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1339 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1340 "Abort command mbx success cmd=%p.\n", cmd);
1344 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1346 * Clear the slot in the oustanding_cmds array if we can't find the
1347 * command to reclaim the resources.
1349 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1350 vha->req->outstanding_cmds[sp->handle] = NULL;
1353 * sp->done will do ref_count--
1354 * sp_get() took an extra count above
1356 sp->done(sp, DID_RESET << 16);
1358 /* Did the command return during mailbox execution? */
1359 if (ret == FAILED && !CMD_SP(cmd))
1365 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1367 /* Wait for the command to be returned. */
1369 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1370 ql_log(ql_log_warn, vha, 0x8006,
1371 "Abort handler timed out cmd=%p.\n", cmd);
1376 ql_log(ql_log_info, vha, 0x801c,
1377 "Abort command issued nexus=%ld:%d:%llu -- %d %x.\n",
1378 vha->host_no, id, lun, wait, ret);
1384 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1385 uint64_t l, enum nexus_wait_type type)
1387 int cnt, match, status;
1388 unsigned long flags;
1389 struct qla_hw_data *ha = vha->hw;
1390 struct req_que *req;
1392 struct scsi_cmnd *cmd;
1394 status = QLA_SUCCESS;
1396 spin_lock_irqsave(&ha->hardware_lock, flags);
1398 for (cnt = 1; status == QLA_SUCCESS &&
1399 cnt < req->num_outstanding_cmds; cnt++) {
1400 sp = req->outstanding_cmds[cnt];
1403 if (sp->type != SRB_SCSI_CMD)
1405 if (vha->vp_idx != sp->vha->vp_idx)
1408 cmd = GET_CMD_SP(sp);
1414 match = cmd->device->id == t;
1417 match = (cmd->device->id == t &&
1418 cmd->device->lun == l);
1424 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1425 status = qla2x00_eh_wait_on_command(cmd);
1426 spin_lock_irqsave(&ha->hardware_lock, flags);
1428 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1433 static char *reset_errors[] = {
1436 "Task management failed",
1437 "Waiting for command completions",
1441 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1442 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1444 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1445 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1452 err = fc_block_scsi_eh(cmd);
1456 ql_log(ql_log_info, vha, 0x8009,
1457 "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1458 cmd->device->id, cmd->device->lun, cmd);
1461 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1462 ql_log(ql_log_warn, vha, 0x800a,
1463 "Wait for hba online failed for cmd=%p.\n", cmd);
1464 goto eh_reset_failed;
1467 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1469 ql_log(ql_log_warn, vha, 0x800c,
1470 "do_reset failed for cmd=%p.\n", cmd);
1471 goto eh_reset_failed;
1474 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1475 cmd->device->lun, type) != QLA_SUCCESS) {
1476 ql_log(ql_log_warn, vha, 0x800d,
1477 "wait for pending cmds failed for cmd=%p.\n", cmd);
1478 goto eh_reset_failed;
1481 ql_log(ql_log_info, vha, 0x800e,
1482 "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1483 vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1488 ql_log(ql_log_info, vha, 0x800f,
1489 "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1490 reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1496 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1498 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1499 struct qla_hw_data *ha = vha->hw;
1501 if (qla2x00_isp_reg_stat(ha)) {
1502 ql_log(ql_log_info, vha, 0x803e,
1503 "PCI/Register disconnect, exiting.\n");
1507 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1508 ha->isp_ops->lun_reset);
1512 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1514 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1515 struct qla_hw_data *ha = vha->hw;
1517 if (qla2x00_isp_reg_stat(ha)) {
1518 ql_log(ql_log_info, vha, 0x803f,
1519 "PCI/Register disconnect, exiting.\n");
1523 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1524 ha->isp_ops->target_reset);
1527 /**************************************************************************
1528 * qla2xxx_eh_bus_reset
1531 * The bus reset function will reset the bus and abort any executing
1535 * cmd = Linux SCSI command packet of the command that cause the
1539 * SUCCESS/FAILURE (defined as macro in scsi.h).
1541 **************************************************************************/
1543 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1545 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1546 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1550 struct qla_hw_data *ha = vha->hw;
1552 if (qla2x00_isp_reg_stat(ha)) {
1553 ql_log(ql_log_info, vha, 0x8040,
1554 "PCI/Register disconnect, exiting.\n");
1558 id = cmd->device->id;
1559 lun = cmd->device->lun;
1565 ret = fc_block_scsi_eh(cmd);
1570 ql_log(ql_log_info, vha, 0x8012,
1571 "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1573 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1574 ql_log(ql_log_fatal, vha, 0x8013,
1575 "Wait for hba online failed board disabled.\n");
1576 goto eh_bus_reset_done;
1579 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1583 goto eh_bus_reset_done;
1585 /* Flush outstanding commands. */
1586 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1588 ql_log(ql_log_warn, vha, 0x8014,
1589 "Wait for pending commands failed.\n");
1594 ql_log(ql_log_warn, vha, 0x802b,
1595 "BUS RESET %s nexus=%ld:%d:%llu.\n",
1596 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1601 /**************************************************************************
1602 * qla2xxx_eh_host_reset
1605 * The reset function will reset the Adapter.
1608 * cmd = Linux SCSI command packet of the command that cause the
1612 * Either SUCCESS or FAILED.
1615 **************************************************************************/
1617 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1619 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1620 struct qla_hw_data *ha = vha->hw;
1624 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1626 if (qla2x00_isp_reg_stat(ha)) {
1627 ql_log(ql_log_info, vha, 0x8041,
1628 "PCI/Register disconnect, exiting.\n");
1629 schedule_work(&ha->board_disable);
1633 id = cmd->device->id;
1634 lun = cmd->device->lun;
1636 ql_log(ql_log_info, vha, 0x8018,
1637 "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1640 * No point in issuing another reset if one is active. Also do not
1641 * attempt a reset if we are updating flash.
1643 if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1644 goto eh_host_reset_lock;
1646 if (vha != base_vha) {
1647 if (qla2x00_vp_abort_isp(vha))
1648 goto eh_host_reset_lock;
1650 if (IS_P3P_TYPE(vha->hw)) {
1651 if (!qla82xx_fcoe_ctx_reset(vha)) {
1652 /* Ctx reset success */
1654 goto eh_host_reset_lock;
1656 /* fall thru if ctx reset failed */
1659 flush_workqueue(ha->wq);
1661 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1662 if (ha->isp_ops->abort_isp(base_vha)) {
1663 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1664 /* failed. schedule dpc to try */
1665 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1667 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1668 ql_log(ql_log_warn, vha, 0x802a,
1669 "wait for hba online failed.\n");
1670 goto eh_host_reset_lock;
1673 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1676 /* Waiting for command to be returned to OS.*/
1677 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1682 ql_log(ql_log_info, vha, 0x8017,
1683 "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1684 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1690 * qla2x00_loop_reset
1694 * ha = adapter block pointer.
1700 qla2x00_loop_reset(scsi_qla_host_t *vha)
1703 struct fc_port *fcport;
1704 struct qla_hw_data *ha = vha->hw;
1706 if (IS_QLAFX00(ha)) {
1707 return qlafx00_loop_reset(vha);
1710 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1711 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1712 if (fcport->port_type != FCT_TARGET)
1715 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1716 if (ret != QLA_SUCCESS) {
1717 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1718 "Bus Reset failed: Reset=%d "
1719 "d_id=%x.\n", ret, fcport->d_id.b24);
1725 if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1726 atomic_set(&vha->loop_state, LOOP_DOWN);
1727 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1728 qla2x00_mark_all_devices_lost(vha, 0);
1729 ret = qla2x00_full_login_lip(vha);
1730 if (ret != QLA_SUCCESS) {
1731 ql_dbg(ql_dbg_taskm, vha, 0x802d,
1732 "full_login_lip=%d.\n", ret);
1736 if (ha->flags.enable_lip_reset) {
1737 ret = qla2x00_lip_reset(vha);
1738 if (ret != QLA_SUCCESS)
1739 ql_dbg(ql_dbg_taskm, vha, 0x802e,
1740 "lip_reset failed (%d).\n", ret);
1743 /* Issue marker command only when we are going to start the I/O */
1744 vha->marker_needed = 1;
1750 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1753 unsigned long flags;
1755 scsi_qla_host_t *vha = qp->vha;
1756 struct qla_hw_data *ha = vha->hw;
1757 struct req_que *req;
1758 struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1759 struct qla_tgt_cmd *cmd;
1763 spin_lock_irqsave(qp->qp_lock_ptr, flags);
1765 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1766 sp = req->outstanding_cmds[cnt];
1768 req->outstanding_cmds[cnt] = NULL;
1769 switch (sp->cmd_type) {
1771 if (sp->type == SRB_NVME_CMD ||
1772 sp->type == SRB_NVME_LS) {
1775 spin_unlock_irqrestore
1778 qla_nvme_abort(ha, sp, res);
1780 (qp->qp_lock_ptr, flags);
1782 } else if (GET_CMD_SP(sp) &&
1783 !ha->flags.eeh_busy &&
1784 (!test_bit(ABORT_ISP_ACTIVE,
1785 &vha->dpc_flags)) &&
1786 !qla2x00_isp_reg_stat(ha) &&
1787 (sp->type == SRB_SCSI_CMD)) {
1789 * Don't abort commands in adapter
1790 * during EEH recovery as it's not
1791 * accessible/responding.
1793 * Get a reference to the sp and drop
1794 * the lock. The reference ensures this
1795 * sp->done() call and not the call in
1796 * qla2xxx_eh_abort() ends the SCSI cmd
1797 * (with result 'res').
1800 spin_unlock_irqrestore
1801 (qp->qp_lock_ptr, flags);
1802 status = qla2xxx_eh_abort(
1805 (qp->qp_lock_ptr, flags);
1807 * Get rid of extra reference caused
1808 * by early exit from qla2xxx_eh_abort
1810 if (status == FAST_IO_FAIL)
1811 atomic_dec(&sp->ref_count);
1817 if (!vha->hw->tgt.tgt_ops || !tgt ||
1818 qla_ini_mode_enabled(vha)) {
1819 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1820 "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1824 cmd = (struct qla_tgt_cmd *)sp;
1825 qlt_abort_cmd_on_host_reset(cmd->vha, cmd);
1827 case TYPE_TGT_TMCMD:
1829 * Currently, only ABTS response gets on the
1830 * outstanding_cmds[]
1832 ha->tgt.tgt_ops->free_mcmd(
1833 (struct qla_tgt_mgmt_cmd *)sp);
1840 spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1844 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1847 struct qla_hw_data *ha = vha->hw;
1849 __qla2x00_abort_all_cmds(ha->base_qpair, res);
1851 for (que = 0; que < ha->max_qpairs; que++) {
1852 if (!ha->queue_pair_map[que])
1855 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1860 qla2xxx_slave_alloc(struct scsi_device *sdev)
1862 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1864 if (!rport || fc_remote_port_chkready(rport))
1867 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1873 qla2xxx_slave_configure(struct scsi_device *sdev)
1875 scsi_qla_host_t *vha = shost_priv(sdev->host);
1876 struct req_que *req = vha->req;
1878 if (IS_T10_PI_CAPABLE(vha->hw))
1879 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1881 scsi_change_queue_depth(sdev, req->max_q_depth);
1886 qla2xxx_slave_destroy(struct scsi_device *sdev)
1888 sdev->hostdata = NULL;
1892 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1895 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1896 * supported addressing method.
1899 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1901 /* Assume a 32bit DMA mask. */
1902 ha->flags.enable_64bit_addressing = 0;
1904 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1905 /* Any upper-dword bits set? */
1906 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1907 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1908 /* Ok, a 64bit DMA mask is applicable. */
1909 ha->flags.enable_64bit_addressing = 1;
1910 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1911 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1916 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1917 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1921 qla2x00_enable_intrs(struct qla_hw_data *ha)
1923 unsigned long flags = 0;
1924 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1926 spin_lock_irqsave(&ha->hardware_lock, flags);
1927 ha->interrupts_on = 1;
1928 /* enable risc and host interrupts */
1929 WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC);
1930 RD_REG_WORD(®->ictrl);
1931 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1936 qla2x00_disable_intrs(struct qla_hw_data *ha)
1938 unsigned long flags = 0;
1939 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1941 spin_lock_irqsave(&ha->hardware_lock, flags);
1942 ha->interrupts_on = 0;
1943 /* disable risc and host interrupts */
1944 WRT_REG_WORD(®->ictrl, 0);
1945 RD_REG_WORD(®->ictrl);
1946 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1950 qla24xx_enable_intrs(struct qla_hw_data *ha)
1952 unsigned long flags = 0;
1953 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1955 spin_lock_irqsave(&ha->hardware_lock, flags);
1956 ha->interrupts_on = 1;
1957 WRT_REG_DWORD(®->ictrl, ICRX_EN_RISC_INT);
1958 RD_REG_DWORD(®->ictrl);
1959 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1963 qla24xx_disable_intrs(struct qla_hw_data *ha)
1965 unsigned long flags = 0;
1966 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1968 if (IS_NOPOLLING_TYPE(ha))
1970 spin_lock_irqsave(&ha->hardware_lock, flags);
1971 ha->interrupts_on = 0;
1972 WRT_REG_DWORD(®->ictrl, 0);
1973 RD_REG_DWORD(®->ictrl);
1974 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1978 qla2x00_iospace_config(struct qla_hw_data *ha)
1980 resource_size_t pio;
1983 if (pci_request_selected_regions(ha->pdev, ha->bars,
1984 QLA2XXX_DRIVER_NAME)) {
1985 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1986 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1987 pci_name(ha->pdev));
1988 goto iospace_error_exit;
1990 if (!(ha->bars & 1))
1993 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1994 pio = pci_resource_start(ha->pdev, 0);
1995 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1996 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1997 ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1998 "Invalid pci I/O region size (%s).\n",
1999 pci_name(ha->pdev));
2003 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
2004 "Region #0 no a PIO resource (%s).\n",
2005 pci_name(ha->pdev));
2008 ha->pio_address = pio;
2009 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
2010 "PIO address=%llu.\n",
2011 (unsigned long long)ha->pio_address);
2014 /* Use MMIO operations for all accesses. */
2015 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
2016 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
2017 "Region #1 not an MMIO resource (%s), aborting.\n",
2018 pci_name(ha->pdev));
2019 goto iospace_error_exit;
2021 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
2022 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
2023 "Invalid PCI mem region size (%s), aborting.\n",
2024 pci_name(ha->pdev));
2025 goto iospace_error_exit;
2028 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
2030 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
2031 "Cannot remap MMIO (%s), aborting.\n",
2032 pci_name(ha->pdev));
2033 goto iospace_error_exit;
2036 /* Determine queue resources */
2037 ha->max_req_queues = ha->max_rsp_queues = 1;
2038 ha->msix_count = QLA_BASE_VECTORS;
2039 if (!ql2xmqsupport || !ql2xnvmeenable ||
2040 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2043 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2044 pci_resource_len(ha->pdev, 3));
2046 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2047 "MQIO Base=%p.\n", ha->mqiobase);
2048 /* Read MSIX vector size of the board */
2049 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2050 ha->msix_count = msix + 1;
2051 /* Max queues are bounded by available msix vectors */
2052 /* MB interrupt uses 1 vector */
2053 ha->max_req_queues = ha->msix_count - 1;
2054 ha->max_rsp_queues = ha->max_req_queues;
2055 /* Queue pairs is the max value minus the base queue pair */
2056 ha->max_qpairs = ha->max_rsp_queues - 1;
2057 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2058 "Max no of queues pairs: %d.\n", ha->max_qpairs);
2060 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2061 "MSI-X vector count: %d.\n", ha->msix_count);
2063 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2064 "BAR 3 not enabled.\n");
2067 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2068 "MSIX Count: %d.\n", ha->msix_count);
2077 qla83xx_iospace_config(struct qla_hw_data *ha)
2081 if (pci_request_selected_regions(ha->pdev, ha->bars,
2082 QLA2XXX_DRIVER_NAME)) {
2083 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2084 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2085 pci_name(ha->pdev));
2087 goto iospace_error_exit;
2090 /* Use MMIO operations for all accesses. */
2091 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2092 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2093 "Invalid pci I/O region size (%s).\n",
2094 pci_name(ha->pdev));
2095 goto iospace_error_exit;
2097 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2098 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2099 "Invalid PCI mem region size (%s), aborting\n",
2100 pci_name(ha->pdev));
2101 goto iospace_error_exit;
2104 ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2106 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2107 "Cannot remap MMIO (%s), aborting.\n",
2108 pci_name(ha->pdev));
2109 goto iospace_error_exit;
2112 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2113 /* 83XX 26XX always use MQ type access for queues
2114 * - mbar 2, a.k.a region 4 */
2115 ha->max_req_queues = ha->max_rsp_queues = 1;
2116 ha->msix_count = QLA_BASE_VECTORS;
2117 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2118 pci_resource_len(ha->pdev, 4));
2120 if (!ha->mqiobase) {
2121 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2122 "BAR2/region4 not enabled\n");
2126 ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2127 pci_resource_len(ha->pdev, 2));
2129 /* Read MSIX vector size of the board */
2130 pci_read_config_word(ha->pdev,
2131 QLA_83XX_PCI_MSIX_CONTROL, &msix);
2132 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE) + 1;
2134 * By default, driver uses at least two msix vectors
2137 if (ql2xmqsupport || ql2xnvmeenable) {
2138 /* MB interrupt uses 1 vector */
2139 ha->max_req_queues = ha->msix_count - 1;
2141 /* ATIOQ needs 1 vector. That's 1 less QPair */
2142 if (QLA_TGT_MODE_ENABLED())
2143 ha->max_req_queues--;
2145 ha->max_rsp_queues = ha->max_req_queues;
2147 /* Queue pairs is the max value minus
2148 * the base queue pair */
2149 ha->max_qpairs = ha->max_req_queues - 1;
2150 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2151 "Max no of queues pairs: %d.\n", ha->max_qpairs);
2153 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2154 "MSI-X vector count: %d.\n", ha->msix_count);
2156 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2157 "BAR 1 not enabled.\n");
2160 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2161 "MSIX Count: %d.\n", ha->msix_count);
2168 static struct isp_operations qla2100_isp_ops = {
2169 .pci_config = qla2100_pci_config,
2170 .reset_chip = qla2x00_reset_chip,
2171 .chip_diag = qla2x00_chip_diag,
2172 .config_rings = qla2x00_config_rings,
2173 .reset_adapter = qla2x00_reset_adapter,
2174 .nvram_config = qla2x00_nvram_config,
2175 .update_fw_options = qla2x00_update_fw_options,
2176 .load_risc = qla2x00_load_risc,
2177 .pci_info_str = qla2x00_pci_info_str,
2178 .fw_version_str = qla2x00_fw_version_str,
2179 .intr_handler = qla2100_intr_handler,
2180 .enable_intrs = qla2x00_enable_intrs,
2181 .disable_intrs = qla2x00_disable_intrs,
2182 .abort_command = qla2x00_abort_command,
2183 .target_reset = qla2x00_abort_target,
2184 .lun_reset = qla2x00_lun_reset,
2185 .fabric_login = qla2x00_login_fabric,
2186 .fabric_logout = qla2x00_fabric_logout,
2187 .calc_req_entries = qla2x00_calc_iocbs_32,
2188 .build_iocbs = qla2x00_build_scsi_iocbs_32,
2189 .prep_ms_iocb = qla2x00_prep_ms_iocb,
2190 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
2191 .read_nvram = qla2x00_read_nvram_data,
2192 .write_nvram = qla2x00_write_nvram_data,
2193 .fw_dump = qla2100_fw_dump,
2196 .beacon_blink = NULL,
2197 .read_optrom = qla2x00_read_optrom_data,
2198 .write_optrom = qla2x00_write_optrom_data,
2199 .get_flash_version = qla2x00_get_flash_version,
2200 .start_scsi = qla2x00_start_scsi,
2201 .start_scsi_mq = NULL,
2202 .abort_isp = qla2x00_abort_isp,
2203 .iospace_config = qla2x00_iospace_config,
2204 .initialize_adapter = qla2x00_initialize_adapter,
2207 static struct isp_operations qla2300_isp_ops = {
2208 .pci_config = qla2300_pci_config,
2209 .reset_chip = qla2x00_reset_chip,
2210 .chip_diag = qla2x00_chip_diag,
2211 .config_rings = qla2x00_config_rings,
2212 .reset_adapter = qla2x00_reset_adapter,
2213 .nvram_config = qla2x00_nvram_config,
2214 .update_fw_options = qla2x00_update_fw_options,
2215 .load_risc = qla2x00_load_risc,
2216 .pci_info_str = qla2x00_pci_info_str,
2217 .fw_version_str = qla2x00_fw_version_str,
2218 .intr_handler = qla2300_intr_handler,
2219 .enable_intrs = qla2x00_enable_intrs,
2220 .disable_intrs = qla2x00_disable_intrs,
2221 .abort_command = qla2x00_abort_command,
2222 .target_reset = qla2x00_abort_target,
2223 .lun_reset = qla2x00_lun_reset,
2224 .fabric_login = qla2x00_login_fabric,
2225 .fabric_logout = qla2x00_fabric_logout,
2226 .calc_req_entries = qla2x00_calc_iocbs_32,
2227 .build_iocbs = qla2x00_build_scsi_iocbs_32,
2228 .prep_ms_iocb = qla2x00_prep_ms_iocb,
2229 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
2230 .read_nvram = qla2x00_read_nvram_data,
2231 .write_nvram = qla2x00_write_nvram_data,
2232 .fw_dump = qla2300_fw_dump,
2233 .beacon_on = qla2x00_beacon_on,
2234 .beacon_off = qla2x00_beacon_off,
2235 .beacon_blink = qla2x00_beacon_blink,
2236 .read_optrom = qla2x00_read_optrom_data,
2237 .write_optrom = qla2x00_write_optrom_data,
2238 .get_flash_version = qla2x00_get_flash_version,
2239 .start_scsi = qla2x00_start_scsi,
2240 .start_scsi_mq = NULL,
2241 .abort_isp = qla2x00_abort_isp,
2242 .iospace_config = qla2x00_iospace_config,
2243 .initialize_adapter = qla2x00_initialize_adapter,
2246 static struct isp_operations qla24xx_isp_ops = {
2247 .pci_config = qla24xx_pci_config,
2248 .reset_chip = qla24xx_reset_chip,
2249 .chip_diag = qla24xx_chip_diag,
2250 .config_rings = qla24xx_config_rings,
2251 .reset_adapter = qla24xx_reset_adapter,
2252 .nvram_config = qla24xx_nvram_config,
2253 .update_fw_options = qla24xx_update_fw_options,
2254 .load_risc = qla24xx_load_risc,
2255 .pci_info_str = qla24xx_pci_info_str,
2256 .fw_version_str = qla24xx_fw_version_str,
2257 .intr_handler = qla24xx_intr_handler,
2258 .enable_intrs = qla24xx_enable_intrs,
2259 .disable_intrs = qla24xx_disable_intrs,
2260 .abort_command = qla24xx_abort_command,
2261 .target_reset = qla24xx_abort_target,
2262 .lun_reset = qla24xx_lun_reset,
2263 .fabric_login = qla24xx_login_fabric,
2264 .fabric_logout = qla24xx_fabric_logout,
2265 .calc_req_entries = NULL,
2266 .build_iocbs = NULL,
2267 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2268 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2269 .read_nvram = qla24xx_read_nvram_data,
2270 .write_nvram = qla24xx_write_nvram_data,
2271 .fw_dump = qla24xx_fw_dump,
2272 .beacon_on = qla24xx_beacon_on,
2273 .beacon_off = qla24xx_beacon_off,
2274 .beacon_blink = qla24xx_beacon_blink,
2275 .read_optrom = qla24xx_read_optrom_data,
2276 .write_optrom = qla24xx_write_optrom_data,
2277 .get_flash_version = qla24xx_get_flash_version,
2278 .start_scsi = qla24xx_start_scsi,
2279 .start_scsi_mq = NULL,
2280 .abort_isp = qla2x00_abort_isp,
2281 .iospace_config = qla2x00_iospace_config,
2282 .initialize_adapter = qla2x00_initialize_adapter,
2285 static struct isp_operations qla25xx_isp_ops = {
2286 .pci_config = qla25xx_pci_config,
2287 .reset_chip = qla24xx_reset_chip,
2288 .chip_diag = qla24xx_chip_diag,
2289 .config_rings = qla24xx_config_rings,
2290 .reset_adapter = qla24xx_reset_adapter,
2291 .nvram_config = qla24xx_nvram_config,
2292 .update_fw_options = qla24xx_update_fw_options,
2293 .load_risc = qla24xx_load_risc,
2294 .pci_info_str = qla24xx_pci_info_str,
2295 .fw_version_str = qla24xx_fw_version_str,
2296 .intr_handler = qla24xx_intr_handler,
2297 .enable_intrs = qla24xx_enable_intrs,
2298 .disable_intrs = qla24xx_disable_intrs,
2299 .abort_command = qla24xx_abort_command,
2300 .target_reset = qla24xx_abort_target,
2301 .lun_reset = qla24xx_lun_reset,
2302 .fabric_login = qla24xx_login_fabric,
2303 .fabric_logout = qla24xx_fabric_logout,
2304 .calc_req_entries = NULL,
2305 .build_iocbs = NULL,
2306 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2307 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2308 .read_nvram = qla25xx_read_nvram_data,
2309 .write_nvram = qla25xx_write_nvram_data,
2310 .fw_dump = qla25xx_fw_dump,
2311 .beacon_on = qla24xx_beacon_on,
2312 .beacon_off = qla24xx_beacon_off,
2313 .beacon_blink = qla24xx_beacon_blink,
2314 .read_optrom = qla25xx_read_optrom_data,
2315 .write_optrom = qla24xx_write_optrom_data,
2316 .get_flash_version = qla24xx_get_flash_version,
2317 .start_scsi = qla24xx_dif_start_scsi,
2318 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2319 .abort_isp = qla2x00_abort_isp,
2320 .iospace_config = qla2x00_iospace_config,
2321 .initialize_adapter = qla2x00_initialize_adapter,
2324 static struct isp_operations qla81xx_isp_ops = {
2325 .pci_config = qla25xx_pci_config,
2326 .reset_chip = qla24xx_reset_chip,
2327 .chip_diag = qla24xx_chip_diag,
2328 .config_rings = qla24xx_config_rings,
2329 .reset_adapter = qla24xx_reset_adapter,
2330 .nvram_config = qla81xx_nvram_config,
2331 .update_fw_options = qla81xx_update_fw_options,
2332 .load_risc = qla81xx_load_risc,
2333 .pci_info_str = qla24xx_pci_info_str,
2334 .fw_version_str = qla24xx_fw_version_str,
2335 .intr_handler = qla24xx_intr_handler,
2336 .enable_intrs = qla24xx_enable_intrs,
2337 .disable_intrs = qla24xx_disable_intrs,
2338 .abort_command = qla24xx_abort_command,
2339 .target_reset = qla24xx_abort_target,
2340 .lun_reset = qla24xx_lun_reset,
2341 .fabric_login = qla24xx_login_fabric,
2342 .fabric_logout = qla24xx_fabric_logout,
2343 .calc_req_entries = NULL,
2344 .build_iocbs = NULL,
2345 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2346 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2348 .write_nvram = NULL,
2349 .fw_dump = qla81xx_fw_dump,
2350 .beacon_on = qla24xx_beacon_on,
2351 .beacon_off = qla24xx_beacon_off,
2352 .beacon_blink = qla83xx_beacon_blink,
2353 .read_optrom = qla25xx_read_optrom_data,
2354 .write_optrom = qla24xx_write_optrom_data,
2355 .get_flash_version = qla24xx_get_flash_version,
2356 .start_scsi = qla24xx_dif_start_scsi,
2357 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2358 .abort_isp = qla2x00_abort_isp,
2359 .iospace_config = qla2x00_iospace_config,
2360 .initialize_adapter = qla2x00_initialize_adapter,
2363 static struct isp_operations qla82xx_isp_ops = {
2364 .pci_config = qla82xx_pci_config,
2365 .reset_chip = qla82xx_reset_chip,
2366 .chip_diag = qla24xx_chip_diag,
2367 .config_rings = qla82xx_config_rings,
2368 .reset_adapter = qla24xx_reset_adapter,
2369 .nvram_config = qla81xx_nvram_config,
2370 .update_fw_options = qla24xx_update_fw_options,
2371 .load_risc = qla82xx_load_risc,
2372 .pci_info_str = qla24xx_pci_info_str,
2373 .fw_version_str = qla24xx_fw_version_str,
2374 .intr_handler = qla82xx_intr_handler,
2375 .enable_intrs = qla82xx_enable_intrs,
2376 .disable_intrs = qla82xx_disable_intrs,
2377 .abort_command = qla24xx_abort_command,
2378 .target_reset = qla24xx_abort_target,
2379 .lun_reset = qla24xx_lun_reset,
2380 .fabric_login = qla24xx_login_fabric,
2381 .fabric_logout = qla24xx_fabric_logout,
2382 .calc_req_entries = NULL,
2383 .build_iocbs = NULL,
2384 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2385 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2386 .read_nvram = qla24xx_read_nvram_data,
2387 .write_nvram = qla24xx_write_nvram_data,
2388 .fw_dump = qla82xx_fw_dump,
2389 .beacon_on = qla82xx_beacon_on,
2390 .beacon_off = qla82xx_beacon_off,
2391 .beacon_blink = NULL,
2392 .read_optrom = qla82xx_read_optrom_data,
2393 .write_optrom = qla82xx_write_optrom_data,
2394 .get_flash_version = qla82xx_get_flash_version,
2395 .start_scsi = qla82xx_start_scsi,
2396 .start_scsi_mq = NULL,
2397 .abort_isp = qla82xx_abort_isp,
2398 .iospace_config = qla82xx_iospace_config,
2399 .initialize_adapter = qla2x00_initialize_adapter,
2402 static struct isp_operations qla8044_isp_ops = {
2403 .pci_config = qla82xx_pci_config,
2404 .reset_chip = qla82xx_reset_chip,
2405 .chip_diag = qla24xx_chip_diag,
2406 .config_rings = qla82xx_config_rings,
2407 .reset_adapter = qla24xx_reset_adapter,
2408 .nvram_config = qla81xx_nvram_config,
2409 .update_fw_options = qla24xx_update_fw_options,
2410 .load_risc = qla82xx_load_risc,
2411 .pci_info_str = qla24xx_pci_info_str,
2412 .fw_version_str = qla24xx_fw_version_str,
2413 .intr_handler = qla8044_intr_handler,
2414 .enable_intrs = qla82xx_enable_intrs,
2415 .disable_intrs = qla82xx_disable_intrs,
2416 .abort_command = qla24xx_abort_command,
2417 .target_reset = qla24xx_abort_target,
2418 .lun_reset = qla24xx_lun_reset,
2419 .fabric_login = qla24xx_login_fabric,
2420 .fabric_logout = qla24xx_fabric_logout,
2421 .calc_req_entries = NULL,
2422 .build_iocbs = NULL,
2423 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2424 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2426 .write_nvram = NULL,
2427 .fw_dump = qla8044_fw_dump,
2428 .beacon_on = qla82xx_beacon_on,
2429 .beacon_off = qla82xx_beacon_off,
2430 .beacon_blink = NULL,
2431 .read_optrom = qla8044_read_optrom_data,
2432 .write_optrom = qla8044_write_optrom_data,
2433 .get_flash_version = qla82xx_get_flash_version,
2434 .start_scsi = qla82xx_start_scsi,
2435 .start_scsi_mq = NULL,
2436 .abort_isp = qla8044_abort_isp,
2437 .iospace_config = qla82xx_iospace_config,
2438 .initialize_adapter = qla2x00_initialize_adapter,
2441 static struct isp_operations qla83xx_isp_ops = {
2442 .pci_config = qla25xx_pci_config,
2443 .reset_chip = qla24xx_reset_chip,
2444 .chip_diag = qla24xx_chip_diag,
2445 .config_rings = qla24xx_config_rings,
2446 .reset_adapter = qla24xx_reset_adapter,
2447 .nvram_config = qla81xx_nvram_config,
2448 .update_fw_options = qla81xx_update_fw_options,
2449 .load_risc = qla81xx_load_risc,
2450 .pci_info_str = qla24xx_pci_info_str,
2451 .fw_version_str = qla24xx_fw_version_str,
2452 .intr_handler = qla24xx_intr_handler,
2453 .enable_intrs = qla24xx_enable_intrs,
2454 .disable_intrs = qla24xx_disable_intrs,
2455 .abort_command = qla24xx_abort_command,
2456 .target_reset = qla24xx_abort_target,
2457 .lun_reset = qla24xx_lun_reset,
2458 .fabric_login = qla24xx_login_fabric,
2459 .fabric_logout = qla24xx_fabric_logout,
2460 .calc_req_entries = NULL,
2461 .build_iocbs = NULL,
2462 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2463 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2465 .write_nvram = NULL,
2466 .fw_dump = qla83xx_fw_dump,
2467 .beacon_on = qla24xx_beacon_on,
2468 .beacon_off = qla24xx_beacon_off,
2469 .beacon_blink = qla83xx_beacon_blink,
2470 .read_optrom = qla25xx_read_optrom_data,
2471 .write_optrom = qla24xx_write_optrom_data,
2472 .get_flash_version = qla24xx_get_flash_version,
2473 .start_scsi = qla24xx_dif_start_scsi,
2474 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2475 .abort_isp = qla2x00_abort_isp,
2476 .iospace_config = qla83xx_iospace_config,
2477 .initialize_adapter = qla2x00_initialize_adapter,
2480 static struct isp_operations qlafx00_isp_ops = {
2481 .pci_config = qlafx00_pci_config,
2482 .reset_chip = qlafx00_soft_reset,
2483 .chip_diag = qlafx00_chip_diag,
2484 .config_rings = qlafx00_config_rings,
2485 .reset_adapter = qlafx00_soft_reset,
2486 .nvram_config = NULL,
2487 .update_fw_options = NULL,
2489 .pci_info_str = qlafx00_pci_info_str,
2490 .fw_version_str = qlafx00_fw_version_str,
2491 .intr_handler = qlafx00_intr_handler,
2492 .enable_intrs = qlafx00_enable_intrs,
2493 .disable_intrs = qlafx00_disable_intrs,
2494 .abort_command = qla24xx_async_abort_command,
2495 .target_reset = qlafx00_abort_target,
2496 .lun_reset = qlafx00_lun_reset,
2497 .fabric_login = NULL,
2498 .fabric_logout = NULL,
2499 .calc_req_entries = NULL,
2500 .build_iocbs = NULL,
2501 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2502 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2503 .read_nvram = qla24xx_read_nvram_data,
2504 .write_nvram = qla24xx_write_nvram_data,
2506 .beacon_on = qla24xx_beacon_on,
2507 .beacon_off = qla24xx_beacon_off,
2508 .beacon_blink = NULL,
2509 .read_optrom = qla24xx_read_optrom_data,
2510 .write_optrom = qla24xx_write_optrom_data,
2511 .get_flash_version = qla24xx_get_flash_version,
2512 .start_scsi = qlafx00_start_scsi,
2513 .start_scsi_mq = NULL,
2514 .abort_isp = qlafx00_abort_isp,
2515 .iospace_config = qlafx00_iospace_config,
2516 .initialize_adapter = qlafx00_initialize_adapter,
2519 static struct isp_operations qla27xx_isp_ops = {
2520 .pci_config = qla25xx_pci_config,
2521 .reset_chip = qla24xx_reset_chip,
2522 .chip_diag = qla24xx_chip_diag,
2523 .config_rings = qla24xx_config_rings,
2524 .reset_adapter = qla24xx_reset_adapter,
2525 .nvram_config = qla81xx_nvram_config,
2526 .update_fw_options = qla81xx_update_fw_options,
2527 .load_risc = qla81xx_load_risc,
2528 .pci_info_str = qla24xx_pci_info_str,
2529 .fw_version_str = qla24xx_fw_version_str,
2530 .intr_handler = qla24xx_intr_handler,
2531 .enable_intrs = qla24xx_enable_intrs,
2532 .disable_intrs = qla24xx_disable_intrs,
2533 .abort_command = qla24xx_abort_command,
2534 .target_reset = qla24xx_abort_target,
2535 .lun_reset = qla24xx_lun_reset,
2536 .fabric_login = qla24xx_login_fabric,
2537 .fabric_logout = qla24xx_fabric_logout,
2538 .calc_req_entries = NULL,
2539 .build_iocbs = NULL,
2540 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2541 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2543 .write_nvram = NULL,
2544 .fw_dump = qla27xx_fwdump,
2545 .beacon_on = qla24xx_beacon_on,
2546 .beacon_off = qla24xx_beacon_off,
2547 .beacon_blink = qla83xx_beacon_blink,
2548 .read_optrom = qla25xx_read_optrom_data,
2549 .write_optrom = qla24xx_write_optrom_data,
2550 .get_flash_version = qla24xx_get_flash_version,
2551 .start_scsi = qla24xx_dif_start_scsi,
2552 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2553 .abort_isp = qla2x00_abort_isp,
2554 .iospace_config = qla83xx_iospace_config,
2555 .initialize_adapter = qla2x00_initialize_adapter,
2559 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2561 ha->device_type = DT_EXTENDED_IDS;
2562 switch (ha->pdev->device) {
2563 case PCI_DEVICE_ID_QLOGIC_ISP2100:
2564 ha->isp_type |= DT_ISP2100;
2565 ha->device_type &= ~DT_EXTENDED_IDS;
2566 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2568 case PCI_DEVICE_ID_QLOGIC_ISP2200:
2569 ha->isp_type |= DT_ISP2200;
2570 ha->device_type &= ~DT_EXTENDED_IDS;
2571 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2573 case PCI_DEVICE_ID_QLOGIC_ISP2300:
2574 ha->isp_type |= DT_ISP2300;
2575 ha->device_type |= DT_ZIO_SUPPORTED;
2576 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2578 case PCI_DEVICE_ID_QLOGIC_ISP2312:
2579 ha->isp_type |= DT_ISP2312;
2580 ha->device_type |= DT_ZIO_SUPPORTED;
2581 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2583 case PCI_DEVICE_ID_QLOGIC_ISP2322:
2584 ha->isp_type |= DT_ISP2322;
2585 ha->device_type |= DT_ZIO_SUPPORTED;
2586 if (ha->pdev->subsystem_vendor == 0x1028 &&
2587 ha->pdev->subsystem_device == 0x0170)
2588 ha->device_type |= DT_OEM_001;
2589 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2591 case PCI_DEVICE_ID_QLOGIC_ISP6312:
2592 ha->isp_type |= DT_ISP6312;
2593 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2595 case PCI_DEVICE_ID_QLOGIC_ISP6322:
2596 ha->isp_type |= DT_ISP6322;
2597 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2599 case PCI_DEVICE_ID_QLOGIC_ISP2422:
2600 ha->isp_type |= DT_ISP2422;
2601 ha->device_type |= DT_ZIO_SUPPORTED;
2602 ha->device_type |= DT_FWI2;
2603 ha->device_type |= DT_IIDMA;
2604 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2606 case PCI_DEVICE_ID_QLOGIC_ISP2432:
2607 ha->isp_type |= DT_ISP2432;
2608 ha->device_type |= DT_ZIO_SUPPORTED;
2609 ha->device_type |= DT_FWI2;
2610 ha->device_type |= DT_IIDMA;
2611 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2613 case PCI_DEVICE_ID_QLOGIC_ISP8432:
2614 ha->isp_type |= DT_ISP8432;
2615 ha->device_type |= DT_ZIO_SUPPORTED;
2616 ha->device_type |= DT_FWI2;
2617 ha->device_type |= DT_IIDMA;
2618 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2620 case PCI_DEVICE_ID_QLOGIC_ISP5422:
2621 ha->isp_type |= DT_ISP5422;
2622 ha->device_type |= DT_FWI2;
2623 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2625 case PCI_DEVICE_ID_QLOGIC_ISP5432:
2626 ha->isp_type |= DT_ISP5432;
2627 ha->device_type |= DT_FWI2;
2628 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2630 case PCI_DEVICE_ID_QLOGIC_ISP2532:
2631 ha->isp_type |= DT_ISP2532;
2632 ha->device_type |= DT_ZIO_SUPPORTED;
2633 ha->device_type |= DT_FWI2;
2634 ha->device_type |= DT_IIDMA;
2635 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2637 case PCI_DEVICE_ID_QLOGIC_ISP8001:
2638 ha->isp_type |= DT_ISP8001;
2639 ha->device_type |= DT_ZIO_SUPPORTED;
2640 ha->device_type |= DT_FWI2;
2641 ha->device_type |= DT_IIDMA;
2642 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2644 case PCI_DEVICE_ID_QLOGIC_ISP8021:
2645 ha->isp_type |= DT_ISP8021;
2646 ha->device_type |= DT_ZIO_SUPPORTED;
2647 ha->device_type |= DT_FWI2;
2648 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2649 /* Initialize 82XX ISP flags */
2650 qla82xx_init_flags(ha);
2652 case PCI_DEVICE_ID_QLOGIC_ISP8044:
2653 ha->isp_type |= DT_ISP8044;
2654 ha->device_type |= DT_ZIO_SUPPORTED;
2655 ha->device_type |= DT_FWI2;
2656 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2657 /* Initialize 82XX ISP flags */
2658 qla82xx_init_flags(ha);
2660 case PCI_DEVICE_ID_QLOGIC_ISP2031:
2661 ha->isp_type |= DT_ISP2031;
2662 ha->device_type |= DT_ZIO_SUPPORTED;
2663 ha->device_type |= DT_FWI2;
2664 ha->device_type |= DT_IIDMA;
2665 ha->device_type |= DT_T10_PI;
2666 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2668 case PCI_DEVICE_ID_QLOGIC_ISP8031:
2669 ha->isp_type |= DT_ISP8031;
2670 ha->device_type |= DT_ZIO_SUPPORTED;
2671 ha->device_type |= DT_FWI2;
2672 ha->device_type |= DT_IIDMA;
2673 ha->device_type |= DT_T10_PI;
2674 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2676 case PCI_DEVICE_ID_QLOGIC_ISPF001:
2677 ha->isp_type |= DT_ISPFX00;
2679 case PCI_DEVICE_ID_QLOGIC_ISP2071:
2680 ha->isp_type |= DT_ISP2071;
2681 ha->device_type |= DT_ZIO_SUPPORTED;
2682 ha->device_type |= DT_FWI2;
2683 ha->device_type |= DT_IIDMA;
2684 ha->device_type |= DT_T10_PI;
2685 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2687 case PCI_DEVICE_ID_QLOGIC_ISP2271:
2688 ha->isp_type |= DT_ISP2271;
2689 ha->device_type |= DT_ZIO_SUPPORTED;
2690 ha->device_type |= DT_FWI2;
2691 ha->device_type |= DT_IIDMA;
2692 ha->device_type |= DT_T10_PI;
2693 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2695 case PCI_DEVICE_ID_QLOGIC_ISP2261:
2696 ha->isp_type |= DT_ISP2261;
2697 ha->device_type |= DT_ZIO_SUPPORTED;
2698 ha->device_type |= DT_FWI2;
2699 ha->device_type |= DT_IIDMA;
2700 ha->device_type |= DT_T10_PI;
2701 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2706 ha->port_no = ha->portnum & 1;
2708 /* Get adapter physical port no from interrupt pin register. */
2709 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2713 ha->port_no = !(ha->port_no & 1);
2716 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2717 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2718 ha->device_type, ha->port_no, ha->fw_srisc_address);
2722 qla2xxx_scan_start(struct Scsi_Host *shost)
2724 scsi_qla_host_t *vha = shost_priv(shost);
2726 if (vha->hw->flags.running_gold_fw)
2729 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2730 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2731 set_bit(RSCN_UPDATE, &vha->dpc_flags);
2732 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2736 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2738 scsi_qla_host_t *vha = shost_priv(shost);
2740 if (test_bit(UNLOADING, &vha->dpc_flags))
2744 if (time > vha->hw->loop_reset_delay * HZ)
2747 return atomic_read(&vha->loop_state) == LOOP_READY;
2750 static void qla2x00_iocb_work_fn(struct work_struct *work)
2752 struct scsi_qla_host *vha = container_of(work,
2753 struct scsi_qla_host, iocb_work);
2754 struct qla_hw_data *ha = vha->hw;
2755 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2757 unsigned long flags;
2759 if (test_bit(UNLOADING, &base_vha->dpc_flags))
2762 while (!list_empty(&vha->work_list) && i > 0) {
2763 qla2x00_do_work(vha);
2767 spin_lock_irqsave(&vha->work_lock, flags);
2768 clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2769 spin_unlock_irqrestore(&vha->work_lock, flags);
2773 * PCI driver interface
2776 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2779 struct Scsi_Host *host;
2780 scsi_qla_host_t *base_vha = NULL;
2781 struct qla_hw_data *ha;
2783 char fw_str[30], wq_name[30];
2784 struct scsi_host_template *sht;
2785 int bars, mem_only = 0;
2786 uint16_t req_length = 0, rsp_length = 0;
2787 struct req_que *req = NULL;
2788 struct rsp_que *rsp = NULL;
2791 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2792 sht = &qla2xxx_driver_template;
2793 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2794 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2795 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2796 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2797 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2798 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2799 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2800 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2801 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2802 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2803 pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2804 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2805 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2806 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2807 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2808 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2810 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2811 "Mem only adapter.\n");
2813 ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2814 "Bars=%d.\n", bars);
2817 if (pci_enable_device_mem(pdev))
2820 if (pci_enable_device(pdev))
2824 /* This may fail but that's ok */
2825 pci_enable_pcie_error_reporting(pdev);
2827 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2829 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2830 "Unable to allocate memory for ha.\n");
2831 goto disable_device;
2833 ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2834 "Memory allocated for ha=%p.\n", ha);
2836 INIT_LIST_HEAD(&ha->tgt.q_full_list);
2837 spin_lock_init(&ha->tgt.q_full_lock);
2838 spin_lock_init(&ha->tgt.sess_lock);
2839 spin_lock_init(&ha->tgt.atio_lock);
2841 atomic_set(&ha->nvme_active_aen_cnt, 0);
2843 /* Clear our data area */
2845 ha->mem_only = mem_only;
2846 spin_lock_init(&ha->hardware_lock);
2847 spin_lock_init(&ha->vport_slock);
2848 mutex_init(&ha->selflogin_lock);
2849 mutex_init(&ha->optrom_mutex);
2851 /* Set ISP-type information. */
2852 qla2x00_set_isp_flags(ha);
2854 /* Set EEH reset type to fundamental if required by hba */
2855 if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2856 IS_QLA83XX(ha) || IS_QLA27XX(ha))
2857 pdev->needs_freset = 1;
2859 ha->prev_topology = 0;
2860 ha->init_cb_size = sizeof(init_cb_t);
2861 ha->link_data_rate = PORT_SPEED_UNKNOWN;
2862 ha->optrom_size = OPTROM_SIZE_2300;
2863 ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2864 atomic_set(&ha->num_pend_mbx_stage1, 0);
2865 atomic_set(&ha->num_pend_mbx_stage2, 0);
2866 atomic_set(&ha->num_pend_mbx_stage3, 0);
2867 atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2868 ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2870 /* Assign ISP specific operations. */
2871 if (IS_QLA2100(ha)) {
2872 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2873 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2874 req_length = REQUEST_ENTRY_CNT_2100;
2875 rsp_length = RESPONSE_ENTRY_CNT_2100;
2876 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2877 ha->gid_list_info_size = 4;
2878 ha->flash_conf_off = ~0;
2879 ha->flash_data_off = ~0;
2880 ha->nvram_conf_off = ~0;
2881 ha->nvram_data_off = ~0;
2882 ha->isp_ops = &qla2100_isp_ops;
2883 } else if (IS_QLA2200(ha)) {
2884 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2885 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2886 req_length = REQUEST_ENTRY_CNT_2200;
2887 rsp_length = RESPONSE_ENTRY_CNT_2100;
2888 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2889 ha->gid_list_info_size = 4;
2890 ha->flash_conf_off = ~0;
2891 ha->flash_data_off = ~0;
2892 ha->nvram_conf_off = ~0;
2893 ha->nvram_data_off = ~0;
2894 ha->isp_ops = &qla2100_isp_ops;
2895 } else if (IS_QLA23XX(ha)) {
2896 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2897 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2898 req_length = REQUEST_ENTRY_CNT_2200;
2899 rsp_length = RESPONSE_ENTRY_CNT_2300;
2900 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2901 ha->gid_list_info_size = 6;
2902 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2903 ha->optrom_size = OPTROM_SIZE_2322;
2904 ha->flash_conf_off = ~0;
2905 ha->flash_data_off = ~0;
2906 ha->nvram_conf_off = ~0;
2907 ha->nvram_data_off = ~0;
2908 ha->isp_ops = &qla2300_isp_ops;
2909 } else if (IS_QLA24XX_TYPE(ha)) {
2910 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2911 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2912 req_length = REQUEST_ENTRY_CNT_24XX;
2913 rsp_length = RESPONSE_ENTRY_CNT_2300;
2914 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2915 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2916 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2917 ha->gid_list_info_size = 8;
2918 ha->optrom_size = OPTROM_SIZE_24XX;
2919 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2920 ha->isp_ops = &qla24xx_isp_ops;
2921 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2922 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2923 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2924 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2925 } else if (IS_QLA25XX(ha)) {
2926 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2927 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2928 req_length = REQUEST_ENTRY_CNT_24XX;
2929 rsp_length = RESPONSE_ENTRY_CNT_2300;
2930 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2931 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2932 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2933 ha->gid_list_info_size = 8;
2934 ha->optrom_size = OPTROM_SIZE_25XX;
2935 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2936 ha->isp_ops = &qla25xx_isp_ops;
2937 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2938 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2939 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2940 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2941 } else if (IS_QLA81XX(ha)) {
2942 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2943 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2944 req_length = REQUEST_ENTRY_CNT_24XX;
2945 rsp_length = RESPONSE_ENTRY_CNT_2300;
2946 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2947 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2948 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2949 ha->gid_list_info_size = 8;
2950 ha->optrom_size = OPTROM_SIZE_81XX;
2951 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2952 ha->isp_ops = &qla81xx_isp_ops;
2953 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2954 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2955 ha->nvram_conf_off = ~0;
2956 ha->nvram_data_off = ~0;
2957 } else if (IS_QLA82XX(ha)) {
2958 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2959 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2960 req_length = REQUEST_ENTRY_CNT_82XX;
2961 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2962 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2963 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2964 ha->gid_list_info_size = 8;
2965 ha->optrom_size = OPTROM_SIZE_82XX;
2966 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2967 ha->isp_ops = &qla82xx_isp_ops;
2968 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2969 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2970 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2971 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2972 } else if (IS_QLA8044(ha)) {
2973 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2974 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2975 req_length = REQUEST_ENTRY_CNT_82XX;
2976 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2977 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2978 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2979 ha->gid_list_info_size = 8;
2980 ha->optrom_size = OPTROM_SIZE_83XX;
2981 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2982 ha->isp_ops = &qla8044_isp_ops;
2983 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2984 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2985 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2986 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2987 } else if (IS_QLA83XX(ha)) {
2988 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2989 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2990 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2991 req_length = REQUEST_ENTRY_CNT_83XX;
2992 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2993 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2994 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2995 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2996 ha->gid_list_info_size = 8;
2997 ha->optrom_size = OPTROM_SIZE_83XX;
2998 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2999 ha->isp_ops = &qla83xx_isp_ops;
3000 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3001 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3002 ha->nvram_conf_off = ~0;
3003 ha->nvram_data_off = ~0;
3004 } else if (IS_QLAFX00(ha)) {
3005 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3006 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3007 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3008 req_length = REQUEST_ENTRY_CNT_FX00;
3009 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3010 ha->isp_ops = &qlafx00_isp_ops;
3011 ha->port_down_retry_count = 30; /* default value */
3012 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3013 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3014 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3015 ha->mr.fw_hbt_en = 1;
3016 ha->mr.host_info_resend = false;
3017 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3018 } else if (IS_QLA27XX(ha)) {
3019 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3020 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3021 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3022 req_length = REQUEST_ENTRY_CNT_83XX;
3023 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3024 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3025 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3026 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3027 ha->gid_list_info_size = 8;
3028 ha->optrom_size = OPTROM_SIZE_83XX;
3029 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3030 ha->isp_ops = &qla27xx_isp_ops;
3031 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3032 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3033 ha->nvram_conf_off = ~0;
3034 ha->nvram_data_off = ~0;
3037 ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3038 "mbx_count=%d, req_length=%d, "
3039 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3040 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3041 "max_fibre_devices=%d.\n",
3042 ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3043 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3044 ha->nvram_npiv_size, ha->max_fibre_devices);
3045 ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3046 "isp_ops=%p, flash_conf_off=%d, "
3047 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3048 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3049 ha->nvram_conf_off, ha->nvram_data_off);
3051 /* Configure PCI I/O space */
3052 ret = ha->isp_ops->iospace_config(ha);
3054 goto iospace_config_failed;
3056 ql_log_pci(ql_log_info, pdev, 0x001d,
3057 "Found an ISP%04X irq %d iobase 0x%p.\n",
3058 pdev->device, pdev->irq, ha->iobase);
3059 mutex_init(&ha->vport_lock);
3060 mutex_init(&ha->mq_lock);
3061 init_completion(&ha->mbx_cmd_comp);
3062 complete(&ha->mbx_cmd_comp);
3063 init_completion(&ha->mbx_intr_comp);
3064 init_completion(&ha->dcbx_comp);
3065 init_completion(&ha->lb_portup_comp);
3067 set_bit(0, (unsigned long *) ha->vp_idx_map);
3069 qla2x00_config_dma_addressing(ha);
3070 ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3071 "64 Bit addressing is %s.\n",
3072 ha->flags.enable_64bit_addressing ? "enable" :
3074 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3076 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3077 "Failed to allocate memory for adapter, aborting.\n");
3079 goto probe_hw_failed;
3082 req->max_q_depth = MAX_Q_DEPTH;
3083 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3084 req->max_q_depth = ql2xmaxqdepth;
3087 base_vha = qla2x00_create_host(sht, ha);
3090 goto probe_hw_failed;