drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18
  19 #include <scsi/scsi_tcq.h>
  20 #include <scsi/scsicam.h>
  21 #include <scsi/scsi_transport.h>
  22 #include <scsi/scsi_transport_fc.h>
  23
  24 #include "qla_target.h"
  25
  26 /*
  27  * Driver version
  28  */
  29 char qla2x00_version_str[40];
  30
  31 static int apidev_major;
  32
  33 /*
  34  * SRB allocation cache
  35  */
  36 struct kmem_cache *srb_cachep;
  37
  38 /*
  39  * CT6 CTX allocation cache
  40  */
  41 static struct kmem_cache *ctx_cachep;
  42 /*
  43  * error level for logging
  44  */
  45 uint ql_errlev = 0x8001;
  46
  47 static int ql2xenableclass2;
  48 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  49 MODULE_PARM_DESC(ql2xenableclass2,
  50                 "Specify if Class 2 operations are supported from the very "
  51                 "beginning. Default is 0 - class 2 not supported.");
  52
  53
  54 int ql2xlogintimeout = 20;
  55 module_param(ql2xlogintimeout, int, S_IRUGO);
  56 MODULE_PARM_DESC(ql2xlogintimeout,
  57                 "Login timeout value in seconds.");
  58
  59 int qlport_down_retry;
  60 module_param(qlport_down_retry, int, S_IRUGO);
  61 MODULE_PARM_DESC(qlport_down_retry,
  62                 "Maximum number of command retries to a port that returns "
  63                 "a PORT-DOWN status.");
  64
  65 int ql2xplogiabsentdevice;
  66 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  67 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  68                 "Option to enable PLOGI to devices that are not present after "
  69                 "a Fabric scan.  This is needed for several broken switches. "
  70                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  71
  72 int ql2xloginretrycount;
  73 module_param(ql2xloginretrycount, int, S_IRUGO);
  74 MODULE_PARM_DESC(ql2xloginretrycount,
  75                 "Specify an alternate value for the NVRAM login retry count.");
  76
  77 int ql2xallocfwdump = 1;
  78 module_param(ql2xallocfwdump, int, S_IRUGO);
  79 MODULE_PARM_DESC(ql2xallocfwdump,
  80                 "Option to enable allocation of memory for a firmware dump "
  81                 "during HBA initialization.  Memory allocation requirements "
  82                 "vary by ISP type.  Default is 1 - allocate memory.");
  83
  84 int ql2xextended_error_logging;
  85 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  86 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  87 MODULE_PARM_DESC(ql2xextended_error_logging,
  88                 "Option to enable extended error logging,\n"
  89                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  90                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  91                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  92                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  93                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  94                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  95                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  96                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  97                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  98                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  99                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 100                 "\t\t0x1e400000 - Preferred value for capturing essential "
 101                 "debug information (equivalent to old "
 102                 "ql2xextended_error_logging=1).\n"
 103                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 104
 105 int ql2xshiftctondsd = 6;
 106 module_param(ql2xshiftctondsd, int, S_IRUGO);
 107 MODULE_PARM_DESC(ql2xshiftctondsd,
 108                 "Set to control shifting of command type processing "
 109                 "based on total number of SG elements.");
 110
 111 int ql2xfdmienable = 1;
 112 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 113 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 114 MODULE_PARM_DESC(ql2xfdmienable,
 115                 "Enables FDMI registrations. "
 116                 "0 - no FDMI. Default is 1 - perform FDMI.");
 117
 118 #define MAX_Q_DEPTH     64
 119 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 120 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 121 MODULE_PARM_DESC(ql2xmaxqdepth,
 122                 "Maximum queue depth to set for each LUN. "
 123                 "Default is 64.");
 124
 125 #if (IS_ENABLED(CONFIG_NVME_FC))
 126 int ql2xenabledif;
 127 #else
 128 int ql2xenabledif = 2;
 129 #endif
 130 module_param(ql2xenabledif, int, S_IRUGO);
 131 MODULE_PARM_DESC(ql2xenabledif,
 132                 " Enable T10-CRC-DIF:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- No DIF Support\n"
 135                 "  1 -- Enable DIF for all types\n"
 136                 "  2 -- Enable DIF for all types, except Type 0.\n");
 137
 138 #if (IS_ENABLED(CONFIG_NVME_FC))
 139 int ql2xnvmeenable = 1;
 140 #else
 141 int ql2xnvmeenable;
 142 #endif
 143 module_param(ql2xnvmeenable, int, 0644);
 144 MODULE_PARM_DESC(ql2xnvmeenable,
 145     "Enables NVME support. "
 146     "0 - no NVMe.  Default is Y");
 147
 148 int ql2xenablehba_err_chk = 2;
 149 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 150 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 151                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 152                 " Default is 2.\n"
 153                 "  0 -- Error isolation disabled\n"
 154                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 155                 "  2 -- Error isolation enabled for all Types\n");
 156
 157 int ql2xiidmaenable = 1;
 158 module_param(ql2xiidmaenable, int, S_IRUGO);
 159 MODULE_PARM_DESC(ql2xiidmaenable,
 160                 "Enables iIDMA settings "
 161                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 162
 163 int ql2xmqsupport = 1;
 164 module_param(ql2xmqsupport, int, S_IRUGO);
 165 MODULE_PARM_DESC(ql2xmqsupport,
 166                 "Enable on demand multiple queue pairs support "
 167                 "Default is 1 for supported. "
 168                 "Set it to 0 to turn off mq qpair support.");
 169
 170 int ql2xfwloadbin;
 171 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 172 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 173 MODULE_PARM_DESC(ql2xfwloadbin,
 174                 "Option to specify location from which to load ISP firmware:.\n"
 175                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 176                 "      interface.\n"
 177                 " 1 -- load firmware from flash.\n"
 178                 " 0 -- use default semantics.\n");
 179
 180 int ql2xetsenable;
 181 module_param(ql2xetsenable, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xetsenable,
 183                 "Enables firmware ETS burst."
 184                 "Default is 0 - skip ETS enablement.");
 185
 186 int ql2xdbwr = 1;
 187 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 188 MODULE_PARM_DESC(ql2xdbwr,
 189                 "Option to specify scheme for request queue posting.\n"
 190                 " 0 -- Regular doorbell.\n"
 191                 " 1 -- CAMRAM doorbell (faster).\n");
 192
 193 int ql2xtargetreset = 1;
 194 module_param(ql2xtargetreset, int, S_IRUGO);
 195 MODULE_PARM_DESC(ql2xtargetreset,
 196                  "Enable target reset."
 197                  "Default is 1 - use hw defaults.");
 198
 199 int ql2xgffidenable;
 200 module_param(ql2xgffidenable, int, S_IRUGO);
 201 MODULE_PARM_DESC(ql2xgffidenable,
 202                 "Enables GFF_ID checks of port type. "
 203                 "Default is 0 - Do not use GFF_ID information.");
 204
 205 int ql2xasynctmfenable = 1;
 206 module_param(ql2xasynctmfenable, int, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xasynctmfenable,
 208                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 209                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 210
 211 int ql2xdontresethba;
 212 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 213 MODULE_PARM_DESC(ql2xdontresethba,
 214                 "Option to specify reset behaviour.\n"
 215                 " 0 (Default) -- Reset on failure.\n"
 216                 " 1 -- Do not reset on failure.\n");
 217
 218 uint64_t ql2xmaxlun = MAX_LUNS;
 219 module_param(ql2xmaxlun, ullong, S_IRUGO);
 220 MODULE_PARM_DESC(ql2xmaxlun,
 221                 "Defines the maximum LU number to register with the SCSI "
 222                 "midlayer. Default is 65535.");
 223
 224 int ql2xmdcapmask = 0x1F;
 225 module_param(ql2xmdcapmask, int, S_IRUGO);
 226 MODULE_PARM_DESC(ql2xmdcapmask,
 227                 "Set the Minidump driver capture mask level. "
 228                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 229
 230 int ql2xmdenable = 1;
 231 module_param(ql2xmdenable, int, S_IRUGO);
 232 MODULE_PARM_DESC(ql2xmdenable,
 233                 "Enable/disable MiniDump. "
 234                 "0 - MiniDump disabled. "
 235                 "1 (Default) - MiniDump enabled.");
 236
 237 int ql2xexlogins;
 238 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 239 MODULE_PARM_DESC(ql2xexlogins,
 240                  "Number of extended Logins. "
 241                  "0 (Default)- Disabled.");
 242
 243 int ql2xexchoffld = 1024;
 244 module_param(ql2xexchoffld, uint, 0644);
 245 MODULE_PARM_DESC(ql2xexchoffld,
 246         "Number of target exchanges.");
 247
 248 int ql2xiniexchg = 1024;
 249 module_param(ql2xiniexchg, uint, 0644);
 250 MODULE_PARM_DESC(ql2xiniexchg,
 251         "Number of initiator exchanges.");
 252
 253 int ql2xfwholdabts;
 254 module_param(ql2xfwholdabts, int, S_IRUGO);
 255 MODULE_PARM_DESC(ql2xfwholdabts,
 256                 "Allow FW to hold status IOCB until ABTS rsp received. "
 257                 "0 (Default) Do not set fw option. "
 258                 "1 - Set fw option to hold ABTS.");
 259
 260 int ql2xmvasynctoatio = 1;
 261 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 262 MODULE_PARM_DESC(ql2xmvasynctoatio,
 263                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 264                 "0 (Default). Do not move IOCBs"
 265                 "1 - Move IOCBs.");
 266
 267 int ql2xautodetectsfp = 1;
 268 module_param(ql2xautodetectsfp, int, 0444);
 269 MODULE_PARM_DESC(ql2xautodetectsfp,
 270                  "Detect SFP range and set appropriate distance.\n"
 271                  "1 (Default): Enable\n");
 272
 273 int ql2xenablemsix = 1;
 274 module_param(ql2xenablemsix, int, 0444);
 275 MODULE_PARM_DESC(ql2xenablemsix,
 276                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 277                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 278                  " 0 -- enable traditional pin-based mechanism.\n"
 279                  " 1 -- enable MSI-X interrupt mechanism.\n"
 280                  " 2 -- enable MSI interrupt mechanism.\n");
 281
 282 int qla2xuseresexchforels;
 283 module_param(qla2xuseresexchforels, int, 0444);
 284 MODULE_PARM_DESC(qla2xuseresexchforels,
 285                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 286                  " 0 (default): disabled");
 287
 288 static int ql2xprotmask;
 289 module_param(ql2xprotmask, int, 0644);
 290 MODULE_PARM_DESC(ql2xprotmask,
 291                  "Override DIF/DIX protection capabilities mask\n"
 292                  "Default is 0 which sets protection mask based on "
 293                  "capabilities reported by HBA firmware.\n");
 294
 295 static int ql2xprotguard;
 296 module_param(ql2xprotguard, int, 0644);
 297 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 298                  "  0 -- Let HBA firmware decide\n"
 299                  "  1 -- Force T10 CRC\n"
 300                  "  2 -- Force IP checksum\n");
 301
 302 int ql2xdifbundlinginternalbuffers;
 303 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 304 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 305     "Force using internal buffers for DIF information\n"
 306     "0 (Default). Based on check.\n"
 307     "1 Force using internal buffers\n");
 308
 309 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 310 static void qla2x00_free_device(scsi_qla_host_t *);
 311 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 312 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 313
 314
 315 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 316 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 317
 318 /* TODO Convert to inlines
 319  *
 320  * Timer routines
 321  */
 322
 323 __inline__ void
 324 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 325 {
 326         timer_setup(&vha->timer, qla2x00_timer, 0);
 327         vha->timer.expires = jiffies + interval * HZ;
 328         add_timer(&vha->timer);
 329         vha->timer_active = 1;
 330 }
 331
 332 static inline void
 333 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 334 {
 335         /* Currently used for 82XX only. */
 336         if (vha->device_flags & DFLG_DEV_FAILED) {
 337                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 338                     "Device in a failed state, returning.\n");
 339                 return;
 340         }
 341
 342         mod_timer(&vha->timer, jiffies + interval * HZ);
 343 }
 344
 345 static __inline__ void
 346 qla2x00_stop_timer(scsi_qla_host_t *vha)
 347 {
 348         del_timer_sync(&vha->timer);
 349         vha->timer_active = 0;
 350 }
 351
 352 static int qla2x00_do_dpc(void *data);
 353
 354 static void qla2x00_rst_aen(scsi_qla_host_t *);
 355
 356 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 357         struct req_que **, struct rsp_que **);
 358 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 359 static void qla2x00_mem_free(struct qla_hw_data *);
 360 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 361         struct qla_qpair *qpair);
 362
 363 /* -------------------------------------------------------------------------- */
 364 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 365     struct rsp_que *rsp)
 366 {
 367         struct qla_hw_data *ha = vha->hw;
 368
 369         rsp->qpair = ha->base_qpair;
 370         rsp->req = req;
 371         ha->base_qpair->hw = ha;
 372         ha->base_qpair->req = req;
 373         ha->base_qpair->rsp = rsp;
 374         ha->base_qpair->vha = vha;
 375         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 376         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 377         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 378         ha->base_qpair->srb_mempool = ha->srb_mempool;
 379         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 380         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 381         /* init qpair to this cpu. Will adjust at run time. */
 382         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 383         ha->base_qpair->pdev = ha->pdev;
 384
 385         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 386                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 387 }
 388
 389 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 390                                 struct rsp_que *rsp)
 391 {
 392         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 393
 394         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 395                                 GFP_KERNEL);
 396         if (!ha->req_q_map) {
 397                 ql_log(ql_log_fatal, vha, 0x003b,
 398                     "Unable to allocate memory for request queue ptrs.\n");
 399                 goto fail_req_map;
 400         }
 401
 402         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 403                                 GFP_KERNEL);
 404         if (!ha->rsp_q_map) {
 405                 ql_log(ql_log_fatal, vha, 0x003c,
 406                     "Unable to allocate memory for response queue ptrs.\n");
 407                 goto fail_rsp_map;
 408         }
 409
 410         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 411         if (ha->base_qpair == NULL) {
 412                 ql_log(ql_log_warn, vha, 0x00e0,
 413                     "Failed to allocate base queue pair memory.\n");
 414                 goto fail_base_qpair;
 415         }
 416
 417         qla_init_base_qpair(vha, req, rsp);
 418
 419         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 420                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 421                         GFP_KERNEL);
 422                 if (!ha->queue_pair_map) {
 423                         ql_log(ql_log_fatal, vha, 0x0180,
 424                             "Unable to allocate memory for queue pair ptrs.\n");
 425                         goto fail_qpair_map;
 426                 }
 427         }
 428
 429         /*
 430          * Make sure we record at least the request and response queue zero in
 431          * case we need to free them if part of the probe fails.
 432          */
 433         ha->rsp_q_map[0] = rsp;
 434         ha->req_q_map[0] = req;
 435         set_bit(0, ha->rsp_qid_map);
 436         set_bit(0, ha->req_qid_map);
 437         return 0;
 438
 439 fail_qpair_map:
 440         kfree(ha->base_qpair);
 441         ha->base_qpair = NULL;
 442 fail_base_qpair:
 443         kfree(ha->rsp_q_map);
 444         ha->rsp_q_map = NULL;
 445 fail_rsp_map:
 446         kfree(ha->req_q_map);
 447         ha->req_q_map = NULL;
 448 fail_req_map:
 449         return -ENOMEM;
 450 }
 451
 452 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 453 {
 454         if (IS_QLAFX00(ha)) {
 455                 if (req && req->ring_fx00)
 456                         dma_free_coherent(&ha->pdev->dev,
 457                             (req->length_fx00 + 1) * sizeof(request_t),
 458                             req->ring_fx00, req->dma_fx00);
 459         } else if (req && req->ring)
 460                 dma_free_coherent(&ha->pdev->dev,
 461                 (req->length + 1) * sizeof(request_t),
 462                 req->ring, req->dma);
 463
 464         if (req)
 465                 kfree(req->outstanding_cmds);
 466
 467         kfree(req);
 468 }
 469
 470 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 471 {
 472         if (IS_QLAFX00(ha)) {
 473                 if (rsp && rsp->ring_fx00)
 474                         dma_free_coherent(&ha->pdev->dev,
 475                             (rsp->length_fx00 + 1) * sizeof(request_t),
 476                             rsp->ring_fx00, rsp->dma_fx00);
 477         } else if (rsp && rsp->ring) {
 478                 dma_free_coherent(&ha->pdev->dev,
 479                 (rsp->length + 1) * sizeof(response_t),
 480                 rsp->ring, rsp->dma);
 481         }
 482         kfree(rsp);
 483 }
 484
 485 static void qla2x00_free_queues(struct qla_hw_data *ha)
 486 {
 487         struct req_que *req;
 488         struct rsp_que *rsp;
 489         int cnt;
 490         unsigned long flags;
 491
 492         if (ha->queue_pair_map) {
 493                 kfree(ha->queue_pair_map);
 494                 ha->queue_pair_map = NULL;
 495         }
 496         if (ha->base_qpair) {
 497                 kfree(ha->base_qpair);
 498                 ha->base_qpair = NULL;
 499         }
 500
 501         spin_lock_irqsave(&ha->hardware_lock, flags);
 502         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 503                 if (!test_bit(cnt, ha->req_qid_map))
 504                         continue;
 505
 506                 req = ha->req_q_map[cnt];
 507                 clear_bit(cnt, ha->req_qid_map);
 508                 ha->req_q_map[cnt] = NULL;
 509
 510                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 511                 qla2x00_free_req_que(ha, req);
 512                 spin_lock_irqsave(&ha->hardware_lock, flags);
 513         }
 514         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 515
 516         kfree(ha->req_q_map);
 517         ha->req_q_map = NULL;
 518
 519
 520         spin_lock_irqsave(&ha->hardware_lock, flags);
 521         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 522                 if (!test_bit(cnt, ha->rsp_qid_map))
 523                         continue;
 524
 525                 rsp = ha->rsp_q_map[cnt];
 526                 clear_bit(cnt, ha->rsp_qid_map);
 527                 ha->rsp_q_map[cnt] =  NULL;
 528                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 529                 qla2x00_free_rsp_que(ha, rsp);
 530                 spin_lock_irqsave(&ha->hardware_lock, flags);
 531         }
 532         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 533
 534         kfree(ha->rsp_q_map);
 535         ha->rsp_q_map = NULL;
 536 }
 537
 538 static char *
 539 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 540 {
 541         struct qla_hw_data *ha = vha->hw;
 542         static const char *const pci_bus_modes[] = {
 543                 "33", "66", "100", "133",
 544         };
 545         uint16_t pci_bus;
 546
 547         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 548         if (pci_bus) {
 549                 snprintf(str, str_len, "PCI-X (%s MHz)",
 550                          pci_bus_modes[pci_bus]);
 551         } else {
 552                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 553                 snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]);
 554         }
 555
 556         return str;
 557 }
 558
 559 static char *
 560 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 561 {
 562         static const char *const pci_bus_modes[] = {
 563                 "33", "66", "100", "133",
 564         };
 565         struct qla_hw_data *ha = vha->hw;
 566         uint32_t pci_bus;
 567
 568         if (pci_is_pcie(ha->pdev)) {
 569                 uint32_t lstat, lspeed, lwidth;
 570                 const char *speed_str;
 571
 572                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 573                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 574                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 575
 576                 switch (lspeed) {
 577                 case 1:
 578                         speed_str = "2.5GT/s";
 579                         break;
 580                 case 2:
 581                         speed_str = "5.0GT/s";
 582                         break;
 583                 case 3:
 584                         speed_str = "8.0GT/s";
 585                         break;
 586                 default:
 587                         speed_str = "<unknown>";
 588                         break;
 589                 }
 590                 snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth);
 591
 592                 return str;
 593         }
 594
 595         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 596         if (pci_bus == 0 || pci_bus == 8)
 597                 snprintf(str, str_len, "PCI (%s MHz)",
 598                          pci_bus_modes[pci_bus >> 3]);
 599         else
 600                 snprintf(str, str_len, "PCI-X Mode %d (%s MHz)",
 601                          pci_bus & 4 ? 2 : 1,
 602                          pci_bus_modes[pci_bus & 3]);
 603
 604         return str;
 605 }
 606
 607 static char *
 608 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 609 {
 610         char un_str[10];
 611         struct qla_hw_data *ha = vha->hw;
 612
 613         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 614             ha->fw_minor_version, ha->fw_subminor_version);
 615
 616         if (ha->fw_attributes & BIT_9) {
 617                 strcat(str, "FLX");
 618                 return (str);
 619         }
 620
 621         switch (ha->fw_attributes & 0xFF) {
 622         case 0x7:
 623                 strcat(str, "EF");
 624                 break;
 625         case 0x17:
 626                 strcat(str, "TP");
 627                 break;
 628         case 0x37:
 629                 strcat(str, "IP");
 630                 break;
 631         case 0x77:
 632                 strcat(str, "VI");
 633                 break;
 634         default:
 635                 sprintf(un_str, "(%x)", ha->fw_attributes);
 636                 strcat(str, un_str);
 637                 break;
 638         }
 639         if (ha->fw_attributes & 0x100)
 640                 strcat(str, "X");
 641
 642         return (str);
 643 }
 644
 645 static char *
 646 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 647 {
 648         struct qla_hw_data *ha = vha->hw;
 649
 650         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 651             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 652         return str;
 653 }
 654
 655 void qla2x00_sp_free_dma(srb_t *sp)
 656 {
 657         struct qla_hw_data *ha = sp->vha->hw;
 658         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 659
 660         if (sp->flags & SRB_DMA_VALID) {
 661                 scsi_dma_unmap(cmd);
 662                 sp->flags &= ~SRB_DMA_VALID;
 663         }
 664
 665         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 666                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 667                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 668                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 669         }
 670
 671         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 672                 /* List assured to be having elements */
 673                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 674                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 675         }
 676
 677         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 678                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 679
 680                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 681                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 682         }
 683
 684         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 685                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 686
 687                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 688                     ctx1->fcp_cmnd_dma);
 689                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 690                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 691                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 692                 mempool_free(ctx1, ha->ctx_mempool);
 693         }
 694 }
 695
 696 void qla2x00_sp_compl(srb_t *sp, int res)
 697 {
 698         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 699         struct completion *comp = sp->comp;
 700
 701         if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
 702                 return;
 703
 704         atomic_dec(&sp->ref_count);
 705
 706         sp->free(sp);
 707         cmd->result = res;
 708         CMD_SP(cmd) = NULL;
 709         cmd->scsi_done(cmd);
 710         if (comp)
 711                 complete(comp);
 712 }
 713
 714 void qla2xxx_qpair_sp_free_dma(srb_t *sp)
 715 {
 716         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 717         struct qla_hw_data *ha = sp->fcport->vha->hw;
 718
 719         if (sp->flags & SRB_DMA_VALID) {
 720                 scsi_dma_unmap(cmd);
 721                 sp->flags &= ~SRB_DMA_VALID;
 722         }
 723
 724         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 725                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 726                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 727                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 728         }
 729
 730         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 731                 /* List assured to be having elements */
 732                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 733                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 734         }
 735
 736         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 737                 struct crc_context *difctx = sp->u.scmd.crc_ctx;
 738                 struct dsd_dma *dif_dsd, *nxt_dsd;
 739
 740                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 741                     &difctx->ldif_dma_hndl_list, list) {
 742                         list_del(&dif_dsd->list);
 743                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 744                             dif_dsd->dsd_list_dma);
 745                         kfree(dif_dsd);
 746                         difctx->no_dif_bundl--;
 747                 }
 748
 749                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 750                     &difctx->ldif_dsd_list, list) {
 751                         list_del(&dif_dsd->list);
 752                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 753                             dif_dsd->dsd_list_dma);
 754                         kfree(dif_dsd);
 755                         difctx->no_ldif_dsd--;
 756                 }
 757
 758                 if (difctx->no_ldif_dsd) {
 759                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 760                             "%s: difctx->no_ldif_dsd=%x\n",
 761                             __func__, difctx->no_ldif_dsd);
 762                 }
 763
 764                 if (difctx->no_dif_bundl) {
 765                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 766                             "%s: difctx->no_dif_bundl=%x\n",
 767                             __func__, difctx->no_dif_bundl);
 768                 }
 769                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 770         }
 771
 772         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 773                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 774
 775                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 776                     ctx1->fcp_cmnd_dma);
 777                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 778                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 779                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 780                 mempool_free(ctx1, ha->ctx_mempool);
 781                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 782         }
 783
 784         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 785                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 786
 787                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 788                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 789         }
 790 }
 791
 792 void qla2xxx_qpair_sp_compl(srb_t *sp, int res)
 793 {
 794         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 795         struct completion *comp = sp->comp;
 796
 797         if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
 798                 return;
 799
 800         atomic_dec(&sp->ref_count);
 801
 802         sp->free(sp);
 803         cmd->result = res;
 804         CMD_SP(cmd) = NULL;
 805         cmd->scsi_done(cmd);
 806         if (comp)
 807                 complete(comp);
 808 }
 809
 810 static int
 811 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 812 {
 813         scsi_qla_host_t *vha = shost_priv(host);
 814         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 815         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 816         struct qla_hw_data *ha = vha->hw;
 817         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 818         srb_t *sp;
 819         int rval;
 820
 821         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 822             WARN_ON_ONCE(!rport)) {
 823                 cmd->result = DID_NO_CONNECT << 16;
 824                 goto qc24_fail_command;
 825         }
 826
 827         if (ha->mqenable) {
 828                 uint32_t tag;
 829                 uint16_t hwq;
 830                 struct qla_qpair *qpair = NULL;
 831
 832                 tag = blk_mq_unique_tag(cmd->request);
 833                 hwq = blk_mq_unique_tag_to_hwq(tag);
 834                 qpair = ha->queue_pair_map[hwq];
 835
 836                 if (qpair)
 837                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 838         }
 839
 840         if (ha->flags.eeh_busy) {
 841                 if (ha->flags.pci_channel_io_perm_failure) {
 842                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 843                             "PCI Channel IO permanent failure, exiting "
 844                             "cmd=%p.\n", cmd);
 845                         cmd->result = DID_NO_CONNECT << 16;
 846                 } else {
 847                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 848                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 849                         cmd->result = DID_REQUEUE << 16;
 850                 }
 851                 goto qc24_fail_command;
 852         }
 853
 854         rval = fc_remote_port_chkready(rport);
 855         if (rval) {
 856                 cmd->result = rval;
 857                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 858                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 859                     cmd, rval);
 860                 goto qc24_fail_command;
 861         }
 862
 863         if (!vha->flags.difdix_supported &&
 864                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 865                         ql_dbg(ql_dbg_io, vha, 0x3004,
 866                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 867                             cmd);
 868                         cmd->result = DID_NO_CONNECT << 16;
 869                         goto qc24_fail_command;
 870         }
 871
 872         if (!fcport) {
 873                 cmd->result = DID_NO_CONNECT << 16;
 874                 goto qc24_fail_command;
 875         }
 876
 877         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 878                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 879                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 880                         ql_dbg(ql_dbg_io, vha, 0x3005,
 881                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 882                             atomic_read(&fcport->state),
 883                             atomic_read(&base_vha->loop_state));
 884                         cmd->result = DID_NO_CONNECT << 16;
 885                         goto qc24_fail_command;
 886                 }
 887                 goto qc24_target_busy;
 888         }
 889
 890         /*
 891          * Return target busy if we've received a non-zero retry_delay_timer
 892          * in a FCP_RSP.
 893          */
 894         if (fcport->retry_delay_timestamp == 0) {
 895                 /* retry delay not set */
 896         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 897                 fcport->retry_delay_timestamp = 0;
 898         else
 899                 goto qc24_target_busy;
 900
 901         sp = scsi_cmd_priv(cmd);
 902         qla2xxx_init_sp(sp, vha, vha->hw->base_qpair, fcport);
 903
 904         sp->u.scmd.cmd = cmd;
 905         sp->type = SRB_SCSI_CMD;
 906         atomic_set(&sp->ref_count, 1);
 907         CMD_SP(cmd) = (void *)sp;
 908         sp->free = qla2x00_sp_free_dma;
 909         sp->done = qla2x00_sp_compl;
 910
 911         rval = ha->isp_ops->start_scsi(sp);
 912         if (rval != QLA_SUCCESS) {
 913                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 914                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 915                 goto qc24_host_busy_free_sp;
 916         }
 917
 918         return 0;
 919
 920 qc24_host_busy_free_sp:
 921         sp->free(sp);
 922
 923 qc24_target_busy:
 924         return SCSI_MLQUEUE_TARGET_BUSY;
 925
 926 qc24_fail_command:
 927         cmd->scsi_done(cmd);
 928
 929         return 0;
 930 }
 931
 932 /* For MQ supported I/O */
 933 int
 934 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 935     struct qla_qpair *qpair)
 936 {
 937         scsi_qla_host_t *vha = shost_priv(host);
 938         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 939         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 940         struct qla_hw_data *ha = vha->hw;
 941         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 942         srb_t *sp;
 943         int rval;
 944
 945         rval = rport ? fc_remote_port_chkready(rport) : FC_PORTSTATE_OFFLINE;
 946         if (rval) {
 947                 cmd->result = rval;
 948                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 949                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 950                     cmd, rval);
 951                 goto qc24_fail_command;
 952         }
 953
 954         if (!fcport) {
 955                 cmd->result = DID_NO_CONNECT << 16;
 956                 goto qc24_fail_command;
 957         }
 958
 959         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 960                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 961                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 962                         ql_dbg(ql_dbg_io, vha, 0x3077,
 963                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 964                             atomic_read(&fcport->state),
 965                             atomic_read(&base_vha->loop_state));
 966                         cmd->result = DID_NO_CONNECT << 16;
 967                         goto qc24_fail_command;
 968                 }
 969                 goto qc24_target_busy;
 970         }
 971
 972         /*
 973          * Return target busy if we've received a non-zero retry_delay_timer
 974          * in a FCP_RSP.
 975          */
 976         if (fcport->retry_delay_timestamp == 0) {
 977                 /* retry delay not set */
 978         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 979                 fcport->retry_delay_timestamp = 0;
 980         else
 981                 goto qc24_target_busy;
 982
 983         sp = scsi_cmd_priv(cmd);
 984         qla2xxx_init_sp(sp, vha, qpair, fcport);
 985
 986         sp->u.scmd.cmd = cmd;
 987         sp->type = SRB_SCSI_CMD;
 988         atomic_set(&sp->ref_count, 1);
 989         CMD_SP(cmd) = (void *)sp;
 990         sp->free = qla2xxx_qpair_sp_free_dma;
 991         sp->done = qla2xxx_qpair_sp_compl;
 992         sp->qpair = qpair;
 993
 994         rval = ha->isp_ops->start_scsi_mq(sp);
 995         if (rval != QLA_SUCCESS) {
 996                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
 997                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 998                 if (rval == QLA_INTERFACE_ERROR)
 999                         goto qc24_fail_command;
1000                 goto qc24_host_busy_free_sp;
1001         }
1002
1003         return 0;
1004
1005 qc24_host_busy_free_sp:
1006         sp->free(sp);
1007
1008 qc24_target_busy:
1009         return SCSI_MLQUEUE_TARGET_BUSY;
1010
1011 qc24_fail_command:
1012         cmd->scsi_done(cmd);
1013
1014         return 0;
1015 }
1016
1017 /*
1018  * qla2x00_eh_wait_on_command
1019  *    Waits for the command to be returned by the Firmware for some
1020  *    max time.
1021  *
1022  * Input:
1023  *    cmd = Scsi Command to wait on.
1024  *
1025  * Return:
1026  *    Completed in time : QLA_SUCCESS
1027  *    Did not complete in time : QLA_FUNCTION_FAILED
1028  */
1029 static int
1030 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1031 {
1032 #define ABORT_POLLING_PERIOD    1000
1033 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1034         unsigned long wait_iter = ABORT_WAIT_ITER;
1035         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1036         struct qla_hw_data *ha = vha->hw;
1037         int ret = QLA_SUCCESS;
1038
1039         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1040                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1041                     "Return:eh_wait.\n");
1042                 return ret;
1043         }
1044
1045         while (CMD_SP(cmd) && wait_iter--) {
1046                 msleep(ABORT_POLLING_PERIOD);
1047         }
1048         if (CMD_SP(cmd))
1049                 ret = QLA_FUNCTION_FAILED;
1050
1051         return ret;
1052 }
1053
1054 /*
1055  * qla2x00_wait_for_hba_online
1056  *    Wait till the HBA is online after going through
1057  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1058  *    finally HBA is disabled ie marked offline
1059  *
1060  * Input:
1061  *     ha - pointer to host adapter structure
1062  *
1063  * Note:
1064  *    Does context switching-Release SPIN_LOCK
1065  *    (if any) before calling this routine.
1066  *
1067  * Return:
1068  *    Success (Adapter is online) : 0
1069  *    Failed  (Adapter is offline/disabled) : 1
1070  */
1071 int
1072 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1073 {
1074         int             return_status;
1075         unsigned long   wait_online;
1076         struct qla_hw_data *ha = vha->hw;
1077         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1078
1079         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1080         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1081             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1082             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1083             ha->dpc_active) && time_before(jiffies, wait_online)) {
1084
1085                 msleep(1000);
1086         }
1087         if (base_vha->flags.online)
1088                 return_status = QLA_SUCCESS;
1089         else
1090                 return_status = QLA_FUNCTION_FAILED;
1091
1092         return (return_status);
1093 }
1094
1095 static inline int test_fcport_count(scsi_qla_host_t *vha)
1096 {
1097         struct qla_hw_data *ha = vha->hw;
1098         unsigned long flags;
1099         int res;
1100
1101         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1102         ql_dbg(ql_dbg_init, vha, 0x00ec,
1103             "tgt %p, fcport_count=%d\n",
1104             vha, vha->fcport_count);
1105         res = (vha->fcport_count == 0);
1106         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1107
1108         return res;
1109 }
1110
1111 /*
1112  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1113  * it has dependency on UNLOADING flag to stop device discovery
1114  */
1115 void
1116 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1117 {
1118         qla2x00_mark_all_devices_lost(vha, 0);
1119
1120         wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1121 }
1122
1123 /*
1124  * qla2x00_wait_for_hba_ready
1125  * Wait till the HBA is ready before doing driver unload
1126  *
1127  * Input:
1128  *     ha - pointer to host adapter structure
1129  *
1130  * Note:
1131  *    Does context switching-Release SPIN_LOCK
1132  *    (if any) before calling this routine.
1133  *
1134  */
1135 static void
1136 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1137 {
1138         struct qla_hw_data *ha = vha->hw;
1139         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1140
1141         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1142                 ha->flags.mbox_busy) ||
1143                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1144                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1145                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1146                         break;
1147                 msleep(1000);
1148         }
1149 }
1150
1151 int
1152 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1153 {
1154         int             return_status;
1155         unsigned long   wait_reset;
1156         struct qla_hw_data *ha = vha->hw;
1157         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1158
1159         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1160         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1161             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1162             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1163             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1164
1165                 msleep(1000);
1166
1167                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1168                     ha->flags.chip_reset_done)
1169                         break;
1170         }
1171         if (ha->flags.chip_reset_done)
1172                 return_status = QLA_SUCCESS;
1173         else
1174                 return_status = QLA_FUNCTION_FAILED;
1175
1176         return return_status;
1177 }
1178
1179 static int
1180 sp_get(struct srb *sp)
1181 {
1182         if (!refcount_inc_not_zero((refcount_t *)&sp->ref_count))
1183                 /* kref get fail */
1184                 return ENXIO;
1185         else
1186                 return 0;
1187 }
1188
1189 #define ISP_REG_DISCONNECT 0xffffffffU
1190 /**************************************************************************
1191 * qla2x00_isp_reg_stat
1192 *
1193 * Description:
1194 *       Read the host status register of ISP before aborting the command.
1195 *
1196 * Input:
1197 *       ha = pointer to host adapter structure.
1198 *
1199 *
1200 * Returns:
1201 *       Either true or false.
1202 *
1203 * Note: Return true if there is register disconnect.
1204 **************************************************************************/
1205 static inline
1206 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1207 {
1208         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1209         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1210
1211         if (IS_P3P_TYPE(ha))
1212                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1213         else
1214                 return ((RD_REG_DWORD(&reg->host_status)) ==
1215                         ISP_REG_DISCONNECT);
1216 }
1217
1218 /**************************************************************************
1219 * qla2xxx_eh_abort
1220 *
1221 * Description:
1222 *    The abort function will abort the specified command.
1223 *
1224 * Input:
1225 *    cmd = Linux SCSI command packet to be aborted.
1226 *
1227 * Returns:
1228 *    Either SUCCESS or FAILED.
1229 *
1230 * Note:
1231 *    Only return FAILED if command not returned by firmware.
1232 **************************************************************************/
1233 static int
1234 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1235 {
1236         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1237         DECLARE_COMPLETION_ONSTACK(comp);
1238         srb_t *sp;
1239         int ret;
1240         unsigned int id;
1241         uint64_t lun;
1242         int rval;
1243         struct qla_hw_data *ha = vha->hw;
1244
1245         if (qla2x00_isp_reg_stat(ha)) {
1246                 ql_log(ql_log_info, vha, 0x8042,
1247                     "PCI/Register disconnect, exiting.\n");
1248                 return FAILED;
1249         }
1250
1251         ret = fc_block_scsi_eh(cmd);
1252         if (ret != 0)
1253                 return ret;
1254
1255         sp = scsi_cmd_priv(cmd);
1256
1257         if (sp->fcport && sp->fcport->deleted)
1258                 return SUCCESS;
1259
1260         /* Return if the command has already finished. */
1261         if (sp_get(sp))
1262                 return SUCCESS;
1263
1264         id = cmd->device->id;
1265         lun = cmd->device->lun;
1266
1267         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1268             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1269             vha->host_no, id, lun, sp, cmd, sp->handle);
1270
1271         rval = ha->isp_ops->abort_command(sp);
1272         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1273                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1274
1275         switch (rval) {
1276         case QLA_SUCCESS:
1277                 /*
1278                  * The command has been aborted. That means that the firmware
1279                  * won't report a completion.
1280                  */
1281                 sp->done(sp, DID_ABORT << 16);
1282                 ret = SUCCESS;
1283                 break;
1284         case QLA_FUNCTION_PARAMETER_ERROR: {
1285                 /* Wait for the command completion. */
1286                 uint32_t ratov = ha->r_a_tov/10;
1287                 uint32_t ratov_j = msecs_to_jiffies(4 * ratov * 1000);
1288
1289                 WARN_ON_ONCE(sp->comp);
1290                 sp->comp = &comp;
1291                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1292                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1293                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1294                             __func__, ha->r_a_tov);
1295                         ret = FAILED;
1296                 } else {
1297                         ret = SUCCESS;
1298                 }
1299                 break;
1300         }
1301         default:
1302                 /*
1303                  * Either abort failed or abort and completion raced. Let
1304                  * the SCSI core retry the abort in the former case.
1305                  */
1306                 ret = FAILED;
1307                 break;
1308         }
1309
1310         sp->comp = NULL;
1311         atomic_dec(&sp->ref_count);
1312         ql_log(ql_log_info, vha, 0x801c,
1313             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1314             vha->host_no, id, lun, ret);
1315
1316         return ret;
1317 }
1318
1319 /*
1320  * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1321  */
1322 int
1323 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1324         uint64_t l, enum nexus_wait_type type)
1325 {
1326         int cnt, match, status;
1327         unsigned long flags;
1328         struct qla_hw_data *ha = vha->hw;
1329         struct req_que *req;
1330         srb_t *sp;
1331         struct scsi_cmnd *cmd;
1332
1333         status = QLA_SUCCESS;
1334
1335         spin_lock_irqsave(&ha->hardware_lock, flags);
1336         req = vha->req;
1337         for (cnt = 1; status == QLA_SUCCESS &&
1338                 cnt < req->num_outstanding_cmds; cnt++) {
1339                 sp = req->outstanding_cmds[cnt];
1340                 if (!sp)
1341                         continue;
1342                 if (sp->type != SRB_SCSI_CMD)
1343                         continue;
1344                 if (vha->vp_idx != sp->vha->vp_idx)
1345                         continue;
1346                 match = 0;
1347                 cmd = GET_CMD_SP(sp);
1348                 switch (type) {
1349                 case WAIT_HOST:
1350                         match = 1;
1351                         break;
1352                 case WAIT_TARGET:
1353                         match = cmd->device->id == t;
1354                         break;
1355                 case WAIT_LUN:
1356                         match = (cmd->device->id == t &&
1357                                 cmd->device->lun == l);
1358                         break;
1359                 }
1360                 if (!match)
1361                         continue;
1362
1363                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1364                 status = qla2x00_eh_wait_on_command(cmd);
1365                 spin_lock_irqsave(&ha->hardware_lock, flags);
1366         }
1367         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1368
1369         return status;
1370 }
1371
1372 static char *reset_errors[] = {
1373         "HBA not online",
1374         "HBA not ready",
1375         "Task management failed",
1376         "Waiting for command completions",
1377 };
1378
1379 static int
1380 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1381     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1382 {
1383         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1384         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1385         int err;
1386
1387         if (!fcport) {
1388                 return FAILED;
1389         }
1390
1391         err = fc_block_scsi_eh(cmd);
1392         if (err != 0)
1393                 return err;
1394
1395         if (fcport->deleted)
1396                 return SUCCESS;
1397
1398         ql_log(ql_log_info, vha, 0x8009,
1399             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1400             cmd->device->id, cmd->device->lun, cmd);
1401
1402         err = 0;
1403         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1404                 ql_log(ql_log_warn, vha, 0x800a,
1405                     "Wait for hba online failed for cmd=%p.\n", cmd);
1406                 goto eh_reset_failed;
1407         }
1408         err = 2;
1409         if (do_reset(fcport, cmd->device->lun, 1)
1410                 != QLA_SUCCESS) {
1411                 ql_log(ql_log_warn, vha, 0x800c,
1412                     "do_reset failed for cmd=%p.\n", cmd);
1413                 goto eh_reset_failed;
1414         }
1415         err = 3;
1416         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1417             cmd->device->lun, type) != QLA_SUCCESS) {
1418                 ql_log(ql_log_warn, vha, 0x800d,
1419                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1420                 goto eh_reset_failed;
1421         }
1422
1423         ql_log(ql_log_info, vha, 0x800e,
1424             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1425             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1426
1427         return SUCCESS;
1428
1429 eh_reset_failed:
1430         ql_log(ql_log_info, vha, 0x800f,
1431             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1432             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1433             cmd);
1434         return FAILED;
1435 }
1436
1437 static int
1438 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1439 {
1440         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1441         struct qla_hw_data *ha = vha->hw;
1442
1443         if (qla2x00_isp_reg_stat(ha)) {
1444                 ql_log(ql_log_info, vha, 0x803e,
1445                     "PCI/Register disconnect, exiting.\n");
1446                 return FAILED;
1447         }
1448
1449         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1450             ha->isp_ops->lun_reset);
1451 }
1452
1453 static int
1454 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1455 {
1456         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1457         struct qla_hw_data *ha = vha->hw;
1458
1459         if (qla2x00_isp_reg_stat(ha)) {
1460                 ql_log(ql_log_info, vha, 0x803f,
1461                     "PCI/Register disconnect, exiting.\n");
1462                 return FAILED;
1463         }
1464
1465         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1466             ha->isp_ops->target_reset);
1467 }
1468
1469 /**************************************************************************
1470 * qla2xxx_eh_bus_reset
1471 *
1472 * Description:
1473 *    The bus reset function will reset the bus and abort any executing
1474 *    commands.
1475 *
1476 * Input:
1477 *    cmd = Linux SCSI command packet of the command that cause the
1478 *          bus reset.
1479 *
1480 * Returns:
1481 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1482 *
1483 **************************************************************************/
1484 static int
1485 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1486 {
1487         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1488         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1489         int ret = FAILED;
1490         unsigned int id;
1491         uint64_t lun;
1492         struct qla_hw_data *ha = vha->hw;
1493
1494         if (qla2x00_isp_reg_stat(ha)) {
1495                 ql_log(ql_log_info, vha, 0x8040,
1496                     "PCI/Register disconnect, exiting.\n");
1497                 return FAILED;
1498         }
1499
1500         id = cmd->device->id;
1501         lun = cmd->device->lun;
1502
1503         if (!fcport) {
1504                 return ret;
1505         }
1506
1507         ret = fc_block_scsi_eh(cmd);
1508         if (ret != 0)
1509                 return ret;
1510         ret = FAILED;
1511
1512         if (qla2x00_chip_is_down(vha))
1513                 return ret;
1514
1515         ql_log(ql_log_info, vha, 0x8012,
1516             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1517
1518         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1519                 ql_log(ql_log_fatal, vha, 0x8013,
1520                     "Wait for hba online failed board disabled.\n");
1521                 goto eh_bus_reset_done;
1522         }
1523
1524         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1525                 ret = SUCCESS;
1526
1527         if (ret == FAILED)
1528                 goto eh_bus_reset_done;
1529
1530         /* Flush outstanding commands. */
1531         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1532             QLA_SUCCESS) {
1533                 ql_log(ql_log_warn, vha, 0x8014,
1534                     "Wait for pending commands failed.\n");
1535                 ret = FAILED;
1536         }
1537
1538 eh_bus_reset_done:
1539         ql_log(ql_log_warn, vha, 0x802b,
1540             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1541             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1542
1543         return ret;
1544 }
1545
1546 /**************************************************************************
1547 * qla2xxx_eh_host_reset
1548 *
1549 * Description:
1550 *    The reset function will reset the Adapter.
1551 *
1552 * Input:
1553 *      cmd = Linux SCSI command packet of the command that cause the
1554 *            adapter reset.
1555 *
1556 * Returns:
1557 *      Either SUCCESS or FAILED.
1558 *
1559 * Note:
1560 **************************************************************************/
1561 static int
1562 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1563 {
1564         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1565         struct qla_hw_data *ha = vha->hw;
1566         int ret = FAILED;
1567         unsigned int id;
1568         uint64_t lun;
1569         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1570
1571         if (qla2x00_isp_reg_stat(ha)) {
1572                 ql_log(ql_log_info, vha, 0x8041,
1573                     "PCI/Register disconnect, exiting.\n");
1574                 schedule_work(&ha->board_disable);
1575                 return SUCCESS;
1576         }
1577
1578         id = cmd->device->id;
1579         lun = cmd->device->lun;
1580
1581         ql_log(ql_log_info, vha, 0x8018,
1582             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1583
1584         /*
1585          * No point in issuing another reset if one is active.  Also do not
1586          * attempt a reset if we are updating flash.
1587          */
1588         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1589                 goto eh_host_reset_lock;
1590
1591         if (vha != base_vha) {
1592                 if (qla2x00_vp_abort_isp(vha))
1593                         goto eh_host_reset_lock;
1594         } else {
1595                 if (IS_P3P_TYPE(vha->hw)) {
1596                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1597                                 /* Ctx reset success */
1598                                 ret = SUCCESS;
1599                                 goto eh_host_reset_lock;
1600                         }
1601                         /* fall thru if ctx reset failed */
1602                 }
1603                 if (ha->wq)
1604                         flush_workqueue(ha->wq);
1605
1606                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1607                 if (ha->isp_ops->abort_isp(base_vha)) {
1608                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1609                         /* failed. schedule dpc to try */
1610                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1611
1612                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1613                                 ql_log(ql_log_warn, vha, 0x802a,
1614                                     "wait for hba online failed.\n");
1615                                 goto eh_host_reset_lock;
1616                         }
1617                 }
1618                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1619         }
1620
1621         /* Waiting for command to be returned to OS.*/
1622         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1623                 QLA_SUCCESS)
1624                 ret = SUCCESS;
1625
1626 eh_host_reset_lock:
1627         ql_log(ql_log_info, vha, 0x8017,
1628             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1629             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1630
1631         return ret;
1632 }
1633
1634 /*
1635 * qla2x00_loop_reset
1636 *      Issue loop reset.
1637 *
1638 * Input:
1639 *      ha = adapter block pointer.
1640 *
1641 * Returns:
1642 *      0 = success
1643 */
1644 int
1645 qla2x00_loop_reset(scsi_qla_host_t *vha)
1646 {
1647         int ret;
1648         struct fc_port *fcport;
1649         struct qla_hw_data *ha = vha->hw;
1650
1651         if (IS_QLAFX00(ha)) {
1652                 return qlafx00_loop_reset(vha);
1653         }
1654
1655         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1656                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1657                         if (fcport->port_type != FCT_TARGET)
1658                                 continue;
1659
1660                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1661                         if (ret != QLA_SUCCESS) {
1662                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1663                                     "Bus Reset failed: Reset=%d "
1664                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1665                         }
1666                 }
1667         }
1668
1669
1670         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1671                 atomic_set(&vha->loop_state, LOOP_DOWN);
1672                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1673                 qla2x00_mark_all_devices_lost(vha, 0);
1674                 ret = qla2x00_full_login_lip(vha);
1675                 if (ret != QLA_SUCCESS) {
1676                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1677                             "full_login_lip=%d.\n", ret);
1678                 }
1679         }
1680
1681         if (ha->flags.enable_lip_reset) {
1682                 ret = qla2x00_lip_reset(vha);
1683                 if (ret != QLA_SUCCESS)
1684                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1685                             "lip_reset failed (%d).\n", ret);
1686         }
1687
1688         /* Issue marker command only when we are going to start the I/O */
1689         vha->marker_needed = 1;
1690
1691         return QLA_SUCCESS;
1692 }
1693
1694 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1695                               unsigned long *flags)
1696         __releases(qp->qp_lock_ptr)
1697         __acquires(qp->qp_lock_ptr)
1698 {
1699         DECLARE_COMPLETION_ONSTACK(comp);
1700         scsi_qla_host_t *vha = qp->vha;
1701         struct qla_hw_data *ha = vha->hw;
1702         int rval;
1703
1704         if (sp_get(sp))
1705                 return;
1706
1707         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1708             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1709              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1710              !qla2x00_isp_reg_stat(ha))) {
1711                 sp->comp = &comp;
1712                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1713                 rval = ha->isp_ops->abort_command(sp);
1714
1715                 switch (rval) {
1716                 case QLA_SUCCESS:
1717                         sp->done(sp, res);
1718                         break;
1719                 case QLA_FUNCTION_PARAMETER_ERROR:
1720                         wait_for_completion(&comp);
1721                         break;
1722                 }
1723
1724                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1725                 sp->comp = NULL;
1726         }
1727
1728         atomic_dec(&sp->ref_count);
1729 }
1730
1731 static void
1732 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1733 {
1734         int cnt;
1735         unsigned long flags;
1736         srb_t *sp;
1737         scsi_qla_host_t *vha = qp->vha;
1738         struct qla_hw_data *ha = vha->hw;
1739         struct req_que *req;
1740         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1741         struct qla_tgt_cmd *cmd;
1742
1743         if (!ha->req_q_map)
1744                 return;
1745         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1746         req = qp->req;
1747         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1748                 sp = req->outstanding_cmds[cnt];
1749                 if (sp) {
1750                         req->outstanding_cmds[cnt] = NULL;
1751                         switch (sp->cmd_type) {
1752                         case TYPE_SRB:
1753                                 qla2x00_abort_srb(qp, sp, res, &flags);
1754                                 break;
1755                         case TYPE_TGT_CMD:
1756                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1757                                     qla_ini_mode_enabled(vha)) {
1758                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1759                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1760                                             vha->dpc_flags);
1761                                         continue;
1762                                 }
1763                                 cmd = (struct qla_tgt_cmd *)sp;
1764                                 cmd->aborted = 1;
1765                                 break;
1766                         case TYPE_TGT_TMCMD:
1767                                 /* Skip task management functions. */
1768                                 break;
1769                         default:
1770                                 break;
1771                         }
1772                 }
1773         }
1774         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1775 }
1776
1777 void
1778 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1779 {
1780         int que;
1781         struct qla_hw_data *ha = vha->hw;
1782
1783         /* Continue only if initialization complete. */
1784         if (!ha->base_qpair)
1785                 return;
1786         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1787
1788         if (!ha->queue_pair_map)
1789                 return;
1790         for (que = 0; que < ha->max_qpairs; que++) {
1791                 if (!ha->queue_pair_map[que])
1792                         continue;
1793
1794                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1795         }
1796 }
1797
1798 static int
1799 qla2xxx_slave_alloc(struct scsi_device *sdev)
1800 {
1801         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1802
1803         if (!rport || fc_remote_port_chkready(rport))
1804                 return -ENXIO;
1805
1806         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1807
1808         return 0;
1809 }
1810
1811 static int
1812 qla2xxx_slave_configure(struct scsi_device *sdev)
1813 {
1814         scsi_qla_host_t *vha = shost_priv(sdev->host);
1815         struct req_que *req = vha->req;
1816
1817         if (IS_T10_PI_CAPABLE(vha->hw))
1818                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1819
1820         scsi_change_queue_depth(sdev, req->max_q_depth);
1821         return 0;
1822 }
1823
1824 static void
1825 qla2xxx_slave_destroy(struct scsi_device *sdev)
1826 {
1827         sdev->hostdata = NULL;
1828 }
1829
1830 /**
1831  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1832  * @ha: HA context
1833  *
1834  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1835  * supported addressing method.
1836  */
1837 static void
1838 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1839 {
1840         /* Assume a 32bit DMA mask. */
1841         ha->flags.enable_64bit_addressing = 0;
1842
1843         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1844                 /* Any upper-dword bits set? */
1845                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1846                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1847                         /* Ok, a 64bit DMA mask is applicable. */
1848                         ha->flags.enable_64bit_addressing = 1;
1849                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1850                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1851                         return;
1852                 }
1853         }
1854
1855         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1856         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1857 }
1858
1859 static void
1860 qla2x00_enable_intrs(struct qla_hw_data *ha)
1861 {
1862         unsigned long flags = 0;
1863         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1864
1865         spin_lock_irqsave(&ha->hardware_lock, flags);
1866         ha->interrupts_on = 1;
1867         /* enable risc and host interrupts */
1868         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1869         RD_REG_WORD(&reg->ictrl);
1870         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1871
1872 }
1873
1874 static void
1875 qla2x00_disable_intrs(struct qla_hw_data *ha)
1876 {
1877         unsigned long flags = 0;
1878         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1879
1880         spin_lock_irqsave(&ha->hardware_lock, flags);
1881         ha->interrupts_on = 0;
1882         /* disable risc and host interrupts */
1883         WRT_REG_WORD(&reg->ictrl, 0);
1884         RD_REG_WORD(&reg->ictrl);
1885         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1886 }
1887
1888 static void
1889 qla24xx_enable_intrs(struct qla_hw_data *ha)
1890 {
1891         unsigned long flags = 0;
1892         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1893
1894         spin_lock_irqsave(&ha->hardware_lock, flags);
1895         ha->interrupts_on = 1;
1896         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1897         RD_REG_DWORD(&reg->ictrl);
1898         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1899 }
1900
1901 static void
1902 qla24xx_disable_intrs(struct qla_hw_data *ha)
1903 {
1904         unsigned long flags = 0;
1905         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1906
1907         if (IS_NOPOLLING_TYPE(ha))
1908                 return;
1909         spin_lock_irqsave(&ha->hardware_lock, flags);
1910         ha->interrupts_on = 0;
1911         WRT_REG_DWORD(&reg->ictrl, 0);
1912         RD_REG_DWORD(&reg->ictrl);
1913         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1914 }
1915
1916 static int
1917 qla2x00_iospace_config(struct qla_hw_data *ha)
1918 {
1919         resource_size_t pio;
1920         uint16_t msix;
1921
1922         if (pci_request_selected_regions(ha->pdev, ha->bars,
1923             QLA2XXX_DRIVER_NAME)) {
1924                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1925                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1926                     pci_name(ha->pdev));
1927                 goto iospace_error_exit;
1928         }
1929         if (!(ha->bars & 1))
1930                 goto skip_pio;
1931
1932         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1933         pio = pci_resource_start(ha->pdev, 0);
1934         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1935                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1936                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1937                             "Invalid pci I/O region size (%s).\n",
1938                             pci_name(ha->pdev));
1939                         pio = 0;
1940                 }
1941         } else {
1942                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1943                     "Region #0 no a PIO resource (%s).\n",
1944                     pci_name(ha->pdev));
1945                 pio = 0;
1946         }
1947         ha->pio_address = pio;
1948         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1949             "PIO address=%llu.\n",
1950             (unsigned long long)ha->pio_address);
1951
1952 skip_pio:
1953         /* Use MMIO operations for all accesses. */
1954         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1955                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1956                     "Region #1 not an MMIO resource (%s), aborting.\n",
1957                     pci_name(ha->pdev));
1958                 goto iospace_error_exit;
1959         }
1960         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1961                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1962                     "Invalid PCI mem region size (%s), aborting.\n",
1963                     pci_name(ha->pdev));
1964                 goto iospace_error_exit;
1965         }
1966
1967         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1968         if (!ha->iobase) {
1969                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1970                     "Cannot remap MMIO (%s), aborting.\n",
1971                     pci_name(ha->pdev));
1972                 goto iospace_error_exit;
1973         }
1974
1975         /* Determine queue resources */
1976         ha->max_req_queues = ha->max_rsp_queues = 1;
1977         ha->msix_count = QLA_BASE_VECTORS;
1978         if (!ql2xmqsupport || !ql2xnvmeenable ||
1979             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1980                 goto mqiobase_exit;
1981
1982         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1983                         pci_resource_len(ha->pdev, 3));
1984         if (ha->mqiobase) {
1985                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1986                     "MQIO Base=%p.\n", ha->mqiobase);
1987                 /* Read MSIX vector size of the board */
1988                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1989                 ha->msix_count = msix + 1;
1990                 /* Max queues are bounded by available msix vectors */
1991                 /* MB interrupt uses 1 vector */
1992                 ha->max_req_queues = ha->msix_count - 1;
1993                 ha->max_rsp_queues = ha->max_req_queues;
1994                 /* Queue pairs is the max value minus the base queue pair */
1995                 ha->max_qpairs = ha->max_rsp_queues - 1;
1996                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1997                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
1998
1999                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2000                     "MSI-X vector count: %d.\n", ha->msix_count);
2001         } else
2002                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2003                     "BAR 3 not enabled.\n");
2004
2005 mqiobase_exit:
2006         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2007             "MSIX Count: %d.\n", ha->msix_count);
2008         return (0);
2009
2010 iospace_error_exit:
2011         return (-ENOMEM);
2012 }
2013
2014
2015 static int
2016 qla83xx_iospace_config(struct qla_hw_data *ha)
2017 {
2018         uint16_t msix;
2019
2020         if (pci_request_selected_regions(ha->pdev, ha->bars,
2021             QLA2XXX_DRIVER_NAME)) {
2022                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2023                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2024                     pci_name(ha->pdev));
2025
2026                 goto iospace_error_exit;
2027         }
2028
2029         /* Use MMIO operations for all accesses. */
2030         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2031                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2032                     "Invalid pci I/O region size (%s).\n",
2033                     pci_name(ha->pdev));
2034                 goto iospace_error_exit;
2035         }
2036         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2037                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2038                     "Invalid PCI mem region size (%s), aborting\n",
2039                         pci_name(ha->pdev));
2040                 goto iospace_error_exit;
2041         }
2042
2043         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2044         if (!ha->iobase) {
2045                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2046                     "Cannot remap MMIO (%s), aborting.\n",
2047                     pci_name(ha->pdev));
2048                 goto iospace_error_exit;
2049         }
2050
2051         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2052         /* 83XX 26XX always use MQ type access for queues
2053          * - mbar 2, a.k.a region 4 */
2054         ha->max_req_queues = ha->max_rsp_queues = 1;
2055         ha->msix_count = QLA_BASE_VECTORS;
2056         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2057                         pci_resource_len(ha->pdev, 4));
2058
2059         if (!ha->mqiobase) {
2060                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2061                     "BAR2/region4 not enabled\n");
2062                 goto mqiobase_exit;
2063         }
2064
2065         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2066                         pci_resource_len(ha->pdev, 2));
2067         if (ha->msixbase) {
2068                 /* Read MSIX vector size of the board */
2069                 pci_read_config_word(ha->pdev,
2070                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2071                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2072                 /*
2073                  * By default, driver uses at least two msix vectors
2074                  * (default & rspq)
2075                  */
2076                 if (ql2xmqsupport || ql2xnvmeenable) {
2077                         /* MB interrupt uses 1 vector */
2078                         ha->max_req_queues = ha->msix_count - 1;
2079
2080                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2081                         if (QLA_TGT_MODE_ENABLED())
2082                                 ha->max_req_queues--;
2083
2084                         ha->max_rsp_queues = ha->max_req_queues;
2085
2086                         /* Queue pairs is the max value minus
2087                          * the base queue pair */
2088                         ha->max_qpairs = ha->max_req_queues - 1;
2089                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2090                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2091                 }
2092                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2093                     "MSI-X vector count: %d.\n", ha->msix_count);
2094         } else
2095                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2096                     "BAR 1 not enabled.\n");
2097
2098 mqiobase_exit:
2099         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2100             "MSIX Count: %d.\n", ha->msix_count);
2101         return 0;
2102
2103 iospace_error_exit:
2104         return -ENOMEM;
2105 }
2106
2107 static struct isp_operations qla2100_isp_ops = {
2108         .pci_config             = qla2100_pci_config,
2109         .reset_chip             = qla2x00_reset_chip,
2110         .chip_diag              = qla2x00_chip_diag,
2111         .config_rings           = qla2x00_config_rings,
2112         .reset_adapter          = qla2x00_reset_adapter,
2113         .nvram_config           = qla2x00_nvram_config,
2114         .update_fw_options      = qla2x00_update_fw_options,
2115         .load_risc              = qla2x00_load_risc,
2116         .pci_info_str           = qla2x00_pci_info_str,
2117         .fw_version_str         = qla2x00_fw_version_str,
2118         .intr_handler           = qla2100_intr_handler,
2119         .enable_intrs           = qla2x00_enable_intrs,
2120         .disable_intrs          = qla2x00_disable_intrs,
2121         .abort_command          = qla2x00_abort_command,
2122         .target_reset           = qla2x00_abort_target,
2123         .lun_reset              = qla2x00_lun_reset,
2124         .fabric_login           = qla2x00_login_fabric,
2125         .fabric_logout          = qla2x00_fabric_logout,
2126         .calc_req_entries       = qla2x00_calc_iocbs_32,
2127         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2128         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2129         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2130         .read_nvram             = qla2x00_read_nvram_data,
2131         .write_nvram            = qla2x00_write_nvram_data,
2132         .fw_dump                = qla2100_fw_dump,
2133         .beacon_on              = NULL,
2134         .beacon_off             = NULL,
2135         .beacon_blink           = NULL,
2136         .read_optrom            = qla2x00_read_optrom_data,
2137         .write_optrom           = qla2x00_write_optrom_data,
2138         .get_flash_version      = qla2x00_get_flash_version,
2139         .start_scsi             = qla2x00_start_scsi,
2140         .start_scsi_mq          = NULL,
2141         .abort_isp              = qla2x00_abort_isp,
2142         .iospace_config         = qla2x00_iospace_config,
2143         .initialize_adapter     = qla2x00_initialize_adapter,
2144 };
2145
2146 static struct isp_operations qla2300_isp_ops = {
2147         .pci_config             = qla2300_pci_config,
2148         .reset_chip             = qla2x00_reset_chip,
2149         .chip_diag              = qla2x00_chip_diag,
2150         .config_rings           = qla2x00_config_rings,
2151         .reset_adapter          = qla2x00_reset_adapter,
2152         .nvram_config           = qla2x00_nvram_config,
2153         .update_fw_options      = qla2x00_update_fw_options,
2154         .load_risc              = qla2x00_load_risc,
2155         .pci_info_str           = qla2x00_pci_info_str,
2156         .fw_version_str         = qla2x00_fw_version_str,
2157         .intr_handler           = qla2300_intr_handler,
2158         .enable_intrs           = qla2x00_enable_intrs,
2159         .disable_intrs          = qla2x00_disable_intrs,
2160         .abort_command          = qla2x00_abort_command,
2161         .target_reset           = qla2x00_abort_target,
2162         .lun_reset              = qla2x00_lun_reset,
2163         .fabric_login           = qla2x00_login_fabric,
2164         .fabric_logout          = qla2x00_fabric_logout,
2165         .calc_req_entries       = qla2x00_calc_iocbs_32,
2166         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2167         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2168         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2169         .read_nvram             = qla2x00_read_nvram_data,
2170         .write_nvram            = qla2x00_write_nvram_data,
2171         .fw_dump                = qla2300_fw_dump,
2172         .beacon_on              = qla2x00_beacon_on,
2173         .beacon_off             = qla2x00_beacon_off,
2174         .beacon_blink           = qla2x00_beacon_blink,
2175         .read_optrom            = qla2x00_read_optrom_data,
2176         .write_optrom           = qla2x00_write_optrom_data,
2177         .get_flash_version      = qla2x00_get_flash_version,
2178         .start_scsi             = qla2x00_start_scsi,
2179         .start_scsi_mq          = NULL,
2180         .abort_isp              = qla2x00_abort_isp,
2181         .iospace_config         = qla2x00_iospace_config,
2182         .initialize_adapter     = qla2x00_initialize_adapter,
2183 };
2184
2185 static struct isp_operations qla24xx_isp_ops = {
2186         .pci_config             = qla24xx_pci_config,
2187         .reset_chip             = qla24xx_reset_chip,
2188         .chip_diag              = qla24xx_chip_diag,
2189         .config_rings           = qla24xx_config_rings,
2190         .reset_adapter          = qla24xx_reset_adapter,
2191         .nvram_config           = qla24xx_nvram_config,
2192         .update_fw_options      = qla24xx_update_fw_options,
2193         .load_risc              = qla24xx_load_risc,
2194         .pci_info_str           = qla24xx_pci_info_str,
2195         .fw_version_str         = qla24xx_fw_version_str,
2196         .intr_handler           = qla24xx_intr_handler,
2197         .enable_intrs           = qla24xx_enable_intrs,
2198         .disable_intrs          = qla24xx_disable_intrs,
2199         .abort_command          = qla24xx_abort_command,
2200         .target_reset           = qla24xx_abort_target,
2201         .lun_reset              = qla24xx_lun_reset,
2202         .fabric_login           = qla24xx_login_fabric,
2203         .fabric_logout          = qla24xx_fabric_logout,
2204         .calc_req_entries       = NULL,
2205         .build_iocbs            = NULL,
2206         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2207         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2208         .read_nvram             = qla24xx_read_nvram_data,
2209         .write_nvram            = qla24xx_write_nvram_data,
2210         .fw_dump                = qla24xx_fw_dump,
2211         .beacon_on              = qla24xx_beacon_on,
2212         .beacon_off             = qla24xx_beacon_off,
2213         .beacon_blink           = qla24xx_beacon_blink,
2214         .read_optrom            = qla24xx_read_optrom_data,
2215         .write_optrom           = qla24xx_write_optrom_data,
2216         .get_flash_version      = qla24xx_get_flash_version,
2217         .start_scsi             = qla24xx_start_scsi,
2218         .start_scsi_mq          = NULL,
2219         .abort_isp              = qla2x00_abort_isp,
2220         .iospace_config         = qla2x00_iospace_config,
2221         .initialize_adapter     = qla2x00_initialize_adapter,
2222 };
2223
2224 static struct isp_operations qla25xx_isp_ops = {
2225         .pci_config             = qla25xx_pci_config,
2226         .reset_chip             = qla24xx_reset_chip,
2227         .chip_diag              = qla24xx_chip_diag,
2228         .config_rings           = qla24xx_config_rings,
2229         .reset_adapter          = qla24xx_reset_adapter,
2230         .nvram_config           = qla24xx_nvram_config,
2231         .update_fw_options      = qla24xx_update_fw_options,
2232         .load_risc              = qla24xx_load_risc,
2233         .pci_info_str           = qla24xx_pci_info_str,
2234         .fw_version_str         = qla24xx_fw_version_str,
2235         .intr_handler           = qla24xx_intr_handler,
2236         .enable_intrs           = qla24xx_enable_intrs,
2237         .disable_intrs          = qla24xx_disable_intrs,
2238         .abort_command          = qla24xx_abort_command,
2239         .target_reset           = qla24xx_abort_target,
2240         .lun_reset              = qla24xx_lun_reset,
2241         .fabric_login           = qla24xx_login_fabric,
2242         .fabric_logout          = qla24xx_fabric_logout,
2243         .calc_req_entries       = NULL,
2244         .build_iocbs            = NULL,
2245         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2246         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2247         .read_nvram             = qla25xx_read_nvram_data,
2248         .write_nvram            = qla25xx_write_nvram_data,
2249         .fw_dump                = qla25xx_fw_dump,
2250         .beacon_on              = qla24xx_beacon_on,
2251         .beacon_off             = qla24xx_beacon_off,
2252         .beacon_blink           = qla24xx_beacon_blink,
2253         .read_optrom            = qla25xx_read_optrom_data,
2254         .write_optrom           = qla24xx_write_optrom_data,
2255         .get_flash_version      = qla24xx_get_flash_version,
2256         .start_scsi             = qla24xx_dif_start_scsi,
2257         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2258         .abort_isp              = qla2x00_abort_isp,
2259         .iospace_config         = qla2x00_iospace_config,
2260         .initialize_adapter     = qla2x00_initialize_adapter,
2261 };
2262
2263 static struct isp_operations qla81xx_isp_ops = {
2264         .pci_config             = qla25xx_pci_config,
2265         .reset_chip             = qla24xx_reset_chip,
2266         .chip_diag              = qla24xx_chip_diag,
2267         .config_rings           = qla24xx_config_rings,
2268         .reset_adapter          = qla24xx_reset_adapter,
2269         .nvram_config           = qla81xx_nvram_config,
2270         .update_fw_options      = qla81xx_update_fw_options,
2271         .load_risc              = qla81xx_load_risc,
2272         .pci_info_str           = qla24xx_pci_info_str,
2273         .fw_version_str         = qla24xx_fw_version_str,
2274         .intr_handler           = qla24xx_intr_handler,
2275         .enable_intrs           = qla24xx_enable_intrs,
2276         .disable_intrs          = qla24xx_disable_intrs,
2277         .abort_command          = qla24xx_abort_command,
2278         .target_reset           = qla24xx_abort_target,
2279         .lun_reset              = qla24xx_lun_reset,
2280         .fabric_login           = qla24xx_login_fabric,
2281         .fabric_logout          = qla24xx_fabric_logout,
2282         .calc_req_entries       = NULL,
2283         .build_iocbs            = NULL,
2284         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2285         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2286         .read_nvram             = NULL,
2287         .write_nvram            = NULL,
2288         .fw_dump                = qla81xx_fw_dump,
2289         .beacon_on              = qla24xx_beacon_on,
2290         .beacon_off             = qla24xx_beacon_off,
2291         .beacon_blink           = qla83xx_beacon_blink,
2292         .read_optrom            = qla25xx_read_optrom_data,
2293         .write_optrom           = qla24xx_write_optrom_data,
2294         .get_flash_version      = qla24xx_get_flash_version,
2295         .start_scsi             = qla24xx_dif_start_scsi,
2296         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2297         .abort_isp              = qla2x00_abort_isp,
2298         .iospace_config         = qla2x00_iospace_config,
2299         .initialize_adapter     = qla2x00_initialize_adapter,
2300 };
2301
2302 static struct isp_operations qla82xx_isp_ops = {
2303         .pci_config             = qla82xx_pci_config,
2304         .reset_chip             = qla82xx_reset_chip,
2305         .chip_diag              = qla24xx_chip_diag,
2306         .config_rings           = qla82xx_config_rings,
2307         .reset_adapter          = qla24xx_reset_adapter,
2308         .nvram_config           = qla81xx_nvram_config,
2309         .update_fw_options      = qla24xx_update_fw_options,
2310         .load_risc              = qla82xx_load_risc,
2311         .pci_info_str           = qla24xx_pci_info_str,
2312         .fw_version_str         = qla24xx_fw_version_str,
2313         .intr_handler           = qla82xx_intr_handler,
2314         .enable_intrs           = qla82xx_enable_intrs,
2315         .disable_intrs          = qla82xx_disable_intrs,
2316         .abort_command          = qla24xx_abort_command,
2317         .target_reset           = qla24xx_abort_target,
2318         .lun_reset              = qla24xx_lun_reset,
2319         .fabric_login           = qla24xx_login_fabric,
2320         .fabric_logout          = qla24xx_fabric_logout,
2321         .calc_req_entries       = NULL,
2322         .build_iocbs            = NULL,
2323         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2324         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2325         .read_nvram             = qla24xx_read_nvram_data,
2326         .write_nvram            = qla24xx_write_nvram_data,
2327         .fw_dump                = qla82xx_fw_dump,
2328         .beacon_on              = qla82xx_beacon_on,
2329         .beacon_off             = qla82xx_beacon_off,
2330         .beacon_blink           = NULL,
2331         .read_optrom            = qla82xx_read_optrom_data,
2332         .write_optrom           = qla82xx_write_optrom_data,
2333         .get_flash_version      = qla82xx_get_flash_version,
2334         .start_scsi             = qla82xx_start_scsi,
2335         .start_scsi_mq          = NULL,
2336         .abort_isp              = qla82xx_abort_isp,
2337         .iospace_config         = qla82xx_iospace_config,
2338         .initialize_adapter     = qla2x00_initialize_adapter,
2339 };
2340
2341 static struct isp_operations qla8044_isp_ops = {
2342         .pci_config             = qla82xx_pci_config,
2343         .reset_chip             = qla82xx_reset_chip,
2344         .chip_diag              = qla24xx_chip_diag,
2345         .config_rings           = qla82xx_config_rings,
2346         .reset_adapter          = qla24xx_reset_adapter,
2347         .nvram_config           = qla81xx_nvram_config,
2348         .update_fw_options      = qla24xx_update_fw_options,
2349         .load_risc              = qla82xx_load_risc,
2350         .pci_info_str           = qla24xx_pci_info_str,
2351         .fw_version_str         = qla24xx_fw_version_str,
2352         .intr_handler           = qla8044_intr_handler,
2353         .enable_intrs           = qla82xx_enable_intrs,
2354         .disable_intrs          = qla82xx_disable_intrs,
2355         .abort_command          = qla24xx_abort_command,
2356         .target_reset           = qla24xx_abort_target,
2357         .lun_reset              = qla24xx_lun_reset,
2358         .fabric_login           = qla24xx_login_fabric,
2359         .fabric_logout          = qla24xx_fabric_logout,
2360         .calc_req_entries       = NULL,
2361         .build_iocbs            = NULL,
2362         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2363         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2364         .read_nvram             = NULL,
2365         .write_nvram            = NULL,
2366         .fw_dump                = qla8044_fw_dump,
2367         .beacon_on              = qla82xx_beacon_on,
2368         .beacon_off             = qla82xx_beacon_off,
2369         .beacon_blink           = NULL,
2370         .read_optrom            = qla8044_read_optrom_data,
2371         .write_optrom           = qla8044_write_optrom_data,
2372         .get_flash_version      = qla82xx_get_flash_version,
2373         .start_scsi             = qla82xx_start_scsi,
2374         .start_scsi_mq          = NULL,
2375         .abort_isp              = qla8044_abort_isp,
2376         .iospace_config         = qla82xx_iospace_config,
2377         .initialize_adapter     = qla2x00_initialize_adapter,
2378 };
2379
2380 static struct isp_operations qla83xx_isp_ops = {
2381         .pci_config             = qla25xx_pci_config,
2382         .reset_chip             = qla24xx_reset_chip,
2383         .chip_diag              = qla24xx_chip_diag,
2384         .config_rings           = qla24xx_config_rings,
2385         .reset_adapter          = qla24xx_reset_adapter,
2386         .nvram_config           = qla81xx_nvram_config,
2387         .update_fw_options      = qla81xx_update_fw_options,
2388         .load_risc              = qla81xx_load_risc,
2389         .pci_info_str           = qla24xx_pci_info_str,
2390         .fw_version_str         = qla24xx_fw_version_str,
2391         .intr_handler           = qla24xx_intr_handler,
2392         .enable_intrs           = qla24xx_enable_intrs,
2393         .disable_intrs          = qla24xx_disable_intrs,
2394         .abort_command          = qla24xx_abort_command,
2395         .target_reset           = qla24xx_abort_target,
2396         .lun_reset              = qla24xx_lun_reset,
2397         .fabric_login           = qla24xx_login_fabric,
2398         .fabric_logout          = qla24xx_fabric_logout,
2399         .calc_req_entries       = NULL,
2400         .build_iocbs            = NULL,
2401         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2402         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2403         .read_nvram             = NULL,
2404         .write_nvram            = NULL,
2405         .fw_dump                = qla83xx_fw_dump,
2406         .beacon_on              = qla24xx_beacon_on,
2407         .beacon_off             = qla24xx_beacon_off,
2408         .beacon_blink           = qla83xx_beacon_blink,
2409         .read_optrom            = qla25xx_read_optrom_data,
2410         .write_optrom           = qla24xx_write_optrom_data,
2411         .get_flash_version      = qla24xx_get_flash_version,
2412         .start_scsi             = qla24xx_dif_start_scsi,
2413         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2414         .abort_isp              = qla2x00_abort_isp,
2415         .iospace_config         = qla83xx_iospace_config,
2416         .initialize_adapter     = qla2x00_initialize_adapter,
2417 };
2418
2419 static struct isp_operations qlafx00_isp_ops = {
2420         .pci_config             = qlafx00_pci_config,
2421         .reset_chip             = qlafx00_soft_reset,
2422         .chip_diag              = qlafx00_chip_diag,
2423         .config_rings           = qlafx00_config_rings,
2424         .reset_adapter          = qlafx00_soft_reset,
2425         .nvram_config           = NULL,
2426         .update_fw_options      = NULL,
2427         .load_risc              = NULL,
2428         .pci_info_str           = qlafx00_pci_info_str,
2429         .fw_version_str         = qlafx00_fw_version_str,
2430         .intr_handler           = qlafx00_intr_handler,
2431         .enable_intrs           = qlafx00_enable_intrs,
2432         .disable_intrs          = qlafx00_disable_intrs,
2433         .abort_command          = qla24xx_async_abort_command,
2434         .target_reset           = qlafx00_abort_target,
2435         .lun_reset              = qlafx00_lun_reset,
2436         .fabric_login           = NULL,
2437         .fabric_logout          = NULL,
2438         .calc_req_entries       = NULL,
2439         .build_iocbs            = NULL,
2440         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2441         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2442         .read_nvram             = qla24xx_read_nvram_data,
2443         .write_nvram            = qla24xx_write_nvram_data,
2444         .fw_dump                = NULL,
2445         .beacon_on              = qla24xx_beacon_on,
2446         .beacon_off             = qla24xx_beacon_off,
2447         .beacon_blink           = NULL,
2448         .read_optrom            = qla24xx_read_optrom_data,
2449         .write_optrom           = qla24xx_write_optrom_data,
2450         .get_flash_version      = qla24xx_get_flash_version,
2451         .start_scsi             = qlafx00_start_scsi,
2452         .start_scsi_mq          = NULL,
2453         .abort_isp              = qlafx00_abort_isp,
2454         .iospace_config         = qlafx00_iospace_config,
2455         .initialize_adapter     = qlafx00_initialize_adapter,
2456 };
2457
2458 static struct isp_operations qla27xx_isp_ops = {
2459         .pci_config             = qla25xx_pci_config,
2460         .reset_chip             = qla24xx_reset_chip,
2461         .chip_diag              = qla24xx_chip_diag,
2462         .config_rings           = qla24xx_config_rings,
2463         .reset_adapter          = qla24xx_reset_adapter,
2464         .nvram_config           = qla81xx_nvram_config,
2465         .update_fw_options      = qla24xx_update_fw_options,
2466         .load_risc              = qla81xx_load_risc,
2467         .pci_info_str           = qla24xx_pci_info_str,
2468         .fw_version_str         = qla24xx_fw_version_str,
2469         .intr_handler           = qla24xx_intr_handler,
2470         .enable_intrs           = qla24xx_enable_intrs,
2471         .disable_intrs          = qla24xx_disable_intrs,
2472         .abort_command          = qla24xx_abort_command,
2473         .target_reset           = qla24xx_abort_target,
2474         .lun_reset              = qla24xx_lun_reset,
2475         .fabric_login           = qla24xx_login_fabric,
2476         .fabric_logout          = qla24xx_fabric_logout,
2477         .calc_req_entries       = NULL,
2478         .build_iocbs            = NULL,
2479         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2480         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2481         .read_nvram             = NULL,
2482         .write_nvram            = NULL,
2483         .fw_dump                = qla27xx_fwdump,
2484         .beacon_on              = qla24xx_beacon_on,
2485         .beacon_off             = qla24xx_beacon_off,
2486         .beacon_blink           = qla83xx_beacon_blink,
2487         .read_optrom            = qla25xx_read_optrom_data,
2488         .write_optrom           = qla24xx_write_optrom_data,
2489         .get_flash_version      = qla24xx_get_flash_version,
2490         .start_scsi             = qla24xx_dif_start_scsi,
2491         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2492         .abort_isp              = qla2x00_abort_isp,
2493         .iospace_config         = qla83xx_iospace_config,
2494         .initialize_adapter     = qla2x00_initialize_adapter,
2495 };
2496
2497 static inline void
2498 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2499 {
2500         ha->device_type = DT_EXTENDED_IDS;
2501         switch (ha->pdev->device) {
2502         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2503                 ha->isp_type |= DT_ISP2100;
2504                 ha->device_type &= ~DT_EXTENDED_IDS;
2505                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2506                 break;
2507         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2508                 ha->isp_type |= DT_ISP2200;
2509                 ha->device_type &= ~DT_EXTENDED_IDS;
2510                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2511                 break;
2512         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2513                 ha->isp_type |= DT_ISP2300;
2514                 ha->device_type |= DT_ZIO_SUPPORTED;
2515                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2516                 break;
2517         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2518                 ha->isp_type |= DT_ISP2312;
2519                 ha->device_type |= DT_ZIO_SUPPORTED;
2520                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2521                 break;
2522         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2523                 ha->isp_type |= DT_ISP2322;
2524                 ha->device_type |= DT_ZIO_SUPPORTED;
2525                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2526                     ha->pdev->subsystem_device == 0x0170)
2527                         ha->device_type |= DT_OEM_001;
2528                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2529                 break;
2530         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2531                 ha->isp_type |= DT_ISP6312;
2532                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2533                 break;
2534         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2535                 ha->isp_type |= DT_ISP6322;
2536                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2537                 break;
2538         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2539                 ha->isp_type |= DT_ISP2422;
2540                 ha->device_type |= DT_ZIO_SUPPORTED;
2541                 ha->device_type |= DT_FWI2;
2542                 ha->device_type |= DT_IIDMA;
2543                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2544                 break;
2545         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2546                 ha->isp_type |= DT_ISP2432;
2547                 ha->device_type |= DT_ZIO_SUPPORTED;
2548                 ha->device_type |= DT_FWI2;
2549                 ha->device_type |= DT_IIDMA;
2550                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2551                 break;
2552         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2553                 ha->isp_type |= DT_ISP8432;
2554                 ha->device_type |= DT_ZIO_SUPPORTED;
2555                 ha->device_type |= DT_FWI2;
2556                 ha->device_type |= DT_IIDMA;
2557                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2558                 break;
2559         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2560                 ha->isp_type |= DT_ISP5422;
2561                 ha->device_type |= DT_FWI2;
2562                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2563                 break;
2564         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2565                 ha->isp_type |= DT_ISP5432;
2566                 ha->device_type |= DT_FWI2;
2567                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2568                 break;
2569         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2570                 ha->isp_type |= DT_ISP2532;
2571                 ha->device_type |= DT_ZIO_SUPPORTED;
2572                 ha->device_type |= DT_FWI2;
2573                 ha->device_type |= DT_IIDMA;
2574                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2575                 break;
2576         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2577                 ha->isp_type |= DT_ISP8001;
2578                 ha->device_type |= DT_ZIO_SUPPORTED;
2579                 ha->device_type |= DT_FWI2;
2580                 ha->device_type |= DT_IIDMA;
2581                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2582                 break;
2583         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2584                 ha->isp_type |= DT_ISP8021;
2585                 ha->device_type |= DT_ZIO_SUPPORTED;
2586                 ha->device_type |= DT_FWI2;
2587                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2588                 /* Initialize 82XX ISP flags */
2589                 qla82xx_init_flags(ha);
2590                 break;
2591          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2592                 ha->isp_type |= DT_ISP8044;
2593                 ha->device_type |= DT_ZIO_SUPPORTED;
2594                 ha->device_type |= DT_FWI2;
2595                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2596                 /* Initialize 82XX ISP flags */
2597                 qla82xx_init_flags(ha);
2598                 break;
2599         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2600                 ha->isp_type |= DT_ISP2031;
2601                 ha->device_type |= DT_ZIO_SUPPORTED;
2602                 ha->device_type |= DT_FWI2;
2603                 ha->device_type |= DT_IIDMA;
2604                 ha->device_type |= DT_T10_PI;
2605                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2606                 break;
2607         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2608                 ha->isp_type |= DT_ISP8031;
2609                 ha->device_type |= DT_ZIO_SUPPORTED;
2610                 ha->device_type |= DT_FWI2;
2611                 ha->device_type |= DT_IIDMA;
2612                 ha->device_type |= DT_T10_PI;
2613                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2614                 break;
2615         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2616                 ha->isp_type |= DT_ISPFX00;
2617                 break;
2618         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2619                 ha->isp_type |= DT_ISP2071;
2620                 ha->device_type |= DT_ZIO_SUPPORTED;
2621                 ha->device_type |= DT_FWI2;
2622                 ha->device_type |= DT_IIDMA;
2623                 ha->device_type |= DT_T10_PI;
2624                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2625                 break;
2626         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2627                 ha->isp_type |= DT_ISP2271;
2628                 ha->device_type |= DT_ZIO_SUPPORTED;
2629                 ha->device_type |= DT_FWI2;
2630                 ha->device_type |= DT_IIDMA;
2631                 ha->device_type |= DT_T10_PI;
2632                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2633                 break;
2634         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2635                 ha->isp_type |= DT_ISP2261;
2636                 ha->device_type |= DT_ZIO_SUPPORTED;
2637                 ha->device_type |= DT_FWI2;
2638                 ha->device_type |= DT_IIDMA;
2639                 ha->device_type |= DT_T10_PI;
2640                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2641                 break;
2642         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2643         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2644                 ha->isp_type |= DT_ISP2081;
2645                 ha->device_type |= DT_ZIO_SUPPORTED;
2646                 ha->device_type |= DT_FWI2;
2647                 ha->device_type |= DT_IIDMA;
2648                 ha->device_type |= DT_T10_PI;
2649                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2650                 break;
2651         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2652         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2653                 ha->isp_type |= DT_ISP2281;
2654                 ha->device_type |= DT_ZIO_SUPPORTED;
2655                 ha->device_type |= DT_FWI2;
2656                 ha->device_type |= DT_IIDMA;
2657                 ha->device_type |= DT_T10_PI;
2658                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2659                 break;
2660         }
2661
2662         if (IS_QLA82XX(ha))
2663                 ha->port_no = ha->portnum & 1;
2664         else {
2665                 /* Get adapter physical port no from interrupt pin register. */
2666                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2667                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2668                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2669                         ha->port_no--;
2670                 else
2671                         ha->port_no = !(ha->port_no & 1);
2672         }
2673
2674         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2675             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2676             ha->device_type, ha->port_no, ha->fw_srisc_address);
2677 }
2678
2679 static void
2680 qla2xxx_scan_start(struct Scsi_Host *shost)
2681 {
2682         scsi_qla_host_t *vha = shost_priv(shost);
2683
2684         if (vha->hw->flags.running_gold_fw)
2685                 return;
2686
2687         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2688         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2689         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2690         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2691 }
2692
2693 static int
2694 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2695 {
2696         scsi_qla_host_t *vha = shost_priv(shost);
2697
2698         if (test_bit(UNLOADING, &vha->dpc_flags))
2699                 return 1;
2700         if (!vha->host)
2701                 return 1;
2702         if (time > vha->hw->loop_reset_delay * HZ)
2703                 return 1;
2704
2705         return atomic_read(&vha->loop_state) == LOOP_READY;
2706 }
2707
2708 static void qla2x00_iocb_work_fn(struct work_struct *work)
2709 {
2710         struct scsi_qla_host *vha = container_of(work,
2711                 struct scsi_qla_host, iocb_work);
2712         struct qla_hw_data *ha = vha->hw;
2713         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2714         int i = 2;
2715         unsigned long flags;
2716
2717         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2718                 return;
2719
2720         while (!list_empty(&vha->work_list) && i > 0) {
2721                 qla2x00_do_work(vha);
2722                 i--;
2723         }
2724
2725         spin_lock_irqsave(&vha->work_lock, flags);
2726         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2727         spin_unlock_irqrestore(&vha->work_lock, flags);
2728 }
2729
2730 /*
2731  * PCI driver interface
2732  */
2733 static int
2734 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2735 {
2736         int     ret = -ENODEV;
2737         struct Scsi_Host *host;
2738         scsi_qla_host_t *base_vha = NULL;
2739         struct qla_hw_data *ha;
2740         char pci_info[30];
2741         char fw_str[30], wq_name[30];
2742         struct scsi_host_template *sht;
2743         int bars, mem_only = 0;
2744         uint16_t req_length = 0, rsp_length = 0;
2745         struct req_que *req = NULL;
2746         struct rsp_que *rsp = NULL;
2747         int i;
2748
2749         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2750         sht = &qla2xxx_driver_template;
2751         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2752             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2753             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2754             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2755             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2756             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2757             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2758             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2759             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2760             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2761             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2762             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2763             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2764             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2765             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2766             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2767             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2768             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2769             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2770                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2771                 mem_only = 1;
2772                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2773                     "Mem only adapter.\n");
2774         }
2775         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2776             "Bars=%d.\n", bars);
2777
2778         if (mem_only) {
2779                 if (pci_enable_device_mem(pdev))
2780                         return ret;
2781         } else {
2782                 if (pci_enable_device(pdev))
2783                         return ret;
2784         }
2785
2786         /* This may fail but that's ok */
2787         pci_enable_pcie_error_reporting(pdev);
2788
2789         /* Turn off T10-DIF when FC-NVMe is enabled */
2790         if (ql2xnvmeenable)
2791                 ql2xenabledif = 0;
2792
2793         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2794         if (!ha) {
2795                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2796                     "Unable to allocate memory for ha.\n");
2797                 goto disable_device;
2798         }
2799         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2800             "Memory allocated for ha=%p.\n", ha);
2801         ha->pdev = pdev;
2802         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2803         spin_lock_init(&ha->tgt.q_full_lock);
2804         spin_lock_init(&ha->tgt.sess_lock);
2805         spin_lock_init(&ha->tgt.atio_lock);
2806
2807         atomic_set(&ha->nvme_active_aen_cnt, 0);
2808
2809         /* Clear our data area */
2810         ha->bars = bars;
2811         ha->mem_only = mem_only;
2812         spin_lock_init(&ha->hardware_lock);
2813         spin_lock_init(&ha->vport_slock);
2814         mutex_init(&ha->selflogin_lock);
2815         mutex_init(&ha->optrom_mutex);
2816
2817         /* Set ISP-type information. */
2818         qla2x00_set_isp_flags(ha);
2819
2820         /* Set EEH reset type to fundamental if required by hba */
2821         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2822             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
2823                 pdev->needs_freset = 1;
2824
2825         ha->prev_topology = 0;
2826         ha->init_cb_size = sizeof(init_cb_t);
2827         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2828         ha->optrom_size = OPTROM_SIZE_2300;
2829         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2830         atomic_set(&ha->num_pend_mbx_stage1, 0);
2831         atomic_set(&ha->num_pend_mbx_stage2, 0);
2832         atomic_set(&ha->num_pend_mbx_stage3, 0);
2833         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2834         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2835
2836         /* Assign ISP specific operations. */
2837         if (IS_QLA2100(ha)) {
2838                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2839                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2840                 req_length = REQUEST_ENTRY_CNT_2100;
2841                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2842                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2843                 ha->gid_list_info_size = 4;
2844                 ha->flash_conf_off = ~0;
2845                 ha->flash_data_off = ~0;
2846                 ha->nvram_conf_off = ~0;
2847                 ha->nvram_data_off = ~0;
2848                 ha->isp_ops = &qla2100_isp_ops;
2849         } else if (IS_QLA2200(ha)) {
2850                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2851                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2852                 req_length = REQUEST_ENTRY_CNT_2200;
2853                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2854                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2855                 ha->gid_list_info_size = 4;
2856                 ha->flash_conf_off = ~0;
2857                 ha->flash_data_off = ~0;
2858                 ha->nvram_conf_off = ~0;
2859                 ha->nvram_data_off = ~0;
2860                 ha->isp_ops = &qla2100_isp_ops;
2861         } else if (IS_QLA23XX(ha)) {
2862                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2863                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2864                 req_length = REQUEST_ENTRY_CNT_2200;
2865                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2866                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2867                 ha->gid_list_info_size = 6;
2868                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2869                         ha->optrom_size = OPTROM_SIZE_2322;
2870                 ha->flash_conf_off = ~0;
2871                 ha->flash_data_off = ~0;
2872                 ha->nvram_conf_off = ~0;
2873                 ha->nvram_data_off = ~0;
2874                 ha->isp_ops = &qla2300_isp_ops;
2875         } else if (IS_QLA24XX_TYPE(ha)) {
2876                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2877                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2878                 req_length = REQUEST_ENTRY_CNT_24XX;
2879                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2880                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2881                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2882                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2883                 ha->gid_list_info_size = 8;
2884                 ha->optrom_size = OPTROM_SIZE_24XX;
2885                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2886                 ha->isp_ops = &qla24xx_isp_ops;
2887                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2888                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2889                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2890                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2891         } else if (IS_QLA25XX(ha)) {
2892                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2893                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2894                 req_length = REQUEST_ENTRY_CNT_24XX;
2895                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2896                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2897                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2898                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2899                 ha->gid_list_info_size = 8;
2900                 ha->optrom_size = OPTROM_SIZE_25XX;
2901                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2902                 ha->isp_ops = &qla25xx_isp_ops;
2903                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2904                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2905                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2906                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2907         } else if (IS_QLA81XX(ha)) {
2908                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2909                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2910                 req_length = REQUEST_ENTRY_CNT_24XX;
2911                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2912                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2913                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2914                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2915                 ha->gid_list_info_size = 8;
2916                 ha->optrom_size = OPTROM_SIZE_81XX;
2917                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2918                 ha->isp_ops = &qla81xx_isp_ops;
2919                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2920                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2921                 ha->nvram_conf_off = ~0;
2922                 ha->nvram_data_off = ~0;
2923         } else if (IS_QLA82XX(ha)) {
2924                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2925                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2926                 req_length = REQUEST_ENTRY_CNT_82XX;
2927                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2928                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2929                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2930                 ha->gid_list_info_size = 8;
2931                 ha->optrom_size = OPTROM_SIZE_82XX;
2932                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2933                 ha->isp_ops = &qla82xx_isp_ops;
2934                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2935                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2936                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2937                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2938         } else if (IS_QLA8044(ha)) {
2939                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2940                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2941                 req_length = REQUEST_ENTRY_CNT_82XX;
2942                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2943                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2944                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2945                 ha->gid_list_info_size = 8;
2946                 ha->optrom_size = OPTROM_SIZE_83XX;
2947                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2948                 ha->isp_ops = &qla8044_isp_ops;
2949                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2950                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2951                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2952                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2953         } else if (IS_QLA83XX(ha)) {
2954                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2955                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2956                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2957                 req_length = REQUEST_ENTRY_CNT_83XX;
2958                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2959                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2960                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2961                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2962                 ha->gid_list_info_size = 8;
2963                 ha->optrom_size = OPTROM_SIZE_83XX;
2964                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2965                 ha->isp_ops = &qla83xx_isp_ops;
2966                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2967                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2968                 ha->nvram_conf_off = ~0;
2969                 ha->nvram_data_off = ~0;
2970         }  else if (IS_QLAFX00(ha)) {
2971                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2972                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2973                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2974                 req_length = REQUEST_ENTRY_CNT_FX00;
2975                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2976                 ha->isp_ops = &qlafx00_isp_ops;
2977                 ha->port_down_retry_count = 30; /* default value */
2978                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2979                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2980                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2981                 ha->mr.fw_hbt_en = 1;
2982                 ha->mr.host_info_resend = false;
2983                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2984         } else if (IS_QLA27XX(ha)) {
2985                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2986                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2987                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2988                 req_length = REQUEST_ENTRY_CNT_83XX;
2989                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2990                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2991                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2992                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2993                 ha->gid_list_info_size = 8;
2994                 ha->optrom_size = OPTROM_SIZE_83XX;
2995                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2996                 ha->isp_ops = &qla27xx_isp_ops;
2997                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2998                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2999                 ha->nvram_conf_off = ~0;
3000                 ha->nvram_data_off = ~0;
3001         } else if (IS_QLA28XX(ha)) {
3002                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3003                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3004                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3005                 req_length = REQUEST_ENTRY_CNT_24XX;
3006                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3007                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3008                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3009                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3010                 ha->gid_list_info_size = 8;
3011                 ha->optrom_size = OPTROM_SIZE_28XX;
3012                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3013                 ha->isp_ops = &qla27xx_isp_ops;
3014                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3015                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3016                 ha->nvram_conf_off = ~0;
3017                 ha->nvram_data_off = ~0;
3018         }
3019
3020         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3021             "mbx_count=%d, req_length=%d, "
3022             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3023             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3024             "max_fibre_devices=%d.\n",
3025             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3026             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3027             ha->nvram_npiv_size, ha->max_fibre_devices);
3028         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3029             "isp_ops=%p, flash_conf_off=%d, "
3030             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3031             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3032             ha->nvram_conf_off, ha->nvram_data_off);
3033
3034         /* Configure PCI I/O space */
3035         ret = ha->isp_ops->iospace_config(ha);
3036         if (ret)
3037                 goto iospace_config_failed;
3038
3039         ql_log_pci(ql_log_info, pdev, 0x001d,
3040             "Found an ISP%04X irq %d iobase 0x%p.\n",
3041             pdev->device, pdev->irq, ha->iobase);
3042         mutex_init(&ha->vport_lock);
3043         mutex_init(&ha->mq_lock);
3044         init_completion(&ha->mbx_cmd_comp);
3045         complete(&ha->mbx_cmd_comp);
3046         init_completion(&ha->mbx_intr_comp);
3047         init_completion(&ha->dcbx_comp);
3048         init_completion(&ha->lb_portup_comp);
3049
3050         set_bit(0, (unsigned long *) ha->vp_idx_map);
3051
3052         qla2x00_config_dma_addressing(ha);
3053         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3054             "64 Bit addressing is %s.\n",
3055             ha->flags.enable_64bit_addressing ? "enable" :
3056             "disable");
3057         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3058         if (ret) {
3059                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3060                     "Failed to allocate memory for adapter, aborting.\n");
3061
3062                 goto probe_hw_failed;
3063         }
3064
3065         req->max_q_depth = MAX_Q_DEPTH;
3066         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3067                 req->max_q_depth = ql2xmaxqdepth;
3068
3069
3070         base_vha = qla2x00_create_host(sht, ha);
3071         if (!base_vha) {
3072                 ret = -ENOMEM;
3073                 goto probe_hw_failed;
3074         }
3075
3076         pci_set_drvdata(pdev, base_vha);
3077         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3078
3079         host = base_vha->host;
3080         base_vha->req = req;
3081         if (IS_QLA2XXX_MIDTYPE(ha))
3082                 base_vha->mgmt_svr_loop_id =
3083                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3084         else
3085                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3086                                                 base_vha->vp_idx;
3087
3088         /* Setup fcport template structure. */
3089         ha->mr.fcport.vha = base_vha;
3090         ha->mr.fcport.port_type = FCT_UNKNOWN;
3091         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3092         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3093         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3094         ha->mr.fcport.scan_state = 1;
3095
3096         /* Set the SG table size based on ISP type */
3097         if (!IS_FWI2_CAPABLE(ha)) {
3098                 if (IS_QLA2100(ha))
3099                         host->sg_tablesize = 32;
3100         } else {
3101                 if (!IS_QLA82XX(ha))
3102                         host->sg_tablesize = QLA_SG_ALL;
3103         }
3104         host->max_id = ha->max_fibre_devices;
3105         host->cmd_per_lun = 3;
3106         host->unique_id = host->host_no;
3107         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3108                 host->max_cmd_len = 32;
3109         else
3110                 host->max_cmd_len = MAX_CMDSZ;
3111         host->max_channel = MAX_BUSES - 1;
3112         /* Older HBAs support only 16-bit LUNs */
3113         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3114             ql2xmaxlun > 0xffff)
3115                 host->max_lun = 0xffff;
3116         else
3117                 host->max_lun = ql2xmaxlun;
3118         host->transportt = qla2xxx_transport_template;
3119         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3120
3121         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3122             "max_id=%d this_id=%d "
3123             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3124             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3125             host->this_id, host->cmd_per_lun, host->unique_id,
3126             host->max_cmd_len, host->max_channel, host->max_lun,
3127             host->transportt, sht->vendor_id);
3128
3129         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3130
3131         /* Set up the irqs */
3132         ret = qla2x00_request_irqs(ha, rsp);
3133         if (ret)
3134                 goto probe_failed;
3135
3136         /* Alloc arrays of request and response ring ptrs */
3137         ret = qla2x00_alloc_queues(ha, req, rsp);
3138         if (ret) {
3139                 ql_log(ql_log_fatal, base_vha, 0x003d,
3140                     "Failed to allocate memory for queue pointers..."
3141                     "aborting.\n");
3142                 ret = -ENODEV;
3143                 goto probe_failed;
3144         }
3145
3146         if (ha->mqenable) {
3147                 /* number of hardware queues supported by blk/scsi-mq*/
3148                 host->nr_hw_queues = ha->max_qpairs;
3149
3150                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3151                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3152         } else {
3153                 if (ql2xnvmeenable) {
3154                         host->nr_hw_queues = ha->max_qpairs;
3155                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3156                             "FC-NVMe support is enabled, HW queues=%d\n",
3157                             host->nr_hw_queues);
3158                 } else {
3159                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3160                             "blk/scsi-mq disabled.\n");
3161                 }
3162         }
3163
3164         qlt_probe_one_stage1(base_vha, ha);
3165
3166         pci_save_state(pdev);
3167
3168         /* Assign back pointers */
3169         rsp->req = req;
3170         req->rsp = rsp;
3171
3172         if (IS_QLAFX00(ha)) {
3173                 ha->rsp_q_map[0] = rsp;
3174                 ha->req_q_map[0] = req;
3175                 set_bit(0, ha->req_qid_map);
3176                 set_bit(0, ha->rsp_qid_map);
3177         }
3178
3179         /* FWI2-capable only. */
3180         req->req_q_in = &ha->iobase->isp24.req_q_in;
3181         req->req_q_out = &ha->iobase->isp24.req_q_out;
3182         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3183         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3184         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3185             IS_QLA28XX(ha)) {
3186                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3187                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3188                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3189                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3190         }
3191
3192         if (IS_QLAFX00(ha)) {
3193                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3194                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3195                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3196                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3197         }
3198
3199         if (IS_P3P_TYPE(ha)) {
3200                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3201                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3202                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3203         }
3204
3205         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3206             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3207             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3208         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3209             "req->req_q_in=%p req->req_q_out=%p "
3210             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3211             req->req_q_in, req->req_q_out,
3212             rsp->rsp_q_in, rsp->rsp_q_out);
3213         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3214             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3215             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3216         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3217             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3218             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3219
3220         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3221
3222         if (ha->isp_ops->initialize_adapter(base_vha)) {
3223                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3224                     "Failed to initialize adapter - Adapter flags %x.\n",
3225                     base_vha->device_flags);
3226
3227                 if (IS_QLA82XX(ha)) {
3228                         qla82xx_idc_lock(ha);
3229                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3230                                 QLA8XXX_DEV_FAILED);
3231                         qla82xx_idc_unlock(ha);
3232                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3233                             "HW State: FAILED.\n");
3234                 } else if (IS_QLA8044(ha)) {
3235                         qla8044_idc_lock(ha);
3236                         qla8044_wr_direct(base_vha,
3237                                 QLA8044_CRB_DEV_STATE_INDEX,
3238                                 QLA8XXX_DEV_FAILED);
3239                         qla8044_idc_unlock(ha);
3240                         ql_log(ql_log_fatal, base_vha, 0x0150,
3241                             "HW State: FAILED.\n");
3242                 }
3243
3244                 ret = -ENODEV;
3245                 goto probe_failed;
3246         }
3247
3248         if (IS_QLAFX00(ha))
3249                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3250         else
3251                 host->can_queue = req->num_outstanding_cmds - 10;
3252
3253         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3254             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3255             host->can_queue, base_vha->req,
3256             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3257
3258         if (ha->mqenable) {
3259                 bool startit = false;
3260
3261                 if (QLA_TGT_MODE_ENABLED())
3262                         startit = false;
3263
3264                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3265                         startit = true;
3266
3267                 /* Create start of day qpairs for Block MQ */
3268                 for (i = 0; i < ha->max_qpairs; i++)
3269                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3270         }
3271
3272         if (ha->flags.running_gold_fw)
3273                 goto skip_dpc;
3274
3275         /*
3276          * Startup the kernel thread for this host adapter
3277          */
3278         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3279             "%s_dpc", base_vha->host_str);
3280         if (IS_ERR(ha->dpc_thread)) {
3281                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3282                     "Failed to start DPC thread.\n");
3283                 ret = PTR_ERR(ha->dpc_thread);
3284                 ha->dpc_thread = NULL;
3285                 goto probe_failed;
3286         }
3287         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3288             "DPC thread started successfully.\n");
3289
3290         /*
3291          * If we're not coming up in initiator mode, we might sit for
3292          * a while without waking up the dpc thread, which leads to a
3293          * stuck process warning.  So just kick the dpc once here and
3294          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3295          */
3296         qla2xxx_wake_dpc(base_vha);
3297
3298         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3299
3300         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3301                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3302                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3303                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3304
3305                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3306                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3307                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3308                 INIT_WORK(&ha->idc_state_handler,
3309                     qla83xx_idc_state_handler_work);
3310                 INIT_WORK(&ha->nic_core_unrecoverable,
3311                     qla83xx_nic_core_unrecoverable_work);
3312         }
3313
3314 skip_dpc:
3315         list_add_tail(&base_vha->list, &ha->vp_list);
3316         base_vha->host->irq = ha->pdev->irq;
3317
3318         /* Initialized the timer */
3319         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3320         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3321             "Started qla2x00_timer with "
3322             "interval=%d.\n", WATCH_INTERVAL);
3323         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3324             "Detected hba at address=%p.\n",
3325             ha);
3326
3327         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3328                 if (ha->fw_attributes & BIT_4) {
3329                         int prot = 0, guard;
3330
3331                         base_vha->flags.difdix_supported = 1;
3332                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3333                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3334                         if (ql2xenabledif == 1)
3335                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3336                         if (ql2xprotmask)
3337                                 scsi_host_set_prot(host, ql2xprotmask);
3338                         else
3339                                 scsi_host_set_prot(host,
3340                                     prot | SHOST_DIF_TYPE1_PROTECTION
3341                                     | SHOST_DIF_TYPE2_PROTECTION
3342                                     | SHOST_DIF_TYPE3_PROTECTION
3343                                     | SHOST_DIX_TYPE1_PROTECTION
3344                                     | SHOST_DIX_TYPE2_PROTECTION
3345                                     | SHOST_DIX_TYPE3_PROTECTION);
3346
3347                         guard = SHOST_DIX_GUARD_CRC;
3348
3349                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3350                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3351                                 guard |= SHOST_DIX_GUARD_IP;
3352
3353                         if (ql2xprotguard)
3354                                 scsi_host_set_guard(host, ql2xprotguard);
3355                         else
3356                                 scsi_host_set_guard(host, guard);
3357                 } else
3358                         base_vha->flags.difdix_supported = 0;
3359         }
3360
3361         ha->isp_ops->enable_intrs(ha);
3362
3363         if (IS_QLAFX00(ha)) {
3364                 ret = qlafx00_fx_disc(base_vha,
3365                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3366                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3367                     QLA_SG_ALL : 128;
3368         }
3369
3370         ret = scsi_add_host(host, &pdev->dev);
3371         if (ret)
3372                 goto probe_failed;
3373
3374         base_vha->flags.init_done = 1;
3375         base_vha->flags.online = 1;
3376         ha->prev_minidump_failed = 0;
3377
3378         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3379             "Init done and hba is online.\n");
3380
3381         if (qla_ini_mode_enabled(base_vha) ||
3382                 qla_dual_mode_enabled(base_vha))
3383                 scsi_scan_host(host);
3384         else
3385                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3386                         "skipping scsi_scan_host() for non-initiator port\n");
3387
3388         qla2x00_alloc_sysfs_attr(base_vha);
3389
3390         if (IS_QLAFX00(ha)) {
3391                 ret = qlafx00_fx_disc(base_vha,
3392                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3393
3394                 /* Register system information */
3395                 ret =  qlafx00_fx_disc(base_vha,
3396                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3397         }
3398
3399         qla2x00_init_host_attr(base_vha);
3400
3401         qla2x00_dfs_setup(base_vha);
3402
3403         ql_log(ql_log_info, base_vha, 0x00fb,
3404             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3405         ql_log(ql_log_info, base_vha, 0x00fc,
3406             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3407             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info,
3408                                                        sizeof(pci_info)),
3409             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3410             base_vha->host_no,
3411             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3412
3413         qlt_add_target(ha, base_vha);
3414
3415         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3416
3417         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3418                 return -ENODEV;
3419
3420         if (ha->flags.detected_lr_sfp) {
3421                 ql_log(ql_log_info, base_vha, 0xffff,
3422                     "Reset chip to pick up LR SFP setting\n");
3423                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3424                 qla2xxx_wake_dpc(base_vha);
3425         }
3426
3427         return 0;
3428
3429 probe_failed:
3430         if (base_vha->gnl.l) {
3431                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3432                                 base_vha->gnl.l, base_vha->gnl.ldma);
3433                 base_vha->gnl.l = NULL;
3434         }
3435
3436         if (base_vha->timer_active)
3437                 qla2x00_stop_timer(base_vha);
3438         base_vha->flags.online = 0;
3439         if (ha->dpc_thread) {
3440                 struct task_struct *t = ha->dpc_thread;
3441
3442                 ha->dpc_thread = NULL;
3443                 kthread_stop(t);
3444         }
3445
3446         qla2x00_free_device(base_vha);
3447         scsi_host_put(base_vha->host);
3448         /*
3449          * Need to NULL out local req/rsp after
3450          * qla2x00_free_device => qla2x00_free_queues frees
3451          * what these are pointing to. Or else we'll
3452          * fall over below in qla2x00_free_req/rsp_que.
3453          */
3454         req = NULL;
3455         rsp = NULL;
3456
3457 probe_hw_failed:
3458         qla2x00_mem_free(ha);
3459         qla2x00_free_req_que(ha, req);
3460         qla2x00_free_rsp_que(ha, rsp);
3461         qla2x00_clear_drv_active(ha);
3462
3463 iospace_config_failed:
3464         if (IS_P3P_TYPE(ha)) {
3465                 if (!ha->nx_pcibase)
3466                         iounmap((device_reg_t *)ha->nx_pcibase);
3467                 if (!ql2xdbwr)
3468                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3469         } else {
3470                 if (ha->iobase)
3471                         iounmap(ha->iobase);
3472                 if (ha->cregbase)
3473                         iounmap(ha->cregbase);
3474         }
3475         pci_release_selected_regions(ha->pdev, ha->bars);
3476         kfree(ha);
3477
3478 disable_device:
3479         pci_disable_device(pdev);
3480         return ret;
3481 }
3482
3483 static void
3484 qla2x00_shutdown(struct pci_dev *pdev)
3485 {
3486         scsi_qla_host_t *vha;
3487         struct qla_hw_data  *ha;
3488
3489         vha = pci_get_drvdata(pdev);
3490         ha = vha->hw;
3491
3492         ql_log(ql_log_info, vha, 0xfffa,
3493                 "Adapter shutdown\n");
3494
3495         /*
3496          * Prevent future board_disable and wait
3497          * until any pending board_disable has completed.
3498          */
3499         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3500         cancel_work_sync(&ha->board_disable);
3501
3502         if (!atomic_read(&pdev->enable_cnt))
3503                 return;
3504
3505         /* Notify ISPFX00 firmware */
3506         if (IS_QLAFX00(ha))
3507                 qlafx00_driver_shutdown(vha, 20);
3508
3509         /* Turn-off FCE trace */
3510         if (ha->flags.fce_enabled) {
3511                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3512                 ha->flags.fce_enabled = 0;
3513         }
3514
3515         /* Turn-off EFT trace */
3516         if (ha->eft)
3517                 qla2x00_disable_eft_trace(vha);
3518
3519         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3520             IS_QLA28XX(ha)) {
3521                 if (ha->flags.fw_started)
3522                         qla2x00_abort_isp_cleanup(vha);
3523         } else {
3524                 /* Stop currently executing firmware. */
3525                 qla2x00_try_to_stop_firmware(vha);
3526         }
3527
3528         /* Turn adapter off line */
3529         vha->flags.online = 0;
3530
3531         /* turn-off interrupts on the card */
3532         if (ha->interrupts_on) {
3533                 vha->flags.init_done = 0;
3534                 ha->isp_ops->disable_intrs(ha);
3535         }
3536
3537         qla2x00_free_irqs(vha);
3538
3539         qla2x00_free_fw_dump(ha);
3540
3541         pci_disable_device(pdev);
3542         ql_log(ql_log_info, vha, 0xfffe,
3543                 "Adapter shutdown successfully.\n");
3544 }
3545
3546 /* Deletes all the virtual ports for a given ha */
3547 static void
3548 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3549 {
3550         scsi_qla_host_t *vha;
3551         unsigned long flags;
3552
3553         mutex_lock(&ha->vport_lock);
3554         while (ha->cur_vport_count) {
3555                 spin_lock_irqsave(&ha->vport_slock, flags);
3556
3557                 BUG_ON(base_vha->list.next == &ha->vp_list);
3558                 /* This assumes first entry in ha->vp_list is always base vha */
3559                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3560                 scsi_host_get(vha->host);
3561
3562                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3563                 mutex_unlock(&ha->vport_lock);
3564
3565                 qla_nvme_delete(vha);
3566
3567                 fc_vport_terminate(vha->fc_vport);
3568                 scsi_host_put(vha->host);
3569
3570                 mutex_lock(&ha->vport_lock);
3571         }
3572         mutex_unlock(&ha->vport_lock);
3573 }
3574
3575 /* Stops all deferred work threads */
3576 static void
3577 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3578 {
3579         /* Cancel all work and destroy DPC workqueues */
3580         if (ha->dpc_lp_wq) {
3581                 cancel_work_sync(&ha->idc_aen);
3582                 destroy_workqueue(ha->dpc_lp_wq);
3583                 ha->dpc_lp_wq = NULL;
3584         }
3585
3586         if (ha->dpc_hp_wq) {
3587                 cancel_work_sync(&ha->nic_core_reset);
3588                 cancel_work_sync(&ha->idc_state_handler);
3589                 cancel_work_sync(&ha->nic_core_unrecoverable);
3590                 destroy_workqueue(ha->dpc_hp_wq);
3591                 ha->dpc_hp_wq = NULL;
3592         }
3593
3594         /* Kill the kernel thread for this host */
3595         if (ha->dpc_thread) {
3596                 struct task_struct *t = ha->dpc_thread;
3597
3598                 /*
3599                  * qla2xxx_wake_dpc checks for ->dpc_thread
3600                  * so we need to zero it out.
3601                  */
3602                 ha->dpc_thread = NULL;
3603                 kthread_stop(t);
3604         }
3605 }
3606
3607 static void
3608 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3609 {
3610         if (IS_QLA82XX(ha)) {
3611
3612                 iounmap((device_reg_t *)ha->nx_pcibase);
3613                 if (!ql2xdbwr)
3614                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3615         } else {
3616                 if (ha->iobase)
3617                         iounmap(ha->iobase);
3618
3619                 if (ha->cregbase)
3620                         iounmap(ha->cregbase);
3621
3622                 if (ha->mqiobase)
3623                         iounmap(ha->mqiobase);
3624
3625                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
3626                     ha->msixbase)
3627                         iounmap(ha->msixbase);
3628         }
3629 }
3630
3631 static void
3632 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3633 {
3634         if (IS_QLA8044(ha)) {
3635                 qla8044_idc_lock(ha);
3636                 qla8044_clear_drv_active(ha);
3637                 qla8044_idc_unlock(ha);
3638         } else if (IS_QLA82XX(ha)) {
3639                 qla82xx_idc_lock(ha);
3640                 qla82xx_clear_drv_active(ha);
3641                 qla82xx_idc_unlock(ha);
3642         }
3643 }
3644
3645 static void
3646 qla2x00_remove_one(struct pci_dev *pdev)
3647 {
3648         scsi_qla_host_t *base_vha;
3649         struct qla_hw_data  *ha;
3650
3651         base_vha = pci_get_drvdata(pdev);
3652         ha = base_vha->hw;
3653         ql_log(ql_log_info, base_vha, 0xb079,
3654             "Removing driver\n");
3655
3656         /* Indicate device removal to prevent future board_disable and wait
3657          * until any pending board_disable has completed. */
3658         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3659         cancel_work_sync(&ha->board_disable);
3660
3661         /*
3662          * If the PCI device is disabled then there was a PCI-disconnect and
3663          * qla2x00_disable_board_on_pci_error has taken care of most of the
3664          * resources.
3665          */
3666         if (!atomic_read(&pdev->enable_cnt)) {
3667                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3668                     base_vha->gnl.l, base_vha->gnl.ldma);
3669                 base_vha->gnl.l = NULL;
3670                 scsi_host_put(base_vha->host);
3671                 kfree(ha);
3672                 pci_set_drvdata(pdev, NULL);
3673                 return;
3674         }
3675         qla2x00_wait_for_hba_ready(base_vha);
3676
3677         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3678             IS_QLA28XX(ha)) {
3679                 if (ha->flags.fw_started)
3680                         qla2x00_abort_isp_cleanup(base_vha);
3681         } else if (!IS_QLAFX00(ha)) {
3682                 if (IS_QLA8031(ha)) {
3683                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3684                             "Clearing fcoe driver presence.\n");
3685                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3686                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3687                                     "Error while clearing DRV-Presence.\n");
3688                 }
3689
3690                 qla2x00_try_to_stop_firmware(base_vha);
3691         }
3692
3693         qla2x00_wait_for_sess_deletion(base_vha);
3694
3695         /*
3696          * if UNLOAD flag is already set, then continue unload,
3697          * where it was set first.
3698          */
3699         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3700                 return;
3701
3702         set_bit(UNLOADING, &base_vha->dpc_flags);
3703
3704         qla_nvme_delete(base_vha);
3705
3706         dma_free_coherent(&ha->pdev->dev,
3707                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3708
3709         base_vha->gnl.l = NULL;
3710
3711         vfree(base_vha->scan.l);
3712
3713         if (IS_QLAFX00(ha))
3714                 qlafx00_driver_shutdown(base_vha, 20);
3715
3716         qla2x00_delete_all_vps(ha, base_vha);
3717
3718         qla2x00_dfs_remove(base_vha);
3719
3720         qla84xx_put_chip(base_vha);
3721
3722         /* Disable timer */
3723         if (base_vha->timer_active)
3724                 qla2x00_stop_timer(base_vha);
3725
3726         base_vha->flags.online = 0;
3727
3728         /* free DMA memory */
3729         if (ha->exlogin_buf)
3730                 qla2x00_free_exlogin_buffer(ha);
3731
3732         /* free DMA memory */
3733         if (ha->exchoffld_buf)
3734                 qla2x00_free_exchoffld_buffer(ha);
3735
3736         qla2x00_destroy_deferred_work(ha);
3737
3738         qlt_remove_target(ha, base_vha);
3739
3740         qla2x00_free_sysfs_attr(base_vha, true);
3741
3742         fc_remove_host(base_vha->host);
3743         qlt_remove_target_resources(ha);
3744
3745         scsi_remove_host(base_vha->host);
3746
3747         qla2x00_free_device(base_vha);
3748
3749         qla2x00_clear_drv_active(ha);
3750
3751         scsi_host_put(base_vha->host);
3752
3753         qla2x00_unmap_iobases(ha);
3754
3755         pci_release_selected_regions(ha->pdev, ha->bars);
3756         kfree(ha);
3757
3758         pci_disable_pcie_error_reporting(pdev);
3759
3760         pci_disable_device(pdev);
3761 }
3762
3763 static void
3764 qla2x00_free_device(scsi_qla_host_t *vha)
3765 {
3766         struct qla_hw_data *ha = vha->hw;
3767
3768         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3769
3770         /* Disable timer */
3771         if (vha->timer_active)
3772                 qla2x00_stop_timer(vha);
3773
3774         qla25xx_delete_queues(vha);
3775         vha->flags.online = 0;
3776
3777         /* turn-off interrupts on the card */
3778         if (ha->interrupts_on) {
3779                 vha->flags.init_done = 0;
3780                 ha->isp_ops->disable_intrs(ha);
3781         }
3782
3783         qla2x00_free_fcports(vha);
3784
3785         qla2x00_free_irqs(vha);
3786
3787         /* Flush the work queue and remove it */
3788         if (ha->wq) {
3789                 flush_workqueue(ha->wq);
3790                 destroy_workqueue(ha->wq);
3791                 ha->wq = NULL;
3792         }
3793
3794
3795         qla2x00_mem_free(ha);
3796
3797         qla82xx_md_free(vha);
3798
3799         qla2x00_free_queues(ha);
3800 }
3801
3802 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3803 {
3804         fc_port_t *fcport, *tfcport;
3805
3806         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
3807                 qla2x00_free_fcport(fcport);
3808 }
3809
3810 static inline void
3811 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3812     int defer)
3813 {
3814         struct fc_rport *rport;
3815         scsi_qla_host_t *base_vha;
3816         unsigned long flags;
3817
3818         if (!fcport->rport)
3819                 return;
3820
3821         rport = fcport->rport;
3822         if (defer) {
3823                 base_vha = pci_get_drvdata(vha->hw->pdev);
3824                 spin_lock_irqsave(vha->host->host_lock, flags);
3825                 fcport->drport = rport;
3826                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3827                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3828                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3829                 qla2xxx_wake_dpc(base_vha);
3830         } else {
3831                 int now;
3832
3833                 if (rport) {
3834                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3835                             "%s %8phN. rport %p roles %x\n",
3836                             __func__, fcport->port_name, rport,
3837                             rport->roles);
3838                         fc_remote_port_delete(rport);
3839                 }
3840                 qlt_do_generation_tick(vha, &now);
3841         }
3842 }
3843
3844 /*
3845  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3846  *
3847  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3848  *
3849  * Return: None.
3850  *
3851  * Context:
3852  */
3853 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3854     int do_login, int defer)
3855 {
3856         if (IS_QLAFX00(vha->hw)) {
3857                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3858                 qla2x00_schedule_rport_del(vha, fcport, defer);
3859                 return;
3860         }
3861
3862         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3863             vha->vp_idx == fcport->vha->vp_idx) {
3864                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3865                 qla2x00_schedule_rport_del(vha, fcport, defer);
3866         }
3867         /*
3868          * We may need to retry the login, so don't change the state of the
3869          * port but do the retries.
3870          */
3871         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3872                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3873
3874         if (!do_login)
3875                 return;
3876
3877         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3878 }
3879
3880 /*
3881  * qla2x00_mark_all_devices_lost
3882  *      Updates fcport state when device goes offline.
3883  *
3884  * Input:
3885  *      ha = adapter block pointer.
3886  *      fcport = port structure pointer.
3887  *
3888  * Return:
3889  *      None.
3890  *
3891  * Context:
3892  */
3893 void
3894 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3895 {
3896         fc_port_t *fcport;
3897
3898         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3899             "Mark all dev lost\n");
3900
3901         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3902                 fcport->scan_state = 0;
3903                 qlt_schedule_sess_for_deletion(fcport);
3904
3905                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3906                         continue;
3907
3908                 /*
3909                  * No point in marking the device as lost, if the device is
3910                  * already DEAD.
3911                  */
3912                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3913                         continue;
3914                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3915                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3916                         if (defer)
3917                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3918                         else if (vha->vp_idx == fcport->vha->vp_idx)
3919                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3920                 }
3921         }
3922 }
3923
3924 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
3925 {
3926         int i;
3927
3928         if (IS_FWI2_CAPABLE(ha))
3929                 return;
3930
3931         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
3932                 set_bit(i, ha->loop_id_map);
3933         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
3934         set_bit(BROADCAST, ha->loop_id_map);
3935 }
3936
3937 /*
3938 * qla2x00_mem_alloc
3939 *      Allocates adapter memory.
3940 *
3941 * Returns:
3942 *      0  = success.
3943 *      !0  = failure.
3944 */
3945 static int
3946 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3947         struct req_que **req, struct rsp_que **rsp)
3948 {
3949         char    name[16];
3950
3951         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3952                 &ha->init_cb_dma, GFP_KERNEL);
3953         if (!ha->init_cb)
3954                 goto fail;
3955
3956         if (qlt_mem_alloc(ha) < 0)
3957                 goto fail_free_init_cb;
3958
3959         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3960                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3961         if (!ha->gid_list)
3962                 goto fail_free_tgt_mem;
3963
3964         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3965         if (!ha->srb_mempool)
3966                 goto fail_free_gid_list;
3967
3968         if (IS_P3P_TYPE(ha)) {
3969                 /* Allocate cache for CT6 Ctx. */
3970                 if (!ctx_cachep) {
3971                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3972                                 sizeof(struct ct6_dsd), 0,
3973                                 SLAB_HWCACHE_ALIGN, NULL);
3974                         if (!ctx_cachep)
3975                                 goto fail_free_srb_mempool;
3976                 }
3977                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3978                         ctx_cachep);
3979                 if (!ha->ctx_mempool)
3980                         goto fail_free_srb_mempool;
3981                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3982                     "ctx_cachep=%p ctx_mempool=%p.\n",
3983                     ctx_cachep, ha->ctx_mempool);
3984         }
3985
3986         /* Get memory for cached NVRAM */
3987         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3988         if (!ha->nvram)
3989                 goto fail_free_ctx_mempool;
3990
3991         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3992                 ha->pdev->device);
3993         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3994                 DMA_POOL_SIZE, 8, 0);
3995         if (!ha->s_dma_pool)
3996                 goto fail_free_nvram;
3997
3998         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3999             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4000             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4001
4002         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
4003                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4004                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4005                 if (!ha->dl_dma_pool) {
4006                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4007                             "Failed to allocate memory for dl_dma_pool.\n");
4008                         goto fail_s_dma_pool;
4009                 }
4010
4011                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4012                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4013                 if (!ha->fcp_cmnd_dma_pool) {
4014                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4015                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4016                         goto fail_dl_dma_pool;
4017                 }
4018
4019                 if (ql2xenabledif) {
4020                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4021                         struct dsd_dma *dsd, *nxt;
4022                         uint i;
4023                         /* Creata a DMA pool of buffers for DIF bundling */
4024                         ha->dif_bundl_pool = dma_pool_create(name,
4025                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4026                         if (!ha->dif_bundl_pool) {
4027                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4028                                     "%s: failed create dif_bundl_pool\n",
4029                                     __func__);
4030                                 goto fail_dif_bundl_dma_pool;
4031                         }
4032
4033                         INIT_LIST_HEAD(&ha->pool.good.head);
4034                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4035                         ha->pool.good.count = 0;
4036                         ha->pool.unusable.count = 0;
4037                         for (i = 0; i < 128; i++) {
4038                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4039                                 if (!dsd) {
4040                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4041                                             0xe0ee, "%s: failed alloc dsd\n",
4042                                             __func__);
4043                                         return 1;
4044                                 }
4045                                 ha->dif_bundle_kallocs++;
4046
4047                                 dsd->dsd_addr = dma_pool_alloc(
4048                                     ha->dif_bundl_pool, GFP_ATOMIC,
4049                                     &dsd->dsd_list_dma);
4050                                 if (!dsd->dsd_addr) {
4051                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4052                                             0xe0ee,
4053                                             "%s: failed alloc ->dsd_addr\n",
4054                                             __func__);
4055                                         kfree(dsd);
4056                                         ha->dif_bundle_kallocs--;
4057                                         continue;
4058                                 }
4059                                 ha->dif_bundle_dma_allocs++;
4060
4061                                 /*
4062                                  * if DMA buffer crosses 4G boundary,
4063                                  * put it on bad list
4064                                  */
4065                                 if (MSD(dsd->dsd_list_dma) ^
4066                                     MSD(dsd->dsd_list_dma + bufsize)) {
4067                                         list_add_tail(&dsd->list,
4068                                             &ha->pool.unusable.head);
4069                                         ha->pool.unusable.count++;
4070                                 } else {
4071                                         list_add_tail(&dsd->list,
4072                                             &ha->pool.good.head);
4073                                         ha->pool.good.count++;
4074                                 }
4075                         }
4076
4077                         /* return the good ones back to the pool */
4078                         list_for_each_entry_safe(dsd, nxt,
4079                             &ha->pool.good.head, list) {
4080                                 list_del(&dsd->list);
4081                                 dma_pool_free(ha->dif_bundl_pool,
4082                                     dsd->dsd_addr, dsd->dsd_list_dma);
4083                                 ha->dif_bundle_dma_allocs--;
4084                                 kfree(dsd);
4085                                 ha->dif_bundle_kallocs--;
4086                         }
4087
4088                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4089                             "%s: dif dma pool (good=%u unusable=%u)\n",
4090                             __func__, ha->pool.good.count,
4091                             ha->pool.unusable.count);
4092                 }
4093
4094                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4095                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4096                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4097                     ha->dif_bundl_pool);
4098         }
4099
4100         /* Allocate memory for SNS commands */
4101         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4102         /* Get consistent memory allocated for SNS commands */
4103                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4104                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4105                 if (!ha->sns_cmd)
4106                         goto fail_dma_pool;
4107                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4108                     "sns_cmd: %p.\n", ha->sns_cmd);
4109         } else {
4110         /* Get consistent memory allocated for MS IOCB */
4111                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4112                         &ha->ms_iocb_dma);
4113                 if (!ha->ms_iocb)
4114                         goto fail_dma_pool;
4115         /* Get consistent memory allocated for CT SNS commands */
4116                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4117                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4118                 if (!ha->ct_sns)
4119                         goto fail_free_ms_iocb;
4120                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4121                     "ms_iocb=%p ct_sns=%p.\n",
4122                     ha->ms_iocb, ha->ct_sns);
4123         }
4124
4125         /* Allocate memory for request ring */
4126         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4127         if (!*req) {
4128                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4129                     "Failed to allocate memory for req.\n");
4130                 goto fail_req;
4131         }
4132         (*req)->length = req_len;
4133         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4134                 ((*req)->length + 1) * sizeof(request_t),
4135                 &(*req)->dma, GFP_KERNEL);
4136         if (!(*req)->ring) {
4137                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4138                     "Failed to allocate memory for req_ring.\n");
4139                 goto fail_req_ring;
4140         }
4141         /* Allocate memory for response ring */
4142         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4143         if (!*rsp) {
4144                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4145                     "Failed to allocate memory for rsp.\n");
4146                 goto fail_rsp;
4147         }
4148         (*rsp)->hw = ha;
4149         (*rsp)->length = rsp_len;
4150         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4151                 ((*rsp)->length + 1) * sizeof(response_t),
4152                 &(*rsp)->dma, GFP_KERNEL);
4153         if (!(*rsp)->ring) {
4154                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4155                     "Failed to allocate memory for rsp_ring.\n");
4156                 goto fail_rsp_ring;
4157         }
4158         (*req)->rsp = *rsp;
4159         (*rsp)->req = *req;
4160         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4161             "req=%p req->length=%d req->ring=%p rsp=%p "
4162             "rsp->length=%d rsp->ring=%p.\n",
4163             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4164             (*rsp)->ring);
4165         /* Allocate memory for NVRAM data for vports */
4166         if (ha->nvram_npiv_size) {
4167                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4168                                         sizeof(struct qla_npiv_entry),
4169                                         GFP_KERNEL);
4170                 if (!ha->npiv_info) {
4171                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4172                             "Failed to allocate memory for npiv_info.\n");
4173                         goto fail_npiv_info;
4174                 }
4175         } else
4176                 ha->npiv_info = NULL;
4177
4178         /* Get consistent memory allocated for EX-INIT-CB. */
4179         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4180             IS_QLA28XX(ha)) {
4181                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4182                     &ha->ex_init_cb_dma);
4183                 if (!ha->ex_init_cb)
4184                         goto fail_ex_init_cb;
4185                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4186                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4187         }
4188
4189         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4190
4191         /* Get consistent memory allocated for Async Port-Database. */
4192         if (!IS_FWI2_CAPABLE(ha)) {
4193                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4194                         &ha->async_pd_dma);
4195                 if (!ha->async_pd)
4196                         goto fail_async_pd;
4197                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4198                     "async_pd=%p.\n", ha->async_pd);
4199         }
4200
4201         INIT_LIST_HEAD(&ha->vp_list);
4202
4203         /* Allocate memory for our loop_id bitmap */
4204         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4205                                   sizeof(long),
4206                                   GFP_KERNEL);
4207         if (!ha->loop_id_map)
4208                 goto fail_loop_id_map;
4209         else {
4210                 qla2x00_set_reserved_loop_ids(ha);
4211                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4212                     "loop_id_map=%p.\n", ha->loop_id_map);
4213         }
4214
4215         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4216             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4217         if (!ha->sfp_data) {
4218                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4219                     "Unable to allocate memory for SFP read-data.\n");
4220                 goto fail_sfp_data;
4221         }
4222
4223         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4224             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4225             GFP_KERNEL);
4226         if (!ha->flt) {
4227                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4228                     "Unable to allocate memory for FLT.\n");
4229                 goto fail_flt_buffer;
4230         }
4231
4232         return 0;
4233
4234 fail_flt_buffer:
4235         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4236             ha->sfp_data, ha->sfp_data_dma);
4237 fail_sfp_data:
4238         kfree(ha->loop_id_map);
4239 fail_loop_id_map:
4240         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4241 fail_async_pd:
4242         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4243 fail_ex_init_cb:
4244         kfree(ha->npiv_info);
4245 fail_npiv_info:
4246         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4247                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4248         (*rsp)->ring = NULL;
4249         (*rsp)->dma = 0;
4250 fail_rsp_ring:
4251         kfree(*rsp);
4252         *rsp = NULL;
4253 fail_rsp:
4254         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4255                 sizeof(request_t), (*req)->ring, (*req)->dma);
4256         (*req)->ring = NULL;
4257         (*req)->dma = 0;
4258 fail_req_ring:
4259         kfree(*req);
4260         *req = NULL;
4261 fail_req:
4262         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4263                 ha->ct_sns, ha->ct_sns_dma);
4264         ha->ct_sns = NULL;
4265         ha->ct_sns_dma = 0;
4266 fail_free_ms_iocb:
4267         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4268         ha->ms_iocb = NULL;
4269         ha->ms_iocb_dma = 0;
4270
4271         if (ha->sns_cmd)
4272                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4273                     ha->sns_cmd, ha->sns_cmd_dma);
4274 fail_dma_pool:
4275         if (ql2xenabledif) {
4276                 struct dsd_dma *dsd, *nxt;
4277
4278                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4279                     list) {
4280                         list_del(&dsd->list);
4281                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4282                             dsd->dsd_list_dma);
4283                         ha->dif_bundle_dma_allocs--;
4284                         kfree(dsd);
4285                         ha->dif_bundle_kallocs--;
4286                         ha->pool.unusable.count--;
4287                 }
4288                 dma_pool_destroy(ha->dif_bundl_pool);
4289                 ha->dif_bundl_pool = NULL;
4290         }
4291
4292 fail_dif_bundl_dma_pool:
4293         if (IS_QLA82XX(ha) || ql2xenabledif) {
4294                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4295                 ha->fcp_cmnd_dma_pool = NULL;
4296         }
4297 fail_dl_dma_pool:
4298         if (IS_QLA82XX(ha) || ql2xenabledif) {
4299                 dma_pool_destroy(ha->dl_dma_pool);
4300                 ha->dl_dma_pool = NULL;
4301         }
4302 fail_s_dma_pool:
4303         dma_pool_destroy(ha->s_dma_pool);
4304         ha->s_dma_pool = NULL;
4305 fail_free_nvram:
4306         kfree(ha->nvram);
4307         ha->nvram = NULL;
4308 fail_free_ctx_mempool:
4309         mempool_destroy(ha->ctx_mempool);
4310         ha->ctx_mempool = NULL;
4311 fail_free_srb_mempool:
4312         mempool_destroy(ha->srb_mempool);
4313         ha->srb_mempool = NULL;
4314 fail_free_gid_list:
4315         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4316         ha->gid_list,
4317         ha->gid_list_dma);
4318         ha->gid_list = NULL;
4319         ha->gid_list_dma = 0;
4320 fail_free_tgt_mem:
4321         qlt_mem_free(ha);
4322 fail_free_init_cb:
4323         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4324         ha->init_cb_dma);
4325         ha->init_cb = NULL;
4326         ha->init_cb_dma = 0;
4327 fail:
4328         ql_log(ql_log_fatal, NULL, 0x0030,
4329             "Memory allocation failure.\n");
4330         return -ENOMEM;
4331 }
4332
4333 int
4334 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4335 {
4336         int rval;
4337         uint16_t        size, max_cnt, temp;
4338         struct qla_hw_data *ha = vha->hw;
4339
4340         /* Return if we don't need to alloacate any extended logins */
4341         if (!ql2xexlogins)
4342                 return QLA_SUCCESS;
4343
4344         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4345                 return QLA_SUCCESS;
4346
4347         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4348         max_cnt = 0;
4349         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4350         if (rval != QLA_SUCCESS) {
4351                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4352                     "Failed to get exlogin status.\n");
4353                 return rval;
4354         }
4355
4356         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4357         temp *= size;
4358
4359         if (temp != ha->exlogin_size) {
4360                 qla2x00_free_exlogin_buffer(ha);
4361                 ha->exlogin_size = temp;
4362
4363                 ql_log(ql_log_info, vha, 0xd024,
4364                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4365                     max_cnt, size, temp);
4366
4367                 ql_log(ql_log_info, vha, 0xd025,
4368                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4369
4370                 /* Get consistent memory for extended logins */
4371                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4372                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4373                 if (!ha->exlogin_buf) {
4374                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4375                     "Failed to allocate memory for exlogin_buf_dma.\n");
4376                         return -ENOMEM;
4377                 }
4378         }
4379
4380         /* Now configure the dma buffer */
4381         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4382         if (rval) {
4383                 ql_log(ql_log_fatal, vha, 0xd033,
4384                     "Setup extended login buffer  ****FAILED****.\n");
4385                 qla2x00_free_exlogin_buffer(ha);
4386         }
4387
4388         return rval;
4389 }
4390
4391 /*
4392 * qla2x00_free_exlogin_buffer
4393 *
4394 * Input:
4395 *       ha = adapter block pointer
4396 */
4397 void
4398 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4399 {
4400         if (ha->exlogin_buf) {
4401                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4402                     ha->exlogin_buf, ha->exlogin_buf_dma);
4403                 ha->exlogin_buf = NULL;
4404                 ha->exlogin_size = 0;
4405         }
4406 }
4407
4408 static void
4409 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4410 {
4411         u32 temp;
4412         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4413         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4414
4415         if (max_cnt > vha->hw->max_exchg)
4416                 max_cnt = vha->hw->max_exchg;
4417
4418         if (qla_ini_mode_enabled(vha)) {
4419                 if (vha->ql2xiniexchg > max_cnt)
4420                         vha->ql2xiniexchg = max_cnt;
4421
4422                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4423                         *ret_cnt = vha->ql2xiniexchg;
4424
4425         } else if (qla_tgt_mode_enabled(vha)) {
4426                 if (vha->ql2xexchoffld > max_cnt) {
4427                         vha->ql2xexchoffld = max_cnt;
4428                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4429                 }
4430
4431                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4432                         *ret_cnt = vha->ql2xexchoffld;
4433         } else if (qla_dual_mode_enabled(vha)) {
4434                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4435                 if (temp > max_cnt) {
4436                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4437                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4438                         temp = max_cnt;
4439                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4440                 }
4441
4442                 if (temp > FW_DEF_EXCHANGES_CNT)
4443                         *ret_cnt = temp;
4444         }
4445 }
4446
4447 int
4448 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4449 {
4450         int rval;
4451         u16     size, max_cnt;
4452         u32 actual_cnt, totsz;
4453         struct qla_hw_data *ha = vha->hw;
4454
4455         if (!ha->flags.exchoffld_enabled)
4456                 return QLA_SUCCESS;
4457
4458         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4459                 return QLA_SUCCESS;
4460
4461         max_cnt = 0;
4462         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4463         if (rval != QLA_SUCCESS) {
4464                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4465                     "Failed to get exlogin status.\n");
4466                 return rval;
4467         }
4468
4469         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4470         ql_log(ql_log_info, vha, 0xd014,
4471             "Actual exchange offload count: %d.\n", actual_cnt);
4472
4473         totsz = actual_cnt * size;
4474
4475         if (totsz != ha->exchoffld_size) {
4476                 qla2x00_free_exchoffld_buffer(ha);
4477                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4478                         ha->exchoffld_size = 0;
4479                         ha->flags.exchoffld_enabled = 0;
4480                         return QLA_SUCCESS;
4481                 }
4482
4483                 ha->exchoffld_size = totsz;
4484
4485                 ql_log(ql_log_info, vha, 0xd016,
4486                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4487                     max_cnt, actual_cnt, size, totsz);
4488
4489                 ql_log(ql_log_info, vha, 0xd017,
4490                     "Exchange Buffers requested size = 0x%x\n",
4491                     ha->exchoffld_size);
4492
4493                 /* Get consistent memory for extended logins */
4494                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4495                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4496                 if (!ha->exchoffld_buf) {
4497                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4498                         "Failed to allocate memory for Exchange Offload.\n");
4499
4500                         if (ha->max_exchg >
4501                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4502                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4503                         } else if (ha->max_exchg >
4504                             (FW_DEF_EXCHANGES_CNT + 512)) {
4505                                 ha->max_exchg -= 512;
4506                         } else {
4507                                 ha->flags.exchoffld_enabled = 0;
4508                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4509                                     "Disabling Exchange offload due to lack of memory\n");
4510                         }
4511                         ha->exchoffld_size = 0;
4512
4513                         return -ENOMEM;
4514                 }
4515         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4516                 /* pathological case */
4517                 qla2x00_free_exchoffld_buffer(ha);
4518                 ha->exchoffld_size = 0;
4519                 ha->flags.exchoffld_enabled = 0;
4520                 ql_log(ql_log_info, vha, 0xd016,
4521                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4522                     ha->exchoffld_size, actual_cnt, size, totsz);
4523                 return 0;
4524         }
4525
4526         /* Now configure the dma buffer */
4527         rval = qla_set_exchoffld_mem_cfg(vha);
4528         if (rval) {
4529                 ql_log(ql_log_fatal, vha, 0xd02e,
4530                     "Setup exchange offload buffer ****FAILED****.\n");
4531                 qla2x00_free_exchoffld_buffer(ha);
4532         } else {
4533                 /* re-adjust number of target exchange */
4534                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4535
4536                 if (qla_ini_mode_enabled(vha))
4537                         icb->exchange_count = 0;
4538                 else
4539                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4540         }
4541
4542         return rval;
4543 }
4544
4545 /*
4546 * qla2x00_free_exchoffld_buffer
4547 *
4548 * Input:
4549 *       ha = adapter block pointer
4550 */
4551 void
4552 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4553 {
4554         if (ha->exchoffld_buf) {
4555                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4556                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4557                 ha->exchoffld_buf = NULL;
4558                 ha->exchoffld_size = 0;
4559         }
4560 }
4561
4562 /*
4563 * qla2x00_free_fw_dump
4564 *       Frees fw dump stuff.
4565 *
4566 * Input:
4567 *       ha = adapter block pointer
4568 */
4569 static void
4570 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4571 {
4572         struct fwdt *fwdt = ha->fwdt;
4573         uint j;
4574
4575         if (ha->fce)
4576                 dma_free_coherent(&ha->pdev->dev,
4577                     FCE_SIZE, ha->fce, ha->fce_dma);
4578
4579         if (ha->eft)
4580                 dma_free_coherent(&ha->pdev->dev,
4581                     EFT_SIZE, ha->eft, ha->eft_dma);
4582
4583         if (ha->fw_dump)
4584                 vfree(ha->fw_dump);
4585
4586         ha->fce = NULL;
4587         ha->fce_dma = 0;
4588         ha->flags.fce_enabled = 0;
4589         ha->eft = NULL;
4590         ha->eft_dma = 0;
4591         ha->fw_dumped = 0;
4592         ha->fw_dump_cap_flags = 0;
4593         ha->fw_dump_reading = 0;
4594         ha->fw_dump = NULL;
4595         ha->fw_dump_len = 0;
4596
4597         for (j = 0; j < 2; j++, fwdt++) {
4598                 if (fwdt->template)
4599                         vfree(fwdt->template);
4600                 fwdt->template = NULL;
4601                 fwdt->length = 0;
4602         }
4603 }
4604
4605 /*
4606 * qla2x00_mem_free
4607 *      Frees all adapter allocated memory.
4608 *
4609 * Input:
4610 *      ha = adapter block pointer.
4611 */
4612 static void
4613 qla2x00_mem_free(struct qla_hw_data *ha)
4614 {
4615         qla2x00_free_fw_dump(ha);
4616
4617         if (ha->mctp_dump)
4618                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4619                     ha->mctp_dump_dma);
4620         ha->mctp_dump = NULL;
4621
4622         mempool_destroy(ha->srb_mempool);
4623         ha->srb_mempool = NULL;
4624
4625         if (ha->dcbx_tlv)
4626                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4627                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4628         ha->dcbx_tlv = NULL;
4629
4630         if (ha->xgmac_data)
4631                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4632                     ha->xgmac_data, ha->xgmac_data_dma);
4633         ha->xgmac_data = NULL;
4634
4635         if (ha->sns_cmd)
4636                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4637                 ha->sns_cmd, ha->sns_cmd_dma);
4638         ha->sns_cmd = NULL;
4639         ha->sns_cmd_dma = 0;
4640
4641         if (ha->ct_sns)
4642                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4643                 ha->ct_sns, ha->ct_sns_dma);
4644         ha->ct_sns = NULL;
4645         ha->ct_sns_dma = 0;
4646
4647         if (ha->sfp_data)
4648                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4649                     ha->sfp_data_dma);
4650         ha->sfp_data = NULL;
4651
4652         if (ha->flt)
4653                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4654                     ha->flt, ha->flt_dma);
4655         ha->flt = NULL;
4656         ha->flt_dma = 0;
4657
4658         if (ha->ms_iocb)
4659                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4660         ha->ms_iocb = NULL;
4661         ha->ms_iocb_dma = 0;
4662
4663         if (ha->ex_init_cb)
4664                 dma_pool_free(ha->s_dma_pool,
4665                         ha->ex_init_cb, ha->ex_init_cb_dma);
4666         ha->ex_init_cb = NULL;
4667         ha->ex_init_cb_dma = 0;
4668
4669         if (ha->async_pd)
4670                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4671         ha->async_pd = NULL;
4672         ha->async_pd_dma = 0;
4673
4674         dma_pool_destroy(ha->s_dma_pool);
4675         ha->s_dma_pool = NULL;
4676
4677         if (ha->gid_list)
4678                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4679                 ha->gid_list, ha->gid_list_dma);
4680         ha->gid_list = NULL;
4681         ha->gid_list_dma = 0;
4682
4683         if (IS_QLA82XX(ha)) {
4684                 if (!list_empty(&ha->gbl_dsd_list)) {
4685                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4686
4687                         /* clean up allocated prev pool */
4688                         list_for_each_entry_safe(dsd_ptr,
4689                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4690                                 dma_pool_free(ha->dl_dma_pool,
4691                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4692                                 list_del(&dsd_ptr->list);
4693                                 kfree(dsd_ptr);
4694                         }
4695                 }
4696         }
4697
4698         dma_pool_destroy(ha->dl_dma_pool);
4699         ha->dl_dma_pool = NULL;
4700
4701         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4702         ha->fcp_cmnd_dma_pool = NULL;
4703
4704         mempool_destroy(ha->ctx_mempool);
4705         ha->ctx_mempool = NULL;
4706
4707         if (ql2xenabledif && ha->dif_bundl_pool) {
4708                 struct dsd_dma *dsd, *nxt;
4709
4710                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4711                                          list) {
4712                         list_del(&dsd->list);
4713                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4714                                       dsd->dsd_list_dma);
4715                         ha->dif_bundle_dma_allocs--;
4716                         kfree(dsd);
4717                         ha->dif_bundle_kallocs--;
4718                         ha->pool.unusable.count--;
4719                 }
4720                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
4721                         list_del(&dsd->list);
4722                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4723                                       dsd->dsd_list_dma);
4724                         ha->dif_bundle_dma_allocs--;
4725                         kfree(dsd);
4726                         ha->dif_bundle_kallocs--;
4727                 }
4728         }
4729
4730         dma_pool_destroy(ha->dif_bundl_pool);
4731         ha->dif_bundl_pool = NULL;
4732
4733         qlt_mem_free(ha);
4734
4735         if (ha->init_cb)
4736                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4737                         ha->init_cb, ha->init_cb_dma);
4738         ha->init_cb = NULL;
4739         ha->init_cb_dma = 0;
4740
4741         vfree(ha->optrom_buffer);
4742         ha->optrom_buffer = NULL;
4743         kfree(ha->nvram);
4744         ha->nvram = NULL;
4745         kfree(ha->npiv_info);
4746         ha->npiv_info = NULL;
4747         kfree(ha->swl);
4748         ha->swl = NULL;
4749         kfree(ha->loop_id_map);
4750         ha->loop_id_map = NULL;
4751 }
4752
4753 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4754                                                 struct qla_hw_data *ha)
4755 {
4756         struct Scsi_Host *host;
4757         struct scsi_qla_host *vha = NULL;
4758
4759         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4760         if (!host) {
4761                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4762                     "Failed to allocate host from the scsi layer, aborting.\n");
4763                 return NULL;
4764         }
4765
4766         /* Clear our data area */
4767         vha = shost_priv(host);
4768         memset(vha, 0, sizeof(scsi_qla_host_t));
4769
4770         vha->host = host;
4771         vha->host_no = host->host_no;
4772         vha->hw = ha;
4773
4774         vha->qlini_mode = ql2x_ini_mode;
4775         vha->ql2xexchoffld = ql2xexchoffld;
4776         vha->ql2xiniexchg = ql2xiniexchg;
4777
4778         INIT_LIST_HEAD(&vha->vp_fcports);
4779         INIT_LIST_HEAD(&vha->work_list);
4780         INIT_LIST_HEAD(&vha->list);
4781         INIT_LIST_HEAD(&vha->qla_cmd_list);
4782         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4783         INIT_LIST_HEAD(&vha->logo_list);
4784         INIT_LIST_HEAD(&vha->plogi_ack_list);
4785         INIT_LIST_HEAD(&vha->qp_list);
4786         INIT_LIST_HEAD(&vha->gnl.fcports);
4787         INIT_LIST_HEAD(&vha->gpnid_list);
4788         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4789
4790         spin_lock_init(&vha->work_lock);
4791         spin_lock_init(&vha->cmd_list_lock);
4792         init_waitqueue_head(&vha->fcport_waitQ);
4793         init_waitqueue_head(&vha->vref_waitq);
4794
4795         vha->gnl.size = sizeof(struct get_name_list_extended) *
4796                         (ha->max_loop_id + 1);
4797         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4798             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4799         if (!vha->gnl.l) {
4800                 ql_log(ql_log_fatal, vha, 0xd04a,
4801                     "Alloc failed for name list.\n");
4802                 scsi_host_put(vha->host);
4803                 return NULL;
4804         }
4805
4806         /* todo: what about ext login? */
4807         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4808         vha->scan.l = vmalloc(vha->scan.size);
4809         if (!vha->scan.l) {
4810                 ql_log(ql_log_fatal, vha, 0xd04a,
4811                     "Alloc failed for scan database.\n");
4812                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4813                     vha->gnl.l, vha->gnl.ldma);
4814                 vha->gnl.l = NULL;
4815                 scsi_host_put(vha->host);
4816                 return NULL;
4817         }
4818         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4819
4820         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4821         ql_dbg(ql_dbg_init, vha, 0x0041,
4822             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4823             vha->host, vha->hw, vha,
4824             dev_name(&(ha->pdev->dev)));
4825
4826         return vha;
4827 }
4828
4829 struct qla_work_evt *
4830 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4831 {
4832         struct qla_work_evt *e;
4833         uint8_t bail;
4834
4835         QLA_VHA_MARK_BUSY(vha, bail);
4836         if (bail)
4837                 return NULL;
4838
4839         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4840         if (!e) {
4841                 QLA_VHA_MARK_NOT_BUSY(vha);
4842                 return NULL;
4843         }
4844
4845         INIT_LIST_HEAD(&e->list);
4846         e->type = type;
4847         e->flags = QLA_EVT_FLAG_FREE;
4848         return e;
4849 }
4850
4851 int
4852 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4853 {
4854         unsigned long flags;
4855         bool q = false;
4856
4857         spin_lock_irqsave(&vha->work_lock, flags);
4858         list_add_tail(&e->list, &vha->work_list);
4859
4860         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4861                 q = true;
4862
4863         spin_unlock_irqrestore(&vha->work_lock, flags);
4864
4865         if (q)
4866                 queue_work(vha->hw->wq, &vha->iocb_work);
4867
4868         return QLA_SUCCESS;
4869 }
4870
4871 int
4872 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4873     u32 data)
4874 {
4875         struct qla_work_evt *e;
4876
4877         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4878         if (!e)
4879                 return QLA_FUNCTION_FAILED;
4880
4881         e->u.aen.code = code;
4882         e->u.aen.data = data;
4883         return qla2x00_post_work(vha, e);
4884 }
4885
4886 int
4887 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4888 {
4889         struct qla_work_evt *e;
4890
4891         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4892         if (!e)
4893                 return QLA_FUNCTION_FAILED;
4894
4895         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4896         return qla2x00_post_work(vha, e);
4897 }
4898
4899 #define qla2x00_post_async_work(name, type)     \
4900 int qla2x00_post_async_##name##_work(           \
4901     struct scsi_qla_host *vha,                  \
4902     fc_port_t *fcport, uint16_t *data)          \
4903 {                                               \
4904         struct qla_work_evt *e;                 \
4905                                                 \
4906         e = qla2x00_alloc_work(vha, type);      \
4907         if (!e)                                 \
4908                 return QLA_FUNCTION_FAILED;     \
4909                                                 \
4910         e->u.logio.fcport = fcport;             \
4911         if (data) {                             \
4912                 e->u.logio.data[0] = data[0];   \
4913                 e->u.logio.data[1] = data[1];   \
4914         }                                       \
4915         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4916         return qla2x00_post_work(vha, e);       \
4917 }
4918
4919 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4920 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4921 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4922 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4923 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4924 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4925
4926 int
4927 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4928 {
4929         struct qla_work_evt *e;
4930
4931         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4932         if (!e)
4933                 return QLA_FUNCTION_FAILED;
4934
4935         e->u.uevent.code = code;
4936         return qla2x00_post_work(vha, e);
4937 }
4938
4939 static void
4940 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4941 {
4942         char event_string[40];
4943         char *envp[] = { event_string, NULL };
4944
4945         switch (code) {
4946         case QLA_UEVENT_CODE_FW_DUMP:
4947                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4948                     vha->host_no);
4949                 break;
4950         default:
4951                 /* do nothing */
4952                 break;
4953         }
4954         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4955 }
4956
4957 int
4958 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4959                         uint32_t *data, int cnt)
4960 {
4961         struct qla_work_evt *e;
4962
4963         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4964         if (!e)
4965                 return QLA_FUNCTION_FAILED;
4966
4967         e->u.aenfx.evtcode = evtcode;
4968         e->u.aenfx.count = cnt;
4969         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4970         return qla2x00_post_work(vha, e);
4971 }
4972
4973 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
4974 {
4975         unsigned long flags;
4976
4977         if (IS_SW_RESV_ADDR(fcport->d_id))
4978                 return;
4979
4980         spin_lock_irqsave(&fcport->vha->work_lock, flags);
4981         if (fcport->disc_state == DSC_UPD_FCPORT) {
4982                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4983                 return;
4984         }
4985         fcport->jiffies_at_registration = jiffies;
4986         fcport->sec_since_registration = 0;
4987         fcport->next_disc_state = DSC_DELETED;
4988         fcport->disc_state = DSC_UPD_FCPORT;
4989         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4990
4991         queue_work(system_unbound_wq, &fcport->reg_work);
4992 }
4993
4994 static
4995 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4996 {
4997         unsigned long flags;
4998         fc_port_t *fcport =  NULL, *tfcp;
4999         struct qlt_plogi_ack_t *pla =
5000             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5001         uint8_t free_fcport = 0;
5002
5003         ql_dbg(ql_dbg_disc, vha, 0xffff,
5004             "%s %d %8phC enter\n",
5005             __func__, __LINE__, e->u.new_sess.port_name);
5006
5007         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5008         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5009         if (fcport) {
5010                 fcport->d_id = e->u.new_sess.id;
5011                 if (pla) {
5012                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5013                         memcpy(fcport->node_name,
5014                             pla->iocb.u.isp24.u.plogi.node_name,
5015                             WWN_SIZE);
5016                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5017                         /* we took an extra ref_count to prevent PLOGI ACK when
5018                          * fcport/sess has not been created.
5019                          */
5020                         pla->ref_count--;
5021                 }
5022         } else {
5023                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5024                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5025                 if (fcport) {
5026                         fcport->d_id = e->u.new_sess.id;
5027                         fcport->flags |= FCF_FABRIC_DEVICE;
5028                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5029                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_FCP)
5030                                 fcport->fc4_type = FC4_TYPE_FCP_SCSI;
5031
5032                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_NVME) {
5033                                 fcport->fc4_type = FC4_TYPE_OTHER;
5034                                 fcport->fc4f_nvme = FC4_TYPE_NVME;
5035                         }
5036
5037                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5038                             WWN_SIZE);
5039                 } else {
5040                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5041                                    "%s %8phC mem alloc fail.\n",
5042                                    __func__, e->u.new_sess.port_name);
5043
5044                         if (pla) {
5045                                 list_del(&pla->list);
5046                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5047                         }
5048                         return;
5049                 }
5050
5051                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5052                 /* search again to make sure no one else got ahead */
5053                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5054                     e->u.new_sess.port_name, 1);
5055                 if (tfcp) {
5056                         /* should rarily happen */
5057                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5058                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5059                             __func__, tfcp->port_name, tfcp->disc_state,
5060                             tfcp->fw_login_state);
5061
5062                         free_fcport = 1;
5063                 } else {
5064                         list_add_tail(&fcport->list, &vha->vp_fcports);
5065
5066                 }
5067                 if (pla) {
5068                         qlt_plogi_ack_link(vha, pla, fcport,
5069                             QLT_PLOGI_LINK_SAME_WWN);
5070                         pla->ref_count--;
5071                 }
5072         }
5073         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5074
5075         if (fcport) {
5076                 fcport->id_changed = 1;
5077                 fcport->scan_state = QLA_FCPORT_FOUND;
5078                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5079                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5080
5081                 if (pla) {
5082                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5083                                 u16 wd3_lo;
5084
5085                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5086                                 fcport->local = 0;
5087                                 fcport->loop_id =
5088                                         le16_to_cpu(
5089                                             pla->iocb.u.isp24.nport_handle);
5090                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5091                                 wd3_lo =
5092                                     le16_to_cpu(
5093                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5094
5095                                 if (wd3_lo & BIT_7)
5096                                         fcport->conf_compl_supported = 1;
5097
5098                                 if ((wd3_lo & BIT_4) == 0)
5099                                         fcport->port_type = FCT_INITIATOR;
5100                                 else
5101                                         fcport->port_type = FCT_TARGET;
5102                         }
5103                         qlt_plogi_ack_unref(vha, pla);
5104                 } else {
5105                         fc_port_t *dfcp = NULL;
5106
5107                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5108                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5109                             &e->u.new_sess.id, 1);
5110                         if (tfcp && (tfcp != fcport)) {
5111                                 /*
5112                                  * We have a conflict fcport with same NportID.
5113                                  */
5114                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5115                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5116                                     __func__, tfcp->port_name, tfcp->disc_state,
5117                                     tfcp->fw_login_state);
5118
5119                                 switch (tfcp->disc_state) {
5120                                 case DSC_DELETED:
5121                                         break;
5122                                 case DSC_DELETE_PEND:
5123                                         fcport->login_pause = 1;
5124                                         tfcp->conflict = fcport;
5125                                         break;
5126                                 default:
5127                                         fcport->login_pause = 1;
5128                                         tfcp->conflict = fcport;
5129                                         dfcp = tfcp;
5130                                         break;
5131                                 }
5132                         }
5133                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5134                         if (dfcp)
5135                                 qlt_schedule_sess_for_deletion(tfcp);
5136
5137
5138                         if (N2N_TOPO(vha->hw))
5139                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5140
5141                         if (N2N_TOPO(vha->hw)) {
5142                                 if (vha->flags.nvme_enabled) {
5143                                         fcport->fc4f_nvme = 1;
5144                                         fcport->n2n_flag = 1;
5145                                 }
5146                                 fcport->fw_login_state = 0;
5147                                 /*
5148                                  * wait link init done before sending login
5149                                  */
5150                         } else {
5151                                 qla24xx_fcport_handle_login(vha, fcport);
5152                         }
5153                 }
5154         }
5155
5156         if (free_fcport) {
5157                 qla2x00_free_fcport(fcport);
5158                 if (pla) {
5159                         list_del(&pla->list);
5160                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5161                 }
5162         }
5163 }
5164
5165 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5166 {
5167         struct srb *sp = e->u.iosb.sp;
5168         int rval;
5169
5170         rval = qla2x00_start_sp(sp);
5171         if (rval != QLA_SUCCESS) {
5172                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5173                     "%s: %s: Re-issue IOCB failed (%d).\n",
5174                     __func__, sp->name, rval);
5175                 qla24xx_sp_unmap(vha, sp);
5176         }
5177 }
5178
5179 void
5180 qla2x00_do_work(struct scsi_qla_host *vha)
5181 {
5182         struct qla_work_evt *e, *tmp;
5183         unsigned long flags;
5184         LIST_HEAD(work);
5185         int rc;
5186
5187         spin_lock_irqsave(&vha->work_lock, flags);
5188         list_splice_init(&vha->work_list, &work);
5189         spin_unlock_irqrestore(&vha->work_lock, flags);
5190
5191         list_for_each_entry_safe(e, tmp, &work, list) {
5192                 rc = QLA_SUCCESS;
5193                 switch (e->type) {
5194                 case QLA_EVT_AEN:
5195                         fc_host_post_event(vha->host, fc_get_event_number(),
5196                             e->u.aen.code, e->u.aen.data);
5197                         break;
5198                 case QLA_EVT_IDC_ACK:
5199                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5200                         break;
5201                 case QLA_EVT_ASYNC_LOGIN:
5202                         qla2x00_async_login(vha, e->u.logio.fcport,
5203                             e->u.logio.data);
5204                         break;
5205                 case QLA_EVT_ASYNC_LOGOUT:
5206                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5207                         break;
5208                 case QLA_EVT_ASYNC_LOGOUT_DONE:
5209                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
5210                             e->u.logio.data);
5211                         break;
5212                 case QLA_EVT_ASYNC_ADISC:
5213                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5214                             e->u.logio.data);
5215                         break;
5216                 case QLA_EVT_UEVENT:
5217                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5218                         break;
5219                 case QLA_EVT_AENFX:
5220                         qlafx00_process_aen(vha, e);
5221                         break;
5222                 case QLA_EVT_GPNID:
5223                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5224                         break;
5225                 case QLA_EVT_UNMAP:
5226                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5227                         break;
5228                 case QLA_EVT_RELOGIN:
5229                         qla2x00_relogin(vha);
5230                         break;
5231                 case QLA_EVT_NEW_SESS:
5232                         qla24xx_create_new_sess(vha, e);
5233                         break;
5234                 case QLA_EVT_GPDB:
5235                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5236                             e->u.fcport.opt);
5237                         break;
5238                 case QLA_EVT_PRLI:
5239                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5240                         break;
5241                 case QLA_EVT_GPSC:
5242                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5243                         break;
5244                 case QLA_EVT_GNL:
5245                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5246                         break;
5247                 case QLA_EVT_NACK:
5248                         qla24xx_do_nack_work(vha, e);
5249                         break;
5250                 case QLA_EVT_ASYNC_PRLO:
5251                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5252                         break;
5253                 case QLA_EVT_ASYNC_PRLO_DONE:
5254                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5255                             e->u.logio.data);
5256                         break;
5257                 case QLA_EVT_GPNFT:
5258                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5259                             e->u.gpnft.sp);
5260                         break;
5261                 case QLA_EVT_GPNFT_DONE:
5262                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5263                         break;
5264                 case QLA_EVT_GNNFT_DONE:
5265                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5266                         break;
5267                 case QLA_EVT_GNNID:
5268                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5269                         break;
5270                 case QLA_EVT_GFPNID:
5271                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5272                         break;
5273                 case QLA_EVT_SP_RETRY:
5274                         qla_sp_retry(vha, e);
5275                         break;
5276                 case QLA_EVT_IIDMA:
5277                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5278                         break;
5279                 case QLA_EVT_ELS_PLOGI:
5280                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5281                             e->u.fcport.fcport, false);
5282                         break;
5283                 }
5284
5285                 if (rc == EAGAIN) {
5286                         /* put 'work' at head of 'vha->work_list' */
5287                         spin_lock_irqsave(&vha->work_lock, flags);
5288                         list_splice(&work, &vha->work_list);
5289                         spin_unlock_irqrestore(&vha->work_lock, flags);
5290                         break;
5291                 }
5292                 list_del_init(&e->list);
5293                 if (e->flags & QLA_EVT_FLAG_FREE)
5294                         kfree(e);
5295
5296                 /* For each work completed decrement vha ref count */
5297                 QLA_VHA_MARK_NOT_BUSY(vha);
5298         }
5299 }
5300
5301 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5302 {
5303         struct qla_work_evt *e;
5304
5305         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5306
5307         if (!e) {
5308                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5309                 return QLA_FUNCTION_FAILED;
5310         }
5311
5312         return qla2x00_post_work(vha, e);
5313 }
5314
5315 /* Relogins all the fcports of a vport
5316  * Context: dpc thread
5317  */
5318 void qla2x00_relogin(struct scsi_qla_host *vha)
5319 {
5320         fc_port_t       *fcport;
5321         int status, relogin_needed = 0;
5322         struct event_arg ea;
5323
5324         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5325                 /*
5326                  * If the port is not ONLINE then try to login
5327                  * to it if we haven't run out of retries.
5328                  */
5329                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5330                     fcport->login_retry) {
5331                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5332                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5333                                 continue;
5334
5335                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5336                                 fcport->disc_state == DSC_DELETE_PEND) {
5337                                 relogin_needed = 1;
5338                         } else {
5339                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5340                                         memset(&ea, 0, sizeof(ea));
5341                                         ea.fcport = fcport;
5342                                         qla24xx_handle_relogin_event(vha, &ea);
5343                                 } else if (vha->hw->current_topology ==
5344                                     ISP_CFG_NL) {
5345                                         fcport->login_retry--;
5346                                         status =
5347                                             qla2x00_local_device_login(vha,
5348                                                 fcport);
5349                                         if (status == QLA_SUCCESS) {
5350                                                 fcport->old_loop_id =
5351                                                     fcport->loop_id;
5352                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5353                                                     "Port login OK: logged in ID 0x%x.\n",
5354                                                     fcport->loop_id);
5355                                                 qla2x00_update_fcport
5356                                                         (vha, fcport);
5357                                         } else if (status == 1) {
5358                                                 set_bit(RELOGIN_NEEDED,
5359                                                     &vha->dpc_flags);
5360                                                 /* retry the login again */
5361                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5362                                                     "Retrying %d login again loop_id 0x%x.\n",
5363                                                     fcport->login_retry,
5364                                                     fcport->loop_id);
5365                                         } else {
5366                                                 fcport->login_retry = 0;
5367                                         }
5368
5369                                         if (fcport->login_retry == 0 &&
5370                                             status != QLA_SUCCESS)
5371                                                 qla2x00_clear_loop_id(fcport);
5372                                 }
5373                         }
5374                 }
5375                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5376                         break;
5377         }
5378
5379         if (relogin_needed)
5380                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5381
5382         ql_dbg(ql_dbg_disc, vha, 0x400e,
5383             "Relogin end.\n");
5384 }
5385
5386 /* Schedule work on any of the dpc-workqueues */
5387 void
5388 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5389 {
5390         struct qla_hw_data *ha = base_vha->hw;
5391
5392         switch (work_code) {
5393         case MBA_IDC_AEN: /* 0x8200 */
5394                 if (ha->dpc_lp_wq)
5395                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5396                 break;
5397
5398         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5399                 if (!ha->flags.nic_core_reset_hdlr_active) {
5400                         if (ha->dpc_hp_wq)
5401                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5402                 } else
5403                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5404                             "NIC Core reset is already active. Skip "
5405                             "scheduling it again.\n");
5406                 break;
5407         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5408                 if (ha->dpc_hp_wq)
5409                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5410                 break;
5411         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5412                 if (ha->dpc_hp_wq)
5413                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5414                 break;
5415         default:
5416                 ql_log(ql_log_warn, base_vha, 0xb05f,
5417                     "Unknown work-code=0x%x.\n", work_code);
5418         }
5419
5420         return;
5421 }
5422
5423 /* Work: Perform NIC Core Unrecoverable state handling */
5424 void
5425 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5426 {
5427         struct qla_hw_data *ha =
5428                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5429         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5430         uint32_t dev_state = 0;
5431
5432         qla83xx_idc_lock(base_vha, 0);
5433         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5434         qla83xx_reset_ownership(base_vha);
5435         if (ha->flags.nic_core_reset_owner) {
5436                 ha->flags.nic_core_reset_owner = 0;
5437                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5438                     QLA8XXX_DEV_FAILED);
5439                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5440                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5441         }
5442         qla83xx_idc_unlock(base_vha, 0);
5443 }
5444
5445 /* Work: Execute IDC state handler */
5446 void
5447 qla83xx_idc_state_handler_work(struct work_struct *work)
5448 {
5449         struct qla_hw_data *ha =
5450                 container_of(work, struct qla_hw_data, idc_state_handler);
5451         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5452         uint32_t dev_state = 0;
5453
5454         qla83xx_idc_lock(base_vha, 0);
5455         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5456         if (dev_state == QLA8XXX_DEV_FAILED ||
5457                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5458                 qla83xx_idc_state_handler(base_vha);
5459         qla83xx_idc_unlock(base_vha, 0);
5460 }
5461
5462 static int
5463 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5464 {
5465         int rval = QLA_SUCCESS;
5466         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5467         uint32_t heart_beat_counter1, heart_beat_counter2;
5468
5469         do {
5470                 if (time_after(jiffies, heart_beat_wait)) {
5471                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5472                             "Nic Core f/w is not alive.\n");
5473                         rval = QLA_FUNCTION_FAILED;
5474                         break;
5475                 }
5476
5477                 qla83xx_idc_lock(base_vha, 0);
5478                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5479                     &heart_beat_counter1);
5480                 qla83xx_idc_unlock(base_vha, 0);
5481                 msleep(100);
5482                 qla83xx_idc_lock(base_vha, 0);
5483                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5484                     &heart_beat_counter2);
5485                 qla83xx_idc_unlock(base_vha, 0);
5486         } while (heart_beat_counter1 == heart_beat_counter2);
5487
5488         return rval;
5489 }
5490
5491 /* Work: Perform NIC Core Reset handling */
5492 void
5493 qla83xx_nic_core_reset_work(struct work_struct *work)
5494 {
5495         struct qla_hw_data *ha =
5496                 container_of(work, struct qla_hw_data, nic_core_reset);
5497         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5498         uint32_t dev_state = 0;
5499
5500         if (IS_QLA2031(ha)) {
5501                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5502                         ql_log(ql_log_warn, base_vha, 0xb081,
5503                             "Failed to dump mctp\n");
5504                 return;
5505         }
5506
5507         if (!ha->flags.nic_core_reset_hdlr_active) {
5508                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5509                         qla83xx_idc_lock(base_vha, 0);
5510                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5511                             &dev_state);
5512                         qla83xx_idc_unlock(base_vha, 0);
5513                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5514                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5515                                     "Nic Core f/w is alive.\n");
5516                                 return;
5517                         }
5518                 }
5519
5520                 ha->flags.nic_core_reset_hdlr_active = 1;
5521                 if (qla83xx_nic_core_reset(base_vha)) {
5522                         /* NIC Core reset failed. */
5523                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5524                             "NIC Core reset failed.\n");
5525                 }
5526                 ha->flags.nic_core_reset_hdlr_active = 0;
5527         }
5528 }
5529
5530 /* Work: Handle 8200 IDC aens */
5531 void
5532 qla83xx_service_idc_aen(struct work_struct *work)
5533 {
5534         struct qla_hw_data *ha =
5535                 container_of(work, struct qla_hw_data, idc_aen);
5536         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5537         uint32_t dev_state, idc_control;
5538
5539         qla83xx_idc_lock(base_vha, 0);
5540         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5541         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5542         qla83xx_idc_unlock(base_vha, 0);
5543         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5544                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5545                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5546                             "Application requested NIC Core Reset.\n");
5547                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5548                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5549                     QLA_SUCCESS) {
5550                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5551                             "Other protocol driver requested NIC Core Reset.\n");
5552                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5553                 }
5554         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5555                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5556                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5557         }
5558 }
5559
5560 static void
5561 qla83xx_wait_logic(void)
5562 {
5563         int i;
5564
5565         /* Yield CPU */
5566         if (!in_interrupt()) {
5567                 /*
5568                  * Wait about 200ms before retrying again.
5569                  * This controls the number of retries for single
5570                  * lock operation.
5571                  */
5572                 msleep(100);
5573                 schedule();
5574         } else {
5575                 for (i = 0; i < 20; i++)
5576                         cpu_relax(); /* This a nop instr on i386 */
5577         }
5578 }
5579
5580 static int
5581 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5582 {
5583         int rval;
5584         uint32_t data;
5585         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5586         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5587         struct qla_hw_data *ha = base_vha->hw;
5588
5589         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5590             "Trying force recovery of the IDC lock.\n");
5591
5592         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5593         if (rval)
5594                 return rval;
5595
5596         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5597                 return QLA_SUCCESS;
5598         } else {
5599                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5600                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5601                     data);
5602                 if (rval)
5603                         return rval;
5604
5605                 msleep(200);
5606
5607                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5608                     &data);
5609                 if (rval)
5610                         return rval;
5611
5612                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5613                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5614                                         ~(idc_lck_rcvry_stage_mask));
5615                         rval = qla83xx_wr_reg(base_vha,
5616                             QLA83XX_IDC_LOCK_RECOVERY, data);
5617                         if (rval)
5618                                 return rval;
5619
5620                         /* Forcefully perform IDC UnLock */
5621                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5622                             &data);
5623                         if (rval)
5624                                 return rval;
5625                         /* Clear lock-id by setting 0xff */
5626                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5627                             0xff);
5628                         if (rval)
5629                                 return rval;
5630                         /* Clear lock-recovery by setting 0x0 */
5631                         rval = qla83xx_wr_reg(base_vha,
5632                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5633                         if (rval)
5634                                 return rval;
5635                 } else
5636                         return QLA_SUCCESS;
5637         }
5638
5639         return rval;
5640 }
5641
5642 static int
5643 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5644 {
5645         int rval = QLA_SUCCESS;
5646         uint32_t o_drv_lockid, n_drv_lockid;
5647         unsigned long lock_recovery_timeout;
5648
5649         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5650 retry_lockid:
5651         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5652         if (rval)
5653                 goto exit;
5654
5655         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5656         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5657                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5658                         return QLA_SUCCESS;
5659                 else
5660                         return QLA_FUNCTION_FAILED;
5661         }
5662
5663         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5664         if (rval)
5665                 goto exit;
5666
5667         if (o_drv_lockid == n_drv_lockid) {
5668                 qla83xx_wait_logic();
5669                 goto retry_lockid;
5670         } else
5671                 return QLA_SUCCESS;
5672
5673 exit:
5674         return rval;
5675 }
5676
5677 void
5678 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5679 {
5680         uint32_t data;
5681         uint32_t lock_owner;
5682         struct qla_hw_data *ha = base_vha->hw;
5683
5684         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5685 retry_lock:
5686         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5687             == QLA_SUCCESS) {
5688                 if (data) {
5689                         /* Setting lock-id to our function-number */
5690                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5691                             ha->portnum);
5692                 } else {
5693                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5694                             &lock_owner);
5695                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5696                             "Failed to acquire IDC lock, acquired by %d, "
5697                             "retrying...\n", lock_owner);
5698
5699                         /* Retry/Perform IDC-Lock recovery */
5700                         if (qla83xx_idc_lock_recovery(base_vha)
5701                             == QLA_SUCCESS) {
5702                                 qla83xx_wait_logic();
5703                                 goto retry_lock;
5704                         } else
5705                                 ql_log(ql_log_warn, base_vha, 0xb075,
5706                                     "IDC Lock recovery FAILED.\n");
5707                 }
5708
5709         }
5710
5711         return;
5712 }
5713
5714 void
5715 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5716 {
5717 #if 0
5718         uint16_t options = (requester_id << 15) | BIT_7;
5719 #endif
5720         uint16_t retry;
5721         uint32_t data;
5722         struct qla_hw_data *ha = base_vha->hw;
5723
5724         /* IDC-unlock implementation using driver-unlock/lock-id
5725          * remote registers
5726          */
5727         retry = 0;
5728 retry_unlock:
5729         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5730             == QLA_SUCCESS) {
5731                 if (data == ha->portnum) {
5732                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5733                         /* Clearing lock-id by setting 0xff */
5734                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5735                 } else if (retry < 10) {
5736                         /* SV: XXX: IDC unlock retrying needed here? */
5737
5738                         /* Retry for IDC-unlock */
5739                         qla83xx_wait_logic();
5740                         retry++;
5741                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5742                             "Failed to release IDC lock, retrying=%d\n", retry);
5743                         goto retry_unlock;
5744                 }
5745         } else if (retry < 10) {
5746                 /* Retry for IDC-unlock */
5747                 qla83xx_wait_logic();
5748                 retry++;
5749                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5750                     "Failed to read drv-lockid, retrying=%d\n", retry);
5751                 goto retry_unlock;
5752         }
5753
5754         return;
5755
5756 #if 0
5757         /* XXX: IDC-unlock implementation using access-control mbx */
5758         retry = 0;
5759 retry_unlock2:
5760         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5761                 if (retry < 10) {
5762                         /* Retry for IDC-unlock */
5763                         qla83xx_wait_logic();
5764                         retry++;
5765                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5766                             "Failed to release IDC lock, retrying=%d\n", retry);
5767                         goto retry_unlock2;
5768                 }
5769         }
5770
5771         return;
5772 #endif
5773 }
5774
5775 int
5776 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5777 {
5778         int rval = QLA_SUCCESS;
5779         struct qla_hw_data *ha = vha->hw;
5780         uint32_t drv_presence;
5781
5782         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5783         if (rval == QLA_SUCCESS) {
5784                 drv_presence |= (1 << ha->portnum);
5785                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5786                     drv_presence);
5787         }
5788
5789         return rval;
5790 }
5791
5792 int
5793 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5794 {
5795         int rval = QLA_SUCCESS;
5796
5797         qla83xx_idc_lock(vha, 0);
5798         rval = __qla83xx_set_drv_presence(vha);
5799         qla83xx_idc_unlock(vha, 0);
5800
5801         return rval;
5802 }
5803
5804 int
5805 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5806 {
5807         int rval = QLA_SUCCESS;
5808         struct qla_hw_data *ha = vha->hw;
5809         uint32_t drv_presence;
5810
5811         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5812         if (rval == QLA_SUCCESS) {
5813                 drv_presence &= ~(1 << ha->portnum);
5814                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5815                     drv_presence);
5816         }
5817
5818         return rval;
5819 }
5820
5821 int
5822 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5823 {
5824         int rval = QLA_SUCCESS;
5825
5826         qla83xx_idc_lock(vha, 0);
5827         rval = __qla83xx_clear_drv_presence(vha);
5828         qla83xx_idc_unlock(vha, 0);
5829
5830         return rval;
5831 }
5832
5833 static void
5834 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5835 {
5836         struct qla_hw_data *ha = vha->hw;
5837         uint32_t drv_ack, drv_presence;
5838         unsigned long ack_timeout;
5839
5840         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5841         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5842         while (1) {
5843                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5844                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5845                 if ((drv_ack & drv_presence) == drv_presence)
5846                         break;
5847
5848                 if (time_after_eq(jiffies, ack_timeout)) {
5849                         ql_log(ql_log_warn, vha, 0xb067,
5850                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5851                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5852                         /*
5853                          * The function(s) which did not ack in time are forced
5854                          * to withdraw any further participation in the IDC
5855                          * reset.
5856                          */
5857                         if (drv_ack != drv_presence)
5858                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5859                                     drv_ack);
5860                         break;
5861                 }
5862
5863                 qla83xx_idc_unlock(vha, 0);
5864                 msleep(1000);
5865                 qla83xx_idc_lock(vha, 0);
5866         }
5867
5868         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5869         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5870 }
5871
5872 static int
5873 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5874 {
5875         int rval = QLA_SUCCESS;
5876         uint32_t idc_control;
5877
5878         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5879         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5880
5881         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5882         __qla83xx_get_idc_control(vha, &idc_control);
5883         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5884         __qla83xx_set_idc_control(vha, 0);
5885
5886         qla83xx_idc_unlock(vha, 0);
5887         rval = qla83xx_restart_nic_firmware(vha);
5888         qla83xx_idc_lock(vha, 0);
5889
5890         if (rval != QLA_SUCCESS) {
5891                 ql_log(ql_log_fatal, vha, 0xb06a,
5892                     "Failed to restart NIC f/w.\n");
5893                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5894                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5895         } else {
5896                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5897                     "Success in restarting nic f/w.\n");
5898                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5899                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5900         }
5901
5902         return rval;
5903 }
5904
5905 /* Assumes idc_lock always held on entry */
5906 int
5907 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5908 {
5909         struct qla_hw_data *ha = base_vha->hw;
5910         int rval = QLA_SUCCESS;
5911         unsigned long dev_init_timeout;
5912         uint32_t dev_state;
5913
5914         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5915         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5916
5917         while (1) {
5918
5919                 if (time_after_eq(jiffies, dev_init_timeout)) {
5920                         ql_log(ql_log_warn, base_vha, 0xb06e,
5921                             "Initialization TIMEOUT!\n");
5922                         /* Init timeout. Disable further NIC Core
5923                          * communication.
5924                          */
5925                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5926                                 QLA8XXX_DEV_FAILED);
5927                         ql_log(ql_log_info, base_vha, 0xb06f,
5928                             "HW State: FAILED.\n");
5929                 }
5930
5931                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5932                 switch (dev_state) {
5933                 case QLA8XXX_DEV_READY:
5934                         if (ha->flags.nic_core_reset_owner)
5935                                 qla83xx_idc_audit(base_vha,
5936                                     IDC_AUDIT_COMPLETION);
5937                         ha->flags.nic_core_reset_owner = 0;
5938                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5939                             "Reset_owner reset by 0x%x.\n",
5940                             ha->portnum);
5941                         goto exit;
5942                 case QLA8XXX_DEV_COLD:
5943                         if (ha->flags.nic_core_reset_owner)
5944                                 rval = qla83xx_device_bootstrap(base_vha);
5945                         else {
5946                         /* Wait for AEN to change device-state */
5947                                 qla83xx_idc_unlock(base_vha, 0);
5948                                 msleep(1000);
5949                                 qla83xx_idc_lock(base_vha, 0);
5950                         }
5951                         break;
5952                 case QLA8XXX_DEV_INITIALIZING:
5953                         /* Wait for AEN to change device-state */
5954                         qla83xx_idc_unlock(base_vha, 0);
5955                         msleep(1000);
5956                         qla83xx_idc_lock(base_vha, 0);
5957                         break;
5958                 case QLA8XXX_DEV_NEED_RESET:
5959                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5960                                 qla83xx_need_reset_handler(base_vha);
5961                         else {
5962                                 /* Wait for AEN to change device-state */
5963                                 qla83xx_idc_unlock(base_vha, 0);
5964                                 msleep(1000);
5965                                 qla83xx_idc_lock(base_vha, 0);
5966                         }
5967                         /* reset timeout value after need reset handler */
5968                         dev_init_timeout = jiffies +
5969                             (ha->fcoe_dev_init_timeout * HZ);
5970                         break;
5971                 case QLA8XXX_DEV_NEED_QUIESCENT:
5972                         /* XXX: DEBUG for now */
5973                         qla83xx_idc_unlock(base_vha, 0);
5974                         msleep(1000);
5975                         qla83xx_idc_lock(base_vha, 0);
5976                         break;
5977                 case QLA8XXX_DEV_QUIESCENT:
5978                         /* XXX: DEBUG for now */
5979                         if (ha->flags.quiesce_owner)
5980                                 goto exit;
5981
5982                         qla83xx_idc_unlock(base_vha, 0);
5983                         msleep(1000);
5984                         qla83xx_idc_lock(base_vha, 0);
5985                         dev_init_timeout = jiffies +
5986                             (ha->fcoe_dev_init_timeout * HZ);
5987                         break;
5988                 case QLA8XXX_DEV_FAILED:
5989                         if (ha->flags.nic_core_reset_owner)
5990                                 qla83xx_idc_audit(base_vha,
5991                                     IDC_AUDIT_COMPLETION);
5992                         ha->flags.nic_core_reset_owner = 0;
5993                         __qla83xx_clear_drv_presence(base_vha);
5994                         qla83xx_idc_unlock(base_vha, 0);
5995                         qla8xxx_dev_failed_handler(base_vha);
5996                         rval = QLA_FUNCTION_FAILED;
5997                         qla83xx_idc_lock(base_vha, 0);
5998                         goto exit;
5999                 case QLA8XXX_BAD_VALUE:
6000                         qla83xx_idc_unlock(base_vha, 0);
6001                         msleep(1000);
6002                         qla83xx_idc_lock(base_vha, 0);
6003                         break;
6004                 default:
6005                         ql_log(ql_log_warn, base_vha, 0xb071,
6006                             "Unknown Device State: %x.\n", dev_state);
6007                         qla83xx_idc_unlock(base_vha, 0);
6008                         qla8xxx_dev_failed_handler(base_vha);
6009                         rval = QLA_FUNCTION_FAILED;
6010                         qla83xx_idc_lock(base_vha, 0);
6011                         goto exit;
6012                 }
6013         }
6014
6015 exit:
6016         return rval;
6017 }
6018
6019 void
6020 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6021 {
6022         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6023             board_disable);
6024         struct pci_dev *pdev = ha->pdev;
6025         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6026
6027         /*
6028          * if UNLOAD flag is already set, then continue unload,
6029          * where it was set first.
6030          */
6031         if (test_bit(UNLOADING, &base_vha->dpc_flags))
6032                 return;
6033
6034         ql_log(ql_log_warn, base_vha, 0x015b,
6035             "Disabling adapter.\n");
6036
6037         if (!atomic_read(&pdev->enable_cnt)) {
6038                 ql_log(ql_log_info, base_vha, 0xfffc,
6039                     "PCI device disabled, no action req for PCI error=%lx\n",
6040                     base_vha->pci_flags);
6041                 return;
6042         }
6043
6044         qla2x00_wait_for_sess_deletion(base_vha);
6045
6046         set_bit(UNLOADING, &base_vha->dpc_flags);
6047
6048         qla2x00_delete_all_vps(ha, base_vha);
6049
6050         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6051
6052         qla2x00_dfs_remove(base_vha);
6053
6054         qla84xx_put_chip(base_vha);
6055
6056         if (base_vha->timer_active)
6057                 qla2x00_stop_timer(base_vha);
6058
6059         base_vha->flags.online = 0;
6060
6061         qla2x00_destroy_deferred_work(ha);
6062
6063         /*
6064          * Do not try to stop beacon blink as it will issue a mailbox
6065          * command.
6066          */
6067         qla2x00_free_sysfs_attr(base_vha, false);
6068
6069         fc_remove_host(base_vha->host);
6070
6071         scsi_remove_host(base_vha->host);
6072
6073         base_vha->flags.init_done = 0;
6074         qla25xx_delete_queues(base_vha);
6075         qla2x00_free_fcports(base_vha);
6076         qla2x00_free_irqs(base_vha);
6077         qla2x00_mem_free(ha);
6078         qla82xx_md_free(base_vha);
6079         qla2x00_free_queues(ha);
6080
6081         qla2x00_unmap_iobases(ha);
6082
6083         pci_release_selected_regions(ha->pdev, ha->bars);
6084         pci_disable_pcie_error_reporting(pdev);
6085         pci_disable_device(pdev);
6086
6087         /*
6088          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6089          */
6090 }
6091
6092 /**************************************************************************
6093 * qla2x00_do_dpc
6094 *   This kernel thread is a task that is schedule by the interrupt handler
6095 *   to perform the background processing for interrupts.
6096 *
6097 * Notes:
6098 * This task always run in the context of a kernel thread.  It
6099 * is kick-off by the driver's detect code and starts up
6100 * up one per adapter. It immediately goes to sleep and waits for
6101 * some fibre event.  When either the interrupt handler or
6102 * the timer routine detects a event it will one of the task
6103 * bits then wake us up.
6104 **************************************************************************/
6105 static int
6106 qla2x00_do_dpc(void *data)
6107 {
6108         scsi_qla_host_t *base_vha;
6109         struct qla_hw_data *ha;
6110         uint32_t online;
6111         struct qla_qpair *qpair;
6112
6113         ha = (struct qla_hw_data *)data;
6114         base_vha = pci_get_drvdata(ha->pdev);
6115
6116         set_user_nice(current, MIN_NICE);
6117
6118         set_current_state(TASK_INTERRUPTIBLE);
6119         while (!kthread_should_stop()) {
6120                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6121                     "DPC handler sleeping.\n");
6122
6123                 schedule();
6124
6125                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6126                         goto end_loop;
6127
6128                 if (ha->flags.eeh_busy) {
6129                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6130                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6131                         goto end_loop;
6132                 }
6133
6134                 ha->dpc_active = 1;
6135
6136                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6137                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6138                     base_vha->dpc_flags);
6139
6140                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6141                         break;
6142
6143                 if (IS_P3P_TYPE(ha)) {
6144                         if (IS_QLA8044(ha)) {
6145                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6146                                         &base_vha->dpc_flags)) {
6147                                         qla8044_idc_lock(ha);
6148                                         qla8044_wr_direct(base_vha,
6149                                                 QLA8044_CRB_DEV_STATE_INDEX,
6150                                                 QLA8XXX_DEV_FAILED);
6151                                         qla8044_idc_unlock(ha);
6152                                         ql_log(ql_log_info, base_vha, 0x4004,
6153                                                 "HW State: FAILED.\n");
6154                                         qla8044_device_state_handler(base_vha);
6155                                         continue;
6156                                 }
6157
6158                         } else {
6159                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6160                                         &base_vha->dpc_flags)) {
6161                                         qla82xx_idc_lock(ha);
6162                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6163                                                 QLA8XXX_DEV_FAILED);
6164                                         qla82xx_idc_unlock(ha);
6165                                         ql_log(ql_log_info, base_vha, 0x0151,
6166                                                 "HW State: FAILED.\n");
6167                                         qla82xx_device_state_handler(base_vha);
6168                                         continue;
6169                                 }
6170                         }
6171
6172                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6173                                 &base_vha->dpc_flags)) {
6174
6175                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6176                                     "FCoE context reset scheduled.\n");
6177                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6178                                         &base_vha->dpc_flags))) {
6179                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6180                                                 /* FCoE-ctx reset failed.
6181                                                  * Escalate to chip-reset
6182                                                  */
6183                                                 set_bit(ISP_ABORT_NEEDED,
6184                                                         &base_vha->dpc_flags);
6185                                         }
6186                                         clear_bit(ABORT_ISP_ACTIVE,
6187                                                 &base_vha->dpc_flags);
6188                                 }
6189
6190                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6191                                     "FCoE context reset end.\n");
6192                         }
6193                 } else if (IS_QLAFX00(ha)) {
6194                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6195                                 &base_vha->dpc_flags)) {
6196                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6197                                     "Firmware Reset Recovery\n");
6198                                 if (qlafx00_reset_initialize(base_vha)) {
6199                                         /* Failed. Abort isp later. */
6200                                         if (!test_bit(UNLOADING,
6201                                             &base_vha->dpc_flags)) {
6202                                                 set_bit(ISP_UNRECOVERABLE,
6203                                                     &base_vha->dpc_flags);
6204                                                 ql_dbg(ql_dbg_dpc, base_vha,
6205                                                     0x4021,
6206                                                     "Reset Recovery Failed\n");
6207                                         }
6208                                 }
6209                         }
6210
6211                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6212                                 &base_vha->dpc_flags)) {
6213                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6214                                     "ISPFx00 Target Scan scheduled\n");
6215                                 if (qlafx00_rescan_isp(base_vha)) {
6216                                         if (!test_bit(UNLOADING,
6217                                             &base_vha->dpc_flags))
6218                                                 set_bit(ISP_UNRECOVERABLE,
6219                                                     &base_vha->dpc_flags);
6220                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6221                                             "ISPFx00 Target Scan Failed\n");
6222                                 }
6223                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6224                                     "ISPFx00 Target Scan End\n");
6225                         }
6226                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6227                                 &base_vha->dpc_flags)) {
6228                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6229                                     "ISPFx00 Host Info resend scheduled\n");
6230                                 qlafx00_fx_disc(base_vha,
6231                                     &base_vha->hw->mr.fcport,
6232                                     FXDISC_REG_HOST_INFO);
6233                         }
6234                 }
6235
6236                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6237                         &base_vha->dpc_flags) &&
6238                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6239                         qla24xx_detect_sfp(base_vha);
6240
6241                         if (ha->flags.detected_lr_sfp !=
6242                             ha->flags.using_lr_setting)
6243                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6244                 }
6245
6246                 if (test_and_clear_bit
6247                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6248                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6249                         bool do_reset = true;
6250
6251                         switch (base_vha->qlini_mode) {
6252                         case QLA2XXX_INI_MODE_ENABLED:
6253                                 break;
6254                         case QLA2XXX_INI_MODE_DISABLED:
6255                                 if (!qla_tgt_mode_enabled(base_vha) &&
6256                                     !ha->flags.fw_started)
6257                                         do_reset = false;
6258                                 break;
6259                         case QLA2XXX_INI_MODE_DUAL:
6260                                 if (!qla_dual_mode_enabled(base_vha) &&
6261                                     !ha->flags.fw_started)
6262                                         do_reset = false;
6263                                 break;
6264                         default:
6265                                 break;
6266                         }
6267
6268                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6269                             &base_vha->dpc_flags))) {
6270                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6271                                     "ISP abort scheduled.\n");
6272                                 if (ha->isp_ops->abort_isp(base_vha)) {
6273                                         /* failed. retry later */
6274                                         set_bit(ISP_ABORT_NEEDED,
6275                                             &base_vha->dpc_flags);
6276                                 }
6277                                 clear_bit(ABORT_ISP_ACTIVE,
6278                                                 &base_vha->dpc_flags);
6279                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6280                                     "ISP abort end.\n");
6281                         }
6282                 }
6283
6284                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6285                     &base_vha->dpc_flags)) {
6286                         qla2x00_update_fcports(base_vha);
6287                 }
6288
6289                 if (IS_QLAFX00(ha))
6290                         goto loop_resync_check;
6291
6292                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6293                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6294                             "Quiescence mode scheduled.\n");
6295                         if (IS_P3P_TYPE(ha)) {
6296                                 if (IS_QLA82XX(ha))
6297                                         qla82xx_device_state_handler(base_vha);
6298                                 if (IS_QLA8044(ha))
6299                                         qla8044_device_state_handler(base_vha);
6300                                 clear_bit(ISP_QUIESCE_NEEDED,
6301                                     &base_vha->dpc_flags);
6302                                 if (!ha->flags.quiesce_owner) {
6303                                         qla2x00_perform_loop_resync(base_vha);
6304                                         if (IS_QLA82XX(ha)) {
6305                                                 qla82xx_idc_lock(ha);
6306                                                 qla82xx_clear_qsnt_ready(
6307                                                     base_vha);
6308                                                 qla82xx_idc_unlock(ha);
6309                                         } else if (IS_QLA8044(ha)) {
6310                                                 qla8044_idc_lock(ha);
6311                                                 qla8044_clear_qsnt_ready(
6312                                                     base_vha);
6313                                                 qla8044_idc_unlock(ha);
6314                                         }
6315                                 }
6316                         } else {
6317                                 clear_bit(ISP_QUIESCE_NEEDED,
6318                                     &base_vha->dpc_flags);
6319                                 qla2x00_quiesce_io(base_vha);
6320                         }
6321                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6322                             "Quiescence mode end.\n");
6323                 }
6324
6325                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6326                                 &base_vha->dpc_flags) &&
6327                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6328
6329                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6330                             "Reset marker scheduled.\n");
6331                         qla2x00_rst_aen(base_vha);
6332                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6333                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6334                             "Reset marker end.\n");
6335                 }
6336
6337                 /* Retry each device up to login retry count */
6338                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6339                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6340                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6341
6342                         if (!base_vha->relogin_jif ||
6343                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6344                                 base_vha->relogin_jif = jiffies + HZ;
6345                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6346
6347                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6348                                     "Relogin scheduled.\n");
6349                                 qla24xx_post_relogin_work(base_vha);
6350                         }
6351                 }
6352 loop_resync_check:
6353                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6354                     &base_vha->dpc_flags)) {
6355
6356                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6357                             "Loop resync scheduled.\n");
6358
6359                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6360                             &base_vha->dpc_flags))) {
6361
6362                                 qla2x00_loop_resync(base_vha);
6363
6364                                 clear_bit(LOOP_RESYNC_ACTIVE,
6365                                                 &base_vha->dpc_flags);
6366                         }
6367
6368                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6369                             "Loop resync end.\n");
6370                 }
6371
6372                 if (IS_QLAFX00(ha))
6373                         goto intr_on_check;
6374
6375                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6376                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6377                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6378                         qla2xxx_flash_npiv_conf(base_vha);
6379                 }
6380
6381 intr_on_check:
6382                 if (!ha->interrupts_on)
6383                         ha->isp_ops->enable_intrs(ha);
6384
6385                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6386                                         &base_vha->dpc_flags)) {
6387                         if (ha->beacon_blink_led == 1)
6388                                 ha->isp_ops->beacon_blink(base_vha);
6389                 }
6390
6391                 /* qpair online check */
6392                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6393                     &base_vha->dpc_flags)) {
6394                         if (ha->flags.eeh_busy ||
6395                             ha->flags.pci_channel_io_perm_failure)
6396                                 online = 0;
6397                         else
6398                                 online = 1;
6399
6400                         mutex_lock(&ha->mq_lock);
6401                         list_for_each_entry(qpair, &base_vha->qp_list,
6402                             qp_list_elem)
6403                         qpair->online = online;
6404                         mutex_unlock(&ha->mq_lock);
6405                 }
6406
6407                 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED,
6408                     &base_vha->dpc_flags)) {
6409                         ql_log(ql_log_info, base_vha, 0xffffff,
6410                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6411                                                 ha->nvme_last_rptd_aen);
6412                         if (qla27xx_set_zio_threshold(base_vha,
6413                             ha->nvme_last_rptd_aen)) {
6414                                 ql_log(ql_log_info, base_vha, 0xffffff,
6415                                     "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6416                                     ha->nvme_last_rptd_aen);
6417                         }
6418                 }
6419
6420                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
6421                     &base_vha->dpc_flags)) {
6422                         ql_log(ql_log_info, base_vha, 0xffffff,
6423                             "SET ZIO Activity exchange threshold to %d.\n",
6424                             ha->last_zio_threshold);
6425                         qla27xx_set_zio_threshold(base_vha,
6426                             ha->last_zio_threshold);
6427                 }
6428
6429                 if (!IS_QLAFX00(ha))
6430                         qla2x00_do_dpc_all_vps(base_vha);
6431
6432                 if (test_and_clear_bit(N2N_LINK_RESET,
6433                         &base_vha->dpc_flags)) {
6434                         qla2x00_lip_reset(base_vha);
6435                 }
6436
6437                 ha->dpc_active = 0;
6438 end_loop:
6439                 set_current_state(TASK_INTERRUPTIBLE);
6440         } /* End of while(1) */
6441         __set_current_state(TASK_RUNNING);
6442
6443         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6444             "DPC handler exiting.\n");
6445
6446         /*
6447          * Make sure that nobody tries to wake us up again.
6448          */
6449         ha->dpc_active = 0;
6450
6451         /* Cleanup any residual CTX SRBs. */
6452         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6453
6454         return 0;
6455 }
6456
6457 void
6458 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6459 {
6460         struct qla_hw_data *ha = vha->hw;
6461         struct task_struct *t = ha->dpc_thread;
6462
6463         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6464                 wake_up_process(t);
6465 }
6466
6467 /*
6468 *  qla2x00_rst_aen
6469 *      Processes asynchronous reset.
6470 *
6471 * Input:
6472 *      ha  = adapter block pointer.
6473 */
6474 static void
6475 qla2x00_rst_aen(scsi_qla_host_t *vha)
6476 {
6477         if (vha->flags.online && !vha->flags.reset_active &&
6478             !atomic_read(&vha->loop_down_timer) &&
6479             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6480                 do {
6481                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6482
6483                         /*
6484                          * Issue marker command only when we are going to start
6485                          * the I/O.
6486                          */
6487                         vha->marker_needed = 1;
6488                 } while (!atomic_read(&vha->loop_down_timer) &&
6489                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6490         }
6491 }
6492
6493 /**************************************************************************
6494 *   qla2x00_timer
6495 *
6496 * Description:
6497 *   One second timer
6498 *
6499 * Context: Interrupt
6500 ***************************************************************************/
6501 void
6502 qla2x00_timer(struct timer_list *t)
6503 {
6504         scsi_qla_host_t *vha = from_timer(vha, t, timer);
6505         unsigned long   cpu_flags = 0;
6506         int             start_dpc = 0;
6507         int             index;
6508         srb_t           *sp;
6509         uint16_t        w;
6510         struct qla_hw_data *ha = vha->hw;
6511         struct req_que *req;
6512
6513         if (ha->flags.eeh_busy) {
6514                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6515                     "EEH = %d, restarting timer.\n",
6516                     ha->flags.eeh_busy);
6517                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6518                 return;
6519         }
6520
6521         /*
6522          * Hardware read to raise pending EEH errors during mailbox waits. If
6523          * the read returns -1 then disable the board.
6524          */
6525         if (!pci_channel_offline(ha->pdev)) {
6526                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6527                 qla2x00_check_reg16_for_disconnect(vha, w);
6528         }
6529
6530         /* Make sure qla82xx_watchdog is run only for physical port */
6531         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6532                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6533                         start_dpc++;
6534                 if (IS_QLA82XX(ha))
6535                         qla82xx_watchdog(vha);
6536                 else if (IS_QLA8044(ha))
6537                         qla8044_watchdog(vha);
6538         }
6539
6540         if (!vha->vp_idx && IS_QLAFX00(ha))
6541                 qlafx00_timer_routine(vha);
6542
6543         /* Loop down handler. */
6544         if (atomic_read(&vha->loop_down_timer) > 0 &&
6545             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6546             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6547                 && vha->flags.online) {
6548
6549                 if (atomic_read(&vha->loop_down_timer) ==
6550                     vha->loop_down_abort_time) {
6551
6552                         ql_log(ql_log_info, vha, 0x6008,
6553                             "Loop down - aborting the queues before time expires.\n");
6554
6555                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6556                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6557
6558                         /*
6559                          * Schedule an ISP abort to return any FCP2-device
6560                          * commands.
6561                          */
6562                         /* NPIV - scan physical port only */
6563                         if (!vha->vp_idx) {
6564                                 spin_lock_irqsave(&ha->hardware_lock,
6565                                     cpu_flags);
6566                                 req = ha->req_q_map[0];
6567                                 for (index = 1;
6568                                     index < req->num_outstanding_cmds;
6569                                     index++) {
6570                                         fc_port_t *sfcp;
6571
6572                                         sp = req->outstanding_cmds[index];
6573                                         if (!sp)
6574                                                 continue;
6575                                         if (sp->cmd_type != TYPE_SRB)
6576                                                 continue;
6577                                         if (sp->type != SRB_SCSI_CMD)
6578                                                 continue;
6579                                         sfcp = sp->fcport;
6580                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6581                                                 continue;
6582
6583                                         if (IS_QLA82XX(ha))
6584                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6585                                                         &vha->dpc_flags);
6586                                         else
6587                                                 set_bit(ISP_ABORT_NEEDED,
6588                                                         &vha->dpc_flags);
6589                                         break;
6590                                 }
6591                                 spin_unlock_irqrestore(&ha->hardware_lock,
6592                                                                 cpu_flags);
6593                         }
6594                         start_dpc++;
6595                 }
6596
6597                 /* if the loop has been down for 4 minutes, reinit adapter */
6598                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6599                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6600                                 ql_log(ql_log_warn, vha, 0x6009,
6601                                     "Loop down - aborting ISP.\n");
6602
6603                                 if (IS_QLA82XX(ha))
6604                                         set_bit(FCOE_CTX_RESET_NEEDED,
6605                                                 &vha->dpc_flags);
6606                                 else
6607                                         set_bit(ISP_ABORT_NEEDED,
6608                                                 &vha->dpc_flags);
6609                         }
6610                 }
6611                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6612                     "Loop down - seconds remaining %d.\n",
6613                     atomic_read(&vha->loop_down_timer));
6614         }
6615         /* Check if beacon LED needs to be blinked for physical host only */
6616         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6617                 /* There is no beacon_blink function for ISP82xx */
6618                 if (!IS_P3P_TYPE(ha)) {
6619                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6620                         start_dpc++;
6621                 }
6622         }
6623
6624         /* Process any deferred work. */
6625         if (!list_empty(&vha->work_list)) {
6626                 unsigned long flags;
6627                 bool q = false;
6628
6629                 spin_lock_irqsave(&vha->work_lock, flags);
6630                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6631                         q = true;
6632                 spin_unlock_irqrestore(&vha->work_lock, flags);
6633                 if (q)
6634                         queue_work(vha->hw->wq, &vha->iocb_work);
6635         }
6636
6637         /*
6638          * FC-NVME
6639          * see if the active AEN count has changed from what was last reported.
6640          */
6641         if (!vha->vp_idx &&
6642             (atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen) &&
6643             ha->zio_mode == QLA_ZIO_MODE_6 &&
6644             !ha->flags.host_shutting_down) {
6645                 ql_log(ql_log_info, vha, 0x3002,
6646                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6647                     ha->nvme_last_rptd_aen);
6648                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6649                 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6650                 start_dpc++;
6651         }
6652
6653         if (!vha->vp_idx &&
6654             (atomic_read(&ha->zio_threshold) != ha->last_zio_threshold) &&
6655             (ha->zio_mode == QLA_ZIO_MODE_6) &&
6656             (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
6657                 ql_log(ql_log_info, vha, 0x3002,
6658                     "Sched: Set ZIO exchange threshold to %d.\n",
6659                     ha->last_zio_threshold);
6660                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
6661                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6662                 start_dpc++;
6663         }
6664
6665         /* Schedule the DPC routine if needed */
6666         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6667             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6668             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6669             start_dpc ||
6670             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6671             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6672             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6673             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6674             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6675             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6676                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6677                     "isp_abort_needed=%d loop_resync_needed=%d "
6678                     "fcport_update_needed=%d start_dpc=%d "
6679                     "reset_marker_needed=%d",
6680                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6681                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6682                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6683                     start_dpc,
6684                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6685                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6686                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6687                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6688                     "relogin_needed=%d.\n",
6689                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6690                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6691                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6692                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6693                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6694                 qla2xxx_wake_dpc(vha);
6695         }
6696
6697         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6698 }
6699
6700 /* Firmware interface routines. */
6701
6702 #define FW_ISP21XX      0
6703 #define FW_ISP22XX      1
6704 #define FW_ISP2300      2
6705 #define FW_ISP2322      3
6706 #define FW_ISP24XX      4
6707 #define FW_ISP25XX      5
6708 #define FW_ISP81XX      6
6709 #define FW_ISP82XX      7
6710 #define FW_ISP2031      8
6711 #define FW_ISP8031      9
6712 #define FW_ISP27XX      10
6713 #define FW_ISP28XX      11
6714
6715 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6716 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6717 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6718 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6719 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6720 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6721 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6722 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6723 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6724 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6725 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6726 #define FW_FILE_ISP28XX "ql2800_fw.bin"
6727
6728
6729 static DEFINE_MUTEX(qla_fw_lock);
6730
6731 static struct fw_blob qla_fw_blobs[] = {
6732         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6733         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6734         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6735         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6736         { .name = FW_FILE_ISP24XX, },
6737         { .name = FW_FILE_ISP25XX, },
6738         { .name = FW_FILE_ISP81XX, },
6739         { .name = FW_FILE_ISP82XX, },
6740         { .name = FW_FILE_ISP2031, },
6741         { .name = FW_FILE_ISP8031, },
6742         { .name = FW_FILE_ISP27XX, },
6743         { .name = FW_FILE_ISP28XX, },
6744         { .name = NULL, },
6745 };
6746
6747 struct fw_blob *
6748 qla2x00_request_firmware(scsi_qla_host_t *vha)
6749 {
6750         struct qla_hw_data *ha = vha->hw;
6751         struct fw_blob *blob;
6752
6753         if (IS_QLA2100(ha)) {
6754                 blob = &qla_fw_blobs[FW_ISP21XX];
6755         } else if (IS_QLA2200(ha)) {
6756                 blob = &qla_fw_blobs[FW_ISP22XX];
6757         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6758                 blob = &qla_fw_blobs[FW_ISP2300];
6759         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6760                 blob = &qla_fw_blobs[FW_ISP2322];
6761         } else if (IS_QLA24XX_TYPE(ha)) {
6762                 blob = &qla_fw_blobs[FW_ISP24XX];
6763         } else if (IS_QLA25XX(ha)) {
6764                 blob = &qla_fw_blobs[FW_ISP25XX];
6765         } else if (IS_QLA81XX(ha)) {
6766                 blob = &qla_fw_blobs[FW_ISP81XX];
6767         } else if (IS_QLA82XX(ha)) {
6768                 blob = &qla_fw_blobs[FW_ISP82XX];
6769         } else if (IS_QLA2031(ha)) {
6770                 blob = &qla_fw_blobs[FW_ISP2031];
6771         } else if (IS_QLA8031(ha)) {
6772                 blob = &qla_fw_blobs[FW_ISP8031];
6773         } else if (IS_QLA27XX(ha)) {
6774                 blob = &qla_fw_blobs[FW_ISP27XX];
6775         } else if (IS_QLA28XX(ha)) {
6776                 blob = &qla_fw_blobs[FW_ISP28XX];
6777         } else {
6778                 return NULL;
6779         }
6780
6781         if (!blob->name)
6782                 return NULL;
6783
6784         mutex_lock(&qla_fw_lock);
6785         if (blob->fw)
6786                 goto out;
6787
6788         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6789                 ql_log(ql_log_warn, vha, 0x0063,
6790                     "Failed to load firmware image (%s).\n", blob->name);
6791                 blob->fw = NULL;
6792                 blob = NULL;
6793         }
6794
6795 out:
6796         mutex_unlock(&qla_fw_lock);
6797         return blob;
6798 }
6799
6800 static void
6801 qla2x00_release_firmware(void)
6802 {
6803         struct fw_blob *blob;
6804
6805         mutex_lock(&qla_fw_lock);
6806         for (blob = qla_fw_blobs; blob->name; blob++)
6807                 release_firmware(blob->fw);
6808         mutex_unlock(&qla_fw_lock);
6809 }
6810
6811 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
6812 {
6813         struct qla_hw_data *ha = vha->hw;
6814         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6815         struct qla_qpair *qpair = NULL;
6816         struct scsi_qla_host *vp;
6817         fc_port_t *fcport;
6818         int i;
6819         unsigned long flags;
6820
6821         ha->chip_reset++;
6822
6823         ha->base_qpair->chip_reset = ha->chip_reset;
6824         for (i = 0; i < ha->max_qpairs; i++) {
6825                 if (ha->queue_pair_map[i])
6826                         ha->queue_pair_map[i]->chip_reset =
6827                             ha->base_qpair->chip_reset;
6828         }
6829
6830         /* purge MBox commands */
6831         if (atomic_read(&ha->num_pend_mbx_stage3)) {
6832                 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6833                 complete(&ha->mbx_intr_comp);
6834         }
6835
6836         i = 0;
6837
6838         while (atomic_read(&ha->num_pend_mbx_stage3) ||
6839             atomic_read(&ha->num_pend_mbx_stage2) ||
6840             atomic_read(&ha->num_pend_mbx_stage1)) {
6841                 msleep(20);
6842                 i++;
6843                 if (i > 50)
6844                         break;
6845         }
6846
6847         ha->flags.purge_mbox = 0;
6848
6849         mutex_lock(&ha->mq_lock);
6850         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
6851                 qpair->online = 0;
6852         mutex_unlock(&ha->mq_lock);
6853
6854         qla2x00_mark_all_devices_lost(vha, 0);
6855
6856         spin_lock_irqsave(&ha->vport_slock, flags);
6857         list_for_each_entry(vp, &ha->vp_list, list) {
6858                 atomic_inc(&vp->vref_count);
6859                 spin_unlock_irqrestore(&ha->vport_slock, flags);
6860                 qla2x00_mark_all_devices_lost(vp, 0);
6861                 spin_lock_irqsave(&ha->vport_slock, flags);
6862                 atomic_dec(&vp->vref_count);
6863         }
6864         spin_unlock_irqrestore(&ha->vport_slock, flags);
6865
6866         /* Clear all async request states across all VPs. */
6867         list_for_each_entry(fcport, &vha->vp_fcports, list)
6868                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6869
6870         spin_lock_irqsave(&ha->vport_slock, flags);
6871         list_for_each_entry(vp, &ha->vp_list, list) {
6872                 atomic_inc(&vp->vref_count);
6873                 spin_unlock_irqrestore(&ha->vport_slock, flags);
6874                 list_for_each_entry(fcport, &vp->vp_fcports, list)
6875                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6876                 spin_lock_irqsave(&ha->vport_slock, flags);
6877                 atomic_dec(&vp->vref_count);
6878         }
6879         spin_unlock_irqrestore(&ha->vport_slock, flags);
6880 }
6881
6882
6883 static pci_ers_result_t
6884 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6885 {
6886         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6887         struct qla_hw_data *ha = vha->hw;
6888
6889         ql_dbg(ql_dbg_aer, vha, 0x9000,
6890             "PCI error detected, state %x.\n", state);
6891
6892         if (!atomic_read(&pdev->enable_cnt)) {
6893                 ql_log(ql_log_info, vha, 0xffff,
6894                         "PCI device is disabled,state %x\n", state);
6895                 return PCI_ERS_RESULT_NEED_RESET;
6896         }
6897
6898         switch (state) {
6899         case pci_channel_io_normal:
6900                 ha->flags.eeh_busy = 0;
6901                 if (ql2xmqsupport || ql2xnvmeenable) {
6902                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6903                         qla2xxx_wake_dpc(vha);
6904                 }
6905                 return PCI_ERS_RESULT_CAN_RECOVER;
6906         case pci_channel_io_frozen:
6907                 ha->flags.eeh_busy = 1;
6908                 qla_pci_error_cleanup(vha);
6909                 return PCI_ERS_RESULT_NEED_RESET;
6910         case pci_channel_io_perm_failure:
6911                 ha->flags.pci_channel_io_perm_failure = 1;
6912                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6913                 if (ql2xmqsupport || ql2xnvmeenable) {
6914                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6915                         qla2xxx_wake_dpc(vha);
6916                 }
6917                 return PCI_ERS_RESULT_DISCONNECT;
6918         }
6919         return PCI_ERS_RESULT_NEED_RESET;
6920 }
6921
6922 static pci_ers_result_t
6923 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6924 {
6925         int risc_paused = 0;
6926         uint32_t stat;
6927         unsigned long flags;
6928         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6929         struct qla_hw_data *ha = base_vha->hw;
6930         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6931         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6932
6933         if (IS_QLA82XX(ha))
6934                 return PCI_ERS_RESULT_RECOVERED;
6935
6936         spin_lock_irqsave(&ha->hardware_lock, flags);
6937         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6938                 stat = RD_REG_DWORD(&reg->hccr);
6939                 if (stat & HCCR_RISC_PAUSE)
6940                         risc_paused = 1;
6941         } else if (IS_QLA23XX(ha)) {
6942                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6943                 if (stat & HSR_RISC_PAUSED)
6944                         risc_paused = 1;
6945         } else if (IS_FWI2_CAPABLE(ha)) {
6946                 stat = RD_REG_DWORD(&reg24->host_status);
6947                 if (stat & HSRX_RISC_PAUSED)
6948                         risc_paused = 1;
6949         }
6950         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6951
6952         if (risc_paused) {
6953                 ql_log(ql_log_info, base_vha, 0x9003,
6954                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6955                 ha->isp_ops->fw_dump(base_vha, 0);
6956
6957                 return PCI_ERS_RESULT_NEED_RESET;
6958         } else
6959                 return PCI_ERS_RESULT_RECOVERED;
6960 }
6961
6962 static pci_ers_result_t
6963 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6964 {
6965         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6966         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6967         struct qla_hw_data *ha = base_vha->hw;
6968         int rc;
6969         struct qla_qpair *qpair = NULL;
6970
6971         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6972             "Slot Reset.\n");
6973
6974         /* Workaround: qla2xxx driver which access hardware earlier
6975          * needs error state to be pci_channel_io_online.
6976          * Otherwise mailbox command timesout.
6977          */
6978         pdev->error_state = pci_channel_io_normal;
6979
6980         pci_restore_state(pdev);
6981
6982         /* pci_restore_state() clears the saved_state flag of the device
6983          * save restored state which resets saved_state flag
6984          */
6985         pci_save_state(pdev);
6986
6987         if (ha->mem_only)
6988                 rc = pci_enable_device_mem(pdev);
6989         else
6990                 rc = pci_enable_device(pdev);
6991
6992         if (rc) {
6993                 ql_log(ql_log_warn, base_vha, 0x9005,
6994                     "Can't re-enable PCI device after reset.\n");
6995                 goto exit_slot_reset;
6996         }
6997
6998
6999         if (ha->isp_ops->pci_config(base_vha))
7000                 goto exit_slot_reset;
7001
7002         mutex_lock(&ha->mq_lock);
7003         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7004                 qpair->online = 1;
7005         mutex_unlock(&ha->mq_lock);
7006
7007         base_vha->flags.online = 1;
7008         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7009         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
7010                 ret =  PCI_ERS_RESULT_RECOVERED;
7011         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7012
7013
7014 exit_slot_reset:
7015         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7016             "slot_reset return %x.\n", ret);
7017
7018         return ret;
7019 }
7020
7021 static void
7022 qla2xxx_pci_resume(struct pci_dev *pdev)
7023 {
7024         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7025         struct qla_hw_data *ha = base_vha->hw;
7026         int ret;
7027
7028         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
7029             "pci_resume.\n");
7030
7031         ha->flags.eeh_busy = 0;
7032
7033         ret = qla2x00_wait_for_hba_online(base_vha);
7034         if (ret != QLA_SUCCESS) {
7035                 ql_log(ql_log_fatal, base_vha, 0x9002,
7036                     "The device failed to resume I/O from slot/link_reset.\n");
7037         }
7038 }
7039
7040 static void
7041 qla_pci_reset_prepare(struct pci_dev *pdev)
7042 {
7043         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7044         struct qla_hw_data *ha = base_vha->hw;
7045         struct qla_qpair *qpair;
7046
7047         ql_log(ql_log_warn, base_vha, 0xffff,
7048             "%s.\n", __func__);
7049
7050         /*
7051          * PCI FLR/function reset is about to reset the
7052          * slot. Stop the chip to stop all DMA access.
7053          * It is assumed that pci_reset_done will be called
7054          * after FLR to resume Chip operation.
7055          */
7056         ha->flags.eeh_busy = 1;
7057         mutex_lock(&ha->mq_lock);
7058         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7059                 qpair->online = 0;
7060         mutex_unlock(&ha->mq_lock);
7061
7062         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7063         qla2x00_abort_isp_cleanup(base_vha);
7064         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
7065 }
7066
7067 static void
7068 qla_pci_reset_done(struct pci_dev *pdev)
7069 {
7070         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7071         struct qla_hw_data *ha = base_vha->hw;
7072         struct qla_qpair *qpair;
7073
7074         ql_log(ql_log_warn, base_vha, 0xffff,
7075             "%s.\n", __func__);
7076
7077         /*
7078          * FLR just completed by PCI layer. Resume adapter
7079          */
7080         ha->flags.eeh_busy = 0;
7081         mutex_lock(&ha->mq_lock);
7082         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7083                 qpair->online = 1;
7084         mutex_unlock(&ha->mq_lock);
7085
7086         base_vha->flags.online = 1;
7087         ha->isp_ops->abort_isp(base_vha);
7088         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7089 }
7090
7091 static int qla2xxx_map_queues(struct Scsi_Host *shost)
7092 {
7093         int rc;
7094         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
7095         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
7096
7097         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
7098                 rc = blk_mq_map_queues(qmap);
7099         else
7100                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
7101         return rc;
7102 }
7103
7104 struct scsi_host_template qla2xxx_driver_template = {
7105         .module                 = THIS_MODULE,
7106         .name                   = QLA2XXX_DRIVER_NAME,
7107         .queuecommand           = qla2xxx_queuecommand,
7108
7109         .eh_timed_out           = fc_eh_timed_out,
7110         .eh_abort_handler       = qla2xxx_eh_abort,
7111         .eh_device_reset_handler = qla2xxx_eh_device_reset,
7112         .eh_target_reset_handler = qla2xxx_eh_target_reset,
7113         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
7114         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
7115
7116         .slave_configure        = qla2xxx_slave_configure,
7117
7118         .slave_alloc            = qla2xxx_slave_alloc,
7119         .slave_destroy          = qla2xxx_slave_destroy,
7120         .scan_finished          = qla2xxx_scan_finished,
7121         .scan_start             = qla2xxx_scan_start,
7122         .change_queue_depth     = scsi_change_queue_depth,
7123         .map_queues             = qla2xxx_map_queues,
7124         .this_id                = -1,
7125         .cmd_per_lun            = 3,
7126         .sg_tablesize           = SG_ALL,
7127
7128         .max_sectors            = 0xFFFF,
7129         .shost_attrs            = qla2x00_host_attrs,
7130
7131         .supported_mode         = MODE_INITIATOR,
7132         .track_queue_depth      = 1,
7133         .cmd_size               = sizeof(srb_t),
7134 };
7135
7136 static const struct pci_error_handlers qla2xxx_err_handler = {
7137         .error_detected = qla2xxx_pci_error_detected,
7138         .mmio_enabled = qla2xxx_pci_mmio_enabled,
7139         .slot_reset = qla2xxx_pci_slot_reset,
7140         .resume = qla2xxx_pci_resume,
7141         .reset_prepare = qla_pci_reset_prepare,
7142         .reset_done = qla_pci_reset_done,
7143 };
7144
7145 static struct pci_device_id qla2xxx_pci_tbl[] = {
7146         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
7147         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
7148         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
7149         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
7150         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
7151         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
7152         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
7153         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
7154         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
7155         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
7156         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
7157         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
7158         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
7159         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
7160         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
7161         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
7162         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
7163         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
7164         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
7165         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
7166         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
7167         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
7168         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
7169         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
7170         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
7171         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
7172         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
7173         { 0 },
7174 };
7175 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
7176
7177 static struct pci_driver qla2xxx_pci_driver = {
7178         .name           = QLA2XXX_DRIVER_NAME,
7179         .driver         = {
7180                 .owner          = THIS_MODULE,
7181         },
7182         .id_table       = qla2xxx_pci_tbl,
7183         .probe          = qla2x00_probe_one,
7184         .remove         = qla2x00_remove_one,
7185         .shutdown       = qla2x00_shutdown,
7186         .err_handler    = &qla2xxx_err_handler,
7187 };
7188
7189 static const struct file_operations apidev_fops = {
7190         .owner = THIS_MODULE,
7191         .llseek = noop_llseek,
7192 };
7193
7194 /**
7195  * qla2x00_module_init - Module initialization.
7196  **/
7197 static int __init
7198 qla2x00_module_init(void)
7199 {
7200         int ret = 0;
7201
7202         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
7203         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
7204         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
7205         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
7206         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
7207         BUILD_BUG_ON(sizeof(request_t) != 64);
7208         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
7209         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
7210         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
7211         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
7212         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
7213         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
7214         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
7215         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
7216         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
7217         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
7218         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
7219         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
7220         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
7221         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
7222         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
7223         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
7224         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
7225
7226         /* Allocate cache for SRBs. */
7227         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
7228             SLAB_HWCACHE_ALIGN, NULL);
7229         if (srb_cachep == NULL) {
7230                 ql_log(ql_log_fatal, NULL, 0x0001,
7231                     "Unable to allocate SRB cache...Failing load!.\n");
7232                 return -ENOMEM;
7233         }
7234
7235         /* Initialize target kmem_cache and mem_pools */
7236         ret = qlt_init();
7237         if (ret < 0) {
7238                 goto destroy_cache;
7239         } else if (ret > 0) {
7240                 /*
7241                  * If initiator mode is explictly disabled by qlt_init(),
7242                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7243                  * performing scsi_scan_target() during LOOP UP event.
7244                  */
7245                 qla2xxx_transport_functions.disable_target_scan = 1;
7246                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
7247         }
7248
7249         /* Derive version string. */
7250         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
7251         if (ql2xextended_error_logging)
7252                 strcat(qla2x00_version_str, "-debug");
7253         if (ql2xextended_error_logging == 1)
7254                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
7255
7256         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
7257                 qla_insert_tgt_attrs();
7258
7259         qla2xxx_transport_template =
7260             fc_attach_transport(&qla2xxx_transport_functions);
7261         if (!qla2xxx_transport_template) {
7262                 ql_log(ql_log_fatal, NULL, 0x0002,
7263                     "fc_attach_transport failed...Failing load!.\n");
7264                 ret = -ENODEV;
7265                 goto qlt_exit;
7266         }
7267
7268         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7269         if (apidev_major < 0) {
7270                 ql_log(ql_log_fatal, NULL, 0x0003,
7271                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7272         }
7273
7274         qla2xxx_transport_vport_template =
7275             fc_attach_transport(&qla2xxx_transport_vport_functions);
7276         if (!qla2xxx_transport_vport_template) {
7277                 ql_log(ql_log_fatal, NULL, 0x0004,
7278                     "fc_attach_transport vport failed...Failing load!.\n");
7279                 ret = -ENODEV;
7280                 goto unreg_chrdev;
7281         }
7282         ql_log(ql_log_info, NULL, 0x0005,
7283             "QLogic Fibre Channel HBA Driver: %s.\n",
7284             qla2x00_version_str);
7285         ret = pci_register_driver(&qla2xxx_pci_driver);
7286         if (ret) {
7287                 ql_log(ql_log_fatal, NULL, 0x0006,
7288                     "pci_register_driver failed...ret=%d Failing load!.\n",
7289                     ret);
7290                 goto release_vport_transport;
7291         }
7292         return ret;
7293
7294 release_vport_transport:
7295         fc_release_transport(qla2xxx_transport_vport_template);
7296
7297 unreg_chrdev:
7298         if (apidev_major >= 0)
7299                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7300         fc_release_transport(qla2xxx_transport_template);
7301
7302 qlt_exit:
7303         qlt_exit();
7304
7305 destroy_cache:
7306         kmem_cache_destroy(srb_cachep);
7307         return ret;
7308 }
7309
7310 /**
7311  * qla2x00_module_exit - Module cleanup.
7312  **/
7313 static void __exit
7314 qla2x00_module_exit(void)
7315 {
7316         pci_unregister_driver(&qla2xxx_pci_driver);
7317         qla2x00_release_firmware();
7318         kmem_cache_destroy(ctx_cachep);
7319         fc_release_transport(qla2xxx_transport_vport_template);
7320         if (apidev_major >= 0)
7321                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7322         fc_release_transport(qla2xxx_transport_template);
7323         qlt_exit();
7324         kmem_cache_destroy(srb_cachep);
7325 }
7326
7327 module_init(qla2x00_module_init);
7328 module_exit(qla2x00_module_exit);
7329
7330 MODULE_AUTHOR("QLogic Corporation");
7331 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7332 MODULE_LICENSE("GPL");
7333 MODULE_VERSION(QLA2XXX_VERSION);
7334 MODULE_FIRMWARE(FW_FILE_ISP21XX);
7335 MODULE_FIRMWARE(FW_FILE_ISP22XX);
7336 MODULE_FIRMWARE(FW_FILE_ISP2300);
7337 MODULE_FIRMWARE(FW_FILE_ISP2322);
7338 MODULE_FIRMWARE(FW_FILE_ISP24XX);
7339 MODULE_FIRMWARE(FW_FILE_ISP25XX);