drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18
  19 #include <scsi/scsi_tcq.h>
  20 #include <scsi/scsicam.h>
  21 #include <scsi/scsi_transport.h>
  22 #include <scsi/scsi_transport_fc.h>
  23
  24 #include "qla_target.h"
  25
  26 /*
  27  * Driver version
  28  */
  29 char qla2x00_version_str[40];
  30
  31 static int apidev_major;
  32
  33 /*
  34  * SRB allocation cache
  35  */
  36 struct kmem_cache *srb_cachep;
  37
  38 /*
  39  * CT6 CTX allocation cache
  40  */
  41 static struct kmem_cache *ctx_cachep;
  42 /*
  43  * error level for logging
  44  */
  45 int ql_errlev = ql_log_all;
  46
  47 static int ql2xenableclass2;
  48 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  49 MODULE_PARM_DESC(ql2xenableclass2,
  50                 "Specify if Class 2 operations are supported from the very "
  51                 "beginning. Default is 0 - class 2 not supported.");
  52
  53
  54 int ql2xlogintimeout = 20;
  55 module_param(ql2xlogintimeout, int, S_IRUGO);
  56 MODULE_PARM_DESC(ql2xlogintimeout,
  57                 "Login timeout value in seconds.");
  58
  59 int qlport_down_retry;
  60 module_param(qlport_down_retry, int, S_IRUGO);
  61 MODULE_PARM_DESC(qlport_down_retry,
  62                 "Maximum number of command retries to a port that returns "
  63                 "a PORT-DOWN status.");
  64
  65 int ql2xplogiabsentdevice;
  66 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  67 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  68                 "Option to enable PLOGI to devices that are not present after "
  69                 "a Fabric scan.  This is needed for several broken switches. "
  70                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  71
  72 int ql2xloginretrycount = 0;
  73 module_param(ql2xloginretrycount, int, S_IRUGO);
  74 MODULE_PARM_DESC(ql2xloginretrycount,
  75                 "Specify an alternate value for the NVRAM login retry count.");
  76
  77 int ql2xallocfwdump = 1;
  78 module_param(ql2xallocfwdump, int, S_IRUGO);
  79 MODULE_PARM_DESC(ql2xallocfwdump,
  80                 "Option to enable allocation of memory for a firmware dump "
  81                 "during HBA initialization.  Memory allocation requirements "
  82                 "vary by ISP type.  Default is 1 - allocate memory.");
  83
  84 int ql2xextended_error_logging;
  85 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  86 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  87 MODULE_PARM_DESC(ql2xextended_error_logging,
  88                 "Option to enable extended error logging,\n"
  89                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  90                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  91                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  92                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  93                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  94                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  95                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  96                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  97                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  98                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  99                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 100                 "\t\t0x1e400000 - Preferred value for capturing essential "
 101                 "debug information (equivalent to old "
 102                 "ql2xextended_error_logging=1).\n"
 103                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 104
 105 int ql2xshiftctondsd = 6;
 106 module_param(ql2xshiftctondsd, int, S_IRUGO);
 107 MODULE_PARM_DESC(ql2xshiftctondsd,
 108                 "Set to control shifting of command type processing "
 109                 "based on total number of SG elements.");
 110
 111 int ql2xfdmienable=1;
 112 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 113 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 114 MODULE_PARM_DESC(ql2xfdmienable,
 115                 "Enables FDMI registrations. "
 116                 "0 - no FDMI. Default is 1 - perform FDMI.");
 117
 118 #define MAX_Q_DEPTH     64
 119 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 120 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 121 MODULE_PARM_DESC(ql2xmaxqdepth,
 122                 "Maximum queue depth to set for each LUN. "
 123                 "Default is 64.");
 124
 125 #if (IS_ENABLED(CONFIG_NVME_FC))
 126 int ql2xenabledif;
 127 #else
 128 int ql2xenabledif = 2;
 129 #endif
 130 module_param(ql2xenabledif, int, S_IRUGO);
 131 MODULE_PARM_DESC(ql2xenabledif,
 132                 " Enable T10-CRC-DIF:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- No DIF Support\n"
 135                 "  1 -- Enable DIF for all types\n"
 136                 "  2 -- Enable DIF for all types, except Type 0.\n");
 137
 138 #if (IS_ENABLED(CONFIG_NVME_FC))
 139 int ql2xnvmeenable = 1;
 140 #else
 141 int ql2xnvmeenable;
 142 #endif
 143 module_param(ql2xnvmeenable, int, 0644);
 144 MODULE_PARM_DESC(ql2xnvmeenable,
 145     "Enables NVME support. "
 146     "0 - no NVMe.  Default is Y");
 147
 148 int ql2xenablehba_err_chk = 2;
 149 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 150 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 151                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 152                 " Default is 2.\n"
 153                 "  0 -- Error isolation disabled\n"
 154                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 155                 "  2 -- Error isolation enabled for all Types\n");
 156
 157 int ql2xiidmaenable=1;
 158 module_param(ql2xiidmaenable, int, S_IRUGO);
 159 MODULE_PARM_DESC(ql2xiidmaenable,
 160                 "Enables iIDMA settings "
 161                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 162
 163 int ql2xmqsupport = 1;
 164 module_param(ql2xmqsupport, int, S_IRUGO);
 165 MODULE_PARM_DESC(ql2xmqsupport,
 166                 "Enable on demand multiple queue pairs support "
 167                 "Default is 1 for supported. "
 168                 "Set it to 0 to turn off mq qpair support.");
 169
 170 int ql2xfwloadbin;
 171 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 172 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 173 MODULE_PARM_DESC(ql2xfwloadbin,
 174                 "Option to specify location from which to load ISP firmware:.\n"
 175                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 176                 "      interface.\n"
 177                 " 1 -- load firmware from flash.\n"
 178                 " 0 -- use default semantics.\n");
 179
 180 int ql2xetsenable;
 181 module_param(ql2xetsenable, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xetsenable,
 183                 "Enables firmware ETS burst."
 184                 "Default is 0 - skip ETS enablement.");
 185
 186 int ql2xdbwr = 1;
 187 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 188 MODULE_PARM_DESC(ql2xdbwr,
 189                 "Option to specify scheme for request queue posting.\n"
 190                 " 0 -- Regular doorbell.\n"
 191                 " 1 -- CAMRAM doorbell (faster).\n");
 192
 193 int ql2xtargetreset = 1;
 194 module_param(ql2xtargetreset, int, S_IRUGO);
 195 MODULE_PARM_DESC(ql2xtargetreset,
 196                  "Enable target reset."
 197                  "Default is 1 - use hw defaults.");
 198
 199 int ql2xgffidenable;
 200 module_param(ql2xgffidenable, int, S_IRUGO);
 201 MODULE_PARM_DESC(ql2xgffidenable,
 202                 "Enables GFF_ID checks of port type. "
 203                 "Default is 0 - Do not use GFF_ID information.");
 204
 205 int ql2xasynctmfenable = 1;
 206 module_param(ql2xasynctmfenable, int, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xasynctmfenable,
 208                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 209                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 210
 211 int ql2xdontresethba;
 212 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 213 MODULE_PARM_DESC(ql2xdontresethba,
 214                 "Option to specify reset behaviour.\n"
 215                 " 0 (Default) -- Reset on failure.\n"
 216                 " 1 -- Do not reset on failure.\n");
 217
 218 uint64_t ql2xmaxlun = MAX_LUNS;
 219 module_param(ql2xmaxlun, ullong, S_IRUGO);
 220 MODULE_PARM_DESC(ql2xmaxlun,
 221                 "Defines the maximum LU number to register with the SCSI "
 222                 "midlayer. Default is 65535.");
 223
 224 int ql2xmdcapmask = 0x1F;
 225 module_param(ql2xmdcapmask, int, S_IRUGO);
 226 MODULE_PARM_DESC(ql2xmdcapmask,
 227                 "Set the Minidump driver capture mask level. "
 228                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 229
 230 int ql2xmdenable = 1;
 231 module_param(ql2xmdenable, int, S_IRUGO);
 232 MODULE_PARM_DESC(ql2xmdenable,
 233                 "Enable/disable MiniDump. "
 234                 "0 - MiniDump disabled. "
 235                 "1 (Default) - MiniDump enabled.");
 236
 237 int ql2xexlogins = 0;
 238 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 239 MODULE_PARM_DESC(ql2xexlogins,
 240                  "Number of extended Logins. "
 241                  "0 (Default)- Disabled.");
 242
 243 int ql2xexchoffld = 1024;
 244 module_param(ql2xexchoffld, uint, 0644);
 245 MODULE_PARM_DESC(ql2xexchoffld,
 246         "Number of target exchanges.");
 247
 248 int ql2xiniexchg = 1024;
 249 module_param(ql2xiniexchg, uint, 0644);
 250 MODULE_PARM_DESC(ql2xiniexchg,
 251         "Number of initiator exchanges.");
 252
 253 int ql2xfwholdabts = 0;
 254 module_param(ql2xfwholdabts, int, S_IRUGO);
 255 MODULE_PARM_DESC(ql2xfwholdabts,
 256                 "Allow FW to hold status IOCB until ABTS rsp received. "
 257                 "0 (Default) Do not set fw option. "
 258                 "1 - Set fw option to hold ABTS.");
 259
 260 int ql2xmvasynctoatio = 1;
 261 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 262 MODULE_PARM_DESC(ql2xmvasynctoatio,
 263                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 264                 "0 (Default). Do not move IOCBs"
 265                 "1 - Move IOCBs.");
 266
 267 int ql2xautodetectsfp = 1;
 268 module_param(ql2xautodetectsfp, int, 0444);
 269 MODULE_PARM_DESC(ql2xautodetectsfp,
 270                  "Detect SFP range and set appropriate distance.\n"
 271                  "1 (Default): Enable\n");
 272
 273 int ql2xenablemsix = 1;
 274 module_param(ql2xenablemsix, int, 0444);
 275 MODULE_PARM_DESC(ql2xenablemsix,
 276                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 277                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 278                  " 0 -- enable traditional pin-based mechanism.\n"
 279                  " 1 -- enable MSI-X interrupt mechanism.\n"
 280                  " 2 -- enable MSI interrupt mechanism.\n");
 281
 282 int qla2xuseresexchforels;
 283 module_param(qla2xuseresexchforels, int, 0444);
 284 MODULE_PARM_DESC(qla2xuseresexchforels,
 285                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 286                  " 0 (default): disabled");
 287
 288 /*
 289  * SCSI host template entry points
 290  */
 291 static int qla2xxx_slave_configure(struct scsi_device * device);
 292 static int qla2xxx_slave_alloc(struct scsi_device *);
 293 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 294 static void qla2xxx_scan_start(struct Scsi_Host *);
 295 static void qla2xxx_slave_destroy(struct scsi_device *);
 296 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 297 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 298 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 299 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 300 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 301 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 302
 303 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 304 static void qla2x00_free_device(scsi_qla_host_t *);
 305 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 306 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 307
 308
 309 struct scsi_host_template qla2xxx_driver_template = {
 310         .module                 = THIS_MODULE,
 311         .name                   = QLA2XXX_DRIVER_NAME,
 312         .queuecommand           = qla2xxx_queuecommand,
 313
 314         .eh_timed_out           = fc_eh_timed_out,
 315         .eh_abort_handler       = qla2xxx_eh_abort,
 316         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 317         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 318         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 319         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 320
 321         .slave_configure        = qla2xxx_slave_configure,
 322
 323         .slave_alloc            = qla2xxx_slave_alloc,
 324         .slave_destroy          = qla2xxx_slave_destroy,
 325         .scan_finished          = qla2xxx_scan_finished,
 326         .scan_start             = qla2xxx_scan_start,
 327         .change_queue_depth     = scsi_change_queue_depth,
 328         .map_queues             = qla2xxx_map_queues,
 329         .this_id                = -1,
 330         .cmd_per_lun            = 3,
 331         .use_clustering         = ENABLE_CLUSTERING,
 332         .sg_tablesize           = SG_ALL,
 333
 334         .max_sectors            = 0xFFFF,
 335         .shost_attrs            = qla2x00_host_attrs,
 336
 337         .supported_mode         = MODE_INITIATOR,
 338         .track_queue_depth      = 1,
 339 };
 340
 341 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 342 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 343
 344 /* TODO Convert to inlines
 345  *
 346  * Timer routines
 347  */
 348
 349 __inline__ void
 350 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 351 {
 352         timer_setup(&vha->timer, qla2x00_timer, 0);
 353         vha->timer.expires = jiffies + interval * HZ;
 354         add_timer(&vha->timer);
 355         vha->timer_active = 1;
 356 }
 357
 358 static inline void
 359 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 360 {
 361         /* Currently used for 82XX only. */
 362         if (vha->device_flags & DFLG_DEV_FAILED) {
 363                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 364                     "Device in a failed state, returning.\n");
 365                 return;
 366         }
 367
 368         mod_timer(&vha->timer, jiffies + interval * HZ);
 369 }
 370
 371 static __inline__ void
 372 qla2x00_stop_timer(scsi_qla_host_t *vha)
 373 {
 374         del_timer_sync(&vha->timer);
 375         vha->timer_active = 0;
 376 }
 377
 378 static int qla2x00_do_dpc(void *data);
 379
 380 static void qla2x00_rst_aen(scsi_qla_host_t *);
 381
 382 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 383         struct req_que **, struct rsp_que **);
 384 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 385 static void qla2x00_mem_free(struct qla_hw_data *);
 386 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 387         struct qla_qpair *qpair);
 388
 389 /* -------------------------------------------------------------------------- */
 390 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 391     struct rsp_que *rsp)
 392 {
 393         struct qla_hw_data *ha = vha->hw;
 394         rsp->qpair = ha->base_qpair;
 395         rsp->req = req;
 396         ha->base_qpair->hw = ha;
 397         ha->base_qpair->req = req;
 398         ha->base_qpair->rsp = rsp;
 399         ha->base_qpair->vha = vha;
 400         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 401         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 402         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 403         ha->base_qpair->srb_mempool = ha->srb_mempool;
 404         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 405         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 406         /* init qpair to this cpu. Will adjust at run time. */
 407         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 408         ha->base_qpair->pdev = ha->pdev;
 409
 410         if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
 411                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 412 }
 413
 414 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 415                                 struct rsp_que *rsp)
 416 {
 417         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 418         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 419                                 GFP_KERNEL);
 420         if (!ha->req_q_map) {
 421                 ql_log(ql_log_fatal, vha, 0x003b,
 422                     "Unable to allocate memory for request queue ptrs.\n");
 423                 goto fail_req_map;
 424         }
 425
 426         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 427                                 GFP_KERNEL);
 428         if (!ha->rsp_q_map) {
 429                 ql_log(ql_log_fatal, vha, 0x003c,
 430                     "Unable to allocate memory for response queue ptrs.\n");
 431                 goto fail_rsp_map;
 432         }
 433
 434         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 435         if (ha->base_qpair == NULL) {
 436                 ql_log(ql_log_warn, vha, 0x00e0,
 437                     "Failed to allocate base queue pair memory.\n");
 438                 goto fail_base_qpair;
 439         }
 440
 441         qla_init_base_qpair(vha, req, rsp);
 442
 443         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 444                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 445                         GFP_KERNEL);
 446                 if (!ha->queue_pair_map) {
 447                         ql_log(ql_log_fatal, vha, 0x0180,
 448                             "Unable to allocate memory for queue pair ptrs.\n");
 449                         goto fail_qpair_map;
 450                 }
 451         }
 452
 453         /*
 454          * Make sure we record at least the request and response queue zero in
 455          * case we need to free them if part of the probe fails.
 456          */
 457         ha->rsp_q_map[0] = rsp;
 458         ha->req_q_map[0] = req;
 459         set_bit(0, ha->rsp_qid_map);
 460         set_bit(0, ha->req_qid_map);
 461         return 0;
 462
 463 fail_qpair_map:
 464         kfree(ha->base_qpair);
 465         ha->base_qpair = NULL;
 466 fail_base_qpair:
 467         kfree(ha->rsp_q_map);
 468         ha->rsp_q_map = NULL;
 469 fail_rsp_map:
 470         kfree(ha->req_q_map);
 471         ha->req_q_map = NULL;
 472 fail_req_map:
 473         return -ENOMEM;
 474 }
 475
 476 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 477 {
 478         if (IS_QLAFX00(ha)) {
 479                 if (req && req->ring_fx00)
 480                         dma_free_coherent(&ha->pdev->dev,
 481                             (req->length_fx00 + 1) * sizeof(request_t),
 482                             req->ring_fx00, req->dma_fx00);
 483         } else if (req && req->ring)
 484                 dma_free_coherent(&ha->pdev->dev,
 485                 (req->length + 1) * sizeof(request_t),
 486                 req->ring, req->dma);
 487
 488         if (req)
 489                 kfree(req->outstanding_cmds);
 490
 491         kfree(req);
 492 }
 493
 494 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 495 {
 496         if (IS_QLAFX00(ha)) {
 497                 if (rsp && rsp->ring_fx00)
 498                         dma_free_coherent(&ha->pdev->dev,
 499                             (rsp->length_fx00 + 1) * sizeof(request_t),
 500                             rsp->ring_fx00, rsp->dma_fx00);
 501         } else if (rsp && rsp->ring) {
 502                 dma_free_coherent(&ha->pdev->dev,
 503                 (rsp->length + 1) * sizeof(response_t),
 504                 rsp->ring, rsp->dma);
 505         }
 506         kfree(rsp);
 507 }
 508
 509 static void qla2x00_free_queues(struct qla_hw_data *ha)
 510 {
 511         struct req_que *req;
 512         struct rsp_que *rsp;
 513         int cnt;
 514         unsigned long flags;
 515
 516         if (ha->queue_pair_map) {
 517                 kfree(ha->queue_pair_map);
 518                 ha->queue_pair_map = NULL;
 519         }
 520         if (ha->base_qpair) {
 521                 kfree(ha->base_qpair);
 522                 ha->base_qpair = NULL;
 523         }
 524
 525         spin_lock_irqsave(&ha->hardware_lock, flags);
 526         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 527                 if (!test_bit(cnt, ha->req_qid_map))
 528                         continue;
 529
 530                 req = ha->req_q_map[cnt];
 531                 clear_bit(cnt, ha->req_qid_map);
 532                 ha->req_q_map[cnt] = NULL;
 533
 534                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 535                 qla2x00_free_req_que(ha, req);
 536                 spin_lock_irqsave(&ha->hardware_lock, flags);
 537         }
 538         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 539
 540         kfree(ha->req_q_map);
 541         ha->req_q_map = NULL;
 542
 543
 544         spin_lock_irqsave(&ha->hardware_lock, flags);
 545         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 546                 if (!test_bit(cnt, ha->rsp_qid_map))
 547                         continue;
 548
 549                 rsp = ha->rsp_q_map[cnt];
 550                 clear_bit(cnt, ha->rsp_qid_map);
 551                 ha->rsp_q_map[cnt] =  NULL;
 552                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 553                 qla2x00_free_rsp_que(ha, rsp);
 554                 spin_lock_irqsave(&ha->hardware_lock, flags);
 555         }
 556         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 557
 558         kfree(ha->rsp_q_map);
 559         ha->rsp_q_map = NULL;
 560 }
 561
 562 static char *
 563 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 564 {
 565         struct qla_hw_data *ha = vha->hw;
 566         static char *pci_bus_modes[] = {
 567                 "33", "66", "100", "133",
 568         };
 569         uint16_t pci_bus;
 570
 571         strcpy(str, "PCI");
 572         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 573         if (pci_bus) {
 574                 strcat(str, "-X (");
 575                 strcat(str, pci_bus_modes[pci_bus]);
 576         } else {
 577                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 578                 strcat(str, " (");
 579                 strcat(str, pci_bus_modes[pci_bus]);
 580         }
 581         strcat(str, " MHz)");
 582
 583         return (str);
 584 }
 585
 586 static char *
 587 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 588 {
 589         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 590         struct qla_hw_data *ha = vha->hw;
 591         uint32_t pci_bus;
 592
 593         if (pci_is_pcie(ha->pdev)) {
 594                 char lwstr[6];
 595                 uint32_t lstat, lspeed, lwidth;
 596
 597                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 598                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 599                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 600
 601                 strcpy(str, "PCIe (");
 602                 switch (lspeed) {
 603                 case 1:
 604                         strcat(str, "2.5GT/s ");
 605                         break;
 606                 case 2:
 607                         strcat(str, "5.0GT/s ");
 608                         break;
 609                 case 3:
 610                         strcat(str, "8.0GT/s ");
 611                         break;
 612                 default:
 613                         strcat(str, "<unknown> ");
 614                         break;
 615                 }
 616                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 617                 strcat(str, lwstr);
 618
 619                 return str;
 620         }
 621
 622         strcpy(str, "PCI");
 623         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 624         if (pci_bus == 0 || pci_bus == 8) {
 625                 strcat(str, " (");
 626                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 627         } else {
 628                 strcat(str, "-X ");
 629                 if (pci_bus & BIT_2)
 630                         strcat(str, "Mode 2");
 631                 else
 632                         strcat(str, "Mode 1");
 633                 strcat(str, " (");
 634                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 635         }
 636         strcat(str, " MHz)");
 637
 638         return str;
 639 }
 640
 641 static char *
 642 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 643 {
 644         char un_str[10];
 645         struct qla_hw_data *ha = vha->hw;
 646
 647         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 648             ha->fw_minor_version, ha->fw_subminor_version);
 649
 650         if (ha->fw_attributes & BIT_9) {
 651                 strcat(str, "FLX");
 652                 return (str);
 653         }
 654
 655         switch (ha->fw_attributes & 0xFF) {
 656         case 0x7:
 657                 strcat(str, "EF");
 658                 break;
 659         case 0x17:
 660                 strcat(str, "TP");
 661                 break;
 662         case 0x37:
 663                 strcat(str, "IP");
 664                 break;
 665         case 0x77:
 666                 strcat(str, "VI");
 667                 break;
 668         default:
 669                 sprintf(un_str, "(%x)", ha->fw_attributes);
 670                 strcat(str, un_str);
 671                 break;
 672         }
 673         if (ha->fw_attributes & 0x100)
 674                 strcat(str, "X");
 675
 676         return (str);
 677 }
 678
 679 static char *
 680 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 681 {
 682         struct qla_hw_data *ha = vha->hw;
 683
 684         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 685             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 686         return str;
 687 }
 688
 689 void
 690 qla2x00_sp_free_dma(void *ptr)
 691 {
 692         srb_t *sp = ptr;
 693         struct qla_hw_data *ha = sp->vha->hw;
 694         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 695         void *ctx = GET_CMD_CTX_SP(sp);
 696
 697         if (sp->flags & SRB_DMA_VALID) {
 698                 scsi_dma_unmap(cmd);
 699                 sp->flags &= ~SRB_DMA_VALID;
 700         }
 701
 702         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 703                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 704                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 705                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 706         }
 707
 708         if (!ctx)
 709                 goto end;
 710
 711         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 712                 /* List assured to be having elements */
 713                 qla2x00_clean_dsd_pool(ha, ctx);
 714                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 715         }
 716
 717         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 718                 struct crc_context *ctx0 = ctx;
 719
 720                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 721                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 722         }
 723
 724         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 725                 struct ct6_dsd *ctx1 = ctx;
 726
 727                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 728                     ctx1->fcp_cmnd_dma);
 729                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 730                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 731                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 732                 mempool_free(ctx1, ha->ctx_mempool);
 733         }
 734
 735 end:
 736         if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
 737                 CMD_SP(cmd) = NULL;
 738                 qla2x00_rel_sp(sp);
 739         }
 740 }
 741
 742 void
 743 qla2x00_sp_compl(void *ptr, int res)
 744 {
 745         srb_t *sp = ptr;
 746         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 747
 748         cmd->result = res;
 749
 750         if (atomic_read(&sp->ref_count) == 0) {
 751                 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
 752                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 753                     sp, GET_CMD_SP(sp));
 754                 if (ql2xextended_error_logging & ql_dbg_io)
 755                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 756                 return;
 757         }
 758         if (!atomic_dec_and_test(&sp->ref_count))
 759                 return;
 760
 761         sp->free(sp);
 762         cmd->scsi_done(cmd);
 763 }
 764
 765 void
 766 qla2xxx_qpair_sp_free_dma(void *ptr)
 767 {
 768         srb_t *sp = (srb_t *)ptr;
 769         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 770         struct qla_hw_data *ha = sp->fcport->vha->hw;
 771         void *ctx = GET_CMD_CTX_SP(sp);
 772
 773         if (sp->flags & SRB_DMA_VALID) {
 774                 scsi_dma_unmap(cmd);
 775                 sp->flags &= ~SRB_DMA_VALID;
 776         }
 777
 778         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 779                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 780                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 781                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 782         }
 783
 784         if (!ctx)
 785                 goto end;
 786
 787         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 788                 /* List assured to be having elements */
 789                 qla2x00_clean_dsd_pool(ha, ctx);
 790                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 791         }
 792
 793         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 794                 struct crc_context *ctx0 = ctx;
 795
 796                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 797                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 798         }
 799
 800         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 801                 struct ct6_dsd *ctx1 = ctx;
 802                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 803                     ctx1->fcp_cmnd_dma);
 804                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 805                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 806                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 807                 mempool_free(ctx1, ha->ctx_mempool);
 808         }
 809 end:
 810         CMD_SP(cmd) = NULL;
 811         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 812 }
 813
 814 void
 815 qla2xxx_qpair_sp_compl(void *ptr, int res)
 816 {
 817         srb_t *sp = ptr;
 818         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 819
 820         cmd->result = res;
 821
 822         if (atomic_read(&sp->ref_count) == 0) {
 823                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 824                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 825                     sp, GET_CMD_SP(sp));
 826                 if (ql2xextended_error_logging & ql_dbg_io)
 827                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 828                 return;
 829         }
 830         if (!atomic_dec_and_test(&sp->ref_count))
 831                 return;
 832
 833         sp->free(sp);
 834         cmd->scsi_done(cmd);
 835 }
 836
 837 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 838  * does not have the changes necessary to avoid taking host->host_lock.
 839  */
 840 static int
 841 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 842 {
 843         scsi_qla_host_t *vha = shost_priv(host);
 844         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 845         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 846         struct qla_hw_data *ha = vha->hw;
 847         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 848         srb_t *sp;
 849         int rval;
 850         struct qla_qpair *qpair = NULL;
 851         uint32_t tag;
 852         uint16_t hwq;
 853
 854         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 855                 cmd->result = DID_NO_CONNECT << 16;
 856                 goto qc24_fail_command;
 857         }
 858
 859         if (ha->mqenable) {
 860                 if (shost_use_blk_mq(vha->host)) {
 861                         tag = blk_mq_unique_tag(cmd->request);
 862                         hwq = blk_mq_unique_tag_to_hwq(tag);
 863                         qpair = ha->queue_pair_map[hwq];
 864                 } else if (vha->vp_idx && vha->qpair) {
 865                         qpair = vha->qpair;
 866                 }
 867
 868                 if (qpair)
 869                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 870         }
 871
 872         if (ha->flags.eeh_busy) {
 873                 if (ha->flags.pci_channel_io_perm_failure) {
 874                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 875                             "PCI Channel IO permanent failure, exiting "
 876                             "cmd=%p.\n", cmd);
 877                         cmd->result = DID_NO_CONNECT << 16;
 878                 } else {
 879                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 880                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 881                         cmd->result = DID_REQUEUE << 16;
 882                 }
 883                 goto qc24_fail_command;
 884         }
 885
 886         rval = fc_remote_port_chkready(rport);
 887         if (rval) {
 888                 cmd->result = rval;
 889                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 890                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 891                     cmd, rval);
 892                 goto qc24_fail_command;
 893         }
 894
 895         if (!vha->flags.difdix_supported &&
 896                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 897                         ql_dbg(ql_dbg_io, vha, 0x3004,
 898                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 899                             cmd);
 900                         cmd->result = DID_NO_CONNECT << 16;
 901                         goto qc24_fail_command;
 902         }
 903
 904         if (!fcport) {
 905                 cmd->result = DID_NO_CONNECT << 16;
 906                 goto qc24_fail_command;
 907         }
 908
 909         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 910                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 911                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 912                         ql_dbg(ql_dbg_io, vha, 0x3005,
 913                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 914                             atomic_read(&fcport->state),
 915                             atomic_read(&base_vha->loop_state));
 916                         cmd->result = DID_NO_CONNECT << 16;
 917                         goto qc24_fail_command;
 918                 }
 919                 goto qc24_target_busy;
 920         }
 921
 922         /*
 923          * Return target busy if we've received a non-zero retry_delay_timer
 924          * in a FCP_RSP.
 925          */
 926         if (fcport->retry_delay_timestamp == 0) {
 927                 /* retry delay not set */
 928         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 929                 fcport->retry_delay_timestamp = 0;
 930         else
 931                 goto qc24_target_busy;
 932
 933         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 934         if (!sp)
 935                 goto qc24_host_busy;
 936
 937         sp->u.scmd.cmd = cmd;
 938         sp->type = SRB_SCSI_CMD;
 939         atomic_set(&sp->ref_count, 1);
 940         CMD_SP(cmd) = (void *)sp;
 941         sp->free = qla2x00_sp_free_dma;
 942         sp->done = qla2x00_sp_compl;
 943
 944         rval = ha->isp_ops->start_scsi(sp);
 945         if (rval != QLA_SUCCESS) {
 946                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 947                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 948                 goto qc24_host_busy_free_sp;
 949         }
 950
 951         return 0;
 952
 953 qc24_host_busy_free_sp:
 954         sp->free(sp);
 955
 956 qc24_host_busy:
 957         return SCSI_MLQUEUE_HOST_BUSY;
 958
 959 qc24_target_busy:
 960         return SCSI_MLQUEUE_TARGET_BUSY;
 961
 962 qc24_fail_command:
 963         cmd->scsi_done(cmd);
 964
 965         return 0;
 966 }
 967
 968 /* For MQ supported I/O */
 969 int
 970 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 971     struct qla_qpair *qpair)
 972 {
 973         scsi_qla_host_t *vha = shost_priv(host);
 974         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 975         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 976         struct qla_hw_data *ha = vha->hw;
 977         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 978         srb_t *sp;
 979         int rval;
 980
 981         rval = fc_remote_port_chkready(rport);
 982         if (rval) {
 983                 cmd->result = rval;
 984                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 985                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 986                     cmd, rval);
 987                 goto qc24_fail_command;
 988         }
 989
 990         if (!fcport) {
 991                 cmd->result = DID_NO_CONNECT << 16;
 992                 goto qc24_fail_command;
 993         }
 994
 995         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 996                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 997                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 998                         ql_dbg(ql_dbg_io, vha, 0x3077,
 999                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
1000                             atomic_read(&fcport->state),
1001                             atomic_read(&base_vha->loop_state));
1002                         cmd->result = DID_NO_CONNECT << 16;
1003                         goto qc24_fail_command;
1004                 }
1005                 goto qc24_target_busy;
1006         }
1007
1008         /*
1009          * Return target busy if we've received a non-zero retry_delay_timer
1010          * in a FCP_RSP.
1011          */
1012         if (fcport->retry_delay_timestamp == 0) {
1013                 /* retry delay not set */
1014         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1015                 fcport->retry_delay_timestamp = 0;
1016         else
1017                 goto qc24_target_busy;
1018
1019         sp = qla2xxx_get_qpair_sp(vha, qpair, fcport, GFP_ATOMIC);
1020         if (!sp)
1021                 goto qc24_host_busy;
1022
1023         sp->u.scmd.cmd = cmd;
1024         sp->type = SRB_SCSI_CMD;
1025         atomic_set(&sp->ref_count, 1);
1026         CMD_SP(cmd) = (void *)sp;
1027         sp->free = qla2xxx_qpair_sp_free_dma;
1028         sp->done = qla2xxx_qpair_sp_compl;
1029         sp->qpair = qpair;
1030
1031         rval = ha->isp_ops->start_scsi_mq(sp);
1032         if (rval != QLA_SUCCESS) {
1033                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1034                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1035                 if (rval == QLA_INTERFACE_ERROR)
1036                         goto qc24_fail_command;
1037                 goto qc24_host_busy_free_sp;
1038         }
1039
1040         return 0;
1041
1042 qc24_host_busy_free_sp:
1043         sp->free(sp);
1044
1045 qc24_host_busy:
1046         return SCSI_MLQUEUE_HOST_BUSY;
1047
1048 qc24_target_busy:
1049         return SCSI_MLQUEUE_TARGET_BUSY;
1050
1051 qc24_fail_command:
1052         cmd->scsi_done(cmd);
1053
1054         return 0;
1055 }
1056
1057 /*
1058  * qla2x00_eh_wait_on_command
1059  *    Waits for the command to be returned by the Firmware for some
1060  *    max time.
1061  *
1062  * Input:
1063  *    cmd = Scsi Command to wait on.
1064  *
1065  * Return:
1066  *    Not Found : 0
1067  *    Found : 1
1068  */
1069 static int
1070 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1071 {
1072 #define ABORT_POLLING_PERIOD    1000
1073 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1074         unsigned long wait_iter = ABORT_WAIT_ITER;
1075         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1076         struct qla_hw_data *ha = vha->hw;
1077         int ret = QLA_SUCCESS;
1078
1079         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1080                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1081                     "Return:eh_wait.\n");
1082                 return ret;
1083         }
1084
1085         while (CMD_SP(cmd) && wait_iter--) {
1086                 msleep(ABORT_POLLING_PERIOD);
1087         }
1088         if (CMD_SP(cmd))
1089                 ret = QLA_FUNCTION_FAILED;
1090
1091         return ret;
1092 }
1093
1094 /*
1095  * qla2x00_wait_for_hba_online
1096  *    Wait till the HBA is online after going through
1097  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1098  *    finally HBA is disabled ie marked offline
1099  *
1100  * Input:
1101  *     ha - pointer to host adapter structure
1102  *
1103  * Note:
1104  *    Does context switching-Release SPIN_LOCK
1105  *    (if any) before calling this routine.
1106  *
1107  * Return:
1108  *    Success (Adapter is online) : 0
1109  *    Failed  (Adapter is offline/disabled) : 1
1110  */
1111 int
1112 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1113 {
1114         int             return_status;
1115         unsigned long   wait_online;
1116         struct qla_hw_data *ha = vha->hw;
1117         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1118
1119         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1120         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1121             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1122             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1123             ha->dpc_active) && time_before(jiffies, wait_online)) {
1124
1125                 msleep(1000);
1126         }
1127         if (base_vha->flags.online)
1128                 return_status = QLA_SUCCESS;
1129         else
1130                 return_status = QLA_FUNCTION_FAILED;
1131
1132         return (return_status);
1133 }
1134
1135 static inline int test_fcport_count(scsi_qla_host_t *vha)
1136 {
1137         struct qla_hw_data *ha = vha->hw;
1138         unsigned long flags;
1139         int res;
1140
1141         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1142         ql_dbg(ql_dbg_init, vha, 0x00ec,
1143             "tgt %p, fcport_count=%d\n",
1144             vha, vha->fcport_count);
1145         res = (vha->fcport_count == 0);
1146         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1147
1148         return res;
1149 }
1150
1151 /*
1152  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1153  * it has dependency on UNLOADING flag to stop device discovery
1154  */
1155 void
1156 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1157 {
1158         qla2x00_mark_all_devices_lost(vha, 0);
1159
1160         wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1161 }
1162
1163 /*
1164  * qla2x00_wait_for_hba_ready
1165  * Wait till the HBA is ready before doing driver unload
1166  *
1167  * Input:
1168  *     ha - pointer to host adapter structure
1169  *
1170  * Note:
1171  *    Does context switching-Release SPIN_LOCK
1172  *    (if any) before calling this routine.
1173  *
1174  */
1175 static void
1176 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1177 {
1178         struct qla_hw_data *ha = vha->hw;
1179         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1180
1181         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1182                 ha->flags.mbox_busy) ||
1183                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1184                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1185                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1186                         break;
1187                 msleep(1000);
1188         }
1189 }
1190
1191 int
1192 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1193 {
1194         int             return_status;
1195         unsigned long   wait_reset;
1196         struct qla_hw_data *ha = vha->hw;
1197         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1198
1199         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1200         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1201             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1202             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1203             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1204
1205                 msleep(1000);
1206
1207                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1208                     ha->flags.chip_reset_done)
1209                         break;
1210         }
1211         if (ha->flags.chip_reset_done)
1212                 return_status = QLA_SUCCESS;
1213         else
1214                 return_status = QLA_FUNCTION_FAILED;
1215
1216         return return_status;
1217 }
1218
1219 static int
1220 sp_get(struct srb *sp)
1221 {
1222         if (!refcount_inc_not_zero((refcount_t*)&sp->ref_count))
1223                 /* kref get fail */
1224                 return ENXIO;
1225         else
1226                 return 0;
1227 }
1228
1229 #define ISP_REG_DISCONNECT 0xffffffffU
1230 /**************************************************************************
1231 * qla2x00_isp_reg_stat
1232 *
1233 * Description:
1234 *       Read the host status register of ISP before aborting the command.
1235 *
1236 * Input:
1237 *       ha = pointer to host adapter structure.
1238 *
1239 *
1240 * Returns:
1241 *       Either true or false.
1242 *
1243 * Note: Return true if there is register disconnect.
1244 **************************************************************************/
1245 static inline
1246 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1247 {
1248         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1249         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1250
1251         if (IS_P3P_TYPE(ha))
1252                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1253         else
1254                 return ((RD_REG_DWORD(&reg->host_status)) ==
1255                         ISP_REG_DISCONNECT);
1256 }
1257
1258 /**************************************************************************
1259 * qla2xxx_eh_abort
1260 *
1261 * Description:
1262 *    The abort function will abort the specified command.
1263 *
1264 * Input:
1265 *    cmd = Linux SCSI command packet to be aborted.
1266 *
1267 * Returns:
1268 *    Either SUCCESS or FAILED.
1269 *
1270 * Note:
1271 *    Only return FAILED if command not returned by firmware.
1272 **************************************************************************/
1273 static int
1274 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1275 {
1276         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1277         srb_t *sp;
1278         int ret;
1279         unsigned int id;
1280         uint64_t lun;
1281         unsigned long flags;
1282         int rval, wait = 0;
1283         struct qla_hw_data *ha = vha->hw;
1284         struct qla_qpair *qpair;
1285
1286         if (qla2x00_isp_reg_stat(ha)) {
1287                 ql_log(ql_log_info, vha, 0x8042,
1288                     "PCI/Register disconnect, exiting.\n");
1289                 return FAILED;
1290         }
1291
1292         ret = fc_block_scsi_eh(cmd);
1293         if (ret != 0)
1294                 return ret;
1295         ret = SUCCESS;
1296
1297         sp = (srb_t *) CMD_SP(cmd);
1298         if (!sp)
1299                 return SUCCESS;
1300
1301         qpair = sp->qpair;
1302         if (!qpair)
1303                 return SUCCESS;
1304
1305         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1306         if (!CMD_SP(cmd)) {
1307                 /* there's a chance an interrupt could clear
1308                    the ptr as part of done & free */
1309                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1310                 return SUCCESS;
1311         }
1312
1313         if (sp_get(sp)){
1314                 /* ref_count is already 0 */
1315                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1316                 return SUCCESS;
1317         }
1318         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1319
1320         id = cmd->device->id;
1321         lun = cmd->device->lun;
1322
1323         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1324             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1325             vha->host_no, id, lun, sp, cmd, sp->handle);
1326
1327         /* Get a reference to the sp and drop the lock.*/
1328
1329         rval = ha->isp_ops->abort_command(sp);
1330         if (rval) {
1331                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1332                         ret = SUCCESS;
1333                 else
1334                         ret = FAILED;
1335
1336                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1337                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1338         } else {
1339                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1340                     "Abort command mbx success cmd=%p.\n", cmd);
1341                 wait = 1;
1342         }
1343
1344         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1345         /*
1346          * Clear the slot in the oustanding_cmds array if we can't find the
1347          * command to reclaim the resources.
1348          */
1349         if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1350                 vha->req->outstanding_cmds[sp->handle] = NULL;
1351
1352         /*
1353          * sp->done will do ref_count--
1354          * sp_get() took an extra count above
1355          */
1356         sp->done(sp, DID_RESET << 16);
1357
1358         /* Did the command return during mailbox execution? */
1359         if (ret == FAILED && !CMD_SP(cmd))
1360                 ret = SUCCESS;
1361
1362         if (!CMD_SP(cmd))
1363                 wait = 0;
1364
1365         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1366
1367         /* Wait for the command to be returned. */
1368         if (wait) {
1369                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1370                         ql_log(ql_log_warn, vha, 0x8006,
1371                             "Abort handler timed out cmd=%p.\n", cmd);
1372                         ret = FAILED;
1373                 }
1374         }
1375
1376         ql_log(ql_log_info, vha, 0x801c,
1377             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1378             vha->host_no, id, lun, wait, ret);
1379
1380         return ret;
1381 }
1382
1383 int
1384 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1385         uint64_t l, enum nexus_wait_type type)
1386 {
1387         int cnt, match, status;
1388         unsigned long flags;
1389         struct qla_hw_data *ha = vha->hw;
1390         struct req_que *req;
1391         srb_t *sp;
1392         struct scsi_cmnd *cmd;
1393
1394         status = QLA_SUCCESS;
1395
1396         spin_lock_irqsave(&ha->hardware_lock, flags);
1397         req = vha->req;
1398         for (cnt = 1; status == QLA_SUCCESS &&
1399                 cnt < req->num_outstanding_cmds; cnt++) {
1400                 sp = req->outstanding_cmds[cnt];
1401                 if (!sp)
1402                         continue;
1403                 if (sp->type != SRB_SCSI_CMD)
1404                         continue;
1405                 if (vha->vp_idx != sp->vha->vp_idx)
1406                         continue;
1407                 match = 0;
1408                 cmd = GET_CMD_SP(sp);
1409                 switch (type) {
1410                 case WAIT_HOST:
1411                         match = 1;
1412                         break;
1413                 case WAIT_TARGET:
1414                         match = cmd->device->id == t;
1415                         break;
1416                 case WAIT_LUN:
1417                         match = (cmd->device->id == t &&
1418                                 cmd->device->lun == l);
1419                         break;
1420                 }
1421                 if (!match)
1422                         continue;
1423
1424                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1425                 status = qla2x00_eh_wait_on_command(cmd);
1426                 spin_lock_irqsave(&ha->hardware_lock, flags);
1427         }
1428         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1429
1430         return status;
1431 }
1432
1433 static char *reset_errors[] = {
1434         "HBA not online",
1435         "HBA not ready",
1436         "Task management failed",
1437         "Waiting for command completions",
1438 };
1439
1440 static int
1441 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1442     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1443 {
1444         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1445         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1446         int err;
1447
1448         if (!fcport) {
1449                 return FAILED;
1450         }
1451
1452         err = fc_block_scsi_eh(cmd);
1453         if (err != 0)
1454                 return err;
1455
1456         ql_log(ql_log_info, vha, 0x8009,
1457             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1458             cmd->device->id, cmd->device->lun, cmd);
1459
1460         err = 0;
1461         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1462                 ql_log(ql_log_warn, vha, 0x800a,
1463                     "Wait for hba online failed for cmd=%p.\n", cmd);
1464                 goto eh_reset_failed;
1465         }
1466         err = 2;
1467         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1468                 != QLA_SUCCESS) {
1469                 ql_log(ql_log_warn, vha, 0x800c,
1470                     "do_reset failed for cmd=%p.\n", cmd);
1471                 goto eh_reset_failed;
1472         }
1473         err = 3;
1474         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1475             cmd->device->lun, type) != QLA_SUCCESS) {
1476                 ql_log(ql_log_warn, vha, 0x800d,
1477                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1478                 goto eh_reset_failed;
1479         }
1480
1481         ql_log(ql_log_info, vha, 0x800e,
1482             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1483             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1484
1485         return SUCCESS;
1486
1487 eh_reset_failed:
1488         ql_log(ql_log_info, vha, 0x800f,
1489             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1490             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1491             cmd);
1492         return FAILED;
1493 }
1494
1495 static int
1496 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1497 {
1498         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1499         struct qla_hw_data *ha = vha->hw;
1500
1501         if (qla2x00_isp_reg_stat(ha)) {
1502                 ql_log(ql_log_info, vha, 0x803e,
1503                     "PCI/Register disconnect, exiting.\n");
1504                 return FAILED;
1505         }
1506
1507         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1508             ha->isp_ops->lun_reset);
1509 }
1510
1511 static int
1512 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1513 {
1514         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1515         struct qla_hw_data *ha = vha->hw;
1516
1517         if (qla2x00_isp_reg_stat(ha)) {
1518                 ql_log(ql_log_info, vha, 0x803f,
1519                     "PCI/Register disconnect, exiting.\n");
1520                 return FAILED;
1521         }
1522
1523         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1524             ha->isp_ops->target_reset);
1525 }
1526
1527 /**************************************************************************
1528 * qla2xxx_eh_bus_reset
1529 *
1530 * Description:
1531 *    The bus reset function will reset the bus and abort any executing
1532 *    commands.
1533 *
1534 * Input:
1535 *    cmd = Linux SCSI command packet of the command that cause the
1536 *          bus reset.
1537 *
1538 * Returns:
1539 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1540 *
1541 **************************************************************************/
1542 static int
1543 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1544 {
1545         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1546         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1547         int ret = FAILED;
1548         unsigned int id;
1549         uint64_t lun;
1550         struct qla_hw_data *ha = vha->hw;
1551
1552         if (qla2x00_isp_reg_stat(ha)) {
1553                 ql_log(ql_log_info, vha, 0x8040,
1554                     "PCI/Register disconnect, exiting.\n");
1555                 return FAILED;
1556         }
1557
1558         id = cmd->device->id;
1559         lun = cmd->device->lun;
1560
1561         if (!fcport) {
1562                 return ret;
1563         }
1564
1565         ret = fc_block_scsi_eh(cmd);
1566         if (ret != 0)
1567                 return ret;
1568         ret = FAILED;
1569
1570         ql_log(ql_log_info, vha, 0x8012,
1571             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1572
1573         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1574                 ql_log(ql_log_fatal, vha, 0x8013,
1575                     "Wait for hba online failed board disabled.\n");
1576                 goto eh_bus_reset_done;
1577         }
1578
1579         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1580                 ret = SUCCESS;
1581
1582         if (ret == FAILED)
1583                 goto eh_bus_reset_done;
1584
1585         /* Flush outstanding commands. */
1586         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1587             QLA_SUCCESS) {
1588                 ql_log(ql_log_warn, vha, 0x8014,
1589                     "Wait for pending commands failed.\n");
1590                 ret = FAILED;
1591         }
1592
1593 eh_bus_reset_done:
1594         ql_log(ql_log_warn, vha, 0x802b,
1595             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1596             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1597
1598         return ret;
1599 }
1600
1601 /**************************************************************************
1602 * qla2xxx_eh_host_reset
1603 *
1604 * Description:
1605 *    The reset function will reset the Adapter.
1606 *
1607 * Input:
1608 *      cmd = Linux SCSI command packet of the command that cause the
1609 *            adapter reset.
1610 *
1611 * Returns:
1612 *      Either SUCCESS or FAILED.
1613 *
1614 * Note:
1615 **************************************************************************/
1616 static int
1617 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1618 {
1619         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1620         struct qla_hw_data *ha = vha->hw;
1621         int ret = FAILED;
1622         unsigned int id;
1623         uint64_t lun;
1624         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1625
1626         if (qla2x00_isp_reg_stat(ha)) {
1627                 ql_log(ql_log_info, vha, 0x8041,
1628                     "PCI/Register disconnect, exiting.\n");
1629                 schedule_work(&ha->board_disable);
1630                 return SUCCESS;
1631         }
1632
1633         id = cmd->device->id;
1634         lun = cmd->device->lun;
1635
1636         ql_log(ql_log_info, vha, 0x8018,
1637             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1638
1639         /*
1640          * No point in issuing another reset if one is active.  Also do not
1641          * attempt a reset if we are updating flash.
1642          */
1643         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1644                 goto eh_host_reset_lock;
1645
1646         if (vha != base_vha) {
1647                 if (qla2x00_vp_abort_isp(vha))
1648                         goto eh_host_reset_lock;
1649         } else {
1650                 if (IS_P3P_TYPE(vha->hw)) {
1651                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1652                                 /* Ctx reset success */
1653                                 ret = SUCCESS;
1654                                 goto eh_host_reset_lock;
1655                         }
1656                         /* fall thru if ctx reset failed */
1657                 }
1658                 if (ha->wq)
1659                         flush_workqueue(ha->wq);
1660
1661                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1662                 if (ha->isp_ops->abort_isp(base_vha)) {
1663                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1664                         /* failed. schedule dpc to try */
1665                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1666
1667                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1668                                 ql_log(ql_log_warn, vha, 0x802a,
1669                                     "wait for hba online failed.\n");
1670                                 goto eh_host_reset_lock;
1671                         }
1672                 }
1673                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1674         }
1675
1676         /* Waiting for command to be returned to OS.*/
1677         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1678                 QLA_SUCCESS)
1679                 ret = SUCCESS;
1680
1681 eh_host_reset_lock:
1682         ql_log(ql_log_info, vha, 0x8017,
1683             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1684             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1685
1686         return ret;
1687 }
1688
1689 /*
1690 * qla2x00_loop_reset
1691 *      Issue loop reset.
1692 *
1693 * Input:
1694 *      ha = adapter block pointer.
1695 *
1696 * Returns:
1697 *      0 = success
1698 */
1699 int
1700 qla2x00_loop_reset(scsi_qla_host_t *vha)
1701 {
1702         int ret;
1703         struct fc_port *fcport;
1704         struct qla_hw_data *ha = vha->hw;
1705
1706         if (IS_QLAFX00(ha)) {
1707                 return qlafx00_loop_reset(vha);
1708         }
1709
1710         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1711                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1712                         if (fcport->port_type != FCT_TARGET)
1713                                 continue;
1714
1715                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1716                         if (ret != QLA_SUCCESS) {
1717                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1718                                     "Bus Reset failed: Reset=%d "
1719                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1720                         }
1721                 }
1722         }
1723
1724
1725         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1726                 atomic_set(&vha->loop_state, LOOP_DOWN);
1727                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1728                 qla2x00_mark_all_devices_lost(vha, 0);
1729                 ret = qla2x00_full_login_lip(vha);
1730                 if (ret != QLA_SUCCESS) {
1731                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1732                             "full_login_lip=%d.\n", ret);
1733                 }
1734         }
1735
1736         if (ha->flags.enable_lip_reset) {
1737                 ret = qla2x00_lip_reset(vha);
1738                 if (ret != QLA_SUCCESS)
1739                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1740                             "lip_reset failed (%d).\n", ret);
1741         }
1742
1743         /* Issue marker command only when we are going to start the I/O */
1744         vha->marker_needed = 1;
1745
1746         return QLA_SUCCESS;
1747 }
1748
1749 static void
1750 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1751 {
1752         int cnt;
1753         unsigned long flags;
1754         srb_t *sp;
1755         scsi_qla_host_t *vha = qp->vha;
1756         struct qla_hw_data *ha = vha->hw;
1757         struct req_que *req;
1758         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1759         struct qla_tgt_cmd *cmd;
1760
1761         if (!ha->req_q_map)
1762                 return;
1763         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1764         req = qp->req;
1765         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1766                 sp = req->outstanding_cmds[cnt];
1767                 if (sp) {
1768                         req->outstanding_cmds[cnt] = NULL;
1769                         switch (sp->cmd_type) {
1770                         case TYPE_SRB:
1771                                 if (sp->type == SRB_NVME_CMD ||
1772                                     sp->type == SRB_NVME_LS) {
1773                                         if (!sp_get(sp)) {
1774                                                 /* got sp */
1775                                                 spin_unlock_irqrestore
1776                                                         (qp->qp_lock_ptr,
1777                                                          flags);
1778                                                 qla_nvme_abort(ha, sp, res);
1779                                                 spin_lock_irqsave
1780                                                         (qp->qp_lock_ptr, flags);
1781                                         }
1782                                 } else if (GET_CMD_SP(sp) &&
1783                                     !ha->flags.eeh_busy &&
1784                                     (!test_bit(ABORT_ISP_ACTIVE,
1785                                         &vha->dpc_flags)) &&
1786                                     !qla2x00_isp_reg_stat(ha) &&
1787                                     (sp->type == SRB_SCSI_CMD)) {
1788                                         /*
1789                                          * Don't abort commands in adapter
1790                                          * during EEH recovery as it's not
1791                                          * accessible/responding.
1792                                          *
1793                                          * Get a reference to the sp and drop
1794                                          * the lock. The reference ensures this
1795                                          * sp->done() call and not the call in
1796                                          * qla2xxx_eh_abort() ends the SCSI cmd
1797                                          * (with result 'res').
1798                                          */
1799                                         if (!sp_get(sp)) {
1800                                                 spin_unlock_irqrestore
1801                                                         (qp->qp_lock_ptr, flags);
1802                                                 qla2xxx_eh_abort(
1803                                                         GET_CMD_SP(sp));
1804                                                 spin_lock_irqsave
1805                                                         (qp->qp_lock_ptr, flags);
1806                                         }
1807                                 }
1808                                 sp->done(sp, res);
1809                                 break;
1810                         case TYPE_TGT_CMD:
1811                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1812                                     qla_ini_mode_enabled(vha)) {
1813                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1814                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1815                                             vha->dpc_flags);
1816                                         continue;
1817                                 }
1818                                 cmd = (struct qla_tgt_cmd *)sp;
1819                                 qlt_abort_cmd_on_host_reset(cmd->vha, cmd);
1820                                 break;
1821                         case TYPE_TGT_TMCMD:
1822                                 /*
1823                                  * Currently, only ABTS response gets on the
1824                                  * outstanding_cmds[]
1825                                  */
1826                                 ha->tgt.tgt_ops->free_mcmd(
1827                                    (struct qla_tgt_mgmt_cmd *)sp);
1828                                 break;
1829                         default:
1830                                 break;
1831                         }
1832                 }
1833         }
1834         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1835 }
1836
1837 void
1838 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1839 {
1840         int que;
1841         struct qla_hw_data *ha = vha->hw;
1842
1843         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1844
1845         for (que = 0; que < ha->max_qpairs; que++) {
1846                 if (!ha->queue_pair_map[que])
1847                         continue;
1848
1849                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1850         }
1851 }
1852
1853 static int
1854 qla2xxx_slave_alloc(struct scsi_device *sdev)
1855 {
1856         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1857
1858         if (!rport || fc_remote_port_chkready(rport))
1859                 return -ENXIO;
1860
1861         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1862
1863         return 0;
1864 }
1865
1866 static int
1867 qla2xxx_slave_configure(struct scsi_device *sdev)
1868 {
1869         scsi_qla_host_t *vha = shost_priv(sdev->host);
1870         struct req_que *req = vha->req;
1871
1872         if (IS_T10_PI_CAPABLE(vha->hw))
1873                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1874
1875         scsi_change_queue_depth(sdev, req->max_q_depth);
1876         return 0;
1877 }
1878
1879 static void
1880 qla2xxx_slave_destroy(struct scsi_device *sdev)
1881 {
1882         sdev->hostdata = NULL;
1883 }
1884
1885 /**
1886  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1887  * @ha: HA context
1888  *
1889  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1890  * supported addressing method.
1891  */
1892 static void
1893 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1894 {
1895         /* Assume a 32bit DMA mask. */
1896         ha->flags.enable_64bit_addressing = 0;
1897
1898         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1899                 /* Any upper-dword bits set? */
1900                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1901                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1902                         /* Ok, a 64bit DMA mask is applicable. */
1903                         ha->flags.enable_64bit_addressing = 1;
1904                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1905                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1906                         return;
1907                 }
1908         }
1909
1910         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1911         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1912 }
1913
1914 static void
1915 qla2x00_enable_intrs(struct qla_hw_data *ha)
1916 {
1917         unsigned long flags = 0;
1918         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1919
1920         spin_lock_irqsave(&ha->hardware_lock, flags);
1921         ha->interrupts_on = 1;
1922         /* enable risc and host interrupts */
1923         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1924         RD_REG_WORD(&reg->ictrl);
1925         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1926
1927 }
1928
1929 static void
1930 qla2x00_disable_intrs(struct qla_hw_data *ha)
1931 {
1932         unsigned long flags = 0;
1933         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1934
1935         spin_lock_irqsave(&ha->hardware_lock, flags);
1936         ha->interrupts_on = 0;
1937         /* disable risc and host interrupts */
1938         WRT_REG_WORD(&reg->ictrl, 0);
1939         RD_REG_WORD(&reg->ictrl);
1940         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1941 }
1942
1943 static void
1944 qla24xx_enable_intrs(struct qla_hw_data *ha)
1945 {
1946         unsigned long flags = 0;
1947         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1948
1949         spin_lock_irqsave(&ha->hardware_lock, flags);
1950         ha->interrupts_on = 1;
1951         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1952         RD_REG_DWORD(&reg->ictrl);
1953         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1954 }
1955
1956 static void
1957 qla24xx_disable_intrs(struct qla_hw_data *ha)
1958 {
1959         unsigned long flags = 0;
1960         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1961
1962         if (IS_NOPOLLING_TYPE(ha))
1963                 return;
1964         spin_lock_irqsave(&ha->hardware_lock, flags);
1965         ha->interrupts_on = 0;
1966         WRT_REG_DWORD(&reg->ictrl, 0);
1967         RD_REG_DWORD(&reg->ictrl);
1968         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1969 }
1970
1971 static int
1972 qla2x00_iospace_config(struct qla_hw_data *ha)
1973 {
1974         resource_size_t pio;
1975         uint16_t msix;
1976
1977         if (pci_request_selected_regions(ha->pdev, ha->bars,
1978             QLA2XXX_DRIVER_NAME)) {
1979                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1980                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1981                     pci_name(ha->pdev));
1982                 goto iospace_error_exit;
1983         }
1984         if (!(ha->bars & 1))
1985                 goto skip_pio;
1986
1987         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1988         pio = pci_resource_start(ha->pdev, 0);
1989         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1990                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1991                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1992                             "Invalid pci I/O region size (%s).\n",
1993                             pci_name(ha->pdev));
1994                         pio = 0;
1995                 }
1996         } else {
1997                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1998                     "Region #0 no a PIO resource (%s).\n",
1999                     pci_name(ha->pdev));
2000                 pio = 0;
2001         }
2002         ha->pio_address = pio;
2003         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
2004             "PIO address=%llu.\n",
2005             (unsigned long long)ha->pio_address);
2006
2007 skip_pio:
2008         /* Use MMIO operations for all accesses. */
2009         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
2010                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
2011                     "Region #1 not an MMIO resource (%s), aborting.\n",
2012                     pci_name(ha->pdev));
2013                 goto iospace_error_exit;
2014         }
2015         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
2016                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
2017                     "Invalid PCI mem region size (%s), aborting.\n",
2018                     pci_name(ha->pdev));
2019                 goto iospace_error_exit;
2020         }
2021
2022         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
2023         if (!ha->iobase) {
2024                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
2025                     "Cannot remap MMIO (%s), aborting.\n",
2026                     pci_name(ha->pdev));
2027                 goto iospace_error_exit;
2028         }
2029
2030         /* Determine queue resources */
2031         ha->max_req_queues = ha->max_rsp_queues = 1;
2032         ha->msix_count = QLA_BASE_VECTORS;
2033         if (!ql2xmqsupport || !ql2xnvmeenable ||
2034             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2035                 goto mqiobase_exit;
2036
2037         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2038                         pci_resource_len(ha->pdev, 3));
2039         if (ha->mqiobase) {
2040                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2041                     "MQIO Base=%p.\n", ha->mqiobase);
2042                 /* Read MSIX vector size of the board */
2043                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2044                 ha->msix_count = msix + 1;
2045                 /* Max queues are bounded by available msix vectors */
2046                 /* MB interrupt uses 1 vector */
2047                 ha->max_req_queues = ha->msix_count - 1;
2048                 ha->max_rsp_queues = ha->max_req_queues;
2049                 /* Queue pairs is the max value minus the base queue pair */
2050                 ha->max_qpairs = ha->max_rsp_queues - 1;
2051                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2052                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2053
2054                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2055                     "MSI-X vector count: %d.\n", ha->msix_count);
2056         } else
2057                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2058                     "BAR 3 not enabled.\n");
2059
2060 mqiobase_exit:
2061         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2062             "MSIX Count: %d.\n", ha->msix_count);
2063         return (0);
2064
2065 iospace_error_exit:
2066         return (-ENOMEM);
2067 }
2068
2069
2070 static int
2071 qla83xx_iospace_config(struct qla_hw_data *ha)
2072 {
2073         uint16_t msix;
2074
2075         if (pci_request_selected_regions(ha->pdev, ha->bars,
2076             QLA2XXX_DRIVER_NAME)) {
2077                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2078                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2079                     pci_name(ha->pdev));
2080
2081                 goto iospace_error_exit;
2082         }
2083
2084         /* Use MMIO operations for all accesses. */
2085         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2086                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2087                     "Invalid pci I/O region size (%s).\n",
2088                     pci_name(ha->pdev));
2089                 goto iospace_error_exit;
2090         }
2091         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2092                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2093                     "Invalid PCI mem region size (%s), aborting\n",
2094                         pci_name(ha->pdev));
2095                 goto iospace_error_exit;
2096         }
2097
2098         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2099         if (!ha->iobase) {
2100                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2101                     "Cannot remap MMIO (%s), aborting.\n",
2102                     pci_name(ha->pdev));
2103                 goto iospace_error_exit;
2104         }
2105
2106         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2107         /* 83XX 26XX always use MQ type access for queues
2108          * - mbar 2, a.k.a region 4 */
2109         ha->max_req_queues = ha->max_rsp_queues = 1;
2110         ha->msix_count = QLA_BASE_VECTORS;
2111         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2112                         pci_resource_len(ha->pdev, 4));
2113
2114         if (!ha->mqiobase) {
2115                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2116                     "BAR2/region4 not enabled\n");
2117                 goto mqiobase_exit;
2118         }
2119
2120         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2121                         pci_resource_len(ha->pdev, 2));
2122         if (ha->msixbase) {
2123                 /* Read MSIX vector size of the board */
2124                 pci_read_config_word(ha->pdev,
2125                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2126                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2127                 /*
2128                  * By default, driver uses at least two msix vectors
2129                  * (default & rspq)
2130                  */
2131                 if (ql2xmqsupport || ql2xnvmeenable) {
2132                         /* MB interrupt uses 1 vector */
2133                         ha->max_req_queues = ha->msix_count - 1;
2134
2135                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2136                         if (QLA_TGT_MODE_ENABLED())
2137                                 ha->max_req_queues--;
2138
2139                         ha->max_rsp_queues = ha->max_req_queues;
2140
2141                         /* Queue pairs is the max value minus
2142                          * the base queue pair */
2143                         ha->max_qpairs = ha->max_req_queues - 1;
2144                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2145                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2146                 }
2147                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2148                     "MSI-X vector count: %d.\n", ha->msix_count);
2149         } else
2150                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2151                     "BAR 1 not enabled.\n");
2152
2153 mqiobase_exit:
2154         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2155             "MSIX Count: %d.\n", ha->msix_count);
2156         return 0;
2157
2158 iospace_error_exit:
2159         return -ENOMEM;
2160 }
2161
2162 static struct isp_operations qla2100_isp_ops = {
2163         .pci_config             = qla2100_pci_config,
2164         .reset_chip             = qla2x00_reset_chip,
2165         .chip_diag              = qla2x00_chip_diag,
2166         .config_rings           = qla2x00_config_rings,
2167         .reset_adapter          = qla2x00_reset_adapter,
2168         .nvram_config           = qla2x00_nvram_config,
2169         .update_fw_options      = qla2x00_update_fw_options,
2170         .load_risc              = qla2x00_load_risc,
2171         .pci_info_str           = qla2x00_pci_info_str,
2172         .fw_version_str         = qla2x00_fw_version_str,
2173         .intr_handler           = qla2100_intr_handler,
2174         .enable_intrs           = qla2x00_enable_intrs,
2175         .disable_intrs          = qla2x00_disable_intrs,
2176         .abort_command          = qla2x00_abort_command,
2177         .target_reset           = qla2x00_abort_target,
2178         .lun_reset              = qla2x00_lun_reset,
2179         .fabric_login           = qla2x00_login_fabric,
2180         .fabric_logout          = qla2x00_fabric_logout,
2181         .calc_req_entries       = qla2x00_calc_iocbs_32,
2182         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2183         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2184         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2185         .read_nvram             = qla2x00_read_nvram_data,
2186         .write_nvram            = qla2x00_write_nvram_data,
2187         .fw_dump                = qla2100_fw_dump,
2188         .beacon_on              = NULL,
2189         .beacon_off             = NULL,
2190         .beacon_blink           = NULL,
2191         .read_optrom            = qla2x00_read_optrom_data,
2192         .write_optrom           = qla2x00_write_optrom_data,
2193         .get_flash_version      = qla2x00_get_flash_version,
2194         .start_scsi             = qla2x00_start_scsi,
2195         .start_scsi_mq          = NULL,
2196         .abort_isp              = qla2x00_abort_isp,
2197         .iospace_config         = qla2x00_iospace_config,
2198         .initialize_adapter     = qla2x00_initialize_adapter,
2199 };
2200
2201 static struct isp_operations qla2300_isp_ops = {
2202         .pci_config             = qla2300_pci_config,
2203         .reset_chip             = qla2x00_reset_chip,
2204         .chip_diag              = qla2x00_chip_diag,
2205         .config_rings           = qla2x00_config_rings,
2206         .reset_adapter          = qla2x00_reset_adapter,
2207         .nvram_config           = qla2x00_nvram_config,
2208         .update_fw_options      = qla2x00_update_fw_options,
2209         .load_risc              = qla2x00_load_risc,
2210         .pci_info_str           = qla2x00_pci_info_str,
2211         .fw_version_str         = qla2x00_fw_version_str,
2212         .intr_handler           = qla2300_intr_handler,
2213         .enable_intrs           = qla2x00_enable_intrs,
2214         .disable_intrs          = qla2x00_disable_intrs,
2215         .abort_command          = qla2x00_abort_command,
2216         .target_reset           = qla2x00_abort_target,
2217         .lun_reset              = qla2x00_lun_reset,
2218         .fabric_login           = qla2x00_login_fabric,
2219         .fabric_logout          = qla2x00_fabric_logout,
2220         .calc_req_entries       = qla2x00_calc_iocbs_32,
2221         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2222         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2223         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2224         .read_nvram             = qla2x00_read_nvram_data,
2225         .write_nvram            = qla2x00_write_nvram_data,
2226         .fw_dump                = qla2300_fw_dump,
2227         .beacon_on              = qla2x00_beacon_on,
2228         .beacon_off             = qla2x00_beacon_off,
2229         .beacon_blink           = qla2x00_beacon_blink,
2230         .read_optrom            = qla2x00_read_optrom_data,
2231         .write_optrom           = qla2x00_write_optrom_data,
2232         .get_flash_version      = qla2x00_get_flash_version,
2233         .start_scsi             = qla2x00_start_scsi,
2234         .start_scsi_mq          = NULL,
2235         .abort_isp              = qla2x00_abort_isp,
2236         .iospace_config         = qla2x00_iospace_config,
2237         .initialize_adapter     = qla2x00_initialize_adapter,
2238 };
2239
2240 static struct isp_operations qla24xx_isp_ops = {
2241         .pci_config             = qla24xx_pci_config,
2242         .reset_chip             = qla24xx_reset_chip,
2243         .chip_diag              = qla24xx_chip_diag,
2244         .config_rings           = qla24xx_config_rings,
2245         .reset_adapter          = qla24xx_reset_adapter,
2246         .nvram_config           = qla24xx_nvram_config,
2247         .update_fw_options      = qla24xx_update_fw_options,
2248         .load_risc              = qla24xx_load_risc,
2249         .pci_info_str           = qla24xx_pci_info_str,
2250         .fw_version_str         = qla24xx_fw_version_str,
2251         .intr_handler           = qla24xx_intr_handler,
2252         .enable_intrs           = qla24xx_enable_intrs,
2253         .disable_intrs          = qla24xx_disable_intrs,
2254         .abort_command          = qla24xx_abort_command,
2255         .target_reset           = qla24xx_abort_target,
2256         .lun_reset              = qla24xx_lun_reset,
2257         .fabric_login           = qla24xx_login_fabric,
2258         .fabric_logout          = qla24xx_fabric_logout,
2259         .calc_req_entries       = NULL,
2260         .build_iocbs            = NULL,
2261         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2262         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2263         .read_nvram             = qla24xx_read_nvram_data,
2264         .write_nvram            = qla24xx_write_nvram_data,
2265         .fw_dump                = qla24xx_fw_dump,
2266         .beacon_on              = qla24xx_beacon_on,
2267         .beacon_off             = qla24xx_beacon_off,
2268         .beacon_blink           = qla24xx_beacon_blink,
2269         .read_optrom            = qla24xx_read_optrom_data,
2270         .write_optrom           = qla24xx_write_optrom_data,
2271         .get_flash_version      = qla24xx_get_flash_version,
2272         .start_scsi             = qla24xx_start_scsi,
2273         .start_scsi_mq          = NULL,
2274         .abort_isp              = qla2x00_abort_isp,
2275         .iospace_config         = qla2x00_iospace_config,
2276         .initialize_adapter     = qla2x00_initialize_adapter,
2277 };
2278
2279 static struct isp_operations qla25xx_isp_ops = {
2280         .pci_config             = qla25xx_pci_config,
2281         .reset_chip             = qla24xx_reset_chip,
2282         .chip_diag              = qla24xx_chip_diag,
2283         .config_rings           = qla24xx_config_rings,
2284         .reset_adapter          = qla24xx_reset_adapter,
2285         .nvram_config           = qla24xx_nvram_config,
2286         .update_fw_options      = qla24xx_update_fw_options,
2287         .load_risc              = qla24xx_load_risc,
2288         .pci_info_str           = qla24xx_pci_info_str,
2289         .fw_version_str         = qla24xx_fw_version_str,
2290         .intr_handler           = qla24xx_intr_handler,
2291         .enable_intrs           = qla24xx_enable_intrs,
2292         .disable_intrs          = qla24xx_disable_intrs,
2293         .abort_command          = qla24xx_abort_command,
2294         .target_reset           = qla24xx_abort_target,
2295         .lun_reset              = qla24xx_lun_reset,
2296         .fabric_login           = qla24xx_login_fabric,
2297         .fabric_logout          = qla24xx_fabric_logout,
2298         .calc_req_entries       = NULL,
2299         .build_iocbs            = NULL,
2300         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2301         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2302         .read_nvram             = qla25xx_read_nvram_data,
2303         .write_nvram            = qla25xx_write_nvram_data,
2304         .fw_dump                = qla25xx_fw_dump,
2305         .beacon_on              = qla24xx_beacon_on,
2306         .beacon_off             = qla24xx_beacon_off,
2307         .beacon_blink           = qla24xx_beacon_blink,
2308         .read_optrom            = qla25xx_read_optrom_data,
2309         .write_optrom           = qla24xx_write_optrom_data,
2310         .get_flash_version      = qla24xx_get_flash_version,
2311         .start_scsi             = qla24xx_dif_start_scsi,
2312         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2313         .abort_isp              = qla2x00_abort_isp,
2314         .iospace_config         = qla2x00_iospace_config,
2315         .initialize_adapter     = qla2x00_initialize_adapter,
2316 };
2317
2318 static struct isp_operations qla81xx_isp_ops = {
2319         .pci_config             = qla25xx_pci_config,
2320         .reset_chip             = qla24xx_reset_chip,
2321         .chip_diag              = qla24xx_chip_diag,
2322         .config_rings           = qla24xx_config_rings,
2323         .reset_adapter          = qla24xx_reset_adapter,
2324         .nvram_config           = qla81xx_nvram_config,
2325         .update_fw_options      = qla81xx_update_fw_options,
2326         .load_risc              = qla81xx_load_risc,
2327         .pci_info_str           = qla24xx_pci_info_str,
2328         .fw_version_str         = qla24xx_fw_version_str,
2329         .intr_handler           = qla24xx_intr_handler,
2330         .enable_intrs           = qla24xx_enable_intrs,
2331         .disable_intrs          = qla24xx_disable_intrs,
2332         .abort_command          = qla24xx_abort_command,
2333         .target_reset           = qla24xx_abort_target,
2334         .lun_reset              = qla24xx_lun_reset,
2335         .fabric_login           = qla24xx_login_fabric,
2336         .fabric_logout          = qla24xx_fabric_logout,
2337         .calc_req_entries       = NULL,
2338         .build_iocbs            = NULL,
2339         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2340         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2341         .read_nvram             = NULL,
2342         .write_nvram            = NULL,
2343         .fw_dump                = qla81xx_fw_dump,
2344         .beacon_on              = qla24xx_beacon_on,
2345         .beacon_off             = qla24xx_beacon_off,
2346         .beacon_blink           = qla83xx_beacon_blink,
2347         .read_optrom            = qla25xx_read_optrom_data,
2348         .write_optrom           = qla24xx_write_optrom_data,
2349         .get_flash_version      = qla24xx_get_flash_version,
2350         .start_scsi             = qla24xx_dif_start_scsi,
2351         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2352         .abort_isp              = qla2x00_abort_isp,
2353         .iospace_config         = qla2x00_iospace_config,
2354         .initialize_adapter     = qla2x00_initialize_adapter,
2355 };
2356
2357 static struct isp_operations qla82xx_isp_ops = {
2358         .pci_config             = qla82xx_pci_config,
2359         .reset_chip             = qla82xx_reset_chip,
2360         .chip_diag              = qla24xx_chip_diag,
2361         .config_rings           = qla82xx_config_rings,
2362         .reset_adapter          = qla24xx_reset_adapter,
2363         .nvram_config           = qla81xx_nvram_config,
2364         .update_fw_options      = qla24xx_update_fw_options,
2365         .load_risc              = qla82xx_load_risc,
2366         .pci_info_str           = qla24xx_pci_info_str,
2367         .fw_version_str         = qla24xx_fw_version_str,
2368         .intr_handler           = qla82xx_intr_handler,
2369         .enable_intrs           = qla82xx_enable_intrs,
2370         .disable_intrs          = qla82xx_disable_intrs,
2371         .abort_command          = qla24xx_abort_command,
2372         .target_reset           = qla24xx_abort_target,
2373         .lun_reset              = qla24xx_lun_reset,
2374         .fabric_login           = qla24xx_login_fabric,
2375         .fabric_logout          = qla24xx_fabric_logout,
2376         .calc_req_entries       = NULL,
2377         .build_iocbs            = NULL,
2378         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2379         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2380         .read_nvram             = qla24xx_read_nvram_data,
2381         .write_nvram            = qla24xx_write_nvram_data,
2382         .fw_dump                = qla82xx_fw_dump,
2383         .beacon_on              = qla82xx_beacon_on,
2384         .beacon_off             = qla82xx_beacon_off,
2385         .beacon_blink           = NULL,
2386         .read_optrom            = qla82xx_read_optrom_data,
2387         .write_optrom           = qla82xx_write_optrom_data,
2388         .get_flash_version      = qla82xx_get_flash_version,
2389         .start_scsi             = qla82xx_start_scsi,
2390         .start_scsi_mq          = NULL,
2391         .abort_isp              = qla82xx_abort_isp,
2392         .iospace_config         = qla82xx_iospace_config,
2393         .initialize_adapter     = qla2x00_initialize_adapter,
2394 };
2395
2396 static struct isp_operations qla8044_isp_ops = {
2397         .pci_config             = qla82xx_pci_config,
2398         .reset_chip             = qla82xx_reset_chip,
2399         .chip_diag              = qla24xx_chip_diag,
2400         .config_rings           = qla82xx_config_rings,
2401         .reset_adapter          = qla24xx_reset_adapter,
2402         .nvram_config           = qla81xx_nvram_config,
2403         .update_fw_options      = qla24xx_update_fw_options,
2404         .load_risc              = qla82xx_load_risc,
2405         .pci_info_str           = qla24xx_pci_info_str,
2406         .fw_version_str         = qla24xx_fw_version_str,
2407         .intr_handler           = qla8044_intr_handler,
2408         .enable_intrs           = qla82xx_enable_intrs,
2409         .disable_intrs          = qla82xx_disable_intrs,
2410         .abort_command          = qla24xx_abort_command,
2411         .target_reset           = qla24xx_abort_target,
2412         .lun_reset              = qla24xx_lun_reset,
2413         .fabric_login           = qla24xx_login_fabric,
2414         .fabric_logout          = qla24xx_fabric_logout,
2415         .calc_req_entries       = NULL,
2416         .build_iocbs            = NULL,
2417         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2418         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2419         .read_nvram             = NULL,
2420         .write_nvram            = NULL,
2421         .fw_dump                = qla8044_fw_dump,
2422         .beacon_on              = qla82xx_beacon_on,
2423         .beacon_off             = qla82xx_beacon_off,
2424         .beacon_blink           = NULL,
2425         .read_optrom            = qla8044_read_optrom_data,
2426         .write_optrom           = qla8044_write_optrom_data,
2427         .get_flash_version      = qla82xx_get_flash_version,
2428         .start_scsi             = qla82xx_start_scsi,
2429         .start_scsi_mq          = NULL,
2430         .abort_isp              = qla8044_abort_isp,
2431         .iospace_config         = qla82xx_iospace_config,
2432         .initialize_adapter     = qla2x00_initialize_adapter,
2433 };
2434
2435 static struct isp_operations qla83xx_isp_ops = {
2436         .pci_config             = qla25xx_pci_config,
2437         .reset_chip             = qla24xx_reset_chip,
2438         .chip_diag              = qla24xx_chip_diag,
2439         .config_rings           = qla24xx_config_rings,
2440         .reset_adapter          = qla24xx_reset_adapter,
2441         .nvram_config           = qla81xx_nvram_config,
2442         .update_fw_options      = qla81xx_update_fw_options,
2443         .load_risc              = qla81xx_load_risc,
2444         .pci_info_str           = qla24xx_pci_info_str,
2445         .fw_version_str         = qla24xx_fw_version_str,
2446         .intr_handler           = qla24xx_intr_handler,
2447         .enable_intrs           = qla24xx_enable_intrs,
2448         .disable_intrs          = qla24xx_disable_intrs,
2449         .abort_command          = qla24xx_abort_command,
2450         .target_reset           = qla24xx_abort_target,
2451         .lun_reset              = qla24xx_lun_reset,
2452         .fabric_login           = qla24xx_login_fabric,
2453         .fabric_logout          = qla24xx_fabric_logout,
2454         .calc_req_entries       = NULL,
2455         .build_iocbs            = NULL,
2456         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2457         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2458         .read_nvram             = NULL,
2459         .write_nvram            = NULL,
2460         .fw_dump                = qla83xx_fw_dump,
2461         .beacon_on              = qla24xx_beacon_on,
2462         .beacon_off             = qla24xx_beacon_off,
2463         .beacon_blink           = qla83xx_beacon_blink,
2464         .read_optrom            = qla25xx_read_optrom_data,
2465         .write_optrom           = qla24xx_write_optrom_data,
2466         .get_flash_version      = qla24xx_get_flash_version,
2467         .start_scsi             = qla24xx_dif_start_scsi,
2468         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2469         .abort_isp              = qla2x00_abort_isp,
2470         .iospace_config         = qla83xx_iospace_config,
2471         .initialize_adapter     = qla2x00_initialize_adapter,
2472 };
2473
2474 static struct isp_operations qlafx00_isp_ops = {
2475         .pci_config             = qlafx00_pci_config,
2476         .reset_chip             = qlafx00_soft_reset,
2477         .chip_diag              = qlafx00_chip_diag,
2478         .config_rings           = qlafx00_config_rings,
2479         .reset_adapter          = qlafx00_soft_reset,
2480         .nvram_config           = NULL,
2481         .update_fw_options      = NULL,
2482         .load_risc              = NULL,
2483         .pci_info_str           = qlafx00_pci_info_str,
2484         .fw_version_str         = qlafx00_fw_version_str,
2485         .intr_handler           = qlafx00_intr_handler,
2486         .enable_intrs           = qlafx00_enable_intrs,
2487         .disable_intrs          = qlafx00_disable_intrs,
2488         .abort_command          = qla24xx_async_abort_command,
2489         .target_reset           = qlafx00_abort_target,
2490         .lun_reset              = qlafx00_lun_reset,
2491         .fabric_login           = NULL,
2492         .fabric_logout          = NULL,
2493         .calc_req_entries       = NULL,
2494         .build_iocbs            = NULL,
2495         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2496         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2497         .read_nvram             = qla24xx_read_nvram_data,
2498         .write_nvram            = qla24xx_write_nvram_data,
2499         .fw_dump                = NULL,
2500         .beacon_on              = qla24xx_beacon_on,
2501         .beacon_off             = qla24xx_beacon_off,
2502         .beacon_blink           = NULL,
2503         .read_optrom            = qla24xx_read_optrom_data,
2504         .write_optrom           = qla24xx_write_optrom_data,
2505         .get_flash_version      = qla24xx_get_flash_version,
2506         .start_scsi             = qlafx00_start_scsi,
2507         .start_scsi_mq          = NULL,
2508         .abort_isp              = qlafx00_abort_isp,
2509         .iospace_config         = qlafx00_iospace_config,
2510         .initialize_adapter     = qlafx00_initialize_adapter,
2511 };
2512
2513 static struct isp_operations qla27xx_isp_ops = {
2514         .pci_config             = qla25xx_pci_config,
2515         .reset_chip             = qla24xx_reset_chip,
2516         .chip_diag              = qla24xx_chip_diag,
2517         .config_rings           = qla24xx_config_rings,
2518         .reset_adapter          = qla24xx_reset_adapter,
2519         .nvram_config           = qla81xx_nvram_config,
2520         .update_fw_options      = qla81xx_update_fw_options,
2521         .load_risc              = qla81xx_load_risc,
2522         .pci_info_str           = qla24xx_pci_info_str,
2523         .fw_version_str         = qla24xx_fw_version_str,
2524         .intr_handler           = qla24xx_intr_handler,
2525         .enable_intrs           = qla24xx_enable_intrs,
2526         .disable_intrs          = qla24xx_disable_intrs,
2527         .abort_command          = qla24xx_abort_command,
2528         .target_reset           = qla24xx_abort_target,
2529         .lun_reset              = qla24xx_lun_reset,
2530         .fabric_login           = qla24xx_login_fabric,
2531         .fabric_logout          = qla24xx_fabric_logout,
2532         .calc_req_entries       = NULL,
2533         .build_iocbs            = NULL,
2534         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2535         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2536         .read_nvram             = NULL,
2537         .write_nvram            = NULL,
2538         .fw_dump                = qla27xx_fwdump,
2539         .beacon_on              = qla24xx_beacon_on,
2540         .beacon_off             = qla24xx_beacon_off,
2541         .beacon_blink           = qla83xx_beacon_blink,
2542         .read_optrom            = qla25xx_read_optrom_data,
2543         .write_optrom           = qla24xx_write_optrom_data,
2544         .get_flash_version      = qla24xx_get_flash_version,
2545         .start_scsi             = qla24xx_dif_start_scsi,
2546         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2547         .abort_isp              = qla2x00_abort_isp,
2548         .iospace_config         = qla83xx_iospace_config,
2549         .initialize_adapter     = qla2x00_initialize_adapter,
2550 };
2551
2552 static inline void
2553 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2554 {
2555         ha->device_type = DT_EXTENDED_IDS;
2556         switch (ha->pdev->device) {
2557         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2558                 ha->isp_type |= DT_ISP2100;
2559                 ha->device_type &= ~DT_EXTENDED_IDS;
2560                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2561                 break;
2562         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2563                 ha->isp_type |= DT_ISP2200;
2564                 ha->device_type &= ~DT_EXTENDED_IDS;
2565                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2566                 break;
2567         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2568                 ha->isp_type |= DT_ISP2300;
2569                 ha->device_type |= DT_ZIO_SUPPORTED;
2570                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2571                 break;
2572         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2573                 ha->isp_type |= DT_ISP2312;
2574                 ha->device_type |= DT_ZIO_SUPPORTED;
2575                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2576                 break;
2577         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2578                 ha->isp_type |= DT_ISP2322;
2579                 ha->device_type |= DT_ZIO_SUPPORTED;
2580                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2581                     ha->pdev->subsystem_device == 0x0170)
2582                         ha->device_type |= DT_OEM_001;
2583                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2584                 break;
2585         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2586                 ha->isp_type |= DT_ISP6312;
2587                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2588                 break;
2589         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2590                 ha->isp_type |= DT_ISP6322;
2591                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2592                 break;
2593         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2594                 ha->isp_type |= DT_ISP2422;
2595                 ha->device_type |= DT_ZIO_SUPPORTED;
2596                 ha->device_type |= DT_FWI2;
2597                 ha->device_type |= DT_IIDMA;
2598                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2599                 break;
2600         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2601                 ha->isp_type |= DT_ISP2432;
2602                 ha->device_type |= DT_ZIO_SUPPORTED;
2603                 ha->device_type |= DT_FWI2;
2604                 ha->device_type |= DT_IIDMA;
2605                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2606                 break;
2607         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2608                 ha->isp_type |= DT_ISP8432;
2609                 ha->device_type |= DT_ZIO_SUPPORTED;
2610                 ha->device_type |= DT_FWI2;
2611                 ha->device_type |= DT_IIDMA;
2612                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2613                 break;
2614         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2615                 ha->isp_type |= DT_ISP5422;
2616                 ha->device_type |= DT_FWI2;
2617                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2618                 break;
2619         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2620                 ha->isp_type |= DT_ISP5432;
2621                 ha->device_type |= DT_FWI2;
2622                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2623                 break;
2624         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2625                 ha->isp_type |= DT_ISP2532;
2626                 ha->device_type |= DT_ZIO_SUPPORTED;
2627                 ha->device_type |= DT_FWI2;
2628                 ha->device_type |= DT_IIDMA;
2629                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2630                 break;
2631         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2632                 ha->isp_type |= DT_ISP8001;
2633                 ha->device_type |= DT_ZIO_SUPPORTED;
2634                 ha->device_type |= DT_FWI2;
2635                 ha->device_type |= DT_IIDMA;
2636                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2637                 break;
2638         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2639                 ha->isp_type |= DT_ISP8021;
2640                 ha->device_type |= DT_ZIO_SUPPORTED;
2641                 ha->device_type |= DT_FWI2;
2642                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2643                 /* Initialize 82XX ISP flags */
2644                 qla82xx_init_flags(ha);
2645                 break;
2646          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2647                 ha->isp_type |= DT_ISP8044;
2648                 ha->device_type |= DT_ZIO_SUPPORTED;
2649                 ha->device_type |= DT_FWI2;
2650                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2651                 /* Initialize 82XX ISP flags */
2652                 qla82xx_init_flags(ha);
2653                 break;
2654         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2655                 ha->isp_type |= DT_ISP2031;
2656                 ha->device_type |= DT_ZIO_SUPPORTED;
2657                 ha->device_type |= DT_FWI2;
2658                 ha->device_type |= DT_IIDMA;
2659                 ha->device_type |= DT_T10_PI;
2660                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2661                 break;
2662         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2663                 ha->isp_type |= DT_ISP8031;
2664                 ha->device_type |= DT_ZIO_SUPPORTED;
2665                 ha->device_type |= DT_FWI2;
2666                 ha->device_type |= DT_IIDMA;
2667                 ha->device_type |= DT_T10_PI;
2668                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2669                 break;
2670         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2671                 ha->isp_type |= DT_ISPFX00;
2672                 break;
2673         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2674                 ha->isp_type |= DT_ISP2071;
2675                 ha->device_type |= DT_ZIO_SUPPORTED;
2676                 ha->device_type |= DT_FWI2;
2677                 ha->device_type |= DT_IIDMA;
2678                 ha->device_type |= DT_T10_PI;
2679                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2680                 break;
2681         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2682                 ha->isp_type |= DT_ISP2271;
2683                 ha->device_type |= DT_ZIO_SUPPORTED;
2684                 ha->device_type |= DT_FWI2;
2685                 ha->device_type |= DT_IIDMA;
2686                 ha->device_type |= DT_T10_PI;
2687                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2688                 break;
2689         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2690                 ha->isp_type |= DT_ISP2261;
2691                 ha->device_type |= DT_ZIO_SUPPORTED;
2692                 ha->device_type |= DT_FWI2;
2693                 ha->device_type |= DT_IIDMA;
2694                 ha->device_type |= DT_T10_PI;
2695                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2696                 break;
2697         }
2698
2699         if (IS_QLA82XX(ha))
2700                 ha->port_no = ha->portnum & 1;
2701         else {
2702                 /* Get adapter physical port no from interrupt pin register. */
2703                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2704                 if (IS_QLA27XX(ha))
2705                         ha->port_no--;
2706                 else
2707                         ha->port_no = !(ha->port_no & 1);
2708         }
2709
2710         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2711             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2712             ha->device_type, ha->port_no, ha->fw_srisc_address);
2713 }
2714
2715 static void
2716 qla2xxx_scan_start(struct Scsi_Host *shost)
2717 {
2718         scsi_qla_host_t *vha = shost_priv(shost);
2719
2720         if (vha->hw->flags.running_gold_fw)
2721                 return;
2722
2723         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2724         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2725         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2726         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2727 }
2728
2729 static int
2730 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2731 {
2732         scsi_qla_host_t *vha = shost_priv(shost);
2733
2734         if (test_bit(UNLOADING, &vha->dpc_flags))
2735                 return 1;
2736         if (!vha->host)
2737                 return 1;
2738         if (time > vha->hw->loop_reset_delay * HZ)
2739                 return 1;
2740
2741         return atomic_read(&vha->loop_state) == LOOP_READY;
2742 }
2743
2744 static void qla2x00_iocb_work_fn(struct work_struct *work)
2745 {
2746         struct scsi_qla_host *vha = container_of(work,
2747                 struct scsi_qla_host, iocb_work);
2748         struct qla_hw_data *ha = vha->hw;
2749         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2750         int i = 2;
2751         unsigned long flags;
2752
2753         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2754                 return;
2755
2756         while (!list_empty(&vha->work_list) && i > 0) {
2757                 qla2x00_do_work(vha);
2758                 i--;
2759         }
2760
2761         spin_lock_irqsave(&vha->work_lock, flags);
2762         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2763         spin_unlock_irqrestore(&vha->work_lock, flags);
2764 }
2765
2766 /*
2767  * PCI driver interface
2768  */
2769 static int
2770 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2771 {
2772         int     ret = -ENODEV;
2773         struct Scsi_Host *host;
2774         scsi_qla_host_t *base_vha = NULL;
2775         struct qla_hw_data *ha;
2776         char pci_info[30];
2777         char fw_str[30], wq_name[30];
2778         struct scsi_host_template *sht;
2779         int bars, mem_only = 0;
2780         uint16_t req_length = 0, rsp_length = 0;
2781         struct req_que *req = NULL;
2782         struct rsp_que *rsp = NULL;
2783         int i;
2784
2785         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2786         sht = &qla2xxx_driver_template;
2787         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2788             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2789             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2790             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2791             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2792             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2793             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2794             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2795             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2796             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2797             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2798             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2799             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2800             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2801             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2802                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2803                 mem_only = 1;
2804                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2805                     "Mem only adapter.\n");
2806         }
2807         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2808             "Bars=%d.\n", bars);
2809
2810         if (mem_only) {
2811                 if (pci_enable_device_mem(pdev))
2812                         return ret;
2813         } else {
2814                 if (pci_enable_device(pdev))
2815                         return ret;
2816         }
2817
2818         /* This may fail but that's ok */
2819         pci_enable_pcie_error_reporting(pdev);
2820
2821         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2822         if (!ha) {
2823                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2824                     "Unable to allocate memory for ha.\n");
2825                 goto disable_device;
2826         }
2827         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2828             "Memory allocated for ha=%p.\n", ha);
2829         ha->pdev = pdev;
2830         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2831         spin_lock_init(&ha->tgt.q_full_lock);
2832         spin_lock_init(&ha->tgt.sess_lock);
2833         spin_lock_init(&ha->tgt.atio_lock);
2834
2835         atomic_set(&ha->nvme_active_aen_cnt, 0);
2836
2837         /* Clear our data area */
2838         ha->bars = bars;
2839         ha->mem_only = mem_only;
2840         spin_lock_init(&ha->hardware_lock);
2841         spin_lock_init(&ha->vport_slock);
2842         mutex_init(&ha->selflogin_lock);
2843         mutex_init(&ha->optrom_mutex);
2844
2845         /* Set ISP-type information. */
2846         qla2x00_set_isp_flags(ha);
2847
2848         /* Set EEH reset type to fundamental if required by hba */
2849         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2850             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2851                 pdev->needs_freset = 1;
2852
2853         ha->prev_topology = 0;
2854         ha->init_cb_size = sizeof(init_cb_t);
2855         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2856         ha->optrom_size = OPTROM_SIZE_2300;
2857         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2858         atomic_set(&ha->num_pend_mbx_stage1, 0);
2859         atomic_set(&ha->num_pend_mbx_stage2, 0);
2860         atomic_set(&ha->num_pend_mbx_stage3, 0);
2861         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2862         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2863
2864         /* Assign ISP specific operations. */
2865         if (IS_QLA2100(ha)) {
2866                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2867                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2868                 req_length = REQUEST_ENTRY_CNT_2100;
2869                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2870                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2871                 ha->gid_list_info_size = 4;
2872                 ha->flash_conf_off = ~0;
2873                 ha->flash_data_off = ~0;
2874                 ha->nvram_conf_off = ~0;
2875                 ha->nvram_data_off = ~0;
2876                 ha->isp_ops = &qla2100_isp_ops;
2877         } else if (IS_QLA2200(ha)) {
2878                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2879                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2880                 req_length = REQUEST_ENTRY_CNT_2200;
2881                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2882                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2883                 ha->gid_list_info_size = 4;
2884                 ha->flash_conf_off = ~0;
2885                 ha->flash_data_off = ~0;
2886                 ha->nvram_conf_off = ~0;
2887                 ha->nvram_data_off = ~0;
2888                 ha->isp_ops = &qla2100_isp_ops;
2889         } else if (IS_QLA23XX(ha)) {
2890                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2891                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2892                 req_length = REQUEST_ENTRY_CNT_2200;
2893                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2894                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2895                 ha->gid_list_info_size = 6;
2896                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2897                         ha->optrom_size = OPTROM_SIZE_2322;
2898                 ha->flash_conf_off = ~0;
2899                 ha->flash_data_off = ~0;
2900                 ha->nvram_conf_off = ~0;
2901                 ha->nvram_data_off = ~0;
2902                 ha->isp_ops = &qla2300_isp_ops;
2903         } else if (IS_QLA24XX_TYPE(ha)) {
2904                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2905                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2906                 req_length = REQUEST_ENTRY_CNT_24XX;
2907                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2908                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2909                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2910                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2911                 ha->gid_list_info_size = 8;
2912                 ha->optrom_size = OPTROM_SIZE_24XX;
2913                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2914                 ha->isp_ops = &qla24xx_isp_ops;
2915                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2916                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2917                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2918                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2919         } else if (IS_QLA25XX(ha)) {
2920                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2921                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2922                 req_length = REQUEST_ENTRY_CNT_24XX;
2923                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2924                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2925                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2926                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2927                 ha->gid_list_info_size = 8;
2928                 ha->optrom_size = OPTROM_SIZE_25XX;
2929                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2930                 ha->isp_ops = &qla25xx_isp_ops;
2931                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2932                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2933                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2934                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2935         } else if (IS_QLA81XX(ha)) {
2936                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2937                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2938                 req_length = REQUEST_ENTRY_CNT_24XX;
2939                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2940                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2941                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2942                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2943                 ha->gid_list_info_size = 8;
2944                 ha->optrom_size = OPTROM_SIZE_81XX;
2945                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2946                 ha->isp_ops = &qla81xx_isp_ops;
2947                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2948                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2949                 ha->nvram_conf_off = ~0;
2950                 ha->nvram_data_off = ~0;
2951         } else if (IS_QLA82XX(ha)) {
2952                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2953                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2954                 req_length = REQUEST_ENTRY_CNT_82XX;
2955                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2956                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2957                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2958                 ha->gid_list_info_size = 8;
2959                 ha->optrom_size = OPTROM_SIZE_82XX;
2960                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2961                 ha->isp_ops = &qla82xx_isp_ops;
2962                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2963                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2964                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2965                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2966         } else if (IS_QLA8044(ha)) {
2967                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2968                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2969                 req_length = REQUEST_ENTRY_CNT_82XX;
2970                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2971                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2972                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2973                 ha->gid_list_info_size = 8;
2974                 ha->optrom_size = OPTROM_SIZE_83XX;
2975                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2976                 ha->isp_ops = &qla8044_isp_ops;
2977                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2978                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2979                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2980                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2981         } else if (IS_QLA83XX(ha)) {
2982                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2983                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2984                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2985                 req_length = REQUEST_ENTRY_CNT_83XX;
2986                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2987                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2988                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2989                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2990                 ha->gid_list_info_size = 8;
2991                 ha->optrom_size = OPTROM_SIZE_83XX;
2992                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2993                 ha->isp_ops = &qla83xx_isp_ops;
2994                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2995                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2996                 ha->nvram_conf_off = ~0;
2997                 ha->nvram_data_off = ~0;
2998         }  else if (IS_QLAFX00(ha)) {
2999                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3000                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3001                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3002                 req_length = REQUEST_ENTRY_CNT_FX00;
3003                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3004                 ha->isp_ops = &qlafx00_isp_ops;
3005                 ha->port_down_retry_count = 30; /* default value */
3006                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3007                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3008                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3009                 ha->mr.fw_hbt_en = 1;
3010                 ha->mr.host_info_resend = false;
3011                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3012         } else if (IS_QLA27XX(ha)) {
3013                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3014                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3015                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3016                 req_length = REQUEST_ENTRY_CNT_83XX;
3017                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3018                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3019                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3020                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3021                 ha->gid_list_info_size = 8;
3022                 ha->optrom_size = OPTROM_SIZE_83XX;
3023                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3024                 ha->isp_ops = &qla27xx_isp_ops;
3025                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3026                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3027                 ha->nvram_conf_off = ~0;
3028                 ha->nvram_data_off = ~0;
3029         }
3030
3031         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3032             "mbx_count=%d, req_length=%d, "
3033             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3034             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3035             "max_fibre_devices=%d.\n",
3036             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3037             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3038             ha->nvram_npiv_size, ha->max_fibre_devices);
3039         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3040             "isp_ops=%p, flash_conf_off=%d, "
3041             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3042             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3043             ha->nvram_conf_off, ha->nvram_data_off);
3044
3045         /* Configure PCI I/O space */
3046         ret = ha->isp_ops->iospace_config(ha);
3047         if (ret)
3048                 goto iospace_config_failed;
3049
3050         ql_log_pci(ql_log_info, pdev, 0x001d,
3051             "Found an ISP%04X irq %d iobase 0x%p.\n",
3052             pdev->device, pdev->irq, ha->iobase);
3053         mutex_init(&ha->vport_lock);
3054         mutex_init(&ha->mq_lock);
3055         init_completion(&ha->mbx_cmd_comp);
3056         complete(&ha->mbx_cmd_comp);
3057         init_completion(&ha->mbx_intr_comp);
3058         init_completion(&ha->dcbx_comp);
3059         init_completion(&ha->lb_portup_comp);
3060
3061         set_bit(0, (unsigned long *) ha->vp_idx_map);
3062
3063         qla2x00_config_dma_addressing(ha);
3064         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3065             "64 Bit addressing is %s.\n",
3066             ha->flags.enable_64bit_addressing ? "enable" :
3067             "disable");
3068         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3069         if (ret) {
3070                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3071                     "Failed to allocate memory for adapter, aborting.\n");
3072
3073                 goto probe_hw_failed;
3074         }
3075
3076         req->max_q_depth = MAX_Q_DEPTH;
3077         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3078                 req->max_q_depth = ql2xmaxqdepth;
3079
3080
3081         base_vha = qla2x00_create_host(sht, ha);
3082         if (!base_vha) {
3083                 ret = -ENOMEM;
3084                 goto probe_hw_failed;
3085         }
3086
3087         pci_set_drvdata(pdev, base_vha);
3088         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3089
3090         host = base_vha->host;
3091         base_vha->req = req;
3092         if (IS_QLA2XXX_MIDTYPE(ha))
3093                 base_vha->mgmt_svr_loop_id =
3094                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3095         else
3096                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3097                                                 base_vha->vp_idx;
3098
3099         /* Setup fcport template structure. */
3100         ha->mr.fcport.vha = base_vha;
3101         ha->mr.fcport.port_type = FCT_UNKNOWN;
3102         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3103         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3104         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3105         ha->mr.fcport.scan_state = 1;
3106
3107         /* Set the SG table size based on ISP type */
3108         if (!IS_FWI2_CAPABLE(ha)) {
3109                 if (IS_QLA2100(ha))
3110                         host->sg_tablesize = 32;
3111         } else {
3112                 if (!IS_QLA82XX(ha))
3113                         host->sg_tablesize = QLA_SG_ALL;
3114         }
3115         host->max_id = ha->max_fibre_devices;
3116         host->cmd_per_lun = 3;
3117         host->unique_id = host->host_no;
3118         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3119                 host->max_cmd_len = 32;
3120         else
3121                 host->max_cmd_len = MAX_CMDSZ;
3122         host->max_channel = MAX_BUSES - 1;
3123         /* Older HBAs support only 16-bit LUNs */
3124         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3125             ql2xmaxlun > 0xffff)
3126                 host->max_lun = 0xffff;
3127         else
3128                 host->max_lun = ql2xmaxlun;
3129         host->transportt = qla2xxx_transport_template;
3130         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3131
3132         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3133             "max_id=%d this_id=%d "
3134             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3135             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3136             host->this_id, host->cmd_per_lun, host->unique_id,
3137             host->max_cmd_len, host->max_channel, host->max_lun,
3138             host->transportt, sht->vendor_id);
3139
3140         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3141
3142         /* Set up the irqs */
3143         ret = qla2x00_request_irqs(ha, rsp);
3144         if (ret)
3145                 goto probe_failed;
3146
3147         /* Alloc arrays of request and response ring ptrs */
3148         ret = qla2x00_alloc_queues(ha, req, rsp);
3149         if (ret) {
3150                 ql_log(ql_log_fatal, base_vha, 0x003d,
3151                     "Failed to allocate memory for queue pointers..."
3152                     "aborting.\n");
3153                 goto probe_failed;
3154         }
3155
3156         if (ha->mqenable && shost_use_blk_mq(host)) {
3157                 /* number of hardware queues supported by blk/scsi-mq*/
3158                 host->nr_hw_queues = ha->max_qpairs;
3159
3160                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3161                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3162         } else {
3163                 if (ql2xnvmeenable) {
3164                         host->nr_hw_queues = ha->max_qpairs;
3165                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3166                             "FC-NVMe support is enabled, HW queues=%d\n",
3167                             host->nr_hw_queues);
3168                 } else {
3169                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3170                             "blk/scsi-mq disabled.\n");
3171                 }
3172         }
3173
3174         qlt_probe_one_stage1(base_vha, ha);
3175
3176         pci_save_state(pdev);
3177
3178         /* Assign back pointers */
3179         rsp->req = req;
3180         req->rsp = rsp;
3181
3182         if (IS_QLAFX00(ha)) {
3183                 ha->rsp_q_map[0] = rsp;
3184                 ha->req_q_map[0] = req;
3185                 set_bit(0, ha->req_qid_map);
3186                 set_bit(0, ha->rsp_qid_map);
3187         }
3188
3189         /* FWI2-capable only. */
3190         req->req_q_in = &ha->iobase->isp24.req_q_in;
3191         req->req_q_out = &ha->iobase->isp24.req_q_out;
3192         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3193         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3194         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3195                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3196                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3197                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3198                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3199         }
3200
3201         if (IS_QLAFX00(ha)) {
3202                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3203                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3204                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3205                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3206         }
3207
3208         if (IS_P3P_TYPE(ha)) {
3209                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3210                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3211                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3212         }
3213
3214         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3215             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3216             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3217         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3218             "req->req_q_in=%p req->req_q_out=%p "
3219             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3220             req->req_q_in, req->req_q_out,
3221             rsp->rsp_q_in, rsp->rsp_q_out);
3222         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3223             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3224             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3225         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3226             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3227             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3228
3229         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3230
3231         if (ha->isp_ops->initialize_adapter(base_vha)) {
3232                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3233                     "Failed to initialize adapter - Adapter flags %x.\n",
3234                     base_vha->device_flags);
3235
3236                 if (IS_QLA82XX(ha)) {
3237                         qla82xx_idc_lock(ha);
3238                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3239                                 QLA8XXX_DEV_FAILED);
3240                         qla82xx_idc_unlock(ha);
3241                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3242                             "HW State: FAILED.\n");
3243                 } else if (IS_QLA8044(ha)) {
3244                         qla8044_idc_lock(ha);
3245                         qla8044_wr_direct(base_vha,
3246                                 QLA8044_CRB_DEV_STATE_INDEX,
3247                                 QLA8XXX_DEV_FAILED);
3248                         qla8044_idc_unlock(ha);
3249                         ql_log(ql_log_fatal, base_vha, 0x0150,
3250                             "HW State: FAILED.\n");
3251                 }
3252
3253                 ret = -ENODEV;
3254                 goto probe_failed;
3255         }
3256
3257         if (IS_QLAFX00(ha))
3258                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3259         else
3260                 host->can_queue = req->num_outstanding_cmds - 10;
3261
3262         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3263             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3264             host->can_queue, base_vha->req,
3265             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3266
3267         if (ha->mqenable) {
3268                 bool mq = false;
3269                 bool startit = false;
3270
3271                 if (QLA_TGT_MODE_ENABLED()) {
3272                         mq = true;
3273                         startit = false;
3274                 }
3275
3276                 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3277                     shost_use_blk_mq(host)) {
3278                         mq = true;
3279                         startit = true;
3280                 }
3281
3282                 if (mq) {
3283                         /* Create start of day qpairs for Block MQ */
3284                         for (i = 0; i < ha->max_qpairs; i++)
3285                                 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3286                 }
3287         }
3288
3289         if (ha->flags.running_gold_fw)
3290                 goto skip_dpc;
3291
3292         /*
3293          * Startup the kernel thread for this host adapter
3294          */
3295         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3296             "%s_dpc", base_vha->host_str);
3297         if (IS_ERR(ha->dpc_thread)) {
3298                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3299                     "Failed to start DPC thread.\n");
3300                 ret = PTR_ERR(ha->dpc_thread);
3301                 ha->dpc_thread = NULL;
3302                 goto probe_failed;
3303         }
3304         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3305             "DPC thread started successfully.\n");
3306
3307         /*
3308          * If we're not coming up in initiator mode, we might sit for
3309          * a while without waking up the dpc thread, which leads to a
3310          * stuck process warning.  So just kick the dpc once here and
3311          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3312          */
3313         qla2xxx_wake_dpc(base_vha);
3314
3315         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3316
3317         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3318                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3319                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3320                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3321
3322                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3323                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3324                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3325                 INIT_WORK(&ha->idc_state_handler,
3326                     qla83xx_idc_state_handler_work);
3327                 INIT_WORK(&ha->nic_core_unrecoverable,
3328                     qla83xx_nic_core_unrecoverable_work);
3329         }
3330
3331 skip_dpc:
3332         list_add_tail(&base_vha->list, &ha->vp_list);
3333         base_vha->host->irq = ha->pdev->irq;
3334
3335         /* Initialized the timer */
3336         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3337         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3338             "Started qla2x00_timer with "
3339             "interval=%d.\n", WATCH_INTERVAL);
3340         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3341             "Detected hba at address=%p.\n",
3342             ha);
3343
3344         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3345                 if (ha->fw_attributes & BIT_4) {
3346                         int prot = 0, guard;
3347                         base_vha->flags.difdix_supported = 1;
3348                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3349                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3350                         if (ql2xenabledif == 1)
3351                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3352                         scsi_host_set_prot(host,
3353                             prot | SHOST_DIF_TYPE1_PROTECTION
3354                             | SHOST_DIF_TYPE2_PROTECTION
3355                             | SHOST_DIF_TYPE3_PROTECTION
3356                             | SHOST_DIX_TYPE1_PROTECTION
3357                             | SHOST_DIX_TYPE2_PROTECTION
3358                             | SHOST_DIX_TYPE3_PROTECTION);
3359
3360                         guard = SHOST_DIX_GUARD_CRC;
3361
3362                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3363                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3364                                 guard |= SHOST_DIX_GUARD_IP;
3365
3366                         scsi_host_set_guard(host, guard);
3367                 } else
3368                         base_vha->flags.difdix_supported = 0;
3369         }
3370
3371         ha->isp_ops->enable_intrs(ha);
3372
3373         if (IS_QLAFX00(ha)) {
3374                 ret = qlafx00_fx_disc(base_vha,
3375                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3376                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3377                     QLA_SG_ALL : 128;
3378         }
3379
3380         ret = scsi_add_host(host, &pdev->dev);
3381         if (ret)
3382                 goto probe_failed;
3383
3384         base_vha->flags.init_done = 1;
3385         base_vha->flags.online = 1;
3386         ha->prev_minidump_failed = 0;
3387
3388         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3389             "Init done and hba is online.\n");
3390
3391         if (qla_ini_mode_enabled(base_vha) ||
3392                 qla_dual_mode_enabled(base_vha))
3393                 scsi_scan_host(host);
3394         else
3395                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3396                         "skipping scsi_scan_host() for non-initiator port\n");
3397
3398         qla2x00_alloc_sysfs_attr(base_vha);
3399
3400         if (IS_QLAFX00(ha)) {
3401                 ret = qlafx00_fx_disc(base_vha,
3402                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3403
3404                 /* Register system information */
3405                 ret =  qlafx00_fx_disc(base_vha,
3406                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3407         }
3408
3409         qla2x00_init_host_attr(base_vha);
3410
3411         qla2x00_dfs_setup(base_vha);
3412
3413         ql_log(ql_log_info, base_vha, 0x00fb,
3414             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3415         ql_log(ql_log_info, base_vha, 0x00fc,
3416             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3417             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3418             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3419             base_vha->host_no,
3420             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3421
3422         qlt_add_target(ha, base_vha);
3423
3424         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3425
3426         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3427                 return -ENODEV;
3428
3429         if (ha->flags.detected_lr_sfp) {
3430                 ql_log(ql_log_info, base_vha, 0xffff,
3431                     "Reset chip to pick up LR SFP setting\n");
3432                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3433                 qla2xxx_wake_dpc(base_vha);
3434         }
3435
3436         return 0;
3437
3438 probe_failed:
3439         if (base_vha->timer_active)
3440                 qla2x00_stop_timer(base_vha);
3441         base_vha->flags.online = 0;
3442         if (ha->dpc_thread) {
3443                 struct task_struct *t = ha->dpc_thread;
3444
3445                 ha->dpc_thread = NULL;
3446                 kthread_stop(t);
3447         }
3448
3449         qla2x00_free_device(base_vha);
3450         scsi_host_put(base_vha->host);
3451         /*
3452          * Need to NULL out local req/rsp after
3453          * qla2x00_free_device => qla2x00_free_queues frees
3454          * what these are pointing to. Or else we'll
3455          * fall over below in qla2x00_free_req/rsp_que.
3456          */
3457         req = NULL;
3458         rsp = NULL;
3459
3460 probe_hw_failed:
3461         qla2x00_mem_free(ha);
3462         qla2x00_free_req_que(ha, req);
3463         qla2x00_free_rsp_que(ha, rsp);
3464         qla2x00_clear_drv_active(ha);
3465
3466 iospace_config_failed:
3467         if (IS_P3P_TYPE(ha)) {
3468                 if (!ha->nx_pcibase)
3469                         iounmap((device_reg_t *)ha->nx_pcibase);
3470                 if (!ql2xdbwr)
3471                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3472         } else {
3473                 if (ha->iobase)
3474                         iounmap(ha->iobase);
3475                 if (ha->cregbase)
3476                         iounmap(ha->cregbase);
3477         }
3478         pci_release_selected_regions(ha->pdev, ha->bars);
3479         kfree(ha);
3480
3481 disable_device:
3482         pci_disable_device(pdev);
3483         return ret;
3484 }
3485
3486 static void
3487 qla2x00_shutdown(struct pci_dev *pdev)
3488 {
3489         scsi_qla_host_t *vha;
3490         struct qla_hw_data  *ha;
3491
3492         vha = pci_get_drvdata(pdev);
3493         ha = vha->hw;
3494
3495         ql_log(ql_log_info, vha, 0xfffa,
3496                 "Adapter shutdown\n");
3497
3498         /*
3499          * Prevent future board_disable and wait
3500          * until any pending board_disable has completed.
3501          */
3502         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3503         cancel_work_sync(&ha->board_disable);
3504
3505         if (!atomic_read(&pdev->enable_cnt))
3506                 return;
3507
3508         /* Notify ISPFX00 firmware */
3509         if (IS_QLAFX00(ha))
3510                 qlafx00_driver_shutdown(vha, 20);
3511
3512         /* Turn-off FCE trace */
3513         if (ha->flags.fce_enabled) {
3514                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3515                 ha->flags.fce_enabled = 0;
3516         }
3517
3518         /* Turn-off EFT trace */
3519         if (ha->eft)
3520                 qla2x00_disable_eft_trace(vha);
3521
3522         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3523                 if (ha->flags.fw_started)
3524                         qla2x00_abort_isp_cleanup(vha);
3525         } else {
3526                 /* Stop currently executing firmware. */
3527                 qla2x00_try_to_stop_firmware(vha);
3528         }
3529
3530         /* Turn adapter off line */
3531         vha->flags.online = 0;
3532
3533         /* turn-off interrupts on the card */
3534         if (ha->interrupts_on) {
3535                 vha->flags.init_done = 0;
3536                 ha->isp_ops->disable_intrs(ha);
3537         }
3538
3539         qla2x00_free_irqs(vha);
3540
3541         qla2x00_free_fw_dump(ha);
3542
3543         pci_disable_device(pdev);
3544         ql_log(ql_log_info, vha, 0xfffe,
3545                 "Adapter shutdown successfully.\n");
3546 }
3547
3548 /* Deletes all the virtual ports for a given ha */
3549 static void
3550 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3551 {
3552         scsi_qla_host_t *vha;
3553         unsigned long flags;
3554
3555         mutex_lock(&ha->vport_lock);
3556         while (ha->cur_vport_count) {
3557                 spin_lock_irqsave(&ha->vport_slock, flags);
3558
3559                 BUG_ON(base_vha->list.next == &ha->vp_list);
3560                 /* This assumes first entry in ha->vp_list is always base vha */
3561                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3562                 scsi_host_get(vha->host);
3563
3564                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3565                 mutex_unlock(&ha->vport_lock);
3566
3567                 fc_vport_terminate(vha->fc_vport);
3568                 scsi_host_put(vha->host);
3569
3570                 mutex_lock(&ha->vport_lock);
3571         }
3572         mutex_unlock(&ha->vport_lock);
3573 }
3574
3575 /* Stops all deferred work threads */
3576 static void
3577 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3578 {
3579         /* Cancel all work and destroy DPC workqueues */
3580         if (ha->dpc_lp_wq) {
3581                 cancel_work_sync(&ha->idc_aen);
3582                 destroy_workqueue(ha->dpc_lp_wq);
3583                 ha->dpc_lp_wq = NULL;
3584         }
3585
3586         if (ha->dpc_hp_wq) {
3587                 cancel_work_sync(&ha->nic_core_reset);
3588                 cancel_work_sync(&ha->idc_state_handler);
3589                 cancel_work_sync(&ha->nic_core_unrecoverable);
3590                 destroy_workqueue(ha->dpc_hp_wq);
3591                 ha->dpc_hp_wq = NULL;
3592         }
3593
3594         /* Kill the kernel thread for this host */
3595         if (ha->dpc_thread) {
3596                 struct task_struct *t = ha->dpc_thread;
3597
3598                 /*
3599                  * qla2xxx_wake_dpc checks for ->dpc_thread
3600                  * so we need to zero it out.
3601                  */
3602                 ha->dpc_thread = NULL;
3603                 kthread_stop(t);
3604         }
3605 }
3606
3607 static void
3608 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3609 {
3610         if (IS_QLA82XX(ha)) {
3611
3612                 iounmap((device_reg_t *)ha->nx_pcibase);
3613                 if (!ql2xdbwr)
3614                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3615         } else {
3616                 if (ha->iobase)
3617                         iounmap(ha->iobase);
3618
3619                 if (ha->cregbase)
3620                         iounmap(ha->cregbase);
3621
3622                 if (ha->mqiobase)
3623                         iounmap(ha->mqiobase);
3624
3625                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3626                         iounmap(ha->msixbase);
3627         }
3628 }
3629
3630 static void
3631 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3632 {
3633         if (IS_QLA8044(ha)) {
3634                 qla8044_idc_lock(ha);
3635                 qla8044_clear_drv_active(ha);
3636                 qla8044_idc_unlock(ha);
3637         } else if (IS_QLA82XX(ha)) {
3638                 qla82xx_idc_lock(ha);
3639                 qla82xx_clear_drv_active(ha);
3640                 qla82xx_idc_unlock(ha);
3641         }
3642 }
3643
3644 static void
3645 qla2x00_remove_one(struct pci_dev *pdev)
3646 {
3647         scsi_qla_host_t *base_vha;
3648         struct qla_hw_data  *ha;
3649
3650         base_vha = pci_get_drvdata(pdev);
3651         ha = base_vha->hw;
3652         ql_log(ql_log_info, base_vha, 0xb079,
3653             "Removing driver\n");
3654
3655         /* Indicate device removal to prevent future board_disable and wait
3656          * until any pending board_disable has completed. */
3657         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3658         cancel_work_sync(&ha->board_disable);
3659
3660         /*
3661          * If the PCI device is disabled then there was a PCI-disconnect and
3662          * qla2x00_disable_board_on_pci_error has taken care of most of the
3663          * resources.
3664          */
3665         if (!atomic_read(&pdev->enable_cnt)) {
3666                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3667                     base_vha->gnl.l, base_vha->gnl.ldma);
3668
3669                 scsi_host_put(base_vha->host);
3670                 kfree(ha);
3671                 pci_set_drvdata(pdev, NULL);
3672                 return;
3673         }
3674         qla2x00_wait_for_hba_ready(base_vha);
3675
3676         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3677                 if (ha->flags.fw_started)
3678                         qla2x00_abort_isp_cleanup(base_vha);
3679         } else if (!IS_QLAFX00(ha)) {
3680                 if (IS_QLA8031(ha)) {
3681                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3682                             "Clearing fcoe driver presence.\n");
3683                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3684                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3685                                     "Error while clearing DRV-Presence.\n");
3686                 }
3687
3688                 qla2x00_try_to_stop_firmware(base_vha);
3689         }
3690
3691         qla2x00_wait_for_sess_deletion(base_vha);
3692
3693         /*
3694          * if UNLOAD flag is already set, then continue unload,
3695          * where it was set first.
3696          */
3697         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3698                 return;
3699
3700         set_bit(UNLOADING, &base_vha->dpc_flags);
3701
3702         qla_nvme_delete(base_vha);
3703
3704         dma_free_coherent(&ha->pdev->dev,
3705                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3706
3707         vfree(base_vha->scan.l);
3708
3709         if (IS_QLAFX00(ha))
3710                 qlafx00_driver_shutdown(base_vha, 20);
3711
3712         qla2x00_delete_all_vps(ha, base_vha);
3713
3714         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3715
3716         qla2x00_dfs_remove(base_vha);
3717
3718         qla84xx_put_chip(base_vha);
3719
3720         /* Disable timer */
3721         if (base_vha->timer_active)
3722                 qla2x00_stop_timer(base_vha);
3723
3724         base_vha->flags.online = 0;
3725
3726         /* free DMA memory */
3727         if (ha->exlogin_buf)
3728                 qla2x00_free_exlogin_buffer(ha);
3729
3730         /* free DMA memory */
3731         if (ha->exchoffld_buf)
3732                 qla2x00_free_exchoffld_buffer(ha);
3733
3734         qla2x00_destroy_deferred_work(ha);
3735
3736         qlt_remove_target(ha, base_vha);
3737
3738         qla2x00_free_sysfs_attr(base_vha, true);
3739
3740         fc_remove_host(base_vha->host);
3741         qlt_remove_target_resources(ha);
3742
3743         scsi_remove_host(base_vha->host);
3744
3745         qla2x00_free_device(base_vha);
3746
3747         qla2x00_clear_drv_active(ha);
3748
3749         scsi_host_put(base_vha->host);
3750
3751         qla2x00_unmap_iobases(ha);
3752
3753         pci_release_selected_regions(ha->pdev, ha->bars);
3754         kfree(ha);
3755
3756         pci_disable_pcie_error_reporting(pdev);
3757
3758         pci_disable_device(pdev);
3759 }
3760
3761 static void
3762 qla2x00_free_device(scsi_qla_host_t *vha)
3763 {
3764         struct qla_hw_data *ha = vha->hw;
3765
3766         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3767
3768         /* Disable timer */
3769         if (vha->timer_active)
3770                 qla2x00_stop_timer(vha);
3771
3772         qla25xx_delete_queues(vha);
3773         vha->flags.online = 0;
3774
3775         /* turn-off interrupts on the card */
3776         if (ha->interrupts_on) {
3777                 vha->flags.init_done = 0;
3778                 ha->isp_ops->disable_intrs(ha);
3779         }
3780
3781         qla2x00_free_fcports(vha);
3782
3783         qla2x00_free_irqs(vha);
3784
3785         /* Flush the work queue and remove it */
3786         if (ha->wq) {
3787                 flush_workqueue(ha->wq);
3788                 destroy_workqueue(ha->wq);
3789                 ha->wq = NULL;
3790         }
3791
3792
3793         qla2x00_mem_free(ha);
3794
3795         qla82xx_md_free(vha);
3796
3797         qla2x00_free_queues(ha);
3798 }
3799
3800 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3801 {
3802         fc_port_t *fcport, *tfcport;
3803
3804         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3805                 list_del(&fcport->list);
3806                 qla2x00_clear_loop_id(fcport);
3807                 kfree(fcport);
3808         }
3809 }
3810
3811 static inline void
3812 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3813     int defer)
3814 {
3815         struct fc_rport *rport;
3816         scsi_qla_host_t *base_vha;
3817         unsigned long flags;
3818
3819         if (!fcport->rport)
3820                 return;
3821
3822         rport = fcport->rport;
3823         if (defer) {
3824                 base_vha = pci_get_drvdata(vha->hw->pdev);
3825                 spin_lock_irqsave(vha->host->host_lock, flags);
3826                 fcport->drport = rport;
3827                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3828                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3829                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3830                 qla2xxx_wake_dpc(base_vha);
3831         } else {
3832                 int now;
3833                 if (rport) {
3834                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3835                             "%s %8phN. rport %p roles %x\n",
3836                             __func__, fcport->port_name, rport,
3837                             rport->roles);
3838                         fc_remote_port_delete(rport);
3839                 }
3840                 qlt_do_generation_tick(vha, &now);
3841         }
3842 }
3843
3844 /*
3845  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3846  *
3847  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3848  *
3849  * Return: None.
3850  *
3851  * Context:
3852  */
3853 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3854     int do_login, int defer)
3855 {
3856         if (IS_QLAFX00(vha->hw)) {
3857                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3858                 qla2x00_schedule_rport_del(vha, fcport, defer);
3859                 return;
3860         }
3861
3862         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3863             vha->vp_idx == fcport->vha->vp_idx) {
3864                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3865                 qla2x00_schedule_rport_del(vha, fcport, defer);
3866         }
3867         /*
3868          * We may need to retry the login, so don't change the state of the
3869          * port but do the retries.
3870          */
3871         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3872                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3873
3874         if (!do_login)
3875                 return;
3876
3877         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3878 }
3879
3880 /*
3881  * qla2x00_mark_all_devices_lost
3882  *      Updates fcport state when device goes offline.
3883  *
3884  * Input:
3885  *      ha = adapter block pointer.
3886  *      fcport = port structure pointer.
3887  *
3888  * Return:
3889  *      None.
3890  *
3891  * Context:
3892  */
3893 void
3894 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3895 {
3896         fc_port_t *fcport;
3897
3898         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3899             "Mark all dev lost\n");
3900
3901         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3902                 fcport->scan_state = 0;
3903                 qlt_schedule_sess_for_deletion(fcport);
3904
3905                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3906                         continue;
3907
3908                 /*
3909                  * No point in marking the device as lost, if the device is
3910                  * already DEAD.
3911                  */
3912                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3913                         continue;
3914                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3915                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3916                         if (defer)
3917                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3918                         else if (vha->vp_idx == fcport->vha->vp_idx)
3919                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3920                 }
3921         }
3922 }
3923
3924 /*
3925 * qla2x00_mem_alloc
3926 *      Allocates adapter memory.
3927 *
3928 * Returns:
3929 *      0  = success.
3930 *      !0  = failure.
3931 */
3932 static int
3933 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3934         struct req_que **req, struct rsp_que **rsp)
3935 {
3936         char    name[16];
3937
3938         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3939                 &ha->init_cb_dma, GFP_KERNEL);
3940         if (!ha->init_cb)
3941                 goto fail;
3942
3943         if (qlt_mem_alloc(ha) < 0)
3944                 goto fail_free_init_cb;
3945
3946         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3947                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3948         if (!ha->gid_list)
3949                 goto fail_free_tgt_mem;
3950
3951         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3952         if (!ha->srb_mempool)
3953                 goto fail_free_gid_list;
3954
3955         if (IS_P3P_TYPE(ha)) {
3956                 /* Allocate cache for CT6 Ctx. */
3957                 if (!ctx_cachep) {
3958                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3959                                 sizeof(struct ct6_dsd), 0,
3960                                 SLAB_HWCACHE_ALIGN, NULL);
3961                         if (!ctx_cachep)
3962                                 goto fail_free_srb_mempool;
3963                 }
3964                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3965                         ctx_cachep);
3966                 if (!ha->ctx_mempool)
3967                         goto fail_free_srb_mempool;
3968                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3969                     "ctx_cachep=%p ctx_mempool=%p.\n",
3970                     ctx_cachep, ha->ctx_mempool);
3971         }
3972
3973         /* Get memory for cached NVRAM */
3974         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3975         if (!ha->nvram)
3976                 goto fail_free_ctx_mempool;
3977
3978         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3979                 ha->pdev->device);
3980         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3981                 DMA_POOL_SIZE, 8, 0);
3982         if (!ha->s_dma_pool)
3983                 goto fail_free_nvram;
3984
3985         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3986             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3987             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3988
3989         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3990                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3991                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3992                 if (!ha->dl_dma_pool) {
3993                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3994                             "Failed to allocate memory for dl_dma_pool.\n");
3995                         goto fail_s_dma_pool;
3996                 }
3997
3998                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3999                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4000                 if (!ha->fcp_cmnd_dma_pool) {
4001                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4002                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4003                         goto fail_dl_dma_pool;
4004                 }
4005                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4006                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
4007                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
4008         }
4009
4010         /* Allocate memory for SNS commands */
4011         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4012         /* Get consistent memory allocated for SNS commands */
4013                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4014                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4015                 if (!ha->sns_cmd)
4016                         goto fail_dma_pool;
4017                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4018                     "sns_cmd: %p.\n", ha->sns_cmd);
4019         } else {
4020         /* Get consistent memory allocated for MS IOCB */
4021                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4022                         &ha->ms_iocb_dma);
4023                 if (!ha->ms_iocb)
4024                         goto fail_dma_pool;
4025         /* Get consistent memory allocated for CT SNS commands */
4026                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4027                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4028                 if (!ha->ct_sns)
4029                         goto fail_free_ms_iocb;
4030                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4031                     "ms_iocb=%p ct_sns=%p.\n",
4032                     ha->ms_iocb, ha->ct_sns);
4033         }
4034
4035         /* Allocate memory for request ring */
4036         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4037         if (!*req) {
4038                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4039                     "Failed to allocate memory for req.\n");
4040                 goto fail_req;
4041         }
4042         (*req)->length = req_len;
4043         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4044                 ((*req)->length + 1) * sizeof(request_t),
4045                 &(*req)->dma, GFP_KERNEL);
4046         if (!(*req)->ring) {
4047                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4048                     "Failed to allocate memory for req_ring.\n");
4049                 goto fail_req_ring;
4050         }
4051         /* Allocate memory for response ring */
4052         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4053         if (!*rsp) {
4054                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4055                     "Failed to allocate memory for rsp.\n");
4056                 goto fail_rsp;
4057         }
4058         (*rsp)->hw = ha;
4059         (*rsp)->length = rsp_len;
4060         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4061                 ((*rsp)->length + 1) * sizeof(response_t),
4062                 &(*rsp)->dma, GFP_KERNEL);
4063         if (!(*rsp)->ring) {
4064                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4065                     "Failed to allocate memory for rsp_ring.\n");
4066                 goto fail_rsp_ring;
4067         }
4068         (*req)->rsp = *rsp;
4069         (*rsp)->req = *req;
4070         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4071             "req=%p req->length=%d req->ring=%p rsp=%p "
4072             "rsp->length=%d rsp->ring=%p.\n",
4073             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4074             (*rsp)->ring);
4075         /* Allocate memory for NVRAM data for vports */
4076         if (ha->nvram_npiv_size) {
4077                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4078                                         sizeof(struct qla_npiv_entry),
4079                                         GFP_KERNEL);
4080                 if (!ha->npiv_info) {
4081                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4082                             "Failed to allocate memory for npiv_info.\n");
4083                         goto fail_npiv_info;
4084                 }
4085         } else
4086                 ha->npiv_info = NULL;
4087
4088         /* Get consistent memory allocated for EX-INIT-CB. */
4089         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
4090                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4091                     &ha->ex_init_cb_dma);
4092                 if (!ha->ex_init_cb)
4093                         goto fail_ex_init_cb;
4094                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4095                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4096         }
4097
4098         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4099
4100         /* Get consistent memory allocated for Async Port-Database. */
4101         if (!IS_FWI2_CAPABLE(ha)) {
4102                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4103                         &ha->async_pd_dma);
4104                 if (!ha->async_pd)
4105                         goto fail_async_pd;
4106                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4107                     "async_pd=%p.\n", ha->async_pd);
4108         }
4109
4110         INIT_LIST_HEAD(&ha->vp_list);
4111
4112         /* Allocate memory for our loop_id bitmap */
4113         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4114                                   sizeof(long),
4115                                   GFP_KERNEL);
4116         if (!ha->loop_id_map)
4117                 goto fail_loop_id_map;
4118         else {
4119                 qla2x00_set_reserved_loop_ids(ha);
4120                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4121                     "loop_id_map=%p.\n", ha->loop_id_map);
4122         }
4123
4124         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4125             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4126         if (!ha->sfp_data) {
4127                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4128                     "Unable to allocate memory for SFP read-data.\n");
4129                 goto fail_sfp_data;
4130         }
4131
4132         return 0;
4133
4134 fail_sfp_data:
4135         kfree(ha->loop_id_map);
4136 fail_loop_id_map:
4137         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4138 fail_async_pd:
4139         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4140 fail_ex_init_cb:
4141         kfree(ha->npiv_info);
4142 fail_npiv_info:
4143         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4144                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4145         (*rsp)->ring = NULL;
4146         (*rsp)->dma = 0;
4147 fail_rsp_ring:
4148         kfree(*rsp);
4149         *rsp = NULL;
4150 fail_rsp:
4151         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4152                 sizeof(request_t), (*req)->ring, (*req)->dma);
4153         (*req)->ring = NULL;
4154         (*req)->dma = 0;
4155 fail_req_ring:
4156         kfree(*req);
4157         *req = NULL;
4158 fail_req:
4159         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4160                 ha->ct_sns, ha->ct_sns_dma);
4161         ha->ct_sns = NULL;
4162         ha->ct_sns_dma = 0;
4163 fail_free_ms_iocb:
4164         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4165         ha->ms_iocb = NULL;
4166         ha->ms_iocb_dma = 0;
4167
4168         if (ha->sns_cmd)
4169                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4170                     ha->sns_cmd, ha->sns_cmd_dma);
4171 fail_dma_pool:
4172         if (IS_QLA82XX(ha) || ql2xenabledif) {
4173                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4174                 ha->fcp_cmnd_dma_pool = NULL;
4175         }
4176 fail_dl_dma_pool:
4177         if (IS_QLA82XX(ha) || ql2xenabledif) {
4178                 dma_pool_destroy(ha->dl_dma_pool);
4179                 ha->dl_dma_pool = NULL;
4180         }
4181 fail_s_dma_pool:
4182         dma_pool_destroy(ha->s_dma_pool);
4183         ha->s_dma_pool = NULL;
4184 fail_free_nvram:
4185         kfree(ha->nvram);
4186         ha->nvram = NULL;
4187 fail_free_ctx_mempool:
4188         if (ha->ctx_mempool)
4189                 mempool_destroy(ha->ctx_mempool);
4190         ha->ctx_mempool = NULL;
4191 fail_free_srb_mempool:
4192         if (ha->srb_mempool)
4193                 mempool_destroy(ha->srb_mempool);
4194         ha->srb_mempool = NULL;
4195 fail_free_gid_list:
4196         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4197         ha->gid_list,
4198         ha->gid_list_dma);
4199         ha->gid_list = NULL;
4200         ha->gid_list_dma = 0;
4201 fail_free_tgt_mem:
4202         qlt_mem_free(ha);
4203 fail_free_init_cb:
4204         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4205         ha->init_cb_dma);
4206         ha->init_cb = NULL;
4207         ha->init_cb_dma = 0;
4208 fail:
4209         ql_log(ql_log_fatal, NULL, 0x0030,
4210             "Memory allocation failure.\n");
4211         return -ENOMEM;
4212 }
4213
4214 int
4215 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4216 {
4217         int rval;
4218         uint16_t        size, max_cnt, temp;
4219         struct qla_hw_data *ha = vha->hw;
4220
4221         /* Return if we don't need to alloacate any extended logins */
4222         if (!ql2xexlogins)
4223                 return QLA_SUCCESS;
4224
4225         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4226                 return QLA_SUCCESS;
4227
4228         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4229         max_cnt = 0;
4230         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4231         if (rval != QLA_SUCCESS) {
4232                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4233                     "Failed to get exlogin status.\n");
4234                 return rval;
4235         }
4236
4237         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4238         temp *= size;
4239
4240         if (temp != ha->exlogin_size) {
4241                 qla2x00_free_exlogin_buffer(ha);
4242                 ha->exlogin_size = temp;
4243
4244                 ql_log(ql_log_info, vha, 0xd024,
4245                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4246                     max_cnt, size, temp);
4247
4248                 ql_log(ql_log_info, vha, 0xd025,
4249                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4250
4251                 /* Get consistent memory for extended logins */
4252                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4253                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4254                 if (!ha->exlogin_buf) {
4255                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4256                     "Failed to allocate memory for exlogin_buf_dma.\n");
4257                         return -ENOMEM;
4258                 }
4259         }
4260
4261         /* Now configure the dma buffer */
4262         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4263         if (rval) {
4264                 ql_log(ql_log_fatal, vha, 0xd033,
4265                     "Setup extended login buffer  ****FAILED****.\n");
4266                 qla2x00_free_exlogin_buffer(ha);
4267         }
4268
4269         return rval;
4270 }
4271
4272 /*
4273 * qla2x00_free_exlogin_buffer
4274 *
4275 * Input:
4276 *       ha = adapter block pointer
4277 */
4278 void
4279 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4280 {
4281         if (ha->exlogin_buf) {
4282                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4283                     ha->exlogin_buf, ha->exlogin_buf_dma);
4284                 ha->exlogin_buf = NULL;
4285                 ha->exlogin_size = 0;
4286         }
4287 }
4288
4289 static void
4290 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4291 {
4292         u32 temp;
4293         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4294         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4295
4296         if (max_cnt > vha->hw->max_exchg)
4297                 max_cnt = vha->hw->max_exchg;
4298
4299         if (qla_ini_mode_enabled(vha)) {
4300                 if (vha->ql2xiniexchg > max_cnt)
4301                         vha->ql2xiniexchg = max_cnt;
4302
4303                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4304                         *ret_cnt = vha->ql2xiniexchg;
4305
4306         } else if (qla_tgt_mode_enabled(vha)) {
4307                 if (vha->ql2xexchoffld > max_cnt) {
4308                         vha->ql2xexchoffld = max_cnt;
4309                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4310                 }
4311
4312                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4313                         *ret_cnt = vha->ql2xexchoffld;
4314         } else if (qla_dual_mode_enabled(vha)) {
4315                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4316                 if (temp > max_cnt) {
4317                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4318                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4319                         temp = max_cnt;
4320                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4321                 }
4322
4323                 if (temp > FW_DEF_EXCHANGES_CNT)
4324                         *ret_cnt = temp;
4325         }
4326 }
4327
4328 int
4329 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4330 {
4331         int rval;
4332         u16     size, max_cnt;
4333         u32 actual_cnt, totsz;
4334         struct qla_hw_data *ha = vha->hw;
4335
4336         if (!ha->flags.exchoffld_enabled)
4337                 return QLA_SUCCESS;
4338
4339         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4340                 return QLA_SUCCESS;
4341
4342         max_cnt = 0;
4343         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4344         if (rval != QLA_SUCCESS) {
4345                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4346                     "Failed to get exlogin status.\n");
4347                 return rval;
4348         }
4349
4350         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4351         ql_log(ql_log_info, vha, 0xd014,
4352             "Actual exchange offload count: %d.\n", actual_cnt);
4353
4354         totsz = actual_cnt * size;
4355
4356         if (totsz != ha->exchoffld_size) {
4357                 qla2x00_free_exchoffld_buffer(ha);
4358                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4359                         ha->exchoffld_size = 0;
4360                         ha->flags.exchoffld_enabled = 0;
4361                         return QLA_SUCCESS;
4362                 }
4363
4364                 ha->exchoffld_size = totsz;
4365
4366                 ql_log(ql_log_info, vha, 0xd016,
4367                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4368                     max_cnt, actual_cnt, size, totsz);
4369
4370                 ql_log(ql_log_info, vha, 0xd017,
4371                     "Exchange Buffers requested size = 0x%x\n",
4372                     ha->exchoffld_size);
4373
4374                 /* Get consistent memory for extended logins */
4375                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4376                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4377                 if (!ha->exchoffld_buf) {
4378                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4379                         "Failed to allocate memory for Exchange Offload.\n");
4380
4381                         if (ha->max_exchg >
4382                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4383                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4384                         } else if (ha->max_exchg >
4385                             (FW_DEF_EXCHANGES_CNT + 512)) {
4386                                 ha->max_exchg -= 512;
4387                         } else {
4388                                 ha->flags.exchoffld_enabled = 0;
4389                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4390                                     "Disabling Exchange offload due to lack of memory\n");
4391                         }
4392                         ha->exchoffld_size = 0;
4393
4394                         return -ENOMEM;
4395                 }
4396         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4397                 /* pathological case */
4398                 qla2x00_free_exchoffld_buffer(ha);
4399                 ha->exchoffld_size = 0;
4400                 ha->flags.exchoffld_enabled = 0;
4401                 ql_log(ql_log_info, vha, 0xd016,
4402                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4403                     ha->exchoffld_size, actual_cnt, size, totsz);
4404                 return 0;
4405         }
4406
4407         /* Now configure the dma buffer */
4408         rval = qla_set_exchoffld_mem_cfg(vha);
4409         if (rval) {
4410                 ql_log(ql_log_fatal, vha, 0xd02e,
4411                     "Setup exchange offload buffer ****FAILED****.\n");
4412                 qla2x00_free_exchoffld_buffer(ha);
4413         } else {
4414                 /* re-adjust number of target exchange */
4415                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4416
4417                 if (qla_ini_mode_enabled(vha))
4418                         icb->exchange_count = 0;
4419                 else
4420                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4421         }
4422
4423         return rval;
4424 }
4425
4426 /*
4427 * qla2x00_free_exchoffld_buffer
4428 *
4429 * Input:
4430 *       ha = adapter block pointer
4431 */
4432 void
4433 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4434 {
4435         if (ha->exchoffld_buf) {
4436                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4437                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4438                 ha->exchoffld_buf = NULL;
4439                 ha->exchoffld_size = 0;
4440         }
4441 }
4442
4443 /*
4444 * qla2x00_free_fw_dump
4445 *       Frees fw dump stuff.
4446 *
4447 * Input:
4448 *       ha = adapter block pointer
4449 */
4450 static void
4451 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4452 {
4453         if (ha->fce)
4454                 dma_free_coherent(&ha->pdev->dev,
4455                     FCE_SIZE, ha->fce, ha->fce_dma);
4456
4457         if (ha->eft)
4458                 dma_free_coherent(&ha->pdev->dev,
4459                     EFT_SIZE, ha->eft, ha->eft_dma);
4460
4461         if (ha->fw_dump)
4462                 vfree(ha->fw_dump);
4463         if (ha->fw_dump_template)
4464                 vfree(ha->fw_dump_template);
4465
4466         ha->fce = NULL;
4467         ha->fce_dma = 0;
4468         ha->eft = NULL;
4469         ha->eft_dma = 0;
4470         ha->fw_dumped = 0;
4471         ha->fw_dump_cap_flags = 0;
4472         ha->fw_dump_reading = 0;
4473         ha->fw_dump = NULL;
4474         ha->fw_dump_len = 0;
4475         ha->fw_dump_template = NULL;
4476         ha->fw_dump_template_len = 0;
4477 }
4478
4479 /*
4480 * qla2x00_mem_free
4481 *      Frees all adapter allocated memory.
4482 *
4483 * Input:
4484 *      ha = adapter block pointer.
4485 */
4486 static void
4487 qla2x00_mem_free(struct qla_hw_data *ha)
4488 {
4489         qla2x00_free_fw_dump(ha);
4490
4491         if (ha->mctp_dump)
4492                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4493                     ha->mctp_dump_dma);
4494
4495         if (ha->srb_mempool)
4496                 mempool_destroy(ha->srb_mempool);
4497
4498         if (ha->dcbx_tlv)
4499                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4500                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4501
4502         if (ha->xgmac_data)
4503                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4504                     ha->xgmac_data, ha->xgmac_data_dma);
4505
4506         if (ha->sns_cmd)
4507                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4508                 ha->sns_cmd, ha->sns_cmd_dma);
4509
4510         if (ha->ct_sns)
4511                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4512                 ha->ct_sns, ha->ct_sns_dma);
4513
4514         if (ha->sfp_data)
4515                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4516                     ha->sfp_data_dma);
4517
4518         if (ha->ms_iocb)
4519                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4520
4521         if (ha->ex_init_cb)
4522                 dma_pool_free(ha->s_dma_pool,
4523                         ha->ex_init_cb, ha->ex_init_cb_dma);
4524
4525         if (ha->async_pd)
4526                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4527
4528         if (ha->s_dma_pool)
4529                 dma_pool_destroy(ha->s_dma_pool);
4530
4531         if (ha->gid_list)
4532                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4533                 ha->gid_list, ha->gid_list_dma);
4534
4535         if (IS_QLA82XX(ha)) {
4536                 if (!list_empty(&ha->gbl_dsd_list)) {
4537                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4538
4539                         /* clean up allocated prev pool */
4540                         list_for_each_entry_safe(dsd_ptr,
4541                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4542                                 dma_pool_free(ha->dl_dma_pool,
4543                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4544                                 list_del(&dsd_ptr->list);
4545                                 kfree(dsd_ptr);
4546                         }
4547                 }
4548         }
4549
4550         if (ha->dl_dma_pool)
4551                 dma_pool_destroy(ha->dl_dma_pool);
4552
4553         if (ha->fcp_cmnd_dma_pool)
4554                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4555
4556         if (ha->ctx_mempool)
4557                 mempool_destroy(ha->ctx_mempool);
4558
4559         qlt_mem_free(ha);
4560
4561         if (ha->init_cb)
4562                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4563                         ha->init_cb, ha->init_cb_dma);
4564
4565         vfree(ha->optrom_buffer);
4566         kfree(ha->nvram);
4567         kfree(ha->npiv_info);
4568         kfree(ha->swl);
4569         kfree(ha->loop_id_map);
4570
4571         ha->srb_mempool = NULL;
4572         ha->ctx_mempool = NULL;
4573         ha->sns_cmd = NULL;
4574         ha->sns_cmd_dma = 0;
4575         ha->ct_sns = NULL;
4576         ha->ct_sns_dma = 0;
4577         ha->ms_iocb = NULL;
4578         ha->ms_iocb_dma = 0;
4579         ha->init_cb = NULL;
4580         ha->init_cb_dma = 0;
4581         ha->ex_init_cb = NULL;
4582         ha->ex_init_cb_dma = 0;
4583         ha->async_pd = NULL;
4584         ha->async_pd_dma = 0;
4585         ha->loop_id_map = NULL;
4586         ha->npiv_info = NULL;
4587         ha->optrom_buffer = NULL;
4588         ha->swl = NULL;
4589         ha->nvram = NULL;
4590         ha->mctp_dump = NULL;
4591         ha->dcbx_tlv = NULL;
4592         ha->xgmac_data = NULL;
4593         ha->sfp_data = NULL;
4594
4595         ha->s_dma_pool = NULL;
4596         ha->dl_dma_pool = NULL;
4597         ha->fcp_cmnd_dma_pool = NULL;
4598
4599         ha->gid_list = NULL;
4600         ha->gid_list_dma = 0;
4601
4602         ha->tgt.atio_ring = NULL;
4603         ha->tgt.atio_dma = 0;
4604         ha->tgt.tgt_vp_map = NULL;
4605 }
4606
4607 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4608                                                 struct qla_hw_data *ha)
4609 {
4610         struct Scsi_Host *host;
4611         struct scsi_qla_host *vha = NULL;
4612
4613         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4614         if (!host) {
4615                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4616                     "Failed to allocate host from the scsi layer, aborting.\n");
4617                 return NULL;
4618         }
4619
4620         /* Clear our data area */
4621         vha = shost_priv(host);
4622         memset(vha, 0, sizeof(scsi_qla_host_t));
4623
4624         vha->host = host;
4625         vha->host_no = host->host_no;
4626         vha->hw = ha;
4627
4628         vha->qlini_mode = ql2x_ini_mode;
4629         vha->ql2xexchoffld = ql2xexchoffld;
4630         vha->ql2xiniexchg = ql2xiniexchg;
4631
4632         INIT_LIST_HEAD(&vha->vp_fcports);
4633         INIT_LIST_HEAD(&vha->work_list);
4634         INIT_LIST_HEAD(&vha->list);
4635         INIT_LIST_HEAD(&vha->qla_cmd_list);
4636         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4637         INIT_LIST_HEAD(&vha->logo_list);
4638         INIT_LIST_HEAD(&vha->plogi_ack_list);
4639         INIT_LIST_HEAD(&vha->qp_list);
4640         INIT_LIST_HEAD(&vha->gnl.fcports);
4641         INIT_LIST_HEAD(&vha->nvme_rport_list);
4642         INIT_LIST_HEAD(&vha->gpnid_list);
4643         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4644
4645         spin_lock_init(&vha->work_lock);
4646         spin_lock_init(&vha->cmd_list_lock);
4647         init_waitqueue_head(&vha->fcport_waitQ);
4648         init_waitqueue_head(&vha->vref_waitq);
4649
4650         vha->gnl.size = sizeof(struct get_name_list_extended) *
4651                         (ha->max_loop_id + 1);
4652         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4653             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4654         if (!vha->gnl.l) {
4655                 ql_log(ql_log_fatal, vha, 0xd04a,
4656                     "Alloc failed for name list.\n");
4657                 scsi_remove_host(vha->host);
4658                 return NULL;
4659         }
4660
4661         /* todo: what about ext login? */
4662         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4663         vha->scan.l = vmalloc(vha->scan.size);
4664         if (!vha->scan.l) {
4665                 ql_log(ql_log_fatal, vha, 0xd04a,
4666                     "Alloc failed for scan database.\n");
4667                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4668                     vha->gnl.l, vha->gnl.ldma);
4669                 scsi_remove_host(vha->host);
4670                 return NULL;
4671         }
4672         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4673
4674         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4675         ql_dbg(ql_dbg_init, vha, 0x0041,
4676             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4677             vha->host, vha->hw, vha,
4678             dev_name(&(ha->pdev->dev)));
4679
4680         return vha;
4681 }
4682
4683 struct qla_work_evt *
4684 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4685 {
4686         struct qla_work_evt *e;
4687         uint8_t bail;
4688
4689         QLA_VHA_MARK_BUSY(vha, bail);
4690         if (bail)
4691                 return NULL;
4692
4693         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4694         if (!e) {
4695                 QLA_VHA_MARK_NOT_BUSY(vha);
4696                 return NULL;
4697         }
4698
4699         INIT_LIST_HEAD(&e->list);
4700         e->type = type;
4701         e->flags = QLA_EVT_FLAG_FREE;
4702         return e;
4703 }
4704
4705 int
4706 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4707 {
4708         unsigned long flags;
4709         bool q = false;
4710
4711         spin_lock_irqsave(&vha->work_lock, flags);
4712         list_add_tail(&e->list, &vha->work_list);
4713
4714         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4715                 q = true;
4716
4717         spin_unlock_irqrestore(&vha->work_lock, flags);
4718
4719         if (q)
4720                 queue_work(vha->hw->wq, &vha->iocb_work);
4721
4722         return QLA_SUCCESS;
4723 }
4724
4725 int
4726 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4727     u32 data)
4728 {
4729         struct qla_work_evt *e;
4730
4731         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4732         if (!e)
4733                 return QLA_FUNCTION_FAILED;
4734
4735         e->u.aen.code = code;
4736         e->u.aen.data = data;
4737         return qla2x00_post_work(vha, e);
4738 }
4739
4740 int
4741 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4742 {
4743         struct qla_work_evt *e;
4744
4745         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4746         if (!e)
4747                 return QLA_FUNCTION_FAILED;
4748
4749         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4750         return qla2x00_post_work(vha, e);
4751 }
4752
4753 #define qla2x00_post_async_work(name, type)     \
4754 int qla2x00_post_async_##name##_work(           \
4755     struct scsi_qla_host *vha,                  \
4756     fc_port_t *fcport, uint16_t *data)          \
4757 {                                               \
4758         struct qla_work_evt *e;                 \
4759                                                 \
4760         e = qla2x00_alloc_work(vha, type);      \
4761         if (!e)                                 \
4762                 return QLA_FUNCTION_FAILED;     \
4763                                                 \
4764         e->u.logio.fcport = fcport;             \
4765         if (data) {                             \
4766                 e->u.logio.data[0] = data[0];   \
4767                 e->u.logio.data[1] = data[1];   \
4768         }                                       \
4769         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4770         return qla2x00_post_work(vha, e);       \
4771 }
4772
4773 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4774 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4775 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4776 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4777 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4778 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4779
4780 int
4781 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4782 {
4783         struct qla_work_evt *e;
4784
4785         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4786         if (!e)
4787                 return QLA_FUNCTION_FAILED;
4788
4789         e->u.uevent.code = code;
4790         return qla2x00_post_work(vha, e);
4791 }
4792
4793 static void
4794 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4795 {
4796         char event_string[40];
4797         char *envp[] = { event_string, NULL };
4798
4799         switch (code) {
4800         case QLA_UEVENT_CODE_FW_DUMP:
4801                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4802                     vha->host_no);
4803                 break;
4804         default:
4805                 /* do nothing */
4806                 break;
4807         }
4808         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4809 }
4810
4811 int
4812 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4813                         uint32_t *data, int cnt)
4814 {
4815         struct qla_work_evt *e;
4816
4817         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4818         if (!e)
4819                 return QLA_FUNCTION_FAILED;
4820
4821         e->u.aenfx.evtcode = evtcode;
4822         e->u.aenfx.count = cnt;
4823         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4824         return qla2x00_post_work(vha, e);
4825 }
4826
4827 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
4828 {
4829         unsigned long flags;
4830
4831         if (IS_SW_RESV_ADDR(fcport->d_id))
4832                 return;
4833
4834         spin_lock_irqsave(&fcport->vha->work_lock, flags);
4835         if (fcport->disc_state == DSC_UPD_FCPORT) {
4836                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4837                 return;
4838         }
4839         fcport->jiffies_at_registration = jiffies;
4840         fcport->sec_since_registration = 0;
4841         fcport->next_disc_state = DSC_DELETED;
4842         fcport->disc_state = DSC_UPD_FCPORT;
4843         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
4844
4845         queue_work(system_unbound_wq, &fcport->reg_work);
4846 }
4847
4848 static
4849 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4850 {
4851         unsigned long flags;
4852         fc_port_t *fcport =  NULL, *tfcp;
4853         struct qlt_plogi_ack_t *pla =
4854             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4855         uint8_t free_fcport = 0;
4856
4857         ql_dbg(ql_dbg_disc, vha, 0xffff,
4858             "%s %d %8phC enter\n",
4859             __func__, __LINE__, e->u.new_sess.port_name);
4860
4861         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4862         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4863         if (fcport) {
4864                 fcport->d_id = e->u.new_sess.id;
4865                 if (pla) {
4866                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4867                         memcpy(fcport->node_name,
4868                             pla->iocb.u.isp24.u.plogi.node_name,
4869                             WWN_SIZE);
4870                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4871                         /* we took an extra ref_count to prevent PLOGI ACK when
4872                          * fcport/sess has not been created.
4873                          */
4874                         pla->ref_count--;
4875                 }
4876         } else {
4877                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4878                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4879                 if (fcport) {
4880                         fcport->d_id = e->u.new_sess.id;
4881                         fcport->flags |= FCF_FABRIC_DEVICE;
4882                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4883                         if (e->u.new_sess.fc4_type & FS_FC4TYPE_FCP)
4884                                 fcport->fc4_type = FC4_TYPE_FCP_SCSI;
4885
4886                         if (e->u.new_sess.fc4_type & FS_FC4TYPE_NVME) {
4887                                 fcport->fc4_type = FC4_TYPE_OTHER;
4888                                 fcport->fc4f_nvme = FC4_TYPE_NVME;
4889                         }
4890
4891                         memcpy(fcport->port_name, e->u.new_sess.port_name,
4892                             WWN_SIZE);
4893                 } else {
4894                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4895                                    "%s %8phC mem alloc fail.\n",
4896                                    __func__, e->u.new_sess.port_name);
4897
4898                         if (pla)
4899                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4900                         return;
4901                 }
4902
4903                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4904                 /* search again to make sure no one else got ahead */
4905                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
4906                     e->u.new_sess.port_name, 1);
4907                 if (tfcp) {
4908                         /* should rarily happen */
4909                         ql_dbg(ql_dbg_disc, vha, 0xffff,
4910                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
4911                             __func__, tfcp->port_name, tfcp->disc_state,
4912                             tfcp->fw_login_state);
4913
4914                         free_fcport = 1;
4915                 } else {
4916                         list_add_tail(&fcport->list, &vha->vp_fcports);
4917
4918                 }
4919                 if (pla) {
4920                         qlt_plogi_ack_link(vha, pla, fcport,
4921                             QLT_PLOGI_LINK_SAME_WWN);
4922                         pla->ref_count--;
4923                 }
4924         }
4925         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4926
4927         if (fcport) {
4928                 fcport->id_changed = 1;
4929                 fcport->scan_state = QLA_FCPORT_FOUND;
4930                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
4931
4932                 if (pla) {
4933                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
4934                                 u16 wd3_lo;
4935
4936                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4937                                 fcport->local = 0;
4938                                 fcport->loop_id =
4939                                         le16_to_cpu(
4940                                             pla->iocb.u.isp24.nport_handle);
4941                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4942                                 wd3_lo =
4943                                     le16_to_cpu(
4944                                         pla->iocb.u.isp24.u.prli.wd3_lo);
4945
4946                                 if (wd3_lo & BIT_7)
4947                                         fcport->conf_compl_supported = 1;
4948
4949                                 if ((wd3_lo & BIT_4) == 0)
4950                                         fcport->port_type = FCT_INITIATOR;
4951                                 else
4952                                         fcport->port_type = FCT_TARGET;
4953                         }
4954                         qlt_plogi_ack_unref(vha, pla);
4955                 } else {
4956                         fc_port_t *dfcp = NULL;
4957
4958                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4959                         tfcp = qla2x00_find_fcport_by_nportid(vha,
4960                             &e->u.new_sess.id, 1);
4961                         if (tfcp && (tfcp != fcport)) {
4962                                 /*
4963                                  * We have a conflict fcport with same NportID.
4964                                  */
4965                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
4966                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
4967                                     __func__, tfcp->port_name, tfcp->disc_state,
4968                                     tfcp->fw_login_state);
4969
4970                                 switch (tfcp->disc_state) {
4971                                 case DSC_DELETED:
4972                                         break;
4973                                 case DSC_DELETE_PEND:
4974                                         fcport->login_pause = 1;
4975                                         tfcp->conflict = fcport;
4976                                         break;
4977                                 default:
4978                                         fcport->login_pause = 1;
4979                                         tfcp->conflict = fcport;
4980                                         dfcp = tfcp;
4981                                         break;
4982                                 }
4983                         }
4984                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4985                         if (dfcp)
4986                                 qlt_schedule_sess_for_deletion(tfcp);
4987
4988
4989                         if (N2N_TOPO(vha->hw))
4990                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
4991
4992                         if (N2N_TOPO(vha->hw)) {
4993                                 if (vha->flags.nvme_enabled) {
4994                                         fcport->fc4f_nvme = 1;
4995                                         fcport->n2n_flag = 1;
4996                                 }
4997                                 fcport->fw_login_state = 0;
4998                                 /*
4999                                  * wait link init done before sending login
5000                                  */
5001                         } else {
5002                                 qla24xx_fcport_handle_login(vha, fcport);
5003                         }
5004                 }
5005         }
5006
5007         if (free_fcport) {
5008                 qla2x00_free_fcport(fcport);
5009                 if (pla)
5010                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5011         }
5012 }
5013
5014 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5015 {
5016         struct srb *sp = e->u.iosb.sp;
5017         int rval;
5018
5019         rval = qla2x00_start_sp(sp);
5020         if (rval != QLA_SUCCESS) {
5021                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5022                     "%s: %s: Re-issue IOCB failed (%d).\n",
5023                     __func__, sp->name, rval);
5024                 qla24xx_sp_unmap(vha, sp);
5025         }
5026 }
5027
5028 void
5029 qla2x00_do_work(struct scsi_qla_host *vha)
5030 {
5031         struct qla_work_evt *e, *tmp;
5032         unsigned long flags;
5033         LIST_HEAD(work);
5034
5035         spin_lock_irqsave(&vha->work_lock, flags);
5036         list_splice_init(&vha->work_list, &work);
5037         spin_unlock_irqrestore(&vha->work_lock, flags);
5038
5039         list_for_each_entry_safe(e, tmp, &work, list) {
5040                 list_del_init(&e->list);
5041
5042                 switch (e->type) {
5043                 case QLA_EVT_AEN:
5044                         fc_host_post_event(vha->host, fc_get_event_number(),
5045                             e->u.aen.code, e->u.aen.data);
5046                         break;
5047                 case QLA_EVT_IDC_ACK:
5048                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5049                         break;
5050                 case QLA_EVT_ASYNC_LOGIN:
5051                         qla2x00_async_login(vha, e->u.logio.fcport,
5052                             e->u.logio.data);
5053                         break;
5054                 case QLA_EVT_ASYNC_LOGOUT:
5055                         qla2x00_async_logout(vha, e->u.logio.fcport);
5056                         break;
5057                 case QLA_EVT_ASYNC_LOGOUT_DONE:
5058                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
5059                             e->u.logio.data);
5060                         break;
5061                 case QLA_EVT_ASYNC_ADISC:
5062                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5063                             e->u.logio.data);
5064                         break;
5065                 case QLA_EVT_UEVENT:
5066                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5067                         break;
5068                 case QLA_EVT_AENFX:
5069                         qlafx00_process_aen(vha, e);
5070                         break;
5071                 case QLA_EVT_GPNID:
5072                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5073                         break;
5074                 case QLA_EVT_UNMAP:
5075                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5076                         break;
5077                 case QLA_EVT_RELOGIN:
5078                         qla2x00_relogin(vha);
5079                         break;
5080                 case QLA_EVT_NEW_SESS:
5081                         qla24xx_create_new_sess(vha, e);
5082                         break;
5083                 case QLA_EVT_GPDB:
5084                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5085                             e->u.fcport.opt);
5086                         break;
5087                 case QLA_EVT_PRLI:
5088                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5089                         break;
5090                 case QLA_EVT_GPSC:
5091                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5092                         break;
5093                 case QLA_EVT_GNL:
5094                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5095                         break;
5096                 case QLA_EVT_NACK:
5097                         qla24xx_do_nack_work(vha, e);
5098                         break;
5099                 case QLA_EVT_ASYNC_PRLO:
5100                         qla2x00_async_prlo(vha, e->u.logio.fcport);
5101                         break;
5102                 case QLA_EVT_ASYNC_PRLO_DONE:
5103                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5104                             e->u.logio.data);
5105                         break;
5106                 case QLA_EVT_GPNFT:
5107                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5108                             e->u.gpnft.sp);
5109                         break;
5110                 case QLA_EVT_GPNFT_DONE:
5111                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5112                         break;
5113                 case QLA_EVT_GNNFT_DONE:
5114                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5115                         break;
5116                 case QLA_EVT_GNNID:
5117                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5118                         break;
5119                 case QLA_EVT_GFPNID:
5120                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5121                         break;
5122                 case QLA_EVT_SP_RETRY:
5123                         qla_sp_retry(vha, e);
5124                         break;
5125                 case QLA_EVT_IIDMA:
5126                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5127                         break;
5128                 case QLA_EVT_ELS_PLOGI:
5129                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5130                             e->u.fcport.fcport, false);
5131                         break;
5132                 }
5133                 if (e->flags & QLA_EVT_FLAG_FREE)
5134                         kfree(e);
5135
5136                 /* For each work completed decrement vha ref count */
5137                 QLA_VHA_MARK_NOT_BUSY(vha);
5138         }
5139 }
5140
5141 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5142 {
5143         struct qla_work_evt *e;
5144
5145         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5146
5147         if (!e) {
5148                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5149                 return QLA_FUNCTION_FAILED;
5150         }
5151
5152         return qla2x00_post_work(vha, e);
5153 }
5154
5155 /* Relogins all the fcports of a vport
5156  * Context: dpc thread
5157  */
5158 void qla2x00_relogin(struct scsi_qla_host *vha)
5159 {
5160         fc_port_t       *fcport;
5161         int status, relogin_needed = 0;
5162         struct event_arg ea;
5163
5164         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5165                 /*
5166                  * If the port is not ONLINE then try to login
5167                  * to it if we haven't run out of retries.
5168                  */
5169                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5170                     fcport->login_retry) {
5171                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5172                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5173                                 continue;
5174
5175                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5176                                 fcport->disc_state == DSC_DELETE_PEND) {
5177                                 relogin_needed = 1;
5178                         } else {
5179                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5180                                         memset(&ea, 0, sizeof(ea));
5181                                         ea.event = FCME_RELOGIN;
5182                                         ea.fcport = fcport;
5183                                         qla2x00_fcport_event_handler(vha, &ea);
5184                                 } else if (vha->hw->current_topology ==
5185                                     ISP_CFG_NL) {
5186                                         fcport->login_retry--;
5187                                         status =
5188                                             qla2x00_local_device_login(vha,
5189                                                 fcport);
5190                                         if (status == QLA_SUCCESS) {
5191                                                 fcport->old_loop_id =
5192                                                     fcport->loop_id;
5193                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5194                                                     "Port login OK: logged in ID 0x%x.\n",
5195                                                     fcport->loop_id);
5196                                                 qla2x00_update_fcport
5197                                                         (vha, fcport);
5198                                         } else if (status == 1) {
5199                                                 set_bit(RELOGIN_NEEDED,
5200                                                     &vha->dpc_flags);
5201                                                 /* retry the login again */
5202                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5203                                                     "Retrying %d login again loop_id 0x%x.\n",
5204                                                     fcport->login_retry,
5205                                                     fcport->loop_id);
5206                                         } else {
5207                                                 fcport->login_retry = 0;
5208                                         }
5209
5210                                         if (fcport->login_retry == 0 &&
5211                                             status != QLA_SUCCESS)
5212                                                 qla2x00_clear_loop_id(fcport);
5213                                 }
5214                         }
5215                 }
5216                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5217                         break;
5218         }
5219
5220         if (relogin_needed)
5221                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5222
5223         ql_dbg(ql_dbg_disc, vha, 0x400e,
5224             "Relogin end.\n");
5225 }
5226
5227 /* Schedule work on any of the dpc-workqueues */
5228 void
5229 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5230 {
5231         struct qla_hw_data *ha = base_vha->hw;
5232
5233         switch (work_code) {
5234         case MBA_IDC_AEN: /* 0x8200 */
5235                 if (ha->dpc_lp_wq)
5236                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5237                 break;
5238
5239         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5240                 if (!ha->flags.nic_core_reset_hdlr_active) {
5241                         if (ha->dpc_hp_wq)
5242                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5243                 } else
5244                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5245                             "NIC Core reset is already active. Skip "
5246                             "scheduling it again.\n");
5247                 break;
5248         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5249                 if (ha->dpc_hp_wq)
5250                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5251                 break;
5252         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5253                 if (ha->dpc_hp_wq)
5254                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5255                 break;
5256         default:
5257                 ql_log(ql_log_warn, base_vha, 0xb05f,
5258                     "Unknown work-code=0x%x.\n", work_code);
5259         }
5260
5261         return;
5262 }
5263
5264 /* Work: Perform NIC Core Unrecoverable state handling */
5265 void
5266 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5267 {
5268         struct qla_hw_data *ha =
5269                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5270         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5271         uint32_t dev_state = 0;
5272
5273         qla83xx_idc_lock(base_vha, 0);
5274         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5275         qla83xx_reset_ownership(base_vha);
5276         if (ha->flags.nic_core_reset_owner) {
5277                 ha->flags.nic_core_reset_owner = 0;
5278                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5279                     QLA8XXX_DEV_FAILED);
5280                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5281                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5282         }
5283         qla83xx_idc_unlock(base_vha, 0);
5284 }
5285
5286 /* Work: Execute IDC state handler */
5287 void
5288 qla83xx_idc_state_handler_work(struct work_struct *work)
5289 {
5290         struct qla_hw_data *ha =
5291                 container_of(work, struct qla_hw_data, idc_state_handler);
5292         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5293         uint32_t dev_state = 0;
5294
5295         qla83xx_idc_lock(base_vha, 0);
5296         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5297         if (dev_state == QLA8XXX_DEV_FAILED ||
5298                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5299                 qla83xx_idc_state_handler(base_vha);
5300         qla83xx_idc_unlock(base_vha, 0);
5301 }
5302
5303 static int
5304 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5305 {
5306         int rval = QLA_SUCCESS;
5307         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5308         uint32_t heart_beat_counter1, heart_beat_counter2;
5309
5310         do {
5311                 if (time_after(jiffies, heart_beat_wait)) {
5312                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5313                             "Nic Core f/w is not alive.\n");
5314                         rval = QLA_FUNCTION_FAILED;
5315                         break;
5316                 }
5317
5318                 qla83xx_idc_lock(base_vha, 0);
5319                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5320                     &heart_beat_counter1);
5321                 qla83xx_idc_unlock(base_vha, 0);
5322                 msleep(100);
5323                 qla83xx_idc_lock(base_vha, 0);
5324                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5325                     &heart_beat_counter2);
5326                 qla83xx_idc_unlock(base_vha, 0);
5327         } while (heart_beat_counter1 == heart_beat_counter2);
5328
5329         return rval;
5330 }
5331
5332 /* Work: Perform NIC Core Reset handling */
5333 void
5334 qla83xx_nic_core_reset_work(struct work_struct *work)
5335 {
5336         struct qla_hw_data *ha =
5337                 container_of(work, struct qla_hw_data, nic_core_reset);
5338         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5339         uint32_t dev_state = 0;
5340
5341         if (IS_QLA2031(ha)) {
5342                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5343                         ql_log(ql_log_warn, base_vha, 0xb081,
5344                             "Failed to dump mctp\n");
5345                 return;
5346         }
5347
5348         if (!ha->flags.nic_core_reset_hdlr_active) {
5349                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5350                         qla83xx_idc_lock(base_vha, 0);
5351                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5352                             &dev_state);
5353                         qla83xx_idc_unlock(base_vha, 0);
5354                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5355                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5356                                     "Nic Core f/w is alive.\n");
5357                                 return;
5358                         }
5359                 }
5360
5361                 ha->flags.nic_core_reset_hdlr_active = 1;
5362                 if (qla83xx_nic_core_reset(base_vha)) {
5363                         /* NIC Core reset failed. */
5364                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5365                             "NIC Core reset failed.\n");
5366                 }
5367                 ha->flags.nic_core_reset_hdlr_active = 0;
5368         }
5369 }
5370
5371 /* Work: Handle 8200 IDC aens */
5372 void
5373 qla83xx_service_idc_aen(struct work_struct *work)
5374 {
5375         struct qla_hw_data *ha =
5376                 container_of(work, struct qla_hw_data, idc_aen);
5377         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5378         uint32_t dev_state, idc_control;
5379
5380         qla83xx_idc_lock(base_vha, 0);
5381         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5382         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5383         qla83xx_idc_unlock(base_vha, 0);
5384         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5385                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5386                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5387                             "Application requested NIC Core Reset.\n");
5388                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5389                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5390                     QLA_SUCCESS) {
5391                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5392                             "Other protocol driver requested NIC Core Reset.\n");
5393                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5394                 }
5395         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5396                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5397                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5398         }
5399 }
5400
5401 static void
5402 qla83xx_wait_logic(void)
5403 {
5404         int i;
5405
5406         /* Yield CPU */
5407         if (!in_interrupt()) {
5408                 /*
5409                  * Wait about 200ms before retrying again.
5410                  * This controls the number of retries for single
5411                  * lock operation.
5412                  */
5413                 msleep(100);
5414                 schedule();
5415         } else {
5416                 for (i = 0; i < 20; i++)
5417                         cpu_relax(); /* This a nop instr on i386 */
5418         }
5419 }
5420
5421 static int
5422 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5423 {
5424         int rval;
5425         uint32_t data;
5426         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5427         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5428         struct qla_hw_data *ha = base_vha->hw;
5429         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5430             "Trying force recovery of the IDC lock.\n");
5431
5432         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5433         if (rval)
5434                 return rval;
5435
5436         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5437                 return QLA_SUCCESS;
5438         } else {
5439                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5440                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5441                     data);
5442                 if (rval)
5443                         return rval;
5444
5445                 msleep(200);
5446
5447                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5448                     &data);
5449                 if (rval)
5450                         return rval;
5451
5452                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5453                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5454                                         ~(idc_lck_rcvry_stage_mask));
5455                         rval = qla83xx_wr_reg(base_vha,
5456                             QLA83XX_IDC_LOCK_RECOVERY, data);
5457                         if (rval)
5458                                 return rval;
5459
5460                         /* Forcefully perform IDC UnLock */
5461                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5462                             &data);
5463                         if (rval)
5464                                 return rval;
5465                         /* Clear lock-id by setting 0xff */
5466                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5467                             0xff);
5468                         if (rval)
5469                                 return rval;
5470                         /* Clear lock-recovery by setting 0x0 */
5471                         rval = qla83xx_wr_reg(base_vha,
5472                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5473                         if (rval)
5474                                 return rval;
5475                 } else
5476                         return QLA_SUCCESS;
5477         }
5478
5479         return rval;
5480 }
5481
5482 static int
5483 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5484 {
5485         int rval = QLA_SUCCESS;
5486         uint32_t o_drv_lockid, n_drv_lockid;
5487         unsigned long lock_recovery_timeout;
5488
5489         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5490 retry_lockid:
5491         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5492         if (rval)
5493                 goto exit;
5494
5495         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5496         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5497                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5498                         return QLA_SUCCESS;
5499                 else
5500                         return QLA_FUNCTION_FAILED;
5501         }
5502
5503         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5504         if (rval)
5505                 goto exit;
5506
5507         if (o_drv_lockid == n_drv_lockid) {
5508                 qla83xx_wait_logic();
5509                 goto retry_lockid;
5510         } else
5511                 return QLA_SUCCESS;
5512
5513 exit:
5514         return rval;
5515 }
5516
5517 void
5518 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5519 {
5520         uint16_t options = (requester_id << 15) | BIT_6;
5521         uint32_t data;
5522         uint32_t lock_owner;
5523         struct qla_hw_data *ha = base_vha->hw;
5524
5525         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5526 retry_lock:
5527         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5528             == QLA_SUCCESS) {
5529                 if (data) {
5530                         /* Setting lock-id to our function-number */
5531                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5532                             ha->portnum);
5533                 } else {
5534                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5535                             &lock_owner);
5536                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5537                             "Failed to acquire IDC lock, acquired by %d, "
5538                             "retrying...\n", lock_owner);
5539
5540                         /* Retry/Perform IDC-Lock recovery */
5541                         if (qla83xx_idc_lock_recovery(base_vha)
5542                             == QLA_SUCCESS) {
5543                                 qla83xx_wait_logic();
5544                                 goto retry_lock;
5545                         } else
5546                                 ql_log(ql_log_warn, base_vha, 0xb075,
5547                                     "IDC Lock recovery FAILED.\n");
5548                 }
5549
5550         }
5551
5552         return;
5553
5554         /* XXX: IDC-lock implementation using access-control mbx */
5555 retry_lock2:
5556         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5557                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5558                     "Failed to acquire IDC lock. retrying...\n");
5559                 /* Retry/Perform IDC-Lock recovery */
5560                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5561                         qla83xx_wait_logic();
5562                         goto retry_lock2;
5563                 } else
5564                         ql_log(ql_log_warn, base_vha, 0xb076,
5565                             "IDC Lock recovery FAILED.\n");
5566         }
5567
5568         return;
5569 }
5570
5571 void
5572 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5573 {
5574 #if 0
5575         uint16_t options = (requester_id << 15) | BIT_7;
5576 #endif
5577         uint16_t retry;
5578         uint32_t data;
5579         struct qla_hw_data *ha = base_vha->hw;
5580
5581         /* IDC-unlock implementation using driver-unlock/lock-id
5582          * remote registers
5583          */
5584         retry = 0;
5585 retry_unlock:
5586         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5587             == QLA_SUCCESS) {
5588                 if (data == ha->portnum) {
5589                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5590                         /* Clearing lock-id by setting 0xff */
5591                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5592                 } else if (retry < 10) {
5593                         /* SV: XXX: IDC unlock retrying needed here? */
5594
5595                         /* Retry for IDC-unlock */
5596                         qla83xx_wait_logic();
5597                         retry++;
5598                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5599                             "Failed to release IDC lock, retrying=%d\n", retry);
5600                         goto retry_unlock;
5601                 }
5602         } else if (retry < 10) {
5603                 /* Retry for IDC-unlock */
5604                 qla83xx_wait_logic();
5605                 retry++;
5606                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5607                     "Failed to read drv-lockid, retrying=%d\n", retry);
5608                 goto retry_unlock;
5609         }
5610
5611         return;
5612
5613 #if 0
5614         /* XXX: IDC-unlock implementation using access-control mbx */
5615         retry = 0;
5616 retry_unlock2:
5617         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5618                 if (retry < 10) {
5619                         /* Retry for IDC-unlock */
5620                         qla83xx_wait_logic();
5621                         retry++;
5622                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5623                             "Failed to release IDC lock, retrying=%d\n", retry);
5624                         goto retry_unlock2;
5625                 }
5626         }
5627
5628         return;
5629 #endif
5630 }
5631
5632 int
5633 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5634 {
5635         int rval = QLA_SUCCESS;
5636         struct qla_hw_data *ha = vha->hw;
5637         uint32_t drv_presence;
5638
5639         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5640         if (rval == QLA_SUCCESS) {
5641                 drv_presence |= (1 << ha->portnum);
5642                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5643                     drv_presence);
5644         }
5645
5646         return rval;
5647 }
5648
5649 int
5650 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5651 {
5652         int rval = QLA_SUCCESS;
5653
5654         qla83xx_idc_lock(vha, 0);
5655         rval = __qla83xx_set_drv_presence(vha);
5656         qla83xx_idc_unlock(vha, 0);
5657
5658         return rval;
5659 }
5660
5661 int
5662 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5663 {
5664         int rval = QLA_SUCCESS;
5665         struct qla_hw_data *ha = vha->hw;
5666         uint32_t drv_presence;
5667
5668         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5669         if (rval == QLA_SUCCESS) {
5670                 drv_presence &= ~(1 << ha->portnum);
5671                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5672                     drv_presence);
5673         }
5674
5675         return rval;
5676 }
5677
5678 int
5679 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5680 {
5681         int rval = QLA_SUCCESS;
5682
5683         qla83xx_idc_lock(vha, 0);
5684         rval = __qla83xx_clear_drv_presence(vha);
5685         qla83xx_idc_unlock(vha, 0);
5686
5687         return rval;
5688 }
5689
5690 static void
5691 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5692 {
5693         struct qla_hw_data *ha = vha->hw;
5694         uint32_t drv_ack, drv_presence;
5695         unsigned long ack_timeout;
5696
5697         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5698         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5699         while (1) {
5700                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5701                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5702                 if ((drv_ack & drv_presence) == drv_presence)
5703                         break;
5704
5705                 if (time_after_eq(jiffies, ack_timeout)) {
5706                         ql_log(ql_log_warn, vha, 0xb067,
5707                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5708                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5709                         /*
5710                          * The function(s) which did not ack in time are forced
5711                          * to withdraw any further participation in the IDC
5712                          * reset.
5713                          */
5714                         if (drv_ack != drv_presence)
5715                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5716                                     drv_ack);
5717                         break;
5718                 }
5719
5720                 qla83xx_idc_unlock(vha, 0);
5721                 msleep(1000);
5722                 qla83xx_idc_lock(vha, 0);
5723         }
5724
5725         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5726         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5727 }
5728
5729 static int
5730 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5731 {
5732         int rval = QLA_SUCCESS;
5733         uint32_t idc_control;
5734
5735         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5736         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5737
5738         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5739         __qla83xx_get_idc_control(vha, &idc_control);
5740         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5741         __qla83xx_set_idc_control(vha, 0);
5742
5743         qla83xx_idc_unlock(vha, 0);
5744         rval = qla83xx_restart_nic_firmware(vha);
5745         qla83xx_idc_lock(vha, 0);
5746
5747         if (rval != QLA_SUCCESS) {
5748                 ql_log(ql_log_fatal, vha, 0xb06a,
5749                     "Failed to restart NIC f/w.\n");
5750                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5751                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5752         } else {
5753                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5754                     "Success in restarting nic f/w.\n");
5755                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5756                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5757         }
5758
5759         return rval;
5760 }
5761
5762 /* Assumes idc_lock always held on entry */
5763 int
5764 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5765 {
5766         struct qla_hw_data *ha = base_vha->hw;
5767         int rval = QLA_SUCCESS;
5768         unsigned long dev_init_timeout;
5769         uint32_t dev_state;
5770
5771         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5772         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5773
5774         while (1) {
5775
5776                 if (time_after_eq(jiffies, dev_init_timeout)) {
5777                         ql_log(ql_log_warn, base_vha, 0xb06e,
5778                             "Initialization TIMEOUT!\n");
5779                         /* Init timeout. Disable further NIC Core
5780                          * communication.
5781                          */
5782                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5783                                 QLA8XXX_DEV_FAILED);
5784                         ql_log(ql_log_info, base_vha, 0xb06f,
5785                             "HW State: FAILED.\n");
5786                 }
5787
5788                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5789                 switch (dev_state) {
5790                 case QLA8XXX_DEV_READY:
5791                         if (ha->flags.nic_core_reset_owner)
5792                                 qla83xx_idc_audit(base_vha,
5793                                     IDC_AUDIT_COMPLETION);
5794                         ha->flags.nic_core_reset_owner = 0;
5795                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5796                             "Reset_owner reset by 0x%x.\n",
5797                             ha->portnum);
5798                         goto exit;
5799                 case QLA8XXX_DEV_COLD:
5800                         if (ha->flags.nic_core_reset_owner)
5801                                 rval = qla83xx_device_bootstrap(base_vha);
5802                         else {
5803                         /* Wait for AEN to change device-state */
5804                                 qla83xx_idc_unlock(base_vha, 0);
5805                                 msleep(1000);
5806                                 qla83xx_idc_lock(base_vha, 0);
5807                         }
5808                         break;
5809                 case QLA8XXX_DEV_INITIALIZING:
5810                         /* Wait for AEN to change device-state */
5811                         qla83xx_idc_unlock(base_vha, 0);
5812                         msleep(1000);
5813                         qla83xx_idc_lock(base_vha, 0);
5814                         break;
5815                 case QLA8XXX_DEV_NEED_RESET:
5816                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5817                                 qla83xx_need_reset_handler(base_vha);
5818                         else {
5819                                 /* Wait for AEN to change device-state */
5820                                 qla83xx_idc_unlock(base_vha, 0);
5821                                 msleep(1000);
5822                                 qla83xx_idc_lock(base_vha, 0);
5823                         }
5824                         /* reset timeout value after need reset handler */
5825                         dev_init_timeout = jiffies +
5826                             (ha->fcoe_dev_init_timeout * HZ);
5827                         break;
5828                 case QLA8XXX_DEV_NEED_QUIESCENT:
5829                         /* XXX: DEBUG for now */
5830                         qla83xx_idc_unlock(base_vha, 0);
5831                         msleep(1000);
5832                         qla83xx_idc_lock(base_vha, 0);
5833                         break;
5834                 case QLA8XXX_DEV_QUIESCENT:
5835                         /* XXX: DEBUG for now */
5836                         if (ha->flags.quiesce_owner)
5837                                 goto exit;
5838
5839                         qla83xx_idc_unlock(base_vha, 0);
5840                         msleep(1000);
5841                         qla83xx_idc_lock(base_vha, 0);
5842                         dev_init_timeout = jiffies +
5843                             (ha->fcoe_dev_init_timeout * HZ);
5844                         break;
5845                 case QLA8XXX_DEV_FAILED:
5846                         if (ha->flags.nic_core_reset_owner)
5847                                 qla83xx_idc_audit(base_vha,
5848                                     IDC_AUDIT_COMPLETION);
5849                         ha->flags.nic_core_reset_owner = 0;
5850                         __qla83xx_clear_drv_presence(base_vha);
5851                         qla83xx_idc_unlock(base_vha, 0);
5852                         qla8xxx_dev_failed_handler(base_vha);
5853                         rval = QLA_FUNCTION_FAILED;
5854                         qla83xx_idc_lock(base_vha, 0);
5855                         goto exit;
5856                 case QLA8XXX_BAD_VALUE:
5857                         qla83xx_idc_unlock(base_vha, 0);
5858                         msleep(1000);
5859                         qla83xx_idc_lock(base_vha, 0);
5860                         break;
5861                 default:
5862                         ql_log(ql_log_warn, base_vha, 0xb071,
5863                             "Unknown Device State: %x.\n", dev_state);
5864                         qla83xx_idc_unlock(base_vha, 0);
5865                         qla8xxx_dev_failed_handler(base_vha);
5866                         rval = QLA_FUNCTION_FAILED;
5867                         qla83xx_idc_lock(base_vha, 0);
5868                         goto exit;
5869                 }
5870         }
5871
5872 exit:
5873         return rval;
5874 }
5875
5876 void
5877 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5878 {
5879         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5880             board_disable);
5881         struct pci_dev *pdev = ha->pdev;
5882         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5883
5884         /*
5885          * if UNLOAD flag is already set, then continue unload,
5886          * where it was set first.
5887          */
5888         if (test_bit(UNLOADING, &base_vha->dpc_flags))
5889                 return;
5890
5891         ql_log(ql_log_warn, base_vha, 0x015b,
5892             "Disabling adapter.\n");
5893
5894         if (!atomic_read(&pdev->enable_cnt)) {
5895                 ql_log(ql_log_info, base_vha, 0xfffc,
5896                     "PCI device disabled, no action req for PCI error=%lx\n",
5897                     base_vha->pci_flags);
5898                 return;
5899         }
5900
5901         qla2x00_wait_for_sess_deletion(base_vha);
5902
5903         set_bit(UNLOADING, &base_vha->dpc_flags);
5904
5905         qla2x00_delete_all_vps(ha, base_vha);
5906
5907         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5908
5909         qla2x00_dfs_remove(base_vha);
5910
5911         qla84xx_put_chip(base_vha);
5912
5913         if (base_vha->timer_active)
5914                 qla2x00_stop_timer(base_vha);
5915
5916         base_vha->flags.online = 0;
5917
5918         qla2x00_destroy_deferred_work(ha);
5919
5920         /*
5921          * Do not try to stop beacon blink as it will issue a mailbox
5922          * command.
5923          */
5924         qla2x00_free_sysfs_attr(base_vha, false);
5925
5926         fc_remove_host(base_vha->host);
5927
5928         scsi_remove_host(base_vha->host);
5929
5930         base_vha->flags.init_done = 0;
5931         qla25xx_delete_queues(base_vha);
5932         qla2x00_free_fcports(base_vha);
5933         qla2x00_free_irqs(base_vha);
5934         qla2x00_mem_free(ha);
5935         qla82xx_md_free(base_vha);
5936         qla2x00_free_queues(ha);
5937
5938         qla2x00_unmap_iobases(ha);
5939
5940         pci_release_selected_regions(ha->pdev, ha->bars);
5941         pci_disable_pcie_error_reporting(pdev);
5942         pci_disable_device(pdev);
5943
5944         /*
5945          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5946          */
5947 }
5948
5949 /**************************************************************************
5950 * qla2x00_do_dpc
5951 *   This kernel thread is a task that is schedule by the interrupt handler
5952 *   to perform the background processing for interrupts.
5953 *
5954 * Notes:
5955 * This task always run in the context of a kernel thread.  It
5956 * is kick-off by the driver's detect code and starts up
5957 * up one per adapter. It immediately goes to sleep and waits for
5958 * some fibre event.  When either the interrupt handler or
5959 * the timer routine detects a event it will one of the task
5960 * bits then wake us up.
5961 **************************************************************************/
5962 static int
5963 qla2x00_do_dpc(void *data)
5964 {
5965         scsi_qla_host_t *base_vha;
5966         struct qla_hw_data *ha;
5967         uint32_t online;
5968         struct qla_qpair *qpair;
5969
5970         ha = (struct qla_hw_data *)data;
5971         base_vha = pci_get_drvdata(ha->pdev);
5972
5973         set_user_nice(current, MIN_NICE);
5974
5975         set_current_state(TASK_INTERRUPTIBLE);
5976         while (!kthread_should_stop()) {
5977                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5978                     "DPC handler sleeping.\n");
5979
5980                 schedule();
5981
5982                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5983                         goto end_loop;
5984
5985                 if (ha->flags.eeh_busy) {
5986                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5987                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5988                         goto end_loop;
5989                 }
5990
5991                 ha->dpc_active = 1;
5992
5993                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5994                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5995                     base_vha->dpc_flags);
5996
5997                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5998                         break;
5999
6000                 if (IS_P3P_TYPE(ha)) {
6001                         if (IS_QLA8044(ha)) {
6002                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6003                                         &base_vha->dpc_flags)) {
6004                                         qla8044_idc_lock(ha);
6005                                         qla8044_wr_direct(base_vha,
6006                                                 QLA8044_CRB_DEV_STATE_INDEX,
6007                                                 QLA8XXX_DEV_FAILED);
6008                                         qla8044_idc_unlock(ha);
6009                                         ql_log(ql_log_info, base_vha, 0x4004,
6010                                                 "HW State: FAILED.\n");
6011                                         qla8044_device_state_handler(base_vha);
6012                                         continue;
6013                                 }
6014
6015                         } else {
6016                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6017                                         &base_vha->dpc_flags)) {
6018                                         qla82xx_idc_lock(ha);
6019                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6020                                                 QLA8XXX_DEV_FAILED);
6021                                         qla82xx_idc_unlock(ha);
6022                                         ql_log(ql_log_info, base_vha, 0x0151,
6023                                                 "HW State: FAILED.\n");
6024                                         qla82xx_device_state_handler(base_vha);
6025                                         continue;
6026                                 }
6027                         }
6028
6029                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6030                                 &base_vha->dpc_flags)) {
6031
6032                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6033                                     "FCoE context reset scheduled.\n");
6034                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6035                                         &base_vha->dpc_flags))) {
6036                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6037                                                 /* FCoE-ctx reset failed.
6038                                                  * Escalate to chip-reset
6039                                                  */
6040                                                 set_bit(ISP_ABORT_NEEDED,
6041                                                         &base_vha->dpc_flags);
6042                                         }
6043                                         clear_bit(ABORT_ISP_ACTIVE,
6044                                                 &base_vha->dpc_flags);
6045                                 }
6046
6047                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6048                                     "FCoE context reset end.\n");
6049                         }
6050                 } else if (IS_QLAFX00(ha)) {
6051                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6052                                 &base_vha->dpc_flags)) {
6053                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6054                                     "Firmware Reset Recovery\n");
6055                                 if (qlafx00_reset_initialize(base_vha)) {
6056                                         /* Failed. Abort isp later. */
6057                                         if (!test_bit(UNLOADING,
6058                                             &base_vha->dpc_flags)) {
6059                                                 set_bit(ISP_UNRECOVERABLE,
6060                                                     &base_vha->dpc_flags);
6061                                                 ql_dbg(ql_dbg_dpc, base_vha,
6062                                                     0x4021,
6063                                                     "Reset Recovery Failed\n");
6064                                         }
6065                                 }
6066                         }
6067
6068                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6069                                 &base_vha->dpc_flags)) {
6070                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6071                                     "ISPFx00 Target Scan scheduled\n");
6072                                 if (qlafx00_rescan_isp(base_vha)) {
6073                                         if (!test_bit(UNLOADING,
6074                                             &base_vha->dpc_flags))
6075                                                 set_bit(ISP_UNRECOVERABLE,
6076                                                     &base_vha->dpc_flags);
6077                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6078                                             "ISPFx00 Target Scan Failed\n");
6079                                 }
6080                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6081                                     "ISPFx00 Target Scan End\n");
6082                         }
6083                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6084                                 &base_vha->dpc_flags)) {
6085                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6086                                     "ISPFx00 Host Info resend scheduled\n");
6087                                 qlafx00_fx_disc(base_vha,
6088                                     &base_vha->hw->mr.fcport,
6089                                     FXDISC_REG_HOST_INFO);
6090                         }
6091                 }
6092
6093                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6094                         &base_vha->dpc_flags) &&
6095                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6096                         qla24xx_detect_sfp(base_vha);
6097
6098                         if (ha->flags.detected_lr_sfp !=
6099                             ha->flags.using_lr_setting)
6100                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6101                 }
6102
6103                 if (test_and_clear_bit
6104                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6105                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6106                         bool do_reset = true;
6107
6108                         switch (base_vha->qlini_mode) {
6109                         case QLA2XXX_INI_MODE_ENABLED:
6110                                 break;
6111                         case QLA2XXX_INI_MODE_DISABLED:
6112                                 if (!qla_tgt_mode_enabled(base_vha) &&
6113                                     !ha->flags.fw_started)
6114                                         do_reset = false;
6115                                 break;
6116                         case QLA2XXX_INI_MODE_DUAL:
6117                                 if (!qla_dual_mode_enabled(base_vha) &&
6118                                     !ha->flags.fw_started)
6119                                         do_reset = false;
6120                                 break;
6121                         default:
6122                                 break;
6123                         }
6124
6125                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6126                             &base_vha->dpc_flags))) {
6127                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6128                                     "ISP abort scheduled.\n");
6129                                 if (ha->isp_ops->abort_isp(base_vha)) {
6130                                         /* failed. retry later */
6131                                         set_bit(ISP_ABORT_NEEDED,
6132                                             &base_vha->dpc_flags);
6133                                 }
6134                                 clear_bit(ABORT_ISP_ACTIVE,
6135                                                 &base_vha->dpc_flags);
6136                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6137                                     "ISP abort end.\n");
6138                         }
6139                 }
6140
6141                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6142                     &base_vha->dpc_flags)) {
6143                         qla2x00_update_fcports(base_vha);
6144                 }
6145
6146                 if (IS_QLAFX00(ha))
6147                         goto loop_resync_check;
6148
6149                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6150                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6151                             "Quiescence mode scheduled.\n");
6152                         if (IS_P3P_TYPE(ha)) {
6153                                 if (IS_QLA82XX(ha))
6154                                         qla82xx_device_state_handler(base_vha);
6155                                 if (IS_QLA8044(ha))
6156                                         qla8044_device_state_handler(base_vha);
6157                                 clear_bit(ISP_QUIESCE_NEEDED,
6158                                     &base_vha->dpc_flags);
6159                                 if (!ha->flags.quiesce_owner) {
6160                                         qla2x00_perform_loop_resync(base_vha);
6161                                         if (IS_QLA82XX(ha)) {
6162                                                 qla82xx_idc_lock(ha);
6163                                                 qla82xx_clear_qsnt_ready(
6164                                                     base_vha);
6165                                                 qla82xx_idc_unlock(ha);
6166                                         } else if (IS_QLA8044(ha)) {
6167                                                 qla8044_idc_lock(ha);
6168                                                 qla8044_clear_qsnt_ready(
6169                                                     base_vha);
6170                                                 qla8044_idc_unlock(ha);
6171                                         }
6172                                 }
6173                         } else {
6174                                 clear_bit(ISP_QUIESCE_NEEDED,
6175                                     &base_vha->dpc_flags);
6176                                 qla2x00_quiesce_io(base_vha);
6177                         }
6178                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6179                             "Quiescence mode end.\n");
6180                 }
6181
6182                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6183                                 &base_vha->dpc_flags) &&
6184                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6185
6186                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6187                             "Reset marker scheduled.\n");
6188                         qla2x00_rst_aen(base_vha);
6189                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6190                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6191                             "Reset marker end.\n");
6192                 }
6193
6194                 /* Retry each device up to login retry count */
6195                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6196                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6197                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6198
6199                         if (!base_vha->relogin_jif ||
6200                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6201                                 base_vha->relogin_jif = jiffies + HZ;
6202                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6203
6204                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6205                                     "Relogin scheduled.\n");
6206                                 qla24xx_post_relogin_work(base_vha);
6207                         }
6208                 }
6209 loop_resync_check:
6210                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6211                     &base_vha->dpc_flags)) {
6212
6213                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6214                             "Loop resync scheduled.\n");
6215
6216                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6217                             &base_vha->dpc_flags))) {
6218
6219                                 qla2x00_loop_resync(base_vha);
6220
6221                                 clear_bit(LOOP_RESYNC_ACTIVE,
6222                                                 &base_vha->dpc_flags);
6223                         }
6224
6225                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6226                             "Loop resync end.\n");
6227                 }
6228
6229                 if (IS_QLAFX00(ha))
6230                         goto intr_on_check;
6231
6232                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6233                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6234                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6235                         qla2xxx_flash_npiv_conf(base_vha);
6236                 }
6237
6238 intr_on_check:
6239                 if (!ha->interrupts_on)
6240                         ha->isp_ops->enable_intrs(ha);
6241
6242                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6243                                         &base_vha->dpc_flags)) {
6244                         if (ha->beacon_blink_led == 1)
6245                                 ha->isp_ops->beacon_blink(base_vha);
6246                 }
6247
6248                 /* qpair online check */
6249                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6250                     &base_vha->dpc_flags)) {
6251                         if (ha->flags.eeh_busy ||
6252                             ha->flags.pci_channel_io_perm_failure)
6253                                 online = 0;
6254                         else
6255                                 online = 1;
6256
6257                         mutex_lock(&ha->mq_lock);
6258                         list_for_each_entry(qpair, &base_vha->qp_list,
6259                             qp_list_elem)
6260                         qpair->online = online;
6261                         mutex_unlock(&ha->mq_lock);
6262                 }
6263
6264                 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED,
6265                     &base_vha->dpc_flags)) {
6266                         ql_log(ql_log_info, base_vha, 0xffffff,
6267                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6268                                                 ha->nvme_last_rptd_aen);
6269                         if (qla27xx_set_zio_threshold(base_vha,
6270                             ha->nvme_last_rptd_aen)) {
6271                                 ql_log(ql_log_info, base_vha, 0xffffff,
6272                                     "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6273                                     ha->nvme_last_rptd_aen);
6274                         }
6275                 }
6276
6277                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
6278                     &base_vha->dpc_flags)) {
6279                         ql_log(ql_log_info, base_vha, 0xffffff,
6280                             "SET ZIO Activity exchange threshold to %d.\n",
6281                             ha->last_zio_threshold);
6282                         qla27xx_set_zio_threshold(base_vha,
6283                             ha->last_zio_threshold);
6284                 }
6285
6286                 if (!IS_QLAFX00(ha))
6287                         qla2x00_do_dpc_all_vps(base_vha);
6288
6289                 if (test_and_clear_bit(N2N_LINK_RESET,
6290                         &base_vha->dpc_flags)) {
6291                         qla2x00_lip_reset(base_vha);
6292                 }
6293
6294                 ha->dpc_active = 0;
6295 end_loop:
6296                 set_current_state(TASK_INTERRUPTIBLE);
6297         } /* End of while(1) */
6298         __set_current_state(TASK_RUNNING);
6299
6300         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6301             "DPC handler exiting.\n");
6302
6303         /*
6304          * Make sure that nobody tries to wake us up again.
6305          */
6306         ha->dpc_active = 0;
6307
6308         /* Cleanup any residual CTX SRBs. */
6309         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6310
6311         return 0;
6312 }
6313
6314 void
6315 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6316 {
6317         struct qla_hw_data *ha = vha->hw;
6318         struct task_struct *t = ha->dpc_thread;
6319
6320         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6321                 wake_up_process(t);
6322 }
6323
6324 /*
6325 *  qla2x00_rst_aen
6326 *      Processes asynchronous reset.
6327 *
6328 * Input:
6329 *      ha  = adapter block pointer.
6330 */
6331 static void
6332 qla2x00_rst_aen(scsi_qla_host_t *vha)
6333 {
6334         if (vha->flags.online && !vha->flags.reset_active &&
6335             !atomic_read(&vha->loop_down_timer) &&
6336             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6337                 do {
6338                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6339
6340                         /*
6341                          * Issue marker command only when we are going to start
6342                          * the I/O.
6343                          */
6344                         vha->marker_needed = 1;
6345                 } while (!atomic_read(&vha->loop_down_timer) &&
6346                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6347         }
6348 }
6349
6350 /**************************************************************************
6351 *   qla2x00_timer
6352 *
6353 * Description:
6354 *   One second timer
6355 *
6356 * Context: Interrupt
6357 ***************************************************************************/
6358 void
6359 qla2x00_timer(struct timer_list *t)
6360 {
6361         scsi_qla_host_t *vha = from_timer(vha, t, timer);
6362         unsigned long   cpu_flags = 0;
6363         int             start_dpc = 0;
6364         int             index;
6365         srb_t           *sp;
6366         uint16_t        w;
6367         struct qla_hw_data *ha = vha->hw;
6368         struct req_que *req;
6369
6370         if (ha->flags.eeh_busy) {
6371                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6372                     "EEH = %d, restarting timer.\n",
6373                     ha->flags.eeh_busy);
6374                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6375                 return;
6376         }
6377
6378         /*
6379          * Hardware read to raise pending EEH errors during mailbox waits. If
6380          * the read returns -1 then disable the board.
6381          */
6382         if (!pci_channel_offline(ha->pdev)) {
6383                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6384                 qla2x00_check_reg16_for_disconnect(vha, w);
6385         }
6386
6387         /* Make sure qla82xx_watchdog is run only for physical port */
6388         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6389                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6390                         start_dpc++;
6391                 if (IS_QLA82XX(ha))
6392                         qla82xx_watchdog(vha);
6393                 else if (IS_QLA8044(ha))
6394                         qla8044_watchdog(vha);
6395         }
6396
6397         if (!vha->vp_idx && IS_QLAFX00(ha))
6398                 qlafx00_timer_routine(vha);
6399
6400         /* Loop down handler. */
6401         if (atomic_read(&vha->loop_down_timer) > 0 &&
6402             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6403             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6404                 && vha->flags.online) {
6405
6406                 if (atomic_read(&vha->loop_down_timer) ==
6407                     vha->loop_down_abort_time) {
6408
6409                         ql_log(ql_log_info, vha, 0x6008,
6410                             "Loop down - aborting the queues before time expires.\n");
6411
6412                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6413                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6414
6415                         /*
6416                          * Schedule an ISP abort to return any FCP2-device
6417                          * commands.
6418                          */
6419                         /* NPIV - scan physical port only */
6420                         if (!vha->vp_idx) {
6421                                 spin_lock_irqsave(&ha->hardware_lock,
6422                                     cpu_flags);
6423                                 req = ha->req_q_map[0];
6424                                 for (index = 1;
6425                                     index < req->num_outstanding_cmds;
6426                                     index++) {
6427                                         fc_port_t *sfcp;
6428
6429                                         sp = req->outstanding_cmds[index];
6430                                         if (!sp)
6431                                                 continue;
6432                                         if (sp->cmd_type != TYPE_SRB)
6433                                                 continue;
6434                                         if (sp->type != SRB_SCSI_CMD)
6435                                                 continue;
6436                                         sfcp = sp->fcport;
6437                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6438                                                 continue;
6439
6440                                         if (IS_QLA82XX(ha))
6441                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6442                                                         &vha->dpc_flags);
6443                                         else
6444                                                 set_bit(ISP_ABORT_NEEDED,
6445                                                         &vha->dpc_flags);
6446                                         break;
6447                                 }
6448                                 spin_unlock_irqrestore(&ha->hardware_lock,
6449                                                                 cpu_flags);
6450                         }
6451                         start_dpc++;
6452                 }
6453
6454                 /* if the loop has been down for 4 minutes, reinit adapter */
6455                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6456                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6457                                 ql_log(ql_log_warn, vha, 0x6009,
6458                                     "Loop down - aborting ISP.\n");
6459
6460                                 if (IS_QLA82XX(ha))
6461                                         set_bit(FCOE_CTX_RESET_NEEDED,
6462                                                 &vha->dpc_flags);
6463                                 else
6464                                         set_bit(ISP_ABORT_NEEDED,
6465                                                 &vha->dpc_flags);
6466                         }
6467                 }
6468                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6469                     "Loop down - seconds remaining %d.\n",
6470                     atomic_read(&vha->loop_down_timer));
6471         }
6472         /* Check if beacon LED needs to be blinked for physical host only */
6473         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6474                 /* There is no beacon_blink function for ISP82xx */
6475                 if (!IS_P3P_TYPE(ha)) {
6476                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6477                         start_dpc++;
6478                 }
6479         }
6480
6481         /* Process any deferred work. */
6482         if (!list_empty(&vha->work_list)) {
6483                 unsigned long flags;
6484                 bool q = false;
6485
6486                 spin_lock_irqsave(&vha->work_lock, flags);
6487                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6488                         q = true;
6489                 spin_unlock_irqrestore(&vha->work_lock, flags);
6490                 if (q)
6491                         queue_work(vha->hw->wq, &vha->iocb_work);
6492         }
6493
6494         /*
6495          * FC-NVME
6496          * see if the active AEN count has changed from what was last reported.
6497          */
6498         if (!vha->vp_idx && (atomic_read(&ha->nvme_active_aen_cnt) !=
6499             ha->nvme_last_rptd_aen) && ha->zio_mode == QLA_ZIO_MODE_6) {
6500                 ql_log(ql_log_info, vha, 0x3002,
6501                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6502                     ha->nvme_last_rptd_aen);
6503                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6504                 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6505                 start_dpc++;
6506         }
6507
6508         if (!vha->vp_idx &&
6509             (atomic_read(&ha->zio_threshold) != ha->last_zio_threshold) &&
6510             (ha->zio_mode == QLA_ZIO_MODE_6) &&
6511             (IS_QLA83XX(ha) || IS_QLA27XX(ha))) {
6512                 ql_log(ql_log_info, vha, 0x3002,
6513                     "Sched: Set ZIO exchange threshold to %d.\n",
6514                     ha->last_zio_threshold);
6515                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
6516                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6517                 start_dpc++;
6518         }
6519
6520         /* Schedule the DPC routine if needed */
6521         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6522             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6523             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6524             start_dpc ||
6525             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6526             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6527             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6528             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6529             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6530             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6531                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6532                     "isp_abort_needed=%d loop_resync_needed=%d "
6533                     "fcport_update_needed=%d start_dpc=%d "
6534                     "reset_marker_needed=%d",
6535                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6536                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6537                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6538                     start_dpc,
6539                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6540                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6541                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6542                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6543                     "relogin_needed=%d.\n",
6544                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6545                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6546                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6547                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6548                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6549                 qla2xxx_wake_dpc(vha);
6550         }
6551
6552         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6553 }
6554
6555 /* Firmware interface routines. */
6556
6557 #define FW_BLOBS        11
6558 #define FW_ISP21XX      0
6559 #define FW_ISP22XX      1
6560 #define FW_ISP2300      2
6561 #define FW_ISP2322      3
6562 #define FW_ISP24XX      4
6563 #define FW_ISP25XX      5
6564 #define FW_ISP81XX      6
6565 #define FW_ISP82XX      7
6566 #define FW_ISP2031      8
6567 #define FW_ISP8031      9
6568 #define FW_ISP27XX      10
6569
6570 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6571 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6572 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6573 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6574 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6575 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6576 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6577 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6578 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6579 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6580 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6581
6582
6583 static DEFINE_MUTEX(qla_fw_lock);
6584
6585 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6586         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6587         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6588         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6589         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6590         { .name = FW_FILE_ISP24XX, },
6591         { .name = FW_FILE_ISP25XX, },
6592         { .name = FW_FILE_ISP81XX, },
6593         { .name = FW_FILE_ISP82XX, },
6594         { .name = FW_FILE_ISP2031, },
6595         { .name = FW_FILE_ISP8031, },
6596         { .name = FW_FILE_ISP27XX, },
6597 };
6598
6599 struct fw_blob *
6600 qla2x00_request_firmware(scsi_qla_host_t *vha)
6601 {
6602         struct qla_hw_data *ha = vha->hw;
6603         struct fw_blob *blob;
6604
6605         if (IS_QLA2100(ha)) {
6606                 blob = &qla_fw_blobs[FW_ISP21XX];
6607         } else if (IS_QLA2200(ha)) {
6608                 blob = &qla_fw_blobs[FW_ISP22XX];
6609         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6610                 blob = &qla_fw_blobs[FW_ISP2300];
6611         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6612                 blob = &qla_fw_blobs[FW_ISP2322];
6613         } else if (IS_QLA24XX_TYPE(ha)) {
6614                 blob = &qla_fw_blobs[FW_ISP24XX];
6615         } else if (IS_QLA25XX(ha)) {
6616                 blob = &qla_fw_blobs[FW_ISP25XX];
6617         } else if (IS_QLA81XX(ha)) {
6618                 blob = &qla_fw_blobs[FW_ISP81XX];
6619         } else if (IS_QLA82XX(ha)) {
6620                 blob = &qla_fw_blobs[FW_ISP82XX];
6621         } else if (IS_QLA2031(ha)) {
6622                 blob = &qla_fw_blobs[FW_ISP2031];
6623         } else if (IS_QLA8031(ha)) {
6624                 blob = &qla_fw_blobs[FW_ISP8031];
6625         } else if (IS_QLA27XX(ha)) {
6626                 blob = &qla_fw_blobs[FW_ISP27XX];
6627         } else {
6628                 return NULL;
6629         }
6630
6631         mutex_lock(&qla_fw_lock);
6632         if (blob->fw)
6633                 goto out;
6634
6635         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6636                 ql_log(ql_log_warn, vha, 0x0063,
6637                     "Failed to load firmware image (%s).\n", blob->name);
6638                 blob->fw = NULL;
6639                 blob = NULL;
6640                 goto out;
6641         }
6642
6643 out:
6644         mutex_unlock(&qla_fw_lock);
6645         return blob;
6646 }
6647
6648 static void
6649 qla2x00_release_firmware(void)
6650 {
6651         int idx;
6652
6653         mutex_lock(&qla_fw_lock);
6654         for (idx = 0; idx < FW_BLOBS; idx++)
6655                 release_firmware(qla_fw_blobs[idx].fw);
6656         mutex_unlock(&qla_fw_lock);
6657 }
6658
6659 static pci_ers_result_t
6660 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6661 {
6662         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6663         struct qla_hw_data *ha = vha->hw;
6664
6665         ql_dbg(ql_dbg_aer, vha, 0x9000,
6666             "PCI error detected, state %x.\n", state);
6667
6668         if (!atomic_read(&pdev->enable_cnt)) {
6669                 ql_log(ql_log_info, vha, 0xffff,
6670                         "PCI device is disabled,state %x\n", state);
6671                 return PCI_ERS_RESULT_NEED_RESET;
6672         }
6673
6674         switch (state) {
6675         case pci_channel_io_normal:
6676                 ha->flags.eeh_busy = 0;
6677                 if (ql2xmqsupport || ql2xnvmeenable) {
6678                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6679                         qla2xxx_wake_dpc(vha);
6680                 }
6681                 return PCI_ERS_RESULT_CAN_RECOVER;
6682         case pci_channel_io_frozen:
6683                 ha->flags.eeh_busy = 1;
6684                 /* For ISP82XX complete any pending mailbox cmd */
6685                 if (IS_QLA82XX(ha)) {
6686                         ha->flags.isp82xx_fw_hung = 1;
6687                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6688                         qla82xx_clear_pending_mbx(vha);
6689                 }
6690                 qla2x00_free_irqs(vha);
6691                 pci_disable_device(pdev);
6692                 /* Return back all IOs */
6693                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6694                 if (ql2xmqsupport || ql2xnvmeenable) {
6695                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6696                         qla2xxx_wake_dpc(vha);
6697                 }
6698                 return PCI_ERS_RESULT_NEED_RESET;
6699         case pci_channel_io_perm_failure:
6700                 ha->flags.pci_channel_io_perm_failure = 1;
6701                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6702                 if (ql2xmqsupport || ql2xnvmeenable) {
6703                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6704                         qla2xxx_wake_dpc(vha);
6705                 }
6706                 return PCI_ERS_RESULT_DISCONNECT;
6707         }
6708         return PCI_ERS_RESULT_NEED_RESET;
6709 }
6710
6711 static pci_ers_result_t
6712 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6713 {
6714         int risc_paused = 0;
6715         uint32_t stat;
6716         unsigned long flags;
6717         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6718         struct qla_hw_data *ha = base_vha->hw;
6719         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6720         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6721
6722         if (IS_QLA82XX(ha))
6723                 return PCI_ERS_RESULT_RECOVERED;
6724
6725         spin_lock_irqsave(&ha->hardware_lock, flags);
6726         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6727                 stat = RD_REG_DWORD(&reg->hccr);
6728                 if (stat & HCCR_RISC_PAUSE)
6729                         risc_paused = 1;
6730         } else if (IS_QLA23XX(ha)) {
6731                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6732                 if (stat & HSR_RISC_PAUSED)
6733                         risc_paused = 1;
6734         } else if (IS_FWI2_CAPABLE(ha)) {
6735                 stat = RD_REG_DWORD(&reg24->host_status);
6736                 if (stat & HSRX_RISC_PAUSED)
6737                         risc_paused = 1;
6738         }
6739         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6740
6741         if (risc_paused) {
6742                 ql_log(ql_log_info, base_vha, 0x9003,
6743                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6744                 ha->isp_ops->fw_dump(base_vha, 0);
6745
6746                 return PCI_ERS_RESULT_NEED_RESET;
6747         } else
6748                 return PCI_ERS_RESULT_RECOVERED;
6749 }
6750
6751 static uint32_t
6752 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6753 {
6754         uint32_t rval = QLA_FUNCTION_FAILED;
6755         uint32_t drv_active = 0;
6756         struct qla_hw_data *ha = base_vha->hw;
6757         int fn;
6758         struct pci_dev *other_pdev = NULL;
6759
6760         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6761             "Entered %s.\n", __func__);
6762
6763         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6764
6765         if (base_vha->flags.online) {
6766                 /* Abort all outstanding commands,
6767                  * so as to be requeued later */
6768                 qla2x00_abort_isp_cleanup(base_vha);
6769         }
6770
6771
6772         fn = PCI_FUNC(ha->pdev->devfn);
6773         while (fn > 0) {
6774                 fn--;
6775                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6776                     "Finding pci device at function = 0x%x.\n", fn);
6777                 other_pdev =
6778                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6779                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6780                     fn));
6781
6782                 if (!other_pdev)
6783                         continue;
6784                 if (atomic_read(&other_pdev->enable_cnt)) {
6785                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6786                             "Found PCI func available and enable at 0x%x.\n",
6787                             fn);
6788                         pci_dev_put(other_pdev);
6789                         break;
6790                 }
6791                 pci_dev_put(other_pdev);
6792         }
6793
6794         if (!fn) {
6795                 /* Reset owner */
6796                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6797                     "This devfn is reset owner = 0x%x.\n",
6798                     ha->pdev->devfn);
6799                 qla82xx_idc_lock(ha);
6800
6801                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6802                     QLA8XXX_DEV_INITIALIZING);
6803
6804                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6805                     QLA82XX_IDC_VERSION);
6806
6807                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6808                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6809                     "drv_active = 0x%x.\n", drv_active);
6810
6811                 qla82xx_idc_unlock(ha);
6812                 /* Reset if device is not already reset
6813                  * drv_active would be 0 if a reset has already been done
6814                  */
6815                 if (drv_active)
6816                         rval = qla82xx_start_firmware(base_vha);
6817                 else
6818                         rval = QLA_SUCCESS;
6819                 qla82xx_idc_lock(ha);
6820
6821                 if (rval != QLA_SUCCESS) {
6822                         ql_log(ql_log_info, base_vha, 0x900b,
6823                             "HW State: FAILED.\n");
6824                         qla82xx_clear_drv_active(ha);
6825                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6826                             QLA8XXX_DEV_FAILED);
6827                 } else {
6828                         ql_log(ql_log_info, base_vha, 0x900c,
6829                             "HW State: READY.\n");
6830                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6831                             QLA8XXX_DEV_READY);
6832                         qla82xx_idc_unlock(ha);
6833                         ha->flags.isp82xx_fw_hung = 0;
6834                         rval = qla82xx_restart_isp(base_vha);
6835                         qla82xx_idc_lock(ha);
6836                         /* Clear driver state register */
6837                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6838                         qla82xx_set_drv_active(base_vha);
6839                 }
6840                 qla82xx_idc_unlock(ha);
6841         } else {
6842                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6843                     "This devfn is not reset owner = 0x%x.\n",
6844                     ha->pdev->devfn);
6845                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6846                     QLA8XXX_DEV_READY)) {
6847                         ha->flags.isp82xx_fw_hung = 0;
6848                         rval = qla82xx_restart_isp(base_vha);
6849                         qla82xx_idc_lock(ha);
6850                         qla82xx_set_drv_active(base_vha);
6851                         qla82xx_idc_unlock(ha);
6852                 }
6853         }
6854         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6855
6856         return rval;
6857 }
6858
6859 static pci_ers_result_t
6860 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6861 {
6862         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6863         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6864         struct qla_hw_data *ha = base_vha->hw;
6865         struct rsp_que *rsp;
6866         int rc, retries = 10;
6867
6868         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6869             "Slot Reset.\n");
6870
6871         /* Workaround: qla2xxx driver which access hardware earlier
6872          * needs error state to be pci_channel_io_online.
6873          * Otherwise mailbox command timesout.
6874          */
6875         pdev->error_state = pci_channel_io_normal;
6876
6877         pci_restore_state(pdev);
6878
6879         /* pci_restore_state() clears the saved_state flag of the device
6880          * save restored state which resets saved_state flag
6881          */
6882         pci_save_state(pdev);
6883
6884         if (ha->mem_only)
6885                 rc = pci_enable_device_mem(pdev);
6886         else
6887                 rc = pci_enable_device(pdev);
6888
6889         if (rc) {
6890                 ql_log(ql_log_warn, base_vha, 0x9005,
6891                     "Can't re-enable PCI device after reset.\n");
6892                 goto exit_slot_reset;
6893         }
6894
6895         rsp = ha->rsp_q_map[0];
6896         if (qla2x00_request_irqs(ha, rsp))
6897                 goto exit_slot_reset;
6898
6899         if (ha->isp_ops->pci_config(base_vha))
6900                 goto exit_slot_reset;
6901
6902         if (IS_QLA82XX(ha)) {
6903                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6904                         ret = PCI_ERS_RESULT_RECOVERED;
6905                         goto exit_slot_reset;
6906                 } else
6907                         goto exit_slot_reset;
6908         }
6909
6910         while (ha->flags.mbox_busy && retries--)
6911                 msleep(1000);
6912
6913         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6914         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6915                 ret =  PCI_ERS_RESULT_RECOVERED;
6916         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6917
6918
6919 exit_slot_reset:
6920         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6921             "slot_reset return %x.\n", ret);
6922
6923         return ret;
6924 }
6925
6926 static void
6927 qla2xxx_pci_resume(struct pci_dev *pdev)
6928 {
6929         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6930         struct qla_hw_data *ha = base_vha->hw;
6931         int ret;
6932
6933         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6934             "pci_resume.\n");
6935
6936         ret = qla2x00_wait_for_hba_online(base_vha);
6937         if (ret != QLA_SUCCESS) {
6938                 ql_log(ql_log_fatal, base_vha, 0x9002,
6939                     "The device failed to resume I/O from slot/link_reset.\n");
6940         }
6941
6942         ha->flags.eeh_busy = 0;
6943 }
6944
6945 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6946 {
6947         int rc;
6948         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6949
6950         if (USER_CTRL_IRQ(vha->hw))
6951                 rc = blk_mq_map_queues(&shost->tag_set);
6952         else
6953                 rc = blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev, 0);
6954         return rc;
6955 }
6956
6957 static const struct pci_error_handlers qla2xxx_err_handler = {
6958         .error_detected = qla2xxx_pci_error_detected,
6959         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6960         .slot_reset = qla2xxx_pci_slot_reset,
6961         .resume = qla2xxx_pci_resume,
6962 };
6963
6964 static struct pci_device_id qla2xxx_pci_tbl[] = {
6965         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6966         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6967         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6968         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6969         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6970         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6971         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6972         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6973         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6974         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6975         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6976         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6977         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6978         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6979         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6980         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6981         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6982         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6983         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6984         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6985         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6986         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6987         { 0 },
6988 };
6989 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6990
6991 static struct pci_driver qla2xxx_pci_driver = {
6992         .name           = QLA2XXX_DRIVER_NAME,
6993         .driver         = {
6994                 .owner          = THIS_MODULE,
6995         },
6996         .id_table       = qla2xxx_pci_tbl,
6997         .probe          = qla2x00_probe_one,
6998         .remove         = qla2x00_remove_one,
6999         .shutdown       = qla2x00_shutdown,
7000         .err_handler    = &qla2xxx_err_handler,
7001 };
7002
7003 static const struct file_operations apidev_fops = {
7004         .owner = THIS_MODULE,
7005         .llseek = noop_llseek,
7006 };
7007
7008 /**
7009  * qla2x00_module_init - Module initialization.
7010  **/
7011 static int __init
7012 qla2x00_module_init(void)
7013 {
7014         int ret = 0;
7015
7016         /* Allocate cache for SRBs. */
7017         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
7018             SLAB_HWCACHE_ALIGN, NULL);
7019         if (srb_cachep == NULL) {
7020                 ql_log(ql_log_fatal, NULL, 0x0001,
7021                     "Unable to allocate SRB cache...Failing load!.\n");
7022                 return -ENOMEM;
7023         }
7024
7025         /* Initialize target kmem_cache and mem_pools */
7026         ret = qlt_init();
7027         if (ret < 0) {
7028                 kmem_cache_destroy(srb_cachep);
7029                 return ret;
7030         } else if (ret > 0) {
7031                 /*
7032                  * If initiator mode is explictly disabled by qlt_init(),
7033                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7034                  * performing scsi_scan_target() during LOOP UP event.
7035                  */
7036                 qla2xxx_transport_functions.disable_target_scan = 1;
7037                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
7038         }
7039
7040         /* Derive version string. */
7041         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
7042         if (ql2xextended_error_logging)
7043                 strcat(qla2x00_version_str, "-debug");
7044         if (ql2xextended_error_logging == 1)
7045                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
7046
7047         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
7048                 qla_insert_tgt_attrs();
7049
7050         qla2xxx_transport_template =
7051             fc_attach_transport(&qla2xxx_transport_functions);
7052         if (!qla2xxx_transport_template) {
7053                 kmem_cache_destroy(srb_cachep);
7054                 ql_log(ql_log_fatal, NULL, 0x0002,
7055                     "fc_attach_transport failed...Failing load!.\n");
7056                 qlt_exit();
7057                 return -ENODEV;
7058         }
7059
7060         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7061         if (apidev_major < 0) {
7062                 ql_log(ql_log_fatal, NULL, 0x0003,
7063                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7064         }
7065
7066         qla2xxx_transport_vport_template =
7067             fc_attach_transport(&qla2xxx_transport_vport_functions);
7068         if (!qla2xxx_transport_vport_template) {
7069                 kmem_cache_destroy(srb_cachep);
7070                 qlt_exit();
7071                 fc_release_transport(qla2xxx_transport_template);
7072                 ql_log(ql_log_fatal, NULL, 0x0004,
7073                     "fc_attach_transport vport failed...Failing load!.\n");
7074                 return -ENODEV;
7075         }
7076         ql_log(ql_log_info, NULL, 0x0005,
7077             "QLogic Fibre Channel HBA Driver: %s.\n",
7078             qla2x00_version_str);
7079         ret = pci_register_driver(&qla2xxx_pci_driver);
7080         if (ret) {
7081                 kmem_cache_destroy(srb_cachep);
7082                 qlt_exit();
7083                 fc_release_transport(qla2xxx_transport_template);
7084                 fc_release_transport(qla2xxx_transport_vport_template);
7085                 ql_log(ql_log_fatal, NULL, 0x0006,
7086                     "pci_register_driver failed...ret=%d Failing load!.\n",
7087                     ret);
7088         }
7089         return ret;
7090 }
7091
7092 /**
7093  * qla2x00_module_exit - Module cleanup.
7094  **/
7095 static void __exit
7096 qla2x00_module_exit(void)
7097 {
7098         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7099         pci_unregister_driver(&qla2xxx_pci_driver);
7100         qla2x00_release_firmware();
7101         kmem_cache_destroy(srb_cachep);
7102         qlt_exit();
7103         if (ctx_cachep)
7104                 kmem_cache_destroy(ctx_cachep);
7105         fc_release_transport(qla2xxx_transport_template);
7106         fc_release_transport(qla2xxx_transport_vport_template);
7107 }
7108
7109 module_init(qla2x00_module_init);
7110 module_exit(qla2x00_module_exit);
7111
7112 MODULE_AUTHOR("QLogic Corporation");
7113 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7114 MODULE_LICENSE("GPL");
7115 MODULE_VERSION(QLA2XXX_VERSION);
7116 MODULE_FIRMWARE(FW_FILE_ISP21XX);
7117 MODULE_FIRMWARE(FW_FILE_ISP22XX);
7118 MODULE_FIRMWARE(FW_FILE_ISP2300);
7119 MODULE_FIRMWARE(FW_FILE_ISP2322);
7120 MODULE_FIRMWARE(FW_FILE_ISP24XX);
7121 MODULE_FIRMWARE(FW_FILE_ISP25XX);