target: Add counters for ABORT_TASK success + failure
[sfrench/cifs-2.6.git] / drivers / scsi / qla2xxx / qla_init.c
1 /*
2  * QLogic Fibre Channel HBA Driver
3  * Copyright (c)  2003-2014 QLogic Corporation
4  *
5  * See LICENSE.qla2xxx for copyright and licensing details.
6  */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22
23 /*
24 *  QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_fw_ready(scsi_qla_host_t *);
29 static int qla2x00_configure_hba(scsi_qla_host_t *);
30 static int qla2x00_configure_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_fabric(scsi_qla_host_t *);
33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
34 static int qla2x00_restart_isp(scsi_qla_host_t *);
35
36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37 static int qla84xx_init_chip(scsi_qla_host_t *);
38 static int qla25xx_init_queues(struct qla_hw_data *);
39 static int qla24xx_post_gpdb_work(struct scsi_qla_host *, fc_port_t *, u8);
40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41     struct event_arg *);
42
43 /* SRB Extensions ---------------------------------------------------------- */
44
45 void
46 qla2x00_sp_timeout(unsigned long __data)
47 {
48         srb_t *sp = (srb_t *)__data;
49         struct srb_iocb *iocb;
50         scsi_qla_host_t *vha = sp->vha;
51         struct req_que *req;
52         unsigned long flags;
53
54         spin_lock_irqsave(&vha->hw->hardware_lock, flags);
55         req = vha->hw->req_q_map[0];
56         req->outstanding_cmds[sp->handle] = NULL;
57         iocb = &sp->u.iocb_cmd;
58         iocb->timeout(sp);
59         sp->free(sp);
60         spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
61 }
62
63 void
64 qla2x00_sp_free(void *ptr)
65 {
66         srb_t *sp = ptr;
67         struct srb_iocb *iocb = &sp->u.iocb_cmd;
68
69         del_timer(&iocb->timer);
70         qla2x00_rel_sp(sp);
71 }
72
73 /* Asynchronous Login/Logout Routines -------------------------------------- */
74
75 unsigned long
76 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
77 {
78         unsigned long tmo;
79         struct qla_hw_data *ha = vha->hw;
80
81         /* Firmware should use switch negotiated r_a_tov for timeout. */
82         tmo = ha->r_a_tov / 10 * 2;
83         if (IS_QLAFX00(ha)) {
84                 tmo = FX00_DEF_RATOV * 2;
85         } else if (!IS_FWI2_CAPABLE(ha)) {
86                 /*
87                  * Except for earlier ISPs where the timeout is seeded from the
88                  * initialization control block.
89                  */
90                 tmo = ha->login_timeout;
91         }
92         return tmo;
93 }
94
95 void
96 qla2x00_async_iocb_timeout(void *data)
97 {
98         srb_t *sp = data;
99         fc_port_t *fcport = sp->fcport;
100         struct srb_iocb *lio = &sp->u.iocb_cmd;
101         struct event_arg ea;
102
103         ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
104             "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
105             sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
106
107         fcport->flags &= ~FCF_ASYNC_SENT;
108
109         switch (sp->type) {
110         case SRB_LOGIN_CMD:
111                 /* Retry as needed. */
112                 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
113                 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
114                         QLA_LOGIO_LOGIN_RETRIED : 0;
115                 memset(&ea, 0, sizeof(ea));
116                 ea.event = FCME_PLOGI_DONE;
117                 ea.fcport = sp->fcport;
118                 ea.data[0] = lio->u.logio.data[0];
119                 ea.data[1] = lio->u.logio.data[1];
120                 ea.sp = sp;
121                 qla24xx_handle_plogi_done_event(fcport->vha, &ea);
122                 break;
123         case SRB_LOGOUT_CMD:
124                 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT);
125                 break;
126         case SRB_CT_PTHRU_CMD:
127         case SRB_MB_IOCB:
128         case SRB_NACK_PLOGI:
129         case SRB_NACK_PRLI:
130         case SRB_NACK_LOGO:
131                 sp->done(sp, QLA_FUNCTION_TIMEOUT);
132                 break;
133         }
134 }
135
136 static void
137 qla2x00_async_login_sp_done(void *ptr, int res)
138 {
139         srb_t *sp = ptr;
140         struct scsi_qla_host *vha = sp->vha;
141         struct srb_iocb *lio = &sp->u.iocb_cmd;
142         struct event_arg ea;
143
144         ql_dbg(ql_dbg_disc, vha, 0xffff,
145             "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
146
147         sp->fcport->flags &= ~FCF_ASYNC_SENT;
148         if (!test_bit(UNLOADING, &vha->dpc_flags)) {
149                 memset(&ea, 0, sizeof(ea));
150                 ea.event = FCME_PLOGI_DONE;
151                 ea.fcport = sp->fcport;
152                 ea.data[0] = lio->u.logio.data[0];
153                 ea.data[1] = lio->u.logio.data[1];
154                 ea.iop[0] = lio->u.logio.iop[0];
155                 ea.iop[1] = lio->u.logio.iop[1];
156                 ea.sp = sp;
157                 qla2x00_fcport_event_handler(vha, &ea);
158         }
159
160         sp->free(sp);
161 }
162
163 int
164 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
165     uint16_t *data)
166 {
167         srb_t *sp;
168         struct srb_iocb *lio;
169         int rval = QLA_FUNCTION_FAILED;
170
171         if (!vha->flags.online)
172                 goto done;
173
174         if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
175             (fcport->fw_login_state == DSC_LS_PLOGI_COMP) ||
176             (fcport->fw_login_state == DSC_LS_PRLI_PEND))
177                 goto done;
178
179         sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
180         if (!sp)
181                 goto done;
182
183         fcport->flags |= FCF_ASYNC_SENT;
184         fcport->logout_completed = 0;
185
186         sp->type = SRB_LOGIN_CMD;
187         sp->name = "login";
188         qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
189
190         lio = &sp->u.iocb_cmd;
191         lio->timeout = qla2x00_async_iocb_timeout;
192         sp->done = qla2x00_async_login_sp_done;
193         lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
194         if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
195                 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
196         rval = qla2x00_start_sp(sp);
197         if (rval != QLA_SUCCESS) {
198                 fcport->flags &= ~FCF_ASYNC_SENT;
199                 fcport->flags |= FCF_LOGIN_NEEDED;
200                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
201                 goto done_free_sp;
202         }
203
204         ql_dbg(ql_dbg_disc, vha, 0x2072,
205             "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
206                 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
207             fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
208             fcport->login_retry);
209         return rval;
210
211 done_free_sp:
212         sp->free(sp);
213 done:
214         fcport->flags &= ~FCF_ASYNC_SENT;
215         return rval;
216 }
217
218 static void
219 qla2x00_async_logout_sp_done(void *ptr, int res)
220 {
221         srb_t *sp = ptr;
222         struct srb_iocb *lio = &sp->u.iocb_cmd;
223
224         sp->fcport->flags &= ~FCF_ASYNC_SENT;
225         if (!test_bit(UNLOADING, &sp->vha->dpc_flags))
226                 qla2x00_post_async_logout_done_work(sp->vha, sp->fcport,
227                     lio->u.logio.data);
228         sp->free(sp);
229 }
230
231 int
232 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
233 {
234         srb_t *sp;
235         struct srb_iocb *lio;
236         int rval;
237
238         rval = QLA_FUNCTION_FAILED;
239         fcport->flags |= FCF_ASYNC_SENT;
240         sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
241         if (!sp)
242                 goto done;
243
244         sp->type = SRB_LOGOUT_CMD;
245         sp->name = "logout";
246         qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
247
248         lio = &sp->u.iocb_cmd;
249         lio->timeout = qla2x00_async_iocb_timeout;
250         sp->done = qla2x00_async_logout_sp_done;
251         rval = qla2x00_start_sp(sp);
252         if (rval != QLA_SUCCESS)
253                 goto done_free_sp;
254
255         ql_dbg(ql_dbg_disc, vha, 0x2070,
256             "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
257             sp->handle, fcport->loop_id, fcport->d_id.b.domain,
258                 fcport->d_id.b.area, fcport->d_id.b.al_pa,
259                 fcport->port_name);
260         return rval;
261
262 done_free_sp:
263         sp->free(sp);
264 done:
265         fcport->flags &= ~FCF_ASYNC_SENT;
266         return rval;
267 }
268
269 static void
270 qla2x00_async_adisc_sp_done(void *ptr, int res)
271 {
272         srb_t *sp = ptr;
273         struct scsi_qla_host *vha = sp->vha;
274         struct srb_iocb *lio = &sp->u.iocb_cmd;
275
276         if (!test_bit(UNLOADING, &vha->dpc_flags))
277                 qla2x00_post_async_adisc_done_work(sp->vha, sp->fcport,
278                     lio->u.logio.data);
279         sp->free(sp);
280 }
281
282 int
283 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
284     uint16_t *data)
285 {
286         srb_t *sp;
287         struct srb_iocb *lio;
288         int rval;
289
290         rval = QLA_FUNCTION_FAILED;
291         fcport->flags |= FCF_ASYNC_SENT;
292         sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
293         if (!sp)
294                 goto done;
295
296         sp->type = SRB_ADISC_CMD;
297         sp->name = "adisc";
298         qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
299
300         lio = &sp->u.iocb_cmd;
301         lio->timeout = qla2x00_async_iocb_timeout;
302         sp->done = qla2x00_async_adisc_sp_done;
303         if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
304                 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
305         rval = qla2x00_start_sp(sp);
306         if (rval != QLA_SUCCESS)
307                 goto done_free_sp;
308
309         ql_dbg(ql_dbg_disc, vha, 0x206f,
310             "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
311             sp->handle, fcport->loop_id, fcport->d_id.b.domain,
312             fcport->d_id.b.area, fcport->d_id.b.al_pa);
313         return rval;
314
315 done_free_sp:
316         sp->free(sp);
317 done:
318         fcport->flags &= ~FCF_ASYNC_SENT;
319         return rval;
320 }
321
322 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
323         struct event_arg *ea)
324 {
325         fc_port_t *fcport, *conflict_fcport;
326         struct get_name_list_extended *e;
327         u16 i, n, found = 0, loop_id;
328         port_id_t id;
329         u64 wwn;
330         u8 opt = 0;
331
332         fcport = ea->fcport;
333
334         if (ea->rc) { /* rval */
335                 if (fcport->login_retry == 0) {
336                         fcport->login_retry = vha->hw->login_retry_count;
337                         ql_dbg(ql_dbg_disc, vha, 0xffff,
338                                 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
339                                 fcport->port_name, fcport->login_retry);
340                 }
341                 return;
342         }
343
344         if (fcport->last_rscn_gen != fcport->rscn_gen) {
345                 ql_dbg(ql_dbg_disc, vha, 0xffff,
346                     "%s %8phC rscn gen changed rscn %d|%d \n",
347                     __func__, fcport->port_name,
348                     fcport->last_rscn_gen, fcport->rscn_gen);
349                 qla24xx_post_gidpn_work(vha, fcport);
350                 return;
351         } else if (fcport->last_login_gen != fcport->login_gen) {
352                 ql_dbg(ql_dbg_disc, vha, 0xffff,
353                         "%s %8phC login gen changed login %d|%d \n",
354                         __func__, fcport->port_name,
355                         fcport->last_login_gen, fcport->login_gen);
356                 return;
357         }
358
359         n = ea->data[0] / sizeof(struct get_name_list_extended);
360
361         ql_dbg(ql_dbg_disc, vha, 0xffff,
362             "%s %d %8phC n %d %02x%02x%02x lid %d \n",
363             __func__, __LINE__, fcport->port_name, n,
364             fcport->d_id.b.domain, fcport->d_id.b.area,
365             fcport->d_id.b.al_pa, fcport->loop_id);
366
367         for (i = 0; i < n; i++) {
368                 e = &vha->gnl.l[i];
369                 wwn = wwn_to_u64(e->port_name);
370
371                 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
372                         continue;
373
374                 found = 1;
375                 id.b.domain = e->port_id[2];
376                 id.b.area = e->port_id[1];
377                 id.b.al_pa = e->port_id[0];
378                 id.b.rsvd_1 = 0;
379
380                 loop_id = le16_to_cpu(e->nport_handle);
381                 loop_id = (loop_id & 0x7fff);
382
383                 ql_dbg(ql_dbg_disc, vha, 0xffff,
384                         "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
385                            __func__, fcport->port_name,
386                         e->current_login_state, fcport->fw_login_state,
387                         id.b.domain, id.b.area, id.b.al_pa,
388                         fcport->d_id.b.domain, fcport->d_id.b.area,
389                         fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
390
391                 if ((id.b24 != fcport->d_id.b24) ||
392                     ((fcport->loop_id != FC_NO_LOOP_ID) &&
393                         (fcport->loop_id != loop_id))) {
394                         ql_dbg(ql_dbg_disc, vha, 0xffff,
395                            "%s %d %8phC post del sess\n",
396                            __func__, __LINE__, fcport->port_name);
397                         qlt_schedule_sess_for_deletion(fcport, 1);
398                         return;
399                 }
400
401                 fcport->loop_id = loop_id;
402
403                 wwn = wwn_to_u64(fcport->port_name);
404                 qlt_find_sess_invalidate_other(vha, wwn,
405                         id, loop_id, &conflict_fcport);
406
407                 if (conflict_fcport) {
408                         /*
409                          * Another share fcport share the same loop_id &
410                          * nport id. Conflict fcport needs to finish
411                          * cleanup before this fcport can proceed to login.
412                          */
413                         conflict_fcport->conflict = fcport;
414                         fcport->login_pause = 1;
415                 }
416
417                 switch (e->current_login_state) {
418                 case DSC_LS_PRLI_COMP:
419                         ql_dbg(ql_dbg_disc, vha, 0xffff,
420                            "%s %d %8phC post gpdb\n",
421                            __func__, __LINE__, fcport->port_name);
422                         opt = PDO_FORCE_ADISC;
423                         qla24xx_post_gpdb_work(vha, fcport, opt);
424                         break;
425
426                 case DSC_LS_PORT_UNAVAIL:
427                 default:
428                         if (fcport->loop_id == FC_NO_LOOP_ID) {
429                                 qla2x00_find_new_loop_id(vha, fcport);
430                                 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
431                         }
432                         ql_dbg(ql_dbg_disc, vha, 0xffff,
433                            "%s %d %8phC \n",
434                            __func__, __LINE__, fcport->port_name);
435                         qla24xx_fcport_handle_login(vha, fcport);
436                         break;
437                 }
438         }
439
440         if (!found) {
441                 /* fw has no record of this port */
442                 if (fcport->loop_id == FC_NO_LOOP_ID) {
443                         qla2x00_find_new_loop_id(vha, fcport);
444                         fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
445                 } else {
446                         for (i = 0; i < n; i++) {
447                                 e = &vha->gnl.l[i];
448                                 id.b.domain = e->port_id[0];
449                                 id.b.area = e->port_id[1];
450                                 id.b.al_pa = e->port_id[2];
451                                 id.b.rsvd_1 = 0;
452                                 loop_id = le16_to_cpu(e->nport_handle);
453
454                                 if (fcport->d_id.b24 == id.b24) {
455                                         conflict_fcport =
456                                             qla2x00_find_fcport_by_wwpn(vha,
457                                                 e->port_name, 0);
458
459                                         ql_dbg(ql_dbg_disc, vha, 0xffff,
460                                             "%s %d %8phC post del sess\n",
461                                             __func__, __LINE__,
462                                             conflict_fcport->port_name);
463                                         qlt_schedule_sess_for_deletion
464                                                 (conflict_fcport, 1);
465                                 }
466
467                                 if (fcport->loop_id == loop_id) {
468                                         /* FW already picked this loop id for another fcport */
469                                         qla2x00_find_new_loop_id(vha, fcport);
470                                 }
471                         }
472                 }
473                 qla24xx_fcport_handle_login(vha, fcport);
474         }
475 } /* gnl_event */
476
477 static void
478 qla24xx_async_gnl_sp_done(void *s, int res)
479 {
480         struct srb *sp = s;
481         struct scsi_qla_host *vha = sp->vha;
482         unsigned long flags;
483         struct fc_port *fcport = NULL, *tf;
484         u16 i, n = 0, loop_id;
485         struct event_arg ea;
486         struct get_name_list_extended *e;
487         u64 wwn;
488         struct list_head h;
489
490         ql_dbg(ql_dbg_disc, vha, 0xffff,
491             "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
492             sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
493             sp->u.iocb_cmd.u.mbx.in_mb[2]);
494
495         memset(&ea, 0, sizeof(ea));
496         ea.sp = sp;
497         ea.rc = res;
498         ea.event = FCME_GNL_DONE;
499
500         if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
501             sizeof(struct get_name_list_extended)) {
502                 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
503                     sizeof(struct get_name_list_extended);
504                 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
505         }
506
507         for (i = 0; i < n; i++) {
508                 e = &vha->gnl.l[i];
509                 loop_id = le16_to_cpu(e->nport_handle);
510                 /* mask out reserve bit */
511                 loop_id = (loop_id & 0x7fff);
512                 set_bit(loop_id, vha->hw->loop_id_map);
513                 wwn = wwn_to_u64(e->port_name);
514
515                 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0xffff,
516                     "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
517                     __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
518                     e->port_id[0], e->current_login_state, e->last_login_state,
519                     (loop_id & 0x7fff));
520         }
521
522         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
523         vha->gnl.sent = 0;
524
525         INIT_LIST_HEAD(&h);
526         fcport = tf = NULL;
527         if (!list_empty(&vha->gnl.fcports))
528                 list_splice_init(&vha->gnl.fcports, &h);
529
530         list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
531                 list_del_init(&fcport->gnl_entry);
532                 fcport->flags &= ~FCF_ASYNC_SENT;
533                 ea.fcport = fcport;
534
535                 qla2x00_fcport_event_handler(vha, &ea);
536         }
537
538         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
539
540         sp->free(sp);
541 }
542
543 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
544 {
545         srb_t *sp;
546         struct srb_iocb *mbx;
547         int rval = QLA_FUNCTION_FAILED;
548         unsigned long flags;
549         u16 *mb;
550
551         if (!vha->flags.online)
552                 goto done;
553
554         ql_dbg(ql_dbg_disc, vha, 0xffff,
555             "Async-gnlist WWPN %8phC \n", fcport->port_name);
556
557         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
558         fcport->flags |= FCF_ASYNC_SENT;
559         fcport->disc_state = DSC_GNL;
560         fcport->last_rscn_gen = fcport->rscn_gen;
561         fcport->last_login_gen = fcport->login_gen;
562
563         list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
564         if (vha->gnl.sent) {
565                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
566                 rval = QLA_SUCCESS;
567                 goto done;
568         }
569         vha->gnl.sent = 1;
570         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
571
572         sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
573         if (!sp)
574                 goto done;
575         sp->type = SRB_MB_IOCB;
576         sp->name = "gnlist";
577         sp->gen1 = fcport->rscn_gen;
578         sp->gen2 = fcport->login_gen;
579
580         qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
581
582         mb = sp->u.iocb_cmd.u.mbx.out_mb;
583         mb[0] = MBC_PORT_NODE_NAME_LIST;
584         mb[1] = BIT_2 | BIT_3;
585         mb[2] = MSW(vha->gnl.ldma);
586         mb[3] = LSW(vha->gnl.ldma);
587         mb[6] = MSW(MSD(vha->gnl.ldma));
588         mb[7] = LSW(MSD(vha->gnl.ldma));
589         mb[8] = vha->gnl.size;
590         mb[9] = vha->vp_idx;
591
592         mbx = &sp->u.iocb_cmd;
593         mbx->timeout = qla2x00_async_iocb_timeout;
594
595         sp->done = qla24xx_async_gnl_sp_done;
596
597         rval = qla2x00_start_sp(sp);
598         if (rval != QLA_SUCCESS)
599                 goto done_free_sp;
600
601         ql_dbg(ql_dbg_disc, vha, 0xffff,
602                 "Async-%s - OUT WWPN %8phC hndl %x\n",
603                 sp->name, fcport->port_name, sp->handle);
604
605         return rval;
606
607 done_free_sp:
608         sp->free(sp);
609 done:
610         fcport->flags &= ~FCF_ASYNC_SENT;
611         return rval;
612 }
613
614 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
615 {
616         struct qla_work_evt *e;
617
618         e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
619         if (!e)
620                 return QLA_FUNCTION_FAILED;
621
622         e->u.fcport.fcport = fcport;
623         return qla2x00_post_work(vha, e);
624 }
625
626 static
627 void qla24xx_async_gpdb_sp_done(void *s, int res)
628 {
629         struct srb *sp = s;
630         struct scsi_qla_host *vha = sp->vha;
631         struct qla_hw_data *ha = vha->hw;
632         uint64_t zero = 0;
633         struct port_database_24xx *pd;
634         fc_port_t *fcport = sp->fcport;
635         u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
636         int rval = QLA_SUCCESS;
637         struct event_arg ea;
638
639         ql_dbg(ql_dbg_disc, vha, 0xffff,
640             "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
641             sp->name, res, fcport->port_name, mb[1], mb[2]);
642
643         fcport->flags &= ~FCF_ASYNC_SENT;
644
645         if (res) {
646                 rval = res;
647                 goto gpd_error_out;
648         }
649
650         pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
651
652         /* Check for logged in state. */
653         if (pd->current_login_state != PDS_PRLI_COMPLETE &&
654             pd->last_login_state != PDS_PRLI_COMPLETE) {
655                 ql_dbg(ql_dbg_mbx, vha, 0xffff,
656                     "Unable to verify login-state (%x/%x) for "
657                     "loop_id %x.\n", pd->current_login_state,
658                     pd->last_login_state, fcport->loop_id);
659                 rval = QLA_FUNCTION_FAILED;
660                 goto gpd_error_out;
661         }
662
663         if (fcport->loop_id == FC_NO_LOOP_ID ||
664             (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
665                 memcmp(fcport->port_name, pd->port_name, 8))) {
666                 /* We lost the device mid way. */
667                 rval = QLA_NOT_LOGGED_IN;
668                 goto gpd_error_out;
669         }
670
671         /* Names are little-endian. */
672         memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
673
674         /* Get port_id of device. */
675         fcport->d_id.b.domain = pd->port_id[0];
676         fcport->d_id.b.area = pd->port_id[1];
677         fcport->d_id.b.al_pa = pd->port_id[2];
678         fcport->d_id.b.rsvd_1 = 0;
679
680         /* If not target must be initiator or unknown type. */
681         if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
682                 fcport->port_type = FCT_INITIATOR;
683         else
684                 fcport->port_type = FCT_TARGET;
685
686         /* Passback COS information. */
687         fcport->supported_classes = (pd->flags & PDF_CLASS_2) ?
688                 FC_COS_CLASS2 : FC_COS_CLASS3;
689
690         if (pd->prli_svc_param_word_3[0] & BIT_7) {
691                 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
692                 fcport->conf_compl_supported = 1;
693         }
694
695 gpd_error_out:
696         memset(&ea, 0, sizeof(ea));
697         ea.event = FCME_GPDB_DONE;
698         ea.rc = rval;
699         ea.fcport = fcport;
700         ea.sp = sp;
701
702         qla2x00_fcport_event_handler(vha, &ea);
703
704         dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
705                 sp->u.iocb_cmd.u.mbx.in_dma);
706
707         sp->free(sp);
708 }
709
710 static int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport,
711     u8 opt)
712 {
713         struct qla_work_evt *e;
714
715         e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
716         if (!e)
717                 return QLA_FUNCTION_FAILED;
718
719         e->u.fcport.fcport = fcport;
720         e->u.fcport.opt = opt;
721         return qla2x00_post_work(vha, e);
722 }
723
724 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
725 {
726         srb_t *sp;
727         struct srb_iocb *mbx;
728         int rval = QLA_FUNCTION_FAILED;
729         u16 *mb;
730         dma_addr_t pd_dma;
731         struct port_database_24xx *pd;
732         struct qla_hw_data *ha = vha->hw;
733
734         if (!vha->flags.online)
735                 goto done;
736
737         fcport->flags |= FCF_ASYNC_SENT;
738         fcport->disc_state = DSC_GPDB;
739
740         sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
741         if (!sp)
742                 goto done;
743
744         pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
745         if (pd == NULL) {
746                 ql_log(ql_log_warn, vha, 0xffff,
747                         "Failed to allocate port database structure.\n");
748                 goto done_free_sp;
749         }
750         memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
751
752         sp->type = SRB_MB_IOCB;
753         sp->name = "gpdb";
754         sp->gen1 = fcport->rscn_gen;
755         sp->gen2 = fcport->login_gen;
756         qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
757
758         mb = sp->u.iocb_cmd.u.mbx.out_mb;
759         mb[0] = MBC_GET_PORT_DATABASE;
760         mb[1] = fcport->loop_id;
761         mb[2] = MSW(pd_dma);
762         mb[3] = LSW(pd_dma);
763         mb[6] = MSW(MSD(pd_dma));
764         mb[7] = LSW(MSD(pd_dma));
765         mb[9] = vha->vp_idx;
766         mb[10] = opt;
767
768         mbx = &sp->u.iocb_cmd;
769         mbx->timeout = qla2x00_async_iocb_timeout;
770         mbx->u.mbx.in = (void *)pd;
771         mbx->u.mbx.in_dma = pd_dma;
772
773         sp->done = qla24xx_async_gpdb_sp_done;
774
775         rval = qla2x00_start_sp(sp);
776         if (rval != QLA_SUCCESS)
777                 goto done_free_sp;
778
779         ql_dbg(ql_dbg_disc, vha, 0xffff,
780                 "Async-%s %8phC hndl %x opt %x\n",
781                 sp->name, fcport->port_name, sp->handle, opt);
782
783         return rval;
784
785 done_free_sp:
786         if (pd)
787                 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
788
789         sp->free(sp);
790 done:
791         fcport->flags &= ~FCF_ASYNC_SENT;
792         qla24xx_post_gpdb_work(vha, fcport, opt);
793         return rval;
794 }
795
796 static
797 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
798 {
799         int rval = ea->rc;
800         fc_port_t *fcport = ea->fcport;
801         unsigned long flags;
802
803         fcport->flags &= ~FCF_ASYNC_SENT;
804
805         ql_dbg(ql_dbg_disc, vha, 0xffff,
806             "%s %8phC DS %d LS %d rval %d\n", __func__, fcport->port_name,
807             fcport->disc_state, fcport->fw_login_state, rval);
808
809         if (ea->sp->gen2 != fcport->login_gen) {
810                 /* target side must have changed it. */
811                 ql_dbg(ql_dbg_disc, vha, 0xffff,
812                     "%s %8phC generation changed rscn %d|%d login %d|%d \n",
813                     __func__, fcport->port_name, fcport->last_rscn_gen,
814                     fcport->rscn_gen, fcport->last_login_gen,
815                     fcport->login_gen);
816                 return;
817         } else if (ea->sp->gen1 != fcport->rscn_gen) {
818                 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC post gidpn\n",
819                     __func__, __LINE__, fcport->port_name);
820                 qla24xx_post_gidpn_work(vha, fcport);
821                 return;
822         }
823
824         if (rval != QLA_SUCCESS) {
825                 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC post del sess\n",
826                     __func__, __LINE__, fcport->port_name);
827                 qlt_schedule_sess_for_deletion_lock(fcport);
828                 return;
829         }
830
831         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
832         ea->fcport->login_gen++;
833         ea->fcport->deleted = 0;
834         ea->fcport->logout_on_delete = 1;
835
836         if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
837                 vha->fcport_count++;
838                 ea->fcport->login_succ = 1;
839
840                 if (!IS_IIDMA_CAPABLE(vha->hw) ||
841                     !vha->hw->flags.gpsc_supported) {
842                         ql_dbg(ql_dbg_disc, vha, 0xffff,
843                             "%s %d %8phC post upd_fcport fcp_cnt %d\n",
844                             __func__, __LINE__, fcport->port_name,
845                             vha->fcport_count);
846
847                         qla24xx_post_upd_fcport_work(vha, fcport);
848                 } else {
849                         ql_dbg(ql_dbg_disc, vha, 0xffff,
850                             "%s %d %8phC post gpsc fcp_cnt %d\n",
851                             __func__, __LINE__, fcport->port_name,
852                             vha->fcport_count);
853
854                         qla24xx_post_gpsc_work(vha, fcport);
855                 }
856         }
857         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
858 } /* gpdb event */
859
860 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
861 {
862         if (fcport->login_retry == 0)
863                 return 0;
864
865         if (fcport->scan_state != QLA_FCPORT_FOUND)
866                 return 0;
867
868         ql_dbg(ql_dbg_disc, vha, 0xffff,
869             "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d|%d retry %d lid %d\n",
870             __func__, fcport->port_name, fcport->disc_state,
871             fcport->fw_login_state, fcport->login_pause, fcport->flags,
872             fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
873             fcport->last_login_gen, fcport->login_gen, fcport->login_retry,
874             fcport->loop_id);
875
876         fcport->login_retry--;
877
878         if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
879             (fcport->fw_login_state == DSC_LS_PLOGI_COMP) ||
880             (fcport->fw_login_state == DSC_LS_PRLI_PEND))
881                 return 0;
882
883         /* for pure Target Mode. Login will not be initiated */
884         if (vha->host->active_mode == MODE_TARGET)
885                 return 0;
886
887         if (fcport->flags & FCF_ASYNC_SENT) {
888                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
889                 return 0;
890         }
891
892         switch (fcport->disc_state) {
893         case DSC_DELETED:
894                 if (fcport->loop_id == FC_NO_LOOP_ID) {
895                         ql_dbg(ql_dbg_disc, vha, 0xffff,
896                            "%s %d %8phC post gnl\n",
897                            __func__, __LINE__, fcport->port_name);
898                         qla24xx_async_gnl(vha, fcport);
899                 } else {
900                         ql_dbg(ql_dbg_disc, vha, 0xffff,
901                            "%s %d %8phC post login\n",
902                            __func__, __LINE__, fcport->port_name);
903                         fcport->disc_state = DSC_LOGIN_PEND;
904                         qla2x00_post_async_login_work(vha, fcport, NULL);
905                 }
906                 break;
907
908         case DSC_GNL:
909                 if (fcport->login_pause) {
910                         fcport->last_rscn_gen = fcport->rscn_gen;
911                         fcport->last_login_gen = fcport->login_gen;
912                         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
913                         break;
914                 }
915
916                 if (fcport->flags & FCF_FCP2_DEVICE) {
917                         u8 opt = PDO_FORCE_ADISC;
918
919                         ql_dbg(ql_dbg_disc, vha, 0xffff,
920                            "%s %d %8phC post gpdb\n",
921                            __func__, __LINE__, fcport->port_name);
922
923                         fcport->disc_state = DSC_GPDB;
924                         qla24xx_post_gpdb_work(vha, fcport, opt);
925                 } else {
926                         ql_dbg(ql_dbg_disc, vha, 0xffff,
927                            "%s %d %8phC post login \n",
928                            __func__, __LINE__, fcport->port_name);
929                         fcport->disc_state = DSC_LOGIN_PEND;
930                         qla2x00_post_async_login_work(vha, fcport, NULL);
931                 }
932
933                 break;
934
935         case DSC_LOGIN_FAILED:
936                 ql_dbg(ql_dbg_disc, vha, 0xffff,
937                            "%s %d %8phC post gidpn \n",
938                            __func__, __LINE__, fcport->port_name);
939
940                 qla24xx_post_gidpn_work(vha, fcport);
941                 break;
942
943         case DSC_LOGIN_COMPLETE:
944                 /* recheck login state */
945                 ql_dbg(ql_dbg_disc, vha, 0xffff,
946                            "%s %d %8phC post gpdb \n",
947                            __func__, __LINE__, fcport->port_name);
948
949                 qla24xx_post_gpdb_work(vha, fcport, PDO_FORCE_ADISC);
950                 break;
951
952         default:
953                 break;
954         }
955
956         return 0;
957 }
958
959 static
960 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea)
961 {
962         fcport->rscn_gen++;
963
964         ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
965                 "%s %8phC DS %d LS %d\n",
966                 __func__, fcport->port_name, fcport->disc_state,
967                 fcport->fw_login_state);
968
969         if (fcport->flags & FCF_ASYNC_SENT)
970                 return;
971
972         switch (fcport->disc_state) {
973         case DSC_DELETED:
974         case DSC_LOGIN_COMPLETE:
975                 qla24xx_post_gidpn_work(fcport->vha, fcport);
976                 break;
977
978         default:
979                 break;
980         }
981 }
982
983 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
984         u8 *port_name, void *pla)
985 {
986         struct qla_work_evt *e;
987         e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
988         if (!e)
989                 return QLA_FUNCTION_FAILED;
990
991         e->u.new_sess.id = *id;
992         e->u.new_sess.pla = pla;
993         memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
994
995         return qla2x00_post_work(vha, e);
996 }
997
998 static
999 int qla24xx_handle_delete_done_event(scsi_qla_host_t *vha,
1000         struct event_arg *ea)
1001 {
1002         fc_port_t *fcport = ea->fcport;
1003
1004         if (test_bit(UNLOADING, &vha->dpc_flags))
1005                 return 0;
1006
1007         switch (vha->host->active_mode) {
1008         case MODE_INITIATOR:
1009         case MODE_DUAL:
1010                 if (fcport->scan_state == QLA_FCPORT_FOUND)
1011                         qla24xx_fcport_handle_login(vha, fcport);
1012                 break;
1013
1014         case MODE_TARGET:
1015         default:
1016                 /* no-op */
1017                 break;
1018         }
1019
1020         return 0;
1021 }
1022
1023 static
1024 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1025         struct event_arg *ea)
1026 {
1027         fc_port_t *fcport = ea->fcport;
1028
1029         if (fcport->scan_state != QLA_FCPORT_FOUND) {
1030                 fcport->login_retry++;
1031                 return;
1032         }
1033
1034         ql_dbg(ql_dbg_disc, vha, 0xffff,
1035                 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1036                 __func__, fcport->port_name, fcport->disc_state,
1037                 fcport->fw_login_state, fcport->login_pause,
1038                 fcport->deleted, fcport->conflict,
1039                 fcport->last_rscn_gen, fcport->rscn_gen,
1040                 fcport->last_login_gen, fcport->login_gen,
1041                 fcport->flags);
1042
1043         if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1044             (fcport->fw_login_state == DSC_LS_PLOGI_COMP) ||
1045             (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1046                 return;
1047
1048         if (fcport->flags & FCF_ASYNC_SENT) {
1049                 fcport->login_retry++;
1050                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1051                 return;
1052         }
1053
1054         if (fcport->disc_state == DSC_DELETE_PEND) {
1055                 fcport->login_retry++;
1056                 return;
1057         }
1058
1059         if (fcport->last_rscn_gen != fcport->rscn_gen) {
1060                 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC post gidpn\n",
1061                     __func__, __LINE__, fcport->port_name);
1062
1063                 qla24xx_async_gidpn(vha, fcport);
1064                 return;
1065         }
1066
1067         qla24xx_fcport_handle_login(vha, fcport);
1068 }
1069
1070 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea)
1071 {
1072         fc_port_t *fcport, *f, *tf;
1073         uint32_t id = 0, mask, rid;
1074         int rc;
1075
1076         switch (ea->event) {
1077         case FCME_RELOGIN:
1078                 if (test_bit(UNLOADING, &vha->dpc_flags))
1079                         return;
1080
1081                 qla24xx_handle_relogin_event(vha, ea);
1082                 break;
1083         case FCME_RSCN:
1084                 if (test_bit(UNLOADING, &vha->dpc_flags))
1085                         return;
1086                 switch (ea->id.b.rsvd_1) {
1087                 case RSCN_PORT_ADDR:
1088                         fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1089                         if (!fcport) {
1090                                 /* cable moved */
1091                                 rc = qla24xx_post_gpnid_work(vha, &ea->id);
1092                                 if (rc) {
1093                                         ql_log(ql_log_warn, vha, 0xffff,
1094                                                 "RSCN GPNID work failed %02x%02x%02x\n",
1095                                                 ea->id.b.domain, ea->id.b.area,
1096                                                 ea->id.b.al_pa);
1097                                 }
1098                         } else {
1099                                 ea->fcport = fcport;
1100                                 qla24xx_handle_rscn_event(fcport, ea);
1101                         }
1102                         break;
1103                 case RSCN_AREA_ADDR:
1104                 case RSCN_DOM_ADDR:
1105                         if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) {
1106                                 mask = 0xffff00;
1107                                 ql_log(ql_dbg_async, vha, 0xffff,
1108                                            "RSCN: Area 0x%06x was affected\n",
1109                                            ea->id.b24);
1110                         } else {
1111                                 mask = 0xff0000;
1112                                 ql_log(ql_dbg_async, vha, 0xffff,
1113                                            "RSCN: Domain 0x%06x was affected\n",
1114                                            ea->id.b24);
1115                         }
1116
1117                         rid = ea->id.b24 & mask;
1118                         list_for_each_entry_safe(f, tf, &vha->vp_fcports,
1119                             list) {
1120                                 id = f->d_id.b24 & mask;
1121                                 if (rid == id) {
1122                                         ea->fcport = f;
1123                                         qla24xx_handle_rscn_event(f, ea);
1124                                 }
1125                         }
1126                         break;
1127                 case RSCN_FAB_ADDR:
1128                 default:
1129                         ql_log(ql_log_warn, vha, 0xffff,
1130                                 "RSCN: Fabric was affected. Addr format %d\n",
1131                                 ea->id.b.rsvd_1);
1132                         qla2x00_mark_all_devices_lost(vha, 1);
1133                         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1134                         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1135                 }
1136                 break;
1137         case FCME_GIDPN_DONE:
1138                 qla24xx_handle_gidpn_event(vha, ea);
1139                 break;
1140         case FCME_GNL_DONE:
1141                 qla24xx_handle_gnl_done_event(vha, ea);
1142                 break;
1143         case FCME_GPSC_DONE:
1144                 qla24xx_post_upd_fcport_work(vha, ea->fcport);
1145                 break;
1146         case FCME_PLOGI_DONE:   /* Initiator side sent LLIOCB */
1147                 qla24xx_handle_plogi_done_event(vha, ea);
1148                 break;
1149         case FCME_GPDB_DONE:
1150                 qla24xx_handle_gpdb_event(vha, ea);
1151                 break;
1152         case FCME_GPNID_DONE:
1153                 qla24xx_handle_gpnid_event(vha, ea);
1154                 break;
1155         case FCME_DELETE_DONE:
1156                 qla24xx_handle_delete_done_event(vha, ea);
1157                 break;
1158         default:
1159                 BUG_ON(1);
1160                 break;
1161         }
1162 }
1163
1164 static void
1165 qla2x00_tmf_iocb_timeout(void *data)
1166 {
1167         srb_t *sp = data;
1168         struct srb_iocb *tmf = &sp->u.iocb_cmd;
1169
1170         tmf->u.tmf.comp_status = CS_TIMEOUT;
1171         complete(&tmf->u.tmf.comp);
1172 }
1173
1174 static void
1175 qla2x00_tmf_sp_done(void *ptr, int res)
1176 {
1177         srb_t *sp = ptr;
1178         struct srb_iocb *tmf = &sp->u.iocb_cmd;
1179
1180         complete(&tmf->u.tmf.comp);
1181 }
1182
1183 int
1184 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1185         uint32_t tag)
1186 {
1187         struct scsi_qla_host *vha = fcport->vha;
1188         struct srb_iocb *tm_iocb;
1189         srb_t *sp;
1190         int rval = QLA_FUNCTION_FAILED;
1191
1192         sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1193         if (!sp)
1194                 goto done;
1195
1196         tm_iocb = &sp->u.iocb_cmd;
1197         sp->type = SRB_TM_CMD;
1198         sp->name = "tmf";
1199         qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1200         tm_iocb->u.tmf.flags = flags;
1201         tm_iocb->u.tmf.lun = lun;
1202         tm_iocb->u.tmf.data = tag;
1203         sp->done = qla2x00_tmf_sp_done;
1204         tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1205         init_completion(&tm_iocb->u.tmf.comp);
1206
1207         rval = qla2x00_start_sp(sp);
1208         if (rval != QLA_SUCCESS)
1209                 goto done_free_sp;
1210
1211         ql_dbg(ql_dbg_taskm, vha, 0x802f,
1212             "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1213             sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1214             fcport->d_id.b.area, fcport->d_id.b.al_pa);
1215
1216         wait_for_completion(&tm_iocb->u.tmf.comp);
1217
1218         rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
1219             QLA_SUCCESS : QLA_FUNCTION_FAILED;
1220
1221         if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) {
1222                 ql_dbg(ql_dbg_taskm, vha, 0x8030,
1223                     "TM IOCB failed (%x).\n", rval);
1224         }
1225
1226         if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1227                 flags = tm_iocb->u.tmf.flags;
1228                 lun = (uint16_t)tm_iocb->u.tmf.lun;
1229
1230                 /* Issue Marker IOCB */
1231                 qla2x00_marker(vha, vha->hw->req_q_map[0],
1232                     vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
1233                     flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1234         }
1235
1236 done_free_sp:
1237         sp->free(sp);
1238 done:
1239         return rval;
1240 }
1241
1242 static void
1243 qla24xx_abort_iocb_timeout(void *data)
1244 {
1245         srb_t *sp = data;
1246         struct srb_iocb *abt = &sp->u.iocb_cmd;
1247
1248         abt->u.abt.comp_status = CS_TIMEOUT;
1249         complete(&abt->u.abt.comp);
1250 }
1251
1252 static void
1253 qla24xx_abort_sp_done(void *ptr, int res)
1254 {
1255         srb_t *sp = ptr;
1256         struct srb_iocb *abt = &sp->u.iocb_cmd;
1257
1258         complete(&abt->u.abt.comp);
1259 }
1260
1261 static int
1262 qla24xx_async_abort_cmd(srb_t *cmd_sp)
1263 {
1264         scsi_qla_host_t *vha = cmd_sp->vha;
1265         fc_port_t *fcport = cmd_sp->fcport;
1266         struct srb_iocb *abt_iocb;
1267         srb_t *sp;
1268         int rval = QLA_FUNCTION_FAILED;
1269
1270         sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1271         if (!sp)
1272                 goto done;
1273
1274         abt_iocb = &sp->u.iocb_cmd;
1275         sp->type = SRB_ABT_CMD;
1276         sp->name = "abort";
1277         qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1278         abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
1279         sp->done = qla24xx_abort_sp_done;
1280         abt_iocb->timeout = qla24xx_abort_iocb_timeout;
1281         init_completion(&abt_iocb->u.abt.comp);
1282
1283         rval = qla2x00_start_sp(sp);
1284         if (rval != QLA_SUCCESS)
1285                 goto done_free_sp;
1286
1287         ql_dbg(ql_dbg_async, vha, 0x507c,
1288             "Abort command issued - hdl=%x, target_id=%x\n",
1289             cmd_sp->handle, fcport->tgt_id);
1290
1291         wait_for_completion(&abt_iocb->u.abt.comp);
1292
1293         rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
1294             QLA_SUCCESS : QLA_FUNCTION_FAILED;
1295
1296 done_free_sp:
1297         sp->free(sp);
1298 done:
1299         return rval;
1300 }
1301
1302 int
1303 qla24xx_async_abort_command(srb_t *sp)
1304 {
1305         unsigned long   flags = 0;
1306
1307         uint32_t        handle;
1308         fc_port_t       *fcport = sp->fcport;
1309         struct scsi_qla_host *vha = fcport->vha;
1310         struct qla_hw_data *ha = vha->hw;
1311         struct req_que *req = vha->req;
1312
1313         spin_lock_irqsave(&ha->hardware_lock, flags);
1314         for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1315                 if (req->outstanding_cmds[handle] == sp)
1316                         break;
1317         }
1318         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1319         if (handle == req->num_outstanding_cmds) {
1320                 /* Command not found. */
1321                 return QLA_FUNCTION_FAILED;
1322         }
1323         if (sp->type == SRB_FXIOCB_DCMD)
1324                 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1325                     FXDISC_ABORT_IOCTL);
1326
1327         return qla24xx_async_abort_cmd(sp);
1328 }
1329
1330 static void
1331 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1332 {
1333         port_id_t cid;  /* conflict Nport id */
1334
1335         switch (ea->data[0]) {
1336         case MBS_COMMAND_COMPLETE:
1337                 /*
1338                  * Driver must validate login state - If PRLI not complete,
1339                  * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1340                  * requests.
1341                  */
1342                 ql_dbg(ql_dbg_disc, vha, 0xffff,
1343                            "%s %d %8phC post gpdb\n",
1344                            __func__, __LINE__, ea->fcport->port_name);
1345                 ea->fcport->chip_reset = vha->hw->chip_reset;
1346                 ea->fcport->logout_on_delete = 1;
1347                 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1348                 break;
1349         case MBS_COMMAND_ERROR:
1350                 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC cmd error %x\n",
1351                     __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
1352
1353                 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1354                 ea->fcport->disc_state = DSC_LOGIN_FAILED;
1355                 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
1356                         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1357                 else
1358                         qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
1359                 break;
1360         case MBS_LOOP_ID_USED:
1361                 /* data[1] = IO PARAM 1 = nport ID  */
1362                 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
1363                 cid.b.area   = (ea->iop[1] >>  8) & 0xff;
1364                 cid.b.al_pa  = ea->iop[1] & 0xff;
1365                 cid.b.rsvd_1 = 0;
1366
1367                 ql_dbg(ql_dbg_disc, vha, 0xffff,
1368                         "%s %d %8phC LoopID 0x%x in use post gnl\n",
1369                         __func__, __LINE__, ea->fcport->port_name,
1370                         ea->fcport->loop_id);
1371
1372                 if (IS_SW_RESV_ADDR(cid)) {
1373                         set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1374                         ea->fcport->loop_id = FC_NO_LOOP_ID;
1375                 } else {
1376                         qla2x00_clear_loop_id(ea->fcport);
1377                 }
1378                 qla24xx_post_gnl_work(vha, ea->fcport);
1379                 break;
1380         case MBS_PORT_ID_USED:
1381                 ql_dbg(ql_dbg_disc, vha, 0xffff,
1382                         "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n",
1383                         __func__, __LINE__, ea->fcport->port_name,
1384                         ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area,
1385                         ea->fcport->d_id.b.al_pa);
1386
1387                 qla2x00_clear_loop_id(ea->fcport);
1388                 qla24xx_post_gidpn_work(vha, ea->fcport);
1389                 break;
1390         }
1391         return;
1392 }
1393
1394 void
1395 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
1396     uint16_t *data)
1397 {
1398         qla2x00_mark_device_lost(vha, fcport, 1, 0);
1399         qlt_logo_completion_handler(fcport, data[0]);
1400         fcport->login_gen++;
1401         return;
1402 }
1403
1404 void
1405 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
1406     uint16_t *data)
1407 {
1408         if (data[0] == MBS_COMMAND_COMPLETE) {
1409                 qla2x00_update_fcport(vha, fcport);
1410
1411                 return;
1412         }
1413
1414         /* Retry login. */
1415         fcport->flags &= ~FCF_ASYNC_SENT;
1416         if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
1417                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1418         else
1419                 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1420
1421         return;
1422 }
1423
1424 /****************************************************************************/
1425 /*                QLogic ISP2x00 Hardware Support Functions.                */
1426 /****************************************************************************/
1427
1428 static int
1429 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
1430 {
1431         int rval = QLA_SUCCESS;
1432         struct qla_hw_data *ha = vha->hw;
1433         uint32_t idc_major_ver, idc_minor_ver;
1434         uint16_t config[4];
1435
1436         qla83xx_idc_lock(vha, 0);
1437
1438         /* SV: TODO: Assign initialization timeout from
1439          * flash-info / other param
1440          */
1441         ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
1442         ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
1443
1444         /* Set our fcoe function presence */
1445         if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
1446                 ql_dbg(ql_dbg_p3p, vha, 0xb077,
1447                     "Error while setting DRV-Presence.\n");
1448                 rval = QLA_FUNCTION_FAILED;
1449                 goto exit;
1450         }
1451
1452         /* Decide the reset ownership */
1453         qla83xx_reset_ownership(vha);
1454
1455         /*
1456          * On first protocol driver load:
1457          * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
1458          * register.
1459          * Others: Check compatibility with current IDC Major version.
1460          */
1461         qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
1462         if (ha->flags.nic_core_reset_owner) {
1463                 /* Set IDC Major version */
1464                 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
1465                 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
1466
1467                 /* Clearing IDC-Lock-Recovery register */
1468                 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
1469         } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
1470                 /*
1471                  * Clear further IDC participation if we are not compatible with
1472                  * the current IDC Major Version.
1473                  */
1474                 ql_log(ql_log_warn, vha, 0xb07d,
1475                     "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
1476                     idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
1477                 __qla83xx_clear_drv_presence(vha);
1478                 rval = QLA_FUNCTION_FAILED;
1479                 goto exit;
1480         }
1481         /* Each function sets its supported Minor version. */
1482         qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
1483         idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
1484         qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
1485
1486         if (ha->flags.nic_core_reset_owner) {
1487                 memset(config, 0, sizeof(config));
1488                 if (!qla81xx_get_port_config(vha, config))
1489                         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
1490                             QLA8XXX_DEV_READY);
1491         }
1492
1493         rval = qla83xx_idc_state_handler(vha);
1494
1495 exit:
1496         qla83xx_idc_unlock(vha, 0);
1497
1498         return rval;
1499 }
1500
1501 /*
1502 * qla2x00_initialize_adapter
1503 *      Initialize board.
1504 *
1505 * Input:
1506 *      ha = adapter block pointer.
1507 *
1508 * Returns:
1509 *      0 = success
1510 */
1511 int
1512 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1513 {
1514         int     rval;
1515         struct qla_hw_data *ha = vha->hw;
1516         struct req_que *req = ha->req_q_map[0];
1517
1518         memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
1519         memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
1520
1521         /* Clear adapter flags. */
1522         vha->flags.online = 0;
1523         ha->flags.chip_reset_done = 0;
1524         vha->flags.reset_active = 0;
1525         ha->flags.pci_channel_io_perm_failure = 0;
1526         ha->flags.eeh_busy = 0;
1527         vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
1528         atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1529         atomic_set(&vha->loop_state, LOOP_DOWN);
1530         vha->device_flags = DFLG_NO_CABLE;
1531         vha->dpc_flags = 0;
1532         vha->flags.management_server_logged_in = 0;
1533         vha->marker_needed = 0;
1534         ha->isp_abort_cnt = 0;
1535         ha->beacon_blink_led = 0;
1536
1537         set_bit(0, ha->req_qid_map);
1538         set_bit(0, ha->rsp_qid_map);
1539
1540         ql_dbg(ql_dbg_init, vha, 0x0040,
1541             "Configuring PCI space...\n");
1542         rval = ha->isp_ops->pci_config(vha);
1543         if (rval) {
1544                 ql_log(ql_log_warn, vha, 0x0044,
1545                     "Unable to configure PCI space.\n");
1546                 return (rval);
1547         }
1548
1549         ha->isp_ops->reset_chip(vha);
1550
1551         rval = qla2xxx_get_flash_info(vha);
1552         if (rval) {
1553                 ql_log(ql_log_fatal, vha, 0x004f,
1554                     "Unable to validate FLASH data.\n");
1555                 return rval;
1556         }
1557
1558         if (IS_QLA8044(ha)) {
1559                 qla8044_read_reset_template(vha);
1560
1561                 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
1562                  * If DONRESET_BIT0 is set, drivers should not set dev_state
1563                  * to NEED_RESET. But if NEED_RESET is set, drivers should
1564                  * should honor the reset. */
1565                 if (ql2xdontresethba == 1)
1566                         qla8044_set_idc_dontreset(vha);
1567         }
1568
1569         ha->isp_ops->get_flash_version(vha, req->ring);
1570         ql_dbg(ql_dbg_init, vha, 0x0061,
1571             "Configure NVRAM parameters...\n");
1572
1573         ha->isp_ops->nvram_config(vha);
1574
1575         if (ha->flags.disable_serdes) {
1576                 /* Mask HBA via NVRAM settings? */
1577                 ql_log(ql_log_info, vha, 0x0077,
1578                     "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
1579                 return QLA_FUNCTION_FAILED;
1580         }
1581
1582         ql_dbg(ql_dbg_init, vha, 0x0078,
1583             "Verifying loaded RISC code...\n");
1584
1585         if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
1586                 rval = ha->isp_ops->chip_diag(vha);
1587                 if (rval)
1588                         return (rval);
1589                 rval = qla2x00_setup_chip(vha);
1590                 if (rval)
1591                         return (rval);
1592         }
1593
1594         if (IS_QLA84XX(ha)) {
1595                 ha->cs84xx = qla84xx_get_chip(vha);
1596                 if (!ha->cs84xx) {
1597                         ql_log(ql_log_warn, vha, 0x00d0,
1598                             "Unable to configure ISP84XX.\n");
1599                         return QLA_FUNCTION_FAILED;
1600                 }
1601         }
1602
1603         if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
1604                 rval = qla2x00_init_rings(vha);
1605
1606         ha->flags.chip_reset_done = 1;
1607
1608         if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
1609                 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
1610                 rval = qla84xx_init_chip(vha);
1611                 if (rval != QLA_SUCCESS) {
1612                         ql_log(ql_log_warn, vha, 0x00d4,
1613                             "Unable to initialize ISP84XX.\n");
1614                         qla84xx_put_chip(vha);
1615                 }
1616         }
1617
1618         /* Load the NIC Core f/w if we are the first protocol driver. */
1619         if (IS_QLA8031(ha)) {
1620                 rval = qla83xx_nic_core_fw_load(vha);
1621                 if (rval)
1622                         ql_log(ql_log_warn, vha, 0x0124,
1623                             "Error in initializing NIC Core f/w.\n");
1624         }
1625
1626         if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
1627                 qla24xx_read_fcp_prio_cfg(vha);
1628
1629         if (IS_P3P_TYPE(ha))
1630                 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
1631         else
1632                 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
1633
1634         return (rval);
1635 }
1636
1637 /**
1638  * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
1639  * @ha: HA context
1640  *
1641  * Returns 0 on success.
1642  */
1643 int
1644 qla2100_pci_config(scsi_qla_host_t *vha)
1645 {
1646         uint16_t w;
1647         unsigned long flags;
1648         struct qla_hw_data *ha = vha->hw;
1649         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1650
1651         pci_set_master(ha->pdev);
1652         pci_try_set_mwi(ha->pdev);
1653
1654         pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
1655         w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1656         pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1657
1658         pci_disable_rom(ha->pdev);
1659
1660         /* Get PCI bus information. */
1661         spin_lock_irqsave(&ha->hardware_lock, flags);
1662         ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1663         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1664
1665         return QLA_SUCCESS;
1666 }
1667
1668 /**
1669  * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
1670  * @ha: HA context
1671  *
1672  * Returns 0 on success.
1673  */
1674 int
1675 qla2300_pci_config(scsi_qla_host_t *vha)
1676 {
1677         uint16_t        w;
1678         unsigned long   flags = 0;
1679         uint32_t        cnt;
1680         struct qla_hw_data *ha = vha->hw;
1681         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1682
1683         pci_set_master(ha->pdev);
1684         pci_try_set_mwi(ha->pdev);
1685
1686         pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
1687         w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1688
1689         if (IS_QLA2322(ha) || IS_QLA6322(ha))
1690                 w &= ~PCI_COMMAND_INTX_DISABLE;
1691         pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1692
1693         /*
1694          * If this is a 2300 card and not 2312, reset the
1695          * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
1696          * the 2310 also reports itself as a 2300 so we need to get the
1697          * fb revision level -- a 6 indicates it really is a 2300 and
1698          * not a 2310.
1699          */
1700         if (IS_QLA2300(ha)) {
1701                 spin_lock_irqsave(&ha->hardware_lock, flags);
1702
1703                 /* Pause RISC. */
1704                 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
1705                 for (cnt = 0; cnt < 30000; cnt++) {
1706                         if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
1707                                 break;
1708
1709                         udelay(10);
1710                 }
1711
1712                 /* Select FPM registers. */
1713                 WRT_REG_WORD(&reg->ctrl_status, 0x20);
1714                 RD_REG_WORD(&reg->ctrl_status);
1715
1716                 /* Get the fb rev level */
1717                 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
1718
1719                 if (ha->fb_rev == FPM_2300)
1720                         pci_clear_mwi(ha->pdev);
1721
1722                 /* Deselect FPM registers. */
1723                 WRT_REG_WORD(&reg->ctrl_status, 0x0);
1724                 RD_REG_WORD(&reg->ctrl_status);
1725
1726                 /* Release RISC module. */
1727                 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1728                 for (cnt = 0; cnt < 30000; cnt++) {
1729                         if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
1730                                 break;
1731
1732                         udelay(10);
1733                 }
1734
1735                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1736         }
1737
1738         pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
1739
1740         pci_disable_rom(ha->pdev);
1741
1742         /* Get PCI bus information. */
1743         spin_lock_irqsave(&ha->hardware_lock, flags);
1744         ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1745         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1746
1747         return QLA_SUCCESS;
1748 }
1749
1750 /**
1751  * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
1752  * @ha: HA context
1753  *
1754  * Returns 0 on success.
1755  */
1756 int
1757 qla24xx_pci_config(scsi_qla_host_t *vha)
1758 {
1759         uint16_t w;
1760         unsigned long flags = 0;
1761         struct qla_hw_data *ha = vha->hw;
1762         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1763
1764         pci_set_master(ha->pdev);
1765         pci_try_set_mwi(ha->pdev);
1766
1767         pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
1768         w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1769         w &= ~PCI_COMMAND_INTX_DISABLE;
1770         pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1771
1772         pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
1773
1774         /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
1775         if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
1776                 pcix_set_mmrbc(ha->pdev, 2048);
1777
1778         /* PCIe -- adjust Maximum Read Request Size (2048). */
1779         if (pci_is_pcie(ha->pdev))
1780                 pcie_set_readrq(ha->pdev, 4096);
1781
1782         pci_disable_rom(ha->pdev);
1783
1784         ha->chip_revision = ha->pdev->revision;
1785
1786         /* Get PCI bus information. */
1787         spin_lock_irqsave(&ha->hardware_lock, flags);
1788         ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
1789         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1790
1791         return QLA_SUCCESS;
1792 }
1793
1794 /**
1795  * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
1796  * @ha: HA context
1797  *
1798  * Returns 0 on success.
1799  */
1800 int
1801 qla25xx_pci_config(scsi_qla_host_t *vha)
1802 {
1803         uint16_t w;
1804         struct qla_hw_data *ha = vha->hw;
1805
1806         pci_set_master(ha->pdev);
1807         pci_try_set_mwi(ha->pdev);
1808
1809         pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
1810         w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1811         w &= ~PCI_COMMAND_INTX_DISABLE;
1812         pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1813
1814         /* PCIe -- adjust Maximum Read Request Size (2048). */
1815         if (pci_is_pcie(ha->pdev))
1816                 pcie_set_readrq(ha->pdev, 4096);
1817
1818         pci_disable_rom(ha->pdev);
1819
1820         ha->chip_revision = ha->pdev->revision;
1821
1822         return QLA_SUCCESS;
1823 }
1824
1825 /**
1826  * qla2x00_isp_firmware() - Choose firmware image.
1827  * @ha: HA context
1828  *
1829  * Returns 0 on success.
1830  */
1831 static int
1832 qla2x00_isp_firmware(scsi_qla_host_t *vha)
1833 {
1834         int  rval;
1835         uint16_t loop_id, topo, sw_cap;
1836         uint8_t domain, area, al_pa;
1837         struct qla_hw_data *ha = vha->hw;
1838
1839         /* Assume loading risc code */
1840         rval = QLA_FUNCTION_FAILED;
1841
1842         if (ha->flags.disable_risc_code_load) {
1843                 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1844
1845                 /* Verify checksum of loaded RISC code. */
1846                 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
1847                 if (rval == QLA_SUCCESS) {
1848                         /* And, verify we are not in ROM code. */
1849                         rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
1850                             &area, &domain, &topo, &sw_cap);
1851                 }
1852         }
1853
1854         if (rval)
1855                 ql_dbg(ql_dbg_init, vha, 0x007a,
1856                     "**** Load RISC code ****.\n");
1857
1858         return (rval);
1859 }
1860
1861 /**
1862  * qla2x00_reset_chip() - Reset ISP chip.
1863  * @ha: HA context
1864  *
1865  * Returns 0 on success.
1866  */
1867 void
1868 qla2x00_reset_chip(scsi_qla_host_t *vha)
1869 {
1870         unsigned long   flags = 0;
1871         struct qla_hw_data *ha = vha->hw;
1872         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1873         uint32_t        cnt;
1874         uint16_t        cmd;
1875
1876         if (unlikely(pci_channel_offline(ha->pdev)))
1877                 return;
1878
1879         ha->isp_ops->disable_intrs(ha);
1880
1881         spin_lock_irqsave(&ha->hardware_lock, flags);
1882
1883         /* Turn off master enable */
1884         cmd = 0;
1885         pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
1886         cmd &= ~PCI_COMMAND_MASTER;
1887         pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
1888
1889         if (!IS_QLA2100(ha)) {
1890                 /* Pause RISC. */
1891                 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
1892                 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
1893                         for (cnt = 0; cnt < 30000; cnt++) {
1894                                 if ((RD_REG_WORD(&reg->hccr) &
1895                                     HCCR_RISC_PAUSE) != 0)
1896                                         break;
1897                                 udelay(100);
1898                         }
1899                 } else {
1900                         RD_REG_WORD(&reg->hccr);        /* PCI Posting. */
1901                         udelay(10);
1902                 }
1903
1904                 /* Select FPM registers. */
1905                 WRT_REG_WORD(&reg->ctrl_status, 0x20);
1906                 RD_REG_WORD(&reg->ctrl_status);         /* PCI Posting. */
1907
1908                 /* FPM Soft Reset. */
1909                 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
1910                 RD_REG_WORD(&reg->fpm_diag_config);     /* PCI Posting. */
1911
1912                 /* Toggle Fpm Reset. */
1913                 if (!IS_QLA2200(ha)) {
1914                         WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
1915                         RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
1916                 }
1917
1918                 /* Select frame buffer registers. */
1919                 WRT_REG_WORD(&reg->ctrl_status, 0x10);
1920                 RD_REG_WORD(&reg->ctrl_status);         /* PCI Posting. */
1921
1922                 /* Reset frame buffer FIFOs. */
1923                 if (IS_QLA2200(ha)) {
1924                         WRT_FB_CMD_REG(ha, reg, 0xa000);
1925                         RD_FB_CMD_REG(ha, reg);         /* PCI Posting. */
1926                 } else {
1927                         WRT_FB_CMD_REG(ha, reg, 0x00fc);
1928
1929                         /* Read back fb_cmd until zero or 3 seconds max */
1930                         for (cnt = 0; cnt < 3000; cnt++) {
1931                                 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
1932                                         break;
1933                                 udelay(100);
1934                         }
1935                 }
1936
1937                 /* Select RISC module registers. */
1938                 WRT_REG_WORD(&reg->ctrl_status, 0);
1939                 RD_REG_WORD(&reg->ctrl_status);         /* PCI Posting. */
1940
1941                 /* Reset RISC processor. */
1942                 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1943                 RD_REG_WORD(&reg->hccr);                /* PCI Posting. */
1944
1945                 /* Release RISC processor. */
1946                 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1947                 RD_REG_WORD(&reg->hccr);                /* PCI Posting. */
1948         }
1949
1950         WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
1951         WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
1952
1953         /* Reset ISP chip. */
1954         WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1955
1956         /* Wait for RISC to recover from reset. */
1957         if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1958                 /*
1959                  * It is necessary to for a delay here since the card doesn't
1960                  * respond to PCI reads during a reset. On some architectures
1961                  * this will result in an MCA.
1962                  */
1963                 udelay(20);
1964                 for (cnt = 30000; cnt; cnt--) {
1965                         if ((RD_REG_WORD(&reg->ctrl_status) &
1966                             CSR_ISP_SOFT_RESET) == 0)
1967                                 break;
1968                         udelay(100);
1969                 }
1970         } else
1971                 udelay(10);
1972
1973         /* Reset RISC processor. */
1974         WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1975
1976         WRT_REG_WORD(&reg->semaphore, 0);
1977
1978         /* Release RISC processor. */
1979         WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1980         RD_REG_WORD(&reg->hccr);                        /* PCI Posting. */
1981
1982         if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1983                 for (cnt = 0; cnt < 30000; cnt++) {
1984                         if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1985                                 break;
1986
1987                         udelay(100);
1988                 }
1989         } else
1990                 udelay(100);
1991
1992         /* Turn on master enable */
1993         cmd |= PCI_COMMAND_MASTER;
1994         pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
1995
1996         /* Disable RISC pause on FPM parity error. */
1997         if (!IS_QLA2100(ha)) {
1998                 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
1999                 RD_REG_WORD(&reg->hccr);                /* PCI Posting. */
2000         }
2001
2002         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2003 }
2004
2005 /**
2006  * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2007  *
2008  * Returns 0 on success.
2009  */
2010 static int
2011 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2012 {
2013         uint16_t mb[4] = {0x1010, 0, 1, 0};
2014
2015         if (!IS_QLA81XX(vha->hw))
2016                 return QLA_SUCCESS;
2017
2018         return qla81xx_write_mpi_register(vha, mb);
2019 }
2020
2021 /**
2022  * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2023  * @ha: HA context
2024  *
2025  * Returns 0 on success.
2026  */
2027 static inline int
2028 qla24xx_reset_risc(scsi_qla_host_t *vha)
2029 {
2030         unsigned long flags = 0;
2031         struct qla_hw_data *ha = vha->hw;
2032         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2033         uint32_t cnt;
2034         uint16_t wd;
2035         static int abts_cnt; /* ISP abort retry counts */
2036         int rval = QLA_SUCCESS;
2037
2038         spin_lock_irqsave(&ha->hardware_lock, flags);
2039
2040         /* Reset RISC. */
2041         WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2042         for (cnt = 0; cnt < 30000; cnt++) {
2043                 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2044                         break;
2045
2046                 udelay(10);
2047         }
2048
2049         if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2050                 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2051
2052         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2053             "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2054             RD_REG_DWORD(&reg->hccr),
2055             RD_REG_DWORD(&reg->ctrl_status),
2056             (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2057
2058         WRT_REG_DWORD(&reg->ctrl_status,
2059             CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2060         pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2061
2062         udelay(100);
2063
2064         /* Wait for firmware to complete NVRAM accesses. */
2065         RD_REG_WORD(&reg->mailbox0);
2066         for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
2067             rval == QLA_SUCCESS; cnt--) {
2068                 barrier();
2069                 if (cnt)
2070                         udelay(5);
2071                 else
2072                         rval = QLA_FUNCTION_TIMEOUT;
2073         }
2074
2075         if (rval == QLA_SUCCESS)
2076                 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2077
2078         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2079             "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2080             RD_REG_DWORD(&reg->hccr),
2081             RD_REG_DWORD(&reg->mailbox0));
2082
2083         /* Wait for soft-reset to complete. */
2084         RD_REG_DWORD(&reg->ctrl_status);
2085         for (cnt = 0; cnt < 60; cnt++) {
2086                 barrier();
2087                 if ((RD_REG_DWORD(&reg->ctrl_status) &
2088                     CSRX_ISP_SOFT_RESET) == 0)
2089                         break;
2090
2091                 udelay(5);
2092         }
2093         if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2094                 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2095
2096         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2097             "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2098             RD_REG_DWORD(&reg->hccr),
2099             RD_REG_DWORD(&reg->ctrl_status));
2100
2101         /* If required, do an MPI FW reset now */
2102         if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2103                 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2104                         if (++abts_cnt < 5) {
2105                                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2106                                 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2107                         } else {
2108                                 /*
2109                                  * We exhausted the ISP abort retries. We have to
2110                                  * set the board offline.
2111                                  */
2112                                 abts_cnt = 0;
2113                                 vha->flags.online = 0;
2114                         }
2115                 }
2116         }
2117
2118         WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2119         RD_REG_DWORD(&reg->hccr);
2120
2121         WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2122         RD_REG_DWORD(&reg->hccr);
2123
2124         WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2125         RD_REG_DWORD(&reg->hccr);
2126
2127         RD_REG_WORD(&reg->mailbox0);
2128         for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
2129             rval == QLA_SUCCESS; cnt--) {
2130                 barrier();
2131                 if (cnt)
2132                         udelay(5);
2133                 else
2134                         rval = QLA_FUNCTION_TIMEOUT;
2135         }
2136         if (rval == QLA_SUCCESS)
2137                 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2138
2139         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2140             "Host Risc 0x%x, mailbox0 0x%x\n",
2141             RD_REG_DWORD(&reg->hccr),
2142              RD_REG_WORD(&reg->mailbox0));
2143
2144         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2145
2146         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2147             "Driver in %s mode\n",
2148             IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2149
2150         if (IS_NOPOLLING_TYPE(ha))
2151                 ha->isp_ops->enable_intrs(ha);
2152
2153         return rval;
2154 }
2155
2156 static void
2157 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2158 {
2159         struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2160
2161         WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2162         *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2163
2164 }
2165
2166 static void
2167 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2168 {
2169         struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2170
2171         WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2172         WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2173 }
2174
2175 static void
2176 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2177 {
2178         uint32_t wd32 = 0;
2179         uint delta_msec = 100;
2180         uint elapsed_msec = 0;
2181         uint timeout_msec;
2182         ulong n;
2183
2184         if (vha->hw->pdev->subsystem_device != 0x0175 &&
2185             vha->hw->pdev->subsystem_device != 0x0240)
2186                 return;
2187
2188         WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2189         udelay(100);
2190
2191 attempt:
2192         timeout_msec = TIMEOUT_SEMAPHORE;
2193         n = timeout_msec / delta_msec;
2194         while (n--) {
2195                 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2196                 qla25xx_read_risc_sema_reg(vha, &wd32);
2197                 if (wd32 & RISC_SEMAPHORE)
2198                         break;
2199                 msleep(delta_msec);
2200                 elapsed_msec += delta_msec;
2201                 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2202                         goto force;
2203         }
2204
2205         if (!(wd32 & RISC_SEMAPHORE))
2206                 goto force;
2207
2208         if (!(wd32 & RISC_SEMAPHORE_FORCE))
2209                 goto acquired;
2210
2211         qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2212         timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2213         n = timeout_msec / delta_msec;
2214         while (n--) {
2215                 qla25xx_read_risc_sema_reg(vha, &wd32);
2216                 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2217                         break;
2218                 msleep(delta_msec);
2219                 elapsed_msec += delta_msec;
2220                 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2221                         goto force;
2222         }
2223
2224         if (wd32 & RISC_SEMAPHORE_FORCE)
2225                 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2226
2227         goto attempt;
2228
2229 force:
2230         qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2231
2232 acquired:
2233         return;
2234 }
2235
2236 /**
2237  * qla24xx_reset_chip() - Reset ISP24xx chip.
2238  * @ha: HA context
2239  *
2240  * Returns 0 on success.
2241  */
2242 void
2243 qla24xx_reset_chip(scsi_qla_host_t *vha)
2244 {
2245         struct qla_hw_data *ha = vha->hw;
2246
2247         if (pci_channel_offline(ha->pdev) &&
2248             ha->flags.pci_channel_io_perm_failure) {
2249                 return;
2250         }
2251
2252         ha->isp_ops->disable_intrs(ha);
2253
2254         qla25xx_manipulate_risc_semaphore(vha);
2255
2256         /* Perform RISC reset. */
2257         qla24xx_reset_risc(vha);
2258 }
2259
2260 /**
2261  * qla2x00_chip_diag() - Test chip for proper operation.
2262  * @ha: HA context
2263  *
2264  * Returns 0 on success.
2265  */
2266 int
2267 qla2x00_chip_diag(scsi_qla_host_t *vha)
2268 {
2269         int             rval;
2270         struct qla_hw_data *ha = vha->hw;
2271         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2272         unsigned long   flags = 0;
2273         uint16_t        data;
2274         uint32_t        cnt;
2275         uint16_t        mb[5];
2276         struct req_que *req = ha->req_q_map[0];
2277
2278         /* Assume a failed state */
2279         rval = QLA_FUNCTION_FAILED;
2280
2281         ql_dbg(ql_dbg_init, vha, 0x007b,
2282             "Testing device at %lx.\n", (u_long)&reg->flash_address);
2283
2284         spin_lock_irqsave(&ha->hardware_lock, flags);
2285
2286         /* Reset ISP chip. */
2287         WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2288
2289         /*
2290          * We need to have a delay here since the card will not respond while
2291          * in reset causing an MCA on some architectures.
2292          */
2293         udelay(20);
2294         data = qla2x00_debounce_register(&reg->ctrl_status);
2295         for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2296                 udelay(5);
2297                 data = RD_REG_WORD(&reg->ctrl_status);
2298                 barrier();
2299         }
2300
2301         if (!cnt)
2302                 goto chip_diag_failed;
2303
2304         ql_dbg(ql_dbg_init, vha, 0x007c,
2305             "Reset register cleared by chip reset.\n");
2306
2307         /* Reset RISC processor. */
2308         WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2309         WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2310
2311         /* Workaround for QLA2312 PCI parity error */
2312         if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2313                 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2314                 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2315                         udelay(5);
2316                         data = RD_MAILBOX_REG(ha, reg, 0);
2317                         barrier();
2318                 }
2319         } else
2320                 udelay(10);
2321
2322         if (!cnt)
2323                 goto chip_diag_failed;
2324
2325         /* Check product ID of chip */
2326         ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
2327
2328         mb[1] = RD_MAILBOX_REG(ha, reg, 1);
2329         mb[2] = RD_MAILBOX_REG(ha, reg, 2);
2330         mb[3] = RD_MAILBOX_REG(ha, reg, 3);
2331         mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
2332         if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
2333             mb[3] != PROD_ID_3) {
2334                 ql_log(ql_log_warn, vha, 0x0062,
2335                     "Wrong product ID = 0x%x,0x%x,0x%x.\n",
2336                     mb[1], mb[2], mb[3]);
2337
2338                 goto chip_diag_failed;
2339         }
2340         ha->product_id[0] = mb[1];
2341         ha->product_id[1] = mb[2];
2342         ha->product_id[2] = mb[3];
2343         ha->product_id[3] = mb[4];
2344
2345         /* Adjust fw RISC transfer size */
2346         if (req->length > 1024)
2347                 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
2348         else
2349                 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
2350                     req->length;
2351
2352         if (IS_QLA2200(ha) &&
2353             RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
2354                 /* Limit firmware transfer size with a 2200A */
2355                 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
2356
2357                 ha->device_type |= DT_ISP2200A;
2358                 ha->fw_transfer_size = 128;
2359         }
2360
2361         /* Wrap Incoming Mailboxes Test. */
2362         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2363
2364         ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
2365         rval = qla2x00_mbx_reg_test(vha);
2366         if (rval)
2367                 ql_log(ql_log_warn, vha, 0x0080,
2368                     "Failed mailbox send register test.\n");
2369         else
2370                 /* Flag a successful rval */
2371                 rval = QLA_SUCCESS;
2372         spin_lock_irqsave(&ha->hardware_lock, flags);
2373
2374 chip_diag_failed:
2375         if (rval)
2376                 ql_log(ql_log_info, vha, 0x0081,
2377                     "Chip diagnostics **** FAILED ****.\n");
2378
2379         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2380
2381         return (rval);
2382 }
2383
2384 /**
2385  * qla24xx_chip_diag() - Test ISP24xx for proper operation.
2386  * @ha: HA context
2387  *
2388  * Returns 0 on success.
2389  */
2390 int
2391 qla24xx_chip_diag(scsi_qla_host_t *vha)
2392 {
2393         int rval;
2394         struct qla_hw_data *ha = vha->hw;
2395         struct req_que *req = ha->req_q_map[0];
2396
2397         if (IS_P3P_TYPE(ha))
2398                 return QLA_SUCCESS;
2399
2400         ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
2401
2402         rval = qla2x00_mbx_reg_test(vha);
2403         if (rval) {
2404                 ql_log(ql_log_warn, vha, 0x0082,
2405                     "Failed mailbox send register test.\n");
2406         } else {
2407                 /* Flag a successful rval */
2408                 rval = QLA_SUCCESS;
2409         }
2410
2411         return rval;
2412 }
2413
2414 void
2415 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
2416 {
2417         int rval;
2418         uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
2419             eft_size, fce_size, mq_size;
2420         dma_addr_t tc_dma;
2421         void *tc;
2422         struct qla_hw_data *ha = vha->hw;
2423         struct req_que *req = ha->req_q_map[0];
2424         struct rsp_que *rsp = ha->rsp_q_map[0];
2425
2426         if (ha->fw_dump) {
2427                 ql_dbg(ql_dbg_init, vha, 0x00bd,
2428                     "Firmware dump already allocated.\n");
2429                 return;
2430         }
2431
2432         ha->fw_dumped = 0;
2433         ha->fw_dump_cap_flags = 0;
2434         dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
2435         req_q_size = rsp_q_size = 0;
2436
2437         if (IS_QLA27XX(ha))
2438                 goto try_fce;
2439
2440         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2441                 fixed_size = sizeof(struct qla2100_fw_dump);
2442         } else if (IS_QLA23XX(ha)) {
2443                 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
2444                 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
2445                     sizeof(uint16_t);
2446         } else if (IS_FWI2_CAPABLE(ha)) {
2447                 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
2448                         fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
2449                 else if (IS_QLA81XX(ha))
2450                         fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
2451                 else if (IS_QLA25XX(ha))
2452                         fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
2453                 else
2454                         fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
2455
2456                 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
2457                     sizeof(uint32_t);
2458                 if (ha->mqenable) {
2459                         if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
2460                                 mq_size = sizeof(struct qla2xxx_mq_chain);
2461                         /*
2462                          * Allocate maximum buffer size for all queues.
2463                          * Resizing must be done at end-of-dump processing.
2464                          */
2465                         mq_size += ha->max_req_queues *
2466                             (req->length * sizeof(request_t));
2467                         mq_size += ha->max_rsp_queues *
2468                             (rsp->length * sizeof(response_t));
2469                 }
2470                 if (ha->tgt.atio_ring)
2471                         mq_size += ha->tgt.atio_q_length * sizeof(request_t);
2472                 /* Allocate memory for Fibre Channel Event Buffer. */
2473                 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
2474                     !IS_QLA27XX(ha))
2475                         goto try_eft;
2476
2477 try_fce:
2478                 if (ha->fce)
2479                         dma_free_coherent(&ha->pdev->dev,
2480                             FCE_SIZE, ha->fce, ha->fce_dma);
2481
2482                 /* Allocate memory for Fibre Channel Event Buffer. */
2483                 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
2484                                          GFP_KERNEL);
2485                 if (!tc) {
2486                         ql_log(ql_log_warn, vha, 0x00be,
2487                             "Unable to allocate (%d KB) for FCE.\n",
2488                             FCE_SIZE / 1024);
2489                         goto try_eft;
2490                 }
2491
2492                 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
2493                     ha->fce_mb, &ha->fce_bufs);
2494                 if (rval) {
2495                         ql_log(ql_log_warn, vha, 0x00bf,
2496                             "Unable to initialize FCE (%d).\n", rval);
2497                         dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
2498                             tc_dma);
2499                         ha->flags.fce_enabled = 0;
2500                         goto try_eft;
2501                 }
2502                 ql_dbg(ql_dbg_init, vha, 0x00c0,
2503                     "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
2504
2505                 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
2506                 ha->flags.fce_enabled = 1;
2507                 ha->fce_dma = tc_dma;
2508                 ha->fce = tc;
2509
2510 try_eft:
2511                 if (ha->eft)
2512                         dma_free_coherent(&ha->pdev->dev,
2513                             EFT_SIZE, ha->eft, ha->eft_dma);
2514
2515                 /* Allocate memory for Extended Trace Buffer. */
2516                 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
2517                                          GFP_KERNEL);
2518                 if (!tc) {
2519                         ql_log(ql_log_warn, vha, 0x00c1,
2520                             "Unable to allocate (%d KB) for EFT.\n",
2521                             EFT_SIZE / 1024);
2522                         goto cont_alloc;
2523                 }
2524
2525                 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
2526                 if (rval) {
2527                         ql_log(ql_log_warn, vha, 0x00c2,
2528                             "Unable to initialize EFT (%d).\n", rval);
2529                         dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
2530                             tc_dma);
2531                         goto cont_alloc;
2532                 }
2533                 ql_dbg(ql_dbg_init, vha, 0x00c3,
2534                     "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
2535
2536                 eft_size = EFT_SIZE;
2537                 ha->eft_dma = tc_dma;
2538                 ha->eft = tc;
2539         }
2540
2541 cont_alloc:
2542         if (IS_QLA27XX(ha)) {
2543                 if (!ha->fw_dump_template) {
2544                         ql_log(ql_log_warn, vha, 0x00ba,
2545                             "Failed missing fwdump template\n");
2546                         return;
2547                 }
2548                 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
2549                 ql_dbg(ql_dbg_init, vha, 0x00fa,
2550                     "-> allocating fwdump (%x bytes)...\n", dump_size);
2551                 goto allocate;
2552         }
2553
2554         req_q_size = req->length * sizeof(request_t);
2555         rsp_q_size = rsp->length * sizeof(response_t);
2556         dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2557         dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
2558         ha->chain_offset = dump_size;
2559         dump_size += mq_size + fce_size;
2560
2561 allocate:
2562         ha->fw_dump = vmalloc(dump_size);
2563         if (!ha->fw_dump) {
2564                 ql_log(ql_log_warn, vha, 0x00c4,
2565                     "Unable to allocate (%d KB) for firmware dump.\n",
2566                     dump_size / 1024);
2567
2568                 if (ha->fce) {
2569                         dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
2570                             ha->fce_dma);
2571                         ha->fce = NULL;
2572                         ha->fce_dma = 0;
2573                 }
2574
2575                 if (ha->eft) {
2576                         dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
2577                             ha->eft_dma);
2578                         ha->eft = NULL;
2579                         ha->eft_dma = 0;
2580                 }
2581                 return;
2582         }
2583         ha->fw_dump_len = dump_size;
2584         ql_dbg(ql_dbg_init, vha, 0x00c5,
2585             "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
2586
2587         if (IS_QLA27XX(ha))
2588                 return;
2589
2590         ha->fw_dump->signature[0] = 'Q';
2591         ha->fw_dump->signature[1] = 'L';
2592         ha->fw_dump->signature[2] = 'G';
2593         ha->fw_dump->signature[3] = 'C';
2594         ha->fw_dump->version = htonl(1);
2595
2596         ha->fw_dump->fixed_size = htonl(fixed_size);
2597         ha->fw_dump->mem_size = htonl(mem_size);
2598         ha->fw_dump->req_q_size = htonl(req_q_size);
2599         ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
2600
2601         ha->fw_dump->eft_size = htonl(eft_size);
2602         ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
2603         ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
2604
2605         ha->fw_dump->header_size =
2606             htonl(offsetof(struct qla2xxx_fw_dump, isp));
2607 }
2608
2609 static int
2610 qla81xx_mpi_sync(scsi_qla_host_t *vha)
2611 {
2612 #define MPS_MASK        0xe0
2613         int rval;
2614         uint16_t dc;
2615         uint32_t dw;
2616
2617         if (!IS_QLA81XX(vha->hw))
2618                 return QLA_SUCCESS;
2619
2620         rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
2621         if (rval != QLA_SUCCESS) {
2622                 ql_log(ql_log_warn, vha, 0x0105,
2623                     "Unable to acquire semaphore.\n");
2624                 goto done;
2625         }
2626
2627         pci_read_config_word(vha->hw->pdev, 0x54, &dc);
2628         rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
2629         if (rval != QLA_SUCCESS) {
2630                 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
2631                 goto done_release;
2632         }
2633
2634         dc &= MPS_MASK;
2635         if (dc == (dw & MPS_MASK))
2636                 goto done_release;
2637
2638         dw &= ~MPS_MASK;
2639         dw |= dc;
2640         rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
2641         if (rval != QLA_SUCCESS) {
2642                 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
2643         }
2644
2645 done_release:
2646         rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
2647         if (rval != QLA_SUCCESS) {
2648                 ql_log(ql_log_warn, vha, 0x006d,
2649                     "Unable to release semaphore.\n");
2650         }
2651
2652 done:
2653         return rval;
2654 }
2655
2656 int
2657 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
2658 {
2659         /* Don't try to reallocate the array */
2660         if (req->outstanding_cmds)
2661                 return QLA_SUCCESS;
2662
2663         if (!IS_FWI2_CAPABLE(ha))
2664                 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
2665         else {
2666                 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
2667                         req->num_outstanding_cmds = ha->cur_fw_xcb_count;
2668                 else
2669                         req->num_outstanding_cmds = ha->cur_fw_iocb_count;
2670         }
2671
2672         req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
2673             req->num_outstanding_cmds, GFP_KERNEL);
2674
2675         if (!req->outstanding_cmds) {
2676                 /*
2677                  * Try to allocate a minimal size just so we can get through
2678                  * initialization.
2679                  */
2680                 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
2681                 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
2682                     req->num_outstanding_cmds, GFP_KERNEL);
2683
2684                 if (!req->outstanding_cmds) {
2685                         ql_log(ql_log_fatal, NULL, 0x0126,
2686                             "Failed to allocate memory for "
2687                             "outstanding_cmds for req_que %p.\n", req);
2688                         req->num_outstanding_cmds = 0;
2689                         return QLA_FUNCTION_FAILED;
2690                 }
2691         }
2692
2693         return QLA_SUCCESS;
2694 }
2695
2696 /**
2697  * qla2x00_setup_chip() - Load and start RISC firmware.
2698  * @ha: HA context
2699  *
2700  * Returns 0 on success.
2701  */
2702 static int
2703 qla2x00_setup_chip(scsi_qla_host_t *vha)
2704 {
2705         int rval;
2706         uint32_t srisc_address = 0;
2707         struct qla_hw_data *ha = vha->hw;
2708         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2709         unsigned long flags;
2710         uint16_t fw_major_version;
2711
2712         if (IS_P3P_TYPE(ha)) {
2713                 rval = ha->isp_ops->load_risc(vha, &srisc_address);
2714                 if (rval == QLA_SUCCESS) {
2715                         qla2x00_stop_firmware(vha);
2716                         goto enable_82xx_npiv;
2717                 } else
2718                         goto failed;
2719         }
2720
2721         if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
2722                 /* Disable SRAM, Instruction RAM and GP RAM parity.  */
2723                 spin_lock_irqsave(&ha->hardware_lock, flags);
2724                 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
2725                 RD_REG_WORD(&reg->hccr);
2726                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2727         }
2728
2729         qla81xx_mpi_sync(vha);
2730
2731         /* Load firmware sequences */
2732         rval = ha->isp_ops->load_risc(vha, &srisc_address);
2733         if (rval == QLA_SUCCESS) {
2734                 ql_dbg(ql_dbg_init, vha, 0x00c9,
2735                     "Verifying Checksum of loaded RISC code.\n");
2736
2737                 rval = qla2x00_verify_checksum(vha, srisc_address);
2738                 if (rval == QLA_SUCCESS) {
2739                         /* Start firmware execution. */
2740                         ql_dbg(ql_dbg_init, vha, 0x00ca,
2741                             "Starting firmware.\n");
2742
2743                         if (ql2xexlogins)
2744                                 ha->flags.exlogins_enabled = 1;
2745
2746                         if (ql2xexchoffld)
2747                                 ha->flags.exchoffld_enabled = 1;
2748
2749                         rval = qla2x00_execute_fw(vha, srisc_address);
2750                         /* Retrieve firmware information. */
2751                         if (rval == QLA_SUCCESS) {
2752                                 rval = qla2x00_set_exlogins_buffer(vha);
2753                                 if (rval != QLA_SUCCESS)
2754                                         goto failed;
2755
2756                                 rval = qla2x00_set_exchoffld_buffer(vha);
2757                                 if (rval != QLA_SUCCESS)
2758                                         goto failed;
2759
2760 enable_82xx_npiv:
2761                                 fw_major_version = ha->fw_major_version;
2762                                 if (IS_P3P_TYPE(ha))
2763                                         qla82xx_check_md_needed(vha);
2764                                 else
2765                                         rval = qla2x00_get_fw_version(vha);
2766                                 if (rval != QLA_SUCCESS)
2767                                         goto failed;
2768                                 ha->flags.npiv_supported = 0;
2769                                 if (IS_QLA2XXX_MIDTYPE(ha) &&
2770                                          (ha->fw_attributes & BIT_2)) {
2771                                         ha->flags.npiv_supported = 1;
2772                                         if ((!ha->max_npiv_vports) ||
2773                                             ((ha->max_npiv_vports + 1) %
2774                                             MIN_MULTI_ID_FABRIC))
2775                                                 ha->max_npiv_vports =
2776                                                     MIN_MULTI_ID_FABRIC - 1;
2777                                 }
2778                                 qla2x00_get_resource_cnts(vha);
2779
2780                                 /*
2781                                  * Allocate the array of outstanding commands
2782                                  * now that we know the firmware resources.
2783                                  */
2784                                 rval = qla2x00_alloc_outstanding_cmds(ha,
2785                                     vha->req);
2786                                 if (rval != QLA_SUCCESS)
2787                                         goto failed;
2788
2789                                 if (!fw_major_version && ql2xallocfwdump
2790                                     && !(IS_P3P_TYPE(ha)))
2791                                         qla2x00_alloc_fw_dump(vha);
2792                         } else {
2793                                 goto failed;
2794                         }
2795                 } else {
2796                         ql_log(ql_log_fatal, vha, 0x00cd,
2797                             "ISP Firmware failed checksum.\n");
2798                         goto failed;
2799                 }
2800         } else
2801                 goto failed;
2802
2803         if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
2804                 /* Enable proper parity. */
2805                 spin_lock_irqsave(&ha->hardware_lock, flags);
2806                 if (IS_QLA2300(ha))
2807                         /* SRAM parity */
2808                         WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
2809                 else
2810                         /* SRAM, Instruction RAM and GP RAM parity */
2811                         WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
2812                 RD_REG_WORD(&reg->hccr);
2813                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2814         }
2815
2816         if (IS_QLA27XX(ha))
2817                 ha->flags.fac_supported = 1;
2818         else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
2819                 uint32_t size;
2820
2821                 rval = qla81xx_fac_get_sector_size(vha, &size);
2822                 if (rval == QLA_SUCCESS) {
2823                         ha->flags.fac_supported = 1;
2824                         ha->fdt_block_size = size << 2;
2825                 } else {
2826                         ql_log(ql_log_warn, vha, 0x00ce,
2827                             "Unsupported FAC firmware (%d.%02d.%02d).\n",
2828                             ha->fw_major_version, ha->fw_minor_version,
2829                             ha->fw_subminor_version);
2830
2831                         if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2832                                 ha->flags.fac_supported = 0;
2833                                 rval = QLA_SUCCESS;
2834                         }
2835                 }
2836         }
2837 failed:
2838         if (rval) {
2839                 ql_log(ql_log_fatal, vha, 0x00cf,
2840                     "Setup chip ****FAILED****.\n");
2841         }
2842
2843         return (rval);
2844 }
2845
2846 /**
2847  * qla2x00_init_response_q_entries() - Initializes response queue entries.
2848  * @ha: HA context
2849  *
2850  * Beginning of request ring has initialization control block already built
2851  * by nvram config routine.
2852  *
2853  * Returns 0 on success.
2854  */
2855 void
2856 qla2x00_init_response_q_entries(struct rsp_que *rsp)
2857 {
2858         uint16_t cnt;
2859         response_t *pkt;
2860
2861         rsp->ring_ptr = rsp->ring;
2862         rsp->ring_index    = 0;
2863         rsp->status_srb = NULL;
2864         pkt = rsp->ring_ptr;
2865         for (cnt = 0; cnt < rsp->length; cnt++) {
2866                 pkt->signature = RESPONSE_PROCESSED;
2867                 pkt++;
2868         }
2869 }
2870
2871 /**
2872  * qla2x00_update_fw_options() - Read and process firmware options.
2873  * @ha: HA context
2874  *
2875  * Returns 0 on success.
2876  */
2877 void
2878 qla2x00_update_fw_options(scsi_qla_host_t *vha)
2879 {
2880         uint16_t swing, emphasis, tx_sens, rx_sens;
2881         struct qla_hw_data *ha = vha->hw;
2882
2883         memset(ha->fw_options, 0, sizeof(ha->fw_options));
2884         qla2x00_get_fw_options(vha, ha->fw_options);
2885
2886         if (IS_QLA2100(ha) || IS_QLA2200(ha))
2887                 return;
2888
2889         /* Serial Link options. */
2890         ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
2891             "Serial link options.\n");
2892         ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
2893             (uint8_t *)&ha->fw_seriallink_options,
2894             sizeof(ha->fw_seriallink_options));
2895
2896         ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
2897         if (ha->fw_seriallink_options[3] & BIT_2) {
2898                 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
2899
2900                 /*  1G settings */
2901                 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
2902                 emphasis = (ha->fw_seriallink_options[2] &
2903                     (BIT_4 | BIT_3)) >> 3;
2904                 tx_sens = ha->fw_seriallink_options[0] &
2905                     (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2906                 rx_sens = (ha->fw_seriallink_options[0] &
2907                     (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
2908                 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
2909                 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
2910                         if (rx_sens == 0x0)
2911                                 rx_sens = 0x3;
2912                         ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
2913                 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
2914                         ha->fw_options[10] |= BIT_5 |
2915                             ((rx_sens & (BIT_1 | BIT_0)) << 2) |
2916                             (tx_sens & (BIT_1 | BIT_0));
2917
2918                 /*  2G settings */
2919                 swing = (ha->fw_seriallink_options[2] &
2920                     (BIT_7 | BIT_6 | BIT_5)) >> 5;
2921                 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
2922                 tx_sens = ha->fw_seriallink_options[1] &
2923                     (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2924                 rx_sens = (ha->fw_seriallink_options[1] &
2925                     (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
2926                 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
2927                 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
2928                         if (rx_sens == 0x0)
2929                                 rx_sens = 0x3;
2930                         ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
2931                 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
2932                         ha->fw_options[11] |= BIT_5 |
2933                             ((rx_sens & (BIT_1 | BIT_0)) << 2) |
2934                             (tx_sens & (BIT_1 | BIT_0));
2935         }
2936
2937         /* FCP2 options. */
2938         /*  Return command IOCBs without waiting for an ABTS to complete. */
2939         ha->fw_options[3] |= BIT_13;
2940
2941         /* LED scheme. */
2942         if (ha->flags.enable_led_scheme)
2943                 ha->fw_options[2] |= BIT_12;
2944
2945         /* Detect ISP6312. */
2946         if (IS_QLA6312(ha))
2947                 ha->fw_options[2] |= BIT_13;
2948
2949         /* Set Retry FLOGI in case of P2P connection */
2950         if (ha->operating_mode == P2P) {
2951                 ha->fw_options[2] |= BIT_3;
2952                 ql_dbg(ql_dbg_disc, vha, 0x2100,
2953                     "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
2954                         __func__, ha->fw_options[2]);
2955         }
2956
2957         /* Update firmware options. */
2958         qla2x00_set_fw_options(vha, ha->fw_options);
2959 }
2960
2961 void
2962 qla24xx_update_fw_options(scsi_qla_host_t *vha)
2963 {
2964         int rval;
2965         struct qla_hw_data *ha = vha->hw;
2966
2967         if (IS_P3P_TYPE(ha))
2968                 return;
2969
2970         /*  Hold status IOCBs until ABTS response received. */
2971         if (ql2xfwholdabts)
2972                 ha->fw_options[3] |= BIT_12;
2973
2974         /* Set Retry FLOGI in case of P2P connection */
2975         if (ha->operating_mode == P2P) {
2976                 ha->fw_options[2] |= BIT_3;
2977                 ql_dbg(ql_dbg_disc, vha, 0x2101,
2978                     "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
2979                         __func__, ha->fw_options[2]);
2980         }
2981
2982         /* Move PUREX, ABTS RX & RIDA to ATIOQ */
2983         if (ql2xmvasynctoatio) {
2984                 if (qla_tgt_mode_enabled(vha) ||
2985                     qla_dual_mode_enabled(vha))
2986                         ha->fw_options[2] |= BIT_11;
2987                 else
2988                         ha->fw_options[2] &= ~BIT_11;
2989         }
2990
2991         ql_dbg(ql_dbg_init, vha, 0xffff,
2992                 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
2993                 __func__, ha->fw_options[1], ha->fw_options[2],
2994                 ha->fw_options[3], vha->host->active_mode);
2995         qla2x00_set_fw_options(vha, ha->fw_options);
2996
2997         /* Update Serial Link options. */
2998         if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
2999                 return;
3000
3001         rval = qla2x00_set_serdes_params(vha,
3002             le16_to_cpu(ha->fw_seriallink_options24[1]),
3003             le16_to_cpu(ha->fw_seriallink_options24[2]),
3004             le16_to_cpu(ha->fw_seriallink_options24[3]));
3005         if (rval != QLA_SUCCESS) {
3006                 ql_log(ql_log_warn, vha, 0x0104,
3007                     "Unable to update Serial Link options (%x).\n", rval);
3008         }
3009 }
3010
3011 void
3012 qla2x00_config_rings(struct scsi_qla_host *vha)
3013 {
3014         struct qla_hw_data *ha = vha->hw;
3015         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3016         struct req_que *req = ha->req_q_map[0];
3017         struct rsp_que *rsp = ha->rsp_q_map[0];
3018
3019         /* Setup ring parameters in initialization control block. */
3020         ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3021         ha->init_cb->response_q_inpointer = cpu_to_le16(0);
3022         ha->init_cb->request_q_length = cpu_to_le16(req->length);
3023         ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3024         ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3025         ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3026         ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3027         ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
3028
3029         WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3030         WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3031         WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3032         WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3033         RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg));            /* PCI Posting. */
3034 }
3035
3036 void
3037 qla24xx_config_rings(struct scsi_qla_host *vha)
3038 {
3039         struct qla_hw_data *ha = vha->hw;
3040         device_reg_t *reg = ISP_QUE_REG(ha, 0);
3041         struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3042         struct qla_msix_entry *msix;
3043         struct init_cb_24xx *icb;
3044         uint16_t rid = 0;
3045         struct req_que *req = ha->req_q_map[0];
3046         struct rsp_que *rsp = ha->rsp_q_map[0];
3047
3048         /* Setup ring parameters in initialization control block. */
3049         icb = (struct init_cb_24xx *)ha->init_cb;
3050         icb->request_q_outpointer = cpu_to_le16(0);
3051         icb->response_q_inpointer = cpu_to_le16(0);
3052         icb->request_q_length = cpu_to_le16(req->length);
3053         icb->response_q_length = cpu_to_le16(rsp->length);
3054         icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3055         icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3056         icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3057         icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
3058
3059         /* Setup ATIO queue dma pointers for target mode */
3060         icb->atio_q_inpointer = cpu_to_le16(0);
3061         icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3062         icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
3063         icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
3064
3065         if (IS_SHADOW_REG_CAPABLE(ha))
3066                 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
3067
3068         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3069                 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3070                 icb->rid = cpu_to_le16(rid);
3071                 if (ha->flags.msix_enabled) {
3072                         msix = &ha->msix_entries[1];
3073                         ql_dbg(ql_dbg_init, vha, 0x00fd,
3074                             "Registering vector 0x%x for base que.\n",
3075                             msix->entry);
3076                         icb->msix = cpu_to_le16(msix->entry);
3077                 }
3078                 /* Use alternate PCI bus number */
3079                 if (MSB(rid))
3080                         icb->firmware_options_2 |= cpu_to_le32(BIT_19);
3081                 /* Use alternate PCI devfn */
3082                 if (LSB(rid))
3083                         icb->firmware_options_2 |= cpu_to_le32(BIT_18);
3084
3085                 /* Use Disable MSIX Handshake mode for capable adapters */
3086                 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
3087                     (ha->flags.msix_enabled)) {
3088                         icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
3089                         ha->flags.disable_msix_handshake = 1;
3090                         ql_dbg(ql_dbg_init, vha, 0x00fe,
3091                             "MSIX Handshake Disable Mode turned on.\n");
3092                 } else {
3093                         icb->firmware_options_2 |= cpu_to_le32(BIT_22);
3094                 }
3095                 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
3096
3097                 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
3098                 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
3099                 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
3100                 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
3101         } else {
3102                 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
3103                 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
3104                 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
3105                 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
3106         }
3107         qlt_24xx_config_rings(vha);
3108
3109         /* PCI posting */
3110         RD_REG_DWORD(&ioreg->hccr);
3111 }
3112
3113 /**
3114  * qla2x00_init_rings() - Initializes firmware.
3115  * @ha: HA context
3116  *
3117  * Beginning of request ring has initialization control block already built
3118  * by nvram config routine.
3119  *
3120  * Returns 0 on success.
3121  */
3122 int
3123 qla2x00_init_rings(scsi_qla_host_t *vha)
3124 {
3125         int     rval;
3126         unsigned long flags = 0;
3127         int cnt, que;
3128         struct qla_hw_data *ha = vha->hw;
3129         struct req_que *req;
3130         struct rsp_que *rsp;
3131