1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright IBM Corp. 2007, 2009
4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
10 #define KMSG_COMPONENT "qeth"
11 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13 #include <linux/compat.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
19 #include <linux/log2.h>
21 #include <linux/tcp.h>
22 #include <linux/mii.h>
23 #include <linux/kthread.h>
24 #include <linux/slab.h>
25 #include <linux/if_vlan.h>
26 #include <linux/netdevice.h>
27 #include <linux/netdev_features.h>
28 #include <linux/skbuff.h>
29 #include <linux/vmalloc.h>
31 #include <net/iucv/af_iucv.h>
32 #include <net/dsfield.h>
34 #include <asm/ebcdic.h>
35 #include <asm/chpid.h>
37 #include <asm/sysinfo.h>
40 #include <asm/ccwdev.h>
41 #include <asm/cpcmd.h>
43 #include "qeth_core.h"
45 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
46 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
48 [QETH_DBF_SETUP] = {"qeth_setup",
49 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
50 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
51 &debug_sprintf_view, NULL},
52 [QETH_DBF_CTRL] = {"qeth_control",
53 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
55 EXPORT_SYMBOL_GPL(qeth_dbf);
57 struct qeth_card_list_struct qeth_core_card_list;
58 EXPORT_SYMBOL_GPL(qeth_core_card_list);
59 struct kmem_cache *qeth_core_header_cache;
60 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
61 static struct kmem_cache *qeth_qdio_outbuf_cache;
63 static struct device *qeth_core_root_dev;
64 static struct lock_class_key qdio_out_skb_queue_key;
66 static void qeth_send_control_data_cb(struct qeth_card *card,
67 struct qeth_channel *channel,
68 struct qeth_cmd_buffer *iob);
69 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
70 static void qeth_free_buffer_pool(struct qeth_card *);
71 static int qeth_qdio_establish(struct qeth_card *);
72 static void qeth_free_qdio_buffers(struct qeth_card *);
73 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
74 struct qeth_qdio_out_buffer *buf,
75 enum iucv_tx_notify notification);
76 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
77 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
79 struct workqueue_struct *qeth_wq;
80 EXPORT_SYMBOL_GPL(qeth_wq);
82 int qeth_card_hw_is_reachable(struct qeth_card *card)
84 return (card->state == CARD_STATE_SOFTSETUP) ||
85 (card->state == CARD_STATE_UP);
87 EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
89 static void qeth_close_dev_handler(struct work_struct *work)
91 struct qeth_card *card;
93 card = container_of(work, struct qeth_card, close_dev_work);
94 QETH_CARD_TEXT(card, 2, "cldevhdl");
98 ccwgroup_set_offline(card->gdev);
101 void qeth_close_dev(struct qeth_card *card)
103 QETH_CARD_TEXT(card, 2, "cldevsubm");
104 queue_work(qeth_wq, &card->close_dev_work);
106 EXPORT_SYMBOL_GPL(qeth_close_dev);
108 static const char *qeth_get_cardname(struct qeth_card *card)
110 if (card->info.guestlan) {
111 switch (card->info.type) {
112 case QETH_CARD_TYPE_OSD:
113 return " Virtual NIC QDIO";
114 case QETH_CARD_TYPE_IQD:
115 return " Virtual NIC Hiper";
116 case QETH_CARD_TYPE_OSM:
117 return " Virtual NIC QDIO - OSM";
118 case QETH_CARD_TYPE_OSX:
119 return " Virtual NIC QDIO - OSX";
124 switch (card->info.type) {
125 case QETH_CARD_TYPE_OSD:
126 return " OSD Express";
127 case QETH_CARD_TYPE_IQD:
128 return " HiperSockets";
129 case QETH_CARD_TYPE_OSN:
131 case QETH_CARD_TYPE_OSM:
133 case QETH_CARD_TYPE_OSX:
142 /* max length to be returned: 14 */
143 const char *qeth_get_cardname_short(struct qeth_card *card)
145 if (card->info.guestlan) {
146 switch (card->info.type) {
147 case QETH_CARD_TYPE_OSD:
148 return "Virt.NIC QDIO";
149 case QETH_CARD_TYPE_IQD:
150 return "Virt.NIC Hiper";
151 case QETH_CARD_TYPE_OSM:
152 return "Virt.NIC OSM";
153 case QETH_CARD_TYPE_OSX:
154 return "Virt.NIC OSX";
159 switch (card->info.type) {
160 case QETH_CARD_TYPE_OSD:
161 switch (card->info.link_type) {
162 case QETH_LINK_TYPE_FAST_ETH:
164 case QETH_LINK_TYPE_HSTR:
166 case QETH_LINK_TYPE_GBIT_ETH:
168 case QETH_LINK_TYPE_10GBIT_ETH:
170 case QETH_LINK_TYPE_LANE_ETH100:
171 return "OSD_FE_LANE";
172 case QETH_LINK_TYPE_LANE_TR:
173 return "OSD_TR_LANE";
174 case QETH_LINK_TYPE_LANE_ETH1000:
175 return "OSD_GbE_LANE";
176 case QETH_LINK_TYPE_LANE:
177 return "OSD_ATM_LANE";
179 return "OSD_Express";
181 case QETH_CARD_TYPE_IQD:
182 return "HiperSockets";
183 case QETH_CARD_TYPE_OSN:
185 case QETH_CARD_TYPE_OSM:
187 case QETH_CARD_TYPE_OSX:
196 void qeth_set_recovery_task(struct qeth_card *card)
198 card->recovery_task = current;
200 EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
202 void qeth_clear_recovery_task(struct qeth_card *card)
204 card->recovery_task = NULL;
206 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
208 static bool qeth_is_recovery_task(const struct qeth_card *card)
210 return card->recovery_task == current;
213 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
214 int clear_start_mask)
218 spin_lock_irqsave(&card->thread_mask_lock, flags);
219 card->thread_allowed_mask = threads;
220 if (clear_start_mask)
221 card->thread_start_mask &= threads;
222 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
223 wake_up(&card->wait_q);
225 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
227 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
232 spin_lock_irqsave(&card->thread_mask_lock, flags);
233 rc = (card->thread_running_mask & threads);
234 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
237 EXPORT_SYMBOL_GPL(qeth_threads_running);
239 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
241 if (qeth_is_recovery_task(card))
243 return wait_event_interruptible(card->wait_q,
244 qeth_threads_running(card, threads) == 0);
246 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
248 void qeth_clear_working_pool_list(struct qeth_card *card)
250 struct qeth_buffer_pool_entry *pool_entry, *tmp;
252 QETH_CARD_TEXT(card, 5, "clwrklst");
253 list_for_each_entry_safe(pool_entry, tmp,
254 &card->qdio.in_buf_pool.entry_list, list){
255 list_del(&pool_entry->list);
258 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
260 static int qeth_alloc_buffer_pool(struct qeth_card *card)
262 struct qeth_buffer_pool_entry *pool_entry;
266 QETH_CARD_TEXT(card, 5, "alocpool");
267 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
268 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
270 qeth_free_buffer_pool(card);
273 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
274 ptr = (void *) __get_free_page(GFP_KERNEL);
277 free_page((unsigned long)
278 pool_entry->elements[--j]);
280 qeth_free_buffer_pool(card);
283 pool_entry->elements[j] = ptr;
285 list_add(&pool_entry->init_list,
286 &card->qdio.init_pool.entry_list);
291 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
293 QETH_CARD_TEXT(card, 2, "realcbp");
295 if ((card->state != CARD_STATE_DOWN) &&
296 (card->state != CARD_STATE_RECOVER))
299 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
300 qeth_clear_working_pool_list(card);
301 qeth_free_buffer_pool(card);
302 card->qdio.in_buf_pool.buf_count = bufcnt;
303 card->qdio.init_pool.buf_count = bufcnt;
304 return qeth_alloc_buffer_pool(card);
306 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
308 static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
313 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
317 static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
319 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
325 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
330 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
331 q->bufs[i].buffer = q->qdio_bufs[i];
333 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
337 static int qeth_cq_init(struct qeth_card *card)
341 if (card->options.cq == QETH_CQ_ENABLED) {
342 QETH_DBF_TEXT(SETUP, 2, "cqinit");
343 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
344 QDIO_MAX_BUFFERS_PER_Q);
345 card->qdio.c_q->next_buf_to_init = 127;
346 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
347 card->qdio.no_in_queues - 1, 0,
350 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
359 static int qeth_alloc_cq(struct qeth_card *card)
363 if (card->options.cq == QETH_CQ_ENABLED) {
365 struct qdio_outbuf_state *outbuf_states;
367 QETH_DBF_TEXT(SETUP, 2, "cqon");
368 card->qdio.c_q = qeth_alloc_qdio_queue();
369 if (!card->qdio.c_q) {
373 card->qdio.no_in_queues = 2;
374 card->qdio.out_bufstates =
375 kcalloc(card->qdio.no_out_queues *
376 QDIO_MAX_BUFFERS_PER_Q,
377 sizeof(struct qdio_outbuf_state),
379 outbuf_states = card->qdio.out_bufstates;
380 if (outbuf_states == NULL) {
384 for (i = 0; i < card->qdio.no_out_queues; ++i) {
385 card->qdio.out_qs[i]->bufstates = outbuf_states;
386 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
389 QETH_DBF_TEXT(SETUP, 2, "nocq");
390 card->qdio.c_q = NULL;
391 card->qdio.no_in_queues = 1;
393 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
398 qeth_free_qdio_queue(card->qdio.c_q);
399 card->qdio.c_q = NULL;
401 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
405 static void qeth_free_cq(struct qeth_card *card)
407 if (card->qdio.c_q) {
408 --card->qdio.no_in_queues;
409 qeth_free_qdio_queue(card->qdio.c_q);
410 card->qdio.c_q = NULL;
412 kfree(card->qdio.out_bufstates);
413 card->qdio.out_bufstates = NULL;
416 static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
419 enum iucv_tx_notify n;
423 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
429 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
430 TX_NOTIFY_UNREACHABLE;
433 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
434 TX_NOTIFY_GENERALERROR;
441 static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
444 if (q->card->options.cq != QETH_CQ_ENABLED)
447 if (q->bufs[bidx]->next_pending != NULL) {
448 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
449 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
452 if (forced_cleanup ||
453 atomic_read(&c->state) ==
454 QETH_QDIO_BUF_HANDLED_DELAYED) {
455 struct qeth_qdio_out_buffer *f = c;
456 QETH_CARD_TEXT(f->q->card, 5, "fp");
457 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
458 /* release here to avoid interleaving between
459 outbound tasklet and inbound tasklet
460 regarding notifications and lifecycle */
461 qeth_release_skbs(c);
464 WARN_ON_ONCE(head->next_pending != f);
465 head->next_pending = c;
466 kmem_cache_free(qeth_qdio_outbuf_cache, f);
474 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
475 QETH_QDIO_BUF_HANDLED_DELAYED)) {
476 /* for recovery situations */
477 qeth_init_qdio_out_buf(q, bidx);
478 QETH_CARD_TEXT(q->card, 2, "clprecov");
483 static void qeth_qdio_handle_aob(struct qeth_card *card,
484 unsigned long phys_aob_addr)
487 struct qeth_qdio_out_buffer *buffer;
488 enum iucv_tx_notify notification;
491 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
492 QETH_CARD_TEXT(card, 5, "haob");
493 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
494 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
495 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
497 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
498 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
499 notification = TX_NOTIFY_OK;
501 WARN_ON_ONCE(atomic_read(&buffer->state) !=
502 QETH_QDIO_BUF_PENDING);
503 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
504 notification = TX_NOTIFY_DELAYED_OK;
507 if (aob->aorc != 0) {
508 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
509 notification = qeth_compute_cq_notification(aob->aorc, 1);
511 qeth_notify_skbs(buffer->q, buffer, notification);
513 /* Free dangling allocations. The attached skbs are handled by
514 * qeth_cleanup_handled_pending().
517 i < aob->sb_count && i < QETH_MAX_BUFFER_ELEMENTS(card);
519 if (aob->sba[i] && buffer->is_header[i])
520 kmem_cache_free(qeth_core_header_cache,
521 (void *) aob->sba[i]);
523 atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
525 qdio_release_aob(aob);
528 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
530 return card->options.cq == QETH_CQ_ENABLED &&
531 card->qdio.c_q != NULL &&
533 queue == card->qdio.no_in_queues - 1;
536 static void qeth_setup_ccw(struct ccw1 *ccw, u8 cmd_code, u32 len, void *data)
538 ccw->cmd_code = cmd_code;
539 ccw->flags = CCW_FLAG_SLI;
541 ccw->cda = (__u32) __pa(data);
544 static int __qeth_issue_next_read(struct qeth_card *card)
546 struct qeth_channel *channel = &card->read;
547 struct qeth_cmd_buffer *iob;
550 QETH_CARD_TEXT(card, 5, "issnxrd");
551 if (channel->state != CH_STATE_UP)
553 iob = qeth_get_buffer(channel);
555 dev_warn(&card->gdev->dev, "The qeth device driver "
556 "failed to recover an error on the device\n");
557 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
558 "available\n", dev_name(&card->gdev->dev));
561 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
562 QETH_CARD_TEXT(card, 6, "noirqpnd");
563 rc = ccw_device_start(channel->ccwdev, channel->ccw,
566 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
567 "rc=%i\n", dev_name(&card->gdev->dev), rc);
568 atomic_set(&channel->irq_pending, 0);
569 card->read_or_write_problem = 1;
570 qeth_schedule_recovery(card);
571 wake_up(&card->wait_q);
576 static int qeth_issue_next_read(struct qeth_card *card)
580 spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
581 ret = __qeth_issue_next_read(card);
582 spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
587 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
589 struct qeth_reply *reply;
591 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
593 refcount_set(&reply->refcnt, 1);
594 atomic_set(&reply->received, 0);
599 static void qeth_get_reply(struct qeth_reply *reply)
601 refcount_inc(&reply->refcnt);
604 static void qeth_put_reply(struct qeth_reply *reply)
606 if (refcount_dec_and_test(&reply->refcnt))
610 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
611 struct qeth_card *card)
613 const char *ipa_name;
614 int com = cmd->hdr.command;
615 ipa_name = qeth_get_ipa_cmd_name(com);
617 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
619 ipa_name, com, dev_name(&card->gdev->dev),
620 QETH_CARD_IFNAME(card), rc,
621 qeth_get_ipa_msg(rc));
623 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
624 ipa_name, com, dev_name(&card->gdev->dev),
625 QETH_CARD_IFNAME(card));
628 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
629 struct qeth_ipa_cmd *cmd)
631 QETH_CARD_TEXT(card, 5, "chkipad");
633 if (IS_IPA_REPLY(cmd)) {
634 if (cmd->hdr.command != IPA_CMD_SETCCID &&
635 cmd->hdr.command != IPA_CMD_DELCCID &&
636 cmd->hdr.command != IPA_CMD_MODCCID &&
637 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
638 qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
642 /* handle unsolicited event: */
643 switch (cmd->hdr.command) {
644 case IPA_CMD_STOPLAN:
645 if (cmd->hdr.return_code == IPA_RC_VEPA_TO_VEB_TRANSITION) {
646 dev_err(&card->gdev->dev,
647 "Interface %s is down because the adjacent port is no longer in reflective relay mode\n",
648 QETH_CARD_IFNAME(card));
649 qeth_close_dev(card);
651 dev_warn(&card->gdev->dev,
652 "The link for interface %s on CHPID 0x%X failed\n",
653 QETH_CARD_IFNAME(card), card->info.chpid);
654 qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
655 netif_carrier_off(card->dev);
658 case IPA_CMD_STARTLAN:
659 dev_info(&card->gdev->dev,
660 "The link for %s on CHPID 0x%X has been restored\n",
661 QETH_CARD_IFNAME(card), card->info.chpid);
662 if (card->info.hwtrap)
663 card->info.hwtrap = 2;
664 qeth_schedule_recovery(card);
666 case IPA_CMD_SETBRIDGEPORT_IQD:
667 case IPA_CMD_SETBRIDGEPORT_OSA:
668 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
669 if (card->discipline->control_event_handler(card, cmd))
672 case IPA_CMD_MODCCID:
674 case IPA_CMD_REGISTER_LOCAL_ADDR:
675 QETH_CARD_TEXT(card, 3, "irla");
677 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
678 QETH_CARD_TEXT(card, 3, "urla");
681 QETH_DBF_MESSAGE(2, "Received data is IPA but not a reply!\n");
686 void qeth_clear_ipacmd_list(struct qeth_card *card)
688 struct qeth_reply *reply, *r;
691 QETH_CARD_TEXT(card, 4, "clipalst");
693 spin_lock_irqsave(&card->lock, flags);
694 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
695 qeth_get_reply(reply);
697 atomic_inc(&reply->received);
698 list_del_init(&reply->list);
699 wake_up(&reply->wait_q);
700 qeth_put_reply(reply);
702 spin_unlock_irqrestore(&card->lock, flags);
704 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
706 static int qeth_check_idx_response(struct qeth_card *card,
707 unsigned char *buffer)
712 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
713 if ((buffer[2] & 0xc0) == 0xc0) {
714 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#02x\n",
716 QETH_CARD_TEXT(card, 2, "ckidxres");
717 QETH_CARD_TEXT(card, 2, " idxterm");
718 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
719 if (buffer[4] == 0xf6) {
720 dev_err(&card->gdev->dev,
721 "The qeth device is not configured "
722 "for the OSI layer required by z/VM\n");
730 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
734 index = channel->io_buf_no;
736 if (channel->iob[index].state == BUF_STATE_FREE) {
737 channel->iob[index].state = BUF_STATE_LOCKED;
738 channel->io_buf_no = (channel->io_buf_no + 1) %
740 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
741 return channel->iob + index;
743 index = (index + 1) % QETH_CMD_BUFFER_NO;
744 } while (index != channel->io_buf_no);
749 void qeth_release_buffer(struct qeth_channel *channel,
750 struct qeth_cmd_buffer *iob)
754 spin_lock_irqsave(&channel->iob_lock, flags);
755 iob->state = BUF_STATE_FREE;
756 iob->callback = qeth_send_control_data_cb;
758 spin_unlock_irqrestore(&channel->iob_lock, flags);
759 wake_up(&channel->wait_q);
761 EXPORT_SYMBOL_GPL(qeth_release_buffer);
763 static void qeth_release_buffer_cb(struct qeth_card *card,
764 struct qeth_channel *channel,
765 struct qeth_cmd_buffer *iob)
767 qeth_release_buffer(channel, iob);
770 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
772 struct qeth_cmd_buffer *buffer = NULL;
775 spin_lock_irqsave(&channel->iob_lock, flags);
776 buffer = __qeth_get_buffer(channel);
777 spin_unlock_irqrestore(&channel->iob_lock, flags);
781 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
783 struct qeth_cmd_buffer *buffer;
784 wait_event(channel->wait_q,
785 ((buffer = qeth_get_buffer(channel)) != NULL));
788 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
790 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
794 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
795 qeth_release_buffer(channel, &channel->iob[cnt]);
796 channel->io_buf_no = 0;
798 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
800 static void qeth_send_control_data_cb(struct qeth_card *card,
801 struct qeth_channel *channel,
802 struct qeth_cmd_buffer *iob)
804 struct qeth_ipa_cmd *cmd = NULL;
805 struct qeth_reply *reply, *r;
810 QETH_CARD_TEXT(card, 4, "sndctlcb");
811 rc = qeth_check_idx_response(card, iob->data);
816 qeth_clear_ipacmd_list(card);
817 qeth_schedule_recovery(card);
823 if (IS_IPA(iob->data)) {
824 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
825 cmd = qeth_check_ipa_data(card, cmd);
828 if (IS_OSN(card) && card->osn_info.assist_cb &&
829 cmd->hdr.command != IPA_CMD_STARTLAN) {
830 card->osn_info.assist_cb(card->dev, cmd);
834 /* non-IPA commands should only flow during initialization */
835 if (card->state != CARD_STATE_DOWN)
839 spin_lock_irqsave(&card->lock, flags);
840 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
841 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
842 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
843 qeth_get_reply(reply);
844 list_del_init(&reply->list);
845 spin_unlock_irqrestore(&card->lock, flags);
847 if (reply->callback != NULL) {
849 reply->offset = (__u16)((char *)cmd -
851 keep_reply = reply->callback(card,
855 keep_reply = reply->callback(card,
860 reply->rc = (u16) cmd->hdr.return_code;
864 spin_lock_irqsave(&card->lock, flags);
865 list_add_tail(&reply->list,
866 &card->cmd_waiter_list);
867 spin_unlock_irqrestore(&card->lock, flags);
869 atomic_inc(&reply->received);
870 wake_up(&reply->wait_q);
872 qeth_put_reply(reply);
876 spin_unlock_irqrestore(&card->lock, flags);
878 memcpy(&card->seqno.pdu_hdr_ack,
879 QETH_PDU_HEADER_SEQ_NO(iob->data),
881 qeth_release_buffer(channel, iob);
884 static int qeth_set_thread_start_bit(struct qeth_card *card,
885 unsigned long thread)
889 spin_lock_irqsave(&card->thread_mask_lock, flags);
890 if (!(card->thread_allowed_mask & thread) ||
891 (card->thread_start_mask & thread)) {
892 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
895 card->thread_start_mask |= thread;
896 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
900 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
904 spin_lock_irqsave(&card->thread_mask_lock, flags);
905 card->thread_start_mask &= ~thread;
906 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
907 wake_up(&card->wait_q);
909 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
911 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
915 spin_lock_irqsave(&card->thread_mask_lock, flags);
916 card->thread_running_mask &= ~thread;
917 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
918 wake_up_all(&card->wait_q);
920 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
922 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
927 spin_lock_irqsave(&card->thread_mask_lock, flags);
928 if (card->thread_start_mask & thread) {
929 if ((card->thread_allowed_mask & thread) &&
930 !(card->thread_running_mask & thread)) {
932 card->thread_start_mask &= ~thread;
933 card->thread_running_mask |= thread;
937 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
941 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
945 wait_event(card->wait_q,
946 (rc = __qeth_do_run_thread(card, thread)) >= 0);
949 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
951 void qeth_schedule_recovery(struct qeth_card *card)
953 QETH_CARD_TEXT(card, 2, "startrec");
954 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
955 schedule_work(&card->kernel_thread_starter);
957 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
959 static int qeth_get_problem(struct qeth_card *card, struct ccw_device *cdev,
965 sense = (char *) irb->ecw;
966 cstat = irb->scsw.cmd.cstat;
967 dstat = irb->scsw.cmd.dstat;
969 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
970 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
971 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
972 QETH_CARD_TEXT(card, 2, "CGENCHK");
973 dev_warn(&cdev->dev, "The qeth device driver "
974 "failed to recover an error on the device\n");
975 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
976 dev_name(&cdev->dev), dstat, cstat);
977 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
982 if (dstat & DEV_STAT_UNIT_CHECK) {
983 if (sense[SENSE_RESETTING_EVENT_BYTE] &
984 SENSE_RESETTING_EVENT_FLAG) {
985 QETH_CARD_TEXT(card, 2, "REVIND");
988 if (sense[SENSE_COMMAND_REJECT_BYTE] &
989 SENSE_COMMAND_REJECT_FLAG) {
990 QETH_CARD_TEXT(card, 2, "CMDREJi");
993 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
994 QETH_CARD_TEXT(card, 2, "AFFE");
997 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
998 QETH_CARD_TEXT(card, 2, "ZEROSEN");
1001 QETH_CARD_TEXT(card, 2, "DGENCHK");
1007 static long qeth_check_irb_error(struct qeth_card *card,
1008 struct ccw_device *cdev, unsigned long intparm,
1014 switch (PTR_ERR(irb)) {
1016 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1017 dev_name(&cdev->dev));
1018 QETH_CARD_TEXT(card, 2, "ckirberr");
1019 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
1022 dev_warn(&cdev->dev, "A hardware operation timed out"
1023 " on the device\n");
1024 QETH_CARD_TEXT(card, 2, "ckirberr");
1025 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
1026 if (intparm == QETH_RCD_PARM) {
1027 if (card->data.ccwdev == cdev) {
1028 card->data.state = CH_STATE_DOWN;
1029 wake_up(&card->wait_q);
1034 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1035 dev_name(&cdev->dev), PTR_ERR(irb));
1036 QETH_CARD_TEXT(card, 2, "ckirberr");
1037 QETH_CARD_TEXT(card, 2, " rc???");
1039 return PTR_ERR(irb);
1042 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1047 struct qeth_cmd_buffer *iob = NULL;
1048 struct ccwgroup_device *gdev;
1049 struct qeth_channel *channel;
1050 struct qeth_card *card;
1052 /* while we hold the ccwdev lock, this stays valid: */
1053 gdev = dev_get_drvdata(&cdev->dev);
1054 card = dev_get_drvdata(&gdev->dev);
1058 QETH_CARD_TEXT(card, 5, "irq");
1060 if (card->read.ccwdev == cdev) {
1061 channel = &card->read;
1062 QETH_CARD_TEXT(card, 5, "read");
1063 } else if (card->write.ccwdev == cdev) {
1064 channel = &card->write;
1065 QETH_CARD_TEXT(card, 5, "write");
1067 channel = &card->data;
1068 QETH_CARD_TEXT(card, 5, "data");
1071 if (qeth_intparm_is_iob(intparm))
1072 iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1074 if (qeth_check_irb_error(card, cdev, intparm, irb)) {
1075 /* IO was terminated, free its resources. */
1077 qeth_release_buffer(iob->channel, iob);
1078 atomic_set(&channel->irq_pending, 0);
1079 wake_up(&card->wait_q);
1083 atomic_set(&channel->irq_pending, 0);
1085 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1086 channel->state = CH_STATE_STOPPED;
1088 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1089 channel->state = CH_STATE_HALTED;
1091 /*let's wake up immediately on data channel*/
1092 if ((channel == &card->data) && (intparm != 0) &&
1093 (intparm != QETH_RCD_PARM))
1096 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1097 QETH_CARD_TEXT(card, 6, "clrchpar");
1098 /* we don't have to handle this further */
1101 if (intparm == QETH_HALT_CHANNEL_PARM) {
1102 QETH_CARD_TEXT(card, 6, "hltchpar");
1103 /* we don't have to handle this further */
1107 cstat = irb->scsw.cmd.cstat;
1108 dstat = irb->scsw.cmd.dstat;
1110 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1111 (dstat & DEV_STAT_UNIT_CHECK) ||
1113 if (irb->esw.esw0.erw.cons) {
1114 dev_warn(&channel->ccwdev->dev,
1115 "The qeth device driver failed to recover "
1116 "an error on the device\n");
1117 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1118 "0x%X dstat 0x%X\n",
1119 dev_name(&channel->ccwdev->dev), cstat, dstat);
1120 print_hex_dump(KERN_WARNING, "qeth: irb ",
1121 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1122 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1123 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1125 if (intparm == QETH_RCD_PARM) {
1126 channel->state = CH_STATE_DOWN;
1129 rc = qeth_get_problem(card, cdev, irb);
1131 card->read_or_write_problem = 1;
1132 qeth_clear_ipacmd_list(card);
1133 qeth_schedule_recovery(card);
1138 if (intparm == QETH_RCD_PARM) {
1139 channel->state = CH_STATE_RCD_DONE;
1142 if (channel == &card->data)
1144 if (channel == &card->read &&
1145 channel->state == CH_STATE_UP)
1146 __qeth_issue_next_read(card);
1148 if (iob && iob->callback)
1149 iob->callback(card, iob->channel, iob);
1152 wake_up(&card->wait_q);
1156 static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1157 struct qeth_qdio_out_buffer *buf,
1158 enum iucv_tx_notify notification)
1160 struct sk_buff *skb;
1162 skb_queue_walk(&buf->skb_list, skb) {
1163 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1164 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1165 if (skb->protocol == htons(ETH_P_AF_IUCV) && skb->sk)
1166 iucv_sk(skb->sk)->sk_txnotify(skb, notification);
1170 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1172 /* release may never happen from within CQ tasklet scope */
1173 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
1175 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1176 qeth_notify_skbs(buf->q, buf, TX_NOTIFY_GENERALERROR);
1178 __skb_queue_purge(&buf->skb_list);
1181 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1182 struct qeth_qdio_out_buffer *buf)
1186 /* is PCI flag set on buffer? */
1187 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1188 atomic_dec(&queue->set_pci_flags_count);
1190 qeth_release_skbs(buf);
1192 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1193 if (buf->buffer->element[i].addr && buf->is_header[i])
1194 kmem_cache_free(qeth_core_header_cache,
1195 buf->buffer->element[i].addr);
1196 buf->is_header[i] = 0;
1199 qeth_scrub_qdio_buffer(buf->buffer,
1200 QETH_MAX_BUFFER_ELEMENTS(queue->card));
1201 buf->next_element_to_fill = 0;
1202 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
1205 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1209 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1212 qeth_cleanup_handled_pending(q, j, 1);
1213 qeth_clear_output_buffer(q, q->bufs[j]);
1215 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1221 void qeth_clear_qdio_buffers(struct qeth_card *card)
1225 QETH_CARD_TEXT(card, 2, "clearqdbf");
1226 /* clear outbound buffers to free skbs */
1227 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1228 if (card->qdio.out_qs[i]) {
1229 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1233 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1235 static void qeth_free_buffer_pool(struct qeth_card *card)
1237 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1239 list_for_each_entry_safe(pool_entry, tmp,
1240 &card->qdio.init_pool.entry_list, init_list){
1241 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1242 free_page((unsigned long)pool_entry->elements[i]);
1243 list_del(&pool_entry->init_list);
1248 static void qeth_clean_channel(struct qeth_channel *channel)
1250 struct ccw_device *cdev = channel->ccwdev;
1253 QETH_DBF_TEXT(SETUP, 2, "freech");
1255 spin_lock_irq(get_ccwdev_lock(cdev));
1256 cdev->handler = NULL;
1257 spin_unlock_irq(get_ccwdev_lock(cdev));
1259 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1260 kfree(channel->iob[cnt].data);
1261 kfree(channel->ccw);
1264 static int qeth_setup_channel(struct qeth_channel *channel, bool alloc_buffers)
1266 struct ccw_device *cdev = channel->ccwdev;
1269 QETH_DBF_TEXT(SETUP, 2, "setupch");
1271 channel->ccw = kmalloc(sizeof(struct ccw1), GFP_KERNEL | GFP_DMA);
1274 channel->state = CH_STATE_DOWN;
1275 atomic_set(&channel->irq_pending, 0);
1276 init_waitqueue_head(&channel->wait_q);
1278 spin_lock_irq(get_ccwdev_lock(cdev));
1279 cdev->handler = qeth_irq;
1280 spin_unlock_irq(get_ccwdev_lock(cdev));
1285 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
1286 channel->iob[cnt].data = kmalloc(QETH_BUFSIZE,
1287 GFP_KERNEL | GFP_DMA);
1288 if (channel->iob[cnt].data == NULL)
1290 channel->iob[cnt].state = BUF_STATE_FREE;
1291 channel->iob[cnt].channel = channel;
1292 channel->iob[cnt].callback = qeth_send_control_data_cb;
1293 channel->iob[cnt].rc = 0;
1295 if (cnt < QETH_CMD_BUFFER_NO) {
1296 qeth_clean_channel(channel);
1299 channel->io_buf_no = 0;
1300 spin_lock_init(&channel->iob_lock);
1305 static void qeth_set_single_write_queues(struct qeth_card *card)
1307 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1308 (card->qdio.no_out_queues == 4))
1309 qeth_free_qdio_buffers(card);
1311 card->qdio.no_out_queues = 1;
1312 if (card->qdio.default_out_queue != 0)
1313 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1315 card->qdio.default_out_queue = 0;
1318 static void qeth_set_multiple_write_queues(struct qeth_card *card)
1320 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1321 (card->qdio.no_out_queues == 1)) {
1322 qeth_free_qdio_buffers(card);
1323 card->qdio.default_out_queue = 2;
1325 card->qdio.no_out_queues = 4;
1328 static void qeth_update_from_chp_desc(struct qeth_card *card)
1330 struct ccw_device *ccwdev;
1331 struct channel_path_desc_fmt0 *chp_dsc;
1333 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1335 ccwdev = card->data.ccwdev;
1336 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1340 card->info.func_level = 0x4100 + chp_dsc->desc;
1341 if (card->info.type == QETH_CARD_TYPE_IQD)
1344 /* CHPP field bit 6 == 1 -> single queue */
1345 if ((chp_dsc->chpp & 0x02) == 0x02)
1346 qeth_set_single_write_queues(card);
1348 qeth_set_multiple_write_queues(card);
1351 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1352 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1355 static void qeth_init_qdio_info(struct qeth_card *card)
1357 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1358 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1359 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1360 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1361 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1364 card->qdio.no_in_queues = 1;
1365 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1366 if (card->info.type == QETH_CARD_TYPE_IQD)
1367 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1369 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1370 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1371 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1372 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1375 static void qeth_set_initial_options(struct qeth_card *card)
1377 card->options.route4.type = NO_ROUTER;
1378 card->options.route6.type = NO_ROUTER;
1379 card->options.rx_sg_cb = QETH_RX_SG_CB;
1380 card->options.isolation = ISOLATION_MODE_NONE;
1381 card->options.cq = QETH_CQ_DISABLED;
1382 card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
1385 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1387 unsigned long flags;
1390 spin_lock_irqsave(&card->thread_mask_lock, flags);
1391 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1392 (u8) card->thread_start_mask,
1393 (u8) card->thread_allowed_mask,
1394 (u8) card->thread_running_mask);
1395 rc = (card->thread_start_mask & thread);
1396 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1400 static void qeth_start_kernel_thread(struct work_struct *work)
1402 struct task_struct *ts;
1403 struct qeth_card *card = container_of(work, struct qeth_card,
1404 kernel_thread_starter);
1405 QETH_CARD_TEXT(card , 2, "strthrd");
1407 if (card->read.state != CH_STATE_UP &&
1408 card->write.state != CH_STATE_UP)
1410 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1411 ts = kthread_run(card->discipline->recover, (void *)card,
1414 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1415 qeth_clear_thread_running_bit(card,
1416 QETH_RECOVER_THREAD);
1421 static void qeth_buffer_reclaim_work(struct work_struct *);
1422 static void qeth_setup_card(struct qeth_card *card)
1424 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1425 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1427 card->info.type = CARD_RDEV(card)->id.driver_info;
1428 card->state = CARD_STATE_DOWN;
1429 spin_lock_init(&card->mclock);
1430 spin_lock_init(&card->lock);
1431 spin_lock_init(&card->ip_lock);
1432 spin_lock_init(&card->thread_mask_lock);
1433 mutex_init(&card->conf_mutex);
1434 mutex_init(&card->discipline_mutex);
1435 mutex_init(&card->vid_list_mutex);
1436 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1437 INIT_LIST_HEAD(&card->cmd_waiter_list);
1438 init_waitqueue_head(&card->wait_q);
1439 qeth_set_initial_options(card);
1440 /* IP address takeover */
1441 INIT_LIST_HEAD(&card->ipato.entries);
1442 qeth_init_qdio_info(card);
1443 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
1444 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
1447 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1449 struct qeth_card *card = container_of(slr, struct qeth_card,
1450 qeth_service_level);
1451 if (card->info.mcl_level[0])
1452 seq_printf(m, "qeth: %s firmware level %s\n",
1453 CARD_BUS_ID(card), card->info.mcl_level);
1456 static struct qeth_card *qeth_alloc_card(struct ccwgroup_device *gdev)
1458 struct qeth_card *card;
1460 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1461 card = kzalloc(sizeof(*card), GFP_KERNEL);
1464 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1467 dev_set_drvdata(&gdev->dev, card);
1468 CARD_RDEV(card) = gdev->cdev[0];
1469 CARD_WDEV(card) = gdev->cdev[1];
1470 CARD_DDEV(card) = gdev->cdev[2];
1471 if (qeth_setup_channel(&card->read, true))
1473 if (qeth_setup_channel(&card->write, true))
1475 if (qeth_setup_channel(&card->data, false))
1477 card->qeth_service_level.seq_print = qeth_core_sl_print;
1478 register_service_level(&card->qeth_service_level);
1482 qeth_clean_channel(&card->write);
1484 qeth_clean_channel(&card->read);
1486 dev_set_drvdata(&gdev->dev, NULL);
1492 static int qeth_clear_channel(struct qeth_card *card,
1493 struct qeth_channel *channel)
1497 QETH_CARD_TEXT(card, 3, "clearch");
1498 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
1499 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1500 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
1504 rc = wait_event_interruptible_timeout(card->wait_q,
1505 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1506 if (rc == -ERESTARTSYS)
1508 if (channel->state != CH_STATE_STOPPED)
1510 channel->state = CH_STATE_DOWN;
1514 static int qeth_halt_channel(struct qeth_card *card,
1515 struct qeth_channel *channel)
1519 QETH_CARD_TEXT(card, 3, "haltch");
1520 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
1521 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1522 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
1526 rc = wait_event_interruptible_timeout(card->wait_q,
1527 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1528 if (rc == -ERESTARTSYS)
1530 if (channel->state != CH_STATE_HALTED)
1535 static int qeth_halt_channels(struct qeth_card *card)
1537 int rc1 = 0, rc2 = 0, rc3 = 0;
1539 QETH_CARD_TEXT(card, 3, "haltchs");
1540 rc1 = qeth_halt_channel(card, &card->read);
1541 rc2 = qeth_halt_channel(card, &card->write);
1542 rc3 = qeth_halt_channel(card, &card->data);
1550 static int qeth_clear_channels(struct qeth_card *card)
1552 int rc1 = 0, rc2 = 0, rc3 = 0;
1554 QETH_CARD_TEXT(card, 3, "clearchs");
1555 rc1 = qeth_clear_channel(card, &card->read);
1556 rc2 = qeth_clear_channel(card, &card->write);
1557 rc3 = qeth_clear_channel(card, &card->data);
1565 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1569 QETH_CARD_TEXT(card, 3, "clhacrd");
1572 rc = qeth_halt_channels(card);
1575 return qeth_clear_channels(card);
1578 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1582 QETH_CARD_TEXT(card, 3, "qdioclr");
1583 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1584 QETH_QDIO_CLEANING)) {
1585 case QETH_QDIO_ESTABLISHED:
1586 if (card->info.type == QETH_CARD_TYPE_IQD)
1587 rc = qdio_shutdown(CARD_DDEV(card),
1588 QDIO_FLAG_CLEANUP_USING_HALT);
1590 rc = qdio_shutdown(CARD_DDEV(card),
1591 QDIO_FLAG_CLEANUP_USING_CLEAR);
1593 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1594 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1596 case QETH_QDIO_CLEANING:
1601 rc = qeth_clear_halt_card(card, use_halt);
1603 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1604 card->state = CARD_STATE_DOWN;
1607 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1609 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1615 struct qeth_channel *channel = &card->data;
1618 * scan for RCD command in extended SenseID data
1620 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1621 if (!ciw || ciw->cmd == 0)
1623 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1627 qeth_setup_ccw(channel->ccw, ciw->cmd, ciw->count, rcd_buf);
1628 channel->state = CH_STATE_RCD;
1629 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
1630 ret = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
1631 QETH_RCD_PARM, LPM_ANYPATH, 0,
1633 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
1635 wait_event(card->wait_q,
1636 (channel->state == CH_STATE_RCD_DONE ||
1637 channel->state == CH_STATE_DOWN));
1638 if (channel->state == CH_STATE_DOWN)
1641 channel->state = CH_STATE_DOWN;
1647 *length = ciw->count;
1653 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1655 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1656 card->info.chpid = prcd[30];
1657 card->info.unit_addr2 = prcd[31];
1658 card->info.cula = prcd[63];
1659 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1660 (prcd[0x11] == _ascebc['M']));
1663 static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
1665 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1666 struct diag26c_vnic_resp *response = NULL;
1667 struct diag26c_vnic_req *request = NULL;
1668 struct ccw_dev_id id;
1672 QETH_DBF_TEXT(SETUP, 2, "vmlayer");
1674 cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
1678 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
1679 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
1680 if (!request || !response) {
1685 ccw_device_get_id(CARD_RDEV(card), &id);
1686 request->resp_buf_len = sizeof(*response);
1687 request->resp_version = DIAG26C_VERSION6_VM65918;
1688 request->req_format = DIAG26C_VNIC_INFO;
1690 memcpy(&request->sys_name, userid, 8);
1691 request->devno = id.devno;
1693 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1694 rc = diag26c(request, response, DIAG26C_PORT_VNIC);
1695 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1698 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
1700 if (request->resp_buf_len < sizeof(*response) ||
1701 response->version != request->resp_version) {
1706 if (response->protocol == VNIC_INFO_PROT_L2)
1707 disc = QETH_DISCIPLINE_LAYER2;
1708 else if (response->protocol == VNIC_INFO_PROT_L3)
1709 disc = QETH_DISCIPLINE_LAYER3;
1715 QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
1719 /* Determine whether the device requires a specific layer discipline */
1720 static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1722 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1724 if (card->info.type == QETH_CARD_TYPE_OSM ||
1725 card->info.type == QETH_CARD_TYPE_OSN)
1726 disc = QETH_DISCIPLINE_LAYER2;
1727 else if (card->info.guestlan)
1728 disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
1729 QETH_DISCIPLINE_LAYER3 :
1730 qeth_vm_detect_layer(card);
1733 case QETH_DISCIPLINE_LAYER2:
1734 QETH_DBF_TEXT(SETUP, 3, "force l2");
1736 case QETH_DISCIPLINE_LAYER3:
1737 QETH_DBF_TEXT(SETUP, 3, "force l3");
1740 QETH_DBF_TEXT(SETUP, 3, "force no");
1746 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1748 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1750 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1751 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
1752 card->info.blkt.time_total = 0;
1753 card->info.blkt.inter_packet = 0;
1754 card->info.blkt.inter_packet_jumbo = 0;
1756 card->info.blkt.time_total = 250;
1757 card->info.blkt.inter_packet = 5;
1758 card->info.blkt.inter_packet_jumbo = 15;
1762 static void qeth_init_tokens(struct qeth_card *card)
1764 card->token.issuer_rm_w = 0x00010103UL;
1765 card->token.cm_filter_w = 0x00010108UL;
1766 card->token.cm_connection_w = 0x0001010aUL;
1767 card->token.ulp_filter_w = 0x0001010bUL;
1768 card->token.ulp_connection_w = 0x0001010dUL;
1771 static void qeth_init_func_level(struct qeth_card *card)
1773 switch (card->info.type) {
1774 case QETH_CARD_TYPE_IQD:
1775 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1777 case QETH_CARD_TYPE_OSD:
1778 case QETH_CARD_TYPE_OSN:
1779 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1786 static int qeth_idx_activate_get_answer(struct qeth_card *card,
1787 struct qeth_channel *channel,
1788 void (*reply_cb)(struct qeth_card *,
1789 struct qeth_channel *,
1790 struct qeth_cmd_buffer *))
1792 struct qeth_cmd_buffer *iob;
1795 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1796 iob = qeth_get_buffer(channel);
1799 iob->callback = reply_cb;
1800 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
1802 wait_event(card->wait_q,
1803 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1804 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1805 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
1806 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
1807 (addr_t) iob, 0, 0, QETH_TIMEOUT);
1808 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
1811 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1812 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1813 atomic_set(&channel->irq_pending, 0);
1814 wake_up(&card->wait_q);
1817 rc = wait_event_interruptible_timeout(card->wait_q,
1818 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1819 if (rc == -ERESTARTSYS)
1821 if (channel->state != CH_STATE_UP) {
1823 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1829 static int qeth_idx_activate_channel(struct qeth_card *card,
1830 struct qeth_channel *channel,
1831 void (*reply_cb)(struct qeth_card *,
1832 struct qeth_channel *,
1833 struct qeth_cmd_buffer *))
1835 struct qeth_cmd_buffer *iob;
1839 struct ccw_dev_id temp_devid;
1841 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1843 iob = qeth_get_buffer(channel);
1846 iob->callback = reply_cb;
1847 qeth_setup_ccw(channel->ccw, CCW_CMD_WRITE, IDX_ACTIVATE_SIZE,
1849 if (channel == &card->write) {
1850 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1851 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1852 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1853 card->seqno.trans_hdr++;
1855 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1856 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1857 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1859 tmp = ((u8)card->dev->dev_port) | 0x80;
1860 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1861 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1862 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1863 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1864 &card->info.func_level, sizeof(__u16));
1865 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1866 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1867 temp = (card->info.cula << 8) + card->info.unit_addr2;
1868 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1870 wait_event(card->wait_q,
1871 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1872 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1873 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
1874 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
1875 (addr_t) iob, 0, 0, QETH_TIMEOUT);
1876 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
1879 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1881 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1882 atomic_set(&channel->irq_pending, 0);
1883 wake_up(&card->wait_q);
1886 rc = wait_event_interruptible_timeout(card->wait_q,
1887 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1888 if (rc == -ERESTARTSYS)
1890 if (channel->state != CH_STATE_ACTIVATING) {
1891 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1892 " failed to recover an error on the device\n");
1893 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1894 dev_name(&channel->ccwdev->dev));
1895 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1898 return qeth_idx_activate_get_answer(card, channel, reply_cb);
1901 static int qeth_peer_func_level(int level)
1903 if ((level & 0xff) == 8)
1904 return (level & 0xff) + 0x400;
1905 if (((level >> 8) & 3) == 1)
1906 return (level & 0xff) + 0x200;
1910 static void qeth_idx_write_cb(struct qeth_card *card,
1911 struct qeth_channel *channel,
1912 struct qeth_cmd_buffer *iob)
1916 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1918 if (channel->state == CH_STATE_DOWN) {
1919 channel->state = CH_STATE_ACTIVATING;
1923 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1924 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1925 dev_err(&channel->ccwdev->dev,
1926 "The adapter is used exclusively by another "
1929 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1930 " negative reply\n",
1931 dev_name(&channel->ccwdev->dev));
1934 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1935 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1936 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1937 "function level mismatch (sent: 0x%x, received: "
1938 "0x%x)\n", dev_name(&channel->ccwdev->dev),
1939 card->info.func_level, temp);
1942 channel->state = CH_STATE_UP;
1944 qeth_release_buffer(channel, iob);
1947 static void qeth_idx_read_cb(struct qeth_card *card,
1948 struct qeth_channel *channel,
1949 struct qeth_cmd_buffer *iob)
1953 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1954 if (channel->state == CH_STATE_DOWN) {
1955 channel->state = CH_STATE_ACTIVATING;
1959 if (qeth_check_idx_response(card, iob->data))
1962 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1963 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1964 case QETH_IDX_ACT_ERR_EXCL:
1965 dev_err(&channel->ccwdev->dev,
1966 "The adapter is used exclusively by another "
1969 case QETH_IDX_ACT_ERR_AUTH:
1970 case QETH_IDX_ACT_ERR_AUTH_USER:
1971 dev_err(&channel->ccwdev->dev,
1972 "Setting the device online failed because of "
1973 "insufficient authorization\n");
1976 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1977 " negative reply\n",
1978 dev_name(&channel->ccwdev->dev));
1980 QETH_CARD_TEXT_(card, 2, "idxread%c",
1981 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1985 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1986 if (temp != qeth_peer_func_level(card->info.func_level)) {
1987 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1988 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1989 dev_name(&channel->ccwdev->dev),
1990 card->info.func_level, temp);
1993 memcpy(&card->token.issuer_rm_r,
1994 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1995 QETH_MPC_TOKEN_LENGTH);
1996 memcpy(&card->info.mcl_level[0],
1997 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1998 channel->state = CH_STATE_UP;
2000 qeth_release_buffer(channel, iob);
2003 void qeth_prepare_control_data(struct qeth_card *card, int len,
2004 struct qeth_cmd_buffer *iob)
2006 qeth_setup_ccw(iob->channel->ccw, CCW_CMD_WRITE, len, iob->data);
2007 iob->callback = qeth_release_buffer_cb;
2009 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2010 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2011 card->seqno.trans_hdr++;
2012 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2013 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2014 card->seqno.pdu_hdr++;
2015 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2016 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
2017 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
2019 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2022 * qeth_send_control_data() - send control command to the card
2023 * @card: qeth_card structure pointer
2024 * @len: size of the command buffer
2025 * @iob: qeth_cmd_buffer pointer
2026 * @reply_cb: callback function pointer
2027 * @cb_card: pointer to the qeth_card structure
2028 * @cb_reply: pointer to the qeth_reply structure
2029 * @cb_cmd: pointer to the original iob for non-IPA
2030 * commands, or to the qeth_ipa_cmd structure
2031 * for the IPA commands.
2032 * @reply_param: private pointer passed to the callback
2034 * Returns the value of the `return_code' field of the response
2035 * block returned from the hardware, or other error indication.
2036 * Value of zero indicates successful execution of the command.
2038 * Callback function gets called one or more times, with cb_cmd
2039 * pointing to the response returned by the hardware. Callback
2040 * function must return non-zero if more reply blocks are expected,
2041 * and zero if the last or only reply block is received. Callback
2042 * function can get the value of the reply_param pointer from the
2043 * field 'param' of the structure qeth_reply.
2046 int qeth_send_control_data(struct qeth_card *card, int len,
2047 struct qeth_cmd_buffer *iob,
2048 int (*reply_cb)(struct qeth_card *cb_card,
2049 struct qeth_reply *cb_reply,
2050 unsigned long cb_cmd),
2053 struct qeth_channel *channel = iob->channel;
2055 struct qeth_reply *reply = NULL;
2056 unsigned long timeout, event_timeout;
2057 struct qeth_ipa_cmd *cmd = NULL;
2059 QETH_CARD_TEXT(card, 2, "sendctl");
2061 if (card->read_or_write_problem) {
2062 qeth_release_buffer(channel, iob);
2065 reply = qeth_alloc_reply(card);
2069 reply->callback = reply_cb;
2070 reply->param = reply_param;
2072 init_waitqueue_head(&reply->wait_q);
2074 while (atomic_cmpxchg(&channel->irq_pending, 0, 1)) ;
2076 if (IS_IPA(iob->data)) {
2077 cmd = __ipa_cmd(iob);
2078 cmd->hdr.seqno = card->seqno.ipa++;
2079 reply->seqno = cmd->hdr.seqno;
2080 event_timeout = QETH_IPA_TIMEOUT;
2082 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2083 event_timeout = QETH_TIMEOUT;
2085 qeth_prepare_control_data(card, len, iob);
2087 spin_lock_irq(&card->lock);
2088 list_add_tail(&reply->list, &card->cmd_waiter_list);
2089 spin_unlock_irq(&card->lock);
2091 timeout = jiffies + event_timeout;
2093 QETH_CARD_TEXT(card, 6, "noirqpnd");
2094 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
2095 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
2096 (addr_t) iob, 0, 0, event_timeout);
2097 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
2099 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2100 "ccw_device_start rc = %i\n",
2101 dev_name(&channel->ccwdev->dev), rc);
2102 QETH_CARD_TEXT_(card, 2, " err%d", rc);
2103 spin_lock_irq(&card->lock);
2104 list_del_init(&reply->list);
2105 qeth_put_reply(reply);
2106 spin_unlock_irq(&card->lock);
2107 qeth_release_buffer(channel, iob);
2108 atomic_set(&channel->irq_pending, 0);
2109 wake_up(&card->wait_q);
2113 /* we have only one long running ipassist, since we can ensure
2114 process context of this command we can sleep */
2115 if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
2116 cmd->hdr.prot_version == QETH_PROT_IPV4) {
2117 if (!wait_event_timeout(reply->wait_q,
2118 atomic_read(&reply->received), event_timeout))
2121 while (!atomic_read(&reply->received)) {
2122 if (time_after(jiffies, timeout))
2129 qeth_put_reply(reply);
2134 spin_lock_irq(&card->lock);
2135 list_del_init(&reply->list);
2136 spin_unlock_irq(&card->lock);
2137 atomic_inc(&reply->received);
2139 qeth_put_reply(reply);
2142 EXPORT_SYMBOL_GPL(qeth_send_control_data);
2144 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2147 struct qeth_cmd_buffer *iob;
2149 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2151 iob = (struct qeth_cmd_buffer *) data;
2152 memcpy(&card->token.cm_filter_r,
2153 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2154 QETH_MPC_TOKEN_LENGTH);
2158 static int qeth_cm_enable(struct qeth_card *card)
2161 struct qeth_cmd_buffer *iob;
2163 QETH_DBF_TEXT(SETUP, 2, "cmenable");
2165 iob = qeth_wait_for_buffer(&card->write);
2166 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2167 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2168 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2169 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2170 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2172 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2173 qeth_cm_enable_cb, NULL);
2177 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2180 struct qeth_cmd_buffer *iob;
2182 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2184 iob = (struct qeth_cmd_buffer *) data;
2185 memcpy(&card->token.cm_connection_r,
2186 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2187 QETH_MPC_TOKEN_LENGTH);
2191 static int qeth_cm_setup(struct qeth_card *card)
2194 struct qeth_cmd_buffer *iob;
2196 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2198 iob = qeth_wait_for_buffer(&card->write);
2199 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2200 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2201 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2202 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2203 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2204 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2205 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2206 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2207 qeth_cm_setup_cb, NULL);
2211 static int qeth_update_max_mtu(struct qeth_card *card, unsigned int max_mtu)
2213 struct net_device *dev = card->dev;
2214 unsigned int new_mtu;
2217 /* IQD needs accurate max MTU to set up its RX buffers: */
2220 /* tolerate quirky HW: */
2221 max_mtu = ETH_MAX_MTU;
2226 /* move any device with default MTU to new max MTU: */
2227 new_mtu = (dev->mtu == dev->max_mtu) ? max_mtu : dev->mtu;
2229 /* adjust RX buffer size to new max MTU: */
2230 card->qdio.in_buf_size = max_mtu + 2 * PAGE_SIZE;
2231 if (dev->max_mtu && dev->max_mtu != max_mtu)
2232 qeth_free_qdio_buffers(card);
2236 /* default MTUs for first setup: */
2237 else if (IS_LAYER2(card))
2238 new_mtu = ETH_DATA_LEN;
2240 new_mtu = ETH_DATA_LEN - 8; /* allow for LLC + SNAP */
2243 dev->max_mtu = max_mtu;
2244 dev->mtu = min(new_mtu, max_mtu);
2249 static int qeth_get_mtu_outof_framesize(int framesize)
2251 switch (framesize) {
2265 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2268 __u16 mtu, framesize;
2271 struct qeth_cmd_buffer *iob;
2273 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2275 iob = (struct qeth_cmd_buffer *) data;
2276 memcpy(&card->token.ulp_filter_r,
2277 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2278 QETH_MPC_TOKEN_LENGTH);
2279 if (card->info.type == QETH_CARD_TYPE_IQD) {
2280 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2281 mtu = qeth_get_mtu_outof_framesize(framesize);
2283 mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data);
2285 *(u16 *)reply->param = mtu;
2287 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2288 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2290 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2291 card->info.link_type = link_type;
2293 card->info.link_type = 0;
2294 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2298 static u8 qeth_mpc_select_prot_type(struct qeth_card *card)
2301 return QETH_PROT_OSN2;
2302 return IS_LAYER2(card) ? QETH_PROT_LAYER2 : QETH_PROT_TCPIP;
2305 static int qeth_ulp_enable(struct qeth_card *card)
2307 u8 prot_type = qeth_mpc_select_prot_type(card);
2308 struct qeth_cmd_buffer *iob;
2312 /*FIXME: trace view callbacks*/
2313 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2315 iob = qeth_wait_for_buffer(&card->write);
2316 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2318 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = (u8) card->dev->dev_port;
2319 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2320 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2321 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2322 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2323 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2324 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2325 qeth_ulp_enable_cb, &max_mtu);
2328 return qeth_update_max_mtu(card, max_mtu);
2331 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2334 struct qeth_cmd_buffer *iob;
2336 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2338 iob = (struct qeth_cmd_buffer *) data;
2339 memcpy(&card->token.ulp_connection_r,
2340 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2341 QETH_MPC_TOKEN_LENGTH);
2342 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2344 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2345 dev_err(&card->gdev->dev, "A connection could not be "
2346 "established because of an OLM limit\n");
2349 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2353 static int qeth_ulp_setup(struct qeth_card *card)
2357 struct qeth_cmd_buffer *iob;
2358 struct ccw_dev_id dev_id;
2360 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2362 iob = qeth_wait_for_buffer(&card->write);
2363 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2365 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2366 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2367 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2368 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2369 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2370 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2372 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2373 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2374 temp = (card->info.cula << 8) + card->info.unit_addr2;
2375 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2376 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2377 qeth_ulp_setup_cb, NULL);
2381 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2383 struct qeth_qdio_out_buffer *newbuf;
2385 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2389 newbuf->buffer = q->qdio_bufs[bidx];
2390 skb_queue_head_init(&newbuf->skb_list);
2391 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2393 newbuf->next_pending = q->bufs[bidx];
2394 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2395 q->bufs[bidx] = newbuf;
2399 static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2404 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2408 static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2410 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2415 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2422 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2426 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2428 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2429 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2432 QETH_DBF_TEXT(SETUP, 2, "inq");
2433 card->qdio.in_q = qeth_alloc_qdio_queue();
2434 if (!card->qdio.in_q)
2437 /* inbound buffer pool */
2438 if (qeth_alloc_buffer_pool(card))
2443 kcalloc(card->qdio.no_out_queues,
2444 sizeof(struct qeth_qdio_out_q *),
2446 if (!card->qdio.out_qs)
2448 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2449 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
2450 if (!card->qdio.out_qs[i])
2452 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2453 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2454 card->qdio.out_qs[i]->queue_no = i;
2455 /* give outbound qeth_qdio_buffers their qdio_buffers */
2456 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2457 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2458 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2459 goto out_freeoutqbufs;
2464 if (qeth_alloc_cq(card))
2472 kmem_cache_free(qeth_qdio_outbuf_cache,
2473 card->qdio.out_qs[i]->bufs[j]);
2474 card->qdio.out_qs[i]->bufs[j] = NULL;
2478 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
2479 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2481 kfree(card->qdio.out_qs);
2482 card->qdio.out_qs = NULL;
2484 qeth_free_buffer_pool(card);
2486 qeth_free_qdio_queue(card->qdio.in_q);
2487 card->qdio.in_q = NULL;
2489 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2493 static void qeth_free_qdio_buffers(struct qeth_card *card)
2497 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2498 QETH_QDIO_UNINITIALIZED)
2502 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2503 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2504 if (card->qdio.in_q->bufs[j].rx_skb)
2505 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2507 qeth_free_qdio_queue(card->qdio.in_q);
2508 card->qdio.in_q = NULL;
2509 /* inbound buffer pool */
2510 qeth_free_buffer_pool(card);
2511 /* free outbound qdio_qs */
2512 if (card->qdio.out_qs) {
2513 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2514 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2515 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2517 kfree(card->qdio.out_qs);
2518 card->qdio.out_qs = NULL;
2522 static void qeth_create_qib_param_field(struct qeth_card *card,
2526 param_field[0] = _ascebc['P'];
2527 param_field[1] = _ascebc['C'];
2528 param_field[2] = _ascebc['I'];
2529 param_field[3] = _ascebc['T'];
2530 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2531 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2532 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2535 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2538 param_field[16] = _ascebc['B'];
2539 param_field[17] = _ascebc['L'];
2540 param_field[18] = _ascebc['K'];
2541 param_field[19] = _ascebc['T'];
2542 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2543 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2544 *((unsigned int *) (¶m_field[28])) =
2545 card->info.blkt.inter_packet_jumbo;
2548 static int qeth_qdio_activate(struct qeth_card *card)
2550 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2551 return qdio_activate(CARD_DDEV(card));
2554 static int qeth_dm_act(struct qeth_card *card)
2557 struct qeth_cmd_buffer *iob;
2559 QETH_DBF_TEXT(SETUP, 2, "dmact");
2561 iob = qeth_wait_for_buffer(&card->write);
2562 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2564 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2565 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2566 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2567 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2568 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2572 static int qeth_mpc_initialize(struct qeth_card *card)
2576 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2578 rc = qeth_issue_next_read(card);
2580 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2583 rc = qeth_cm_enable(card);
2585 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2588 rc = qeth_cm_setup(card);
2590 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2593 rc = qeth_ulp_enable(card);
2595 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2598 rc = qeth_ulp_setup(card);
2600 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2603 rc = qeth_alloc_qdio_buffers(card);
2605 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2608 rc = qeth_qdio_establish(card);
2610 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2611 qeth_free_qdio_buffers(card);
2614 rc = qeth_qdio_activate(card);
2616 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2619 rc = qeth_dm_act(card);
2621 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2627 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2628 qdio_free(CARD_DDEV(card));
2632 void qeth_print_status_message(struct qeth_card *card)
2634 switch (card->info.type) {
2635 case QETH_CARD_TYPE_OSD:
2636 case QETH_CARD_TYPE_OSM:
2637 case QETH_CARD_TYPE_OSX:
2638 /* VM will use a non-zero first character
2639 * to indicate a HiperSockets like reporting
2640 * of the level OSA sets the first character to zero
2642 if (!card->info.mcl_level[0]) {
2643 sprintf(card->info.mcl_level, "%02x%02x",
2644 card->info.mcl_level[2],
2645 card->info.mcl_level[3]);
2649 case QETH_CARD_TYPE_IQD:
2650 if ((card->info.guestlan) ||
2651 (card->info.mcl_level[0] & 0x80)) {
2652 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2653 card->info.mcl_level[0]];
2654 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2655 card->info.mcl_level[1]];
2656 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2657 card->info.mcl_level[2]];
2658 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2659 card->info.mcl_level[3]];
2660 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2664 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2666 dev_info(&card->gdev->dev,
2667 "Device is a%s card%s%s%s\nwith link type %s.\n",
2668 qeth_get_cardname(card),
2669 (card->info.mcl_level[0]) ? " (level: " : "",
2670 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2671 (card->info.mcl_level[0]) ? ")" : "",
2672 qeth_get_cardname_short(card));
2674 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2676 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2678 struct qeth_buffer_pool_entry *entry;
2680 QETH_CARD_TEXT(card, 5, "inwrklst");
2682 list_for_each_entry(entry,
2683 &card->qdio.init_pool.entry_list, init_list) {
2684 qeth_put_buffer_pool_entry(card, entry);
2688 static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2689 struct qeth_card *card)
2691 struct list_head *plh;
2692 struct qeth_buffer_pool_entry *entry;
2696 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2699 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2700 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2702 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2703 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2709 list_del_init(&entry->list);
2714 /* no free buffer in pool so take first one and swap pages */
2715 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2716 struct qeth_buffer_pool_entry, list);
2717 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2718 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2719 page = alloc_page(GFP_ATOMIC);
2723 free_page((unsigned long)entry->elements[i]);
2724 entry->elements[i] = page_address(page);
2725 if (card->options.performance_stats)
2726 card->perf_stats.sg_alloc_page_rx++;
2730 list_del_init(&entry->list);
2734 static int qeth_init_input_buffer(struct qeth_card *card,
2735 struct qeth_qdio_buffer *buf)
2737 struct qeth_buffer_pool_entry *pool_entry;
2740 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2741 buf->rx_skb = netdev_alloc_skb(card->dev,
2742 QETH_RX_PULL_LEN + ETH_HLEN);
2747 pool_entry = qeth_find_free_buffer_pool_entry(card);
2752 * since the buffer is accessed only from the input_tasklet
2753 * there shouldn't be a need to synchronize; also, since we use
2754 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2758 buf->pool_entry = pool_entry;
2759 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2760 buf->buffer->element[i].length = PAGE_SIZE;
2761 buf->buffer->element[i].addr = pool_entry->elements[i];
2762 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2763 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2765 buf->buffer->element[i].eflags = 0;
2766 buf->buffer->element[i].sflags = 0;
2771 int qeth_init_qdio_queues(struct qeth_card *card)
2776 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2779 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2780 memset(&card->rx, 0, sizeof(struct qeth_rx));
2781 qeth_initialize_working_pool_list(card);
2782 /*give only as many buffers to hardware as we have buffer pool entries*/
2783 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2784 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2785 card->qdio.in_q->next_buf_to_init =
2786 card->qdio.in_buf_pool.buf_count - 1;
2787 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2788 card->qdio.in_buf_pool.buf_count - 1);
2790 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2795 rc = qeth_cq_init(card);
2800 /* outbound queue */
2801 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2802 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2803 QDIO_MAX_BUFFERS_PER_Q);
2804 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2805 qeth_clear_output_buffer(card->qdio.out_qs[i],
2806 card->qdio.out_qs[i]->bufs[j]);
2808 card->qdio.out_qs[i]->card = card;
2809 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2810 card->qdio.out_qs[i]->do_pack = 0;
2811 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2812 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2813 atomic_set(&card->qdio.out_qs[i]->state,
2814 QETH_OUT_Q_UNLOCKED);
2818 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2820 static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2822 switch (link_type) {
2823 case QETH_LINK_TYPE_HSTR:
2830 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2831 struct qeth_ipa_cmd *cmd,
2832 enum qeth_ipa_cmds command,
2833 enum qeth_prot_versions prot)
2835 cmd->hdr.command = command;
2836 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2837 /* cmd->hdr.seqno is set by qeth_send_control_data() */
2838 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2839 cmd->hdr.rel_adapter_no = (u8) card->dev->dev_port;
2840 cmd->hdr.prim_version_no = IS_LAYER2(card) ? 2 : 1;
2841 cmd->hdr.param_count = 1;
2842 cmd->hdr.prot_version = prot;
2845 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2846 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2848 struct qeth_cmd_buffer *iob;
2850 iob = qeth_get_buffer(&card->write);
2852 qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
2854 dev_warn(&card->gdev->dev,
2855 "The qeth driver ran out of channel command buffers\n");
2856 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2857 dev_name(&card->gdev->dev));
2862 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2864 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob)
2866 u8 prot_type = qeth_mpc_select_prot_type(card);
2868 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2869 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2870 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2871 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2873 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2876 * qeth_send_ipa_cmd() - send an IPA command
2878 * See qeth_send_control_data() for explanation of the arguments.
2881 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2882 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2888 QETH_CARD_TEXT(card, 4, "sendipa");
2889 qeth_prepare_ipa_cmd(card, iob);
2890 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2891 iob, reply_cb, reply_param);
2893 qeth_clear_ipacmd_list(card);
2894 qeth_schedule_recovery(card);
2898 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2900 static int qeth_send_startlan(struct qeth_card *card)
2903 struct qeth_cmd_buffer *iob;
2905 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2907 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2910 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2914 static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
2916 if (!cmd->hdr.return_code)
2917 cmd->hdr.return_code =
2918 cmd->data.setadapterparms.hdr.return_code;
2919 return cmd->hdr.return_code;
2922 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2923 struct qeth_reply *reply, unsigned long data)
2925 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
2927 QETH_CARD_TEXT(card, 3, "quyadpcb");
2928 if (qeth_setadpparms_inspect_rc(cmd))
2931 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2932 card->info.link_type =
2933 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2934 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2936 card->options.adp.supported_funcs =
2937 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2941 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2942 __u32 command, __u32 cmdlen)
2944 struct qeth_cmd_buffer *iob;
2945 struct qeth_ipa_cmd *cmd;
2947 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2950 cmd = __ipa_cmd(iob);
2951 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2952 cmd->data.setadapterparms.hdr.command_code = command;
2953 cmd->data.setadapterparms.hdr.used_total = 1;
2954 cmd->data.setadapterparms.hdr.seq_no = 1;
2960 static int qeth_query_setadapterparms(struct qeth_card *card)
2963 struct qeth_cmd_buffer *iob;
2965 QETH_CARD_TEXT(card, 3, "queryadp");
2966 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2967 sizeof(struct qeth_ipacmd_setadpparms));
2970 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2974 static int qeth_query_ipassists_cb(struct qeth_card *card,
2975 struct qeth_reply *reply, unsigned long data)
2977 struct qeth_ipa_cmd *cmd;
2979 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2981 cmd = (struct qeth_ipa_cmd *) data;
2983 switch (cmd->hdr.return_code) {
2984 case IPA_RC_NOTSUPP:
2985 case IPA_RC_L2_UNSUPPORTED_CMD:
2986 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
2987 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
2988 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
2991 if (cmd->hdr.return_code) {
2992 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
2994 dev_name(&card->gdev->dev),
2995 cmd->hdr.return_code);
3000 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3001 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3002 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
3003 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
3004 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3005 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
3007 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3008 "\n", dev_name(&card->gdev->dev));
3012 static int qeth_query_ipassists(struct qeth_card *card,
3013 enum qeth_prot_versions prot)
3016 struct qeth_cmd_buffer *iob;
3018 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3019 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
3022 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3026 static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3027 struct qeth_reply *reply, unsigned long data)
3029 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
3030 struct qeth_query_switch_attributes *attrs;
3031 struct qeth_switch_info *sw_info;
3033 QETH_CARD_TEXT(card, 2, "qswiatcb");
3034 if (qeth_setadpparms_inspect_rc(cmd))
3037 sw_info = (struct qeth_switch_info *)reply->param;
3038 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3039 sw_info->capabilities = attrs->capabilities;
3040 sw_info->settings = attrs->settings;
3041 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3046 int qeth_query_switch_attributes(struct qeth_card *card,
3047 struct qeth_switch_info *sw_info)
3049 struct qeth_cmd_buffer *iob;
3051 QETH_CARD_TEXT(card, 2, "qswiattr");
3052 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3054 if (!netif_carrier_ok(card->dev))
3056 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3057 sizeof(struct qeth_ipacmd_setadpparms_hdr));
3060 return qeth_send_ipa_cmd(card, iob,
3061 qeth_query_switch_attributes_cb, sw_info);
3064 static int qeth_query_setdiagass_cb(struct qeth_card *card,
3065 struct qeth_reply *reply, unsigned long data)
3067 struct qeth_ipa_cmd *cmd;
3070 cmd = (struct qeth_ipa_cmd *)data;
3071 rc = cmd->hdr.return_code;
3073 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3075 card->info.diagass_support = cmd->data.diagass.ext;
3079 static int qeth_query_setdiagass(struct qeth_card *card)
3081 struct qeth_cmd_buffer *iob;
3082 struct qeth_ipa_cmd *cmd;
3084 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3085 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3088 cmd = __ipa_cmd(iob);
3089 cmd->data.diagass.subcmd_len = 16;
3090 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3091 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3094 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3096 unsigned long info = get_zeroed_page(GFP_KERNEL);
3097 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3098 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3099 struct ccw_dev_id ccwid;
3102 tid->chpid = card->info.chpid;
3103 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3104 tid->ssid = ccwid.ssid;
3105 tid->devno = ccwid.devno;