6fa15b2d6fb33ef7353a8e5c3b37fe0f61ab825b
[sfrench/cifs-2.6.git] / drivers / regulator / twl-regulator.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
4  *
5  * Copyright (C) 2008 David Brownell
6  */
7
8 #include <linux/module.h>
9 #include <linux/string.h>
10 #include <linux/slab.h>
11 #include <linux/init.h>
12 #include <linux/err.h>
13 #include <linux/platform_device.h>
14 #include <linux/of.h>
15 #include <linux/of_device.h>
16 #include <linux/regulator/driver.h>
17 #include <linux/regulator/machine.h>
18 #include <linux/regulator/of_regulator.h>
19 #include <linux/mfd/twl.h>
20 #include <linux/delay.h>
21
22 /*
23  * The TWL4030/TW5030/TPS659x0 family chips include power management, a
24  * USB OTG transceiver, an RTC, ADC, PWM, and lots more.  Some versions
25  * include an audio codec, battery charger, and more voltage regulators.
26  * These chips are often used in OMAP-based systems.
27  *
28  * This driver implements software-based resource control for various
29  * voltage regulators.  This is usually augmented with state machine
30  * based control.
31  */
32
33 struct twlreg_info {
34         /* start of regulator's PM_RECEIVER control register bank */
35         u8                      base;
36
37         /* twl resource ID, for resource control state machine */
38         u8                      id;
39
40         /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
41         u8                      table_len;
42         const u16               *table;
43
44         /* State REMAP default configuration */
45         u8                      remap;
46
47         /* used by regulator core */
48         struct regulator_desc   desc;
49
50         /* chip specific features */
51         unsigned long           features;
52
53         /* data passed from board for external get/set voltage */
54         void                    *data;
55 };
56
57
58 /* LDO control registers ... offset is from the base of its register bank.
59  * The first three registers of all power resource banks help hardware to
60  * manage the various resource groups.
61  */
62 /* Common offset in TWL4030/6030 */
63 #define VREG_GRP                0
64 /* TWL4030 register offsets */
65 #define VREG_TYPE               1
66 #define VREG_REMAP              2
67 #define VREG_DEDICATED          3       /* LDO control */
68 #define VREG_VOLTAGE_SMPS_4030  9
69 /* TWL6030 register offsets */
70 #define VREG_TRANS              1
71 #define VREG_STATE              2
72 #define VREG_VOLTAGE            3
73 #define VREG_VOLTAGE_SMPS       4
74
75 static inline int
76 twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
77 {
78         u8 value;
79         int status;
80
81         status = twl_i2c_read_u8(slave_subgp,
82                         &value, info->base + offset);
83         return (status < 0) ? status : value;
84 }
85
86 static inline int
87 twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
88                                                  u8 value)
89 {
90         return twl_i2c_write_u8(slave_subgp,
91                         value, info->base + offset);
92 }
93
94 /*----------------------------------------------------------------------*/
95
96 /* generic power resource operations, which work on all regulators */
97
98 static int twlreg_grp(struct regulator_dev *rdev)
99 {
100         return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
101                                                                  VREG_GRP);
102 }
103
104 /*
105  * Enable/disable regulators by joining/leaving the P1 (processor) group.
106  * We assume nobody else is updating the DEV_GRP registers.
107  */
108 /* definition for 4030 family */
109 #define P3_GRP_4030     BIT(7)          /* "peripherals" */
110 #define P2_GRP_4030     BIT(6)          /* secondary processor, modem, etc */
111 #define P1_GRP_4030     BIT(5)          /* CPU/Linux */
112 /* definition for 6030 family */
113 #define P3_GRP_6030     BIT(2)          /* secondary processor, modem, etc */
114 #define P2_GRP_6030     BIT(1)          /* "peripherals" */
115 #define P1_GRP_6030     BIT(0)          /* CPU/Linux */
116
117 static int twl4030reg_is_enabled(struct regulator_dev *rdev)
118 {
119         int     state = twlreg_grp(rdev);
120
121         if (state < 0)
122                 return state;
123
124         return state & P1_GRP_4030;
125 }
126
127 #define PB_I2C_BUSY     BIT(0)
128 #define PB_I2C_BWEN     BIT(1)
129
130 /* Wait until buffer empty/ready to send a word on power bus. */
131 static int twl4030_wait_pb_ready(void)
132 {
133
134         int     ret;
135         int     timeout = 10;
136         u8      val;
137
138         do {
139                 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
140                                       TWL4030_PM_MASTER_PB_CFG);
141                 if (ret < 0)
142                         return ret;
143
144                 if (!(val & PB_I2C_BUSY))
145                         return 0;
146
147                 mdelay(1);
148                 timeout--;
149         } while (timeout);
150
151         return -ETIMEDOUT;
152 }
153
154 /* Send a word over the powerbus */
155 static int twl4030_send_pb_msg(unsigned msg)
156 {
157         u8      val;
158         int     ret;
159
160         /* save powerbus configuration */
161         ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
162                               TWL4030_PM_MASTER_PB_CFG);
163         if (ret < 0)
164                 return ret;
165
166         /* Enable i2c access to powerbus */
167         ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val | PB_I2C_BWEN,
168                                TWL4030_PM_MASTER_PB_CFG);
169         if (ret < 0)
170                 return ret;
171
172         ret = twl4030_wait_pb_ready();
173         if (ret < 0)
174                 return ret;
175
176         ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg >> 8,
177                                TWL4030_PM_MASTER_PB_WORD_MSB);
178         if (ret < 0)
179                 return ret;
180
181         ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg & 0xff,
182                                TWL4030_PM_MASTER_PB_WORD_LSB);
183         if (ret < 0)
184                 return ret;
185
186         ret = twl4030_wait_pb_ready();
187         if (ret < 0)
188                 return ret;
189
190         /* Restore powerbus configuration */
191         return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val,
192                                 TWL4030_PM_MASTER_PB_CFG);
193 }
194
195 static int twl4030reg_enable(struct regulator_dev *rdev)
196 {
197         struct twlreg_info      *info = rdev_get_drvdata(rdev);
198         int                     grp;
199         int                     ret;
200
201         grp = twlreg_grp(rdev);
202         if (grp < 0)
203                 return grp;
204
205         grp |= P1_GRP_4030;
206
207         ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
208
209         return ret;
210 }
211
212 static int twl4030reg_disable(struct regulator_dev *rdev)
213 {
214         struct twlreg_info      *info = rdev_get_drvdata(rdev);
215         int                     grp;
216         int                     ret;
217
218         grp = twlreg_grp(rdev);
219         if (grp < 0)
220                 return grp;
221
222         grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
223
224         ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
225
226         return ret;
227 }
228
229 static int twl4030reg_get_status(struct regulator_dev *rdev)
230 {
231         int     state = twlreg_grp(rdev);
232
233         if (state < 0)
234                 return state;
235         state &= 0x0f;
236
237         /* assume state != WARM_RESET; we'd not be running...  */
238         if (!state)
239                 return REGULATOR_STATUS_OFF;
240         return (state & BIT(3))
241                 ? REGULATOR_STATUS_NORMAL
242                 : REGULATOR_STATUS_STANDBY;
243 }
244
245 static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
246 {
247         struct twlreg_info      *info = rdev_get_drvdata(rdev);
248         unsigned                message;
249
250         /* We can only set the mode through state machine commands... */
251         switch (mode) {
252         case REGULATOR_MODE_NORMAL:
253                 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
254                 break;
255         case REGULATOR_MODE_STANDBY:
256                 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
257                 break;
258         default:
259                 return -EINVAL;
260         }
261
262         return twl4030_send_pb_msg(message);
263 }
264
265 static inline unsigned int twl4030reg_map_mode(unsigned int mode)
266 {
267         switch (mode) {
268         case RES_STATE_ACTIVE:
269                 return REGULATOR_MODE_NORMAL;
270         case RES_STATE_SLEEP:
271                 return REGULATOR_MODE_STANDBY;
272         default:
273                 return REGULATOR_MODE_INVALID;
274         }
275 }
276
277 /*----------------------------------------------------------------------*/
278
279 /*
280  * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
281  * select field in its control register.   We use tables indexed by VSEL
282  * to record voltages in milliVolts.  (Accuracy is about three percent.)
283  *
284  * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
285  * currently handled by listing two slightly different VAUX2 regulators,
286  * only one of which will be configured.
287  *
288  * VSEL values documented as "TI cannot support these values" are flagged
289  * in these tables as UNSUP() values; we normally won't assign them.
290  *
291  * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
292  * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
293  */
294 #define UNSUP_MASK      0x8000
295
296 #define UNSUP(x)        (UNSUP_MASK | (x))
297 #define IS_UNSUP(info, x)                       \
298         ((UNSUP_MASK & (x)) &&                  \
299          !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
300 #define LDO_MV(x)       (~UNSUP_MASK & (x))
301
302
303 static const u16 VAUX1_VSEL_table[] = {
304         UNSUP(1500), UNSUP(1800), 2500, 2800,
305         3000, 3000, 3000, 3000,
306 };
307 static const u16 VAUX2_4030_VSEL_table[] = {
308         UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
309         1500, 1800, UNSUP(1850), 2500,
310         UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
311         UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
312 };
313 static const u16 VAUX2_VSEL_table[] = {
314         1700, 1700, 1900, 1300,
315         1500, 1800, 2000, 2500,
316         2100, 2800, 2200, 2300,
317         2400, 2400, 2400, 2400,
318 };
319 static const u16 VAUX3_VSEL_table[] = {
320         1500, 1800, 2500, 2800,
321         3000, 3000, 3000, 3000,
322 };
323 static const u16 VAUX4_VSEL_table[] = {
324         700, 1000, 1200, UNSUP(1300),
325         1500, 1800, UNSUP(1850), 2500,
326         UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
327         UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
328 };
329 static const u16 VMMC1_VSEL_table[] = {
330         1850, 2850, 3000, 3150,
331 };
332 static const u16 VMMC2_VSEL_table[] = {
333         UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
334         UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
335         2600, 2800, 2850, 3000,
336         3150, 3150, 3150, 3150,
337 };
338 static const u16 VPLL1_VSEL_table[] = {
339         1000, 1200, 1300, 1800,
340         UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
341 };
342 static const u16 VPLL2_VSEL_table[] = {
343         700, 1000, 1200, 1300,
344         UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
345         UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
346         UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
347 };
348 static const u16 VSIM_VSEL_table[] = {
349         UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
350         2800, 3000, 3000, 3000,
351 };
352 static const u16 VDAC_VSEL_table[] = {
353         1200, 1300, 1800, 1800,
354 };
355 static const u16 VIO_VSEL_table[] = {
356         1800, 1850,
357 };
358 static const u16 VINTANA2_VSEL_table[] = {
359         2500, 2750,
360 };
361
362 static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
363 {
364         struct twlreg_info      *info = rdev_get_drvdata(rdev);
365         int                     mV = info->table[index];
366
367         return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);
368 }
369
370 static int
371 twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
372 {
373         struct twlreg_info      *info = rdev_get_drvdata(rdev);
374
375         return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
376                             selector);
377 }
378
379 static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev)
380 {
381         struct twlreg_info      *info = rdev_get_drvdata(rdev);
382         int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
383
384         if (vsel < 0)
385                 return vsel;
386
387         vsel &= info->table_len - 1;
388         return vsel;
389 }
390
391 static const struct regulator_ops twl4030ldo_ops = {
392         .list_voltage   = twl4030ldo_list_voltage,
393
394         .set_voltage_sel = twl4030ldo_set_voltage_sel,
395         .get_voltage_sel = twl4030ldo_get_voltage_sel,
396
397         .enable         = twl4030reg_enable,
398         .disable        = twl4030reg_disable,
399         .is_enabled     = twl4030reg_is_enabled,
400
401         .set_mode       = twl4030reg_set_mode,
402
403         .get_status     = twl4030reg_get_status,
404 };
405
406 static int
407 twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
408                         unsigned *selector)
409 {
410         struct twlreg_info *info = rdev_get_drvdata(rdev);
411         int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
412
413         twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS_4030, vsel);
414
415         return 0;
416 }
417
418 static int twl4030smps_get_voltage(struct regulator_dev *rdev)
419 {
420         struct twlreg_info *info = rdev_get_drvdata(rdev);
421         int vsel;
422
423         vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
424                 VREG_VOLTAGE_SMPS_4030);
425
426         return vsel * 12500 + 600000;
427 }
428
429 static const struct regulator_ops twl4030smps_ops = {
430         .set_voltage    = twl4030smps_set_voltage,
431         .get_voltage    = twl4030smps_get_voltage,
432 };
433
434 /*----------------------------------------------------------------------*/
435
436 static const struct regulator_ops twl4030fixed_ops = {
437         .list_voltage   = regulator_list_voltage_linear,
438
439         .enable         = twl4030reg_enable,
440         .disable        = twl4030reg_disable,
441         .is_enabled     = twl4030reg_is_enabled,
442
443         .set_mode       = twl4030reg_set_mode,
444
445         .get_status     = twl4030reg_get_status,
446 };
447
448 /*----------------------------------------------------------------------*/
449
450 #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
451 static const struct twlreg_info TWL4030_INFO_##label = { \
452         .base = offset, \
453         .id = num, \
454         .table_len = ARRAY_SIZE(label##_VSEL_table), \
455         .table = label##_VSEL_table, \
456         .remap = remap_conf, \
457         .desc = { \
458                 .name = #label, \
459                 .id = TWL4030_REG_##label, \
460                 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
461                 .ops = &twl4030ldo_ops, \
462                 .type = REGULATOR_VOLTAGE, \
463                 .owner = THIS_MODULE, \
464                 .enable_time = turnon_delay, \
465                 .of_map_mode = twl4030reg_map_mode, \
466                 }, \
467         }
468
469 #define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
470 static const struct twlreg_info TWL4030_INFO_##label = { \
471         .base = offset, \
472         .id = num, \
473         .remap = remap_conf, \
474         .desc = { \
475                 .name = #label, \
476                 .id = TWL4030_REG_##label, \
477                 .ops = &twl4030smps_ops, \
478                 .type = REGULATOR_VOLTAGE, \
479                 .owner = THIS_MODULE, \
480                 .enable_time = turnon_delay, \
481                 .of_map_mode = twl4030reg_map_mode, \
482                 }, \
483         }
484
485 #define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
486                         remap_conf) \
487 static const struct twlreg_info TWLFIXED_INFO_##label = { \
488         .base = offset, \
489         .id = num, \
490         .remap = remap_conf, \
491         .desc = { \
492                 .name = #label, \
493                 .id = TWL4030##_REG_##label, \
494                 .n_voltages = 1, \
495                 .ops = &twl4030fixed_ops, \
496                 .type = REGULATOR_VOLTAGE, \
497                 .owner = THIS_MODULE, \
498                 .min_uV = mVolts * 1000, \
499                 .enable_time = turnon_delay, \
500                 .of_map_mode = twl4030reg_map_mode, \
501                 }, \
502         }
503
504 /*
505  * We list regulators here if systems need some level of
506  * software control over them after boot.
507  */
508 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
509 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
510 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
511 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
512 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
513 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
514 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
515 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
516 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
517 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
518 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
519 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
520 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
521 TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
522 TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
523 /* VUSBCP is managed *only* by the USB subchip */
524 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08);
525 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
526 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
527 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
528 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
529
530 #define TWL_OF_MATCH(comp, family, label) \
531         { \
532                 .compatible = comp, \
533                 .data = &family##_INFO_##label, \
534         }
535
536 #define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
537 #define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
538 #define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label)
539 #define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
540 #define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
541
542 static const struct of_device_id twl_of_match[] = {
543         TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
544         TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
545         TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
546         TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
547         TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
548         TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
549         TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
550         TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
551         TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
552         TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
553         TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
554         TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
555         TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
556         TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
557         TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
558         TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1),
559         TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
560         TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
561         TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
562         TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
563         {},
564 };
565 MODULE_DEVICE_TABLE(of, twl_of_match);
566
567 static int twlreg_probe(struct platform_device *pdev)
568 {
569         int id;
570         struct twlreg_info              *info;
571         const struct twlreg_info        *template;
572         struct regulator_init_data      *initdata;
573         struct regulation_constraints   *c;
574         struct regulator_dev            *rdev;
575         struct regulator_config         config = { };
576
577         template = of_device_get_match_data(&pdev->dev);
578         if (!template)
579                 return -ENODEV;
580
581         id = template->desc.id;
582         initdata = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node,
583                                                 &template->desc);
584         if (!initdata)
585                 return -EINVAL;
586
587         info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL);
588         if (!info)
589                 return -ENOMEM;
590
591         /* Constrain board-specific capabilities according to what
592          * this driver and the chip itself can actually do.
593          */
594         c = &initdata->constraints;
595         c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
596         c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
597                                 | REGULATOR_CHANGE_MODE
598                                 | REGULATOR_CHANGE_STATUS;
599         switch (id) {
600         case TWL4030_REG_VIO:
601         case TWL4030_REG_VDD1:
602         case TWL4030_REG_VDD2:
603         case TWL4030_REG_VPLL1:
604         case TWL4030_REG_VINTANA1:
605         case TWL4030_REG_VINTANA2:
606         case TWL4030_REG_VINTDIG:
607                 c->always_on = true;
608                 break;
609         default:
610                 break;
611         }
612
613         config.dev = &pdev->dev;
614         config.init_data = initdata;
615         config.driver_data = info;
616         config.of_node = pdev->dev.of_node;
617
618         rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
619         if (IS_ERR(rdev)) {
620                 dev_err(&pdev->dev, "can't register %s, %ld\n",
621                                 info->desc.name, PTR_ERR(rdev));
622                 return PTR_ERR(rdev);
623         }
624         platform_set_drvdata(pdev, rdev);
625
626         twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, info->remap);
627
628         /* NOTE:  many regulators support short-circuit IRQs (presentable
629          * as REGULATOR_OVER_CURRENT notifications?) configured via:
630          *  - SC_CONFIG
631          *  - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
632          *  - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
633          *  - IT_CONFIG
634          */
635
636         return 0;
637 }
638
639 MODULE_ALIAS("platform:twl4030_reg");
640
641 static struct platform_driver twlreg_driver = {
642         .probe          = twlreg_probe,
643         /* NOTE: short name, to work around driver model truncation of
644          * "twl_regulator.12" (and friends) to "twl_regulator.1".
645          */
646         .driver  = {
647                 .name  = "twl4030_reg",
648                 .of_match_table = of_match_ptr(twl_of_match),
649         },
650 };
651
652 static int __init twlreg_init(void)
653 {
654         return platform_driver_register(&twlreg_driver);
655 }
656 subsys_initcall(twlreg_init);
657
658 static void __exit twlreg_exit(void)
659 {
660         platform_driver_unregister(&twlreg_driver);
661 }
662 module_exit(twlreg_exit)
663
664 MODULE_DESCRIPTION("TWL4030 regulator driver");
665 MODULE_LICENSE("GPL");