Merge tag 'regulator-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...
[sfrench/cifs-2.6.git] / drivers / regulator / qcom_spmi-regulator.c
1 /*
2  * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 and
6  * only version 2 as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13
14 #include <linux/module.h>
15 #include <linux/delay.h>
16 #include <linux/err.h>
17 #include <linux/kernel.h>
18 #include <linux/interrupt.h>
19 #include <linux/bitops.h>
20 #include <linux/slab.h>
21 #include <linux/of.h>
22 #include <linux/of_device.h>
23 #include <linux/platform_device.h>
24 #include <linux/ktime.h>
25 #include <linux/regulator/driver.h>
26 #include <linux/regmap.h>
27 #include <linux/list.h>
28
29 /* Pin control enable input pins. */
30 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE             0x00
31 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0              0x01
32 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1              0x02
33 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2              0x04
34 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3              0x08
35 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT       0x10
36
37 /* Pin control high power mode input pins. */
38 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE                0x00
39 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0                 0x01
40 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1                 0x02
41 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2                 0x04
42 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN3                 0x08
43 #define SPMI_REGULATOR_PIN_CTRL_HPM_SLEEP_B             0x10
44 #define SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT          0x20
45
46 /*
47  * Used with enable parameters to specify that hardware default register values
48  * should be left unaltered.
49  */
50 #define SPMI_REGULATOR_USE_HW_DEFAULT                   2
51
52 /* Soft start strength of a voltage switch type regulator */
53 enum spmi_vs_soft_start_str {
54         SPMI_VS_SOFT_START_STR_0P05_UA = 0,
55         SPMI_VS_SOFT_START_STR_0P25_UA,
56         SPMI_VS_SOFT_START_STR_0P55_UA,
57         SPMI_VS_SOFT_START_STR_0P75_UA,
58         SPMI_VS_SOFT_START_STR_HW_DEFAULT,
59 };
60
61 /**
62  * struct spmi_regulator_init_data - spmi-regulator initialization data
63  * @pin_ctrl_enable:        Bit mask specifying which hardware pins should be
64  *                              used to enable the regulator, if any
65  *                          Value should be an ORing of
66  *                              SPMI_REGULATOR_PIN_CTRL_ENABLE_* constants.  If
67  *                              the bit specified by
68  *                              SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is
69  *                              set, then pin control enable hardware registers
70  *                              will not be modified.
71  * @pin_ctrl_hpm:           Bit mask specifying which hardware pins should be
72  *                              used to force the regulator into high power
73  *                              mode, if any
74  *                          Value should be an ORing of
75  *                              SPMI_REGULATOR_PIN_CTRL_HPM_* constants.  If
76  *                              the bit specified by
77  *                              SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is
78  *                              set, then pin control mode hardware registers
79  *                              will not be modified.
80  * @vs_soft_start_strength: This parameter sets the soft start strength for
81  *                              voltage switch type regulators.  Its value
82  *                              should be one of SPMI_VS_SOFT_START_STR_*.  If
83  *                              its value is SPMI_VS_SOFT_START_STR_HW_DEFAULT,
84  *                              then the soft start strength will be left at its
85  *                              default hardware value.
86  */
87 struct spmi_regulator_init_data {
88         unsigned                                pin_ctrl_enable;
89         unsigned                                pin_ctrl_hpm;
90         enum spmi_vs_soft_start_str             vs_soft_start_strength;
91 };
92
93 /* These types correspond to unique register layouts. */
94 enum spmi_regulator_logical_type {
95         SPMI_REGULATOR_LOGICAL_TYPE_SMPS,
96         SPMI_REGULATOR_LOGICAL_TYPE_LDO,
97         SPMI_REGULATOR_LOGICAL_TYPE_VS,
98         SPMI_REGULATOR_LOGICAL_TYPE_BOOST,
99         SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS,
100         SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP,
101         SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO,
102         SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS,
103         SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS,
104         SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO,
105 };
106
107 enum spmi_regulator_type {
108         SPMI_REGULATOR_TYPE_BUCK                = 0x03,
109         SPMI_REGULATOR_TYPE_LDO                 = 0x04,
110         SPMI_REGULATOR_TYPE_VS                  = 0x05,
111         SPMI_REGULATOR_TYPE_BOOST               = 0x1b,
112         SPMI_REGULATOR_TYPE_FTS                 = 0x1c,
113         SPMI_REGULATOR_TYPE_BOOST_BYP           = 0x1f,
114         SPMI_REGULATOR_TYPE_ULT_LDO             = 0x21,
115         SPMI_REGULATOR_TYPE_ULT_BUCK            = 0x22,
116 };
117
118 enum spmi_regulator_subtype {
119         SPMI_REGULATOR_SUBTYPE_GP_CTL           = 0x08,
120         SPMI_REGULATOR_SUBTYPE_RF_CTL           = 0x09,
121         SPMI_REGULATOR_SUBTYPE_N50              = 0x01,
122         SPMI_REGULATOR_SUBTYPE_N150             = 0x02,
123         SPMI_REGULATOR_SUBTYPE_N300             = 0x03,
124         SPMI_REGULATOR_SUBTYPE_N600             = 0x04,
125         SPMI_REGULATOR_SUBTYPE_N1200            = 0x05,
126         SPMI_REGULATOR_SUBTYPE_N600_ST          = 0x06,
127         SPMI_REGULATOR_SUBTYPE_N1200_ST         = 0x07,
128         SPMI_REGULATOR_SUBTYPE_N900_ST          = 0x14,
129         SPMI_REGULATOR_SUBTYPE_N300_ST          = 0x15,
130         SPMI_REGULATOR_SUBTYPE_P50              = 0x08,
131         SPMI_REGULATOR_SUBTYPE_P150             = 0x09,
132         SPMI_REGULATOR_SUBTYPE_P300             = 0x0a,
133         SPMI_REGULATOR_SUBTYPE_P600             = 0x0b,
134         SPMI_REGULATOR_SUBTYPE_P1200            = 0x0c,
135         SPMI_REGULATOR_SUBTYPE_LN               = 0x10,
136         SPMI_REGULATOR_SUBTYPE_LV_P50           = 0x28,
137         SPMI_REGULATOR_SUBTYPE_LV_P150          = 0x29,
138         SPMI_REGULATOR_SUBTYPE_LV_P300          = 0x2a,
139         SPMI_REGULATOR_SUBTYPE_LV_P600          = 0x2b,
140         SPMI_REGULATOR_SUBTYPE_LV_P1200         = 0x2c,
141         SPMI_REGULATOR_SUBTYPE_LV_P450          = 0x2d,
142         SPMI_REGULATOR_SUBTYPE_LV100            = 0x01,
143         SPMI_REGULATOR_SUBTYPE_LV300            = 0x02,
144         SPMI_REGULATOR_SUBTYPE_MV300            = 0x08,
145         SPMI_REGULATOR_SUBTYPE_MV500            = 0x09,
146         SPMI_REGULATOR_SUBTYPE_HDMI             = 0x10,
147         SPMI_REGULATOR_SUBTYPE_OTG              = 0x11,
148         SPMI_REGULATOR_SUBTYPE_5V_BOOST         = 0x01,
149         SPMI_REGULATOR_SUBTYPE_FTS_CTL          = 0x08,
150         SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL       = 0x09,
151         SPMI_REGULATOR_SUBTYPE_BB_2A            = 0x01,
152         SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1      = 0x0d,
153         SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2      = 0x0e,
154         SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3      = 0x0f,
155         SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4      = 0x10,
156 };
157
158 enum spmi_common_regulator_registers {
159         SPMI_COMMON_REG_DIG_MAJOR_REV           = 0x01,
160         SPMI_COMMON_REG_TYPE                    = 0x04,
161         SPMI_COMMON_REG_SUBTYPE                 = 0x05,
162         SPMI_COMMON_REG_VOLTAGE_RANGE           = 0x40,
163         SPMI_COMMON_REG_VOLTAGE_SET             = 0x41,
164         SPMI_COMMON_REG_MODE                    = 0x45,
165         SPMI_COMMON_REG_ENABLE                  = 0x46,
166         SPMI_COMMON_REG_PULL_DOWN               = 0x48,
167         SPMI_COMMON_REG_SOFT_START              = 0x4c,
168         SPMI_COMMON_REG_STEP_CTRL               = 0x61,
169 };
170
171 enum spmi_vs_registers {
172         SPMI_VS_REG_OCP                         = 0x4a,
173         SPMI_VS_REG_SOFT_START                  = 0x4c,
174 };
175
176 enum spmi_boost_registers {
177         SPMI_BOOST_REG_CURRENT_LIMIT            = 0x4a,
178 };
179
180 enum spmi_boost_byp_registers {
181         SPMI_BOOST_BYP_REG_CURRENT_LIMIT        = 0x4b,
182 };
183
184 /* Used for indexing into ctrl_reg.  These are offets from 0x40 */
185 enum spmi_common_control_register_index {
186         SPMI_COMMON_IDX_VOLTAGE_RANGE           = 0,
187         SPMI_COMMON_IDX_VOLTAGE_SET             = 1,
188         SPMI_COMMON_IDX_MODE                    = 5,
189         SPMI_COMMON_IDX_ENABLE                  = 6,
190 };
191
192 /* Common regulator control register layout */
193 #define SPMI_COMMON_ENABLE_MASK                 0x80
194 #define SPMI_COMMON_ENABLE                      0x80
195 #define SPMI_COMMON_DISABLE                     0x00
196 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK   0x08
197 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK   0x04
198 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK   0x02
199 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK   0x01
200 #define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK      0x0f
201
202 /* Common regulator mode register layout */
203 #define SPMI_COMMON_MODE_HPM_MASK               0x80
204 #define SPMI_COMMON_MODE_AUTO_MASK              0x40
205 #define SPMI_COMMON_MODE_BYPASS_MASK            0x20
206 #define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK      0x10
207 #define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK     0x08
208 #define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK     0x04
209 #define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK     0x02
210 #define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK     0x01
211 #define SPMI_COMMON_MODE_FOLLOW_ALL_MASK        0x1f
212
213 /* Common regulator pull down control register layout */
214 #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK       0x80
215
216 /* LDO regulator current limit control register layout */
217 #define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK      0x80
218
219 /* LDO regulator soft start control register layout */
220 #define SPMI_LDO_SOFT_START_ENABLE_MASK         0x80
221
222 /* VS regulator over current protection control register layout */
223 #define SPMI_VS_OCP_OVERRIDE                    0x01
224 #define SPMI_VS_OCP_NO_OVERRIDE                 0x00
225
226 /* VS regulator soft start control register layout */
227 #define SPMI_VS_SOFT_START_ENABLE_MASK          0x80
228 #define SPMI_VS_SOFT_START_SEL_MASK             0x03
229
230 /* Boost regulator current limit control register layout */
231 #define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK    0x80
232 #define SPMI_BOOST_CURRENT_LIMIT_MASK           0x07
233
234 #define SPMI_VS_OCP_DEFAULT_MAX_RETRIES         10
235 #define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS      30
236 #define SPMI_VS_OCP_FALL_DELAY_US               90
237 #define SPMI_VS_OCP_FAULT_DELAY_US              20000
238
239 #define SPMI_FTSMPS_STEP_CTRL_STEP_MASK         0x18
240 #define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT        3
241 #define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK        0x07
242 #define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT       0
243
244 /* Clock rate in kHz of the FTSMPS regulator reference clock. */
245 #define SPMI_FTSMPS_CLOCK_RATE          19200
246
247 /* Minimum voltage stepper delay for each step. */
248 #define SPMI_FTSMPS_STEP_DELAY          8
249 #define SPMI_DEFAULT_STEP_DELAY         20
250
251 /*
252  * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to
253  * adjust the step rate in order to account for oscillator variance.
254  */
255 #define SPMI_FTSMPS_STEP_MARGIN_NUM     4
256 #define SPMI_FTSMPS_STEP_MARGIN_DEN     5
257
258 /* VSET value to decide the range of ULT SMPS */
259 #define ULT_SMPS_RANGE_SPLIT 0x60
260
261 /**
262  * struct spmi_voltage_range - regulator set point voltage mapping description
263  * @min_uV:             Minimum programmable output voltage resulting from
264  *                      set point register value 0x00
265  * @max_uV:             Maximum programmable output voltage
266  * @step_uV:            Output voltage increase resulting from the set point
267  *                      register value increasing by 1
268  * @set_point_min_uV:   Minimum allowed voltage
269  * @set_point_max_uV:   Maximum allowed voltage.  This may be tweaked in order
270  *                      to pick which range should be used in the case of
271  *                      overlapping set points.
272  * @n_voltages:         Number of preferred voltage set points present in this
273  *                      range
274  * @range_sel:          Voltage range register value corresponding to this range
275  *
276  * The following relationships must be true for the values used in this struct:
277  * (max_uV - min_uV) % step_uV == 0
278  * (set_point_min_uV - min_uV) % step_uV == 0*
279  * (set_point_max_uV - min_uV) % step_uV == 0*
280  * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1
281  *
282  * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to
283  * specify that the voltage range has meaning, but is not preferred.
284  */
285 struct spmi_voltage_range {
286         int                                     min_uV;
287         int                                     max_uV;
288         int                                     step_uV;
289         int                                     set_point_min_uV;
290         int                                     set_point_max_uV;
291         unsigned                                n_voltages;
292         u8                                      range_sel;
293 };
294
295 /*
296  * The ranges specified in the spmi_voltage_set_points struct must be listed
297  * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV.
298  */
299 struct spmi_voltage_set_points {
300         struct spmi_voltage_range               *range;
301         int                                     count;
302         unsigned                                n_voltages;
303 };
304
305 struct spmi_regulator {
306         struct regulator_desc                   desc;
307         struct device                           *dev;
308         struct delayed_work                     ocp_work;
309         struct regmap                           *regmap;
310         struct spmi_voltage_set_points          *set_points;
311         enum spmi_regulator_logical_type        logical_type;
312         int                                     ocp_irq;
313         int                                     ocp_count;
314         int                                     ocp_max_retries;
315         int                                     ocp_retry_delay_ms;
316         int                                     hpm_min_load;
317         int                                     slew_rate;
318         ktime_t                                 vs_enable_time;
319         u16                                     base;
320         struct list_head                        node;
321 };
322
323 struct spmi_regulator_mapping {
324         enum spmi_regulator_type                type;
325         enum spmi_regulator_subtype             subtype;
326         enum spmi_regulator_logical_type        logical_type;
327         u32                                     revision_min;
328         u32                                     revision_max;
329         struct regulator_ops                    *ops;
330         struct spmi_voltage_set_points          *set_points;
331         int                                     hpm_min_load;
332 };
333
334 struct spmi_regulator_data {
335         const char                      *name;
336         u16                             base;
337         const char                      *supply;
338         const char                      *ocp;
339         u16                             force_type;
340 };
341
342 #define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \
343                       _logical_type, _ops_val, _set_points_val, _hpm_min_load) \
344         { \
345                 .type           = SPMI_REGULATOR_TYPE_##_type, \
346                 .subtype        = SPMI_REGULATOR_SUBTYPE_##_subtype, \
347                 .revision_min   = _dig_major_min, \
348                 .revision_max   = _dig_major_max, \
349                 .logical_type   = SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \
350                 .ops            = &spmi_##_ops_val##_ops, \
351                 .set_points     = &_set_points_val##_set_points, \
352                 .hpm_min_load   = _hpm_min_load, \
353         }
354
355 #define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \
356         { \
357                 .type           = SPMI_REGULATOR_TYPE_VS, \
358                 .subtype        = SPMI_REGULATOR_SUBTYPE_##_subtype, \
359                 .revision_min   = _dig_major_min, \
360                 .revision_max   = _dig_major_max, \
361                 .logical_type   = SPMI_REGULATOR_LOGICAL_TYPE_VS, \
362                 .ops            = &spmi_vs_ops, \
363         }
364
365 #define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \
366                         _set_point_max_uV, _max_uV, _step_uV) \
367         { \
368                 .min_uV                 = _min_uV, \
369                 .max_uV                 = _max_uV, \
370                 .set_point_min_uV       = _set_point_min_uV, \
371                 .set_point_max_uV       = _set_point_max_uV, \
372                 .step_uV                = _step_uV, \
373                 .range_sel              = _range_sel, \
374         }
375
376 #define DEFINE_SPMI_SET_POINTS(name) \
377 struct spmi_voltage_set_points name##_set_points = { \
378         .range  = name##_ranges, \
379         .count  = ARRAY_SIZE(name##_ranges), \
380 }
381
382 /*
383  * These tables contain the physically available PMIC regulator voltage setpoint
384  * ranges.  Where two ranges overlap in hardware, one of the ranges is trimmed
385  * to ensure that the setpoints available to software are monotonically
386  * increasing and unique.  The set_voltage callback functions expect these
387  * properties to hold.
388  */
389 static struct spmi_voltage_range pldo_ranges[] = {
390         SPMI_VOLTAGE_RANGE(2,  750000,  750000, 1537500, 1537500, 12500),
391         SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000),
392         SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000),
393 };
394
395 static struct spmi_voltage_range nldo1_ranges[] = {
396         SPMI_VOLTAGE_RANGE(2,  750000,  750000, 1537500, 1537500, 12500),
397 };
398
399 static struct spmi_voltage_range nldo2_ranges[] = {
400         SPMI_VOLTAGE_RANGE(0,  375000,       0,       0, 1537500, 12500),
401         SPMI_VOLTAGE_RANGE(1,  375000,  375000,  768750,  768750,  6250),
402         SPMI_VOLTAGE_RANGE(2,  750000,  775000, 1537500, 1537500, 12500),
403 };
404
405 static struct spmi_voltage_range nldo3_ranges[] = {
406         SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1537500, 1537500, 12500),
407         SPMI_VOLTAGE_RANGE(1,  375000,       0,       0, 1537500, 12500),
408         SPMI_VOLTAGE_RANGE(2,  750000,       0,       0, 1537500, 12500),
409 };
410
411 static struct spmi_voltage_range ln_ldo_ranges[] = {
412         SPMI_VOLTAGE_RANGE(1,  690000,  690000, 1110000, 1110000, 60000),
413         SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000),
414 };
415
416 static struct spmi_voltage_range smps_ranges[] = {
417         SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1562500, 1562500, 12500),
418         SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000),
419 };
420
421 static struct spmi_voltage_range ftsmps_ranges[] = {
422         SPMI_VOLTAGE_RANGE(0,       0,  350000, 1275000, 1275000,  5000),
423         SPMI_VOLTAGE_RANGE(1,       0, 1280000, 2040000, 2040000, 10000),
424 };
425
426 static struct spmi_voltage_range ftsmps2p5_ranges[] = {
427         SPMI_VOLTAGE_RANGE(0,   80000,  350000, 1355000, 1355000,  5000),
428         SPMI_VOLTAGE_RANGE(1,  160000, 1360000, 2200000, 2200000, 10000),
429 };
430
431 static struct spmi_voltage_range boost_ranges[] = {
432         SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000),
433 };
434
435 static struct spmi_voltage_range boost_byp_ranges[] = {
436         SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000),
437 };
438
439 static struct spmi_voltage_range ult_lo_smps_ranges[] = {
440         SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1562500, 1562500, 12500),
441         SPMI_VOLTAGE_RANGE(1,  750000,       0,       0, 1525000, 25000),
442 };
443
444 static struct spmi_voltage_range ult_ho_smps_ranges[] = {
445         SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000),
446 };
447
448 static struct spmi_voltage_range ult_nldo_ranges[] = {
449         SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1537500, 1537500, 12500),
450 };
451
452 static struct spmi_voltage_range ult_pldo_ranges[] = {
453         SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500),
454 };
455
456 static DEFINE_SPMI_SET_POINTS(pldo);
457 static DEFINE_SPMI_SET_POINTS(nldo1);
458 static DEFINE_SPMI_SET_POINTS(nldo2);
459 static DEFINE_SPMI_SET_POINTS(nldo3);
460 static DEFINE_SPMI_SET_POINTS(ln_ldo);
461 static DEFINE_SPMI_SET_POINTS(smps);
462 static DEFINE_SPMI_SET_POINTS(ftsmps);
463 static DEFINE_SPMI_SET_POINTS(ftsmps2p5);
464 static DEFINE_SPMI_SET_POINTS(boost);
465 static DEFINE_SPMI_SET_POINTS(boost_byp);
466 static DEFINE_SPMI_SET_POINTS(ult_lo_smps);
467 static DEFINE_SPMI_SET_POINTS(ult_ho_smps);
468 static DEFINE_SPMI_SET_POINTS(ult_nldo);
469 static DEFINE_SPMI_SET_POINTS(ult_pldo);
470
471 static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
472                                  int len)
473 {
474         return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len);
475 }
476
477 static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr,
478                                 u8 *buf, int len)
479 {
480         return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len);
481 }
482
483 static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val,
484                 u8 mask)
485 {
486         return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val);
487 }
488
489 static int spmi_regulator_vs_enable(struct regulator_dev *rdev)
490 {
491         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
492
493         if (vreg->ocp_irq) {
494                 vreg->ocp_count = 0;
495                 vreg->vs_enable_time = ktime_get();
496         }
497
498         return regulator_enable_regmap(rdev);
499 }
500
501 static int spmi_regulator_vs_ocp(struct regulator_dev *rdev)
502 {
503         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
504         u8 reg = SPMI_VS_OCP_OVERRIDE;
505
506         return spmi_vreg_write(vreg, SPMI_VS_REG_OCP, &reg, 1);
507 }
508
509 static int spmi_regulator_select_voltage(struct spmi_regulator *vreg,
510                                          int min_uV, int max_uV)
511 {
512         const struct spmi_voltage_range *range;
513         int uV = min_uV;
514         int lim_min_uV, lim_max_uV, i, range_id, range_max_uV;
515         int selector, voltage_sel;
516
517         /* Check if request voltage is outside of physically settable range. */
518         lim_min_uV = vreg->set_points->range[0].set_point_min_uV;
519         lim_max_uV =
520           vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV;
521
522         if (uV < lim_min_uV && max_uV >= lim_min_uV)
523                 uV = lim_min_uV;
524
525         if (uV < lim_min_uV || uV > lim_max_uV) {
526                 dev_err(vreg->dev,
527                         "request v=[%d, %d] is outside possible v=[%d, %d]\n",
528                          min_uV, max_uV, lim_min_uV, lim_max_uV);
529                 return -EINVAL;
530         }
531
532         /* Find the range which uV is inside of. */
533         for (i = vreg->set_points->count - 1; i > 0; i--) {
534                 range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV;
535                 if (uV > range_max_uV && range_max_uV > 0)
536                         break;
537         }
538
539         range_id = i;
540         range = &vreg->set_points->range[range_id];
541
542         /*
543          * Force uV to be an allowed set point by applying a ceiling function to
544          * the uV value.
545          */
546         voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
547         uV = voltage_sel * range->step_uV + range->min_uV;
548
549         if (uV > max_uV) {
550                 dev_err(vreg->dev,
551                         "request v=[%d, %d] cannot be met by any set point; "
552                         "next set point: %d\n",
553                         min_uV, max_uV, uV);
554                 return -EINVAL;
555         }
556
557         selector = 0;
558         for (i = 0; i < range_id; i++)
559                 selector += vreg->set_points->range[i].n_voltages;
560         selector += (uV - range->set_point_min_uV) / range->step_uV;
561
562         return selector;
563 }
564
565 static int spmi_sw_selector_to_hw(struct spmi_regulator *vreg,
566                                   unsigned selector, u8 *range_sel,
567                                   u8 *voltage_sel)
568 {
569         const struct spmi_voltage_range *range, *end;
570         unsigned offset;
571
572         range = vreg->set_points->range;
573         end = range + vreg->set_points->count;
574
575         for (; range < end; range++) {
576                 if (selector < range->n_voltages) {
577                         /*
578                          * hardware selectors between set point min and real
579                          * min are invalid so we ignore them
580                          */
581                         offset = range->set_point_min_uV - range->min_uV;
582                         offset /= range->step_uV;
583                         *voltage_sel = selector + offset;
584                         *range_sel = range->range_sel;
585                         return 0;
586                 }
587
588                 selector -= range->n_voltages;
589         }
590
591         return -EINVAL;
592 }
593
594 static int spmi_hw_selector_to_sw(struct spmi_regulator *vreg, u8 hw_sel,
595                                   const struct spmi_voltage_range *range)
596 {
597         unsigned sw_sel = 0;
598         unsigned offset, max_hw_sel;
599         const struct spmi_voltage_range *r = vreg->set_points->range;
600         const struct spmi_voltage_range *end = r + vreg->set_points->count;
601
602         for (; r < end; r++) {
603                 if (r == range && range->n_voltages) {
604                         /*
605                          * hardware selectors between set point min and real
606                          * min and between set point max and real max are
607                          * invalid so we return an error if they're
608                          * programmed into the hardware
609                          */
610                         offset = range->set_point_min_uV - range->min_uV;
611                         offset /= range->step_uV;
612                         if (hw_sel < offset)
613                                 return -EINVAL;
614
615                         max_hw_sel = range->set_point_max_uV - range->min_uV;
616                         max_hw_sel /= range->step_uV;
617                         if (hw_sel > max_hw_sel)
618                                 return -EINVAL;
619
620                         return sw_sel + hw_sel - offset;
621                 }
622                 sw_sel += r->n_voltages;
623         }
624
625         return -EINVAL;
626 }
627
628 static const struct spmi_voltage_range *
629 spmi_regulator_find_range(struct spmi_regulator *vreg)
630 {
631         u8 range_sel;
632         const struct spmi_voltage_range *range, *end;
633
634         range = vreg->set_points->range;
635         end = range + vreg->set_points->count;
636
637         spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1);
638
639         for (; range < end; range++)
640                 if (range->range_sel == range_sel)
641                         return range;
642
643         return NULL;
644 }
645
646 static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg,
647                 int min_uV, int max_uV)
648 {
649         const struct spmi_voltage_range *range;
650         int uV = min_uV;
651         int i, selector;
652
653         range = spmi_regulator_find_range(vreg);
654         if (!range)
655                 goto different_range;
656
657         if (uV < range->min_uV && max_uV >= range->min_uV)
658                 uV = range->min_uV;
659
660         if (uV < range->min_uV || uV > range->max_uV) {
661                 /* Current range doesn't support the requested voltage. */
662                 goto different_range;
663         }
664
665         /*
666          * Force uV to be an allowed set point by applying a ceiling function to
667          * the uV value.
668          */
669         uV = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
670         uV = uV * range->step_uV + range->min_uV;
671
672         if (uV > max_uV) {
673                 /*
674                  * No set point in the current voltage range is within the
675                  * requested min_uV to max_uV range.
676                  */
677                 goto different_range;
678         }
679
680         selector = 0;
681         for (i = 0; i < vreg->set_points->count; i++) {
682                 if (uV >= vreg->set_points->range[i].set_point_min_uV
683                     && uV <= vreg->set_points->range[i].set_point_max_uV) {
684                         selector +=
685                             (uV - vreg->set_points->range[i].set_point_min_uV)
686                                 / vreg->set_points->range[i].step_uV;
687                         break;
688                 }
689
690                 selector += vreg->set_points->range[i].n_voltages;
691         }
692
693         if (selector >= vreg->set_points->n_voltages)
694                 goto different_range;
695
696         return selector;
697
698 different_range:
699         return spmi_regulator_select_voltage(vreg, min_uV, max_uV);
700 }
701
702 static int spmi_regulator_common_map_voltage(struct regulator_dev *rdev,
703                                              int min_uV, int max_uV)
704 {
705         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
706
707         /*
708          * Favor staying in the current voltage range if possible.  This avoids
709          * voltage spikes that occur when changing the voltage range.
710          */
711         return spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV);
712 }
713
714 static int
715 spmi_regulator_common_set_voltage(struct regulator_dev *rdev, unsigned selector)
716 {
717         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
718         int ret;
719         u8 buf[2];
720         u8 range_sel, voltage_sel;
721
722         ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel);
723         if (ret)
724                 return ret;
725
726         buf[0] = range_sel;
727         buf[1] = voltage_sel;
728         return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2);
729 }
730
731 static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
732                 unsigned int old_selector, unsigned int new_selector)
733 {
734         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
735         const struct spmi_voltage_range *range;
736         int diff_uV;
737
738         range = spmi_regulator_find_range(vreg);
739         if (!range)
740                 return -EINVAL;
741
742         diff_uV = abs(new_selector - old_selector) * range->step_uV;
743
744         return DIV_ROUND_UP(diff_uV, vreg->slew_rate);
745 }
746
747 static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev)
748 {
749         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
750         const struct spmi_voltage_range *range;
751         u8 voltage_sel;
752
753         spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
754
755         range = spmi_regulator_find_range(vreg);
756         if (!range)
757                 return -EINVAL;
758
759         return spmi_hw_selector_to_sw(vreg, voltage_sel, range);
760 }
761
762 static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev,
763                 int min_uV, int max_uV)
764 {
765         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
766
767         return spmi_regulator_select_voltage(vreg, min_uV, max_uV);
768 }
769
770 static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev,
771                                                    unsigned selector)
772 {
773         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
774         u8 sel = selector;
775
776         /*
777          * Certain types of regulators do not have a range select register so
778          * only voltage set register needs to be written.
779          */
780         return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1);
781 }
782
783 static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev)
784 {
785         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
786         u8 selector;
787         int ret;
788
789         ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &selector, 1);
790         if (ret)
791                 return ret;
792
793         return selector;
794 }
795
796 static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev,
797                                                   unsigned selector)
798 {
799         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
800         int ret;
801         u8 range_sel, voltage_sel;
802
803         ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel);
804         if (ret)
805                 return ret;
806
807         /*
808          * Calculate VSET based on range
809          * In case of range 0: voltage_sel is a 7 bit value, can be written
810          *                      witout any modification.
811          * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to
812          *                      [011].
813          */
814         if (range_sel == 1)
815                 voltage_sel |= ULT_SMPS_RANGE_SPLIT;
816
817         return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET,
818                                      voltage_sel, 0xff);
819 }
820
821 static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev)
822 {
823         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
824         const struct spmi_voltage_range *range;
825         u8 voltage_sel;
826
827         spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
828
829         range = spmi_regulator_find_range(vreg);
830         if (!range)
831                 return -EINVAL;
832
833         if (range->range_sel == 1)
834                 voltage_sel &= ~ULT_SMPS_RANGE_SPLIT;
835
836         return spmi_hw_selector_to_sw(vreg, voltage_sel, range);
837 }
838
839 static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev,
840                         unsigned selector)
841 {
842         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
843         int uV = 0;
844         int i;
845
846         if (selector >= vreg->set_points->n_voltages)
847                 return 0;
848
849         for (i = 0; i < vreg->set_points->count; i++) {
850                 if (selector < vreg->set_points->range[i].n_voltages) {
851                         uV = selector * vreg->set_points->range[i].step_uV
852                                 + vreg->set_points->range[i].set_point_min_uV;
853                         break;
854                 }
855
856                 selector -= vreg->set_points->range[i].n_voltages;
857         }
858
859         return uV;
860 }
861
862 static int
863 spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable)
864 {
865         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
866         u8 mask = SPMI_COMMON_MODE_BYPASS_MASK;
867         u8 val = 0;
868
869         if (enable)
870                 val = mask;
871
872         return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
873 }
874
875 static int
876 spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable)
877 {
878         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
879         u8 val;
880         int ret;
881
882         ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1);
883         *enable = val & SPMI_COMMON_MODE_BYPASS_MASK;
884
885         return ret;
886 }
887
888 static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev)
889 {
890         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
891         u8 reg;
892
893         spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1);
894
895         if (reg & SPMI_COMMON_MODE_HPM_MASK)
896                 return REGULATOR_MODE_NORMAL;
897
898         if (reg & SPMI_COMMON_MODE_AUTO_MASK)
899                 return REGULATOR_MODE_FAST;
900
901         return REGULATOR_MODE_IDLE;
902 }
903
904 static int
905 spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode)
906 {
907         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
908         u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK;
909         u8 val = 0;
910
911         if (mode == REGULATOR_MODE_NORMAL)
912                 val = SPMI_COMMON_MODE_HPM_MASK;
913         else if (mode == REGULATOR_MODE_FAST)
914                 val = SPMI_COMMON_MODE_AUTO_MASK;
915
916         return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
917 }
918
919 static int
920 spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA)
921 {
922         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
923         unsigned int mode;
924
925         if (load_uA >= vreg->hpm_min_load)
926                 mode = REGULATOR_MODE_NORMAL;
927         else
928                 mode = REGULATOR_MODE_IDLE;
929
930         return spmi_regulator_common_set_mode(rdev, mode);
931 }
932
933 static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev)
934 {
935         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
936         unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK;
937
938         return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN,
939                                      mask, mask);
940 }
941
942 static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev)
943 {
944         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
945         unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK;
946
947         return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START,
948                                      mask, mask);
949 }
950
951 static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA)
952 {
953         struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
954         enum spmi_regulator_logical_type type = vreg->logical_type;
955         unsigned int current_reg;
956         u8 reg;
957         u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK |
958                   SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
959         int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500;
960
961         if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST)
962                 current_reg = SPMI_BOOST_REG_CURRENT_LIMIT;
963         else
964                 current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT;
965
966         if (ilim_uA > max || ilim_uA <= 0)
967                 return -EINVAL;
968
969         reg = (ilim_uA - 1) / 500;
970         reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
971
972         return spmi_vreg_update_bits(vreg, current_reg, reg, mask);
973 }
974
975 static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg)
976 {
977         int ret;
978
979         ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
980                 SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK);
981
982         vreg->vs_enable_time = ktime_get();
983
984         ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
985                 SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK);
986
987         return ret;
988 }
989
990 static void spmi_regulator_vs_ocp_work(struct work_struct *work)
991 {
992         struct delayed_work *dwork = to_delayed_work(work);
993         struct spmi_regulator *vreg
994                 = container_of(dwork, struct spmi_regulator, ocp_work);
995
996         spmi_regulator_vs_clear_ocp(vreg);
997 }
998
999 static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data)
1000 {
1001         struct spmi_regulator *vreg = data;
1002         ktime_t ocp_irq_time;
1003         s64 ocp_trigger_delay_us;
1004
1005         ocp_irq_time = ktime_get();
1006         ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time,
1007                                                 vreg->vs_enable_time);
1008
1009         /*
1010          * Reset the OCP count if there is a large delay between switch enable
1011          * and when OCP triggers.  This is indicative of a hotplug event as
1012          * opposed to a fault.
1013          */
1014         if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US)
1015                 vreg->ocp_count = 0;
1016
1017         /* Wait for switch output to settle back to 0 V after OCP triggered. */
1018         udelay(SPMI_VS_OCP_FALL_DELAY_US);
1019
1020         vreg->ocp_count++;
1021
1022         if (vreg->ocp_count == 1) {
1023                 /* Immediately clear the over current condition. */
1024                 spmi_regulator_vs_clear_ocp(vreg);
1025         } else if (vreg->ocp_count <= vreg->ocp_max_retries) {
1026                 /* Schedule the over current clear task to run later. */
1027                 schedule_delayed_work(&vreg->ocp_work,
1028                         msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1);
1029         } else {
1030                 dev_err(vreg->dev,
1031                         "OCP triggered %d times; no further retries\n",
1032                         vreg->ocp_count);
1033         }
1034
1035         return IRQ_HANDLED;
1036 }
1037
1038 static struct regulator_ops spmi_smps_ops = {
1039         .enable                 = regulator_enable_regmap,
1040         .disable                = regulator_disable_regmap,
1041         .is_enabled             = regulator_is_enabled_regmap,
1042         .set_voltage_sel        = spmi_regulator_common_set_voltage,
1043         .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1044         .get_voltage_sel        = spmi_regulator_common_get_voltage,
1045         .map_voltage            = spmi_regulator_common_map_voltage,
1046         .list_voltage           = spmi_regulator_common_list_voltage,
1047         .set_mode               = spmi_regulator_common_set_mode,
1048         .get_mode               = spmi_regulator_common_get_mode,
1049         .set_load               = spmi_regulator_common_set_load,
1050         .set_pull_down          = spmi_regulator_common_set_pull_down,
1051 };
1052
1053 static struct regulator_ops spmi_ldo_ops = {
1054         .enable                 = regulator_enable_regmap,
1055         .disable                = regulator_disable_regmap,
1056         .is_enabled             = regulator_is_enabled_regmap,
1057         .set_voltage_sel        = spmi_regulator_common_set_voltage,
1058         .get_voltage_sel        = spmi_regulator_common_get_voltage,
1059         .map_voltage            = spmi_regulator_common_map_voltage,
1060         .list_voltage           = spmi_regulator_common_list_voltage,
1061         .set_mode               = spmi_regulator_common_set_mode,
1062         .get_mode               = spmi_regulator_common_get_mode,
1063         .set_load               = spmi_regulator_common_set_load,
1064         .set_bypass             = spmi_regulator_common_set_bypass,
1065         .get_bypass             = spmi_regulator_common_get_bypass,
1066         .set_pull_down          = spmi_regulator_common_set_pull_down,
1067         .set_soft_start         = spmi_regulator_common_set_soft_start,
1068 };
1069
1070 static struct regulator_ops spmi_ln_ldo_ops = {
1071         .enable                 = regulator_enable_regmap,
1072         .disable                = regulator_disable_regmap,
1073         .is_enabled             = regulator_is_enabled_regmap,
1074         .set_voltage_sel        = spmi_regulator_common_set_voltage,
1075         .get_voltage_sel        = spmi_regulator_common_get_voltage,
1076         .map_voltage            = spmi_regulator_common_map_voltage,
1077         .list_voltage           = spmi_regulator_common_list_voltage,
1078         .set_bypass             = spmi_regulator_common_set_bypass,
1079         .get_bypass             = spmi_regulator_common_get_bypass,
1080 };
1081
1082 static struct regulator_ops spmi_vs_ops = {
1083         .enable                 = spmi_regulator_vs_enable,
1084         .disable                = regulator_disable_regmap,
1085         .is_enabled             = regulator_is_enabled_regmap,
1086         .set_pull_down          = spmi_regulator_common_set_pull_down,
1087         .set_soft_start         = spmi_regulator_common_set_soft_start,
1088         .set_over_current_protection = spmi_regulator_vs_ocp,
1089         .set_mode               = spmi_regulator_common_set_mode,
1090         .get_mode               = spmi_regulator_common_get_mode,
1091 };
1092
1093 static struct regulator_ops spmi_boost_ops = {
1094         .enable                 = regulator_enable_regmap,
1095         .disable                = regulator_disable_regmap,
1096         .is_enabled             = regulator_is_enabled_regmap,
1097         .set_voltage_sel        = spmi_regulator_single_range_set_voltage,
1098         .get_voltage_sel        = spmi_regulator_single_range_get_voltage,
1099         .map_voltage            = spmi_regulator_single_map_voltage,
1100         .list_voltage           = spmi_regulator_common_list_voltage,
1101         .set_input_current_limit = spmi_regulator_set_ilim,
1102 };
1103
1104 static struct regulator_ops spmi_ftsmps_ops = {
1105         .enable                 = regulator_enable_regmap,
1106         .disable                = regulator_disable_regmap,
1107         .is_enabled             = regulator_is_enabled_regmap,
1108         .set_voltage_sel        = spmi_regulator_common_set_voltage,
1109         .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1110         .get_voltage_sel        = spmi_regulator_common_get_voltage,
1111         .map_voltage            = spmi_regulator_common_map_voltage,
1112         .list_voltage           = spmi_regulator_common_list_voltage,
1113         .set_mode               = spmi_regulator_common_set_mode,
1114         .get_mode               = spmi_regulator_common_get_mode,
1115         .set_load               = spmi_regulator_common_set_load,
1116         .set_pull_down          = spmi_regulator_common_set_pull_down,
1117 };
1118
1119 static struct regulator_ops spmi_ult_lo_smps_ops = {
1120         .enable                 = regulator_enable_regmap,
1121         .disable                = regulator_disable_regmap,
1122         .is_enabled             = regulator_is_enabled_regmap,
1123         .set_voltage_sel        = spmi_regulator_ult_lo_smps_set_voltage,
1124         .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1125         .get_voltage_sel        = spmi_regulator_ult_lo_smps_get_voltage,
1126         .list_voltage           = spmi_regulator_common_list_voltage,
1127         .set_mode               = spmi_regulator_common_set_mode,
1128         .get_mode               = spmi_regulator_common_get_mode,
1129         .set_load               = spmi_regulator_common_set_load,
1130         .set_pull_down          = spmi_regulator_common_set_pull_down,
1131 };
1132
1133 static struct regulator_ops spmi_ult_ho_smps_ops = {
1134         .enable                 = regulator_enable_regmap,
1135         .disable                = regulator_disable_regmap,
1136         .is_enabled             = regulator_is_enabled_regmap,
1137         .set_voltage_sel        = spmi_regulator_single_range_set_voltage,
1138         .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1139         .get_voltage_sel        = spmi_regulator_single_range_get_voltage,
1140         .map_voltage            = spmi_regulator_single_map_voltage,
1141         .list_voltage           = spmi_regulator_common_list_voltage,
1142         .set_mode               = spmi_regulator_common_set_mode,
1143         .get_mode               = spmi_regulator_common_get_mode,
1144         .set_load               = spmi_regulator_common_set_load,
1145         .set_pull_down          = spmi_regulator_common_set_pull_down,
1146 };
1147
1148 static struct regulator_ops spmi_ult_ldo_ops = {
1149         .enable                 = regulator_enable_regmap,
1150         .disable                = regulator_disable_regmap,
1151         .is_enabled             = regulator_is_enabled_regmap,
1152         .set_voltage_sel        = spmi_regulator_single_range_set_voltage,
1153         .get_voltage_sel        = spmi_regulator_single_range_get_voltage,
1154         .map_voltage            = spmi_regulator_single_map_voltage,
1155         .list_voltage           = spmi_regulator_common_list_voltage,
1156         .set_mode               = spmi_regulator_common_set_mode,
1157         .get_mode               = spmi_regulator_common_get_mode,
1158         .set_load               = spmi_regulator_common_set_load,
1159         .set_bypass             = spmi_regulator_common_set_bypass,
1160         .get_bypass             = spmi_regulator_common_get_bypass,
1161         .set_pull_down          = spmi_regulator_common_set_pull_down,
1162         .set_soft_start         = spmi_regulator_common_set_soft_start,
1163 };
1164
1165 /* Maximum possible digital major revision value */
1166 #define INF 0xFF
1167
1168 static const struct spmi_regulator_mapping supported_regulators[] = {
1169         /*           type subtype dig_min dig_max ltype ops setpoints hpm_min */
1170         SPMI_VREG(BUCK,  GP_CTL,   0, INF, SMPS,   smps,   smps,   100000),
1171         SPMI_VREG(LDO,   N300,     0, INF, LDO,    ldo,    nldo1,   10000),
1172         SPMI_VREG(LDO,   N600,     0,   0, LDO,    ldo,    nldo2,   10000),
1173         SPMI_VREG(LDO,   N1200,    0,   0, LDO,    ldo,    nldo2,   10000),
1174         SPMI_VREG(LDO,   N600,     1, INF, LDO,    ldo,    nldo3,   10000),
1175         SPMI_VREG(LDO,   N1200,    1, INF, LDO,    ldo,    nldo3,   10000),
1176         SPMI_VREG(LDO,   N600_ST,  0,   0, LDO,    ldo,    nldo2,   10000),
1177         SPMI_VREG(LDO,   N1200_ST, 0,   0, LDO,    ldo,    nldo2,   10000),
1178         SPMI_VREG(LDO,   N600_ST,  1, INF, LDO,    ldo,    nldo3,   10000),
1179         SPMI_VREG(LDO,   N1200_ST, 1, INF, LDO,    ldo,    nldo3,   10000),
1180         SPMI_VREG(LDO,   P50,      0, INF, LDO,    ldo,    pldo,     5000),
1181         SPMI_VREG(LDO,   P150,     0, INF, LDO,    ldo,    pldo,    10000),
1182         SPMI_VREG(LDO,   P300,     0, INF, LDO,    ldo,    pldo,    10000),
1183         SPMI_VREG(LDO,   P600,     0, INF, LDO,    ldo,    pldo,    10000),
1184         SPMI_VREG(LDO,   P1200,    0, INF, LDO,    ldo,    pldo,    10000),
1185         SPMI_VREG(LDO,   LN,       0, INF, LN_LDO, ln_ldo, ln_ldo,      0),
1186         SPMI_VREG(LDO,   LV_P50,   0, INF, LDO,    ldo,    pldo,     5000),
1187         SPMI_VREG(LDO,   LV_P150,  0, INF, LDO,    ldo,    pldo,    10000),
1188         SPMI_VREG(LDO,   LV_P300,  0, INF, LDO,    ldo,    pldo,    10000),
1189         SPMI_VREG(LDO,   LV_P600,  0, INF, LDO,    ldo,    pldo,    10000),
1190         SPMI_VREG(LDO,   LV_P1200, 0, INF, LDO,    ldo,    pldo,    10000),
1191         SPMI_VREG_VS(LV100,        0, INF),
1192         SPMI_VREG_VS(LV300,        0, INF),
1193         SPMI_VREG_VS(MV300,        0, INF),
1194         SPMI_VREG_VS(MV500,        0, INF),
1195         SPMI_VREG_VS(HDMI,         0, INF),
1196         SPMI_VREG_VS(OTG,          0, INF),
1197         SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST,  boost,  boost,       0),
1198         SPMI_VREG(FTS,   FTS_CTL,  0, INF, FTSMPS, ftsmps, ftsmps, 100000),
1199         SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000),
1200         SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0),
1201         SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1202                                                 ult_lo_smps,   100000),
1203         SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1204                                                 ult_lo_smps,   100000),
1205         SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1206                                                 ult_lo_smps,   100000),
1207         SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps,
1208                                                 ult_ho_smps,   100000),
1209         SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1210         SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1211         SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1212         SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1213         SPMI_VREG(ULT_LDO, LV_P150,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1214         SPMI_VREG(ULT_LDO, LV_P300,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1215         SPMI_VREG(ULT_LDO, LV_P450,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1216         SPMI_VREG(ULT_LDO, P600,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1217         SPMI_VREG(ULT_LDO, P150,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1218         SPMI_VREG(ULT_LDO, P50,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000),
1219 };
1220
1221 static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points)
1222 {
1223         unsigned int n;
1224         struct spmi_voltage_range *range = points->range;
1225
1226         for (; range < points->range + points->count; range++) {
1227                 n = 0;
1228                 if (range->set_point_max_uV) {
1229                         n = range->set_point_max_uV - range->set_point_min_uV;
1230                         n = (n / range->step_uV) + 1;
1231                 }
1232                 range->n_voltages = n;
1233                 points->n_voltages += n;
1234         }
1235 }
1236
1237 static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type)
1238 {
1239         const struct spmi_regulator_mapping *mapping;
1240         int ret, i;
1241         u32 dig_major_rev;
1242         u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1];
1243         u8 type, subtype;
1244
1245         ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version,
1246                 ARRAY_SIZE(version));
1247         if (ret) {
1248                 dev_dbg(vreg->dev, "could not read version registers\n");
1249                 return ret;
1250         }
1251         dig_major_rev   = version[SPMI_COMMON_REG_DIG_MAJOR_REV
1252                                         - SPMI_COMMON_REG_DIG_MAJOR_REV];
1253         if (!force_type) {
1254                 type            = version[SPMI_COMMON_REG_TYPE -
1255                                           SPMI_COMMON_REG_DIG_MAJOR_REV];
1256                 subtype         = version[SPMI_COMMON_REG_SUBTYPE -
1257                                           SPMI_COMMON_REG_DIG_MAJOR_REV];
1258         } else {
1259                 type = force_type >> 8;
1260                 subtype = force_type;
1261         }
1262
1263         for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) {
1264                 mapping = &supported_regulators[i];
1265                 if (mapping->type == type && mapping->subtype == subtype
1266                     && mapping->revision_min <= dig_major_rev
1267                     && mapping->revision_max >= dig_major_rev)
1268                         goto found;
1269         }
1270
1271         dev_err(vreg->dev,
1272                 "unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n",
1273                 vreg->desc.name, type, subtype, dig_major_rev);
1274
1275         return -ENODEV;
1276
1277 found:
1278         vreg->logical_type      = mapping->logical_type;
1279         vreg->set_points        = mapping->set_points;
1280         vreg->hpm_min_load      = mapping->hpm_min_load;
1281         vreg->desc.ops          = mapping->ops;
1282
1283         if (mapping->set_points) {
1284                 if (!mapping->set_points->n_voltages)
1285                         spmi_calculate_num_voltages(mapping->set_points);
1286                 vreg->desc.n_voltages = mapping->set_points->n_voltages;
1287         }
1288
1289         return 0;
1290 }
1291
1292 static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg)
1293 {
1294         int ret;
1295         u8 reg = 0;
1296         int step, delay, slew_rate, step_delay;
1297         const struct spmi_voltage_range *range;
1298
1299         ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, &reg, 1);
1300         if (ret) {
1301                 dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret);
1302                 return ret;
1303         }
1304
1305         range = spmi_regulator_find_range(vreg);
1306         if (!range)
1307                 return -EINVAL;
1308
1309         switch (vreg->logical_type) {
1310         case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS:
1311                 step_delay = SPMI_FTSMPS_STEP_DELAY;
1312                 break;
1313         default:
1314                 step_delay = SPMI_DEFAULT_STEP_DELAY;
1315                 break;
1316         }
1317
1318         step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK;
1319         step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT;
1320
1321         delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK;
1322         delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT;
1323
1324         /* slew_rate has units of uV/us */
1325         slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step);
1326         slew_rate /= 1000 * (step_delay << delay);
1327         slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM;
1328         slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN;
1329
1330         /* Ensure that the slew rate is greater than 0 */
1331         vreg->slew_rate = max(slew_rate, 1);
1332
1333         return ret;
1334 }
1335
1336 static int spmi_regulator_init_registers(struct spmi_regulator *vreg,
1337                                 const struct spmi_regulator_init_data *data)
1338 {
1339         int ret;
1340         enum spmi_regulator_logical_type type;
1341         u8 ctrl_reg[8], reg, mask;
1342
1343         type = vreg->logical_type;
1344
1345         ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);
1346         if (ret)
1347                 return ret;
1348
1349         /* Set up enable pin control. */
1350         if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
1351              || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO
1352              || type == SPMI_REGULATOR_LOGICAL_TYPE_VS)
1353             && !(data->pin_ctrl_enable
1354                         & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) {
1355                 ctrl_reg[SPMI_COMMON_IDX_ENABLE] &=
1356                         ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1357                 ctrl_reg[SPMI_COMMON_IDX_ENABLE] |=
1358                     data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1359         }
1360
1361         /* Set up mode pin control. */
1362         if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
1363             || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO)
1364                 && !(data->pin_ctrl_hpm
1365                         & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1366                 ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1367                         ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1368                 ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1369                         data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1370         }
1371
1372         if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS
1373            && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1374                 ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1375                         ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1376                 ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1377                        data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1378         }
1379
1380         if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS
1381                 || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS
1382                 || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO)
1383                 && !(data->pin_ctrl_hpm
1384                         & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1385                 ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1386                         ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1387                 ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1388                        data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1389         }
1390
1391         /* Write back any control register values that were modified. */
1392         ret = spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);
1393         if (ret)
1394                 return ret;
1395
1396         /* Set soft start strength and over current protection for VS. */
1397         if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS) {
1398                 if (data->vs_soft_start_strength
1399                                 != SPMI_VS_SOFT_START_STR_HW_DEFAULT) {
1400                         reg = data->vs_soft_start_strength
1401                                 & SPMI_VS_SOFT_START_SEL_MASK;
1402                         mask = SPMI_VS_SOFT_START_SEL_MASK;
1403                         return spmi_vreg_update_bits(vreg,
1404                                                      SPMI_VS_REG_SOFT_START,
1405                                                      reg, mask);
1406                 }
1407         }
1408
1409         return 0;
1410 }
1411
1412 static void spmi_regulator_get_dt_config(struct spmi_regulator *vreg,
1413                 struct device_node *node, struct spmi_regulator_init_data *data)
1414 {
1415         /*
1416          * Initialize configuration parameters to use hardware default in case
1417          * no value is specified via device tree.
1418          */
1419         data->pin_ctrl_enable       = SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT;
1420         data->pin_ctrl_hpm          = SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT;
1421         data->vs_soft_start_strength    = SPMI_VS_SOFT_START_STR_HW_DEFAULT;
1422
1423         /* These bindings are optional, so it is okay if they aren't found. */
1424         of_property_read_u32(node, "qcom,ocp-max-retries",
1425                 &vreg->ocp_max_retries);
1426         of_property_read_u32(node, "qcom,ocp-retry-delay",
1427                 &vreg->ocp_retry_delay_ms);
1428         of_property_read_u32(node, "qcom,pin-ctrl-enable",
1429                 &data->pin_ctrl_enable);
1430         of_property_read_u32(node, "qcom,pin-ctrl-hpm", &data->pin_ctrl_hpm);
1431         of_property_read_u32(node, "qcom,vs-soft-start-strength",
1432                 &data->vs_soft_start_strength);
1433 }
1434
1435 static unsigned int spmi_regulator_of_map_mode(unsigned int mode)
1436 {
1437         if (mode == 1)
1438                 return REGULATOR_MODE_NORMAL;
1439         if (mode == 2)
1440                 return REGULATOR_MODE_FAST;
1441
1442         return REGULATOR_MODE_IDLE;
1443 }
1444
1445 static int spmi_regulator_of_parse(struct device_node *node,
1446                             const struct regulator_desc *desc,
1447                             struct regulator_config *config)
1448 {
1449         struct spmi_regulator_init_data data = { };
1450         struct spmi_regulator *vreg = config->driver_data;
1451         struct device *dev = config->dev;
1452         int ret;
1453
1454         spmi_regulator_get_dt_config(vreg, node, &data);
1455
1456         if (!vreg->ocp_max_retries)
1457                 vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES;
1458         if (!vreg->ocp_retry_delay_ms)
1459                 vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS;
1460
1461         ret = spmi_regulator_init_registers(vreg, &data);
1462         if (ret) {
1463                 dev_err(dev, "common initialization failed, ret=%d\n", ret);
1464                 return ret;
1465         }
1466
1467         switch (vreg->logical_type) {
1468         case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS:
1469         case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS:
1470         case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS:
1471         case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
1472                 ret = spmi_regulator_init_slew_rate(vreg);
1473                 if (ret)
1474                         return ret;
1475         default:
1476                 break;
1477         }
1478
1479         if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS)
1480                 vreg->ocp_irq = 0;
1481
1482         if (vreg->ocp_irq) {
1483                 ret = devm_request_irq(dev, vreg->ocp_irq,
1484                         spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp",
1485                         vreg);
1486                 if (ret < 0) {
1487                         dev_err(dev, "failed to request irq %d, ret=%d\n",
1488                                 vreg->ocp_irq, ret);
1489                         return ret;
1490                 }
1491
1492                 INIT_DELAYED_WORK(&vreg->ocp_work, spmi_regulator_vs_ocp_work);
1493         }
1494
1495         return 0;
1496 }
1497
1498 static const struct spmi_regulator_data pm8941_regulators[] = {
1499         { "s1", 0x1400, "vdd_s1", },
1500         { "s2", 0x1700, "vdd_s2", },
1501         { "s3", 0x1a00, "vdd_s3", },
1502         { "s4", 0xa000, },
1503         { "l1", 0x4000, "vdd_l1_l3", },
1504         { "l2", 0x4100, "vdd_l2_lvs_1_2_3", },
1505         { "l3", 0x4200, "vdd_l1_l3", },
1506         { "l4", 0x4300, "vdd_l4_l11", },
1507         { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 },
1508         { "l6", 0x4500, "vdd_l6_l12_l14_l15", },
1509         { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 },
1510         { "l8", 0x4700, "vdd_l8_l16_l18_19", },
1511         { "l9", 0x4800, "vdd_l9_l10_l17_l22", },
1512         { "l10", 0x4900, "vdd_l9_l10_l17_l22", },
1513         { "l11", 0x4a00, "vdd_l4_l11", },
1514         { "l12", 0x4b00, "vdd_l6_l12_l14_l15", },
1515         { "l13", 0x4c00, "vdd_l13_l20_l23_l24", },
1516         { "l14", 0x4d00, "vdd_l6_l12_l14_l15", },
1517         { "l15", 0x4e00, "vdd_l6_l12_l14_l15", },
1518         { "l16", 0x4f00, "vdd_l8_l16_l18_19", },
1519         { "l17", 0x5000, "vdd_l9_l10_l17_l22", },
1520         { "l18", 0x5100, "vdd_l8_l16_l18_19", },
1521         { "l19", 0x5200, "vdd_l8_l16_l18_19", },
1522         { "l20", 0x5300, "vdd_l13_l20_l23_l24", },
1523         { "l21", 0x5400, "vdd_l21", },
1524         { "l22", 0x5500, "vdd_l9_l10_l17_l22", },
1525         { "l23", 0x5600, "vdd_l13_l20_l23_l24", },
1526         { "l24", 0x5700, "vdd_l13_l20_l23_l24", },
1527         { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
1528         { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
1529         { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
1530         { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
1531         { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
1532         { }
1533 };
1534
1535 static const struct spmi_regulator_data pm8841_regulators[] = {
1536         { "s1", 0x1400, "vdd_s1", },
1537         { "s2", 0x1700, "vdd_s2", NULL, 0x1c08 },
1538         { "s3", 0x1a00, "vdd_s3", },
1539         { "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 },
1540         { "s5", 0x2000, "vdd_s5", NULL, 0x1c08 },
1541         { "s6", 0x2300, "vdd_s6", NULL, 0x1c08 },
1542         { "s7", 0x2600, "vdd_s7", NULL, 0x1c08 },
1543         { "s8", 0x2900, "vdd_s8", NULL, 0x1c08 },
1544         { }
1545 };
1546
1547 static const struct spmi_regulator_data pm8916_regulators[] = {
1548         { "s1", 0x1400, "vdd_s1", },
1549         { "s2", 0x1700, "vdd_s2", },
1550         { "s3", 0x1a00, "vdd_s3", },
1551         { "s4", 0x1d00, "vdd_s4", },
1552         { "l1", 0x4000, "vdd_l1_l3", },
1553         { "l2", 0x4100, "vdd_l2", },
1554         { "l3", 0x4200, "vdd_l1_l3", },
1555         { "l4", 0x4300, "vdd_l4_l5_l6", },
1556         { "l5", 0x4400, "vdd_l4_l5_l6", },
1557         { "l6", 0x4500, "vdd_l4_l5_l6", },
1558         { "l7", 0x4600, "vdd_l7", },
1559         { "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", },
1560         { "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", },
1561         { "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", },
1562         { "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", },
1563         { "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", },
1564         { "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", },
1565         { "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", },
1566         { "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", },
1567         { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", },
1568         { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", },
1569         { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", },
1570         { }
1571 };
1572
1573 static const struct spmi_regulator_data pm8994_regulators[] = {
1574         { "s1", 0x1400, "vdd_s1", },
1575         { "s2", 0x1700, "vdd_s2", },
1576         { "s3", 0x1a00, "vdd_s3", },
1577         { "s4", 0x1d00, "vdd_s4", },
1578         { "s5", 0x2000, "vdd_s5", },
1579         { "s6", 0x2300, "vdd_s6", },
1580         { "s7", 0x2600, "vdd_s7", },
1581         { "s8", 0x2900, "vdd_s8", },
1582         { "s9", 0x2c00, "vdd_s9", },
1583         { "s10", 0x2f00, "vdd_s10", },
1584         { "s11", 0x3200, "vdd_s11", },
1585         { "s12", 0x3500, "vdd_s12", },
1586         { "l1", 0x4000, "vdd_l1", },
1587         { "l2", 0x4100, "vdd_l2_l26_l28", },
1588         { "l3", 0x4200, "vdd_l3_l11", },
1589         { "l4", 0x4300, "vdd_l4_l27_l31", },
1590         { "l5", 0x4400, "vdd_l5_l7", },
1591         { "l6", 0x4500, "vdd_l6_l12_l32", },
1592         { "l7", 0x4600, "vdd_l5_l7", },
1593         { "l8", 0x4700, "vdd_l8_l16_l30", },
1594         { "l9", 0x4800, "vdd_l9_l10_l18_l22", },
1595         { "l10", 0x4900, "vdd_l9_l10_l18_l22", },
1596         { "l11", 0x4a00, "vdd_l3_l11", },
1597         { "l12", 0x4b00, "vdd_l6_l12_l32", },
1598         { "l13", 0x4c00, "vdd_l13_l19_l23_l24", },
1599         { "l14", 0x4d00, "vdd_l14_l15", },
1600         { "l15", 0x4e00, "vdd_l14_l15", },
1601         { "l16", 0x4f00, "vdd_l8_l16_l30", },
1602         { "l17", 0x5000, "vdd_l17_l29", },
1603         { "l18", 0x5100, "vdd_l9_l10_l18_l22", },
1604         { "l19", 0x5200, "vdd_l13_l19_l23_l24", },
1605         { "l20", 0x5300, "vdd_l20_l21", },
1606         { "l21", 0x5400, "vdd_l20_l21", },
1607         { "l22", 0x5500, "vdd_l9_l10_l18_l22", },
1608         { "l23", 0x5600, "vdd_l13_l19_l23_l24", },
1609         { "l24", 0x5700, "vdd_l13_l19_l23_l24", },
1610         { "l25", 0x5800, "vdd_l25", },
1611         { "l26", 0x5900, "vdd_l2_l26_l28", },
1612         { "l27", 0x5a00, "vdd_l4_l27_l31", },
1613         { "l28", 0x5b00, "vdd_l2_l26_l28", },
1614         { "l29", 0x5c00, "vdd_l17_l29", },
1615         { "l30", 0x5d00, "vdd_l8_l16_l30", },
1616         { "l31", 0x5e00, "vdd_l4_l27_l31", },
1617         { "l32", 0x5f00, "vdd_l6_l12_l32", },
1618         { "lvs1", 0x8000, "vdd_lvs_1_2", },
1619         { "lvs2", 0x8100, "vdd_lvs_1_2", },
1620         { }
1621 };
1622
1623 static const struct spmi_regulator_data pmi8994_regulators[] = {
1624         { "s1", 0x1400, "vdd_s1", },
1625         { "s2", 0x1700, "vdd_s2", },
1626         { "s3", 0x1a00, "vdd_s3", },
1627         { "l1", 0x4000, "vdd_l1", },
1628         { }
1629 };
1630
1631 static const struct of_device_id qcom_spmi_regulator_match[] = {
1632         { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators },
1633         { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators },
1634         { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators },
1635         { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators },
1636         { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators },
1637         { }
1638 };
1639 MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match);
1640
1641 static int qcom_spmi_regulator_probe(struct platform_device *pdev)
1642 {
1643         const struct spmi_regulator_data *reg;
1644         const struct of_device_id *match;
1645         struct regulator_config config = { };
1646         struct regulator_dev *rdev;
1647         struct spmi_regulator *vreg;
1648         struct regmap *regmap;
1649         const char *name;
1650         struct device *dev = &pdev->dev;
1651         int ret;
1652         struct list_head *vreg_list;
1653
1654         vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL);
1655         if (!vreg_list)
1656                 return -ENOMEM;
1657         INIT_LIST_HEAD(vreg_list);
1658         platform_set_drvdata(pdev, vreg_list);
1659
1660         regmap = dev_get_regmap(dev->parent, NULL);
1661         if (!regmap)
1662                 return -ENODEV;
1663
1664         match = of_match_device(qcom_spmi_regulator_match, &pdev->dev);
1665         if (!match)
1666                 return -ENODEV;
1667
1668         for (reg = match->data; reg->name; reg++) {
1669                 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
1670                 if (!vreg)
1671                         return -ENOMEM;
1672
1673                 vreg->dev = dev;
1674                 vreg->base = reg->base;
1675                 vreg->regmap = regmap;
1676
1677                 if (reg->ocp) {
1678                         vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp);
1679                         if (vreg->ocp_irq < 0) {
1680                                 ret = vreg->ocp_irq;
1681                                 goto err;
1682                         }
1683                 }
1684
1685                 vreg->desc.id = -1;
1686                 vreg->desc.owner = THIS_MODULE;
1687                 vreg->desc.type = REGULATOR_VOLTAGE;
1688                 vreg->desc.enable_reg = reg->base + SPMI_COMMON_REG_ENABLE;
1689                 vreg->desc.enable_mask = SPMI_COMMON_ENABLE_MASK;
1690                 vreg->desc.enable_val = SPMI_COMMON_ENABLE;
1691                 vreg->desc.name = name = reg->name;
1692                 vreg->desc.supply_name = reg->supply;
1693                 vreg->desc.of_match = reg->name;
1694                 vreg->desc.of_parse_cb = spmi_regulator_of_parse;
1695                 vreg->desc.of_map_mode = spmi_regulator_of_map_mode;
1696
1697                 ret = spmi_regulator_match(vreg, reg->force_type);
1698                 if (ret)
1699                         continue;
1700
1701                 config.dev = dev;
1702                 config.driver_data = vreg;
1703                 config.regmap = regmap;
1704                 rdev = devm_regulator_register(dev, &vreg->desc, &config);
1705                 if (IS_ERR(rdev)) {
1706                         dev_err(dev, "failed to register %s\n", name);
1707                         ret = PTR_ERR(rdev);
1708                         goto err;
1709                 }
1710
1711                 INIT_LIST_HEAD(&vreg->node);
1712                 list_add(&vreg->node, vreg_list);
1713         }
1714
1715         return 0;
1716
1717 err:
1718         list_for_each_entry(vreg, vreg_list, node)
1719                 if (vreg->ocp_irq)
1720                         cancel_delayed_work_sync(&vreg->ocp_work);
1721         return ret;
1722 }
1723
1724 static int qcom_spmi_regulator_remove(struct platform_device *pdev)
1725 {
1726         struct spmi_regulator *vreg;
1727         struct list_head *vreg_list = platform_get_drvdata(pdev);
1728
1729         list_for_each_entry(vreg, vreg_list, node)
1730                 if (vreg->ocp_irq)
1731                         cancel_delayed_work_sync(&vreg->ocp_work);
1732
1733         return 0;
1734 }
1735
1736 static struct platform_driver qcom_spmi_regulator_driver = {
1737         .driver         = {
1738                 .name   = "qcom-spmi-regulator",
1739                 .of_match_table = qcom_spmi_regulator_match,
1740         },
1741         .probe          = qcom_spmi_regulator_probe,
1742         .remove         = qcom_spmi_regulator_remove,
1743 };
1744 module_platform_driver(qcom_spmi_regulator_driver);
1745
1746 MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver");
1747 MODULE_LICENSE("GPL v2");
1748 MODULE_ALIAS("platform:qcom-spmi-regulator");