Merge tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw...
[sfrench/cifs-2.6.git] / drivers / pinctrl / intel / pinctrl-cedarfork.c
1 /*
2  * Intel Cedar Fork PCH pinctrl/GPIO driver
3  *
4  * Copyright (C) 2017, Intel Corporation
5  * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/acpi.h>
13 #include <linux/module.h>
14 #include <linux/platform_device.h>
15 #include <linux/pm.h>
16 #include <linux/pinctrl/pinctrl.h>
17
18 #include "pinctrl-intel.h"
19
20 #define CDF_PAD_OWN     0x020
21 #define CDF_PADCFGLOCK  0x0c0
22 #define CDF_HOSTSW_OWN  0x120
23 #define CDF_GPI_IS      0x200
24 #define CDF_GPI_IE      0x230
25
26 #define CDF_GPP(r, s, e)                                \
27         {                                               \
28                 .reg_num = (r),                         \
29                 .base = (s),                            \
30                 .size = ((e) - (s) + 1),                \
31         }
32
33 #define CDF_COMMUNITY(b, s, e, g)                       \
34         {                                               \
35                 .barno = (b),                           \
36                 .padown_offset = CDF_PAD_OWN,           \
37                 .padcfglock_offset = CDF_PADCFGLOCK,    \
38                 .hostown_offset = CDF_HOSTSW_OWN,       \
39                 .is_offset = CDF_GPI_IS,                \
40                 .ie_offset = CDF_GPI_IE,                \
41                 .pin_base = (s),                        \
42                 .npins = ((e) - (s) + 1),               \
43                 .gpps = (g),                            \
44                 .ngpps = ARRAY_SIZE(g),                 \
45         }
46
47 /* Cedar Fork PCH */
48 static const struct pinctrl_pin_desc cdf_pins[] = {
49         /* WEST2 */
50         PINCTRL_PIN(0, "GBE_SDP_TIMESYNC0_S2N"),
51         PINCTRL_PIN(1, "GBE_SDP_TIMESYNC1_S2N"),
52         PINCTRL_PIN(2, "GBE_SDP_TIMESYNC2_S2N"),
53         PINCTRL_PIN(3, "GBE_SDP_TIMESYNC3_S2N"),
54         PINCTRL_PIN(4, "GBE0_I2C_CLK"),
55         PINCTRL_PIN(5, "GBE0_I2C_DATA"),
56         PINCTRL_PIN(6, "GBE1_I2C_CLK"),
57         PINCTRL_PIN(7, "GBE1_I2C_DATA"),
58         PINCTRL_PIN(8, "GBE2_I2C_CLK"),
59         PINCTRL_PIN(9, "GBE2_I2C_DATA"),
60         PINCTRL_PIN(10, "GBE3_I2C_CLK"),
61         PINCTRL_PIN(11, "GBE3_I2C_DATA"),
62         PINCTRL_PIN(12, "GBE0_LED0"),
63         PINCTRL_PIN(13, "GBE0_LED1"),
64         PINCTRL_PIN(14, "GBE0_LED2"),
65         PINCTRL_PIN(15, "GBE1_LED0"),
66         PINCTRL_PIN(16, "GBE1_LED1"),
67         PINCTRL_PIN(17, "GBE1_LED2"),
68         PINCTRL_PIN(18, "GBE2_LED0"),
69         PINCTRL_PIN(19, "GBE2_LED1"),
70         PINCTRL_PIN(20, "GBE2_LED2"),
71         PINCTRL_PIN(21, "GBE3_LED0"),
72         PINCTRL_PIN(22, "GBE3_LED1"),
73         PINCTRL_PIN(23, "GBE3_LED2"),
74         /* WEST3 */
75         PINCTRL_PIN(24, "NCSI_RXD0"),
76         PINCTRL_PIN(25, "NCSI_CLK_IN"),
77         PINCTRL_PIN(26, "NCSI_RXD1"),
78         PINCTRL_PIN(27, "NCSI_CRS_DV"),
79         PINCTRL_PIN(28, "NCSI_ARB_IN"),
80         PINCTRL_PIN(29, "NCSI_TX_EN"),
81         PINCTRL_PIN(30, "NCSI_TXD0"),
82         PINCTRL_PIN(31, "NCSI_TXD1"),
83         PINCTRL_PIN(32, "NCSI_ARB_OUT"),
84         PINCTRL_PIN(33, "GBE_SMB_CLK"),
85         PINCTRL_PIN(34, "GBE_SMB_DATA"),
86         PINCTRL_PIN(35, "GBE_SMB_ALRT_N"),
87         PINCTRL_PIN(36, "THERMTRIP_N"),
88         PINCTRL_PIN(37, "PCHHOT_N"),
89         PINCTRL_PIN(38, "ERROR0_N"),
90         PINCTRL_PIN(39, "ERROR1_N"),
91         PINCTRL_PIN(40, "ERROR2_N"),
92         PINCTRL_PIN(41, "MSMI_N"),
93         PINCTRL_PIN(42, "CATERR_N"),
94         PINCTRL_PIN(43, "MEMTRIP_N"),
95         PINCTRL_PIN(44, "UART0_RXD"),
96         PINCTRL_PIN(45, "UART0_TXD"),
97         PINCTRL_PIN(46, "UART1_RXD"),
98         PINCTRL_PIN(47, "UART1_TXD"),
99         /* WEST01 */
100         PINCTRL_PIN(48, "GBE_GPIO13"),
101         PINCTRL_PIN(49, "AUX_PWR"),
102         PINCTRL_PIN(50, "CPU_GP_2"),
103         PINCTRL_PIN(51, "CPU_GP_3"),
104         PINCTRL_PIN(52, "FAN_PWM_0"),
105         PINCTRL_PIN(53, "FAN_PWM_1"),
106         PINCTRL_PIN(54, "FAN_PWM_2"),
107         PINCTRL_PIN(55, "FAN_PWM_3"),
108         PINCTRL_PIN(56, "FAN_TACH_0"),
109         PINCTRL_PIN(57, "FAN_TACH_1"),
110         PINCTRL_PIN(58, "FAN_TACH_2"),
111         PINCTRL_PIN(59, "FAN_TACH_3"),
112         PINCTRL_PIN(60, "ME_SMB0_CLK"),
113         PINCTRL_PIN(61, "ME_SMB0_DATA"),
114         PINCTRL_PIN(62, "ME_SMB0_ALRT_N"),
115         PINCTRL_PIN(63, "ME_SMB1_CLK"),
116         PINCTRL_PIN(64, "ME_SMB1_DATA"),
117         PINCTRL_PIN(65, "ME_SMB1_ALRT_N"),
118         PINCTRL_PIN(66, "ME_SMB2_CLK"),
119         PINCTRL_PIN(67, "ME_SMB2_DATA"),
120         PINCTRL_PIN(68, "ME_SMB2_ALRT_N"),
121         PINCTRL_PIN(69, "GBE_MNG_I2C_CLK"),
122         PINCTRL_PIN(70, "GBE_MNG_I2C_DATA"),
123         /* WEST5 */
124         PINCTRL_PIN(71, "IE_UART_RXD"),
125         PINCTRL_PIN(72, "IE_UART_TXD"),
126         PINCTRL_PIN(73, "VPP_SMB_CLK"),
127         PINCTRL_PIN(74, "VPP_SMB_DATA"),
128         PINCTRL_PIN(75, "VPP_SMB_ALRT_N"),
129         PINCTRL_PIN(76, "PCIE_CLKREQ0_N"),
130         PINCTRL_PIN(77, "PCIE_CLKREQ1_N"),
131         PINCTRL_PIN(78, "PCIE_CLKREQ2_N"),
132         PINCTRL_PIN(79, "PCIE_CLKREQ3_N"),
133         PINCTRL_PIN(80, "PCIE_CLKREQ4_N"),
134         PINCTRL_PIN(81, "PCIE_CLKREQ5_N"),
135         PINCTRL_PIN(82, "PCIE_CLKREQ6_N"),
136         PINCTRL_PIN(83, "PCIE_CLKREQ7_N"),
137         PINCTRL_PIN(84, "PCIE_CLKREQ8_N"),
138         PINCTRL_PIN(85, "PCIE_CLKREQ9_N"),
139         PINCTRL_PIN(86, "FLEX_CLK_SE0"),
140         PINCTRL_PIN(87, "FLEX_CLK_SE1"),
141         PINCTRL_PIN(88, "FLEX_CLK1_50"),
142         PINCTRL_PIN(89, "FLEX_CLK2_50"),
143         PINCTRL_PIN(90, "FLEX_CLK_125"),
144         /* WESTC */
145         PINCTRL_PIN(91, "TCK_PCH"),
146         PINCTRL_PIN(92, "JTAGX_PCH"),
147         PINCTRL_PIN(93, "TRST_N_PCH"),
148         PINCTRL_PIN(94, "TMS_PCH"),
149         PINCTRL_PIN(95, "TDI_PCH"),
150         PINCTRL_PIN(96, "TDO_PCH"),
151         /* WESTC_DFX */
152         PINCTRL_PIN(97, "CX_PRDY_N"),
153         PINCTRL_PIN(98, "CX_PREQ_N"),
154         PINCTRL_PIN(99, "CPU_FBREAK_OUT_N"),
155         PINCTRL_PIN(100, "TRIGGER0_N"),
156         PINCTRL_PIN(101, "TRIGGER1_N"),
157         /* WESTA */
158         PINCTRL_PIN(102, "DBG_PTI_CLK0"),
159         PINCTRL_PIN(103, "DBG_PTI_CLK3"),
160         PINCTRL_PIN(104, "DBG_PTI_DATA0"),
161         PINCTRL_PIN(105, "DBG_PTI_DATA1"),
162         PINCTRL_PIN(106, "DBG_PTI_DATA2"),
163         PINCTRL_PIN(107, "DBG_PTI_DATA3"),
164         PINCTRL_PIN(108, "DBG_PTI_DATA4"),
165         PINCTRL_PIN(109, "DBG_PTI_DATA5"),
166         PINCTRL_PIN(110, "DBG_PTI_DATA6"),
167         PINCTRL_PIN(111, "DBG_PTI_DATA7"),
168         /* WESTB */
169         PINCTRL_PIN(112, "DBG_PTI_DATA8"),
170         PINCTRL_PIN(113, "DBG_PTI_DATA9"),
171         PINCTRL_PIN(114, "DBG_PTI_DATA10"),
172         PINCTRL_PIN(115, "DBG_PTI_DATA11"),
173         PINCTRL_PIN(116, "DBG_PTI_DATA12"),
174         PINCTRL_PIN(117, "DBG_PTI_DATA13"),
175         PINCTRL_PIN(118, "DBG_PTI_DATA14"),
176         PINCTRL_PIN(119, "DBG_PTI_DATA15"),
177         PINCTRL_PIN(120, "DBG_SPARE0"),
178         PINCTRL_PIN(121, "DBG_SPARE1"),
179         PINCTRL_PIN(122, "DBG_SPARE2"),
180         PINCTRL_PIN(123, "DBG_SPARE3"),
181         /* WESTD */
182         PINCTRL_PIN(124, "CPU_PWR_GOOD"),
183         PINCTRL_PIN(125, "PLTRST_CPU_N"),
184         PINCTRL_PIN(126, "NAC_RESET_NAC_N"),
185         PINCTRL_PIN(127, "PCH_SBLINK_RX"),
186         PINCTRL_PIN(128, "PCH_SBLINK_TX"),
187         PINCTRL_PIN(129, "PMSYNC_CLK"),
188         PINCTRL_PIN(130, "CPU_ERR0_N"),
189         PINCTRL_PIN(131, "CPU_ERR1_N"),
190         PINCTRL_PIN(132, "CPU_ERR2_N"),
191         PINCTRL_PIN(133, "CPU_THERMTRIP_N"),
192         PINCTRL_PIN(134, "CPU_MSMI_N"),
193         PINCTRL_PIN(135, "CPU_CATERR_N"),
194         PINCTRL_PIN(136, "CPU_MEMTRIP_N"),
195         PINCTRL_PIN(137, "NAC_GR_N"),
196         PINCTRL_PIN(138, "NAC_XTAL_VALID"),
197         PINCTRL_PIN(139, "NAC_WAKE_N"),
198         PINCTRL_PIN(140, "NAC_SBLINK_CLK_S2N"),
199         PINCTRL_PIN(141, "NAC_SBLINK_N2S"),
200         PINCTRL_PIN(142, "NAC_SBLINK_S2N"),
201         PINCTRL_PIN(143, "NAC_SBLINK_CLK_N2S"),
202         /* WESTD_PECI */
203         PINCTRL_PIN(144, "ME_PECI"),
204         /* WESTF */
205         PINCTRL_PIN(145, "NAC_RMII_CLK"),
206         PINCTRL_PIN(146, "NAC_RGMII_CLK"),
207         PINCTRL_PIN(147, "NAC_SPARE0"),
208         PINCTRL_PIN(148, "NAC_SPARE1"),
209         PINCTRL_PIN(149, "NAC_SPARE2"),
210         PINCTRL_PIN(150, "NAC_INIT_SX_WAKE_N"),
211         PINCTRL_PIN(151, "NAC_GBE_GPIO0_S2N"),
212         PINCTRL_PIN(152, "NAC_GBE_GPIO1_S2N"),
213         PINCTRL_PIN(153, "NAC_GBE_GPIO2_S2N"),
214         PINCTRL_PIN(154, "NAC_GBE_GPIO3_S2N"),
215         PINCTRL_PIN(155, "NAC_NCSI_RXD0"),
216         PINCTRL_PIN(156, "NAC_NCSI_CLK_IN"),
217         PINCTRL_PIN(157, "NAC_NCSI_RXD1"),
218         PINCTRL_PIN(158, "NAC_NCSI_CRS_DV"),
219         PINCTRL_PIN(159, "NAC_NCSI_ARB_IN"),
220         PINCTRL_PIN(160, "NAC_NCSI_TX_EN"),
221         PINCTRL_PIN(161, "NAC_NCSI_TXD0"),
222         PINCTRL_PIN(162, "NAC_NCSI_TXD1"),
223         PINCTRL_PIN(163, "NAC_NCSI_ARB_OUT"),
224         PINCTRL_PIN(164, "NAC_NCSI_OE_N"),
225         PINCTRL_PIN(165, "NAC_GBE_SMB_CLK"),
226         PINCTRL_PIN(166, "NAC_GBE_SMB_DATA"),
227         PINCTRL_PIN(167, "NAC_GBE_SMB_ALRT_N"),
228         /* EAST2 */
229         PINCTRL_PIN(168, "USB_OC0_N"),
230         PINCTRL_PIN(169, "GBE_GPIO0"),
231         PINCTRL_PIN(170, "GBE_GPIO1"),
232         PINCTRL_PIN(171, "GBE_GPIO2"),
233         PINCTRL_PIN(172, "GBE_GPIO3"),
234         PINCTRL_PIN(173, "GBE_GPIO4"),
235         PINCTRL_PIN(174, "GBE_GPIO5"),
236         PINCTRL_PIN(175, "GBE_GPIO6"),
237         PINCTRL_PIN(176, "GBE_GPIO7"),
238         PINCTRL_PIN(177, "GBE_GPIO8"),
239         PINCTRL_PIN(178, "GBE_GPIO9"),
240         PINCTRL_PIN(179, "GBE_GPIO10"),
241         PINCTRL_PIN(180, "GBE_GPIO11"),
242         PINCTRL_PIN(181, "GBE_GPIO12"),
243         PINCTRL_PIN(182, "SATA0_LED_N"),
244         PINCTRL_PIN(183, "SATA1_LED_N"),
245         PINCTRL_PIN(184, "SATA_PDETECT0"),
246         PINCTRL_PIN(185, "SATA_PDETECT1"),
247         PINCTRL_PIN(186, "SATA0_SDOUT"),
248         PINCTRL_PIN(187, "SATA1_SDOUT"),
249         PINCTRL_PIN(188, "SATA2_LED_N"),
250         PINCTRL_PIN(189, "SATA_PDETECT2"),
251         PINCTRL_PIN(190, "SATA2_SDOUT"),
252         /* EAST3 */
253         PINCTRL_PIN(191, "ESPI_IO0"),
254         PINCTRL_PIN(192, "ESPI_IO1"),
255         PINCTRL_PIN(193, "ESPI_IO2"),
256         PINCTRL_PIN(194, "ESPI_IO3"),
257         PINCTRL_PIN(195, "ESPI_CLK"),
258         PINCTRL_PIN(196, "ESPI_RST_N"),
259         PINCTRL_PIN(197, "ESPI_CS0_N"),
260         PINCTRL_PIN(198, "ESPI_ALRT0_N"),
261         PINCTRL_PIN(199, "ESPI_CS1_N"),
262         PINCTRL_PIN(200, "ESPI_ALRT1_N"),
263         PINCTRL_PIN(201, "ESPI_CLK_LOOPBK"),
264         /* EAST0 */
265         PINCTRL_PIN(202, "SPI_CS0_N"),
266         PINCTRL_PIN(203, "SPI_CS1_N"),
267         PINCTRL_PIN(204, "SPI_MOSI_IO0"),
268         PINCTRL_PIN(205, "SPI_MISO_IO1"),
269         PINCTRL_PIN(206, "SPI_IO2"),
270         PINCTRL_PIN(207, "SPI_IO3"),
271         PINCTRL_PIN(208, "SPI_CLK"),
272         PINCTRL_PIN(209, "SPI_CLK_LOOPBK"),
273         PINCTRL_PIN(210, "SUSPWRDNACK"),
274         PINCTRL_PIN(211, "PMU_SUSCLK"),
275         PINCTRL_PIN(212, "ADR_COMPLETE"),
276         PINCTRL_PIN(213, "ADR_TRIGGER_N"),
277         PINCTRL_PIN(214, "PMU_SLP_S45_N"),
278         PINCTRL_PIN(215, "PMU_SLP_S3_N"),
279         PINCTRL_PIN(216, "PMU_WAKE_N"),
280         PINCTRL_PIN(217, "PMU_PWRBTN_N"),
281         PINCTRL_PIN(218, "PMU_RESETBUTTON_N"),
282         PINCTRL_PIN(219, "PMU_PLTRST_N"),
283         PINCTRL_PIN(220, "SUS_STAT_N"),
284         PINCTRL_PIN(221, "PMU_I2C_CLK"),
285         PINCTRL_PIN(222, "PMU_I2C_DATA"),
286         PINCTRL_PIN(223, "PECI_SMB_CLK"),
287         PINCTRL_PIN(224, "PECI_SMB_DATA"),
288         PINCTRL_PIN(225, "PECI_SMB_ALRT_N"),
289         /* EMMC */
290         PINCTRL_PIN(226, "EMMC_CMD"),
291         PINCTRL_PIN(227, "EMMC_STROBE"),
292         PINCTRL_PIN(228, "EMMC_CLK"),
293         PINCTRL_PIN(229, "EMMC_D0"),
294         PINCTRL_PIN(230, "EMMC_D1"),
295         PINCTRL_PIN(231, "EMMC_D2"),
296         PINCTRL_PIN(232, "EMMC_D3"),
297         PINCTRL_PIN(233, "EMMC_D4"),
298         PINCTRL_PIN(234, "EMMC_D5"),
299         PINCTRL_PIN(235, "EMMC_D6"),
300         PINCTRL_PIN(236, "EMMC_D7"),
301 };
302
303 static const struct intel_padgroup cdf_community0_gpps[] = {
304         CDF_GPP(0, 0, 23),      /* WEST2 */
305         CDF_GPP(1, 24, 47),     /* WEST3 */
306         CDF_GPP(2, 48, 70),     /* WEST01 */
307         CDF_GPP(3, 71, 90),     /* WEST5 */
308         CDF_GPP(4, 91, 96),     /* WESTC */
309         CDF_GPP(5, 97, 101),    /* WESTC_DFX */
310         CDF_GPP(6, 102, 111),   /* WESTA */
311         CDF_GPP(7, 112, 123),   /* WESTB */
312         CDF_GPP(8, 124, 143),   /* WESTD */
313         CDF_GPP(9, 144, 144),   /* WESTD_PECI */
314         CDF_GPP(10, 145, 167),  /* WESTF */
315 };
316
317 static const struct intel_padgroup cdf_community1_gpps[] = {
318         CDF_GPP(0, 168, 190),   /* EAST2 */
319         CDF_GPP(1, 191, 201),   /* EAST3 */
320         CDF_GPP(2, 202, 225),   /* EAST0 */
321         CDF_GPP(3, 226, 236),   /* EMMC */
322 };
323
324 static const struct intel_community cdf_communities[] = {
325         CDF_COMMUNITY(0, 0, 167, cdf_community0_gpps),          /* West */
326         CDF_COMMUNITY(1, 168, 236, cdf_community1_gpps),        /* East */
327 };
328
329 static const struct intel_pinctrl_soc_data cdf_soc_data = {
330         .pins = cdf_pins,
331         .npins = ARRAY_SIZE(cdf_pins),
332         .communities = cdf_communities,
333         .ncommunities = ARRAY_SIZE(cdf_communities),
334 };
335
336 static int cdf_pinctrl_probe(struct platform_device *pdev)
337 {
338         return intel_pinctrl_probe(pdev, &cdf_soc_data);
339 }
340
341 static const struct dev_pm_ops cdf_pinctrl_pm_ops = {
342         SET_LATE_SYSTEM_SLEEP_PM_OPS(intel_pinctrl_suspend,
343                                      intel_pinctrl_resume)
344 };
345
346 static const struct acpi_device_id cdf_pinctrl_acpi_match[] = {
347         { "INTC3001" },
348         { }
349 };
350 MODULE_DEVICE_TABLE(acpi, cdf_pinctrl_acpi_match);
351
352 static struct platform_driver cdf_pinctrl_driver = {
353         .probe = cdf_pinctrl_probe,
354         .driver = {
355                 .name = "cedarfork-pinctrl",
356                 .acpi_match_table = cdf_pinctrl_acpi_match,
357                 .pm = &cdf_pinctrl_pm_ops,
358         },
359 };
360
361 static int __init cdf_pinctrl_init(void)
362 {
363         return platform_driver_register(&cdf_pinctrl_driver);
364 }
365 subsys_initcall(cdf_pinctrl_init);
366
367 static void __exit cdf_pinctrl_exit(void)
368 {
369         platform_driver_unregister(&cdf_pinctrl_driver);
370 }
371 module_exit(cdf_pinctrl_exit);
372
373 MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
374 MODULE_DESCRIPTION("Intel Cedar Fork PCH pinctrl/GPIO driver");
375 MODULE_LICENSE("GPL v2");