1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe AER software error injection support.
5 * Debuging PCIe AER code is quite difficult because it is hard to
6 * trigger various real hardware errors. Software based error
7 * injection can fake almost all kinds of errors with the help of a
8 * user space helper tool aer-inject, which can be gotten from:
9 * http://www.kernel.org/pub/linux/utils/pci/aer-inject/
11 * Copyright 2009 Intel Corporation.
12 * Huang Ying <ying.huang@intel.com>
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/miscdevice.h>
18 #include <linux/pci.h>
19 #include <linux/slab.h>
21 #include <linux/uaccess.h>
22 #include <linux/stddef.h>
23 #include <linux/device.h>
26 /* Override the existing corrected and uncorrected error masks */
27 static bool aer_mask_override;
28 module_param(aer_mask_override, bool, 0);
30 struct aer_error_inj {
44 struct list_head list;
61 struct list_head list;
66 static LIST_HEAD(einjected);
68 static LIST_HEAD(pci_bus_ops_list);
70 /* Protect einjected and pci_bus_ops_list */
71 static DEFINE_SPINLOCK(inject_lock);
73 static void aer_error_init(struct aer_error *err, u32 domain,
74 unsigned int bus, unsigned int devfn,
77 INIT_LIST_HEAD(&err->list);
81 err->pos_cap_err = pos_cap_err;
84 /* inject_lock must be held before calling */
85 static struct aer_error *__find_aer_error(u32 domain, unsigned int bus,
88 struct aer_error *err;
90 list_for_each_entry(err, &einjected, list) {
91 if (domain == err->domain &&
99 /* inject_lock must be held before calling */
100 static struct aer_error *__find_aer_error_by_dev(struct pci_dev *dev)
102 int domain = pci_domain_nr(dev->bus);
105 return __find_aer_error(domain, dev->bus->number, dev->devfn);
108 /* inject_lock must be held before calling */
109 static struct pci_ops *__find_pci_bus_ops(struct pci_bus *bus)
111 struct pci_bus_ops *bus_ops;
113 list_for_each_entry(bus_ops, &pci_bus_ops_list, list) {
114 if (bus_ops->bus == bus)
120 static struct pci_bus_ops *pci_bus_ops_pop(void)
123 struct pci_bus_ops *bus_ops;
125 spin_lock_irqsave(&inject_lock, flags);
126 bus_ops = list_first_entry_or_null(&pci_bus_ops_list,
127 struct pci_bus_ops, list);
129 list_del(&bus_ops->list);
130 spin_unlock_irqrestore(&inject_lock, flags);
134 static u32 *find_pci_config_dword(struct aer_error *err, int where,
140 if (err->pos_cap_err == -1)
143 switch (where - err->pos_cap_err) {
144 case PCI_ERR_UNCOR_STATUS:
145 target = &err->uncor_status;
148 case PCI_ERR_COR_STATUS:
149 target = &err->cor_status;
152 case PCI_ERR_HEADER_LOG:
153 target = &err->header_log0;
155 case PCI_ERR_HEADER_LOG+4:
156 target = &err->header_log1;
158 case PCI_ERR_HEADER_LOG+8:
159 target = &err->header_log2;
161 case PCI_ERR_HEADER_LOG+12:
162 target = &err->header_log3;
164 case PCI_ERR_ROOT_STATUS:
165 target = &err->root_status;
168 case PCI_ERR_ROOT_ERR_SRC:
169 target = &err->source_id;
177 static int aer_inj_read_config(struct pci_bus *bus, unsigned int devfn,
178 int where, int size, u32 *val)
181 struct aer_error *err;
184 struct pci_ops *my_ops;
188 spin_lock_irqsave(&inject_lock, flags);
189 if (size != sizeof(u32))
191 domain = pci_domain_nr(bus);
194 err = __find_aer_error(domain, bus->number, devfn);
198 sim = find_pci_config_dword(err, where, NULL);
201 spin_unlock_irqrestore(&inject_lock, flags);
205 ops = __find_pci_bus_ops(bus);
207 * pci_lock must already be held, so we can directly
208 * manipulate bus->ops. Many config access functions,
209 * including pci_generic_config_read() require the original
210 * bus->ops be installed to function, so temporarily put them
215 rv = ops->read(bus, devfn, where, size, val);
217 spin_unlock_irqrestore(&inject_lock, flags);
221 static int aer_inj_write_config(struct pci_bus *bus, unsigned int devfn,
222 int where, int size, u32 val)
225 struct aer_error *err;
229 struct pci_ops *my_ops;
233 spin_lock_irqsave(&inject_lock, flags);
234 if (size != sizeof(u32))
236 domain = pci_domain_nr(bus);
239 err = __find_aer_error(domain, bus->number, devfn);
243 sim = find_pci_config_dword(err, where, &rw1cs);
249 spin_unlock_irqrestore(&inject_lock, flags);
253 ops = __find_pci_bus_ops(bus);
255 * pci_lock must already be held, so we can directly
256 * manipulate bus->ops. Many config access functions,
257 * including pci_generic_config_write() require the original
258 * bus->ops be installed to function, so temporarily put them
263 rv = ops->write(bus, devfn, where, size, val);
265 spin_unlock_irqrestore(&inject_lock, flags);
269 static struct pci_ops aer_inj_pci_ops = {
270 .read = aer_inj_read_config,
271 .write = aer_inj_write_config,
274 static void pci_bus_ops_init(struct pci_bus_ops *bus_ops,
278 INIT_LIST_HEAD(&bus_ops->list);
283 static int pci_bus_set_aer_ops(struct pci_bus *bus)
286 struct pci_bus_ops *bus_ops;
289 bus_ops = kmalloc(sizeof(*bus_ops), GFP_KERNEL);
292 ops = pci_bus_set_ops(bus, &aer_inj_pci_ops);
293 spin_lock_irqsave(&inject_lock, flags);
294 if (ops == &aer_inj_pci_ops)
296 pci_bus_ops_init(bus_ops, bus, ops);
297 list_add(&bus_ops->list, &pci_bus_ops_list);
300 spin_unlock_irqrestore(&inject_lock, flags);
305 static int find_aer_device_iter(struct device *device, void *data)
307 struct pcie_device **result = data;
308 struct pcie_device *pcie_dev;
310 if (device->bus == &pcie_port_bus_type) {
311 pcie_dev = to_pcie_device(device);
312 if (pcie_dev->service & PCIE_PORT_SERVICE_AER) {
320 static int find_aer_device(struct pci_dev *dev, struct pcie_device **result)
322 return device_for_each_child(&dev->dev, result, find_aer_device_iter);
325 static int aer_inject(struct aer_error_inj *einj)
327 struct aer_error *err, *rperr;
328 struct aer_error *err_alloc = NULL, *rperr_alloc = NULL;
329 struct pci_dev *dev, *rpdev;
330 struct pcie_device *edev;
332 unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
333 int pos_cap_err, rp_pos_cap_err;
334 u32 sever, cor_mask, uncor_mask, cor_mask_orig = 0, uncor_mask_orig = 0;
337 dev = pci_get_domain_bus_and_slot(einj->domain, einj->bus, devfn);
340 rpdev = pcie_find_root_port(dev);
342 pci_err(dev, "aer_inject: Root port not found\n");
347 pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
349 pci_err(dev, "aer_inject: Device doesn't support AER\n");
350 ret = -EPROTONOSUPPORT;
353 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
354 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &cor_mask);
355 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
358 rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
359 if (!rp_pos_cap_err) {
360 pci_err(rpdev, "aer_inject: Root port doesn't support AER\n");
361 ret = -EPROTONOSUPPORT;
365 err_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL);
370 rperr_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL);
376 if (aer_mask_override) {
377 cor_mask_orig = cor_mask;
378 cor_mask &= !(einj->cor_status);
379 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
382 uncor_mask_orig = uncor_mask;
383 uncor_mask &= !(einj->uncor_status);
384 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
388 spin_lock_irqsave(&inject_lock, flags);
390 err = __find_aer_error_by_dev(dev);
394 aer_error_init(err, einj->domain, einj->bus, devfn,
396 list_add(&err->list, &einjected);
398 err->uncor_status |= einj->uncor_status;
399 err->cor_status |= einj->cor_status;
400 err->header_log0 = einj->header_log0;
401 err->header_log1 = einj->header_log1;
402 err->header_log2 = einj->header_log2;
403 err->header_log3 = einj->header_log3;
405 if (!aer_mask_override && einj->cor_status &&
406 !(einj->cor_status & ~cor_mask)) {
408 pci_warn(dev, "aer_inject: The correctable error(s) is masked by device\n");
409 spin_unlock_irqrestore(&inject_lock, flags);
412 if (!aer_mask_override && einj->uncor_status &&
413 !(einj->uncor_status & ~uncor_mask)) {
415 pci_warn(dev, "aer_inject: The uncorrectable error(s) is masked by device\n");
416 spin_unlock_irqrestore(&inject_lock, flags);
420 rperr = __find_aer_error_by_dev(rpdev);
424 aer_error_init(rperr, pci_domain_nr(rpdev->bus),
425 rpdev->bus->number, rpdev->devfn,
427 list_add(&rperr->list, &einjected);
429 if (einj->cor_status) {
430 if (rperr->root_status & PCI_ERR_ROOT_COR_RCV)
431 rperr->root_status |= PCI_ERR_ROOT_MULTI_COR_RCV;
433 rperr->root_status |= PCI_ERR_ROOT_COR_RCV;
434 rperr->source_id &= 0xffff0000;
435 rperr->source_id |= (einj->bus << 8) | devfn;
437 if (einj->uncor_status) {
438 if (rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV)
439 rperr->root_status |= PCI_ERR_ROOT_MULTI_UNCOR_RCV;
440 if (sever & einj->uncor_status) {
441 rperr->root_status |= PCI_ERR_ROOT_FATAL_RCV;
442 if (!(rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV))
443 rperr->root_status |= PCI_ERR_ROOT_FIRST_FATAL;
445 rperr->root_status |= PCI_ERR_ROOT_NONFATAL_RCV;
446 rperr->root_status |= PCI_ERR_ROOT_UNCOR_RCV;
447 rperr->source_id &= 0x0000ffff;
448 rperr->source_id |= ((einj->bus << 8) | devfn) << 16;
450 spin_unlock_irqrestore(&inject_lock, flags);
452 if (aer_mask_override) {
453 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
455 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
459 ret = pci_bus_set_aer_ops(dev->bus);
462 ret = pci_bus_set_aer_ops(rpdev->bus);
466 if (find_aer_device(rpdev, &edev)) {
467 if (!get_service_data(edev)) {
468 dev_warn(&edev->device,
469 "aer_inject: AER service is not initialized\n");
470 ret = -EPROTONOSUPPORT;
473 dev_info(&edev->device,
474 "aer_inject: Injecting errors %08x/%08x into device %s\n",
475 einj->cor_status, einj->uncor_status, pci_name(dev));
478 pci_err(rpdev, "aer_inject: AER device not found\n");
488 static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf,
489 size_t usize, loff_t *off)
491 struct aer_error_inj einj;
494 if (!capable(CAP_SYS_ADMIN))
496 if (usize < offsetof(struct aer_error_inj, domain) ||
497 usize > sizeof(einj))
500 memset(&einj, 0, sizeof(einj));
501 if (copy_from_user(&einj, ubuf, usize))
504 ret = aer_inject(&einj);
505 return ret ? ret : usize;
508 static const struct file_operations aer_inject_fops = {
509 .write = aer_inject_write,
510 .owner = THIS_MODULE,
511 .llseek = noop_llseek,
514 static struct miscdevice aer_inject_device = {
515 .minor = MISC_DYNAMIC_MINOR,
516 .name = "aer_inject",
517 .fops = &aer_inject_fops,
520 static int __init aer_inject_init(void)
522 return misc_register(&aer_inject_device);
525 static void __exit aer_inject_exit(void)
527 struct aer_error *err, *err_next;
529 struct pci_bus_ops *bus_ops;
531 misc_deregister(&aer_inject_device);
533 while ((bus_ops = pci_bus_ops_pop())) {
534 pci_bus_set_ops(bus_ops->bus, bus_ops->ops);
538 spin_lock_irqsave(&inject_lock, flags);
539 list_for_each_entry_safe(err, err_next, &einjected, list) {
540 list_del(&err->list);
543 spin_unlock_irqrestore(&inject_lock, flags);
546 module_init(aer_inject_init);
547 module_exit(aer_inject_exit);
549 MODULE_DESCRIPTION("PCIe AER software error injector");
550 MODULE_LICENSE("GPL");