Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[sfrench/cifs-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #define DRV_NAME        "iwlagn"
49
50 #include "iwl-eeprom.h"
51 #include "iwl-dev.h"
52 #include "iwl-core.h"
53 #include "iwl-io.h"
54 #include "iwl-helpers.h"
55 #include "iwl-sta.h"
56 #include "iwl-calib.h"
57
58
59 /******************************************************************************
60  *
61  * module boiler plate
62  *
63  ******************************************************************************/
64
65 /*
66  * module name, copyright, version, etc.
67  */
68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
69
70 #ifdef CONFIG_IWLWIFI_DEBUG
71 #define VD "d"
72 #else
73 #define VD
74 #endif
75
76 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
77 #define VS "s"
78 #else
79 #define VS
80 #endif
81
82 #define DRV_VERSION     IWLWIFI_VERSION VD VS
83
84
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89 MODULE_ALIAS("iwl4965");
90
91 /*************** STATION TABLE MANAGEMENT ****
92  * mac80211 should be examined to determine if sta_info is duplicating
93  * the functionality provided here
94  */
95
96 /**************************************************************/
97
98 /**
99  * iwl_commit_rxon - commit staging_rxon to hardware
100  *
101  * The RXON command in staging_rxon is committed to the hardware and
102  * the active_rxon structure is updated with the new data.  This
103  * function correctly transitions out of the RXON_ASSOC_MSK state if
104  * a HW tune is required based on the RXON structure changes.
105  */
106 int iwl_commit_rxon(struct iwl_priv *priv)
107 {
108         /* cast away the const for active_rxon in this function */
109         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
110         int ret;
111         bool new_assoc =
112                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
113
114         if (!iwl_is_alive(priv))
115                 return -EBUSY;
116
117         /* always get timestamp with Rx frame */
118         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
119
120         ret = iwl_check_rxon_cmd(priv);
121         if (ret) {
122                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
123                 return -EINVAL;
124         }
125
126         /* If we don't need to send a full RXON, we can use
127          * iwl_rxon_assoc_cmd which is used to reconfigure filter
128          * and other flags for the current radio configuration. */
129         if (!iwl_full_rxon_required(priv)) {
130                 ret = iwl_send_rxon_assoc(priv);
131                 if (ret) {
132                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
133                         return ret;
134                 }
135
136                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
137                 return 0;
138         }
139
140         /* station table will be cleared */
141         priv->assoc_station_added = 0;
142
143         /* If we are currently associated and the new config requires
144          * an RXON_ASSOC and the new config wants the associated mask enabled,
145          * we must clear the associated from the active configuration
146          * before we apply the new config */
147         if (iwl_is_associated(priv) && new_assoc) {
148                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
149                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
150
151                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
152                                       sizeof(struct iwl_rxon_cmd),
153                                       &priv->active_rxon);
154
155                 /* If the mask clearing failed then we set
156                  * active_rxon back to what it was previously */
157                 if (ret) {
158                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
159                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
160                         return ret;
161                 }
162         }
163
164         IWL_DEBUG_INFO(priv, "Sending RXON\n"
165                        "* with%s RXON_FILTER_ASSOC_MSK\n"
166                        "* channel = %d\n"
167                        "* bssid = %pM\n",
168                        (new_assoc ? "" : "out"),
169                        le16_to_cpu(priv->staging_rxon.channel),
170                        priv->staging_rxon.bssid_addr);
171
172         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
173
174         /* Apply the new configuration
175          * RXON unassoc clears the station table in uCode, send it before
176          * we add the bcast station. If assoc bit is set, we will send RXON
177          * after having added the bcast and bssid station.
178          */
179         if (!new_assoc) {
180                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
181                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
182                 if (ret) {
183                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
184                         return ret;
185                 }
186                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
187         }
188
189         iwl_clear_stations_table(priv);
190
191         priv->start_calib = 0;
192
193         /* Add the broadcast address so we can send broadcast frames */
194         if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
195                                                 IWL_INVALID_STATION) {
196                 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
197                 return -EIO;
198         }
199
200         /* If we have set the ASSOC_MSK and we are in BSS mode then
201          * add the IWL_AP_ID to the station rate table */
202         if (new_assoc) {
203                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
204                         ret = iwl_rxon_add_station(priv,
205                                            priv->active_rxon.bssid_addr, 1);
206                         if (ret == IWL_INVALID_STATION) {
207                                 IWL_ERR(priv,
208                                         "Error adding AP address for TX.\n");
209                                 return -EIO;
210                         }
211                         priv->assoc_station_added = 1;
212                         if (priv->default_wep_key &&
213                             iwl_send_static_wepkey_cmd(priv, 0))
214                                 IWL_ERR(priv,
215                                         "Could not send WEP static key.\n");
216                 }
217
218                 /*
219                  * allow CTS-to-self if possible for new association.
220                  * this is relevant only for 5000 series and up,
221                  * but will not damage 4965
222                  */
223                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
224
225                 /* Apply the new configuration
226                  * RXON assoc doesn't clear the station table in uCode,
227                  */
228                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
229                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
230                 if (ret) {
231                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
232                         return ret;
233                 }
234                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
235         }
236
237         iwl_init_sensitivity(priv);
238
239         /* If we issue a new RXON command which required a tune then we must
240          * send a new TXPOWER command or we won't be able to Tx any frames */
241         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
242         if (ret) {
243                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
244                 return ret;
245         }
246
247         return 0;
248 }
249
250 void iwl_update_chain_flags(struct iwl_priv *priv)
251 {
252
253         if (priv->cfg->ops->hcmd->set_rxon_chain)
254                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
255         iwlcore_commit_rxon(priv);
256 }
257
258 static void iwl_clear_free_frames(struct iwl_priv *priv)
259 {
260         struct list_head *element;
261
262         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
263                        priv->frames_count);
264
265         while (!list_empty(&priv->free_frames)) {
266                 element = priv->free_frames.next;
267                 list_del(element);
268                 kfree(list_entry(element, struct iwl_frame, list));
269                 priv->frames_count--;
270         }
271
272         if (priv->frames_count) {
273                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
274                             priv->frames_count);
275                 priv->frames_count = 0;
276         }
277 }
278
279 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
280 {
281         struct iwl_frame *frame;
282         struct list_head *element;
283         if (list_empty(&priv->free_frames)) {
284                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
285                 if (!frame) {
286                         IWL_ERR(priv, "Could not allocate frame!\n");
287                         return NULL;
288                 }
289
290                 priv->frames_count++;
291                 return frame;
292         }
293
294         element = priv->free_frames.next;
295         list_del(element);
296         return list_entry(element, struct iwl_frame, list);
297 }
298
299 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
300 {
301         memset(frame, 0, sizeof(*frame));
302         list_add(&frame->list, &priv->free_frames);
303 }
304
305 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
306                                           struct ieee80211_hdr *hdr,
307                                           int left)
308 {
309         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
310             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
311              (priv->iw_mode != NL80211_IFTYPE_AP)))
312                 return 0;
313
314         if (priv->ibss_beacon->len > left)
315                 return 0;
316
317         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
318
319         return priv->ibss_beacon->len;
320 }
321
322 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
323                                        struct iwl_frame *frame, u8 rate)
324 {
325         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
326         unsigned int frame_size;
327
328         tx_beacon_cmd = &frame->u.beacon;
329         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
330
331         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
332         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
333
334         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
335                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
336
337         BUG_ON(frame_size > MAX_MPDU_SIZE);
338         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
339
340         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
341                 tx_beacon_cmd->tx.rate_n_flags =
342                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
343         else
344                 tx_beacon_cmd->tx.rate_n_flags =
345                         iwl_hw_set_rate_n_flags(rate, 0);
346
347         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
348                                      TX_CMD_FLG_TSF_MSK |
349                                      TX_CMD_FLG_STA_RATE_MSK;
350
351         return sizeof(*tx_beacon_cmd) + frame_size;
352 }
353 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
354 {
355         struct iwl_frame *frame;
356         unsigned int frame_size;
357         int rc;
358         u8 rate;
359
360         frame = iwl_get_free_frame(priv);
361
362         if (!frame) {
363                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
364                           "command.\n");
365                 return -ENOMEM;
366         }
367
368         rate = iwl_rate_get_lowest_plcp(priv);
369
370         frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
371
372         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
373                               &frame->u.cmd[0]);
374
375         iwl_free_frame(priv, frame);
376
377         return rc;
378 }
379
380 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
381 {
382         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
383
384         dma_addr_t addr = get_unaligned_le32(&tb->lo);
385         if (sizeof(dma_addr_t) > sizeof(u32))
386                 addr |=
387                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
388
389         return addr;
390 }
391
392 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
393 {
394         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
395
396         return le16_to_cpu(tb->hi_n_len) >> 4;
397 }
398
399 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
400                                   dma_addr_t addr, u16 len)
401 {
402         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
403         u16 hi_n_len = len << 4;
404
405         put_unaligned_le32(addr, &tb->lo);
406         if (sizeof(dma_addr_t) > sizeof(u32))
407                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
408
409         tb->hi_n_len = cpu_to_le16(hi_n_len);
410
411         tfd->num_tbs = idx + 1;
412 }
413
414 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
415 {
416         return tfd->num_tbs & 0x1f;
417 }
418
419 /**
420  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
421  * @priv - driver private data
422  * @txq - tx queue
423  *
424  * Does NOT advance any TFD circular buffer read/write indexes
425  * Does NOT free the TFD itself (which is within circular buffer)
426  */
427 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
428 {
429         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
430         struct iwl_tfd *tfd;
431         struct pci_dev *dev = priv->pci_dev;
432         int index = txq->q.read_ptr;
433         int i;
434         int num_tbs;
435
436         tfd = &tfd_tmp[index];
437
438         /* Sanity check on number of chunks */
439         num_tbs = iwl_tfd_get_num_tbs(tfd);
440
441         if (num_tbs >= IWL_NUM_OF_TBS) {
442                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
443                 /* @todo issue fatal error, it is quite serious situation */
444                 return;
445         }
446
447         /* Unmap tx_cmd */
448         if (num_tbs)
449                 pci_unmap_single(dev,
450                                 pci_unmap_addr(&txq->meta[index], mapping),
451                                 pci_unmap_len(&txq->meta[index], len),
452                                 PCI_DMA_BIDIRECTIONAL);
453
454         /* Unmap chunks, if any. */
455         for (i = 1; i < num_tbs; i++) {
456                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
457                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
458
459                 if (txq->txb) {
460                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
461                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
462                 }
463         }
464 }
465
466 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
467                                  struct iwl_tx_queue *txq,
468                                  dma_addr_t addr, u16 len,
469                                  u8 reset, u8 pad)
470 {
471         struct iwl_queue *q;
472         struct iwl_tfd *tfd, *tfd_tmp;
473         u32 num_tbs;
474
475         q = &txq->q;
476         tfd_tmp = (struct iwl_tfd *)txq->tfds;
477         tfd = &tfd_tmp[q->write_ptr];
478
479         if (reset)
480                 memset(tfd, 0, sizeof(*tfd));
481
482         num_tbs = iwl_tfd_get_num_tbs(tfd);
483
484         /* Each TFD can point to a maximum 20 Tx buffers */
485         if (num_tbs >= IWL_NUM_OF_TBS) {
486                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
487                           IWL_NUM_OF_TBS);
488                 return -EINVAL;
489         }
490
491         BUG_ON(addr & ~DMA_BIT_MASK(36));
492         if (unlikely(addr & ~IWL_TX_DMA_MASK))
493                 IWL_ERR(priv, "Unaligned address = %llx\n",
494                           (unsigned long long)addr);
495
496         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
497
498         return 0;
499 }
500
501 /*
502  * Tell nic where to find circular buffer of Tx Frame Descriptors for
503  * given Tx queue, and enable the DMA channel used for that queue.
504  *
505  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
506  * channels supported in hardware.
507  */
508 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
509                          struct iwl_tx_queue *txq)
510 {
511         int txq_id = txq->q.id;
512
513         /* Circular buffer (TFD queue in DRAM) physical base address */
514         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
515                              txq->q.dma_addr >> 8);
516
517         return 0;
518 }
519
520 /******************************************************************************
521  *
522  * Generic RX handler implementations
523  *
524  ******************************************************************************/
525 static void iwl_rx_reply_alive(struct iwl_priv *priv,
526                                 struct iwl_rx_mem_buffer *rxb)
527 {
528         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
529         struct iwl_alive_resp *palive;
530         struct delayed_work *pwork;
531
532         palive = &pkt->u.alive_frame;
533
534         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
535                        "0x%01X 0x%01X\n",
536                        palive->is_valid, palive->ver_type,
537                        palive->ver_subtype);
538
539         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
540                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
541                 memcpy(&priv->card_alive_init,
542                        &pkt->u.alive_frame,
543                        sizeof(struct iwl_init_alive_resp));
544                 pwork = &priv->init_alive_start;
545         } else {
546                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
547                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
548                        sizeof(struct iwl_alive_resp));
549                 pwork = &priv->alive_start;
550         }
551
552         /* We delay the ALIVE response by 5ms to
553          * give the HW RF Kill time to activate... */
554         if (palive->is_valid == UCODE_VALID_OK)
555                 queue_delayed_work(priv->workqueue, pwork,
556                                    msecs_to_jiffies(5));
557         else
558                 IWL_WARN(priv, "uCode did not respond OK.\n");
559 }
560
561 static void iwl_bg_beacon_update(struct work_struct *work)
562 {
563         struct iwl_priv *priv =
564                 container_of(work, struct iwl_priv, beacon_update);
565         struct sk_buff *beacon;
566
567         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
568         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
569
570         if (!beacon) {
571                 IWL_ERR(priv, "update beacon failed\n");
572                 return;
573         }
574
575         mutex_lock(&priv->mutex);
576         /* new beacon skb is allocated every time; dispose previous.*/
577         if (priv->ibss_beacon)
578                 dev_kfree_skb(priv->ibss_beacon);
579
580         priv->ibss_beacon = beacon;
581         mutex_unlock(&priv->mutex);
582
583         iwl_send_beacon_cmd(priv);
584 }
585
586 /**
587  * iwl_bg_statistics_periodic - Timer callback to queue statistics
588  *
589  * This callback is provided in order to send a statistics request.
590  *
591  * This timer function is continually reset to execute within
592  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
593  * was received.  We need to ensure we receive the statistics in order
594  * to update the temperature used for calibrating the TXPOWER.
595  */
596 static void iwl_bg_statistics_periodic(unsigned long data)
597 {
598         struct iwl_priv *priv = (struct iwl_priv *)data;
599
600         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
601                 return;
602
603         /* dont send host command if rf-kill is on */
604         if (!iwl_is_ready_rf(priv))
605                 return;
606
607         iwl_send_statistics_request(priv, CMD_ASYNC);
608 }
609
610 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
611                                 struct iwl_rx_mem_buffer *rxb)
612 {
613 #ifdef CONFIG_IWLWIFI_DEBUG
614         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
615         struct iwl4965_beacon_notif *beacon =
616                 (struct iwl4965_beacon_notif *)pkt->u.raw;
617         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
618
619         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
620                 "tsf %d %d rate %d\n",
621                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
622                 beacon->beacon_notify_hdr.failure_frame,
623                 le32_to_cpu(beacon->ibss_mgr_status),
624                 le32_to_cpu(beacon->high_tsf),
625                 le32_to_cpu(beacon->low_tsf), rate);
626 #endif
627
628         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
629             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
630                 queue_work(priv->workqueue, &priv->beacon_update);
631 }
632
633 /* Handle notification from uCode that card's power state is changing
634  * due to software, hardware, or critical temperature RFKILL */
635 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
636                                     struct iwl_rx_mem_buffer *rxb)
637 {
638         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
639         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
640         unsigned long status = priv->status;
641
642         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
643                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
644                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
645
646         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
647                      RF_CARD_DISABLED)) {
648
649                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
650                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
651
652                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
653                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
654
655                 if (!(flags & RXON_CARD_DISABLED)) {
656                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
657                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
658                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
659                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
660                 }
661                 if (flags & RF_CARD_DISABLED)
662                         iwl_tt_enter_ct_kill(priv);
663         }
664         if (!(flags & RF_CARD_DISABLED))
665                 iwl_tt_exit_ct_kill(priv);
666
667         if (flags & HW_CARD_DISABLED)
668                 set_bit(STATUS_RF_KILL_HW, &priv->status);
669         else
670                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
671
672
673         if (!(flags & RXON_CARD_DISABLED))
674                 iwl_scan_cancel(priv);
675
676         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
677              test_bit(STATUS_RF_KILL_HW, &priv->status)))
678                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
679                         test_bit(STATUS_RF_KILL_HW, &priv->status));
680         else
681                 wake_up_interruptible(&priv->wait_command_queue);
682 }
683
684 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
685 {
686         if (src == IWL_PWR_SRC_VAUX) {
687                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
688                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
689                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
690                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
691         } else {
692                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
693                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
694                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
695         }
696
697         return 0;
698 }
699
700 /**
701  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
702  *
703  * Setup the RX handlers for each of the reply types sent from the uCode
704  * to the host.
705  *
706  * This function chains into the hardware specific files for them to setup
707  * any hardware specific handlers as well.
708  */
709 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
710 {
711         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
712         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
713         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
714         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
715         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
716             iwl_rx_pm_debug_statistics_notif;
717         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
718
719         /*
720          * The same handler is used for both the REPLY to a discrete
721          * statistics request from the host as well as for the periodic
722          * statistics notifications (after received beacons) from the uCode.
723          */
724         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
725         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
726
727         iwl_setup_spectrum_handlers(priv);
728         iwl_setup_rx_scan_handlers(priv);
729
730         /* status change handler */
731         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
732
733         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
734             iwl_rx_missed_beacon_notif;
735         /* Rx handlers */
736         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
737         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
738         /* block ack */
739         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
740         /* Set up hardware specific Rx handlers */
741         priv->cfg->ops->lib->rx_handler_setup(priv);
742 }
743
744 /**
745  * iwl_rx_handle - Main entry function for receiving responses from uCode
746  *
747  * Uses the priv->rx_handlers callback function array to invoke
748  * the appropriate handlers, including command responses,
749  * frame-received notifications, and other notifications.
750  */
751 void iwl_rx_handle(struct iwl_priv *priv)
752 {
753         struct iwl_rx_mem_buffer *rxb;
754         struct iwl_rx_packet *pkt;
755         struct iwl_rx_queue *rxq = &priv->rxq;
756         u32 r, i;
757         int reclaim;
758         unsigned long flags;
759         u8 fill_rx = 0;
760         u32 count = 8;
761         int total_empty;
762
763         /* uCode's read index (stored in shared DRAM) indicates the last Rx
764          * buffer that the driver may process (last buffer filled by ucode). */
765         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
766         i = rxq->read;
767
768         /* Rx interrupt, but nothing sent from uCode */
769         if (i == r)
770                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
771
772         /* calculate total frames need to be restock after handling RX */
773         total_empty = r - priv->rxq.write_actual;
774         if (total_empty < 0)
775                 total_empty += RX_QUEUE_SIZE;
776
777         if (total_empty > (RX_QUEUE_SIZE / 2))
778                 fill_rx = 1;
779
780         while (i != r) {
781                 rxb = rxq->queue[i];
782
783                 /* If an RXB doesn't have a Rx queue slot associated with it,
784                  * then a bug has been introduced in the queue refilling
785                  * routines -- catch it here */
786                 BUG_ON(rxb == NULL);
787
788                 rxq->queue[i] = NULL;
789
790                 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
791                                  priv->hw_params.rx_buf_size + 256,
792                                  PCI_DMA_FROMDEVICE);
793                 pkt = (struct iwl_rx_packet *)rxb->skb->data;
794
795                 /* Reclaim a command buffer only if this packet is a response
796                  *   to a (driver-originated) command.
797                  * If the packet (e.g. Rx frame) originated from uCode,
798                  *   there is no command buffer to reclaim.
799                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
800                  *   but apparently a few don't get set; catch them here. */
801                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
802                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
803                         (pkt->hdr.cmd != REPLY_RX) &&
804                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
805                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
806                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
807                         (pkt->hdr.cmd != REPLY_TX);
808
809                 /* Based on type of command response or notification,
810                  *   handle those that need handling via function in
811                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
812                 if (priv->rx_handlers[pkt->hdr.cmd]) {
813                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
814                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
815                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
816                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
817                 } else {
818                         /* No handling needed */
819                         IWL_DEBUG_RX(priv,
820                                 "r %d i %d No handler needed for %s, 0x%02x\n",
821                                 r, i, get_cmd_string(pkt->hdr.cmd),
822                                 pkt->hdr.cmd);
823                 }
824
825                 if (reclaim) {
826                         /* Invoke any callbacks, transfer the skb to caller, and
827                          * fire off the (possibly) blocking iwl_send_cmd()
828                          * as we reclaim the driver command queue */
829                         if (rxb && rxb->skb)
830                                 iwl_tx_cmd_complete(priv, rxb);
831                         else
832                                 IWL_WARN(priv, "Claim null rxb?\n");
833                 }
834
835                 /* For now we just don't re-use anything.  We can tweak this
836                  * later to try and re-use notification packets and SKBs that
837                  * fail to Rx correctly */
838                 if (rxb->skb != NULL) {
839                         priv->alloc_rxb_skb--;
840                         dev_kfree_skb_any(rxb->skb);
841                         rxb->skb = NULL;
842                 }
843
844                 spin_lock_irqsave(&rxq->lock, flags);
845                 list_add_tail(&rxb->list, &priv->rxq.rx_used);
846                 spin_unlock_irqrestore(&rxq->lock, flags);
847                 i = (i + 1) & RX_QUEUE_MASK;
848                 /* If there are a lot of unused frames,
849                  * restock the Rx queue so ucode wont assert. */
850                 if (fill_rx) {
851                         count++;
852                         if (count >= 8) {
853                                 priv->rxq.read = i;
854                                 iwl_rx_replenish_now(priv);
855                                 count = 0;
856                         }
857                 }
858         }
859
860         /* Backtrack one entry */
861         priv->rxq.read = i;
862         if (fill_rx)
863                 iwl_rx_replenish_now(priv);
864         else
865                 iwl_rx_queue_restock(priv);
866 }
867
868 /* call this function to flush any scheduled tasklet */
869 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
870 {
871         /* wait to make sure we flush pending tasklet*/
872         synchronize_irq(priv->pci_dev->irq);
873         tasklet_kill(&priv->irq_tasklet);
874 }
875
876 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
877 {
878         u32 inta, handled = 0;
879         u32 inta_fh;
880         unsigned long flags;
881 #ifdef CONFIG_IWLWIFI_DEBUG
882         u32 inta_mask;
883 #endif
884
885         spin_lock_irqsave(&priv->lock, flags);
886
887         /* Ack/clear/reset pending uCode interrupts.
888          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
889          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
890         inta = iwl_read32(priv, CSR_INT);
891         iwl_write32(priv, CSR_INT, inta);
892
893         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
894          * Any new interrupts that happen after this, either while we're
895          * in this tasklet, or later, will show up in next ISR/tasklet. */
896         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
897         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
898
899 #ifdef CONFIG_IWLWIFI_DEBUG
900         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
901                 /* just for debug */
902                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
903                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
904                               inta, inta_mask, inta_fh);
905         }
906 #endif
907
908         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
909          * atomic, make sure that inta covers all the interrupts that
910          * we've discovered, even if FH interrupt came in just after
911          * reading CSR_INT. */
912         if (inta_fh & CSR49_FH_INT_RX_MASK)
913                 inta |= CSR_INT_BIT_FH_RX;
914         if (inta_fh & CSR49_FH_INT_TX_MASK)
915                 inta |= CSR_INT_BIT_FH_TX;
916
917         /* Now service all interrupt bits discovered above. */
918         if (inta & CSR_INT_BIT_HW_ERR) {
919                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
920
921                 /* Tell the device to stop sending interrupts */
922                 iwl_disable_interrupts(priv);
923
924                 priv->isr_stats.hw++;
925                 iwl_irq_handle_error(priv);
926
927                 handled |= CSR_INT_BIT_HW_ERR;
928
929                 spin_unlock_irqrestore(&priv->lock, flags);
930
931                 return;
932         }
933
934 #ifdef CONFIG_IWLWIFI_DEBUG
935         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
936                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
937                 if (inta & CSR_INT_BIT_SCD) {
938                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
939                                       "the frame/frames.\n");
940                         priv->isr_stats.sch++;
941                 }
942
943                 /* Alive notification via Rx interrupt will do the real work */
944                 if (inta & CSR_INT_BIT_ALIVE) {
945                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
946                         priv->isr_stats.alive++;
947                 }
948         }
949 #endif
950         /* Safely ignore these bits for debug checks below */
951         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
952
953         /* HW RF KILL switch toggled */
954         if (inta & CSR_INT_BIT_RF_KILL) {
955                 int hw_rf_kill = 0;
956                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
957                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
958                         hw_rf_kill = 1;
959
960                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
961                                 hw_rf_kill ? "disable radio" : "enable radio");
962
963                 priv->isr_stats.rfkill++;
964
965                 /* driver only loads ucode once setting the interface up.
966                  * the driver allows loading the ucode even if the radio
967                  * is killed. Hence update the killswitch state here. The
968                  * rfkill handler will care about restarting if needed.
969                  */
970                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
971                         if (hw_rf_kill)
972                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
973                         else
974                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
975                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
976                 }
977
978                 handled |= CSR_INT_BIT_RF_KILL;
979         }
980
981         /* Chip got too hot and stopped itself */
982         if (inta & CSR_INT_BIT_CT_KILL) {
983                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
984                 priv->isr_stats.ctkill++;
985                 handled |= CSR_INT_BIT_CT_KILL;
986         }
987
988         /* Error detected by uCode */
989         if (inta & CSR_INT_BIT_SW_ERR) {
990                 IWL_ERR(priv, "Microcode SW error detected. "
991                         " Restarting 0x%X.\n", inta);
992                 priv->isr_stats.sw++;
993                 priv->isr_stats.sw_err = inta;
994                 iwl_irq_handle_error(priv);
995                 handled |= CSR_INT_BIT_SW_ERR;
996         }
997
998         /* uCode wakes up after power-down sleep */
999         if (inta & CSR_INT_BIT_WAKEUP) {
1000                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1001                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1002                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1003                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1004                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1005                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1006                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1007                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1008
1009                 priv->isr_stats.wakeup++;
1010
1011                 handled |= CSR_INT_BIT_WAKEUP;
1012         }
1013
1014         /* All uCode command responses, including Tx command responses,
1015          * Rx "responses" (frame-received notification), and other
1016          * notifications from uCode come through here*/
1017         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1018                 iwl_rx_handle(priv);
1019                 priv->isr_stats.rx++;
1020                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1021         }
1022
1023         if (inta & CSR_INT_BIT_FH_TX) {
1024                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1025                 priv->isr_stats.tx++;
1026                 handled |= CSR_INT_BIT_FH_TX;
1027                 /* FH finished to write, send event */
1028                 priv->ucode_write_complete = 1;
1029                 wake_up_interruptible(&priv->wait_command_queue);
1030         }
1031
1032         if (inta & ~handled) {
1033                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1034                 priv->isr_stats.unhandled++;
1035         }
1036
1037         if (inta & ~(priv->inta_mask)) {
1038                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1039                          inta & ~priv->inta_mask);
1040                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1041         }
1042
1043         /* Re-enable all interrupts */
1044         /* only Re-enable if diabled by irq */
1045         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1046                 iwl_enable_interrupts(priv);
1047
1048 #ifdef CONFIG_IWLWIFI_DEBUG
1049         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1050                 inta = iwl_read32(priv, CSR_INT);
1051                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1052                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1053                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1054                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1055         }
1056 #endif
1057         spin_unlock_irqrestore(&priv->lock, flags);
1058 }
1059
1060 /* tasklet for iwlagn interrupt */
1061 static void iwl_irq_tasklet(struct iwl_priv *priv)
1062 {
1063         u32 inta = 0;
1064         u32 handled = 0;
1065         unsigned long flags;
1066 #ifdef CONFIG_IWLWIFI_DEBUG
1067         u32 inta_mask;
1068 #endif
1069
1070         spin_lock_irqsave(&priv->lock, flags);
1071
1072         /* Ack/clear/reset pending uCode interrupts.
1073          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1074          */
1075         iwl_write32(priv, CSR_INT, priv->inta);
1076
1077         inta = priv->inta;
1078
1079 #ifdef CONFIG_IWLWIFI_DEBUG
1080         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1081                 /* just for debug */
1082                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1083                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1084                                 inta, inta_mask);
1085         }
1086 #endif
1087         /* saved interrupt in inta variable now we can reset priv->inta */
1088         priv->inta = 0;
1089
1090         /* Now service all interrupt bits discovered above. */
1091         if (inta & CSR_INT_BIT_HW_ERR) {
1092                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1093
1094                 /* Tell the device to stop sending interrupts */
1095                 iwl_disable_interrupts(priv);
1096
1097                 priv->isr_stats.hw++;
1098                 iwl_irq_handle_error(priv);
1099
1100                 handled |= CSR_INT_BIT_HW_ERR;
1101
1102                 spin_unlock_irqrestore(&priv->lock, flags);
1103
1104                 return;
1105         }
1106
1107 #ifdef CONFIG_IWLWIFI_DEBUG
1108         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1109                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1110                 if (inta & CSR_INT_BIT_SCD) {
1111                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1112                                       "the frame/frames.\n");
1113                         priv->isr_stats.sch++;
1114                 }
1115
1116                 /* Alive notification via Rx interrupt will do the real work */
1117                 if (inta & CSR_INT_BIT_ALIVE) {
1118                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1119                         priv->isr_stats.alive++;
1120                 }
1121         }
1122 #endif
1123         /* Safely ignore these bits for debug checks below */
1124         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1125
1126         /* HW RF KILL switch toggled */
1127         if (inta & CSR_INT_BIT_RF_KILL) {
1128                 int hw_rf_kill = 0;
1129                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1130                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1131                         hw_rf_kill = 1;
1132
1133                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1134                                 hw_rf_kill ? "disable radio" : "enable radio");
1135
1136                 priv->isr_stats.rfkill++;
1137
1138                 /* driver only loads ucode once setting the interface up.
1139                  * the driver allows loading the ucode even if the radio
1140                  * is killed. Hence update the killswitch state here. The
1141                  * rfkill handler will care about restarting if needed.
1142                  */
1143                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1144                         if (hw_rf_kill)
1145                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1146                         else
1147                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1148                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1149                 }
1150
1151                 handled |= CSR_INT_BIT_RF_KILL;
1152         }
1153
1154         /* Chip got too hot and stopped itself */
1155         if (inta & CSR_INT_BIT_CT_KILL) {
1156                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1157                 priv->isr_stats.ctkill++;
1158                 handled |= CSR_INT_BIT_CT_KILL;
1159         }
1160
1161         /* Error detected by uCode */
1162         if (inta & CSR_INT_BIT_SW_ERR) {
1163                 IWL_ERR(priv, "Microcode SW error detected. "
1164                         " Restarting 0x%X.\n", inta);
1165                 priv->isr_stats.sw++;
1166                 priv->isr_stats.sw_err = inta;
1167                 iwl_irq_handle_error(priv);
1168                 handled |= CSR_INT_BIT_SW_ERR;
1169         }
1170
1171         /* uCode wakes up after power-down sleep */
1172         if (inta & CSR_INT_BIT_WAKEUP) {
1173                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1174                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1175                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1176                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1177                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1178                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1179                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1180                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1181
1182                 priv->isr_stats.wakeup++;
1183
1184                 handled |= CSR_INT_BIT_WAKEUP;
1185         }
1186
1187         /* All uCode command responses, including Tx command responses,
1188          * Rx "responses" (frame-received notification), and other
1189          * notifications from uCode come through here*/
1190         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1191                         CSR_INT_BIT_RX_PERIODIC)) {
1192                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1193                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1194                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1195                         iwl_write32(priv, CSR_FH_INT_STATUS,
1196                                         CSR49_FH_INT_RX_MASK);
1197                 }
1198                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1199                         handled |= CSR_INT_BIT_RX_PERIODIC;
1200                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1201                 }
1202                 /* Sending RX interrupt require many steps to be done in the
1203                  * the device:
1204                  * 1- write interrupt to current index in ICT table.
1205                  * 2- dma RX frame.
1206                  * 3- update RX shared data to indicate last write index.
1207                  * 4- send interrupt.
1208                  * This could lead to RX race, driver could receive RX interrupt
1209                  * but the shared data changes does not reflect this.
1210                  * this could lead to RX race, RX periodic will solve this race
1211                  */
1212                 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1213                             CSR_INT_PERIODIC_DIS);
1214                 iwl_rx_handle(priv);
1215                 /* Only set RX periodic if real RX is received. */
1216                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1217                         iwl_write32(priv, CSR_INT_PERIODIC_REG,
1218                                     CSR_INT_PERIODIC_ENA);
1219
1220                 priv->isr_stats.rx++;
1221         }
1222
1223         if (inta & CSR_INT_BIT_FH_TX) {
1224                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1225                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1226                 priv->isr_stats.tx++;
1227                 handled |= CSR_INT_BIT_FH_TX;
1228                 /* FH finished to write, send event */
1229                 priv->ucode_write_complete = 1;
1230                 wake_up_interruptible(&priv->wait_command_queue);
1231         }
1232
1233         if (inta & ~handled) {
1234                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1235                 priv->isr_stats.unhandled++;
1236         }
1237
1238         if (inta & ~(priv->inta_mask)) {
1239                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1240                          inta & ~priv->inta_mask);
1241         }
1242
1243
1244         /* Re-enable all interrupts */
1245         /* only Re-enable if diabled by irq */
1246         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1247                 iwl_enable_interrupts(priv);
1248
1249         spin_unlock_irqrestore(&priv->lock, flags);
1250
1251 }
1252
1253
1254 /******************************************************************************
1255  *
1256  * uCode download functions
1257  *
1258  ******************************************************************************/
1259
1260 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1261 {
1262         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1263         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1264         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1265         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1266         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1267         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1268 }
1269
1270 static void iwl_nic_start(struct iwl_priv *priv)
1271 {
1272         /* Remove all resets to allow NIC to operate */
1273         iwl_write32(priv, CSR_RESET, 0);
1274 }
1275
1276
1277 /**
1278  * iwl_read_ucode - Read uCode images from disk file.
1279  *
1280  * Copy into buffers for card to fetch via bus-mastering
1281  */
1282 static int iwl_read_ucode(struct iwl_priv *priv)
1283 {
1284         struct iwl_ucode_header *ucode;
1285         int ret = -EINVAL, index;
1286         const struct firmware *ucode_raw;
1287         const char *name_pre = priv->cfg->fw_name_pre;
1288         const unsigned int api_max = priv->cfg->ucode_api_max;
1289         const unsigned int api_min = priv->cfg->ucode_api_min;
1290         char buf[25];
1291         u8 *src;
1292         size_t len;
1293         u32 api_ver, build;
1294         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1295         u16 eeprom_ver;
1296
1297         /* Ask kernel firmware_class module to get the boot firmware off disk.
1298          * request_firmware() is synchronous, file is in memory on return. */
1299         for (index = api_max; index >= api_min; index--) {
1300                 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1301                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1302                 if (ret < 0) {
1303                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
1304                                   buf, ret);
1305                         if (ret == -ENOENT)
1306                                 continue;
1307                         else
1308                                 goto error;
1309                 } else {
1310                         if (index < api_max)
1311                                 IWL_ERR(priv, "Loaded firmware %s, "
1312                                         "which is deprecated. "
1313                                         "Please use API v%u instead.\n",
1314                                           buf, api_max);
1315
1316                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1317                                        buf, ucode_raw->size);
1318                         break;
1319                 }
1320         }
1321
1322         if (ret < 0)
1323                 goto error;
1324
1325         /* Make sure that we got at least the v1 header! */
1326         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1327                 IWL_ERR(priv, "File size way too small!\n");
1328                 ret = -EINVAL;
1329                 goto err_release;
1330         }
1331
1332         /* Data from ucode file:  header followed by uCode images */
1333         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1334
1335         priv->ucode_ver = le32_to_cpu(ucode->ver);
1336         api_ver = IWL_UCODE_API(priv->ucode_ver);
1337         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1338         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1339         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1340         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1341         init_data_size =
1342                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1343         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1344         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1345
1346         /* api_ver should match the api version forming part of the
1347          * firmware filename ... but we don't check for that and only rely
1348          * on the API version read from firmware header from here on forward */
1349
1350         if (api_ver < api_min || api_ver > api_max) {
1351                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1352                           "Driver supports v%u, firmware is v%u.\n",
1353                           api_max, api_ver);
1354                 priv->ucode_ver = 0;
1355                 ret = -EINVAL;
1356                 goto err_release;
1357         }
1358         if (api_ver != api_max)
1359                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1360                           "got v%u. New firmware can be obtained "
1361                           "from http://www.intellinuxwireless.org.\n",
1362                           api_max, api_ver);
1363
1364         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1365                IWL_UCODE_MAJOR(priv->ucode_ver),
1366                IWL_UCODE_MINOR(priv->ucode_ver),
1367                IWL_UCODE_API(priv->ucode_ver),
1368                IWL_UCODE_SERIAL(priv->ucode_ver));
1369
1370         if (build)
1371                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1372
1373         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1374         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1375                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1376                        ? "OTP" : "EEPROM", eeprom_ver);
1377
1378         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1379                        priv->ucode_ver);
1380         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1381                        inst_size);
1382         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1383                        data_size);
1384         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1385                        init_size);
1386         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1387                        init_data_size);
1388         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1389                        boot_size);
1390
1391         /* Verify size of file vs. image size info in file's header */
1392         if (ucode_raw->size !=
1393                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1394                 inst_size + data_size + init_size +
1395                 init_data_size + boot_size) {
1396
1397                 IWL_DEBUG_INFO(priv,
1398                         "uCode file size %d does not match expected size\n",
1399                         (int)ucode_raw->size);
1400                 ret = -EINVAL;
1401                 goto err_release;
1402         }
1403
1404         /* Verify that uCode images will fit in card's SRAM */
1405         if (inst_size > priv->hw_params.max_inst_size) {
1406                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1407                                inst_size);
1408                 ret = -EINVAL;
1409                 goto err_release;
1410         }
1411
1412         if (data_size > priv->hw_params.max_data_size) {
1413                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1414                                 data_size);
1415                 ret = -EINVAL;
1416                 goto err_release;
1417         }
1418         if (init_size > priv->hw_params.max_inst_size) {
1419                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1420                         init_size);
1421                 ret = -EINVAL;
1422                 goto err_release;
1423         }
1424         if (init_data_size > priv->hw_params.max_data_size) {
1425                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1426                       init_data_size);
1427                 ret = -EINVAL;
1428                 goto err_release;
1429         }
1430         if (boot_size > priv->hw_params.max_bsm_size) {
1431                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1432                         boot_size);
1433                 ret = -EINVAL;
1434                 goto err_release;
1435         }
1436
1437         /* Allocate ucode buffers for card's bus-master loading ... */
1438
1439         /* Runtime instructions and 2 copies of data:
1440          * 1) unmodified from disk
1441          * 2) backup cache for save/restore during power-downs */
1442         priv->ucode_code.len = inst_size;
1443         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1444
1445         priv->ucode_data.len = data_size;
1446         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1447
1448         priv->ucode_data_backup.len = data_size;
1449         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1450
1451         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1452             !priv->ucode_data_backup.v_addr)
1453                 goto err_pci_alloc;
1454
1455         /* Initialization instructions and data */
1456         if (init_size && init_data_size) {
1457                 priv->ucode_init.len = init_size;
1458                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1459
1460                 priv->ucode_init_data.len = init_data_size;
1461                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1462
1463                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1464                         goto err_pci_alloc;
1465         }
1466
1467         /* Bootstrap (instructions only, no data) */
1468         if (boot_size) {
1469                 priv->ucode_boot.len = boot_size;
1470                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1471
1472                 if (!priv->ucode_boot.v_addr)
1473                         goto err_pci_alloc;
1474         }
1475
1476         /* Copy images into buffers for card's bus-master reads ... */
1477
1478         /* Runtime instructions (first block of data in file) */
1479         len = inst_size;
1480         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1481         memcpy(priv->ucode_code.v_addr, src, len);
1482         src += len;
1483
1484         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1485                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1486
1487         /* Runtime data (2nd block)
1488          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1489         len = data_size;
1490         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1491         memcpy(priv->ucode_data.v_addr, src, len);
1492         memcpy(priv->ucode_data_backup.v_addr, src, len);
1493         src += len;
1494
1495         /* Initialization instructions (3rd block) */
1496         if (init_size) {
1497                 len = init_size;
1498                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1499                                 len);
1500                 memcpy(priv->ucode_init.v_addr, src, len);
1501                 src += len;
1502         }
1503
1504         /* Initialization data (4th block) */
1505         if (init_data_size) {
1506                 len = init_data_size;
1507                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1508                                len);
1509                 memcpy(priv->ucode_init_data.v_addr, src, len);
1510                 src += len;
1511         }
1512
1513         /* Bootstrap instructions (5th block) */
1514         len = boot_size;
1515         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1516         memcpy(priv->ucode_boot.v_addr, src, len);
1517
1518         /* We have our copies now, allow OS release its copies */
1519         release_firmware(ucode_raw);
1520         return 0;
1521
1522  err_pci_alloc:
1523         IWL_ERR(priv, "failed to allocate pci memory\n");
1524         ret = -ENOMEM;
1525         iwl_dealloc_ucode_pci(priv);
1526
1527  err_release:
1528         release_firmware(ucode_raw);
1529
1530  error:
1531         return ret;
1532 }
1533
1534 #ifdef CONFIG_IWLWIFI_DEBUG
1535 static const char *desc_lookup_text[] = {
1536         "OK",
1537         "FAIL",
1538         "BAD_PARAM",
1539         "BAD_CHECKSUM",
1540         "NMI_INTERRUPT_WDG",
1541         "SYSASSERT",
1542         "FATAL_ERROR",
1543         "BAD_COMMAND",
1544         "HW_ERROR_TUNE_LOCK",
1545         "HW_ERROR_TEMPERATURE",
1546         "ILLEGAL_CHAN_FREQ",
1547         "VCC_NOT_STABLE",
1548         "FH_ERROR",
1549         "NMI_INTERRUPT_HOST",
1550         "NMI_INTERRUPT_ACTION_PT",
1551         "NMI_INTERRUPT_UNKNOWN",
1552         "UCODE_VERSION_MISMATCH",
1553         "HW_ERROR_ABS_LOCK",
1554         "HW_ERROR_CAL_LOCK_FAIL",
1555         "NMI_INTERRUPT_INST_ACTION_PT",
1556         "NMI_INTERRUPT_DATA_ACTION_PT",
1557         "NMI_TRM_HW_ER",
1558         "NMI_INTERRUPT_TRM",
1559         "NMI_INTERRUPT_BREAK_POINT"
1560         "DEBUG_0",
1561         "DEBUG_1",
1562         "DEBUG_2",
1563         "DEBUG_3",
1564         "UNKNOWN"
1565 };
1566
1567 static const char *desc_lookup(int i)
1568 {
1569         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1570
1571         if (i < 0 || i > max)
1572                 i = max;
1573
1574         return desc_lookup_text[i];
1575 }
1576
1577 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1578 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1579
1580 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1581 {
1582         u32 data2, line;
1583         u32 desc, time, count, base, data1;
1584         u32 blink1, blink2, ilink1, ilink2;
1585
1586         if (priv->ucode_type == UCODE_INIT)
1587                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1588         else
1589                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1590
1591         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1592                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1593                 return;
1594         }
1595
1596         count = iwl_read_targ_mem(priv, base);
1597
1598         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1599                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1600                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1601                         priv->status, count);
1602         }
1603
1604         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1605         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1606         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1607         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1608         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1609         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1610         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1611         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1612         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1613
1614         IWL_ERR(priv, "Desc                               Time       "
1615                 "data1      data2      line\n");
1616         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1617                 desc_lookup(desc), desc, time, data1, data2, line);
1618         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1619         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1620                 ilink1, ilink2);
1621
1622 }
1623
1624 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1625
1626 /**
1627  * iwl_print_event_log - Dump error event log to syslog
1628  *
1629  */
1630 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1631                                 u32 num_events, u32 mode)
1632 {
1633         u32 i;
1634         u32 base;       /* SRAM byte address of event log header */
1635         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1636         u32 ptr;        /* SRAM byte address of log data */
1637         u32 ev, time, data; /* event log data */
1638
1639         if (num_events == 0)
1640                 return;
1641         if (priv->ucode_type == UCODE_INIT)
1642                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1643         else
1644                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1645
1646         if (mode == 0)
1647                 event_size = 2 * sizeof(u32);
1648         else
1649                 event_size = 3 * sizeof(u32);
1650
1651         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1652
1653         /* "time" is actually "data" for mode 0 (no timestamp).
1654         * place event id # at far right for easier visual parsing. */
1655         for (i = 0; i < num_events; i++) {
1656                 ev = iwl_read_targ_mem(priv, ptr);
1657                 ptr += sizeof(u32);
1658                 time = iwl_read_targ_mem(priv, ptr);
1659                 ptr += sizeof(u32);
1660                 if (mode == 0) {
1661                         /* data, ev */
1662                         IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1663                 } else {
1664                         data = iwl_read_targ_mem(priv, ptr);
1665                         ptr += sizeof(u32);
1666                         IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1667                                         time, data, ev);
1668                 }
1669         }
1670 }
1671
1672 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1673 {
1674         u32 base;       /* SRAM byte address of event log header */
1675         u32 capacity;   /* event log capacity in # entries */
1676         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1677         u32 num_wraps;  /* # times uCode wrapped to top of log */
1678         u32 next_entry; /* index of next entry to be written by uCode */
1679         u32 size;       /* # entries that we'll print */
1680
1681         if (priv->ucode_type == UCODE_INIT)
1682                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1683         else
1684                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1685
1686         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1687                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1688                 return;
1689         }
1690
1691         /* event log header */
1692         capacity = iwl_read_targ_mem(priv, base);
1693         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1694         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1695         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1696
1697         size = num_wraps ? capacity : next_entry;
1698
1699         /* bail out if nothing in log */
1700         if (size == 0) {
1701                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1702                 return;
1703         }
1704
1705         IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1706                         size, num_wraps);
1707
1708         /* if uCode has wrapped back to top of log, start at the oldest entry,
1709          * i.e the next one that uCode would fill. */
1710         if (num_wraps)
1711                 iwl_print_event_log(priv, next_entry,
1712                                         capacity - next_entry, mode);
1713         /* (then/else) start at top of log */
1714         iwl_print_event_log(priv, 0, next_entry, mode);
1715
1716 }
1717 #endif
1718
1719 /**
1720  * iwl_alive_start - called after REPLY_ALIVE notification received
1721  *                   from protocol/runtime uCode (initialization uCode's
1722  *                   Alive gets handled by iwl_init_alive_start()).
1723  */
1724 static void iwl_alive_start(struct iwl_priv *priv)
1725 {
1726         int ret = 0;
1727
1728         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1729
1730         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1731                 /* We had an error bringing up the hardware, so take it
1732                  * all the way back down so we can try again */
1733                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1734                 goto restart;
1735         }
1736
1737         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1738          * This is a paranoid check, because we would not have gotten the
1739          * "runtime" alive if code weren't properly loaded.  */
1740         if (iwl_verify_ucode(priv)) {
1741                 /* Runtime instruction load was bad;
1742                  * take it all the way back down so we can try again */
1743                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1744                 goto restart;
1745         }
1746
1747         iwl_clear_stations_table(priv);
1748         ret = priv->cfg->ops->lib->alive_notify(priv);
1749         if (ret) {
1750                 IWL_WARN(priv,
1751                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1752                 goto restart;
1753         }
1754
1755         /* After the ALIVE response, we can send host commands to the uCode */
1756         set_bit(STATUS_ALIVE, &priv->status);
1757
1758         if (iwl_is_rfkill(priv))
1759                 return;
1760
1761         ieee80211_wake_queues(priv->hw);
1762
1763         priv->active_rate = priv->rates_mask;
1764         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1765
1766         if (iwl_is_associated(priv)) {
1767                 struct iwl_rxon_cmd *active_rxon =
1768                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
1769                 /* apply any changes in staging */
1770                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1771                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1772         } else {
1773                 /* Initialize our rx_config data */
1774                 iwl_connection_init_rx_config(priv, priv->iw_mode);
1775
1776                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1777                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
1778
1779                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1780         }
1781
1782         /* Configure Bluetooth device coexistence support */
1783         iwl_send_bt_config(priv);
1784
1785         iwl_reset_run_time_calib(priv);
1786
1787         /* Configure the adapter for unassociated operation */
1788         iwlcore_commit_rxon(priv);
1789
1790         /* At this point, the NIC is initialized and operational */
1791         iwl_rf_kill_ct_config(priv);
1792
1793         iwl_leds_register(priv);
1794
1795         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1796         set_bit(STATUS_READY, &priv->status);
1797         wake_up_interruptible(&priv->wait_command_queue);
1798
1799         iwl_power_update_mode(priv, true);
1800
1801         /* reassociate for ADHOC mode */
1802         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1803                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1804                                                                 priv->vif);
1805                 if (beacon)
1806                         iwl_mac_beacon_update(priv->hw, beacon);
1807         }
1808
1809
1810         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1811                 iwl_set_mode(priv, priv->iw_mode);
1812
1813         return;
1814
1815  restart:
1816         queue_work(priv->workqueue, &priv->restart);
1817 }
1818
1819 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1820
1821 static void __iwl_down(struct iwl_priv *priv)
1822 {
1823         unsigned long flags;
1824         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1825
1826         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1827
1828         if (!exit_pending)
1829                 set_bit(STATUS_EXIT_PENDING, &priv->status);
1830
1831         iwl_leds_unregister(priv);
1832
1833         iwl_clear_stations_table(priv);
1834
1835         /* Unblock any waiting calls */
1836         wake_up_interruptible_all(&priv->wait_command_queue);
1837
1838         /* Wipe out the EXIT_PENDING status bit if we are not actually
1839          * exiting the module */
1840         if (!exit_pending)
1841                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1842
1843         /* stop and reset the on-board processor */
1844         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1845
1846         /* tell the device to stop sending interrupts */
1847         spin_lock_irqsave(&priv->lock, flags);
1848         iwl_disable_interrupts(priv);
1849         spin_unlock_irqrestore(&priv->lock, flags);
1850         iwl_synchronize_irq(priv);
1851
1852         if (priv->mac80211_registered)
1853                 ieee80211_stop_queues(priv->hw);
1854
1855         /* If we have not previously called iwl_init() then
1856          * clear all bits but the RF Kill bit and return */
1857         if (!iwl_is_init(priv)) {
1858                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1859                                         STATUS_RF_KILL_HW |
1860                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1861                                         STATUS_GEO_CONFIGURED |
1862                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1863                                         STATUS_EXIT_PENDING;
1864                 goto exit;
1865         }
1866
1867         /* ...otherwise clear out all the status bits but the RF Kill
1868          * bit and continue taking the NIC down. */
1869         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1870                                 STATUS_RF_KILL_HW |
1871                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1872                                 STATUS_GEO_CONFIGURED |
1873                         test_bit(STATUS_FW_ERROR, &priv->status) <<
1874                                 STATUS_FW_ERROR |
1875                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1876                                 STATUS_EXIT_PENDING;
1877
1878         /* device going down, Stop using ICT table */
1879         iwl_disable_ict(priv);
1880         spin_lock_irqsave(&priv->lock, flags);
1881         iwl_clear_bit(priv, CSR_GP_CNTRL,
1882                          CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1883         spin_unlock_irqrestore(&priv->lock, flags);
1884
1885         iwl_txq_ctx_stop(priv);
1886         iwl_rxq_stop(priv);
1887
1888         iwl_write_prph(priv, APMG_CLK_DIS_REG,
1889                                 APMG_CLK_VAL_DMA_CLK_RQT);
1890
1891         udelay(5);
1892
1893         /* FIXME: apm_ops.suspend(priv) */
1894         if (exit_pending)
1895                 priv->cfg->ops->lib->apm_ops.stop(priv);
1896         else
1897                 priv->cfg->ops->lib->apm_ops.reset(priv);
1898  exit:
1899         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1900
1901         if (priv->ibss_beacon)
1902                 dev_kfree_skb(priv->ibss_beacon);
1903         priv->ibss_beacon = NULL;
1904
1905         /* clear out any free frames */
1906         iwl_clear_free_frames(priv);
1907 }
1908
1909 static void iwl_down(struct iwl_priv *priv)
1910 {
1911         mutex_lock(&priv->mutex);
1912         __iwl_down(priv);
1913         mutex_unlock(&priv->mutex);
1914
1915         iwl_cancel_deferred_work(priv);
1916 }
1917
1918 #define HW_READY_TIMEOUT (50)
1919
1920 static int iwl_set_hw_ready(struct iwl_priv *priv)
1921 {
1922         int ret = 0;
1923
1924         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1925                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1926
1927         /* See if we got it */
1928         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1929                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1930                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1931                                 HW_READY_TIMEOUT);
1932         if (ret != -ETIMEDOUT)
1933                 priv->hw_ready = true;
1934         else
1935                 priv->hw_ready = false;
1936
1937         IWL_DEBUG_INFO(priv, "hardware %s\n",
1938                       (priv->hw_ready == 1) ? "ready" : "not ready");
1939         return ret;
1940 }
1941
1942 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1943 {
1944         int ret = 0;
1945
1946         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1947
1948         ret = iwl_set_hw_ready(priv);
1949         if (priv->hw_ready)
1950                 return ret;
1951
1952         /* If HW is not ready, prepare the conditions to check again */
1953         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1954                         CSR_HW_IF_CONFIG_REG_PREPARE);
1955
1956         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1957                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1958                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1959
1960         /* HW should be ready by now, check again. */
1961         if (ret != -ETIMEDOUT)
1962                 iwl_set_hw_ready(priv);
1963
1964         return ret;
1965 }
1966
1967 #define MAX_HW_RESTARTS 5
1968
1969 static int __iwl_up(struct iwl_priv *priv)
1970 {
1971         int i;
1972         int ret;
1973
1974         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1975                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1976                 return -EIO;
1977         }
1978
1979         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1980                 IWL_ERR(priv, "ucode not available for device bringup\n");
1981                 return -EIO;
1982         }
1983
1984         iwl_prepare_card_hw(priv);
1985
1986         if (!priv->hw_ready) {
1987                 IWL_WARN(priv, "Exit HW not ready\n");
1988                 return -EIO;
1989         }
1990
1991         /* If platform's RF_KILL switch is NOT set to KILL */
1992         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1993                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1994         else
1995                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1996
1997         if (iwl_is_rfkill(priv)) {
1998                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
1999
2000                 iwl_enable_interrupts(priv);
2001                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2002                 return 0;
2003         }
2004
2005         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2006
2007         ret = iwl_hw_nic_init(priv);
2008         if (ret) {
2009                 IWL_ERR(priv, "Unable to init nic\n");
2010                 return ret;
2011         }
2012
2013         /* make sure rfkill handshake bits are cleared */
2014         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2015         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2016                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2017
2018         /* clear (again), then enable host interrupts */
2019         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2020         iwl_enable_interrupts(priv);
2021
2022         /* really make sure rfkill handshake bits are cleared */
2023         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2024         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2025
2026         /* Copy original ucode data image from disk into backup cache.
2027          * This will be used to initialize the on-board processor's
2028          * data SRAM for a clean start when the runtime program first loads. */
2029         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2030                priv->ucode_data.len);
2031
2032         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2033
2034                 iwl_clear_stations_table(priv);
2035
2036                 /* load bootstrap state machine,
2037                  * load bootstrap program into processor's memory,
2038                  * prepare to load the "initialize" uCode */
2039                 ret = priv->cfg->ops->lib->load_ucode(priv);
2040
2041                 if (ret) {
2042                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2043                                 ret);
2044                         continue;
2045                 }
2046
2047                 /* start card; "initialize" will load runtime ucode */
2048                 iwl_nic_start(priv);
2049
2050                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2051
2052                 return 0;
2053         }
2054
2055         set_bit(STATUS_EXIT_PENDING, &priv->status);
2056         __iwl_down(priv);
2057         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2058
2059         /* tried to restart and config the device for as long as our
2060          * patience could withstand */
2061         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2062         return -EIO;
2063 }
2064
2065
2066 /*****************************************************************************
2067  *
2068  * Workqueue callbacks
2069  *
2070  *****************************************************************************/
2071
2072 static void iwl_bg_init_alive_start(struct work_struct *data)
2073 {
2074         struct iwl_priv *priv =
2075             container_of(data, struct iwl_priv, init_alive_start.work);
2076
2077         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2078                 return;
2079
2080         mutex_lock(&priv->mutex);
2081         priv->cfg->ops->lib->init_alive_start(priv);
2082         mutex_unlock(&priv->mutex);
2083 }
2084
2085 static void iwl_bg_alive_start(struct work_struct *data)
2086 {
2087         struct iwl_priv *priv =
2088             container_of(data, struct iwl_priv, alive_start.work);
2089
2090         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2091                 return;
2092
2093         /* enable dram interrupt */
2094         iwl_reset_ict(priv);
2095
2096         mutex_lock(&priv->mutex);
2097         iwl_alive_start(priv);
2098         mutex_unlock(&priv->mutex);
2099 }
2100
2101 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2102 {
2103         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2104                         run_time_calib_work);
2105
2106         mutex_lock(&priv->mutex);
2107
2108         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2109             test_bit(STATUS_SCANNING, &priv->status)) {
2110                 mutex_unlock(&priv->mutex);
2111                 return;
2112         }
2113
2114         if (priv->start_calib) {
2115                 iwl_chain_noise_calibration(priv, &priv->statistics);
2116
2117                 iwl_sensitivity_calibration(priv, &priv->statistics);
2118         }
2119
2120         mutex_unlock(&priv->mutex);
2121         return;
2122 }
2123
2124 static void iwl_bg_up(struct work_struct *data)
2125 {
2126         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2127
2128         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2129                 return;
2130
2131         mutex_lock(&priv->mutex);
2132         __iwl_up(priv);
2133         mutex_unlock(&priv->mutex);
2134 }
2135
2136 static void iwl_bg_restart(struct work_struct *data)
2137 {
2138         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2139
2140         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2141                 return;
2142
2143         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2144                 mutex_lock(&priv->mutex);
2145                 priv->vif = NULL;
2146                 priv->is_open = 0;
2147                 mutex_unlock(&priv->mutex);
2148                 iwl_down(priv);
2149                 ieee80211_restart_hw(priv->hw);
2150         } else {
2151                 iwl_down(priv);
2152                 queue_work(priv->workqueue, &priv->up);
2153         }
2154 }
2155
2156 static void iwl_bg_rx_replenish(struct work_struct *data)
2157 {
2158         struct iwl_priv *priv =
2159             container_of(data, struct iwl_priv, rx_replenish);
2160
2161         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2162                 return;
2163
2164         mutex_lock(&priv->mutex);
2165         iwl_rx_replenish(priv);
2166         mutex_unlock(&priv->mutex);
2167 }
2168
2169 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2170
2171 void iwl_post_associate(struct iwl_priv *priv)
2172 {
2173         struct ieee80211_conf *conf = NULL;
2174         int ret = 0;
2175         unsigned long flags;
2176
2177         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2178                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2179                 return;
2180         }
2181
2182         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2183                         priv->assoc_id, priv->active_rxon.bssid_addr);
2184
2185
2186         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2187                 return;
2188
2189
2190         if (!priv->vif || !priv->is_open)
2191                 return;
2192
2193         iwl_scan_cancel_timeout(priv, 200);
2194
2195         conf = ieee80211_get_hw_conf(priv->hw);
2196
2197         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2198         iwlcore_commit_rxon(priv);
2199
2200         iwl_setup_rxon_timing(priv);
2201         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2202                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2203         if (ret)
2204                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2205                             "Attempting to continue.\n");
2206
2207         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2208
2209         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2210
2211         if (priv->cfg->ops->hcmd->set_rxon_chain)
2212                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2213
2214         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2215
2216         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2217                         priv->assoc_id, priv->beacon_int);
2218
2219         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2220                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2221         else
2222                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2223
2224         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2225                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2226                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2227                 else
2228                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2229
2230                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2231                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2232
2233         }
2234
2235         iwlcore_commit_rxon(priv);
2236
2237         switch (priv->iw_mode) {
2238         case NL80211_IFTYPE_STATION:
2239                 break;
2240
2241         case NL80211_IFTYPE_ADHOC:
2242
2243                 /* assume default assoc id */
2244                 priv->assoc_id = 1;
2245
2246                 iwl_rxon_add_station(priv, priv->bssid, 0);
2247                 iwl_send_beacon_cmd(priv);
2248
2249                 break;
2250
2251         default:
2252                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2253                           __func__, priv->iw_mode);
2254                 break;
2255         }
2256
2257         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2258                 priv->assoc_station_added = 1;
2259
2260         spin_lock_irqsave(&priv->lock, flags);
2261         iwl_activate_qos(priv, 0);
2262         spin_unlock_irqrestore(&priv->lock, flags);
2263
2264         /* the chain noise calibration will enabled PM upon completion
2265          * If chain noise has already been run, then we need to enable
2266          * power management here */
2267         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2268                 iwl_power_update_mode(priv, false);
2269
2270         /* Enable Rx differential gain and sensitivity calibrations */
2271         iwl_chain_noise_reset(priv);
2272         priv->start_calib = 1;
2273
2274 }
2275
2276 /*****************************************************************************
2277  *
2278  * mac80211 entry point functions
2279  *
2280  *****************************************************************************/
2281
2282 #define UCODE_READY_TIMEOUT     (4 * HZ)
2283
2284 static int iwl_mac_start(struct ieee80211_hw *hw)
2285 {
2286         struct iwl_priv *priv = hw->priv;
2287         int ret;
2288
2289         IWL_DEBUG_MAC80211(priv, "enter\n");
2290
2291         /* we should be verifying the device is ready to be opened */
2292         mutex_lock(&priv->mutex);
2293
2294         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2295          * ucode filename and max sizes are card-specific. */
2296
2297         if (!priv->ucode_code.len) {
2298                 ret = iwl_read_ucode(priv);
2299                 if (ret) {
2300                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2301                         mutex_unlock(&priv->mutex);
2302                         return ret;
2303                 }
2304         }
2305
2306         ret = __iwl_up(priv);
2307
2308         mutex_unlock(&priv->mutex);
2309
2310         if (ret)
2311                 return ret;
2312
2313         if (iwl_is_rfkill(priv))
2314                 goto out;
2315
2316         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2317
2318         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2319          * mac80211 will not be run successfully. */
2320         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2321                         test_bit(STATUS_READY, &priv->status),
2322                         UCODE_READY_TIMEOUT);
2323         if (!ret) {
2324                 if (!test_bit(STATUS_READY, &priv->status)) {
2325                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2326                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2327                         return -ETIMEDOUT;
2328                 }
2329         }
2330
2331 out:
2332         priv->is_open = 1;
2333         IWL_DEBUG_MAC80211(priv, "leave\n");
2334         return 0;
2335 }
2336
2337 static void iwl_mac_stop(struct ieee80211_hw *hw)
2338 {
2339         struct iwl_priv *priv = hw->priv;
2340
2341         IWL_DEBUG_MAC80211(priv, "enter\n");
2342
2343         if (!priv->is_open)
2344                 return;
2345
2346         priv->is_open = 0;
2347
2348         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2349                 /* stop mac, cancel any scan request and clear
2350                  * RXON_FILTER_ASSOC_MSK BIT
2351                  */
2352                 mutex_lock(&priv->mutex);
2353                 iwl_scan_cancel_timeout(priv, 100);
2354                 mutex_unlock(&priv->mutex);
2355         }
2356
2357         iwl_down(priv);
2358
2359         flush_workqueue(priv->workqueue);
2360
2361         /* enable interrupts again in order to receive rfkill changes */
2362         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2363         iwl_enable_interrupts(priv);
2364
2365         IWL_DEBUG_MAC80211(priv, "leave\n");
2366 }
2367
2368 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2369 {
2370         struct iwl_priv *priv = hw->priv;
2371
2372         IWL_DEBUG_MACDUMP(priv, "enter\n");
2373
2374         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2375                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2376
2377         if (iwl_tx_skb(priv, skb))
2378                 dev_kfree_skb_any(skb);
2379
2380         IWL_DEBUG_MACDUMP(priv, "leave\n");
2381         return NETDEV_TX_OK;
2382 }
2383
2384 void iwl_config_ap(struct iwl_priv *priv)
2385 {
2386         int ret = 0;
2387         unsigned long flags;
2388
2389         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2390                 return;
2391
2392         /* The following should be done only at AP bring up */
2393         if (!iwl_is_associated(priv)) {
2394
2395                 /* RXON - unassoc (to set timing command) */
2396                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2397                 iwlcore_commit_rxon(priv);
2398
2399                 /* RXON Timing */
2400                 iwl_setup_rxon_timing(priv);
2401                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2402                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2403                 if (ret)
2404                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2405                                         "Attempting to continue.\n");
2406
2407                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2408                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2409
2410                 /* FIXME: what should be the assoc_id for AP? */
2411                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2412                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2413                         priv->staging_rxon.flags |=
2414                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2415                 else
2416                         priv->staging_rxon.flags &=
2417                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2418
2419                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2420                         if (priv->assoc_capability &
2421                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2422                                 priv->staging_rxon.flags |=
2423                                         RXON_FLG_SHORT_SLOT_MSK;
2424                         else
2425                                 priv->staging_rxon.flags &=
2426                                         ~RXON_FLG_SHORT_SLOT_MSK;
2427
2428                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2429                                 priv->staging_rxon.flags &=
2430                                         ~RXON_FLG_SHORT_SLOT_MSK;
2431                 }
2432                 /* restore RXON assoc */
2433                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2434                 iwlcore_commit_rxon(priv);
2435                 spin_lock_irqsave(&priv->lock, flags);
2436                 iwl_activate_qos(priv, 1);
2437                 spin_unlock_irqrestore(&priv->lock, flags);
2438                 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2439         }
2440         iwl_send_beacon_cmd(priv);
2441
2442         /* FIXME - we need to add code here to detect a totally new
2443          * configuration, reset the AP, unassoc, rxon timing, assoc,
2444          * clear sta table, add BCAST sta... */
2445 }
2446
2447 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2448                         struct ieee80211_key_conf *keyconf, const u8 *addr,
2449                         u32 iv32, u16 *phase1key)
2450 {
2451
2452         struct iwl_priv *priv = hw->priv;
2453         IWL_DEBUG_MAC80211(priv, "enter\n");
2454
2455         iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2456
2457         IWL_DEBUG_MAC80211(priv, "leave\n");
2458 }
2459
2460 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2461                            struct ieee80211_vif *vif,
2462                            struct ieee80211_sta *sta,
2463                            struct ieee80211_key_conf *key)
2464 {
2465         struct iwl_priv *priv = hw->priv;
2466         const u8 *addr;
2467         int ret;
2468         u8 sta_id;
2469         bool is_default_wep_key = false;
2470
2471         IWL_DEBUG_MAC80211(priv, "enter\n");
2472
2473         if (priv->cfg->mod_params->sw_crypto) {
2474                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2475                 return -EOPNOTSUPP;
2476         }
2477         addr = sta ? sta->addr : iwl_bcast_addr;
2478         sta_id = iwl_find_station(priv, addr);
2479         if (sta_id == IWL_INVALID_STATION) {
2480                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2481                                    addr);
2482                 return -EINVAL;
2483
2484         }
2485
2486         mutex_lock(&priv->mutex);
2487         iwl_scan_cancel_timeout(priv, 100);
2488         mutex_unlock(&priv->mutex);
2489
2490         /* If we are getting WEP group key and we didn't receive any key mapping
2491          * so far, we are in legacy wep mode (group key only), otherwise we are
2492          * in 1X mode.
2493          * In legacy wep mode, we use another host command to the uCode */
2494         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2495                 priv->iw_mode != NL80211_IFTYPE_AP) {
2496                 if (cmd == SET_KEY)
2497                         is_default_wep_key = !priv->key_mapping_key;
2498                 else
2499                         is_default_wep_key =
2500                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2501         }
2502
2503         switch (cmd) {
2504         case SET_KEY:
2505                 if (is_default_wep_key)
2506                         ret = iwl_set_default_wep_key(priv, key);
2507                 else
2508                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2509
2510                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2511                 break;
2512         case DISABLE_KEY:
2513                 if (is_default_wep_key)
2514                         ret = iwl_remove_default_wep_key(priv, key);
2515                 else
2516                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2517
2518                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2519                 break;
2520         default:
2521                 ret = -EINVAL;
2522         }
2523
2524         IWL_DEBUG_MAC80211(priv, "leave\n");
2525
2526         return ret;
2527 }
2528
2529 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2530                              enum ieee80211_ampdu_mlme_action action,
2531                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2532 {
2533         struct iwl_priv *priv = hw->priv;
2534         int ret;
2535
2536         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2537                      sta->addr, tid);
2538
2539         if (!(priv->cfg->sku & IWL_SKU_N))
2540                 return -EACCES;
2541
2542         switch (action) {
2543         case IEEE80211_AMPDU_RX_START:
2544                 IWL_DEBUG_HT(priv, "start Rx\n");
2545                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2546         case IEEE80211_AMPDU_RX_STOP:
2547                 IWL_DEBUG_HT(priv, "stop Rx\n");
2548                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2549                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2550                         return 0;
2551                 else
2552                         return ret;
2553         case IEEE80211_AMPDU_TX_START:
2554                 IWL_DEBUG_HT(priv, "start Tx\n");
2555                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2556         case IEEE80211_AMPDU_TX_STOP:
2557                 IWL_DEBUG_HT(priv, "stop Tx\n");
2558                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2559                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2560                         return 0;
2561                 else
2562                         return ret;
2563         default:
2564                 IWL_DEBUG_HT(priv, "unknown\n");
2565                 return -EINVAL;
2566                 break;
2567         }
2568         return 0;
2569 }
2570
2571 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2572                              struct ieee80211_low_level_stats *stats)
2573 {
2574         struct iwl_priv *priv = hw->priv;
2575
2576         priv = hw->priv;
2577         IWL_DEBUG_MAC80211(priv, "enter\n");
2578         IWL_DEBUG_MAC80211(priv, "leave\n");
2579
2580         return 0;
2581 }
2582
2583 /*****************************************************************************
2584  *
2585  * sysfs attributes
2586  *
2587  *****************************************************************************/
2588
2589 #ifdef CONFIG_IWLWIFI_DEBUG
2590
2591 /*
2592  * The following adds a new attribute to the sysfs representation
2593  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2594  * used for controlling the debug level.
2595  *
2596  * See the level definitions in iwl for details.
2597  *
2598  * The debug_level being managed using sysfs below is a per device debug
2599  * level that is used instead of the global debug level if it (the per
2600  * device debug level) is set.
2601  */
2602 static ssize_t show_debug_level(struct device *d,
2603                                 struct device_attribute *attr, char *buf)
2604 {
2605         struct iwl_priv *priv = dev_get_drvdata(d);
2606         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2607 }
2608 static ssize_t store_debug_level(struct device *d,
2609                                 struct device_attribute *attr,
2610                                  const char *buf, size_t count)
2611 {
2612         struct iwl_priv *priv = dev_get_drvdata(d);
2613         unsigned long val;
2614         int ret;
2615
2616         ret = strict_strtoul(buf, 0, &val);
2617         if (ret)
2618                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2619         else {
2620                 priv->debug_level = val;
2621                 if (iwl_alloc_traffic_mem(priv))
2622                         IWL_ERR(priv,
2623                                 "Not enough memory to generate traffic log\n");
2624         }
2625         return strnlen(buf, count);
2626 }
2627
2628 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2629                         show_debug_level, store_debug_level);
2630
2631
2632 #endif /* CONFIG_IWLWIFI_DEBUG */
2633
2634
2635 static ssize_t show_temperature(struct device *d,
2636                                 struct device_attribute *attr, char *buf)
2637 {
2638         struct iwl_priv *priv = dev_get_drvdata(d);
2639
2640         if (!iwl_is_alive(priv))
2641                 return -EAGAIN;
2642
2643         return sprintf(buf, "%d\n", priv->temperature);
2644 }
2645
2646 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2647
2648 static ssize_t show_tx_power(struct device *d,
2649                              struct device_attribute *attr, char *buf)
2650 {
2651         struct iwl_priv *priv = dev_get_drvdata(d);
2652
2653         if (!iwl_is_ready_rf(priv))
2654                 return sprintf(buf, "off\n");
2655         else
2656                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2657 }
2658
2659 static ssize_t store_tx_power(struct device *d,
2660                               struct device_attribute *attr,
2661                               const char *buf, size_t count)
2662 {
2663         struct iwl_priv *priv = dev_get_drvdata(d);
2664         unsigned long val;
2665         int ret;
2666
2667         ret = strict_strtoul(buf, 10, &val);
2668         if (ret)
2669                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2670         else {
2671                 ret = iwl_set_tx_power(priv, val, false);
2672                 if (ret)
2673                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2674                                 ret);
2675                 else
2676                         ret = count;
2677         }
2678         return ret;
2679 }
2680
2681 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2682
2683 static ssize_t show_flags(struct device *d,
2684                           struct device_attribute *attr, char *buf)
2685 {
2686         struct iwl_priv *priv = dev_get_drvdata(d);
2687
2688         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2689 }
2690
2691 static ssize_t store_flags(struct device *d,
2692                            struct device_attribute *attr,
2693                            const char *buf, size_t count)
2694 {
2695         struct iwl_priv *priv = dev_get_drvdata(d);
2696         unsigned long val;
2697         u32 flags;
2698         int ret = strict_strtoul(buf, 0, &val);
2699         if (ret)
2700                 return ret;
2701         flags = (u32)val;
2702
2703         mutex_lock(&priv->mutex);
2704         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2705                 /* Cancel any currently running scans... */
2706                 if (iwl_scan_cancel_timeout(priv, 100))
2707                         IWL_WARN(priv, "Could not cancel scan.\n");
2708                 else {
2709                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2710                         priv->staging_rxon.flags = cpu_to_le32(flags);
2711                         iwlcore_commit_rxon(priv);
2712                 }
2713         }
2714         mutex_unlock(&priv->mutex);
2715
2716         return count;
2717 }
2718
2719 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2720
2721 static ssize_t show_filter_flags(struct device *d,
2722                                  struct device_attribute *attr, char *buf)
2723 {
2724         struct iwl_priv *priv = dev_get_drvdata(d);
2725
2726         return sprintf(buf, "0x%04X\n",
2727                 le32_to_cpu(priv->active_rxon.filter_flags));
2728 }
2729
2730 static ssize_t store_filter_flags(struct device *d,
2731                                   struct device_attribute *attr,
2732                                   const char *buf, size_t count)
2733 {
2734         struct iwl_priv *priv = dev_get_drvdata(d);
2735         unsigned long val;
2736         u32 filter_flags;
2737         int ret = strict_strtoul(buf, 0, &val);
2738         if (ret)
2739                 return ret;
2740         filter_flags = (u32)val;
2741
2742         mutex_lock(&priv->mutex);
2743         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2744                 /* Cancel any currently running scans... */
2745                 if (iwl_scan_cancel_timeout(priv, 100))
2746                         IWL_WARN(priv, "Could not cancel scan.\n");
2747                 else {
2748                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2749                                        "0x%04X\n", filter_flags);
2750                         priv->staging_rxon.filter_flags =
2751                                 cpu_to_le32(filter_flags);
2752                         iwlcore_commit_rxon(priv);
2753                 }
2754         }
2755         mutex_unlock(&priv->mutex);
2756
2757         return count;
2758 }
2759
2760 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2761                    store_filter_flags);
2762
2763
2764 static ssize_t show_statistics(struct device *d,
2765                                struct device_attribute *attr, char *buf)
2766 {
2767         struct iwl_priv *priv = dev_get_drvdata(d);
2768         u32 size = sizeof(struct iwl_notif_statistics);
2769         u32 len = 0, ofs = 0;
2770         u8 *data = (u8 *)&priv->statistics;
2771         int rc = 0;
2772
2773         if (!iwl_is_alive(priv))
2774                 return -EAGAIN;
2775
2776         mutex_lock(&priv->mutex);
2777         rc = iwl_send_statistics_request(priv, 0);
2778         mutex_unlock(&priv->mutex);
2779
2780         if (rc) {
2781                 len = sprintf(buf,
2782                               "Error sending statistics request: 0x%08X\n", rc);
2783                 return len;
2784         }
2785
2786         while (size && (PAGE_SIZE - len)) {
2787                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2788                                    PAGE_SIZE - len, 1);
2789                 len = strlen(buf);
2790                 if (PAGE_SIZE - len)
2791                         buf[len++] = '\n';
2792
2793                 ofs += 16;
2794                 size -= min(size, 16U);
2795         }
2796
2797         return len;
2798 }
2799
2800 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2801
2802
2803 /*****************************************************************************
2804  *
2805  * driver setup and teardown
2806  *
2807  *****************************************************************************/
2808
2809 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2810 {
2811         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2812
2813         init_waitqueue_head(&priv->wait_command_queue);
2814
2815         INIT_WORK(&priv->up, iwl_bg_up);
2816         INIT_WORK(&priv->restart, iwl_bg_restart);
2817         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2818         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2819         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2820         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2821         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2822
2823         iwl_setup_scan_deferred_work(priv);
2824
2825         if (priv->cfg->ops->lib->setup_deferred_work)
2826                 priv->cfg->ops->lib->setup_deferred_work(priv);
2827
2828         init_timer(&priv->statistics_periodic);
2829         priv->statistics_periodic.data = (unsigned long)priv;
2830         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2831
2832         if (!priv->cfg->use_isr_legacy)
2833                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2834                         iwl_irq_tasklet, (unsigned long)priv);
2835         else
2836                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2837                         iwl_irq_tasklet_legacy, (unsigned long)priv);
2838 }
2839
2840 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2841 {
2842         if (priv->cfg->ops->lib->cancel_deferred_work)
2843                 priv->cfg->ops->lib->cancel_deferred_work(priv);
2844
2845         cancel_delayed_work_sync(&priv->init_alive_start);
2846         cancel_delayed_work(&priv->scan_check);
2847         cancel_delayed_work(&priv->alive_start);
2848         cancel_work_sync(&priv->beacon_update);
2849         del_timer_sync(&priv->statistics_periodic);
2850 }
2851
2852 static struct attribute *iwl_sysfs_entries[] = {
2853         &dev_attr_flags.attr,
2854         &dev_attr_filter_flags.attr,
2855         &dev_attr_statistics.attr,
2856         &dev_attr_temperature.attr,
2857         &dev_attr_tx_power.attr,
2858 #ifdef CONFIG_IWLWIFI_DEBUG
2859         &dev_attr_debug_level.attr,
2860 #endif
2861         NULL
2862 };
2863
2864 static struct attribute_group iwl_attribute_group = {
2865         .name = NULL,           /* put in device directory */
2866         .attrs = iwl_sysfs_entries,
2867 };
2868
2869 static struct ieee80211_ops iwl_hw_ops = {
2870         .tx = iwl_mac_tx,
2871         .start = iwl_mac_start,
2872         .stop = iwl_mac_stop,
2873         .add_interface = iwl_mac_add_interface,
2874         .remove_interface = iwl_mac_remove_interface,
2875         .config = iwl_mac_config,
2876         .configure_filter = iwl_configure_filter,
2877         .set_key = iwl_mac_set_key,
2878         .update_tkip_key = iwl_mac_update_tkip_key,
2879         .get_stats = iwl_mac_get_stats,
2880         .get_tx_stats = iwl_mac_get_tx_stats,
2881         .conf_tx = iwl_mac_conf_tx,
2882         .reset_tsf = iwl_mac_reset_tsf,
2883         .bss_info_changed = iwl_bss_info_changed,
2884         .ampdu_action = iwl_mac_ampdu_action,
2885         .hw_scan = iwl_mac_hw_scan
2886 };
2887
2888 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2889 {
2890         int err = 0;
2891         struct iwl_priv *priv;
2892         struct ieee80211_hw *hw;
2893         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2894         unsigned long flags;
2895         u16 pci_cmd;
2896
2897         /************************
2898          * 1. Allocating HW data
2899          ************************/
2900
2901         /* Disabling hardware scan means that mac80211 will perform scans
2902          * "the hard way", rather than using device's scan. */
2903         if (cfg->mod_params->disable_hw_scan) {
2904                 if (iwl_debug_level & IWL_DL_INFO)
2905                         dev_printk(KERN_DEBUG, &(pdev->dev),
2906                                    "Disabling hw_scan\n");
2907                 iwl_hw_ops.hw_scan = NULL;
2908         }
2909
2910         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2911         if (!hw) {
2912                 err = -ENOMEM;
2913                 goto out;
2914         }
2915         priv = hw->priv;
2916         /* At this point both hw and priv are allocated. */
2917
2918         SET_IEEE80211_DEV(hw, &pdev->dev);
2919
2920         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2921         priv->cfg = cfg;
2922         priv->pci_dev = pdev;
2923         priv->inta_mask = CSR_INI_SET_MASK;
2924
2925 #ifdef CONFIG_IWLWIFI_DEBUG
2926         atomic_set(&priv->restrict_refcnt, 0);
2927 #endif
2928         if (iwl_alloc_traffic_mem(priv))
2929                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
2930
2931         /**************************
2932          * 2. Initializing PCI bus
2933          **************************/
2934         if (pci_enable_device(pdev)) {
2935                 err = -ENODEV;
2936                 goto out_ieee80211_free_hw;
2937         }
2938
2939         pci_set_master(pdev);
2940
2941         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2942         if (!err)
2943                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2944         if (err) {
2945                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2946                 if (!err)
2947                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2948                 /* both attempts failed: */
2949                 if (err) {
2950                         IWL_WARN(priv, "No suitable DMA available.\n");
2951                         goto out_pci_disable_device;
2952                 }
2953         }
2954
2955         err = pci_request_regions(pdev, DRV_NAME);
2956         if (err)
2957                 goto out_pci_disable_device;
2958
2959         pci_set_drvdata(pdev, priv);
2960
2961
2962         /***********************
2963          * 3. Read REV register
2964          ***********************/
2965         priv->hw_base = pci_iomap(pdev, 0, 0);
2966         if (!priv->hw_base) {
2967                 err = -ENODEV;
2968                 goto out_pci_release_regions;
2969         }
2970
2971         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2972                 (unsigned long long) pci_resource_len(pdev, 0));
2973         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2974
2975         /* this spin lock will be used in apm_ops.init and EEPROM access
2976          * we should init now
2977          */
2978         spin_lock_init(&priv->reg_lock);
2979         iwl_hw_detect(priv);
2980         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2981                 priv->cfg->name, priv->hw_rev);
2982
2983         /* We disable the RETRY_TIMEOUT register (0x41) to keep
2984          * PCI Tx retries from interfering with C3 CPU state */
2985         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2986
2987         iwl_prepare_card_hw(priv);
2988         if (!priv->hw_ready) {
2989                 IWL_WARN(priv, "Failed, HW not ready\n");
2990                 goto out_iounmap;
2991         }
2992
2993         /* amp init */
2994         err = priv->cfg->ops->lib->apm_ops.init(priv);
2995         if (err < 0) {
2996                 IWL_ERR(priv, "Failed to init APMG\n");
2997                 goto out_iounmap;
2998         }
2999         /*****************
3000          * 4. Read EEPROM
3001          *****************/
3002         /* Read the EEPROM */
3003         err = iwl_eeprom_init(priv);
3004         if (err) {
3005                 IWL_ERR(priv, "Unable to init EEPROM\n");
3006                 goto out_iounmap;
3007         }
3008         err = iwl_eeprom_check_version(priv);
3009         if (err)
3010                 goto out_free_eeprom;
3011
3012         /* extract MAC Address */
3013         iwl_eeprom_get_mac(priv, priv->mac_addr);
3014         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3015         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3016
3017         /************************
3018          * 5. Setup HW constants
3019          ************************/
3020         if (iwl_set_hw_params(priv)) {
3021                 IWL_ERR(priv, "failed to set hw parameters\n");
3022                 goto out_free_eeprom;
3023         }
3024
3025         /*******************
3026          * 6. Setup priv
3027          *******************/
3028
3029         err = iwl_init_drv(priv);
3030         if (err)
3031                 goto out_free_eeprom;
3032         /* At this point both hw and priv are initialized. */
3033
3034         /********************
3035          * 7. Setup services
3036          ********************/
3037         spin_lock_irqsave(&priv->lock, flags);
3038         iwl_disable_interrupts(priv);
3039         spin_unlock_irqrestore(&priv->lock, flags);
3040
3041         pci_enable_msi(priv->pci_dev);
3042
3043         iwl_alloc_isr_ict(priv);
3044         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3045                           IRQF_SHARED, DRV_NAME, priv);
3046         if (err) {
3047                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3048                 goto out_disable_msi;
3049         }
3050         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3051         if (err) {
3052                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3053                 goto out_free_irq;
3054         }
3055
3056         iwl_setup_deferred_work(priv);
3057         iwl_setup_rx_handlers(priv);
3058
3059         /**********************************
3060          * 8. Setup and register mac80211
3061          **********************************/
3062
3063         /* enable interrupts if needed: hw bug w/a */
3064         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3065         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3066                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3067                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3068         }
3069
3070         iwl_enable_interrupts(priv);
3071
3072         err = iwl_setup_mac(priv);
3073         if (err)
3074                 goto out_remove_sysfs;
3075
3076         err = iwl_dbgfs_register(priv, DRV_NAME);
3077         if (err)
3078                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3079
3080         /* If platform's RF_KILL switch is NOT set to KILL */
3081         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3082                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3083         else
3084                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3085
3086         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3087                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3088
3089         iwl_power_initialize(priv);
3090         iwl_tt_initialize(priv);
3091         return 0;
3092
3093  out_remove_sysfs:
3094         destroy_workqueue(priv->workqueue);
3095         priv->workqueue = NULL;
3096         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3097  out_free_irq:
3098         free_irq(priv->pci_dev->irq, priv);
3099         iwl_free_isr_ict(priv);
3100  out_disable_msi:
3101         pci_disable_msi(priv->pci_dev);
3102         iwl_uninit_drv(priv);
3103  out_free_eeprom:
3104         iwl_eeprom_free(priv);
3105  out_iounmap:
3106         pci_iounmap(pdev, priv->hw_base);
3107  out_pci_release_regions:
3108         pci_set_drvdata(pdev, NULL);
3109         pci_release_regions(pdev);
3110  out_pci_disable_device:
3111         pci_disable_device(pdev);
3112  out_ieee80211_free_hw:
3113         iwl_free_traffic_mem(priv);
3114         ieee80211_free_hw(priv->hw);
3115  out:
3116         return err;
3117 }
3118
3119 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3120 {
3121         struct iwl_priv *priv = pci_get_drvdata(pdev);
3122         unsigned long flags;
3123
3124         if (!priv)
3125                 return;
3126
3127         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3128
3129         iwl_dbgfs_unregister(priv);
3130         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3131
3132         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3133          * to be called and iwl_down since we are removing the device
3134          * we need to set STATUS_EXIT_PENDING bit.
3135          */
3136         set_bit(STATUS_EXIT_PENDING, &priv->status);
3137         if (priv->mac80211_registered) {
3138                 ieee80211_unregister_hw(priv->hw);
3139                 priv->mac80211_registered = 0;
3140         } else {
3141                 iwl_down(priv);
3142         }
3143
3144         iwl_tt_exit(priv);
3145
3146         /* make sure we flush any pending irq or
3147          * tasklet for the driver
3148          */
3149         spin_lock_irqsave(&priv->lock, flags);
3150         iwl_disable_interrupts(priv);
3151         spin_unlock_irqrestore(&priv->lock, flags);
3152
3153         iwl_synchronize_irq(priv);
3154
3155         iwl_dealloc_ucode_pci(priv);
3156
3157         if (priv->rxq.bd)
3158                 iwl_rx_queue_free(priv, &priv->rxq);
3159         iwl_hw_txq_ctx_free(priv);
3160
3161         iwl_clear_stations_table(priv);
3162         iwl_eeprom_free(priv);
3163
3164
3165         /*netif_stop_queue(dev); */
3166         flush_workqueue(priv->workqueue);
3167
3168         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3169          * priv->workqueue... so we can't take down the workqueue
3170          * until now... */
3171         destroy_workqueue(priv->workqueue);
3172         priv->workqueue = NULL;
3173         iwl_free_traffic_mem(priv);
3174
3175         free_irq(priv->pci_dev->irq, priv);
3176         pci_disable_msi(priv->pci_dev);
3177         pci_iounmap(pdev, priv->hw_base);
3178         pci_release_regions(pdev);
3179         pci_disable_device(pdev);
3180         pci_set_drvdata(pdev, NULL);
3181
3182         iwl_uninit_drv(priv);
3183
3184         iwl_free_isr_ict(priv);
3185
3186         if (priv->ibss_beacon)
3187                 dev_kfree_skb(priv->ibss_beacon);
3188
3189         ieee80211_free_hw(priv->hw);
3190 }
3191
3192
3193 /*****************************************************************************
3194  *
3195  * driver and module entry point
3196  *
3197  *****************************************************************************/
3198
3199 /* Hardware specific file defines the PCI IDs table for that hardware module */
3200 static struct pci_device_id iwl_hw_card_ids[] = {
3201 #ifdef CONFIG_IWL4965
3202         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3203         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3204 #endif /* CONFIG_IWL4965 */
3205 #ifdef CONFIG_IWL5000
3206         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3207         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3208         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3209         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3210         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3211         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3212         {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3213         {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3214         {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3215         {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3216 /* 5350 WiFi/WiMax */
3217         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3218         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3219         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3220 /* 5150 Wifi/WiMax */
3221         {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3222         {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3223 /* 6000/6050 Series */
3224         {IWL_PCI_DEVICE(0x008D, PCI_ANY_ID, iwl6000h_2agn_cfg)},
3225         {IWL_PCI_DEVICE(0x008E, PCI_ANY_ID, iwl6000h_2agn_cfg)},
3226         {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3227         {IWL_PCI_DEVICE(0x422C, PCI_ANY_ID, iwl6000i_2agn_cfg)},
3228         {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3229         {IWL_PCI_DEVICE(0x4239, PCI_ANY_ID, iwl6000i_2agn_cfg)},
3230         {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3231         {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3232         {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3233         {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
3234 /* 1000 Series WiFi */
3235         {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
3236         {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
3237 #endif /* CONFIG_IWL5000 */
3238
3239         {0}
3240 };
3241 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3242
3243 static struct pci_driver iwl_driver = {
3244         .name = DRV_NAME,
3245         .id_table = iwl_hw_card_ids,
3246         .probe = iwl_pci_probe,
3247         .remove = __devexit_p(iwl_pci_remove),
3248 #ifdef CONFIG_PM
3249         .suspend = iwl_pci_suspend,
3250         .resume = iwl_pci_resume,
3251 #endif
3252 };
3253
3254 static int __init iwl_init(void)
3255 {
3256
3257         int ret;
3258         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3259         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3260
3261         ret = iwlagn_rate_control_register();
3262         if (ret) {
3263                 printk(KERN_ERR DRV_NAME
3264                        "Unable to register rate control algorithm: %d\n", ret);
3265                 return ret;
3266         }
3267
3268         ret = pci_register_driver(&iwl_driver);
3269         if (ret) {
3270                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3271                 goto error_register;
3272         }
3273
3274         return ret;
3275
3276 error_register:
3277         iwlagn_rate_control_unregister();
3278         return ret;
3279 }
3280
3281 static void __exit iwl_exit(void)
3282 {
3283         pci_unregister_driver(&iwl_driver);
3284         iwlagn_rate_control_unregister();
3285 }
3286
3287 module_exit(iwl_exit);
3288 module_init(iwl_init);
3289
3290 #ifdef CONFIG_IWLWIFI_DEBUG
3291 module_param_named(debug50, iwl_debug_level, uint, 0444);
3292 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3293 module_param_named(debug, iwl_debug_level, uint, 0644);
3294 MODULE_PARM_DESC(debug, "debug output mask");
3295 #endif
3296