drivers/net/wireless/b43legacy/main.c

   1 /*
   2  *
   3  *  Broadcom B43legacy wireless driver
   4  *
   5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   6  *  Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
   7  *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
   8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
   9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11  *
  12  *  Some parts of the code in this file are derived from the ipw2200
  13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  14
  15  *  This program is free software; you can redistribute it and/or modify
  16  *  it under the terms of the GNU General Public License as published by
  17  *  the Free Software Foundation; either version 2 of the License, or
  18  *  (at your option) any later version.
  19  *
  20  *  This program is distributed in the hope that it will be useful,
  21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *  GNU General Public License for more details.
  24  *
  25  *  You should have received a copy of the GNU General Public License
  26  *  along with this program; see the file COPYING.  If not, write to
  27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  28  *  Boston, MA 02110-1301, USA.
  29  *
  30  */
  31
  32 #include <linux/delay.h>
  33 #include <linux/init.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/if_arp.h>
  36 #include <linux/etherdevice.h>
  37 #include <linux/version.h>
  38 #include <linux/firmware.h>
  39 #include <linux/wireless.h>
  40 #include <linux/workqueue.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/dma-mapping.h>
  43 #include <net/dst.h>
  44 #include <asm/unaligned.h>
  45
  46 #include "b43legacy.h"
  47 #include "main.h"
  48 #include "debugfs.h"
  49 #include "phy.h"
  50 #include "dma.h"
  51 #include "pio.h"
  52 #include "sysfs.h"
  53 #include "xmit.h"
  54 #include "radio.h"
  55
  56
  57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  58 MODULE_AUTHOR("Martin Langer");
  59 MODULE_AUTHOR("Stefano Brivio");
  60 MODULE_AUTHOR("Michael Buesch");
  61 MODULE_LICENSE("GPL");
  62
  63 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
  64
  65 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  66 static int modparam_pio;
  67 module_param_named(pio, modparam_pio, int, 0444);
  68 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  69 #elif defined(CONFIG_B43LEGACY_DMA)
  70 # define modparam_pio   0
  71 #elif defined(CONFIG_B43LEGACY_PIO)
  72 # define modparam_pio   1
  73 #endif
  74
  75 static int modparam_bad_frames_preempt;
  76 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  77 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  78                  " Preemption");
  79
  80 static char modparam_fwpostfix[16];
  81 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  82 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  83
  84 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  85 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  86         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  87         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  88         SSB_DEVTABLE_END
  89 };
  90 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  91
  92
  93 /* Channel and ratetables are shared for all devices.
  94  * They can't be const, because ieee80211 puts some precalculated
  95  * data in there. This data is the same for all devices, so we don't
  96  * get concurrency issues */
  97 #define RATETAB_ENT(_rateid, _flags) \
  98         {                                                       \
  99                 .rate   = B43legacy_RATE_TO_100KBPS(_rateid),   \
 100                 .val    = (_rateid),                            \
 101                 .val2   = (_rateid),                            \
 102                 .flags  = (_flags),                             \
 103         }
 104 static struct ieee80211_rate __b43legacy_ratetable[] = {
 105         RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
 106         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
 107         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
 108         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
 109         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
 110         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
 111         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
 112         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
 113         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
 114         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
 115         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
 116         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
 117 };
 118 #define b43legacy_a_ratetable           (__b43legacy_ratetable + 4)
 119 #define b43legacy_a_ratetable_size      8
 120 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 121 #define b43legacy_b_ratetable_size      4
 122 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 123 #define b43legacy_g_ratetable_size      12
 124
 125 #define CHANTAB_ENT(_chanid, _freq) \
 126         {                                                       \
 127                 .chan   = (_chanid),                            \
 128                 .freq   = (_freq),                              \
 129                 .val    = (_chanid),                            \
 130                 .flag   = IEEE80211_CHAN_W_SCAN |               \
 131                           IEEE80211_CHAN_W_ACTIVE_SCAN |        \
 132                           IEEE80211_CHAN_W_IBSS,                \
 133                 .power_level    = 0x0A,                         \
 134                 .antenna_max    = 0xFF,                         \
 135         }
 136 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 137         CHANTAB_ENT(1, 2412),
 138         CHANTAB_ENT(2, 2417),
 139         CHANTAB_ENT(3, 2422),
 140         CHANTAB_ENT(4, 2427),
 141         CHANTAB_ENT(5, 2432),
 142         CHANTAB_ENT(6, 2437),
 143         CHANTAB_ENT(7, 2442),
 144         CHANTAB_ENT(8, 2447),
 145         CHANTAB_ENT(9, 2452),
 146         CHANTAB_ENT(10, 2457),
 147         CHANTAB_ENT(11, 2462),
 148         CHANTAB_ENT(12, 2467),
 149         CHANTAB_ENT(13, 2472),
 150         CHANTAB_ENT(14, 2484),
 151 };
 152 #define b43legacy_bg_chantable_size     ARRAY_SIZE(b43legacy_bg_chantable)
 153
 154 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 155 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 156 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 157 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 158
 159
 160 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 161 {
 162         if (!wl || !wl->current_dev)
 163                 return 1;
 164         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 165                 return 1;
 166         /* We are up and running.
 167          * Ratelimit the messages to avoid DoS over the net. */
 168         return net_ratelimit();
 169 }
 170
 171 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 172 {
 173         va_list args;
 174
 175         if (!b43legacy_ratelimit(wl))
 176                 return;
 177         va_start(args, fmt);
 178         printk(KERN_INFO "b43legacy-%s: ",
 179                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 180         vprintk(fmt, args);
 181         va_end(args);
 182 }
 183
 184 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 185 {
 186         va_list args;
 187
 188         if (!b43legacy_ratelimit(wl))
 189                 return;
 190         va_start(args, fmt);
 191         printk(KERN_ERR "b43legacy-%s ERROR: ",
 192                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 193         vprintk(fmt, args);
 194         va_end(args);
 195 }
 196
 197 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 198 {
 199         va_list args;
 200
 201         if (!b43legacy_ratelimit(wl))
 202                 return;
 203         va_start(args, fmt);
 204         printk(KERN_WARNING "b43legacy-%s warning: ",
 205                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 206         vprintk(fmt, args);
 207         va_end(args);
 208 }
 209
 210 #if B43legacy_DEBUG
 211 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 212 {
 213         va_list args;
 214
 215         va_start(args, fmt);
 216         printk(KERN_DEBUG "b43legacy-%s debug: ",
 217                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 218         vprintk(fmt, args);
 219         va_end(args);
 220 }
 221 #endif /* DEBUG */
 222
 223 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 224                                 u32 val)
 225 {
 226         u32 status;
 227
 228         B43legacy_WARN_ON(offset % 4 != 0);
 229
 230         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 231         if (status & B43legacy_MACCTL_BE)
 232                 val = swab32(val);
 233
 234         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 235         mmiowb();
 236         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 237 }
 238
 239 static inline
 240 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 241                                 u16 routing, u16 offset)
 242 {
 243         u32 control;
 244
 245         /* "offset" is the WORD offset. */
 246
 247         control = routing;
 248         control <<= 16;
 249         control |= offset;
 250         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 251 }
 252
 253 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 254                        u16 routing, u16 offset)
 255 {
 256         u32 ret;
 257
 258         if (routing == B43legacy_SHM_SHARED) {
 259                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 260                 if (offset & 0x0003) {
 261                         /* Unaligned access */
 262                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 263                         ret = b43legacy_read16(dev,
 264                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 265                         ret <<= 16;
 266                         b43legacy_shm_control_word(dev, routing,
 267                                                      (offset >> 2) + 1);
 268                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 269
 270                         return ret;
 271                 }
 272                 offset >>= 2;
 273         }
 274         b43legacy_shm_control_word(dev, routing, offset);
 275         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 276
 277         return ret;
 278 }
 279
 280 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 281                            u16 routing, u16 offset)
 282 {
 283         u16 ret;
 284
 285         if (routing == B43legacy_SHM_SHARED) {
 286                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 287                 if (offset & 0x0003) {
 288                         /* Unaligned access */
 289                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 290                         ret = b43legacy_read16(dev,
 291                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 292
 293                         return ret;
 294                 }
 295                 offset >>= 2;
 296         }
 297         b43legacy_shm_control_word(dev, routing, offset);
 298         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 299
 300         return ret;
 301 }
 302
 303 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 304                            u16 routing, u16 offset,
 305                            u32 value)
 306 {
 307         if (routing == B43legacy_SHM_SHARED) {
 308                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 309                 if (offset & 0x0003) {
 310                         /* Unaligned access */
 311                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 312                         mmiowb();
 313                         b43legacy_write16(dev,
 314                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 315                                           (value >> 16) & 0xffff);
 316                         mmiowb();
 317                         b43legacy_shm_control_word(dev, routing,
 318                                                    (offset >> 2) + 1);
 319                         mmiowb();
 320                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 321                                           value & 0xffff);
 322                         return;
 323                 }
 324                 offset >>= 2;
 325         }
 326         b43legacy_shm_control_word(dev, routing, offset);
 327         mmiowb();
 328         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 329 }
 330
 331 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 332                            u16 value)
 333 {
 334         if (routing == B43legacy_SHM_SHARED) {
 335                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 336                 if (offset & 0x0003) {
 337                         /* Unaligned access */
 338                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 339                         mmiowb();
 340                         b43legacy_write16(dev,
 341                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 342                                           value);
 343                         return;
 344                 }
 345                 offset >>= 2;
 346         }
 347         b43legacy_shm_control_word(dev, routing, offset);
 348         mmiowb();
 349         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 350 }
 351
 352 /* Read HostFlags */
 353 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 354 {
 355         u32 ret;
 356
 357         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 358                                    B43legacy_SHM_SH_HOSTFHI);
 359         ret <<= 16;
 360         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 361                                     B43legacy_SHM_SH_HOSTFLO);
 362
 363         return ret;
 364 }
 365
 366 /* Write HostFlags */
 367 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 368 {
 369         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 370                               B43legacy_SHM_SH_HOSTFLO,
 371                               (value & 0x0000FFFF));
 372         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 373                               B43legacy_SHM_SH_HOSTFHI,
 374                               ((value & 0xFFFF0000) >> 16));
 375 }
 376
 377 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 378 {
 379         /* We need to be careful. As we read the TSF from multiple
 380          * registers, we should take care of register overflows.
 381          * In theory, the whole tsf read process should be atomic.
 382          * We try to be atomic here, by restaring the read process,
 383          * if any of the high registers changed (overflew).
 384          */
 385         if (dev->dev->id.revision >= 3) {
 386                 u32 low;
 387                 u32 high;
 388                 u32 high2;
 389
 390                 do {
 391                         high = b43legacy_read32(dev,
 392                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 393                         low = b43legacy_read32(dev,
 394                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 395                         high2 = b43legacy_read32(dev,
 396                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 397                 } while (unlikely(high != high2));
 398
 399                 *tsf = high;
 400                 *tsf <<= 32;
 401                 *tsf |= low;
 402         } else {
 403                 u64 tmp;
 404                 u16 v0;
 405                 u16 v1;
 406                 u16 v2;
 407                 u16 v3;
 408                 u16 test1;
 409                 u16 test2;
 410                 u16 test3;
 411
 412                 do {
 413                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 414                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 415                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 416                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 417
 418                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 419                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 420                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 421                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 422
 423                 *tsf = v3;
 424                 *tsf <<= 48;
 425                 tmp = v2;
 426                 tmp <<= 32;
 427                 *tsf |= tmp;
 428                 tmp = v1;
 429                 tmp <<= 16;
 430                 *tsf |= tmp;
 431                 *tsf |= v0;
 432         }
 433 }
 434
 435 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 436 {
 437         u32 status;
 438
 439         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 440         status |= B43legacy_MACCTL_TBTTHOLD;
 441         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 442         mmiowb();
 443 }
 444
 445 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 446 {
 447         u32 status;
 448
 449         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 450         status &= ~B43legacy_MACCTL_TBTTHOLD;
 451         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 452 }
 453
 454 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 455 {
 456         /* Be careful with the in-progress timer.
 457          * First zero out the low register, so we have a full
 458          * register-overflow duration to complete the operation.
 459          */
 460         if (dev->dev->id.revision >= 3) {
 461                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 462                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 463
 464                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 465                 mmiowb();
 466                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 467                                     hi);
 468                 mmiowb();
 469                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 470                                     lo);
 471         } else {
 472                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 473                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 474                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 475                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 476
 477                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 478                 mmiowb();
 479                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 480                 mmiowb();
 481                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 482                 mmiowb();
 483                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 484                 mmiowb();
 485                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 486         }
 487 }
 488
 489 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 490 {
 491         b43legacy_time_lock(dev);
 492         b43legacy_tsf_write_locked(dev, tsf);
 493         b43legacy_time_unlock(dev);
 494 }
 495
 496 static
 497 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 498                              u16 offset, const u8 *mac)
 499 {
 500         static const u8 zero_addr[ETH_ALEN] = { 0 };
 501         u16 data;
 502
 503         if (!mac)
 504                 mac = zero_addr;
 505
 506         offset |= 0x0020;
 507         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 508
 509         data = mac[0];
 510         data |= mac[1] << 8;
 511         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 512         data = mac[2];
 513         data |= mac[3] << 8;
 514         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 515         data = mac[4];
 516         data |= mac[5] << 8;
 517         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 518 }
 519
 520 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 521 {
 522         static const u8 zero_addr[ETH_ALEN] = { 0 };
 523         const u8 *mac = dev->wl->mac_addr;
 524         const u8 *bssid = dev->wl->bssid;
 525         u8 mac_bssid[ETH_ALEN * 2];
 526         int i;
 527         u32 tmp;
 528
 529         if (!bssid)
 530                 bssid = zero_addr;
 531         if (!mac)
 532                 mac = zero_addr;
 533
 534         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 535
 536         memcpy(mac_bssid, mac, ETH_ALEN);
 537         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 538
 539         /* Write our MAC address and BSSID to template ram */
 540         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 541                 tmp =  (u32)(mac_bssid[i + 0]);
 542                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 543                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 544                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 545                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 546                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 547                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 548         }
 549 }
 550
 551 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 552 {
 553         b43legacy_write_mac_bssid_templates(dev);
 554         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 555                                 dev->wl->mac_addr);
 556 }
 557
 558 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 559                                     u16 slot_time)
 560 {
 561         /* slot_time is in usec. */
 562         if (dev->phy.type != B43legacy_PHYTYPE_G)
 563                 return;
 564         b43legacy_write16(dev, 0x684, 510 + slot_time);
 565         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 566                               slot_time);
 567 }
 568
 569 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 570 {
 571         b43legacy_set_slot_time(dev, 9);
 572         dev->short_slot = 1;
 573 }
 574
 575 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 576 {
 577         b43legacy_set_slot_time(dev, 20);
 578         dev->short_slot = 0;
 579 }
 580
 581 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
 582  * Returns the _previously_ enabled IRQ mask.
 583  */
 584 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
 585                                              u32 mask)
 586 {
 587         u32 old_mask;
 588
 589         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 590         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
 591                           mask);
 592
 593         return old_mask;
 594 }
 595
 596 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
 597  * Returns the _previously_ enabled IRQ mask.
 598  */
 599 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
 600                                               u32 mask)
 601 {
 602         u32 old_mask;
 603
 604         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 605         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
 606
 607         return old_mask;
 608 }
 609
 610 /* Synchronize IRQ top- and bottom-half.
 611  * IRQs must be masked before calling this.
 612  * This must not be called with the irq_lock held.
 613  */
 614 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 615 {
 616         synchronize_irq(dev->dev->irq);
 617         tasklet_kill(&dev->isr_tasklet);
 618 }
 619
 620 /* DummyTransmission function, as documented on
 621  * http://bcm-specs.sipsolutions.net/DummyTransmission
 622  */
 623 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 624 {
 625         struct b43legacy_phy *phy = &dev->phy;
 626         unsigned int i;
 627         unsigned int max_loop;
 628         u16 value;
 629         u32 buffer[5] = {
 630                 0x00000000,
 631                 0x00D40000,
 632                 0x00000000,
 633                 0x01000000,
 634                 0x00000000,
 635         };
 636
 637         switch (phy->type) {
 638         case B43legacy_PHYTYPE_B:
 639         case B43legacy_PHYTYPE_G:
 640                 max_loop = 0xFA;
 641                 buffer[0] = 0x000B846E;
 642                 break;
 643         default:
 644                 B43legacy_BUG_ON(1);
 645                 return;
 646         }
 647
 648         for (i = 0; i < 5; i++)
 649                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 650
 651         /* dummy read follows */
 652         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 653
 654         b43legacy_write16(dev, 0x0568, 0x0000);
 655         b43legacy_write16(dev, 0x07C0, 0x0000);
 656         b43legacy_write16(dev, 0x050C, 0x0000);
 657         b43legacy_write16(dev, 0x0508, 0x0000);
 658         b43legacy_write16(dev, 0x050A, 0x0000);
 659         b43legacy_write16(dev, 0x054C, 0x0000);
 660         b43legacy_write16(dev, 0x056A, 0x0014);
 661         b43legacy_write16(dev, 0x0568, 0x0826);
 662         b43legacy_write16(dev, 0x0500, 0x0000);
 663         b43legacy_write16(dev, 0x0502, 0x0030);
 664
 665         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 666                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 667         for (i = 0x00; i < max_loop; i++) {
 668                 value = b43legacy_read16(dev, 0x050E);
 669                 if (value & 0x0080)
 670                         break;
 671                 udelay(10);
 672         }
 673         for (i = 0x00; i < 0x0A; i++) {
 674                 value = b43legacy_read16(dev, 0x050E);
 675                 if (value & 0x0400)
 676                         break;
 677                 udelay(10);
 678         }
 679         for (i = 0x00; i < 0x0A; i++) {
 680                 value = b43legacy_read16(dev, 0x0690);
 681                 if (!(value & 0x0100))
 682                         break;
 683                 udelay(10);
 684         }
 685         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 686                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 687 }
 688
 689 /* Turn the Analog ON/OFF */
 690 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 691 {
 692         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 693 }
 694
 695 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 696 {
 697         u32 tmslow;
 698         u32 macctl;
 699
 700         flags |= B43legacy_TMSLOW_PHYCLKEN;
 701         flags |= B43legacy_TMSLOW_PHYRESET;
 702         ssb_device_enable(dev->dev, flags);
 703         msleep(2); /* Wait for the PLL to turn on. */
 704
 705         /* Now take the PHY out of Reset again */
 706         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 707         tmslow |= SSB_TMSLOW_FGC;
 708         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 709         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 710         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 711         msleep(1);
 712         tmslow &= ~SSB_TMSLOW_FGC;
 713         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 714         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 715         msleep(1);
 716
 717         /* Turn Analog ON */
 718         b43legacy_switch_analog(dev, 1);
 719
 720         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 721         macctl &= ~B43legacy_MACCTL_GMODE;
 722         if (flags & B43legacy_TMSLOW_GMODE) {
 723                 macctl |= B43legacy_MACCTL_GMODE;
 724                 dev->phy.gmode = 1;
 725         } else
 726                 dev->phy.gmode = 0;
 727         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 728         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 729 }
 730
 731 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 732 {
 733         u32 v0;
 734         u32 v1;
 735         u16 tmp;
 736         struct b43legacy_txstatus stat;
 737
 738         while (1) {
 739                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 740                 if (!(v0 & 0x00000001))
 741                         break;
 742                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 743
 744                 stat.cookie = (v0 >> 16);
 745                 stat.seq = (v1 & 0x0000FFFF);
 746                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 747                 tmp = (v0 & 0x0000FFFF);
 748                 stat.frame_count = ((tmp & 0xF000) >> 12);
 749                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 750                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 751                 stat.pm_indicated = !!(tmp & 0x0080);
 752                 stat.intermediate = !!(tmp & 0x0040);
 753                 stat.for_ampdu = !!(tmp & 0x0020);
 754                 stat.acked = !!(tmp & 0x0002);
 755
 756                 b43legacy_handle_txstatus(dev, &stat);
 757         }
 758 }
 759
 760 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 761 {
 762         u32 dummy;
 763
 764         if (dev->dev->id.revision < 5)
 765                 return;
 766         /* Read all entries from the microcode TXstatus FIFO
 767          * and throw them away.
 768          */
 769         while (1) {
 770                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 771                 if (!(dummy & 0x00000001))
 772                         break;
 773                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 774         }
 775 }
 776
 777 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 778 {
 779         u32 val = 0;
 780
 781         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 782         val <<= 16;
 783         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 784
 785         return val;
 786 }
 787
 788 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 789 {
 790         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 791                               (jssi & 0x0000FFFF));
 792         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 793                               (jssi & 0xFFFF0000) >> 16);
 794 }
 795
 796 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 797 {
 798         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 799         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 800                           b43legacy_read32(dev,
 801                           B43legacy_MMIO_MACCMD)
 802                           | (1 << 4));
 803         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 804                             dev->phy.channel);
 805 }
 806
 807 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 808 {
 809         /* Top half of Link Quality calculation. */
 810
 811         if (dev->noisecalc.calculation_running)
 812                 return;
 813         dev->noisecalc.channel_at_start = dev->phy.channel;
 814         dev->noisecalc.calculation_running = 1;
 815         dev->noisecalc.nr_samples = 0;
 816
 817         b43legacy_generate_noise_sample(dev);
 818 }
 819
 820 static void handle_irq_noise(struct b43legacy_wldev *dev)
 821 {
 822         struct b43legacy_phy *phy = &dev->phy;
 823         u16 tmp;
 824         u8 noise[4];
 825         u8 i;
 826         u8 j;
 827         s32 average;
 828
 829         /* Bottom half of Link Quality calculation. */
 830
 831         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 832         if (dev->noisecalc.channel_at_start != phy->channel)
 833                 goto drop_calculation;
 834         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 835         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 836             noise[2] == 0x7F || noise[3] == 0x7F)
 837                 goto generate_new;
 838
 839         /* Get the noise samples. */
 840         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 841         i = dev->noisecalc.nr_samples;
 842         noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 843         noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 844         noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 845         noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 846         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 847         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 848         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 849         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 850         dev->noisecalc.nr_samples++;
 851         if (dev->noisecalc.nr_samples == 8) {
 852                 /* Calculate the Link Quality by the noise samples. */
 853                 average = 0;
 854                 for (i = 0; i < 8; i++) {
 855                         for (j = 0; j < 4; j++)
 856                                 average += dev->noisecalc.samples[i][j];
 857                 }
 858                 average /= (8 * 4);
 859                 average *= 125;
 860                 average += 64;
 861                 average /= 128;
 862                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 863                                              0x40C);
 864                 tmp = (tmp / 128) & 0x1F;
 865                 if (tmp >= 8)
 866                         average += 2;
 867                 else
 868                         average -= 25;
 869                 if (tmp == 8)
 870                         average -= 72;
 871                 else
 872                         average -= 48;
 873
 874                 dev->stats.link_noise = average;
 875 drop_calculation:
 876                 dev->noisecalc.calculation_running = 0;
 877                 return;
 878         }
 879 generate_new:
 880         b43legacy_generate_noise_sample(dev);
 881 }
 882
 883 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 884 {
 885         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
 886                 /* TODO: PS TBTT */
 887         } else {
 888                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 889                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 890         }
 891         dev->reg124_set_0x4 = 0;
 892         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
 893                 dev->reg124_set_0x4 = 1;
 894 }
 895
 896 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 897 {
 898         if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
 899                 return;
 900         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 901                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 902                           | 0x4);
 903 }
 904
 905 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 906 {
 907         u32 tmp;
 908
 909         /* TODO: AP mode. */
 910
 911         while (1) {
 912                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 913                 if (!(tmp & 0x00000008))
 914                         break;
 915         }
 916         /* 16bit write is odd, but correct. */
 917         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 918 }
 919
 920 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 921                                             const u8 *data, u16 size,
 922                                             u16 ram_offset,
 923                                             u16 shm_size_offset, u8 rate)
 924 {
 925         u32 i;
 926         u32 tmp;
 927         struct b43legacy_plcp_hdr4 plcp;
 928
 929         plcp.data = 0;
 930         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 931         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 932         ram_offset += sizeof(u32);
 933         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 934          * So leave the first two bytes of the next write blank.
 935          */
 936         tmp = (u32)(data[0]) << 16;
 937         tmp |= (u32)(data[1]) << 24;
 938         b43legacy_ram_write(dev, ram_offset, tmp);
 939         ram_offset += sizeof(u32);
 940         for (i = 2; i < size; i += sizeof(u32)) {
 941                 tmp = (u32)(data[i + 0]);
 942                 if (i + 1 < size)
 943                         tmp |= (u32)(data[i + 1]) << 8;
 944                 if (i + 2 < size)
 945                         tmp |= (u32)(data[i + 2]) << 16;
 946                 if (i + 3 < size)
 947                         tmp |= (u32)(data[i + 3]) << 24;
 948                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 949         }
 950         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 951                               size + sizeof(struct b43legacy_plcp_hdr6));
 952 }
 953
 954 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 955                                             u16 ram_offset,
 956                                             u16 shm_size_offset, u8 rate)
 957 {
 958         int len;
 959         const u8 *data;
 960
 961         B43legacy_WARN_ON(!dev->cached_beacon);
 962         len = min((size_t)dev->cached_beacon->len,
 963                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 964         data = (const u8 *)(dev->cached_beacon->data);
 965         b43legacy_write_template_common(dev, data,
 966                                         len, ram_offset,
 967                                         shm_size_offset, rate);
 968 }
 969
 970 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
 971                                             u16 shm_offset, u16 size,
 972                                             u8 rate)
 973 {
 974         struct b43legacy_plcp_hdr4 plcp;
 975         u32 tmp;
 976         __le16 dur;
 977
 978         plcp.data = 0;
 979         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 980         dur = ieee80211_generic_frame_duration(dev->wl->hw,
 981                                                dev->wl->vif,
 982                                                size,
 983                                                B43legacy_RATE_TO_100KBPS(rate));
 984         /* Write PLCP in two parts and timing for packet transfer */
 985         tmp = le32_to_cpu(plcp.data);
 986         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
 987                               tmp & 0xFFFF);
 988         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
 989                               tmp >> 16);
 990         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
 991                               le16_to_cpu(dur));
 992 }
 993
 994 /* Instead of using custom probe response template, this function
 995  * just patches custom beacon template by:
 996  * 1) Changing packet type
 997  * 2) Patching duration field
 998  * 3) Stripping TIM
 999  */
1000 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1001                                          u16 *dest_size, u8 rate)
1002 {
1003         const u8 *src_data;
1004         u8 *dest_data;
1005         u16 src_size;
1006         u16 elem_size;
1007         u16 src_pos;
1008         u16 dest_pos;
1009         __le16 dur;
1010         struct ieee80211_hdr *hdr;
1011
1012         B43legacy_WARN_ON(!dev->cached_beacon);
1013         src_size = dev->cached_beacon->len;
1014         src_data = (const u8 *)dev->cached_beacon->data;
1015
1016         if (unlikely(src_size < 0x24)) {
1017                 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1018                        "invalid beacon\n");
1019                 return NULL;
1020         }
1021
1022         dest_data = kmalloc(src_size, GFP_ATOMIC);
1023         if (unlikely(!dest_data))
1024                 return NULL;
1025
1026         /* 0x24 is offset of first variable-len Information-Element
1027          * in beacon frame.
1028          */
1029         memcpy(dest_data, src_data, 0x24);
1030         src_pos = 0x24;
1031         dest_pos = 0x24;
1032         for (; src_pos < src_size - 2; src_pos += elem_size) {
1033                 elem_size = src_data[src_pos + 1] + 2;
1034                 if (src_data[src_pos] != 0x05) { /* TIM */
1035                         memcpy(dest_data + dest_pos, src_data + src_pos,
1036                                elem_size);
1037                         dest_pos += elem_size;
1038                 }
1039         }
1040         *dest_size = dest_pos;
1041         hdr = (struct ieee80211_hdr *)dest_data;
1042
1043         /* Set the frame control. */
1044         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1045                                          IEEE80211_STYPE_PROBE_RESP);
1046         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1047                                                dev->wl->vif,
1048                                                *dest_size,
1049                                                B43legacy_RATE_TO_100KBPS(rate));
1050         hdr->duration_id = dur;
1051
1052         return dest_data;
1053 }
1054
1055 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1056                                                 u16 ram_offset,
1057                                                 u16 shm_size_offset, u8 rate)
1058 {
1059         u8 *probe_resp_data;
1060         u16 size;
1061
1062         B43legacy_WARN_ON(!dev->cached_beacon);
1063         size = dev->cached_beacon->len;
1064         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1065         if (unlikely(!probe_resp_data))
1066                 return;
1067
1068         /* Looks like PLCP headers plus packet timings are stored for
1069          * all possible basic rates
1070          */
1071         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1072                                         B43legacy_CCK_RATE_1MB);
1073         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1074                                         B43legacy_CCK_RATE_2MB);
1075         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1076                                         B43legacy_CCK_RATE_5MB);
1077         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1078                                         B43legacy_CCK_RATE_11MB);
1079
1080         size = min((size_t)size,
1081                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1082         b43legacy_write_template_common(dev, probe_resp_data,
1083                                         size, ram_offset,
1084                                         shm_size_offset, rate);
1085         kfree(probe_resp_data);
1086 }
1087
1088 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1089                                            struct sk_buff *beacon)
1090 {
1091         if (dev->cached_beacon)
1092                 kfree_skb(dev->cached_beacon);
1093         dev->cached_beacon = beacon;
1094
1095         return 0;
1096 }
1097
1098 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1099 {
1100         u32 status;
1101
1102         B43legacy_WARN_ON(!dev->cached_beacon);
1103
1104         b43legacy_write_beacon_template(dev, 0x68, 0x18,
1105                                         B43legacy_CCK_RATE_1MB);
1106         b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1107                                         B43legacy_CCK_RATE_1MB);
1108         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1109                                             B43legacy_CCK_RATE_11MB);
1110
1111         status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1112         status |= 0x03;
1113         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, status);
1114 }
1115
1116 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1117                                         struct sk_buff *beacon)
1118 {
1119         int err;
1120
1121         err = b43legacy_refresh_cached_beacon(dev, beacon);
1122         if (unlikely(err))
1123                 return;
1124         b43legacy_update_templates(dev);
1125 }
1126
1127 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1128                                const u8 *ssid, u8 ssid_len)
1129 {
1130         u32 tmp;
1131         u16 i;
1132         u16 len;
1133
1134         len = min((u16)ssid_len, (u16)0x100);
1135         for (i = 0; i < len; i += sizeof(u32)) {
1136                 tmp = (u32)(ssid[i + 0]);
1137                 if (i + 1 < len)
1138                         tmp |= (u32)(ssid[i + 1]) << 8;
1139                 if (i + 2 < len)
1140                         tmp |= (u32)(ssid[i + 2]) << 16;
1141                 if (i + 3 < len)
1142                         tmp |= (u32)(ssid[i + 3]) << 24;
1143                 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1144                                       0x380 + i, tmp);
1145         }
1146         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1147                               0x48, len);
1148 }
1149
1150 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1151                                      u16 beacon_int)
1152 {
1153         b43legacy_time_lock(dev);
1154         if (dev->dev->id.revision >= 3)
1155                 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1156         else {
1157                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1158                 b43legacy_write16(dev, 0x610, beacon_int);
1159         }
1160         b43legacy_time_unlock(dev);
1161 }
1162
1163 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1164 {
1165         u32 status;
1166
1167         if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1168                 return;
1169
1170         dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1171         status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1172
1173         if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1174                 /* ACK beacon IRQ. */
1175                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1176                                   B43legacy_IRQ_BEACON);
1177                 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1178                 if (dev->cached_beacon)
1179                         kfree_skb(dev->cached_beacon);
1180                 dev->cached_beacon = NULL;
1181                 return;
1182         }
1183         if (!(status & 0x1)) {
1184                 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1185                                                 B43legacy_CCK_RATE_1MB);
1186                 status |= 0x1;
1187                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1188                                   status);
1189         }
1190         if (!(status & 0x2)) {
1191                 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1192                                                 B43legacy_CCK_RATE_1MB);
1193                 status |= 0x2;
1194                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1195                                   status);
1196         }
1197 }
1198
1199 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1200 {
1201 }
1202
1203 /* Interrupt handler bottom-half */
1204 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1205 {
1206         u32 reason;
1207         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1208         u32 merged_dma_reason = 0;
1209         int i;
1210         unsigned long flags;
1211
1212         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1213
1214         B43legacy_WARN_ON(b43legacy_status(dev) <
1215                           B43legacy_STAT_INITIALIZED);
1216
1217         reason = dev->irq_reason;
1218         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1219                 dma_reason[i] = dev->dma_reason[i];
1220                 merged_dma_reason |= dma_reason[i];
1221         }
1222
1223         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1224                 b43legacyerr(dev->wl, "MAC transmission error\n");
1225
1226         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1227                 b43legacyerr(dev->wl, "PHY transmission error\n");
1228                 rmb();
1229                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1230                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1231                                               "restarting the controller\n");
1232                         b43legacy_controller_restart(dev, "PHY TX errors");
1233                 }
1234         }
1235
1236         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1237                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1238                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1239                         b43legacyerr(dev->wl, "Fatal DMA error: "
1240                                "0x%08X, 0x%08X, 0x%08X, "
1241                                "0x%08X, 0x%08X, 0x%08X\n",
1242                                dma_reason[0], dma_reason[1],
1243                                dma_reason[2], dma_reason[3],
1244                                dma_reason[4], dma_reason[5]);
1245                         b43legacy_controller_restart(dev, "DMA error");
1246                         mmiowb();
1247                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1248                         return;
1249                 }
1250                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1251                         b43legacyerr(dev->wl, "DMA error: "
1252                                "0x%08X, 0x%08X, 0x%08X, "
1253                                "0x%08X, 0x%08X, 0x%08X\n",
1254                                dma_reason[0], dma_reason[1],
1255                                dma_reason[2], dma_reason[3],
1256                                dma_reason[4], dma_reason[5]);
1257         }
1258
1259         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1260                 handle_irq_ucode_debug(dev);
1261         if (reason & B43legacy_IRQ_TBTT_INDI)
1262                 handle_irq_tbtt_indication(dev);
1263         if (reason & B43legacy_IRQ_ATIM_END)
1264                 handle_irq_atim_end(dev);
1265         if (reason & B43legacy_IRQ_BEACON)
1266                 handle_irq_beacon(dev);
1267         if (reason & B43legacy_IRQ_PMQ)
1268                 handle_irq_pmq(dev);
1269         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1270                 ;/*TODO*/
1271         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1272                 handle_irq_noise(dev);
1273
1274         /* Check the DMA reason registers for received data. */
1275         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1276                 if (b43legacy_using_pio(dev))
1277                         b43legacy_pio_rx(dev->pio.queue0);
1278                 else
1279                         b43legacy_dma_rx(dev->dma.rx_ring0);
1280         }
1281         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1282         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1283         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1284                 if (b43legacy_using_pio(dev))
1285                         b43legacy_pio_rx(dev->pio.queue3);
1286                 else
1287                         b43legacy_dma_rx(dev->dma.rx_ring3);
1288         }
1289         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1290         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1291
1292         if (reason & B43legacy_IRQ_TX_OK)
1293                 handle_irq_transmit_status(dev);
1294
1295         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1296         mmiowb();
1297         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1298 }
1299
1300 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1301                                u16 base, int queueidx)
1302 {
1303         u16 rxctl;
1304
1305         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1306         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1307                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1308         else
1309                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1310 }
1311
1312 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1313 {
1314         if (b43legacy_using_pio(dev) &&
1315             (dev->dev->id.revision < 3) &&
1316             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1317                 /* Apply a PIO specific workaround to the dma_reasons */
1318                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1319                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1320                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1321                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1322         }
1323
1324         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1325
1326         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1327                           dev->dma_reason[0]);
1328         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1329                           dev->dma_reason[1]);
1330         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1331                           dev->dma_reason[2]);
1332         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1333                           dev->dma_reason[3]);
1334         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1335                           dev->dma_reason[4]);
1336         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1337                           dev->dma_reason[5]);
1338 }
1339
1340 /* Interrupt handler top-half */
1341 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1342 {
1343         irqreturn_t ret = IRQ_NONE;
1344         struct b43legacy_wldev *dev = dev_id;
1345         u32 reason;
1346
1347         if (!dev)
1348                 return IRQ_NONE;
1349
1350         spin_lock(&dev->wl->irq_lock);
1351
1352         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1353                 goto out;
1354         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1355         if (reason == 0xffffffff) /* shared IRQ */
1356                 goto out;
1357         ret = IRQ_HANDLED;
1358         reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1359         if (!reason)
1360                 goto out;
1361
1362         dev->dma_reason[0] = b43legacy_read32(dev,
1363                                               B43legacy_MMIO_DMA0_REASON)
1364                                               & 0x0001DC00;
1365         dev->dma_reason[1] = b43legacy_read32(dev,
1366                                               B43legacy_MMIO_DMA1_REASON)
1367                                               & 0x0000DC00;
1368         dev->dma_reason[2] = b43legacy_read32(dev,
1369                                               B43legacy_MMIO_DMA2_REASON)
1370                                               & 0x0000DC00;
1371         dev->dma_reason[3] = b43legacy_read32(dev,
1372                                               B43legacy_MMIO_DMA3_REASON)
1373                                               & 0x0001DC00;
1374         dev->dma_reason[4] = b43legacy_read32(dev,
1375                                               B43legacy_MMIO_DMA4_REASON)
1376                                               & 0x0000DC00;
1377         dev->dma_reason[5] = b43legacy_read32(dev,
1378                                               B43legacy_MMIO_DMA5_REASON)
1379                                               & 0x0000DC00;
1380
1381         b43legacy_interrupt_ack(dev, reason);
1382         /* disable all IRQs. They are enabled again in the bottom half. */
1383         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1384                                                           B43legacy_IRQ_ALL);
1385         /* save the reason code and call our bottom half. */
1386         dev->irq_reason = reason;
1387         tasklet_schedule(&dev->isr_tasklet);
1388 out:
1389         mmiowb();
1390         spin_unlock(&dev->wl->irq_lock);
1391
1392         return ret;
1393 }
1394
1395 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1396 {
1397         release_firmware(dev->fw.ucode);
1398         dev->fw.ucode = NULL;
1399         release_firmware(dev->fw.pcm);
1400         dev->fw.pcm = NULL;
1401         release_firmware(dev->fw.initvals);
1402         dev->fw.initvals = NULL;
1403         release_firmware(dev->fw.initvals_band);
1404         dev->fw.initvals_band = NULL;
1405 }
1406
1407 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1408 {
1409         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1410                      "Drivers/b43#devicefirmware "
1411                      "and download the correct firmware (version 3).\n");
1412 }
1413
1414 static int do_request_fw(struct b43legacy_wldev *dev,
1415                          const char *name,
1416                          const struct firmware **fw)
1417 {
1418         char path[sizeof(modparam_fwpostfix) + 32];
1419         struct b43legacy_fw_header *hdr;
1420         u32 size;
1421         int err;
1422
1423         if (!name)
1424                 return 0;
1425
1426         snprintf(path, ARRAY_SIZE(path),
1427                  "b43legacy%s/%s.fw",
1428                  modparam_fwpostfix, name);
1429         err = request_firmware(fw, path, dev->dev->dev);
1430         if (err) {
1431                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1432                        "or load failed.\n", path);
1433                 return err;
1434         }
1435         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1436                 goto err_format;
1437         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1438         switch (hdr->type) {
1439         case B43legacy_FW_TYPE_UCODE:
1440         case B43legacy_FW_TYPE_PCM:
1441                 size = be32_to_cpu(hdr->size);
1442                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1443                         goto err_format;
1444                 /* fallthrough */
1445         case B43legacy_FW_TYPE_IV:
1446                 if (hdr->ver != 1)
1447                         goto err_format;
1448                 break;
1449         default:
1450                 goto err_format;
1451         }
1452
1453         return err;
1454
1455 err_format:
1456         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1457         return -EPROTO;
1458 }
1459
1460 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1461 {
1462         struct b43legacy_firmware *fw = &dev->fw;
1463         const u8 rev = dev->dev->id.revision;
1464         const char *filename;
1465         u32 tmshigh;
1466         int err;
1467
1468         tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1469         if (!fw->ucode) {
1470                 if (rev == 2)
1471                         filename = "ucode2";
1472                 else if (rev == 4)
1473                         filename = "ucode4";
1474                 else
1475                         filename = "ucode5";
1476                 err = do_request_fw(dev, filename, &fw->ucode);
1477                 if (err)
1478                         goto err_load;
1479         }
1480         if (!fw->pcm) {
1481                 if (rev < 5)
1482                         filename = "pcm4";
1483                 else
1484                         filename = "pcm5";
1485                 err = do_request_fw(dev, filename, &fw->pcm);
1486                 if (err)
1487                         goto err_load;
1488         }
1489         if (!fw->initvals) {
1490                 switch (dev->phy.type) {
1491                 case B43legacy_PHYTYPE_G:
1492                         if ((rev >= 5) && (rev <= 10))
1493                                 filename = "b0g0initvals5";
1494                         else if (rev == 2 || rev == 4)
1495                                 filename = "b0g0initvals2";
1496                         else
1497                                 goto err_no_initvals;
1498                         break;
1499                 default:
1500                         goto err_no_initvals;
1501                 }
1502                 err = do_request_fw(dev, filename, &fw->initvals);
1503                 if (err)
1504                         goto err_load;
1505         }
1506         if (!fw->initvals_band) {
1507                 switch (dev->phy.type) {
1508                 case B43legacy_PHYTYPE_G:
1509                         if ((rev >= 5) && (rev <= 10))
1510                                 filename = "b0g0bsinitvals5";
1511                         else if (rev >= 11)
1512                                 filename = NULL;
1513                         else if (rev == 2 || rev == 4)
1514                                 filename = NULL;
1515                         else
1516                                 goto err_no_initvals;
1517                         break;
1518                 default:
1519                         goto err_no_initvals;
1520                 }
1521                 err = do_request_fw(dev, filename, &fw->initvals_band);
1522                 if (err)
1523                         goto err_load;
1524         }
1525
1526         return 0;
1527
1528 err_load:
1529         b43legacy_print_fw_helptext(dev->wl);
1530         goto error;
1531
1532 err_no_initvals:
1533         err = -ENODEV;
1534         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1535                "core rev %u\n", dev->phy.type, rev);
1536         goto error;
1537
1538 error:
1539         b43legacy_release_firmware(dev);
1540         return err;
1541 }
1542
1543 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1544 {
1545         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1546         const __be32 *data;
1547         unsigned int i;
1548         unsigned int len;
1549         u16 fwrev;
1550         u16 fwpatch;
1551         u16 fwdate;
1552         u16 fwtime;
1553         u32 tmp, macctl;
1554         int err = 0;
1555
1556         /* Jump the microcode PSM to offset 0 */
1557         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1558         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1559         macctl |= B43legacy_MACCTL_PSM_JMP0;
1560         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1561         /* Zero out all microcode PSM registers and shared memory. */
1562         for (i = 0; i < 64; i++)
1563                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1564         for (i = 0; i < 4096; i += 2)
1565                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1566
1567         /* Upload Microcode. */
1568         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1569         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1570         b43legacy_shm_control_word(dev,
1571                                    B43legacy_SHM_UCODE |
1572                                    B43legacy_SHM_AUTOINC_W,
1573                                    0x0000);
1574         for (i = 0; i < len; i++) {
1575                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1576                                     be32_to_cpu(data[i]));
1577                 udelay(10);
1578         }
1579
1580         if (dev->fw.pcm) {
1581                 /* Upload PCM data. */
1582                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1583                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1584                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1585                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1586                 /* No need for autoinc bit in SHM_HW */
1587                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1588                 for (i = 0; i < len; i++) {
1589                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1590                                           be32_to_cpu(data[i]));
1591                         udelay(10);
1592                 }
1593         }
1594
1595         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1596                           B43legacy_IRQ_ALL);
1597
1598         /* Start the microcode PSM */
1599         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1600         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1601         macctl |= B43legacy_MACCTL_PSM_RUN;
1602         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1603
1604         /* Wait for the microcode to load and respond */
1605         i = 0;
1606         while (1) {
1607                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1608                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1609                         break;
1610                 i++;
1611                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1612                         b43legacyerr(dev->wl, "Microcode not responding\n");
1613                         b43legacy_print_fw_helptext(dev->wl);
1614                         err = -ENODEV;
1615                         goto error;
1616                 }
1617                 msleep_interruptible(50);
1618                 if (signal_pending(current)) {
1619                         err = -EINTR;
1620                         goto error;
1621                 }
1622         }
1623         /* dummy read follows */
1624         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1625
1626         /* Get and check the revisions. */
1627         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1628                                      B43legacy_SHM_SH_UCODEREV);
1629         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1630                                        B43legacy_SHM_SH_UCODEPATCH);
1631         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1632                                       B43legacy_SHM_SH_UCODEDATE);
1633         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1634                                       B43legacy_SHM_SH_UCODETIME);
1635
1636         if (fwrev > 0x128) {
1637                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1638                              " Only firmware from binary drivers version 3.x"
1639                              " is supported. You must change your firmware"
1640                              " files.\n");
1641                 b43legacy_print_fw_helptext(dev->wl);
1642                 err = -EOPNOTSUPP;
1643                 goto error;
1644         }
1645         b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1646                "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1647                (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1648                (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
1649
1650         dev->fw.rev = fwrev;
1651         dev->fw.patch = fwpatch;
1652
1653         return 0;
1654
1655 error:
1656         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1657         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1658         macctl |= B43legacy_MACCTL_PSM_JMP0;
1659         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1660
1661         return err;
1662 }
1663
1664 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1665                                     const struct b43legacy_iv *ivals,
1666                                     size_t count,
1667                                     size_t array_size)
1668 {
1669         const struct b43legacy_iv *iv;
1670         u16 offset;
1671         size_t i;
1672         bool bit32;
1673
1674         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1675         iv = ivals;
1676         for (i = 0; i < count; i++) {
1677                 if (array_size < sizeof(iv->offset_size))
1678                         goto err_format;
1679                 array_size -= sizeof(iv->offset_size);
1680                 offset = be16_to_cpu(iv->offset_size);
1681                 bit32 = !!(offset & B43legacy_IV_32BIT);
1682                 offset &= B43legacy_IV_OFFSET_MASK;
1683                 if (offset >= 0x1000)
1684                         goto err_format;
1685                 if (bit32) {
1686                         u32 value;
1687
1688                         if (array_size < sizeof(iv->data.d32))
1689                                 goto err_format;
1690                         array_size -= sizeof(iv->data.d32);
1691
1692                         value = be32_to_cpu(get_unaligned(&iv->data.d32));
1693                         b43legacy_write32(dev, offset, value);
1694
1695                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1696                                                         sizeof(__be16) +
1697                                                         sizeof(__be32));
1698                 } else {
1699                         u16 value;
1700
1701                         if (array_size < sizeof(iv->data.d16))
1702                                 goto err_format;
1703                         array_size -= sizeof(iv->data.d16);
1704
1705                         value = be16_to_cpu(iv->data.d16);
1706                         b43legacy_write16(dev, offset, value);
1707
1708                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1709                                                         sizeof(__be16) +
1710                                                         sizeof(__be16));
1711                 }
1712         }
1713         if (array_size)
1714                 goto err_format;
1715
1716         return 0;
1717
1718 err_format:
1719         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1720         b43legacy_print_fw_helptext(dev->wl);
1721
1722         return -EPROTO;
1723 }
1724
1725 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1726 {
1727         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1728         const struct b43legacy_fw_header *hdr;
1729         struct b43legacy_firmware *fw = &dev->fw;
1730         const struct b43legacy_iv *ivals;
1731         size_t count;
1732         int err;
1733
1734         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1735         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1736         count = be32_to_cpu(hdr->size);
1737         err = b43legacy_write_initvals(dev, ivals, count,
1738                                  fw->initvals->size - hdr_len);
1739         if (err)
1740                 goto out;
1741         if (fw->initvals_band) {
1742                 hdr = (const struct b43legacy_fw_header *)
1743                       (fw->initvals_band->data);
1744                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1745                         + hdr_len);
1746                 count = be32_to_cpu(hdr->size);
1747                 err = b43legacy_write_initvals(dev, ivals, count,
1748                                          fw->initvals_band->size - hdr_len);
1749                 if (err)
1750                         goto out;
1751         }
1752 out:
1753
1754         return err;
1755 }
1756
1757 /* Initialize the GPIOs
1758  * http://bcm-specs.sipsolutions.net/GPIO
1759  */
1760 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1761 {
1762         struct ssb_bus *bus = dev->dev->bus;
1763         struct ssb_device *gpiodev, *pcidev = NULL;
1764         u32 mask;
1765         u32 set;
1766
1767         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1768                           b43legacy_read32(dev,
1769                           B43legacy_MMIO_MACCTL)
1770                           & 0xFFFF3FFF);
1771
1772         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1773                           b43legacy_read16(dev,
1774                           B43legacy_MMIO_GPIO_MASK)
1775                           | 0x000F);
1776
1777         mask = 0x0000001F;
1778         set = 0x0000000F;
1779         if (dev->dev->bus->chip_id == 0x4301) {
1780                 mask |= 0x0060;
1781                 set |= 0x0060;
1782         }
1783         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1784                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1785                                   b43legacy_read16(dev,
1786                                   B43legacy_MMIO_GPIO_MASK)
1787                                   | 0x0200);
1788                 mask |= 0x0200;
1789                 set |= 0x0200;
1790         }
1791         if (dev->dev->id.revision >= 2)
1792                 mask  |= 0x0010; /* FIXME: This is redundant. */
1793
1794 #ifdef CONFIG_SSB_DRIVER_PCICORE
1795         pcidev = bus->pcicore.dev;
1796 #endif
1797         gpiodev = bus->chipco.dev ? : pcidev;
1798         if (!gpiodev)
1799                 return 0;
1800         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1801                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1802                      & mask) | set);
1803
1804         return 0;
1805 }
1806
1807 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1808 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1809 {
1810         struct ssb_bus *bus = dev->dev->bus;
1811         struct ssb_device *gpiodev, *pcidev = NULL;
1812
1813 #ifdef CONFIG_SSB_DRIVER_PCICORE
1814         pcidev = bus->pcicore.dev;
1815 #endif
1816         gpiodev = bus->chipco.dev ? : pcidev;
1817         if (!gpiodev)
1818                 return;
1819         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1820 }
1821
1822 /* http://bcm-specs.sipsolutions.net/EnableMac */
1823 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1824 {
1825         dev->mac_suspended--;
1826         B43legacy_WARN_ON(dev->mac_suspended < 0);
1827         B43legacy_WARN_ON(irqs_disabled());
1828         if (dev->mac_suspended == 0) {
1829                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1830                                   b43legacy_read32(dev,
1831                                   B43legacy_MMIO_MACCTL)
1832                                   | B43legacy_MACCTL_ENABLED);
1833                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1834                                   B43legacy_IRQ_MAC_SUSPENDED);
1835                 /* the next two are dummy reads */
1836                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1837                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1838                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1839
1840                 /* Re-enable IRQs. */
1841                 spin_lock_irq(&dev->wl->irq_lock);
1842                 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1843                 spin_unlock_irq(&dev->wl->irq_lock);
1844         }
1845 }
1846
1847 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1848 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1849 {
1850         int i;
1851         u32 tmp;
1852
1853         might_sleep();
1854         B43legacy_WARN_ON(irqs_disabled());
1855         B43legacy_WARN_ON(dev->mac_suspended < 0);
1856
1857         if (dev->mac_suspended == 0) {
1858                 /* Mask IRQs before suspending MAC. Otherwise
1859                  * the MAC stays busy and won't suspend. */
1860                 spin_lock_irq(&dev->wl->irq_lock);
1861                 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1862                 spin_unlock_irq(&dev->wl->irq_lock);
1863                 b43legacy_synchronize_irq(dev);
1864                 dev->irq_savedstate = tmp;
1865
1866                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1867                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1868                                   b43legacy_read32(dev,
1869                                   B43legacy_MMIO_MACCTL)
1870                                   & ~B43legacy_MACCTL_ENABLED);
1871                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1872                 for (i = 40; i; i--) {
1873                         tmp = b43legacy_read32(dev,
1874                                                B43legacy_MMIO_GEN_IRQ_REASON);
1875                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1876                                 goto out;
1877                         msleep(1);
1878                 }
1879                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1880         }
1881 out:
1882         dev->mac_suspended++;
1883 }
1884
1885 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1886 {
1887         struct b43legacy_wl *wl = dev->wl;
1888         u32 ctl;
1889         u16 cfp_pretbtt;
1890
1891         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1892         /* Reset status to STA infrastructure mode. */
1893         ctl &= ~B43legacy_MACCTL_AP;
1894         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1895         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1896         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1897         ctl &= ~B43legacy_MACCTL_PROMISC;
1898         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1899         ctl |= B43legacy_MACCTL_INFRA;
1900
1901         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1902                 ctl |= B43legacy_MACCTL_AP;
1903         else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1904                 ctl &= ~B43legacy_MACCTL_INFRA;
1905
1906         if (wl->filter_flags & FIF_CONTROL)
1907                 ctl |= B43legacy_MACCTL_KEEP_CTL;
1908         if (wl->filter_flags & FIF_FCSFAIL)
1909                 ctl |= B43legacy_MACCTL_KEEP_BAD;
1910         if (wl->filter_flags & FIF_PLCPFAIL)
1911                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1912         if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1913                 ctl |= B43legacy_MACCTL_PROMISC;
1914         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1915                 ctl |= B43legacy_MACCTL_BEACPROMISC;
1916
1917         /* Workaround: On old hardware the HW-MAC-address-filter
1918          * doesn't work properly, so always run promisc in filter
1919          * it in software. */
1920         if (dev->dev->id.revision <= 4)
1921                 ctl |= B43legacy_MACCTL_PROMISC;
1922
1923         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1924
1925         cfp_pretbtt = 2;
1926         if ((ctl & B43legacy_MACCTL_INFRA) &&
1927             !(ctl & B43legacy_MACCTL_AP)) {
1928                 if (dev->dev->bus->chip_id == 0x4306 &&
1929                     dev->dev->bus->chip_rev == 3)
1930                         cfp_pretbtt = 100;
1931                 else
1932                         cfp_pretbtt = 50;
1933         }
1934         b43legacy_write16(dev, 0x612, cfp_pretbtt);
1935 }
1936
1937 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1938                                         u16 rate,
1939                                         int is_ofdm)
1940 {
1941         u16 offset;
1942
1943         if (is_ofdm) {
1944                 offset = 0x480;
1945                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1946         } else {
1947                 offset = 0x4C0;
1948                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1949         }
1950         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1951                               b43legacy_shm_read16(dev,
1952                               B43legacy_SHM_SHARED, offset));
1953 }
1954
1955 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1956 {
1957         switch (dev->phy.type) {
1958         case B43legacy_PHYTYPE_G:
1959                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1960                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1961                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1962                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1963                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1964                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1965                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1966                 /* fallthrough */
1967         case B43legacy_PHYTYPE_B:
1968                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1969                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1970                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1971                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1972                 break;
1973         default:
1974                 B43legacy_BUG_ON(1);
1975         }
1976 }
1977
1978 /* Set the TX-Antenna for management frames sent by firmware. */
1979 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1980                                           int antenna)
1981 {
1982         u16 ant = 0;
1983         u16 tmp;
1984
1985         switch (antenna) {
1986         case B43legacy_ANTENNA0:
1987                 ant |= B43legacy_TX4_PHY_ANT0;
1988                 break;
1989         case B43legacy_ANTENNA1:
1990                 ant |= B43legacy_TX4_PHY_ANT1;
1991                 break;
1992         case B43legacy_ANTENNA_AUTO:
1993                 ant |= B43legacy_TX4_PHY_ANTLAST;
1994                 break;
1995         default:
1996                 B43legacy_BUG_ON(1);
1997         }
1998
1999         /* FIXME We also need to set the other flags of the PHY control
2000          * field somewhere. */
2001
2002         /* For Beacons */
2003         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2004                                    B43legacy_SHM_SH_BEACPHYCTL);
2005         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2006         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2007                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2008         /* For ACK/CTS */
2009         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2010                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2011         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2012         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2013                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2014         /* For Probe Resposes */
2015         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2016                                    B43legacy_SHM_SH_PRPHYCTL);
2017         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2018         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2019                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2020 }
2021
2022 /* This is the opposite of b43legacy_chip_init() */
2023 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2024 {
2025         b43legacy_radio_turn_off(dev, 1);
2026         b43legacy_gpio_cleanup(dev);
2027         /* firmware is released later */
2028 }
2029
2030 /* Initialize the chip
2031  * http://bcm-specs.sipsolutions.net/ChipInit
2032  */
2033 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2034 {
2035         struct b43legacy_phy *phy = &dev->phy;
2036         int err;
2037         int tmp;
2038         u32 value32, macctl;
2039         u16 value16;
2040
2041         /* Initialize the MAC control */
2042         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2043         if (dev->phy.gmode)
2044                 macctl |= B43legacy_MACCTL_GMODE;
2045         macctl |= B43legacy_MACCTL_INFRA;
2046         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2047
2048         err = b43legacy_request_firmware(dev);
2049         if (err)
2050                 goto out;
2051         err = b43legacy_upload_microcode(dev);
2052         if (err)
2053                 goto out; /* firmware is released later */
2054
2055         err = b43legacy_gpio_init(dev);
2056         if (err)
2057                 goto out; /* firmware is released later */
2058
2059         err = b43legacy_upload_initvals(dev);
2060         if (err)
2061                 goto err_gpio_clean;
2062         b43legacy_radio_turn_on(dev);
2063
2064         b43legacy_write16(dev, 0x03E6, 0x0000);
2065         err = b43legacy_phy_init(dev);
2066         if (err)
2067                 goto err_radio_off;
2068
2069         /* Select initial Interference Mitigation. */
2070         tmp = phy->interfmode;
2071         phy->interfmode = B43legacy_INTERFMODE_NONE;
2072         b43legacy_radio_set_interference_mitigation(dev, tmp);
2073
2074         b43legacy_phy_set_antenna_diversity(dev);
2075         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2076
2077         if (phy->type == B43legacy_PHYTYPE_B) {
2078                 value16 = b43legacy_read16(dev, 0x005E);
2079                 value16 |= 0x0004;
2080                 b43legacy_write16(dev, 0x005E, value16);
2081         }
2082         b43legacy_write32(dev, 0x0100, 0x01000000);
2083         if (dev->dev->id.revision < 5)
2084                 b43legacy_write32(dev, 0x010C, 0x01000000);
2085
2086         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2087         value32 &= ~B43legacy_MACCTL_INFRA;
2088         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2089         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2090         value32 |= B43legacy_MACCTL_INFRA;
2091         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2092
2093         if (b43legacy_using_pio(dev)) {
2094                 b43legacy_write32(dev, 0x0210, 0x00000100);
2095                 b43legacy_write32(dev, 0x0230, 0x00000100);
2096                 b43legacy_write32(dev, 0x0250, 0x00000100);
2097                 b43legacy_write32(dev, 0x0270, 0x00000100);
2098                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2099                                       0x0000);
2100         }
2101
2102         /* Probe Response Timeout value */
2103         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2104         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2105
2106         /* Initially set the wireless operation mode. */
2107         b43legacy_adjust_opmode(dev);
2108
2109         if (dev->dev->id.revision < 3) {
2110                 b43legacy_write16(dev, 0x060E, 0x0000);
2111                 b43legacy_write16(dev, 0x0610, 0x8000);
2112                 b43legacy_write16(dev, 0x0604, 0x0000);
2113                 b43legacy_write16(dev, 0x0606, 0x0200);
2114         } else {
2115                 b43legacy_write32(dev, 0x0188, 0x80000000);
2116                 b43legacy_write32(dev, 0x018C, 0x02000000);
2117         }
2118         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2119         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2120         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2121         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2122         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2123         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2124         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2125
2126         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2127         value32 |= 0x00100000;
2128         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2129
2130         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2131                           dev->dev->bus->chipco.fast_pwrup_delay);
2132
2133         /* PHY TX errors counter. */
2134         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2135
2136         B43legacy_WARN_ON(err != 0);
2137         b43legacydbg(dev->wl, "Chip initialized\n");
2138 out:
2139         return err;
2140
2141 err_radio_off:
2142         b43legacy_radio_turn_off(dev, 1);
2143 err_gpio_clean:
2144         b43legacy_gpio_cleanup(dev);
2145         goto out;
2146 }
2147
2148 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2149 {
2150         struct b43legacy_phy *phy = &dev->phy;
2151
2152         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2153                 return;
2154
2155         b43legacy_mac_suspend(dev);
2156         b43legacy_phy_lo_g_measure(dev);
2157         b43legacy_mac_enable(dev);
2158 }
2159
2160 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2161 {
2162         b43legacy_phy_lo_mark_all_unused(dev);
2163         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2164                 b43legacy_mac_suspend(dev);
2165                 b43legacy_calc_nrssi_slope(dev);
2166                 b43legacy_mac_enable(dev);
2167         }
2168 }
2169
2170 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2171 {
2172         /* Update device statistics. */
2173         b43legacy_calculate_link_quality(dev);
2174 }
2175
2176 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2177 {
2178         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2179
2180         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2181         wmb();
2182 }
2183
2184 static void do_periodic_work(struct b43legacy_wldev *dev)
2185 {
2186         unsigned int state;
2187
2188         state = dev->periodic_state;
2189         if (state % 8 == 0)
2190                 b43legacy_periodic_every120sec(dev);
2191         if (state % 4 == 0)
2192                 b43legacy_periodic_every60sec(dev);
2193         if (state % 2 == 0)
2194                 b43legacy_periodic_every30sec(dev);
2195         b43legacy_periodic_every15sec(dev);
2196 }
2197
2198 /* Periodic work locking policy:
2199  *      The whole periodic work handler is protected by
2200  *      wl->mutex. If another lock is needed somewhere in the
2201  *      pwork callchain, it's aquired in-place, where it's needed.
2202  */
2203 static void b43legacy_periodic_work_handler(struct work_struct *work)
2204 {
2205         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2206                                              periodic_work.work);
2207         struct b43legacy_wl *wl = dev->wl;
2208         unsigned long delay;
2209
2210         mutex_lock(&wl->mutex);
2211
2212         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2213                 goto out;
2214         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2215                 goto out_requeue;
2216
2217         do_periodic_work(dev);
2218
2219         dev->periodic_state++;
2220 out_requeue:
2221         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2222                 delay = msecs_to_jiffies(50);
2223         else
2224                 delay = round_jiffies_relative(HZ * 15);
2225         queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2226 out:
2227         mutex_unlock(&wl->mutex);
2228 }
2229
2230 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2231 {
2232         struct delayed_work *work = &dev->periodic_work;
2233
2234         dev->periodic_state = 0;
2235         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2236         queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2237 }
2238
2239 /* Validate access to the chip (SHM) */
2240 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2241 {
2242         u32 value;
2243         u32 shm_backup;
2244
2245         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2246         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2247         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2248                                  0xAA5555AA)
2249                 goto error;
2250         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2251         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2252                                  0x55AAAA55)
2253                 goto error;
2254         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2255
2256         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2257         if ((value | B43legacy_MACCTL_GMODE) !=
2258             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2259                 goto error;
2260
2261         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2262         if (value)
2263                 goto error;
2264
2265         return 0;
2266 error:
2267         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2268         return -ENODEV;
2269 }
2270
2271 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2272 {
2273         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2274         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2275         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2276                                         0x0056);
2277         /* KTP is a word address, but we address SHM bytewise.
2278          * So multiply by two.
2279          */
2280         dev->ktp *= 2;
2281         if (dev->dev->id.revision >= 5)
2282                 /* Number of RCMTA address slots */
2283                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2284                                   dev->max_nr_keys - 8);
2285 }
2286
2287 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2288 {
2289         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2290         unsigned long flags;
2291
2292         /* Don't take wl->mutex here, as it could deadlock with
2293          * hwrng internal locking. It's not needed to take
2294          * wl->mutex here, anyway. */
2295
2296         spin_lock_irqsave(&wl->irq_lock, flags);
2297         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2298         spin_unlock_irqrestore(&wl->irq_lock, flags);
2299
2300         return (sizeof(u16));
2301 }
2302
2303 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2304 {
2305         if (wl->rng_initialized)
2306                 hwrng_unregister(&wl->rng);
2307 }
2308
2309 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2310 {
2311         int err;
2312
2313         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2314                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2315         wl->rng.name = wl->rng_name;
2316         wl->rng.data_read = b43legacy_rng_read;
2317         wl->rng.priv = (unsigned long)wl;
2318         wl->rng_initialized = 1;
2319         err = hwrng_register(&wl->rng);
2320         if (err) {
2321                 wl->rng_initialized = 0;
2322                 b43legacyerr(wl, "Failed to register the random "
2323                        "number generator (%d)\n", err);
2324         }
2325
2326         return err;
2327 }
2328
2329 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2330                            struct sk_buff *skb,
2331                            struct ieee80211_tx_control *ctl)
2332 {
2333         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2334         struct b43legacy_wldev *dev = wl->current_dev;
2335         int err = -ENODEV;
2336         unsigned long flags;
2337
2338         if (unlikely(!dev))
2339                 goto out;
2340         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2341                 goto out;
2342         /* DMA-TX is done without a global lock. */
2343         if (b43legacy_using_pio(dev)) {
2344                 spin_lock_irqsave(&wl->irq_lock, flags);
2345                 err = b43legacy_pio_tx(dev, skb, ctl);
2346                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2347         } else
2348                 err = b43legacy_dma_tx(dev, skb, ctl);
2349 out:
2350         if (unlikely(err))
2351                 return NETDEV_TX_BUSY;
2352         return NETDEV_TX_OK;
2353 }
2354
2355 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2356                                 int queue,
2357                                 const struct ieee80211_tx_queue_params *params)
2358 {
2359         return 0;
2360 }
2361
2362 static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2363                                      struct ieee80211_tx_queue_stats *stats)
2364 {
2365         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2366         struct b43legacy_wldev *dev = wl->current_dev;
2367         unsigned long flags;
2368         int err = -ENODEV;
2369
2370         if (!dev)
2371                 goto out;
2372         spin_lock_irqsave(&wl->irq_lock, flags);
2373         if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2374                 if (b43legacy_using_pio(dev))
2375                         b43legacy_pio_get_tx_stats(dev, stats);
2376                 else
2377                         b43legacy_dma_get_tx_stats(dev, stats);
2378                 err = 0;
2379         }
2380         spin_unlock_irqrestore(&wl->irq_lock, flags);
2381 out:
2382         return err;
2383 }
2384
2385 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2386                                   struct ieee80211_low_level_stats *stats)
2387 {
2388         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2389         unsigned long flags;
2390
2391         spin_lock_irqsave(&wl->irq_lock, flags);
2392         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2393         spin_unlock_irqrestore(&wl->irq_lock, flags);
2394
2395         return 0;
2396 }
2397
2398 static const char *phymode_to_string(unsigned int phymode)
2399 {
2400         switch (phymode) {
2401         case B43legacy_PHYMODE_B:
2402                 return "B";
2403         case B43legacy_PHYMODE_G:
2404                 return "G";
2405         default:
2406                 B43legacy_BUG_ON(1);
2407         }
2408         return "";
2409 }
2410
2411 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2412                                   unsigned int phymode,
2413                                   struct b43legacy_wldev **dev,
2414                                   bool *gmode)
2415 {
2416         struct b43legacy_wldev *d;
2417
2418         list_for_each_entry(d, &wl->devlist, list) {
2419                 if (d->phy.possible_phymodes & phymode) {
2420                         /* Ok, this device supports the PHY-mode.
2421                          * Set the gmode bit. */
2422                         *gmode = 1;
2423                         *dev = d;
2424
2425                         return 0;
2426                 }
2427         }
2428
2429         return -ESRCH;
2430 }
2431
2432 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2433 {
2434         struct ssb_device *sdev = dev->dev;
2435         u32 tmslow;
2436
2437         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2438         tmslow &= ~B43legacy_TMSLOW_GMODE;
2439         tmslow |= B43legacy_TMSLOW_PHYRESET;
2440         tmslow |= SSB_TMSLOW_FGC;
2441         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2442         msleep(1);
2443
2444         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2445         tmslow &= ~SSB_TMSLOW_FGC;
2446         tmslow |= B43legacy_TMSLOW_PHYRESET;
2447         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2448         msleep(1);
2449 }
2450
2451 /* Expects wl->mutex locked */
2452 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2453                                       unsigned int new_mode)
2454 {
2455         struct b43legacy_wldev *up_dev;
2456         struct b43legacy_wldev *down_dev;
2457         int err;
2458         bool gmode = 0;
2459         int prev_status;
2460
2461         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2462         if (err) {
2463                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2464                        phymode_to_string(new_mode));
2465                 return err;
2466         }
2467         if ((up_dev == wl->current_dev) &&
2468             (!!wl->current_dev->phy.gmode == !!gmode))
2469                 /* This device is already running. */
2470                 return 0;
2471         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2472                phymode_to_string(new_mode));
2473         down_dev = wl->current_dev;
2474
2475         prev_status = b43legacy_status(down_dev);
2476         /* Shutdown the currently running core. */
2477         if (prev_status >= B43legacy_STAT_STARTED)
2478                 b43legacy_wireless_core_stop(down_dev);
2479         if (prev_status >= B43legacy_STAT_INITIALIZED)
2480                 b43legacy_wireless_core_exit(down_dev);
2481
2482         if (down_dev != up_dev)
2483                 /* We switch to a different core, so we put PHY into
2484                  * RESET on the old core. */
2485                 b43legacy_put_phy_into_reset(down_dev);
2486
2487         /* Now start the new core. */
2488         up_dev->phy.gmode = gmode;
2489         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2490                 err = b43legacy_wireless_core_init(up_dev);
2491                 if (err) {
2492                         b43legacyerr(wl, "Fatal: Could not initialize device"
2493                                      " for newly selected %s-PHY mode\n",
2494                                      phymode_to_string(new_mode));
2495                         goto init_failure;
2496                 }
2497         }
2498         if (prev_status >= B43legacy_STAT_STARTED) {
2499                 err = b43legacy_wireless_core_start(up_dev);
2500                 if (err) {
2501                         b43legacyerr(wl, "Fatal: Coult not start device for "
2502                                "newly selected %s-PHY mode\n",
2503                                phymode_to_string(new_mode));
2504                         b43legacy_wireless_core_exit(up_dev);
2505                         goto init_failure;
2506                 }
2507         }
2508         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2509
2510         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2511
2512         wl->current_dev = up_dev;
2513
2514         return 0;
2515 init_failure:
2516         /* Whoops, failed to init the new core. No core is operating now. */
2517         wl->current_dev = NULL;
2518         return err;
2519 }
2520
2521 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2522 {
2523         switch (antenna) {
2524         case 0: /* default/diversity */
2525                 return B43legacy_ANTENNA_DEFAULT;
2526         case 1: /* Antenna 0 */
2527                 return B43legacy_ANTENNA0;
2528         case 2: /* Antenna 1 */
2529                 return B43legacy_ANTENNA1;
2530         default:
2531                 return B43legacy_ANTENNA_DEFAULT;
2532         }
2533 }
2534
2535 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2536                                    struct ieee80211_conf *conf)
2537 {
2538         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2539         struct b43legacy_wldev *dev;
2540         struct b43legacy_phy *phy;
2541         unsigned long flags;
2542         unsigned int new_phymode = 0xFFFF;
2543         int antenna_tx;
2544         int antenna_rx;
2545         int err = 0;
2546         u32 savedirqs;
2547
2548         antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2549         antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2550
2551         mutex_lock(&wl->mutex);
2552
2553         /* Switch the PHY mode (if necessary). */
2554         switch (conf->phymode) {
2555         case MODE_IEEE80211B:
2556                 new_phymode = B43legacy_PHYMODE_B;
2557                 break;
2558         case MODE_IEEE80211G:
2559                 new_phymode = B43legacy_PHYMODE_G;
2560                 break;
2561         default:
2562                 B43legacy_WARN_ON(1);
2563         }
2564         err = b43legacy_switch_phymode(wl, new_phymode);
2565         if (err)
2566                 goto out_unlock_mutex;
2567         dev = wl->current_dev;
2568         phy = &dev->phy;
2569
2570         /* Disable IRQs while reconfiguring the device.
2571          * This makes it possible to drop the spinlock throughout
2572          * the reconfiguration process. */
2573         spin_lock_irqsave(&wl->irq_lock, flags);
2574         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2575                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2576                 goto out_unlock_mutex;
2577         }
2578         savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2579         spin_unlock_irqrestore(&wl->irq_lock, flags);
2580         b43legacy_synchronize_irq(dev);
2581
2582         /* Switch to the requested channel.
2583          * The firmware takes care of races with the TX handler. */
2584         if (conf->channel_val != phy->channel)
2585                 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2586
2587         /* Enable/Disable ShortSlot timing. */
2588         if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2589              != dev->short_slot) {
2590                 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2591                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2592                         b43legacy_short_slot_timing_enable(dev);
2593                 else
2594                         b43legacy_short_slot_timing_disable(dev);
2595         }
2596
2597         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2598
2599         /* Adjust the desired TX power level. */
2600         if (conf->power_level != 0) {
2601                 if (conf->power_level != phy->power_level) {
2602                         phy->power_level = conf->power_level;
2603                         b43legacy_phy_xmitpower(dev);
2604                 }
2605         }
2606
2607         /* Antennas for RX and management frame TX. */
2608         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2609
2610         /* Update templates for AP mode. */
2611         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2612                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2613
2614
2615         if (!!conf->radio_enabled != phy->radio_on) {
2616                 if (conf->radio_enabled) {
2617                         b43legacy_radio_turn_on(dev);
2618                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2619                         if (!dev->radio_hw_enable)
2620                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2621                                               " button still turns the radio"
2622                                               " physically off. Press the"
2623                                               " button to turn it on.\n");
2624                 } else {
2625                         b43legacy_radio_turn_off(dev, 0);
2626                         b43legacyinfo(dev->wl, "Radio turned off by"
2627                                       " software\n");
2628                 }
2629         }
2630
2631         spin_lock_irqsave(&wl->irq_lock, flags);
2632         b43legacy_interrupt_enable(dev, savedirqs);
2633         mmiowb();
2634         spin_unlock_irqrestore(&wl->irq_lock, flags);
2635 out_unlock_mutex:
2636         mutex_unlock(&wl->mutex);
2637
2638         return err;
2639 }
2640
2641 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2642                                           unsigned int changed,
2643                                           unsigned int *fflags,
2644                                           int mc_count,
2645                                           struct dev_addr_list *mc_list)
2646 {
2647         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2648         struct b43legacy_wldev *dev = wl->current_dev;
2649         unsigned long flags;
2650
2651         if (!dev) {
2652                 *fflags = 0;
2653                 return;
2654         }
2655
2656         spin_lock_irqsave(&wl->irq_lock, flags);
2657         *fflags &= FIF_PROMISC_IN_BSS |
2658                   FIF_ALLMULTI |
2659                   FIF_FCSFAIL |
2660                   FIF_PLCPFAIL |
2661                   FIF_CONTROL |
2662                   FIF_OTHER_BSS |
2663                   FIF_BCN_PRBRESP_PROMISC;
2664
2665         changed &= FIF_PROMISC_IN_BSS |
2666                    FIF_ALLMULTI |
2667                    FIF_FCSFAIL |
2668                    FIF_PLCPFAIL |
2669                    FIF_CONTROL |
2670                    FIF_OTHER_BSS |
2671                    FIF_BCN_PRBRESP_PROMISC;
2672
2673         wl->filter_flags = *fflags;
2674
2675         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2676                 b43legacy_adjust_opmode(dev);
2677         spin_unlock_irqrestore(&wl->irq_lock, flags);
2678 }
2679
2680 static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2681                                          struct ieee80211_vif *vif,
2682                                          struct ieee80211_if_conf *conf)
2683 {
2684         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2685         struct b43legacy_wldev *dev = wl->current_dev;
2686         unsigned long flags;
2687
2688         if (!dev)
2689                 return -ENODEV;
2690         mutex_lock(&wl->mutex);
2691         spin_lock_irqsave(&wl->irq_lock, flags);
2692         B43legacy_WARN_ON(wl->vif != vif);
2693         if (conf->bssid)
2694                 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2695         else
2696                 memset(wl->bssid, 0, ETH_ALEN);
2697         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2698                 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2699                         B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2700                         b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2701                         if (conf->beacon)
2702                                 b43legacy_refresh_templates(dev, conf->beacon);
2703                 }
2704                 b43legacy_write_mac_bssid_templates(dev);
2705         }
2706         spin_unlock_irqrestore(&wl->irq_lock, flags);
2707         mutex_unlock(&wl->mutex);
2708
2709         return 0;
2710 }
2711
2712 /* Locking: wl->mutex */
2713 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2714 {
2715         struct b43legacy_wl *wl = dev->wl;
2716         unsigned long flags;
2717
2718         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2719                 return;
2720
2721         /* Disable and sync interrupts. We must do this before than
2722          * setting the status to INITIALIZED, as the interrupt handler
2723          * won't care about IRQs then. */
2724         spin_lock_irqsave(&wl->irq_lock, flags);
2725         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2726                                                           B43legacy_IRQ_ALL);
2727         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2728         spin_unlock_irqrestore(&wl->irq_lock, flags);
2729         b43legacy_synchronize_irq(dev);
2730
2731         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2732
2733         mutex_unlock(&wl->mutex);
2734         /* Must unlock as it would otherwise deadlock. No races here.
2735          * Cancel the possibly running self-rearming periodic work. */
2736         cancel_delayed_work_sync(&dev->periodic_work);
2737         mutex_lock(&wl->mutex);
2738
2739         ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2740
2741         b43legacy_mac_suspend(dev);
2742         free_irq(dev->dev->irq, dev);
2743         b43legacydbg(wl, "Wireless interface stopped\n");
2744 }
2745
2746 /* Locking: wl->mutex */
2747 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2748 {
2749         int err;
2750
2751         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2752
2753         drain_txstatus_queue(dev);
2754         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2755                           IRQF_SHARED, KBUILD_MODNAME, dev);
2756         if (err) {
2757                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2758                        dev->dev->irq);
2759                 goto out;
2760         }
2761         /* We are ready to run. */
2762         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2763
2764         /* Start data flow (TX/RX) */
2765         b43legacy_mac_enable(dev);
2766         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2767         ieee80211_start_queues(dev->wl->hw);
2768
2769         /* Start maintenance work */
2770         b43legacy_periodic_tasks_setup(dev);
2771
2772         b43legacydbg(dev->wl, "Wireless interface started\n");
2773 out:
2774         return err;
2775 }
2776
2777 /* Get PHY and RADIO versioning numbers */
2778 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2779 {
2780         struct b43legacy_phy *phy = &dev->phy;
2781         u32 tmp;
2782         u8 analog_type;
2783         u8 phy_type;
2784         u8 phy_rev;
2785         u16 radio_manuf;
2786         u16 radio_ver;
2787         u16 radio_rev;
2788         int unsupported = 0;
2789
2790         /* Get PHY versioning */
2791         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2792         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2793                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2794         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2795         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2796         switch (phy_type) {
2797         case B43legacy_PHYTYPE_B:
2798                 if (phy_rev != 2 && phy_rev != 4
2799                     && phy_rev != 6 && phy_rev != 7)
2800                         unsupported = 1;
2801                 break;
2802         case B43legacy_PHYTYPE_G:
2803                 if (phy_rev > 8)
2804                         unsupported = 1;
2805                 break;
2806         default:
2807                 unsupported = 1;
2808         };
2809         if (unsupported) {
2810                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2811                        "(Analog %u, Type %u, Revision %u)\n",
2812                        analog_type, phy_type, phy_rev);
2813                 return -EOPNOTSUPP;
2814         }
2815         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2816                analog_type, phy_type, phy_rev);
2817
2818
2819         /* Get RADIO versioning */
2820         if (dev->dev->bus->chip_id == 0x4317) {
2821                 if (dev->dev->bus->chip_rev == 0)
2822                         tmp = 0x3205017F;
2823                 else if (dev->dev->bus->chip_rev == 1)
2824                         tmp = 0x4205017F;
2825                 else
2826                         tmp = 0x5205017F;
2827         } else {
2828                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2829                                   B43legacy_RADIOCTL_ID);
2830                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2831                 tmp <<= 16;
2832                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2833                                   B43legacy_RADIOCTL_ID);
2834                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2835         }
2836         radio_manuf = (tmp & 0x00000FFF);
2837         radio_ver = (tmp & 0x0FFFF000) >> 12;
2838         radio_rev = (tmp & 0xF0000000) >> 28;
2839         switch (phy_type) {
2840         case B43legacy_PHYTYPE_B:
2841                 if ((radio_ver & 0xFFF0) != 0x2050)
2842                         unsupported = 1;
2843                 break;
2844         case B43legacy_PHYTYPE_G:
2845                 if (radio_ver != 0x2050)
2846                         unsupported = 1;
2847                 break;
2848         default:
2849                 B43legacy_BUG_ON(1);
2850         }
2851         if (unsupported) {
2852                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2853                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2854                        radio_manuf, radio_ver, radio_rev);
2855                 return -EOPNOTSUPP;
2856         }
2857         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2858                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2859
2860
2861         phy->radio_manuf = radio_manuf;
2862         phy->radio_ver = radio_ver;
2863         phy->radio_rev = radio_rev;
2864
2865         phy->analog = analog_type;
2866         phy->type = phy_type;
2867         phy->rev = phy_rev;
2868
2869         return 0;
2870 }
2871
2872 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2873                                       struct b43legacy_phy *phy)
2874 {
2875         struct b43legacy_lopair *lo;
2876         int i;
2877
2878         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2879         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2880
2881         /* Assume the radio is enabled. If it's not enabled, the state will
2882          * immediately get fixed on the first periodic work run. */
2883         dev->radio_hw_enable = 1;
2884
2885         phy->savedpctlreg = 0xFFFF;
2886         phy->aci_enable = 0;
2887         phy->aci_wlan_automatic = 0;
2888         phy->aci_hw_rssi = 0;
2889
2890         lo = phy->_lo_pairs;
2891         if (lo)
2892                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2893                                      B43legacy_LO_COUNT);
2894         phy->max_lb_gain = 0;
2895         phy->trsw_rx_gain = 0;
2896
2897         /* Set default attenuation values. */
2898         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2899         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2900         phy->txctl1 = b43legacy_default_txctl1(dev);
2901         phy->txpwr_offset = 0;
2902
2903         /* NRSSI */
2904         phy->nrssislope = 0;
2905         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2906                 phy->nrssi[i] = -1000;
2907         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2908                 phy->nrssi_lt[i] = i;
2909
2910         phy->lofcal = 0xFFFF;
2911         phy->initval = 0xFFFF;
2912
2913         phy->interfmode = B43legacy_INTERFMODE_NONE;
2914         phy->channel = 0xFF;
2915 }
2916
2917 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2918 {
2919         /* Flags */
2920         dev->reg124_set_0x4 = 0;
2921
2922         /* Stats */
2923         memset(&dev->stats, 0, sizeof(dev->stats));
2924
2925         setup_struct_phy_for_init(dev, &dev->phy);
2926
2927         /* IRQ related flags */
2928         dev->irq_reason = 0;
2929         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2930         dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2931
2932         dev->mac_suspended = 1;
2933
2934         /* Noise calculation context */
2935         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2936 }
2937
2938 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2939 {
2940 #ifdef CONFIG_SSB_DRIVER_PCICORE
2941         struct ssb_bus *bus = dev->dev->bus;
2942         u32 tmp;
2943
2944         if (bus->pcicore.dev &&
2945             bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2946             bus->pcicore.dev->id.revision <= 5) {
2947                 /* IMCFGLO timeouts workaround. */
2948                 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2949                 tmp &= ~SSB_IMCFGLO_REQTO;
2950                 tmp &= ~SSB_IMCFGLO_SERTO;
2951                 switch (bus->bustype) {
2952                 case SSB_BUSTYPE_PCI:
2953                 case SSB_BUSTYPE_PCMCIA:
2954                         tmp |= 0x32;
2955                         break;
2956                 case SSB_BUSTYPE_SSB:
2957                         tmp |= 0x53;
2958                         break;
2959                 }
2960                 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2961         }
2962 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2963 }
2964
2965 /* Write the short and long frame retry limit values. */
2966 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2967                                        unsigned int short_retry,
2968                                        unsigned int long_retry)
2969 {
2970         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2971          * the chip-internal counter. */
2972         short_retry = min(short_retry, (unsigned int)0xF);
2973         long_retry = min(long_retry, (unsigned int)0xF);
2974
2975         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2976         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2977 }
2978
2979 /* Shutdown a wireless core */
2980 /* Locking: wl->mutex */
2981 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
2982 {
2983         struct b43legacy_wl *wl = dev->wl;
2984         struct b43legacy_phy *phy = &dev->phy;
2985         u32 macctl;
2986
2987         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
2988         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
2989                 return;
2990         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
2991
2992         /* Stop the microcode PSM. */
2993         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2994         macctl &= ~B43legacy_MACCTL_PSM_RUN;
2995         macctl |= B43legacy_MACCTL_PSM_JMP0;
2996         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2997
2998         mutex_unlock(&wl->mutex);
2999         /* Must unlock as it would otherwise deadlock. No races here.
3000          * Cancel possibly pending workqueues. */
3001         cancel_work_sync(&dev->restart_work);
3002         mutex_lock(&wl->mutex);
3003
3004         b43legacy_leds_exit(dev);
3005         b43legacy_rng_exit(dev->wl);
3006         b43legacy_pio_free(dev);
3007         b43legacy_dma_free(dev);
3008         b43legacy_chip_exit(dev);
3009         b43legacy_radio_turn_off(dev, 1);
3010         b43legacy_switch_analog(dev, 0);
3011         if (phy->dyn_tssi_tbl)
3012                 kfree(phy->tssi2dbm);
3013         kfree(phy->lo_control);
3014         phy->lo_control = NULL;
3015         ssb_device_disable(dev->dev, 0);
3016         ssb_bus_may_powerdown(dev->dev->bus);
3017 }
3018
3019 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3020 {
3021         struct b43legacy_phy *phy = &dev->phy;
3022         int i;
3023
3024         /* Set default attenuation values. */
3025         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3026         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3027         phy->txctl1 = b43legacy_default_txctl1(dev);
3028         phy->txctl2 = 0xFFFF;
3029         phy->txpwr_offset = 0;
3030
3031         /* NRSSI */
3032         phy->nrssislope = 0;
3033         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3034                 phy->nrssi[i] = -1000;
3035         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3036                 phy->nrssi_lt[i] = i;
3037
3038         phy->lofcal = 0xFFFF;
3039         phy->initval = 0xFFFF;
3040
3041         phy->aci_enable = 0;
3042         phy->aci_wlan_automatic = 0;
3043         phy->aci_hw_rssi = 0;
3044
3045         phy->antenna_diversity = 0xFFFF;
3046         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3047         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3048
3049         /* Flags */
3050         phy->calibrated = 0;
3051
3052         if (phy->_lo_pairs)
3053                 memset(phy->_lo_pairs, 0,
3054                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3055         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3056 }
3057
3058 /* Initialize a wireless core */
3059 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3060 {
3061         struct b43legacy_wl *wl = dev->wl;
3062         struct ssb_bus *bus = dev->dev->bus;
3063         struct b43legacy_phy *phy = &dev->phy;
3064         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3065         int err;
3066         u32 hf;
3067         u32 tmp;
3068
3069         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3070
3071         err = ssb_bus_powerup(bus, 0);
3072         if (err)
3073                 goto out;
3074         if (!ssb_device_is_enabled(dev->dev)) {
3075                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3076                 b43legacy_wireless_core_reset(dev, tmp);
3077         }
3078
3079         if ((phy->type == B43legacy_PHYTYPE_B) ||
3080             (phy->type == B43legacy_PHYTYPE_G)) {
3081                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3082                                          * B43legacy_LO_COUNT,
3083                                          GFP_KERNEL);
3084                 if (!phy->_lo_pairs)
3085                         return -ENOMEM;
3086         }
3087         setup_struct_wldev_for_init(dev);
3088
3089         err = b43legacy_phy_init_tssi2dbm_table(dev);
3090         if (err)
3091                 goto err_kfree_lo_control;
3092
3093         /* Enable IRQ routing to this device. */
3094         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3095
3096         b43legacy_imcfglo_timeouts_workaround(dev);
3097         prepare_phy_data_for_init(dev);
3098         b43legacy_phy_calibrate(dev);
3099         err = b43legacy_chip_init(dev);
3100         if (err)
3101                 goto err_kfree_tssitbl;
3102         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3103                               B43legacy_SHM_SH_WLCOREREV,
3104                               dev->dev->id.revision);
3105         hf = b43legacy_hf_read(dev);
3106         if (phy->type == B43legacy_PHYTYPE_G) {
3107                 hf |= B43legacy_HF_SYMW;
3108                 if (phy->rev == 1)
3109                         hf |= B43legacy_HF_GDCW;
3110                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3111                         hf |= B43legacy_HF_OFDMPABOOST;
3112         } else if (phy->type == B43legacy_PHYTYPE_B) {
3113                 hf |= B43legacy_HF_SYMW;
3114                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3115                         hf &= ~B43legacy_HF_GDCW;
3116         }
3117         b43legacy_hf_write(dev, hf);
3118
3119         b43legacy_set_retry_limits(dev,
3120                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3121                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3122
3123         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3124                               0x0044, 3);
3125         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3126                               0x0046, 2);
3127
3128         /* Disable sending probe responses from firmware.
3129          * Setting the MaxTime to one usec will always trigger
3130          * a timeout, so we never send any probe resp.
3131          * A timeout of zero is infinite. */
3132         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3133                               B43legacy_SHM_SH_PRMAXTIME, 1);
3134
3135         b43legacy_rate_memory_init(dev);
3136
3137         /* Minimum Contention Window */
3138         if (phy->type == B43legacy_PHYTYPE_B)
3139                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3140                                       0x0003, 31);
3141         else
3142                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3143                                       0x0003, 15);
3144         /* Maximum Contention Window */
3145         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3146                               0x0004, 1023);
3147
3148         do {
3149                 if (b43legacy_using_pio(dev))
3150                         err = b43legacy_pio_init(dev);
3151                 else {
3152                         err = b43legacy_dma_init(dev);
3153                         if (!err)
3154                                 b43legacy_qos_init(dev);
3155                 }
3156         } while (err == -EAGAIN);
3157         if (err)
3158                 goto err_chip_exit;
3159
3160         b43legacy_write16(dev, 0x0612, 0x0050);
3161         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3162         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3163
3164         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3165         b43legacy_upload_card_macaddress(dev);
3166         b43legacy_security_init(dev);
3167         b43legacy_rng_init(wl);
3168
3169         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3170
3171         b43legacy_leds_init(dev);
3172 out:
3173         return err;
3174
3175 err_chip_exit:
3176         b43legacy_chip_exit(dev);
3177 err_kfree_tssitbl:
3178         if (phy->dyn_tssi_tbl)
3179                 kfree(phy->tssi2dbm);
3180 err_kfree_lo_control:
3181         kfree(phy->lo_control);
3182         phy->lo_control = NULL;
3183         ssb_bus_may_powerdown(bus);
3184         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3185         return err;
3186 }
3187
3188 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3189                                       struct ieee80211_if_init_conf *conf)
3190 {
3191         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3192         struct b43legacy_wldev *dev;
3193         unsigned long flags;
3194         int err = -EOPNOTSUPP;
3195
3196         /* TODO: allow WDS/AP devices to coexist */
3197
3198         if (conf->type != IEEE80211_IF_TYPE_AP &&
3199             conf->type != IEEE80211_IF_TYPE_STA &&
3200             conf->type != IEEE80211_IF_TYPE_WDS &&
3201             conf->type != IEEE80211_IF_TYPE_IBSS)
3202                 return -EOPNOTSUPP;
3203
3204         mutex_lock(&wl->mutex);
3205         if (wl->operating)
3206                 goto out_mutex_unlock;
3207
3208         b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3209
3210         dev = wl->current_dev;
3211         wl->operating = 1;
3212         wl->vif = conf->vif;
3213         wl->if_type = conf->type;
3214         memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3215
3216         spin_lock_irqsave(&wl->irq_lock, flags);
3217         b43legacy_adjust_opmode(dev);
3218         b43legacy_upload_card_macaddress(dev);
3219         spin_unlock_irqrestore(&wl->irq_lock, flags);
3220
3221         err = 0;
3222  out_mutex_unlock:
3223         mutex_unlock(&wl->mutex);
3224
3225         return err;
3226 }
3227
3228 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3229                                           struct ieee80211_if_init_conf *conf)
3230 {
3231         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3232         struct b43legacy_wldev *dev = wl->current_dev;
3233         unsigned long flags;
3234
3235         b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3236
3237         mutex_lock(&wl->mutex);
3238
3239         B43legacy_WARN_ON(!wl->operating);
3240         B43legacy_WARN_ON(wl->vif != conf->vif);
3241         wl->vif = NULL;
3242
3243         wl->operating = 0;
3244
3245         spin_lock_irqsave(&wl->irq_lock, flags);
3246         b43legacy_adjust_opmode(dev);
3247         memset(wl->mac_addr, 0, ETH_ALEN);
3248         b43legacy_upload_card_macaddress(dev);
3249         spin_unlock_irqrestore(&wl->irq_lock, flags);
3250
3251         mutex_unlock(&wl->mutex);
3252 }
3253
3254 static int b43legacy_op_start(struct ieee80211_hw *hw)
3255 {
3256         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3257         struct b43legacy_wldev *dev = wl->current_dev;
3258         int did_init = 0;
3259         int err = 0;
3260         bool do_rfkill_exit = 0;
3261
3262         /* First register RFkill.
3263          * LEDs that are registered later depend on it. */
3264         b43legacy_rfkill_init(dev);
3265
3266         /* Kill all old instance specific information to make sure
3267          * the card won't use it in the short timeframe between start
3268          * and mac80211 reconfiguring it. */
3269         memset(wl->bssid, 0, ETH_ALEN);
3270         memset(wl->mac_addr, 0, ETH_ALEN);
3271         wl->filter_flags = 0;
3272
3273         mutex_lock(&wl->mutex);
3274
3275         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3276                 err = b43legacy_wireless_core_init(dev);
3277                 if (err) {
3278                         do_rfkill_exit = 1;
3279                         goto out_mutex_unlock;
3280                 }
3281                 did_init = 1;
3282         }
3283
3284         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3285                 err = b43legacy_wireless_core_start(dev);
3286                 if (err) {
3287                         if (did_init)
3288                                 b43legacy_wireless_core_exit(dev);
3289                         do_rfkill_exit = 1;
3290                         goto out_mutex_unlock;
3291                 }
3292         }
3293
3294 out_mutex_unlock:
3295         mutex_unlock(&wl->mutex);
3296
3297         if (do_rfkill_exit)
3298                 b43legacy_rfkill_exit(dev);
3299
3300         return err;
3301 }
3302
3303 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3304 {
3305         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3306         struct b43legacy_wldev *dev = wl->current_dev;
3307
3308         b43legacy_rfkill_exit(dev);
3309
3310         mutex_lock(&wl->mutex);
3311         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3312                 b43legacy_wireless_core_stop(dev);
3313         b43legacy_wireless_core_exit(dev);
3314         mutex_unlock(&wl->mutex);
3315 }
3316
3317 static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
3318                                         u32 short_retry_limit,
3319                                         u32 long_retry_limit)
3320 {
3321         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3322         struct b43legacy_wldev *dev;
3323         int err = 0;
3324
3325         mutex_lock(&wl->mutex);
3326         dev = wl->current_dev;
3327         if (unlikely(!dev ||
3328                      (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
3329                 err = -ENODEV;
3330                 goto out_unlock;
3331         }
3332         b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
3333 out_unlock:
3334         mutex_unlock(&wl->mutex);
3335
3336         return err;
3337 }
3338
3339 static const struct ieee80211_ops b43legacy_hw_ops = {
3340         .tx                     = b43legacy_op_tx,
3341         .conf_tx                = b43legacy_op_conf_tx,
3342         .add_interface          = b43legacy_op_add_interface,
3343         .remove_interface       = b43legacy_op_remove_interface,
3344         .config                 = b43legacy_op_dev_config,
3345         .config_interface       = b43legacy_op_config_interface,
3346         .configure_filter       = b43legacy_op_configure_filter,
3347         .get_stats              = b43legacy_op_get_stats,
3348         .get_tx_stats           = b43legacy_op_get_tx_stats,
3349         .start                  = b43legacy_op_start,
3350         .stop                   = b43legacy_op_stop,
3351         .set_retry_limit        = b43legacy_op_set_retry_limit,
3352 };
3353
3354 /* Hard-reset the chip. Do not call this directly.
3355  * Use b43legacy_controller_restart()
3356  */
3357 static void b43legacy_chip_reset(struct work_struct *work)
3358 {
3359         struct b43legacy_wldev *dev =
3360                 container_of(work, struct b43legacy_wldev, restart_work);
3361         struct b43legacy_wl *wl = dev->wl;
3362         int err = 0;
3363         int prev_status;
3364
3365         mutex_lock(&wl->mutex);
3366
3367         prev_status = b43legacy_status(dev);
3368         /* Bring the device down... */
3369         if (prev_status >= B43legacy_STAT_STARTED)
3370                 b43legacy_wireless_core_stop(dev);
3371         if (prev_status >= B43legacy_STAT_INITIALIZED)
3372                 b43legacy_wireless_core_exit(dev);
3373
3374         /* ...and up again. */
3375         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3376                 err = b43legacy_wireless_core_init(dev);
3377                 if (err)
3378                         goto out;
3379         }
3380         if (prev_status >= B43legacy_STAT_STARTED) {
3381                 err = b43legacy_wireless_core_start(dev);
3382                 if (err) {
3383                         b43legacy_wireless_core_exit(dev);
3384                         goto out;
3385                 }
3386         }
3387 out:
3388         mutex_unlock(&wl->mutex);
3389         if (err)
3390                 b43legacyerr(wl, "Controller restart FAILED\n");
3391         else
3392                 b43legacyinfo(wl, "Controller restarted\n");
3393 }
3394
3395 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3396                                  int have_bphy,
3397                                  int have_gphy)
3398 {
3399         struct ieee80211_hw *hw = dev->wl->hw;
3400         struct ieee80211_hw_mode *mode;
3401         struct b43legacy_phy *phy = &dev->phy;
3402         int cnt = 0;
3403         int err;
3404
3405         phy->possible_phymodes = 0;
3406         for (; 1; cnt++) {
3407                 if (have_bphy) {
3408                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3409                         mode = &phy->hwmodes[cnt];
3410
3411                         mode->mode = MODE_IEEE80211B;
3412                         mode->num_channels = b43legacy_bg_chantable_size;
3413                         mode->channels = b43legacy_bg_chantable;
3414                         mode->num_rates = b43legacy_b_ratetable_size;
3415                         mode->rates = b43legacy_b_ratetable;
3416                         err = ieee80211_register_hwmode(hw, mode);
3417                         if (err)
3418                                 return err;
3419
3420                         phy->possible_phymodes |= B43legacy_PHYMODE_B;
3421                         have_bphy = 0;
3422                         continue;
3423                 }
3424                 if (have_gphy) {
3425                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3426                         mode = &phy->hwmodes[cnt];
3427
3428                         mode->mode = MODE_IEEE80211G;
3429                         mode->num_channels = b43legacy_bg_chantable_size;
3430                         mode->channels = b43legacy_bg_chantable;
3431                         mode->num_rates = b43legacy_g_ratetable_size;
3432                         mode->rates = b43legacy_g_ratetable;
3433                         err = ieee80211_register_hwmode(hw, mode);
3434                         if (err)
3435                                 return err;
3436
3437                         phy->possible_phymodes |= B43legacy_PHYMODE_G;
3438                         have_gphy = 0;
3439                         continue;
3440                 }
3441                 break;
3442         }
3443
3444         return 0;
3445 }
3446
3447 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3448 {
3449         /* We release firmware that late to not be required to re-request
3450          * is all the time when we reinit the core. */
3451         b43legacy_release_firmware(dev);
3452 }
3453
3454 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3455 {
3456         struct b43legacy_wl *wl = dev->wl;
3457         struct ssb_bus *bus = dev->dev->bus;
3458         struct pci_dev *pdev = bus->host_pci;
3459         int err;
3460         int have_bphy = 0;
3461         int have_gphy = 0;
3462         u32 tmp;
3463
3464         /* Do NOT do any device initialization here.
3465          * Do it in wireless_core_init() instead.
3466          * This function is for gathering basic information about the HW, only.
3467          * Also some structs may be set up here. But most likely you want to
3468          * have that in core_init(), too.
3469          */
3470
3471         err = ssb_bus_powerup(bus, 0);
3472         if (err) {
3473                 b43legacyerr(wl, "Bus powerup failed\n");
3474                 goto out;
3475         }
3476         /* Get the PHY type. */
3477         if (dev->dev->id.revision >= 5) {
3478                 u32 tmshigh;
3479
3480                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3481                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3482                 if (!have_gphy)
3483                         have_bphy = 1;
3484         } else if (dev->dev->id.revision == 4)
3485                 have_gphy = 1;
3486         else
3487                 have_bphy = 1;
3488
3489         dev->phy.gmode = (have_gphy || have_bphy);
3490         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3491         b43legacy_wireless_core_reset(dev, tmp);
3492
3493         err = b43legacy_phy_versioning(dev);
3494         if (err)
3495                 goto err_powerdown;
3496         /* Check if this device supports multiband. */
3497         if (!pdev ||
3498             (pdev->device != 0x4312 &&
3499              pdev->device != 0x4319 &&
3500              pdev->device != 0x4324)) {
3501                 /* No multiband support. */
3502                 have_bphy = 0;
3503                 have_gphy = 0;
3504                 switch (dev->phy.type) {
3505                 case B43legacy_PHYTYPE_B:
3506                         have_bphy = 1;
3507                         break;
3508                 case B43legacy_PHYTYPE_G:
3509                         have_gphy = 1;
3510                         break;
3511                 default:
3512                         B43legacy_BUG_ON(1);
3513                 }
3514         }
3515         dev->phy.gmode = (have_gphy || have_bphy);
3516         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3517         b43legacy_wireless_core_reset(dev, tmp);
3518
3519         err = b43legacy_validate_chipaccess(dev);
3520         if (err)
3521                 goto err_powerdown;
3522         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3523         if (err)
3524                 goto err_powerdown;
3525
3526         /* Now set some default "current_dev" */
3527         if (!wl->current_dev)
3528                 wl->current_dev = dev;
3529         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3530
3531         b43legacy_radio_turn_off(dev, 1);
3532         b43legacy_switch_analog(dev, 0);
3533         ssb_device_disable(dev->dev, 0);
3534         ssb_bus_may_powerdown(bus);
3535
3536 out:
3537         return err;
3538
3539 err_powerdown:
3540         ssb_bus_may_powerdown(bus);
3541         return err;
3542 }
3543
3544 static void b43legacy_one_core_detach(struct ssb_device *dev)
3545 {
3546         struct b43legacy_wldev *wldev;
3547         struct b43legacy_wl *wl;
3548
3549         wldev = ssb_get_drvdata(dev);
3550         wl = wldev->wl;
3551         cancel_work_sync(&wldev->restart_work);
3552         b43legacy_debugfs_remove_device(wldev);
3553         b43legacy_wireless_core_detach(wldev);
3554         list_del(&wldev->list);
3555         wl->nr_devs--;
3556         ssb_set_drvdata(dev, NULL);
3557         kfree(wldev);
3558 }
3559
3560 static int b43legacy_one_core_attach(struct ssb_device *dev,
3561                                      struct b43legacy_wl *wl)
3562 {
3563         struct b43legacy_wldev *wldev;
3564         struct pci_dev *pdev;
3565         int err = -ENOMEM;
3566
3567         if (!list_empty(&wl->devlist)) {
3568                 /* We are not the first core on this chip. */
3569                 pdev = dev->bus->host_pci;
3570                 /* Only special chips support more than one wireless
3571                  * core, although some of the other chips have more than
3572                  * one wireless core as well. Check for this and
3573                  * bail out early.
3574                  */
3575                 if (!pdev ||
3576                     ((pdev->device != 0x4321) &&
3577                      (pdev->device != 0x4313) &&
3578                      (pdev->device != 0x431A))) {
3579                         b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3580                         return -ENODEV;
3581                 }
3582         }
3583
3584         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3585         if (!wldev)
3586                 goto out;
3587
3588         wldev->dev = dev;
3589         wldev->wl = wl;
3590         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3591         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3592         tasklet_init(&wldev->isr_tasklet,
3593                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3594                      (unsigned long)wldev);
3595         if (modparam_pio)
3596                 wldev->__using_pio = 1;
3597         INIT_LIST_HEAD(&wldev->list);
3598
3599         err = b43legacy_wireless_core_attach(wldev);
3600         if (err)
3601                 goto err_kfree_wldev;
3602
3603         list_add(&wldev->list, &wl->devlist);
3604         wl->nr_devs++;
3605         ssb_set_drvdata(dev, wldev);
3606         b43legacy_debugfs_add_device(wldev);
3607 out:
3608         return err;
3609
3610 err_kfree_wldev:
3611         kfree(wldev);
3612         return err;
3613 }
3614
3615 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3616 {
3617         /* boardflags workarounds */
3618         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3619             bus->boardinfo.type == 0x4E &&
3620             bus->boardinfo.rev > 0x40)
3621                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3622 }
3623
3624 static void b43legacy_wireless_exit(struct ssb_device *dev,
3625                                   struct b43legacy_wl *wl)
3626 {
3627         struct ieee80211_hw *hw = wl->hw;
3628
3629         ssb_set_devtypedata(dev, NULL);
3630         ieee80211_free_hw(hw);
3631 }
3632
3633 static int b43legacy_wireless_init(struct ssb_device *dev)
3634 {
3635         struct ssb_sprom *sprom = &dev->bus->sprom;
3636         struct ieee80211_hw *hw;
3637         struct b43legacy_wl *wl;
3638         int err = -ENOMEM;
3639
3640         b43legacy_sprom_fixup(dev->bus);
3641
3642         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3643         if (!hw) {
3644                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3645                 goto out;
3646         }
3647
3648         /* fill hw info */
3649         hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3650                     IEEE80211_HW_RX_INCLUDES_FCS;
3651         hw->max_signal = 100;
3652         hw->max_rssi = -110;
3653         hw->max_noise = -110;
3654         hw->queues = 1; /* FIXME: hardware has more queues */
3655         SET_IEEE80211_DEV(hw, dev->dev);
3656         if (is_valid_ether_addr(sprom->et1mac))
3657                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3658         else
3659                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3660
3661         /* Get and initialize struct b43legacy_wl */
3662         wl = hw_to_b43legacy_wl(hw);
3663         memset(wl, 0, sizeof(*wl));
3664         wl->hw = hw;
3665         spin_lock_init(&wl->irq_lock);
3666         spin_lock_init(&wl->leds_lock);
3667         mutex_init(&wl->mutex);
3668         INIT_LIST_HEAD(&wl->devlist);
3669
3670         ssb_set_devtypedata(dev, wl);
3671         b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3672         err = 0;
3673 out:
3674         return err;
3675 }
3676
3677 static int b43legacy_probe(struct ssb_device *dev,
3678                          const struct ssb_device_id *id)
3679 {
3680         struct b43legacy_wl *wl;
3681         int err;
3682         int first = 0;
3683
3684         wl = ssb_get_devtypedata(dev);
3685         if (!wl) {
3686                 /* Probing the first core - setup common struct b43legacy_wl */
3687                 first = 1;
3688                 err = b43legacy_wireless_init(dev);
3689                 if (err)
3690                         goto out;
3691                 wl = ssb_get_devtypedata(dev);
3692                 B43legacy_WARN_ON(!wl);
3693         }
3694         err = b43legacy_one_core_attach(dev, wl);
3695         if (err)
3696                 goto err_wireless_exit;
3697
3698         if (first) {
3699                 err = ieee80211_register_hw(wl->hw);
3700                 if (err)
3701                         goto err_one_core_detach;
3702         }
3703
3704 out:
3705         return err;
3706
3707 err_one_core_detach:
3708         b43legacy_one_core_detach(dev);
3709 err_wireless_exit:
3710         if (first)
3711                 b43legacy_wireless_exit(dev, wl);
3712         return err;
3713 }
3714
3715 static void b43legacy_remove(struct ssb_device *dev)
3716 {
3717         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3718         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3719
3720         B43legacy_WARN_ON(!wl);
3721         if (wl->current_dev == wldev)
3722                 ieee80211_unregister_hw(wl->hw);
3723
3724         b43legacy_one_core_detach(dev);
3725
3726         if (list_empty(&wl->devlist))
3727                 /* Last core on the chip unregistered.
3728                  * We can destroy common struct b43legacy_wl.
3729                  */
3730                 b43legacy_wireless_exit(dev, wl);
3731 }
3732
3733 /* Perform a hardware reset. This can be called from any context. */
3734 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3735                                   const char *reason)
3736 {
3737         /* Must avoid requeueing, if we are in shutdown. */
3738         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3739                 return;
3740         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3741         queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3742 }
3743
3744 #ifdef CONFIG_PM
3745
3746 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3747 {
3748         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3749         struct b43legacy_wl *wl = wldev->wl;
3750
3751         b43legacydbg(wl, "Suspending...\n");
3752
3753         mutex_lock(&wl->mutex);
3754         wldev->suspend_init_status = b43legacy_status(wldev);
3755         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3756                 b43legacy_wireless_core_stop(wldev);
3757         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3758                 b43legacy_wireless_core_exit(wldev);
3759         mutex_unlock(&wl->mutex);
3760
3761         b43legacydbg(wl, "Device suspended.\n");
3762
3763         return 0;
3764 }
3765
3766 static int b43legacy_resume(struct ssb_device *dev)
3767 {
3768         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3769         struct b43legacy_wl *wl = wldev->wl;
3770         int err = 0;
3771
3772         b43legacydbg(wl, "Resuming...\n");
3773
3774         mutex_lock(&wl->mutex);
3775         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3776                 err = b43legacy_wireless_core_init(wldev);
3777                 if (err) {
3778                         b43legacyerr(wl, "Resume failed at core init\n");
3779                         goto out;
3780                 }
3781         }
3782         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3783                 err = b43legacy_wireless_core_start(wldev);
3784                 if (err) {
3785                         b43legacy_wireless_core_exit(wldev);
3786                         b43legacyerr(wl, "Resume failed at core start\n");
3787                         goto out;
3788                 }
3789         }
3790         mutex_unlock(&wl->mutex);
3791
3792         b43legacydbg(wl, "Device resumed.\n");
3793 out:
3794         return err;
3795 }
3796
3797 #else   /* CONFIG_PM */
3798 # define b43legacy_suspend      NULL
3799 # define b43legacy_resume               NULL
3800 #endif  /* CONFIG_PM */
3801
3802 static struct ssb_driver b43legacy_ssb_driver = {
3803         .name           = KBUILD_MODNAME,
3804         .id_table       = b43legacy_ssb_tbl,
3805         .probe          = b43legacy_probe,
3806         .remove         = b43legacy_remove,
3807         .suspend        = b43legacy_suspend,
3808         .resume         = b43legacy_resume,
3809 };
3810
3811 static int __init b43legacy_init(void)
3812 {
3813         int err;
3814
3815         b43legacy_debugfs_init();
3816
3817         err = ssb_driver_register(&b43legacy_ssb_driver);
3818         if (err)
3819                 goto err_dfs_exit;
3820
3821         return err;
3822
3823 err_dfs_exit:
3824         b43legacy_debugfs_exit();
3825         return err;
3826 }
3827
3828 static void __exit b43legacy_exit(void)
3829 {
3830         ssb_driver_unregister(&b43legacy_ssb_driver);
3831         b43legacy_debugfs_exit();
3832 }
3833
3834 module_init(b43legacy_init)
3835 module_exit(b43legacy_exit)