2 * Copyright (c) 2012 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 * TX polling - checks if the TX engine is stuck somewhere
21 * and issues a chip reset if so.
23 void ath_tx_complete_poll_work(struct work_struct *work)
25 struct ath_softc *sc = container_of(work, struct ath_softc,
26 tx_complete_work.work);
29 bool needreset = false;
31 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
32 if (ATH_TXQ_SETUP(sc, i)) {
34 ath_txq_lock(sc, txq);
36 if (txq->axq_tx_inprogress) {
38 ath_txq_unlock(sc, txq);
41 txq->axq_tx_inprogress = true;
44 ath_txq_unlock_complete(sc, txq);
48 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
49 "tx hung, resetting the chip\n");
50 ath9k_queue_reset(sc, RESET_TYPE_TX_HANG);
54 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
55 msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT));
59 * Checks if the BB/MAC is hung.
61 void ath_hw_check(struct work_struct *work)
63 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
64 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
67 u8 is_alive, nbeacon = 1;
68 enum ath_reset_type type;
71 is_alive = ath9k_hw_check_alive(sc->sc_ah);
73 if (is_alive && !AR_SREV_9300(sc->sc_ah))
75 else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
76 ath_dbg(common, RESET,
77 "DCU stuck is detected. Schedule chip reset\n");
78 type = RESET_TYPE_MAC_HANG;
82 spin_lock_irqsave(&common->cc_lock, flags);
83 busy = ath_update_survey_stats(sc);
84 spin_unlock_irqrestore(&common->cc_lock, flags);
86 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
87 busy, sc->hw_busy_count + 1);
89 if (++sc->hw_busy_count >= 3) {
90 type = RESET_TYPE_BB_HANG;
93 } else if (busy >= 0) {
94 sc->hw_busy_count = 0;
98 ath_start_rx_poll(sc, nbeacon);
102 ath9k_queue_reset(sc, type);
104 ath9k_ps_restore(sc);
108 * PLL-WAR for AR9485/AR9340
110 static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
115 if (pll_sqsum >= 0x40000) {
118 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
119 ath9k_queue_reset(sc, RESET_TYPE_PLL_HANG);
130 void ath_hw_pll_work(struct work_struct *work)
133 struct ath_softc *sc = container_of(work, struct ath_softc,
136 * ensure that the PLL WAR is executed only
137 * after the STA is associated (or) if the
138 * beaconing had started in interfaces that
141 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
145 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
146 ath9k_ps_restore(sc);
147 if (ath_hw_pll_rx_hang_check(sc, pll_sqsum))
150 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
151 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
155 * RX Polling - monitors baseband hangs.
157 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon)
159 if (!AR_SREV_9300(sc->sc_ah))
162 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
165 mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies
166 (nbeacon * sc->cur_beacon_conf.beacon_interval));
169 void ath_rx_poll(unsigned long data)
171 struct ath_softc *sc = (struct ath_softc *)data;
173 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
179 static void ath_paprd_activate(struct ath_softc *sc)
181 struct ath_hw *ah = sc->sc_ah;
182 struct ath9k_hw_cal_data *caldata = ah->caldata;
185 if (!caldata || !caldata->paprd_done)
189 ar9003_paprd_enable(ah, false);
190 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
191 if (!(ah->txchainmask & BIT(chain)))
194 ar9003_paprd_populate_single_table(ah, caldata, chain);
197 ar9003_paprd_enable(ah, true);
198 ath9k_ps_restore(sc);
201 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
203 struct ieee80211_hw *hw = sc->hw;
204 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
205 struct ath_hw *ah = sc->sc_ah;
206 struct ath_common *common = ath9k_hw_common(ah);
207 struct ath_tx_control txctl;
210 memset(&txctl, 0, sizeof(txctl));
211 txctl.txq = sc->tx.txq_map[IEEE80211_AC_BE];
213 memset(tx_info, 0, sizeof(*tx_info));
214 tx_info->band = hw->conf.channel->band;
215 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
216 tx_info->control.rates[0].idx = 0;
217 tx_info->control.rates[0].count = 1;
218 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
219 tx_info->control.rates[1].idx = -1;
221 init_completion(&sc->paprd_complete);
222 txctl.paprd = BIT(chain);
224 if (ath_tx_start(hw, skb, &txctl) != 0) {
225 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
226 dev_kfree_skb_any(skb);
230 time_left = wait_for_completion_timeout(&sc->paprd_complete,
231 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
234 ath_dbg(common, CALIBRATE,
235 "Timeout waiting for paprd training on TX chain %d\n",
241 void ath_paprd_calibrate(struct work_struct *work)
243 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
244 struct ieee80211_hw *hw = sc->hw;
245 struct ath_hw *ah = sc->sc_ah;
246 struct ieee80211_hdr *hdr;
247 struct sk_buff *skb = NULL;
248 struct ath9k_hw_cal_data *caldata = ah->caldata;
249 struct ath_common *common = ath9k_hw_common(ah);
256 if (!caldata || !caldata->paprd_packet_sent || caldata->paprd_done)
261 if (ar9003_paprd_init_table(ah) < 0)
264 skb = alloc_skb(len, GFP_KERNEL);
269 memset(skb->data, 0, len);
270 hdr = (struct ieee80211_hdr *)skb->data;
271 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
272 hdr->frame_control = cpu_to_le16(ftype);
273 hdr->duration_id = cpu_to_le16(10);
274 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
275 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
276 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
278 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
279 if (!(ah->txchainmask & BIT(chain)))
283 ar9003_paprd_setup_gain_table(ah, chain);
285 ath_dbg(common, CALIBRATE,
286 "Sending PAPRD training frame on chain %d\n", chain);
287 if (!ath_paprd_send_frame(sc, skb, chain))
290 if (!ar9003_paprd_is_done(ah)) {
291 ath_dbg(common, CALIBRATE,
292 "PAPRD not yet done on chain %d\n", chain);
296 ret = ar9003_paprd_create_curve(ah, caldata, chain);
297 if (ret == -EINPROGRESS) {
298 ath_dbg(common, CALIBRATE,
299 "PAPRD curve on chain %d needs to be re-trained\n",
303 ath_dbg(common, CALIBRATE,
304 "PAPRD create curve failed on chain %d\n",
314 caldata->paprd_done = true;
315 ath_paprd_activate(sc);
319 ath9k_ps_restore(sc);
323 * ANI performs periodic noise floor calibration
324 * that is used to adjust and optimize the chip performance. This
325 * takes environmental changes (location, temperature) into account.
326 * When the task is complete, it reschedules itself depending on the
327 * appropriate interval that was calculated.
329 void ath_ani_calibrate(unsigned long data)
331 struct ath_softc *sc = (struct ath_softc *)data;
332 struct ath_hw *ah = sc->sc_ah;
333 struct ath_common *common = ath9k_hw_common(ah);
334 bool longcal = false;
335 bool shortcal = false;
336 bool aniflag = false;
337 unsigned int timestamp = jiffies_to_msecs(jiffies);
338 u32 cal_interval, short_cal_interval, long_cal_interval;
341 if (ah->caldata && ah->caldata->nfcal_interference)
342 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
344 long_cal_interval = ATH_LONG_CALINTERVAL;
346 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
347 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
349 /* Only calibrate if awake */
350 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) {
351 if (++ah->ani_skip_count >= ATH_ANI_MAX_SKIP_COUNT) {
352 spin_lock_irqsave(&sc->sc_pm_lock, flags);
353 sc->ps_flags |= PS_WAIT_FOR_ANI;
354 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
358 ah->ani_skip_count = 0;
359 spin_lock_irqsave(&sc->sc_pm_lock, flags);
360 sc->ps_flags &= ~PS_WAIT_FOR_ANI;
361 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
365 /* Long calibration runs independently of short calibration. */
366 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
368 common->ani.longcal_timer = timestamp;
371 /* Short calibration applies only while caldone is false */
372 if (!common->ani.caldone) {
373 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
375 common->ani.shortcal_timer = timestamp;
376 common->ani.resetcal_timer = timestamp;
379 if ((timestamp - common->ani.resetcal_timer) >=
380 ATH_RESTART_CALINTERVAL) {
381 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
382 if (common->ani.caldone)
383 common->ani.resetcal_timer = timestamp;
387 /* Verify whether we must check ANI */
388 if (sc->sc_ah->config.enable_ani
389 && (timestamp - common->ani.checkani_timer) >=
390 ah->config.ani_poll_interval) {
392 common->ani.checkani_timer = timestamp;
395 /* Call ANI routine if necessary */
397 spin_lock_irqsave(&common->cc_lock, flags);
398 ath9k_hw_ani_monitor(ah, ah->curchan);
399 ath_update_survey_stats(sc);
400 spin_unlock_irqrestore(&common->cc_lock, flags);
403 /* Perform calibration if necessary */
404 if (longcal || shortcal) {
405 common->ani.caldone =
406 ath9k_hw_calibrate(ah, ah->curchan,
407 ah->rxchainmask, longcal);
411 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
413 longcal ? "long" : "", shortcal ? "short" : "",
414 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
416 ath9k_debug_samp_bb_mac(sc);
417 ath9k_ps_restore(sc);
421 * Set timer interval based on previous results.
422 * The interval must be the shortest necessary to satisfy ANI,
423 * short calibration and long calibration.
425 cal_interval = ATH_LONG_CALINTERVAL;
426 if (sc->sc_ah->config.enable_ani)
427 cal_interval = min(cal_interval,
428 (u32)ah->config.ani_poll_interval);
429 if (!common->ani.caldone)
430 cal_interval = min(cal_interval, (u32)short_cal_interval);
432 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
433 if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD) && ah->caldata) {
434 if (!ah->caldata->paprd_done)
435 ieee80211_queue_work(sc->hw, &sc->paprd_work);
436 else if (!ah->paprd_table_write_done)
437 ath_paprd_activate(sc);
441 void ath_start_ani(struct ath_softc *sc)
443 struct ath_hw *ah = sc->sc_ah;
444 struct ath_common *common = ath9k_hw_common(ah);
445 unsigned long timestamp = jiffies_to_msecs(jiffies);
447 if (common->disable_ani ||
448 !test_bit(SC_OP_ANI_RUN, &sc->sc_flags) ||
449 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
452 common->ani.longcal_timer = timestamp;
453 common->ani.shortcal_timer = timestamp;
454 common->ani.checkani_timer = timestamp;
456 ath_dbg(common, ANI, "Starting ANI\n");
457 mod_timer(&common->ani.timer,
458 jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval));
461 void ath_stop_ani(struct ath_softc *sc)
463 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
465 ath_dbg(common, ANI, "Stopping ANI\n");
466 del_timer_sync(&common->ani.timer);
469 void ath_check_ani(struct ath_softc *sc)
471 struct ath_hw *ah = sc->sc_ah;
472 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
475 * Check for the various conditions in which ANI has to
478 if (ah->opmode == NL80211_IFTYPE_ADHOC) {
479 if (!cur_conf->enable_beacon)
481 } else if (ah->opmode == NL80211_IFTYPE_AP) {
482 if (!cur_conf->enable_beacon) {
484 * Disable ANI only when there are no
485 * associated stations.
487 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
490 } else if (ah->opmode == NL80211_IFTYPE_STATION) {
491 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
495 if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags)) {
496 set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
503 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
507 void ath_update_survey_nf(struct ath_softc *sc, int channel)
509 struct ath_hw *ah = sc->sc_ah;
510 struct ath9k_channel *chan = &ah->channels[channel];
511 struct survey_info *survey = &sc->survey[channel];
513 if (chan->noisefloor) {
514 survey->filled |= SURVEY_INFO_NOISE_DBM;
515 survey->noise = ath9k_hw_getchan_noise(ah, chan);
520 * Updates the survey statistics and returns the busy time since last
521 * update in %, if the measurement duration was long enough for the
522 * result to be useful, -1 otherwise.
524 int ath_update_survey_stats(struct ath_softc *sc)
526 struct ath_hw *ah = sc->sc_ah;
527 struct ath_common *common = ath9k_hw_common(ah);
528 int pos = ah->curchan - &ah->channels[0];
529 struct survey_info *survey = &sc->survey[pos];
530 struct ath_cycle_counters *cc = &common->cc_survey;
531 unsigned int div = common->clockrate * 1000;
537 if (ah->power_mode == ATH9K_PM_AWAKE)
538 ath_hw_cycle_counters_update(common);
540 if (cc->cycles > 0) {
541 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
542 SURVEY_INFO_CHANNEL_TIME_BUSY |
543 SURVEY_INFO_CHANNEL_TIME_RX |
544 SURVEY_INFO_CHANNEL_TIME_TX;
545 survey->channel_time += cc->cycles / div;
546 survey->channel_time_busy += cc->rx_busy / div;
547 survey->channel_time_rx += cc->rx_frame / div;
548 survey->channel_time_tx += cc->tx_frame / div;
551 if (cc->cycles < div)
555 ret = cc->rx_busy * 100 / cc->cycles;
557 memset(cc, 0, sizeof(*cc));
559 ath_update_survey_nf(sc, pos);