net: usbnet: support 64bit stats
[sfrench/cifs-2.6.git] / drivers / net / usb / ax88179_178a.c
1 /*
2  * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
3  *
4  * Copyright (C) 2011-2013 ASIX
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, see <http://www.gnu.org/licenses/>.
18  */
19
20 #include <linux/module.h>
21 #include <linux/etherdevice.h>
22 #include <linux/mii.h>
23 #include <linux/usb.h>
24 #include <linux/crc32.h>
25 #include <linux/usb/usbnet.h>
26 #include <uapi/linux/mdio.h>
27 #include <linux/mdio.h>
28
29 #define AX88179_PHY_ID                          0x03
30 #define AX_EEPROM_LEN                           0x100
31 #define AX88179_EEPROM_MAGIC                    0x17900b95
32 #define AX_MCAST_FLTSIZE                        8
33 #define AX_MAX_MCAST                            64
34 #define AX_INT_PPLS_LINK                        ((u32)BIT(16))
35 #define AX_RXHDR_L4_TYPE_MASK                   0x1c
36 #define AX_RXHDR_L4_TYPE_UDP                    4
37 #define AX_RXHDR_L4_TYPE_TCP                    16
38 #define AX_RXHDR_L3CSUM_ERR                     2
39 #define AX_RXHDR_L4CSUM_ERR                     1
40 #define AX_RXHDR_CRC_ERR                        ((u32)BIT(29))
41 #define AX_RXHDR_DROP_ERR                       ((u32)BIT(31))
42 #define AX_ACCESS_MAC                           0x01
43 #define AX_ACCESS_PHY                           0x02
44 #define AX_ACCESS_EEPROM                        0x04
45 #define AX_ACCESS_EFUS                          0x05
46 #define AX_PAUSE_WATERLVL_HIGH                  0x54
47 #define AX_PAUSE_WATERLVL_LOW                   0x55
48
49 #define PHYSICAL_LINK_STATUS                    0x02
50         #define AX_USB_SS               0x04
51         #define AX_USB_HS               0x02
52
53 #define GENERAL_STATUS                          0x03
54 /* Check AX88179 version. UA1:Bit2 = 0,  UA2:Bit2 = 1 */
55         #define AX_SECLD                0x04
56
57 #define AX_SROM_ADDR                            0x07
58 #define AX_SROM_CMD                             0x0a
59         #define EEP_RD                  0x04
60         #define EEP_BUSY                0x10
61
62 #define AX_SROM_DATA_LOW                        0x08
63 #define AX_SROM_DATA_HIGH                       0x09
64
65 #define AX_RX_CTL                               0x0b
66         #define AX_RX_CTL_DROPCRCERR    0x0100
67         #define AX_RX_CTL_IPE           0x0200
68         #define AX_RX_CTL_START         0x0080
69         #define AX_RX_CTL_AP            0x0020
70         #define AX_RX_CTL_AM            0x0010
71         #define AX_RX_CTL_AB            0x0008
72         #define AX_RX_CTL_AMALL         0x0002
73         #define AX_RX_CTL_PRO           0x0001
74         #define AX_RX_CTL_STOP          0x0000
75
76 #define AX_NODE_ID                              0x10
77 #define AX_MULFLTARY                            0x16
78
79 #define AX_MEDIUM_STATUS_MODE                   0x22
80         #define AX_MEDIUM_GIGAMODE      0x01
81         #define AX_MEDIUM_FULL_DUPLEX   0x02
82         #define AX_MEDIUM_EN_125MHZ     0x08
83         #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
84         #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
85         #define AX_MEDIUM_RECEIVE_EN    0x100
86         #define AX_MEDIUM_PS            0x200
87         #define AX_MEDIUM_JUMBO_EN      0x8040
88
89 #define AX_MONITOR_MOD                          0x24
90         #define AX_MONITOR_MODE_RWLC    0x02
91         #define AX_MONITOR_MODE_RWMP    0x04
92         #define AX_MONITOR_MODE_PMEPOL  0x20
93         #define AX_MONITOR_MODE_PMETYPE 0x40
94
95 #define AX_GPIO_CTRL                            0x25
96         #define AX_GPIO_CTRL_GPIO3EN    0x80
97         #define AX_GPIO_CTRL_GPIO2EN    0x40
98         #define AX_GPIO_CTRL_GPIO1EN    0x20
99
100 #define AX_PHYPWR_RSTCTL                        0x26
101         #define AX_PHYPWR_RSTCTL_BZ     0x0010
102         #define AX_PHYPWR_RSTCTL_IPRL   0x0020
103         #define AX_PHYPWR_RSTCTL_AT     0x1000
104
105 #define AX_RX_BULKIN_QCTRL                      0x2e
106 #define AX_CLK_SELECT                           0x33
107         #define AX_CLK_SELECT_BCS       0x01
108         #define AX_CLK_SELECT_ACS       0x02
109         #define AX_CLK_SELECT_ULR       0x08
110
111 #define AX_RXCOE_CTL                            0x34
112         #define AX_RXCOE_IP             0x01
113         #define AX_RXCOE_TCP            0x02
114         #define AX_RXCOE_UDP            0x04
115         #define AX_RXCOE_TCPV6          0x20
116         #define AX_RXCOE_UDPV6          0x40
117
118 #define AX_TXCOE_CTL                            0x35
119         #define AX_TXCOE_IP             0x01
120         #define AX_TXCOE_TCP            0x02
121         #define AX_TXCOE_UDP            0x04
122         #define AX_TXCOE_TCPV6          0x20
123         #define AX_TXCOE_UDPV6          0x40
124
125 #define AX_LEDCTRL                              0x73
126
127 #define GMII_PHY_PHYSR                          0x11
128         #define GMII_PHY_PHYSR_SMASK    0xc000
129         #define GMII_PHY_PHYSR_GIGA     0x8000
130         #define GMII_PHY_PHYSR_100      0x4000
131         #define GMII_PHY_PHYSR_FULL     0x2000
132         #define GMII_PHY_PHYSR_LINK     0x400
133
134 #define GMII_LED_ACT                            0x1a
135         #define GMII_LED_ACTIVE_MASK    0xff8f
136         #define GMII_LED0_ACTIVE        BIT(4)
137         #define GMII_LED1_ACTIVE        BIT(5)
138         #define GMII_LED2_ACTIVE        BIT(6)
139
140 #define GMII_LED_LINK                           0x1c
141         #define GMII_LED_LINK_MASK      0xf888
142         #define GMII_LED0_LINK_10       BIT(0)
143         #define GMII_LED0_LINK_100      BIT(1)
144         #define GMII_LED0_LINK_1000     BIT(2)
145         #define GMII_LED1_LINK_10       BIT(4)
146         #define GMII_LED1_LINK_100      BIT(5)
147         #define GMII_LED1_LINK_1000     BIT(6)
148         #define GMII_LED2_LINK_10       BIT(8)
149         #define GMII_LED2_LINK_100      BIT(9)
150         #define GMII_LED2_LINK_1000     BIT(10)
151         #define LED0_ACTIVE             BIT(0)
152         #define LED0_LINK_10            BIT(1)
153         #define LED0_LINK_100           BIT(2)
154         #define LED0_LINK_1000          BIT(3)
155         #define LED0_FD                 BIT(4)
156         #define LED0_USB3_MASK          0x001f
157         #define LED1_ACTIVE             BIT(5)
158         #define LED1_LINK_10            BIT(6)
159         #define LED1_LINK_100           BIT(7)
160         #define LED1_LINK_1000          BIT(8)
161         #define LED1_FD                 BIT(9)
162         #define LED1_USB3_MASK          0x03e0
163         #define LED2_ACTIVE             BIT(10)
164         #define LED2_LINK_1000          BIT(13)
165         #define LED2_LINK_100           BIT(12)
166         #define LED2_LINK_10            BIT(11)
167         #define LED2_FD                 BIT(14)
168         #define LED_VALID               BIT(15)
169         #define LED2_USB3_MASK          0x7c00
170
171 #define GMII_PHYPAGE                            0x1e
172 #define GMII_PHY_PAGE_SELECT                    0x1f
173         #define GMII_PHY_PGSEL_EXT      0x0007
174         #define GMII_PHY_PGSEL_PAGE0    0x0000
175         #define GMII_PHY_PGSEL_PAGE3    0x0003
176         #define GMII_PHY_PGSEL_PAGE5    0x0005
177
178 struct ax88179_data {
179         u8  eee_enabled;
180         u8  eee_active;
181         u16 rxctl;
182         u16 reserved;
183 };
184
185 struct ax88179_int_data {
186         __le32 intdata1;
187         __le32 intdata2;
188 };
189
190 static const struct {
191         unsigned char ctrl, timer_l, timer_h, size, ifg;
192 } AX88179_BULKIN_SIZE[] =       {
193         {7, 0x4f, 0,    0x12, 0xff},
194         {7, 0x20, 3,    0x16, 0xff},
195         {7, 0xae, 7,    0x18, 0xff},
196         {7, 0xcc, 0x4c, 0x18, 8},
197 };
198
199 static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
200                               u16 size, void *data, int in_pm)
201 {
202         int ret;
203         int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
204
205         BUG_ON(!dev);
206
207         if (!in_pm)
208                 fn = usbnet_read_cmd;
209         else
210                 fn = usbnet_read_cmd_nopm;
211
212         ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
213                  value, index, data, size);
214
215         if (unlikely(ret < 0))
216                 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
217                             index, ret);
218
219         return ret;
220 }
221
222 static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
223                                u16 size, void *data, int in_pm)
224 {
225         int ret;
226         int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
227
228         BUG_ON(!dev);
229
230         if (!in_pm)
231                 fn = usbnet_write_cmd;
232         else
233                 fn = usbnet_write_cmd_nopm;
234
235         ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
236                  value, index, data, size);
237
238         if (unlikely(ret < 0))
239                 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
240                             index, ret);
241
242         return ret;
243 }
244
245 static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
246                                     u16 index, u16 size, void *data)
247 {
248         u16 buf;
249
250         if (2 == size) {
251                 buf = *((u16 *)data);
252                 cpu_to_le16s(&buf);
253                 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
254                                        USB_RECIP_DEVICE, value, index, &buf,
255                                        size);
256         } else {
257                 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
258                                        USB_RECIP_DEVICE, value, index, data,
259                                        size);
260         }
261 }
262
263 static int ax88179_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
264                                  u16 index, u16 size, void *data)
265 {
266         int ret;
267
268         if (2 == size) {
269                 u16 buf;
270                 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
271                 le16_to_cpus(&buf);
272                 *((u16 *)data) = buf;
273         } else if (4 == size) {
274                 u32 buf;
275                 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
276                 le32_to_cpus(&buf);
277                 *((u32 *)data) = buf;
278         } else {
279                 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 1);
280         }
281
282         return ret;
283 }
284
285 static int ax88179_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
286                                   u16 index, u16 size, void *data)
287 {
288         int ret;
289
290         if (2 == size) {
291                 u16 buf;
292                 buf = *((u16 *)data);
293                 cpu_to_le16s(&buf);
294                 ret = __ax88179_write_cmd(dev, cmd, value, index,
295                                           size, &buf, 1);
296         } else {
297                 ret = __ax88179_write_cmd(dev, cmd, value, index,
298                                           size, data, 1);
299         }
300
301         return ret;
302 }
303
304 static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
305                             u16 size, void *data)
306 {
307         int ret;
308
309         if (2 == size) {
310                 u16 buf;
311                 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
312                 le16_to_cpus(&buf);
313                 *((u16 *)data) = buf;
314         } else if (4 == size) {
315                 u32 buf;
316                 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
317                 le32_to_cpus(&buf);
318                 *((u32 *)data) = buf;
319         } else {
320                 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 0);
321         }
322
323         return ret;
324 }
325
326 static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
327                              u16 size, void *data)
328 {
329         int ret;
330
331         if (2 == size) {
332                 u16 buf;
333                 buf = *((u16 *)data);
334                 cpu_to_le16s(&buf);
335                 ret = __ax88179_write_cmd(dev, cmd, value, index,
336                                           size, &buf, 0);
337         } else {
338                 ret = __ax88179_write_cmd(dev, cmd, value, index,
339                                           size, data, 0);
340         }
341
342         return ret;
343 }
344
345 static void ax88179_status(struct usbnet *dev, struct urb *urb)
346 {
347         struct ax88179_int_data *event;
348         u32 link;
349
350         if (urb->actual_length < 8)
351                 return;
352
353         event = urb->transfer_buffer;
354         le32_to_cpus((void *)&event->intdata1);
355
356         link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
357
358         if (netif_carrier_ok(dev->net) != link) {
359                 usbnet_link_change(dev, link, 1);
360                 netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
361         }
362 }
363
364 static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
365 {
366         struct usbnet *dev = netdev_priv(netdev);
367         u16 res;
368
369         ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
370         return res;
371 }
372
373 static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
374                                int val)
375 {
376         struct usbnet *dev = netdev_priv(netdev);
377         u16 res = (u16) val;
378
379         ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
380 }
381
382 static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
383                                            u16 devad)
384 {
385         u16 tmp16;
386         int ret;
387
388         tmp16 = devad;
389         ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
390                                 MII_MMD_CTRL, 2, &tmp16);
391
392         tmp16 = prtad;
393         ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
394                                 MII_MMD_DATA, 2, &tmp16);
395
396         tmp16 = devad | MII_MMD_CTRL_NOINCR;
397         ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
398                                 MII_MMD_CTRL, 2, &tmp16);
399
400         return ret;
401 }
402
403 static int
404 ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
405 {
406         int ret;
407         u16 tmp16;
408
409         ax88179_phy_mmd_indirect(dev, prtad, devad);
410
411         ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
412                                MII_MMD_DATA, 2, &tmp16);
413         if (ret < 0)
414                 return ret;
415
416         return tmp16;
417 }
418
419 static int
420 ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
421                                u16 data)
422 {
423         int ret;
424
425         ax88179_phy_mmd_indirect(dev, prtad, devad);
426
427         ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
428                                 MII_MMD_DATA, 2, &data);
429
430         if (ret < 0)
431                 return ret;
432
433         return 0;
434 }
435
436 static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
437 {
438         struct usbnet *dev = usb_get_intfdata(intf);
439         u16 tmp16;
440         u8 tmp8;
441
442         usbnet_suspend(intf, message);
443
444         /* Disable RX path */
445         ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
446                               2, 2, &tmp16);
447         tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
448         ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
449                                2, 2, &tmp16);
450
451         /* Force bulk-in zero length */
452         ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
453                               2, 2, &tmp16);
454
455         tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
456         ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
457                                2, 2, &tmp16);
458
459         /* change clock */
460         tmp8 = 0;
461         ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
462
463         /* Configure RX control register => stop operation */
464         tmp16 = AX_RX_CTL_STOP;
465         ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
466
467         return 0;
468 }
469
470 /* This function is used to enable the autodetach function. */
471 /* This function is determined by offset 0x43 of EEPROM */
472 static int ax88179_auto_detach(struct usbnet *dev, int in_pm)
473 {
474         u16 tmp16;
475         u8 tmp8;
476         int (*fnr)(struct usbnet *, u8, u16, u16, u16, void *);
477         int (*fnw)(struct usbnet *, u8, u16, u16, u16, void *);
478
479         if (!in_pm) {
480                 fnr = ax88179_read_cmd;
481                 fnw = ax88179_write_cmd;
482         } else {
483                 fnr = ax88179_read_cmd_nopm;
484                 fnw = ax88179_write_cmd_nopm;
485         }
486
487         if (fnr(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
488                 return 0;
489
490         if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
491                 return 0;
492
493         /* Enable Auto Detach bit */
494         tmp8 = 0;
495         fnr(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
496         tmp8 |= AX_CLK_SELECT_ULR;
497         fnw(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
498
499         fnr(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
500         tmp16 |= AX_PHYPWR_RSTCTL_AT;
501         fnw(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
502
503         return 0;
504 }
505
506 static int ax88179_resume(struct usb_interface *intf)
507 {
508         struct usbnet *dev = usb_get_intfdata(intf);
509         u16 tmp16;
510         u8 tmp8;
511
512         usbnet_link_change(dev, 0, 0);
513
514         /* Power up ethernet PHY */
515         tmp16 = 0;
516         ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
517                                2, 2, &tmp16);
518         udelay(1000);
519
520         tmp16 = AX_PHYPWR_RSTCTL_IPRL;
521         ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
522                                2, 2, &tmp16);
523         msleep(200);
524
525         /* Ethernet PHY Auto Detach*/
526         ax88179_auto_detach(dev, 1);
527
528         /* Enable clock */
529         ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC,  AX_CLK_SELECT, 1, 1, &tmp8);
530         tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
531         ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
532         msleep(100);
533
534         /* Configure RX control register => start operation */
535         tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
536                 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
537         ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
538
539         return usbnet_resume(intf);
540 }
541
542 static void
543 ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
544 {
545         struct usbnet *dev = netdev_priv(net);
546         u8 opt;
547
548         if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
549                              1, 1, &opt) < 0) {
550                 wolinfo->supported = 0;
551                 wolinfo->wolopts = 0;
552                 return;
553         }
554
555         wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
556         wolinfo->wolopts = 0;
557         if (opt & AX_MONITOR_MODE_RWLC)
558                 wolinfo->wolopts |= WAKE_PHY;
559         if (opt & AX_MONITOR_MODE_RWMP)
560                 wolinfo->wolopts |= WAKE_MAGIC;
561 }
562
563 static int
564 ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
565 {
566         struct usbnet *dev = netdev_priv(net);
567         u8 opt = 0;
568
569         if (wolinfo->wolopts & WAKE_PHY)
570                 opt |= AX_MONITOR_MODE_RWLC;
571         if (wolinfo->wolopts & WAKE_MAGIC)
572                 opt |= AX_MONITOR_MODE_RWMP;
573
574         if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
575                               1, 1, &opt) < 0)
576                 return -EINVAL;
577
578         return 0;
579 }
580
581 static int ax88179_get_eeprom_len(struct net_device *net)
582 {
583         return AX_EEPROM_LEN;
584 }
585
586 static int
587 ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
588                    u8 *data)
589 {
590         struct usbnet *dev = netdev_priv(net);
591         u16 *eeprom_buff;
592         int first_word, last_word;
593         int i, ret;
594
595         if (eeprom->len == 0)
596                 return -EINVAL;
597
598         eeprom->magic = AX88179_EEPROM_MAGIC;
599
600         first_word = eeprom->offset >> 1;
601         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
602         eeprom_buff = kmalloc(sizeof(u16) * (last_word - first_word + 1),
603                               GFP_KERNEL);
604         if (!eeprom_buff)
605                 return -ENOMEM;
606
607         /* ax88179/178A returns 2 bytes from eeprom on read */
608         for (i = first_word; i <= last_word; i++) {
609                 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
610                                          &eeprom_buff[i - first_word],
611                                          0);
612                 if (ret < 0) {
613                         kfree(eeprom_buff);
614                         return -EIO;
615                 }
616         }
617
618         memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
619         kfree(eeprom_buff);
620         return 0;
621 }
622
623 static int ax88179_get_link_ksettings(struct net_device *net,
624                                       struct ethtool_link_ksettings *cmd)
625 {
626         struct usbnet *dev = netdev_priv(net);
627         return mii_ethtool_get_link_ksettings(&dev->mii, cmd);
628 }
629
630 static int ax88179_set_link_ksettings(struct net_device *net,
631                                       const struct ethtool_link_ksettings *cmd)
632 {
633         struct usbnet *dev = netdev_priv(net);
634         return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
635 }
636
637 static int
638 ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_eee *data)
639 {
640         int val;
641
642         /* Get Supported EEE */
643         val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
644                                             MDIO_MMD_PCS);
645         if (val < 0)
646                 return val;
647         data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
648
649         /* Get advertisement EEE */
650         val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
651                                             MDIO_MMD_AN);
652         if (val < 0)
653                 return val;
654         data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
655
656         /* Get LP advertisement EEE */
657         val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
658                                             MDIO_MMD_AN);
659         if (val < 0)
660                 return val;
661         data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
662
663         return 0;
664 }
665
666 static int
667 ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_eee *data)
668 {
669         u16 tmp16 = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
670
671         return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
672                                               MDIO_MMD_AN, tmp16);
673 }
674
675 static int ax88179_chk_eee(struct usbnet *dev)
676 {
677         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
678         struct ax88179_data *priv = (struct ax88179_data *)dev->data;
679
680         mii_ethtool_gset(&dev->mii, &ecmd);
681
682         if (ecmd.duplex & DUPLEX_FULL) {
683                 int eee_lp, eee_cap, eee_adv;
684                 u32 lp, cap, adv, supported = 0;
685
686                 eee_cap = ax88179_phy_read_mmd_indirect(dev,
687                                                         MDIO_PCS_EEE_ABLE,
688                                                         MDIO_MMD_PCS);
689                 if (eee_cap < 0) {
690                         priv->eee_active = 0;
691                         return false;
692                 }
693
694                 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
695                 if (!cap) {
696                         priv->eee_active = 0;
697                         return false;
698                 }
699
700                 eee_lp = ax88179_phy_read_mmd_indirect(dev,
701                                                        MDIO_AN_EEE_LPABLE,
702                                                        MDIO_MMD_AN);
703                 if (eee_lp < 0) {
704                         priv->eee_active = 0;
705                         return false;
706                 }
707
708                 eee_adv = ax88179_phy_read_mmd_indirect(dev,
709                                                         MDIO_AN_EEE_ADV,
710                                                         MDIO_MMD_AN);
711
712                 if (eee_adv < 0) {
713                         priv->eee_active = 0;
714                         return false;
715                 }
716
717                 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
718                 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
719                 supported = (ecmd.speed == SPEED_1000) ?
720                              SUPPORTED_1000baseT_Full :
721                              SUPPORTED_100baseT_Full;
722
723                 if (!(lp & adv & supported)) {
724                         priv->eee_active = 0;
725                         return false;
726                 }
727
728                 priv->eee_active = 1;
729                 return true;
730         }
731
732         priv->eee_active = 0;
733         return false;
734 }
735
736 static void ax88179_disable_eee(struct usbnet *dev)
737 {
738         u16 tmp16;
739
740         tmp16 = GMII_PHY_PGSEL_PAGE3;
741         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
742                           GMII_PHY_PAGE_SELECT, 2, &tmp16);
743
744         tmp16 = 0x3246;
745         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
746                           MII_PHYADDR, 2, &tmp16);
747
748         tmp16 = GMII_PHY_PGSEL_PAGE0;
749         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
750                           GMII_PHY_PAGE_SELECT, 2, &tmp16);
751 }
752
753 static void ax88179_enable_eee(struct usbnet *dev)
754 {
755         u16 tmp16;
756
757         tmp16 = GMII_PHY_PGSEL_PAGE3;
758         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
759                           GMII_PHY_PAGE_SELECT, 2, &tmp16);
760
761         tmp16 = 0x3247;
762         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
763                           MII_PHYADDR, 2, &tmp16);
764
765         tmp16 = GMII_PHY_PGSEL_PAGE5;
766         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
767                           GMII_PHY_PAGE_SELECT, 2, &tmp16);
768
769         tmp16 = 0x0680;
770         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
771                           MII_BMSR, 2, &tmp16);
772
773         tmp16 = GMII_PHY_PGSEL_PAGE0;
774         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
775                           GMII_PHY_PAGE_SELECT, 2, &tmp16);
776 }
777
778 static int ax88179_get_eee(struct net_device *net, struct ethtool_eee *edata)
779 {
780         struct usbnet *dev = netdev_priv(net);
781         struct ax88179_data *priv = (struct ax88179_data *)dev->data;
782
783         edata->eee_enabled = priv->eee_enabled;
784         edata->eee_active = priv->eee_active;
785
786         return ax88179_ethtool_get_eee(dev, edata);
787 }
788
789 static int ax88179_set_eee(struct net_device *net, struct ethtool_eee *edata)
790 {
791         struct usbnet *dev = netdev_priv(net);
792         struct ax88179_data *priv = (struct ax88179_data *)dev->data;
793         int ret = -EOPNOTSUPP;
794
795         priv->eee_enabled = edata->eee_enabled;
796         if (!priv->eee_enabled) {
797                 ax88179_disable_eee(dev);
798         } else {
799                 priv->eee_enabled = ax88179_chk_eee(dev);
800                 if (!priv->eee_enabled)
801                         return -EOPNOTSUPP;
802
803                 ax88179_enable_eee(dev);
804         }
805
806         ret = ax88179_ethtool_set_eee(dev, edata);
807         if (ret)
808                 return ret;
809
810         mii_nway_restart(&dev->mii);
811
812         usbnet_link_change(dev, 0, 0);
813
814         return ret;
815 }
816
817 static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
818 {
819         struct usbnet *dev = netdev_priv(net);
820         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
821 }
822
823 static const struct ethtool_ops ax88179_ethtool_ops = {
824         .get_link               = ethtool_op_get_link,
825         .get_msglevel           = usbnet_get_msglevel,
826         .set_msglevel           = usbnet_set_msglevel,
827         .get_wol                = ax88179_get_wol,
828         .set_wol                = ax88179_set_wol,
829         .get_eeprom_len         = ax88179_get_eeprom_len,
830         .get_eeprom             = ax88179_get_eeprom,
831         .get_eee                = ax88179_get_eee,
832         .set_eee                = ax88179_set_eee,
833         .nway_reset             = usbnet_nway_reset,
834         .get_link_ksettings     = ax88179_get_link_ksettings,
835         .set_link_ksettings     = ax88179_set_link_ksettings,
836 };
837
838 static void ax88179_set_multicast(struct net_device *net)
839 {
840         struct usbnet *dev = netdev_priv(net);
841         struct ax88179_data *data = (struct ax88179_data *)dev->data;
842         u8 *m_filter = ((u8 *)dev->data) + 12;
843
844         data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
845
846         if (net->flags & IFF_PROMISC) {
847                 data->rxctl |= AX_RX_CTL_PRO;
848         } else if (net->flags & IFF_ALLMULTI ||
849                    netdev_mc_count(net) > AX_MAX_MCAST) {
850                 data->rxctl |= AX_RX_CTL_AMALL;
851         } else if (netdev_mc_empty(net)) {
852                 /* just broadcast and directed */
853         } else {
854                 /* We use the 20 byte dev->data for our 8 byte filter buffer
855                  * to avoid allocating memory that is tricky to free later
856                  */
857                 u32 crc_bits;
858                 struct netdev_hw_addr *ha;
859
860                 memset(m_filter, 0, AX_MCAST_FLTSIZE);
861
862                 netdev_for_each_mc_addr(ha, net) {
863                         crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
864                         *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
865                 }
866
867                 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
868                                         AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
869                                         m_filter);
870
871                 data->rxctl |= AX_RX_CTL_AM;
872         }
873
874         ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
875                                 2, 2, &data->rxctl);
876 }
877
878 static int
879 ax88179_set_features(struct net_device *net, netdev_features_t features)
880 {
881         u8 tmp;
882         struct usbnet *dev = netdev_priv(net);
883         netdev_features_t changed = net->features ^ features;
884
885         if (changed & NETIF_F_IP_CSUM) {
886                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
887                 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
888                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
889         }
890
891         if (changed & NETIF_F_IPV6_CSUM) {
892                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
893                 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
894                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
895         }
896
897         if (changed & NETIF_F_RXCSUM) {
898                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
899                 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
900                        AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
901                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
902         }
903
904         return 0;
905 }
906
907 static int ax88179_change_mtu(struct net_device *net, int new_mtu)
908 {
909         struct usbnet *dev = netdev_priv(net);
910         u16 tmp16;
911
912         net->mtu = new_mtu;
913         dev->hard_mtu = net->mtu + net->hard_header_len;
914
915         if (net->mtu > 1500) {
916                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
917                                  2, 2, &tmp16);
918                 tmp16 |= AX_MEDIUM_JUMBO_EN;
919                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
920                                   2, 2, &tmp16);
921         } else {
922                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
923                                  2, 2, &tmp16);
924                 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
925                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
926                                   2, 2, &tmp16);
927         }
928
929         /* max qlen depend on hard_mtu and rx_urb_size */
930         usbnet_update_max_qlen(dev);
931
932         return 0;
933 }
934
935 static int ax88179_set_mac_addr(struct net_device *net, void *p)
936 {
937         struct usbnet *dev = netdev_priv(net);
938         struct sockaddr *addr = p;
939         int ret;
940
941         if (netif_running(net))
942                 return -EBUSY;
943         if (!is_valid_ether_addr(addr->sa_data))
944                 return -EADDRNOTAVAIL;
945
946         memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
947
948         /* Set the MAC address */
949         ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
950                                  ETH_ALEN, net->dev_addr);
951         if (ret < 0)
952                 return ret;
953
954         return 0;
955 }
956
957 static const struct net_device_ops ax88179_netdev_ops = {
958         .ndo_open               = usbnet_open,
959         .ndo_stop               = usbnet_stop,
960         .ndo_start_xmit         = usbnet_start_xmit,
961         .ndo_tx_timeout         = usbnet_tx_timeout,
962         .ndo_get_stats64        = usbnet_get_stats64,
963         .ndo_change_mtu         = ax88179_change_mtu,
964         .ndo_set_mac_address    = ax88179_set_mac_addr,
965         .ndo_validate_addr      = eth_validate_addr,
966         .ndo_do_ioctl           = ax88179_ioctl,
967         .ndo_set_rx_mode        = ax88179_set_multicast,
968         .ndo_set_features       = ax88179_set_features,
969 };
970
971 static int ax88179_check_eeprom(struct usbnet *dev)
972 {
973         u8 i, buf, eeprom[20];
974         u16 csum, delay = HZ / 10;
975         unsigned long jtimeout;
976
977         /* Read EEPROM content */
978         for (i = 0; i < 6; i++) {
979                 buf = i;
980                 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
981                                       1, 1, &buf) < 0)
982                         return -EINVAL;
983
984                 buf = EEP_RD;
985                 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
986                                       1, 1, &buf) < 0)
987                         return -EINVAL;
988
989                 jtimeout = jiffies + delay;
990                 do {
991                         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
992                                          1, 1, &buf);
993
994                         if (time_after(jiffies, jtimeout))
995                                 return -EINVAL;
996
997                 } while (buf & EEP_BUSY);
998
999                 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1000                                    2, 2, &eeprom[i * 2], 0);
1001
1002                 if ((i == 0) && (eeprom[0] == 0xFF))
1003                         return -EINVAL;
1004         }
1005
1006         csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1007         csum = (csum >> 8) + (csum & 0xff);
1008         if ((csum + eeprom[10]) != 0xff)
1009                 return -EINVAL;
1010
1011         return 0;
1012 }
1013
1014 static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1015 {
1016         u8      i;
1017         u8      efuse[64];
1018         u16     csum = 0;
1019
1020         if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1021                 return -EINVAL;
1022
1023         if (*efuse == 0xFF)
1024                 return -EINVAL;
1025
1026         for (i = 0; i < 64; i++)
1027                 csum = csum + efuse[i];
1028
1029         while (csum > 255)
1030                 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1031
1032         if (csum != 0xFF)
1033                 return -EINVAL;
1034
1035         *ledmode = (efuse[51] << 8) | efuse[52];
1036
1037         return 0;
1038 }
1039
1040 static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1041 {
1042         u16 led;
1043
1044         /* Loaded the old eFuse LED Mode */
1045         if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1046                 return -EINVAL;
1047
1048         led >>= 8;
1049         switch (led) {
1050         case 0xFF:
1051                 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1052                       LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1053                       LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1054                 break;
1055         case 0xFE:
1056                 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1057                 break;
1058         case 0xFD:
1059                 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1060                       LED2_LINK_10 | LED_VALID;
1061                 break;
1062         case 0xFC:
1063                 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1064                       LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1065                 break;
1066         default:
1067                 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1068                       LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1069                       LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1070                 break;
1071         }
1072
1073         *ledvalue = led;
1074
1075         return 0;
1076 }
1077
1078 static int ax88179_led_setting(struct usbnet *dev)
1079 {
1080         u8 ledfd, value = 0;
1081         u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1082         unsigned long jtimeout;
1083
1084         /* Check AX88179 version. UA1 or UA2*/
1085         ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1086
1087         if (!(value & AX_SECLD)) {      /* UA1 */
1088                 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1089                         AX_GPIO_CTRL_GPIO1EN;
1090                 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1091                                       1, 1, &value) < 0)
1092                         return -EINVAL;
1093         }
1094
1095         /* Check EEPROM */
1096         if (!ax88179_check_eeprom(dev)) {
1097                 value = 0x42;
1098                 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1099                                       1, 1, &value) < 0)
1100                         return -EINVAL;
1101
1102                 value = EEP_RD;
1103                 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1104                                       1, 1, &value) < 0)
1105                         return -EINVAL;
1106
1107                 jtimeout = jiffies + delay;
1108                 do {
1109                         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1110                                          1, 1, &value);
1111
1112                         if (time_after(jiffies, jtimeout))
1113                                 return -EINVAL;
1114
1115                 } while (value & EEP_BUSY);
1116
1117                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1118                                  1, 1, &value);
1119                 ledvalue = (value << 8);
1120
1121                 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1122                                  1, 1, &value);
1123                 ledvalue |= value;
1124
1125                 /* load internal ROM for defaule setting */
1126                 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1127                         ax88179_convert_old_led(dev, &ledvalue);
1128
1129         } else if (!ax88179_check_efuse(dev, &ledvalue)) {
1130                 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1131                         ax88179_convert_old_led(dev, &ledvalue);
1132         } else {
1133                 ax88179_convert_old_led(dev, &ledvalue);
1134         }
1135
1136         tmp = GMII_PHY_PGSEL_EXT;
1137         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1138                           GMII_PHY_PAGE_SELECT, 2, &tmp);
1139
1140         tmp = 0x2c;
1141         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1142                           GMII_PHYPAGE, 2, &tmp);
1143
1144         ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1145                          GMII_LED_ACT, 2, &ledact);
1146
1147         ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1148                          GMII_LED_LINK, 2, &ledlink);
1149
1150         ledact &= GMII_LED_ACTIVE_MASK;
1151         ledlink &= GMII_LED_LINK_MASK;
1152
1153         if (ledvalue & LED0_ACTIVE)
1154                 ledact |= GMII_LED0_ACTIVE;
1155
1156         if (ledvalue & LED1_ACTIVE)
1157                 ledact |= GMII_LED1_ACTIVE;
1158
1159         if (ledvalue & LED2_ACTIVE)
1160                 ledact |= GMII_LED2_ACTIVE;
1161
1162         if (ledvalue & LED0_LINK_10)
1163                 ledlink |= GMII_LED0_LINK_10;
1164
1165         if (ledvalue & LED1_LINK_10)
1166                 ledlink |= GMII_LED1_LINK_10;
1167
1168         if (ledvalue & LED2_LINK_10)
1169                 ledlink |= GMII_LED2_LINK_10;
1170
1171         if (ledvalue & LED0_LINK_100)
1172                 ledlink |= GMII_LED0_LINK_100;
1173
1174         if (ledvalue & LED1_LINK_100)
1175                 ledlink |= GMII_LED1_LINK_100;
1176
1177         if (ledvalue & LED2_LINK_100)
1178                 ledlink |= GMII_LED2_LINK_100;
1179
1180         if (ledvalue & LED0_LINK_1000)
1181                 ledlink |= GMII_LED0_LINK_1000;
1182
1183         if (ledvalue & LED1_LINK_1000)
1184                 ledlink |= GMII_LED1_LINK_1000;
1185
1186         if (ledvalue & LED2_LINK_1000)
1187                 ledlink |= GMII_LED2_LINK_1000;
1188
1189         tmp = ledact;
1190         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1191                           GMII_LED_ACT, 2, &tmp);
1192
1193         tmp = ledlink;
1194         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1195                           GMII_LED_LINK, 2, &tmp);
1196
1197         tmp = GMII_PHY_PGSEL_PAGE0;
1198         ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1199                           GMII_PHY_PAGE_SELECT, 2, &tmp);
1200
1201         /* LED full duplex setting */
1202         ledfd = 0;
1203         if (ledvalue & LED0_FD)
1204                 ledfd |= 0x01;
1205         else if ((ledvalue & LED0_USB3_MASK) == 0)
1206                 ledfd |= 0x02;
1207
1208         if (ledvalue & LED1_FD)
1209                 ledfd |= 0x04;
1210         else if ((ledvalue & LED1_USB3_MASK) == 0)
1211                 ledfd |= 0x08;
1212
1213         if (ledvalue & LED2_FD)
1214                 ledfd |= 0x10;
1215         else if ((ledvalue & LED2_USB3_MASK) == 0)
1216                 ledfd |= 0x20;
1217
1218         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1219
1220         return 0;
1221 }
1222
1223 static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1224 {
1225         u8 buf[5];
1226         u16 *tmp16;
1227         u8 *tmp;
1228         struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1229         struct ethtool_eee eee_data;
1230
1231         usbnet_get_endpoints(dev, intf);
1232
1233         tmp16 = (u16 *)buf;
1234         tmp = (u8 *)buf;
1235
1236         memset(ax179_data, 0, sizeof(*ax179_data));
1237
1238         /* Power up ethernet PHY */
1239         *tmp16 = 0;
1240         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1241         *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1242         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1243         msleep(200);
1244
1245         *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1246         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1247         msleep(100);
1248
1249         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1250                          ETH_ALEN, dev->net->dev_addr);
1251         memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1252
1253         /* RX bulk configuration */
1254         memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1255         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1256
1257         dev->rx_urb_size = 1024 * 20;
1258
1259         *tmp = 0x34;
1260         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1261
1262         *tmp = 0x52;
1263         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1264                           1, 1, tmp);
1265
1266         dev->net->netdev_ops = &ax88179_netdev_ops;
1267         dev->net->ethtool_ops = &ax88179_ethtool_ops;
1268         dev->net->needed_headroom = 8;
1269         dev->net->max_mtu = 4088;
1270
1271         /* Initialize MII structure */
1272         dev->mii.dev = dev->net;
1273         dev->mii.mdio_read = ax88179_mdio_read;
1274         dev->mii.mdio_write = ax88179_mdio_write;
1275         dev->mii.phy_id_mask = 0xff;
1276         dev->mii.reg_num_mask = 0xff;
1277         dev->mii.phy_id = 0x03;
1278         dev->mii.supports_gmii = 1;
1279
1280         dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1281                               NETIF_F_RXCSUM;
1282
1283         dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1284                                  NETIF_F_RXCSUM;
1285
1286         /* Enable checksum offload */
1287         *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1288                AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1289         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1290
1291         *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1292                AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1293         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1294
1295         /* Configure RX control register => start operation */
1296         *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1297                  AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1298         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1299
1300         *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1301                AX_MONITOR_MODE_RWMP;
1302         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1303
1304         /* Configure default medium type => giga */
1305         *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1306                  AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1307                  AX_MEDIUM_GIGAMODE;
1308         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1309                           2, 2, tmp16);
1310
1311         ax88179_led_setting(dev);
1312
1313         ax179_data->eee_enabled = 0;
1314         ax179_data->eee_active = 0;
1315
1316         ax88179_disable_eee(dev);
1317
1318         ax88179_ethtool_get_eee(dev, &eee_data);
1319         eee_data.advertised = 0;
1320         ax88179_ethtool_set_eee(dev, &eee_data);
1321
1322         /* Restart autoneg */
1323         mii_nway_restart(&dev->mii);
1324
1325         usbnet_link_change(dev, 0, 0);
1326
1327         return 0;
1328 }
1329
1330 static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1331 {
1332         u16 tmp16;
1333
1334         /* Configure RX control register => stop operation */
1335         tmp16 = AX_RX_CTL_STOP;
1336         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1337
1338         tmp16 = 0;
1339         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1340
1341         /* Power down ethernet PHY */
1342         tmp16 = 0;
1343         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1344 }
1345
1346 static void
1347 ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1348 {
1349         skb->ip_summed = CHECKSUM_NONE;
1350
1351         /* checksum error bit is set */
1352         if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1353             (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1354                 return;
1355
1356         /* It must be a TCP or UDP packet with a valid checksum */
1357         if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1358             ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1359                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1360 }
1361
1362 static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1363 {
1364         struct sk_buff *ax_skb;
1365         int pkt_cnt;
1366         u32 rx_hdr;
1367         u16 hdr_off;
1368         u32 *pkt_hdr;
1369
1370         /* This check is no longer done by usbnet */
1371         if (skb->len < dev->net->hard_header_len)
1372                 return 0;
1373
1374         skb_trim(skb, skb->len - 4);
1375         memcpy(&rx_hdr, skb_tail_pointer(skb), 4);
1376         le32_to_cpus(&rx_hdr);
1377
1378         pkt_cnt = (u16)rx_hdr;
1379         hdr_off = (u16)(rx_hdr >> 16);
1380         pkt_hdr = (u32 *)(skb->data + hdr_off);
1381
1382         while (pkt_cnt--) {
1383                 u16 pkt_len;
1384
1385                 le32_to_cpus(pkt_hdr);
1386                 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1387
1388                 /* Check CRC or runt packet */
1389                 if ((*pkt_hdr & AX_RXHDR_CRC_ERR) ||
1390                     (*pkt_hdr & AX_RXHDR_DROP_ERR)) {
1391                         skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1392                         pkt_hdr++;
1393                         continue;
1394                 }
1395
1396                 if (pkt_cnt == 0) {
1397                         /* Skip IP alignment psudo header */
1398                         skb_pull(skb, 2);
1399                         skb->len = pkt_len;
1400                         skb_set_tail_pointer(skb, pkt_len);
1401                         skb->truesize = pkt_len + sizeof(struct sk_buff);
1402                         ax88179_rx_checksum(skb, pkt_hdr);
1403                         return 1;
1404                 }
1405
1406                 ax_skb = skb_clone(skb, GFP_ATOMIC);
1407                 if (ax_skb) {
1408                         ax_skb->len = pkt_len;
1409                         ax_skb->data = skb->data + 2;
1410                         skb_set_tail_pointer(ax_skb, pkt_len);
1411                         ax_skb->truesize = pkt_len + sizeof(struct sk_buff);
1412                         ax88179_rx_checksum(ax_skb, pkt_hdr);
1413                         usbnet_skb_return(dev, ax_skb);
1414                 } else {
1415                         return 0;
1416                 }
1417
1418                 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1419                 pkt_hdr++;
1420         }
1421         return 1;
1422 }
1423
1424 static struct sk_buff *
1425 ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1426 {
1427         u32 tx_hdr1, tx_hdr2;
1428         int frame_size = dev->maxpacket;
1429         int mss = skb_shinfo(skb)->gso_size;
1430         int headroom;
1431
1432         tx_hdr1 = skb->len;
1433         tx_hdr2 = mss;
1434         if (((skb->len + 8) % frame_size) == 0)
1435                 tx_hdr2 |= 0x80008000;  /* Enable padding */
1436
1437         headroom = skb_headroom(skb) - 8;
1438
1439         if ((skb_header_cloned(skb) || headroom < 0) &&
1440             pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1441                 dev_kfree_skb_any(skb);
1442                 return NULL;
1443         }
1444
1445         skb_push(skb, 4);
1446         cpu_to_le32s(&tx_hdr2);
1447         skb_copy_to_linear_data(skb, &tx_hdr2, 4);
1448
1449         skb_push(skb, 4);
1450         cpu_to_le32s(&tx_hdr1);
1451         skb_copy_to_linear_data(skb, &tx_hdr1, 4);
1452
1453         return skb;
1454 }
1455
1456 static int ax88179_link_reset(struct usbnet *dev)
1457 {
1458         struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1459         u8 tmp[5], link_sts;
1460         u16 mode, tmp16, delay = HZ / 10;
1461         u32 tmp32 = 0x40000000;
1462         unsigned long jtimeout;
1463
1464         jtimeout = jiffies + delay;
1465         while (tmp32 & 0x40000000) {
1466                 mode = 0;
1467                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1468                 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1469                                   &ax179_data->rxctl);
1470
1471                 /*link up, check the usb device control TX FIFO full or empty*/
1472                 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1473
1474                 if (time_after(jiffies, jtimeout))
1475                         return 0;
1476         }
1477
1478         mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1479                AX_MEDIUM_RXFLOW_CTRLEN;
1480
1481         ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1482                          1, 1, &link_sts);
1483
1484         ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1485                          GMII_PHY_PHYSR, 2, &tmp16);
1486
1487         if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1488                 return 0;
1489         } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1490                 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1491                 if (dev->net->mtu > 1500)
1492                         mode |= AX_MEDIUM_JUMBO_EN;
1493
1494                 if (link_sts & AX_USB_SS)
1495                         memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1496                 else if (link_sts & AX_USB_HS)
1497                         memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1498                 else
1499                         memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1500         } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1501                 mode |= AX_MEDIUM_PS;
1502
1503                 if (link_sts & (AX_USB_SS | AX_USB_HS))
1504                         memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1505                 else
1506                         memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1507         } else {
1508                 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1509         }
1510
1511         /* RX bulk configuration */
1512         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1513
1514         dev->rx_urb_size = (1024 * (tmp[3] + 2));
1515
1516         if (tmp16 & GMII_PHY_PHYSR_FULL)
1517                 mode |= AX_MEDIUM_FULL_DUPLEX;
1518         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1519                           2, 2, &mode);
1520
1521         ax179_data->eee_enabled = ax88179_chk_eee(dev);
1522
1523         netif_carrier_on(dev->net);
1524
1525         return 0;
1526 }
1527
1528 static int ax88179_reset(struct usbnet *dev)
1529 {
1530         u8 buf[5];
1531         u16 *tmp16;
1532         u8 *tmp;
1533         struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1534         struct ethtool_eee eee_data;
1535
1536         tmp16 = (u16 *)buf;
1537         tmp = (u8 *)buf;
1538
1539         /* Power up ethernet PHY */
1540         *tmp16 = 0;
1541         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1542
1543         *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1544         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1545         msleep(200);
1546
1547         *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1548         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1549         msleep(100);
1550
1551         /* Ethernet PHY Auto Detach*/
1552         ax88179_auto_detach(dev, 0);
1553
1554         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1555                          dev->net->dev_addr);
1556         memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1557
1558         /* RX bulk configuration */
1559         memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1560         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1561
1562         dev->rx_urb_size = 1024 * 20;
1563
1564         *tmp = 0x34;
1565         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1566
1567         *tmp = 0x52;
1568         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1569                           1, 1, tmp);
1570
1571         dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1572                               NETIF_F_RXCSUM;
1573
1574         dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1575                                  NETIF_F_RXCSUM;
1576
1577         /* Enable checksum offload */
1578         *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1579                AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1580         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1581
1582         *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1583                AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1584         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1585
1586         /* Configure RX control register => start operation */
1587         *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1588                  AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1589         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1590
1591         *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1592                AX_MONITOR_MODE_RWMP;
1593         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1594
1595         /* Configure default medium type => giga */
1596         *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1597                  AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1598                  AX_MEDIUM_GIGAMODE;
1599         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1600                           2, 2, tmp16);
1601
1602         ax88179_led_setting(dev);
1603
1604         ax179_data->eee_enabled = 0;
1605         ax179_data->eee_active = 0;
1606
1607         ax88179_disable_eee(dev);
1608
1609         ax88179_ethtool_get_eee(dev, &eee_data);
1610         eee_data.advertised = 0;
1611         ax88179_ethtool_set_eee(dev, &eee_data);
1612
1613         /* Restart autoneg */
1614         mii_nway_restart(&dev->mii);
1615
1616         usbnet_link_change(dev, 0, 0);
1617
1618         return 0;
1619 }
1620
1621 static int ax88179_stop(struct usbnet *dev)
1622 {
1623         u16 tmp16;
1624
1625         ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1626                          2, 2, &tmp16);
1627         tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1628         ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1629                           2, 2, &tmp16);
1630
1631         return 0;
1632 }
1633
1634 static const struct driver_info ax88179_info = {
1635         .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1636         .bind = ax88179_bind,
1637         .unbind = ax88179_unbind,
1638         .status = ax88179_status,
1639         .link_reset = ax88179_link_reset,
1640         .reset = ax88179_reset,
1641         .stop = ax88179_stop,
1642         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1643         .rx_fixup = ax88179_rx_fixup,
1644         .tx_fixup = ax88179_tx_fixup,
1645 };
1646
1647 static const struct driver_info ax88178a_info = {
1648         .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1649         .bind = ax88179_bind,
1650         .unbind = ax88179_unbind,
1651         .status = ax88179_status,
1652         .link_reset = ax88179_link_reset,
1653         .reset = ax88179_reset,
1654         .stop = ax88179_stop,
1655         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1656         .rx_fixup = ax88179_rx_fixup,
1657         .tx_fixup = ax88179_tx_fixup,
1658 };
1659
1660 static const struct driver_info cypress_GX3_info = {
1661         .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1662         .bind = ax88179_bind,
1663         .unbind = ax88179_unbind,
1664         .status = ax88179_status,
1665         .link_reset = ax88179_link_reset,
1666         .reset = ax88179_reset,
1667         .stop = ax88179_stop,
1668         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1669         .rx_fixup = ax88179_rx_fixup,
1670         .tx_fixup = ax88179_tx_fixup,
1671 };
1672
1673 static const struct driver_info dlink_dub1312_info = {
1674         .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1675         .bind = ax88179_bind,
1676         .unbind = ax88179_unbind,
1677         .status = ax88179_status,
1678         .link_reset = ax88179_link_reset,
1679         .reset = ax88179_reset,
1680         .stop = ax88179_stop,
1681         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1682         .rx_fixup = ax88179_rx_fixup,
1683         .tx_fixup = ax88179_tx_fixup,
1684 };
1685
1686 static const struct driver_info sitecom_info = {
1687         .description = "Sitecom USB 3.0 to Gigabit Adapter",
1688         .bind = ax88179_bind,
1689         .unbind = ax88179_unbind,
1690         .status = ax88179_status,
1691         .link_reset = ax88179_link_reset,
1692         .reset = ax88179_reset,
1693         .stop = ax88179_stop,
1694         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1695         .rx_fixup = ax88179_rx_fixup,
1696         .tx_fixup = ax88179_tx_fixup,
1697 };
1698
1699 static const struct driver_info samsung_info = {
1700         .description = "Samsung USB Ethernet Adapter",
1701         .bind = ax88179_bind,
1702         .unbind = ax88179_unbind,
1703         .status = ax88179_status,
1704         .link_reset = ax88179_link_reset,
1705         .reset = ax88179_reset,
1706         .stop = ax88179_stop,
1707         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1708         .rx_fixup = ax88179_rx_fixup,
1709         .tx_fixup = ax88179_tx_fixup,
1710 };
1711
1712 static const struct driver_info lenovo_info = {
1713         .description = "Lenovo OneLinkDock Gigabit LAN",
1714         .bind = ax88179_bind,
1715         .unbind = ax88179_unbind,
1716         .status = ax88179_status,
1717         .link_reset = ax88179_link_reset,
1718         .reset = ax88179_reset,
1719         .stop = ax88179_stop,
1720         .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1721         .rx_fixup = ax88179_rx_fixup,
1722         .tx_fixup = ax88179_tx_fixup,
1723 };
1724
1725 static const struct usb_device_id products[] = {
1726 {
1727         /* ASIX AX88179 10/100/1000 */
1728         USB_DEVICE(0x0b95, 0x1790),
1729         .driver_info = (unsigned long)&ax88179_info,
1730 }, {
1731         /* ASIX AX88178A 10/100/1000 */
1732         USB_DEVICE(0x0b95, 0x178a),
1733         .driver_info = (unsigned long)&ax88178a_info,
1734 }, {
1735         /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1736         USB_DEVICE(0x04b4, 0x3610),
1737         .driver_info = (unsigned long)&cypress_GX3_info,
1738 }, {
1739         /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1740         USB_DEVICE(0x2001, 0x4a00),
1741         .driver_info = (unsigned long)&dlink_dub1312_info,
1742 }, {
1743         /* Sitecom USB 3.0 to Gigabit Adapter */
1744         USB_DEVICE(0x0df6, 0x0072),
1745         .driver_info = (unsigned long)&sitecom_info,
1746 }, {
1747         /* Samsung USB Ethernet Adapter */
1748         USB_DEVICE(0x04e8, 0xa100),
1749         .driver_info = (unsigned long)&samsung_info,
1750 }, {
1751         /* Lenovo OneLinkDock Gigabit LAN */
1752         USB_DEVICE(0x17ef, 0x304b),
1753         .driver_info = (unsigned long)&lenovo_info,
1754 },
1755         { },
1756 };
1757 MODULE_DEVICE_TABLE(usb, products);
1758
1759 static struct usb_driver ax88179_178a_driver = {
1760         .name =         "ax88179_178a",
1761         .id_table =     products,
1762         .probe =        usbnet_probe,
1763         .suspend =      ax88179_suspend,
1764         .resume =       ax88179_resume,
1765         .reset_resume = ax88179_resume,
1766         .disconnect =   usbnet_disconnect,
1767         .supports_autosuspend = 1,
1768         .disable_hub_initiated_lpm = 1,
1769 };
1770
1771 module_usb_driver(ax88179_178a_driver);
1772
1773 MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1774 MODULE_LICENSE("GPL");