Merge tag 'qcom-fixes-for-5.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / drivers / net / phy / bcm87xx.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2011 - 2012 Cavium, Inc.
7  */
8
9 #include <linux/module.h>
10 #include <linux/phy.h>
11 #include <linux/of.h>
12
13 #define PHY_ID_BCM8706  0x0143bdc1
14 #define PHY_ID_BCM8727  0x0143bff0
15
16 #define BCM87XX_PMD_RX_SIGNAL_DETECT    (MII_ADDR_C45 | 0x1000a)
17 #define BCM87XX_10GBASER_PCS_STATUS     (MII_ADDR_C45 | 0x30020)
18 #define BCM87XX_XGXS_LANE_STATUS        (MII_ADDR_C45 | 0x40018)
19
20 #define BCM87XX_LASI_CONTROL (MII_ADDR_C45 | 0x39002)
21 #define BCM87XX_LASI_STATUS (MII_ADDR_C45 | 0x39005)
22
23 #if IS_ENABLED(CONFIG_OF_MDIO)
24 /* Set and/or override some configuration registers based on the
25  * broadcom,c45-reg-init property stored in the of_node for the phydev.
26  *
27  * broadcom,c45-reg-init = <devid reg mask value>,...;
28  *
29  * There may be one or more sets of <devid reg mask value>:
30  *
31  * devid: which sub-device to use.
32  * reg: the register.
33  * mask: if non-zero, ANDed with existing register value.
34  * value: ORed with the masked value and written to the regiser.
35  *
36  */
37 static int bcm87xx_of_reg_init(struct phy_device *phydev)
38 {
39         const __be32 *paddr;
40         const __be32 *paddr_end;
41         int len, ret;
42
43         if (!phydev->mdio.dev.of_node)
44                 return 0;
45
46         paddr = of_get_property(phydev->mdio.dev.of_node,
47                                 "broadcom,c45-reg-init", &len);
48         if (!paddr)
49                 return 0;
50
51         paddr_end = paddr + (len /= sizeof(*paddr));
52
53         ret = 0;
54
55         while (paddr + 3 < paddr_end) {
56                 u16 devid       = be32_to_cpup(paddr++);
57                 u16 reg         = be32_to_cpup(paddr++);
58                 u16 mask        = be32_to_cpup(paddr++);
59                 u16 val_bits    = be32_to_cpup(paddr++);
60                 int val;
61                 u32 regnum = MII_ADDR_C45 | (devid << 16) | reg;
62                 val = 0;
63                 if (mask) {
64                         val = phy_read(phydev, regnum);
65                         if (val < 0) {
66                                 ret = val;
67                                 goto err;
68                         }
69                         val &= mask;
70                 }
71                 val |= val_bits;
72
73                 ret = phy_write(phydev, regnum, val);
74                 if (ret < 0)
75                         goto err;
76         }
77 err:
78         return ret;
79 }
80 #else
81 static int bcm87xx_of_reg_init(struct phy_device *phydev)
82 {
83         return 0;
84 }
85 #endif /* CONFIG_OF_MDIO */
86
87 static int bcm87xx_config_init(struct phy_device *phydev)
88 {
89         linkmode_zero(phydev->supported);
90         linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
91                          phydev->supported);
92         linkmode_zero(phydev->advertising);
93         linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
94                          phydev->advertising);
95         phydev->state = PHY_NOLINK;
96         phydev->autoneg = AUTONEG_DISABLE;
97
98         bcm87xx_of_reg_init(phydev);
99
100         return 0;
101 }
102
103 static int bcm87xx_config_aneg(struct phy_device *phydev)
104 {
105         return -EINVAL;
106 }
107
108 static int bcm87xx_read_status(struct phy_device *phydev)
109 {
110         int rx_signal_detect;
111         int pcs_status;
112         int xgxs_lane_status;
113
114         rx_signal_detect = phy_read(phydev, BCM87XX_PMD_RX_SIGNAL_DETECT);
115         if (rx_signal_detect < 0)
116                 return rx_signal_detect;
117
118         if ((rx_signal_detect & 1) == 0)
119                 goto no_link;
120
121         pcs_status = phy_read(phydev, BCM87XX_10GBASER_PCS_STATUS);
122         if (pcs_status < 0)
123                 return pcs_status;
124
125         if ((pcs_status & 1) == 0)
126                 goto no_link;
127
128         xgxs_lane_status = phy_read(phydev, BCM87XX_XGXS_LANE_STATUS);
129         if (xgxs_lane_status < 0)
130                 return xgxs_lane_status;
131
132         if ((xgxs_lane_status & 0x1000) == 0)
133                 goto no_link;
134
135         phydev->speed = 10000;
136         phydev->link = 1;
137         phydev->duplex = 1;
138         return 0;
139
140 no_link:
141         phydev->link = 0;
142         return 0;
143 }
144
145 static int bcm87xx_config_intr(struct phy_device *phydev)
146 {
147         int reg, err;
148
149         reg = phy_read(phydev, BCM87XX_LASI_CONTROL);
150
151         if (reg < 0)
152                 return reg;
153
154         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
155                 reg |= 1;
156         else
157                 reg &= ~1;
158
159         err = phy_write(phydev, BCM87XX_LASI_CONTROL, reg);
160         return err;
161 }
162
163 static int bcm87xx_did_interrupt(struct phy_device *phydev)
164 {
165         int reg;
166
167         reg = phy_read(phydev, BCM87XX_LASI_STATUS);
168
169         if (reg < 0) {
170                 phydev_err(phydev,
171                            "Error: Read of BCM87XX_LASI_STATUS failed: %d\n",
172                            reg);
173                 return 0;
174         }
175         return (reg & 1) != 0;
176 }
177
178 static int bcm87xx_ack_interrupt(struct phy_device *phydev)
179 {
180         /* Reading the LASI status clears it. */
181         bcm87xx_did_interrupt(phydev);
182         return 0;
183 }
184
185 static int bcm8706_match_phy_device(struct phy_device *phydev)
186 {
187         return phydev->c45_ids.device_ids[4] == PHY_ID_BCM8706;
188 }
189
190 static int bcm8727_match_phy_device(struct phy_device *phydev)
191 {
192         return phydev->c45_ids.device_ids[4] == PHY_ID_BCM8727;
193 }
194
195 static struct phy_driver bcm87xx_driver[] = {
196 {
197         .phy_id         = PHY_ID_BCM8706,
198         .phy_id_mask    = 0xffffffff,
199         .name           = "Broadcom BCM8706",
200         .features       = PHY_10GBIT_FEC_FEATURES,
201         .config_init    = bcm87xx_config_init,
202         .config_aneg    = bcm87xx_config_aneg,
203         .read_status    = bcm87xx_read_status,
204         .ack_interrupt  = bcm87xx_ack_interrupt,
205         .config_intr    = bcm87xx_config_intr,
206         .did_interrupt  = bcm87xx_did_interrupt,
207         .match_phy_device = bcm8706_match_phy_device,
208 }, {
209         .phy_id         = PHY_ID_BCM8727,
210         .phy_id_mask    = 0xffffffff,
211         .name           = "Broadcom BCM8727",
212         .features       = PHY_10GBIT_FEC_FEATURES,
213         .config_init    = bcm87xx_config_init,
214         .config_aneg    = bcm87xx_config_aneg,
215         .read_status    = bcm87xx_read_status,
216         .ack_interrupt  = bcm87xx_ack_interrupt,
217         .config_intr    = bcm87xx_config_intr,
218         .did_interrupt  = bcm87xx_did_interrupt,
219         .match_phy_device = bcm8727_match_phy_device,
220 } };
221
222 module_phy_driver(bcm87xx_driver);
223
224 MODULE_LICENSE("GPL");