2 * Driver for Marvell Discovery (MV643XX) and Marvell Orion ethernet ports
3 * Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
5 * Based on the 64360 driver from:
6 * Copyright (C) 2002 rabeeh@galileo.co.il
8 * Copyright (C) 2003 PMC-Sierra, Inc.,
9 * written by Manish Lachwani
11 * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
13 * Copyright (C) 2004-2006 MontaVista Software, Inc.
14 * Dale Farnsworth <dale@farnsworth.org>
16 * Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
17 * <sjhill@realitydiluted.com>
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version 2
22 * of the License, or (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
33 #include <linux/init.h>
34 #include <linux/dma-mapping.h>
37 #include <linux/tcp.h>
38 #include <linux/udp.h>
39 #include <linux/etherdevice.h>
41 #include <linux/bitops.h>
42 #include <linux/delay.h>
43 #include <linux/ethtool.h>
44 #include <linux/platform_device.h>
47 #include <asm/types.h>
48 #include <asm/pgtable.h>
49 #include <asm/system.h>
50 #include <asm/delay.h>
51 #include "mv643xx_eth.h"
53 /* Static function declarations */
54 static void eth_port_uc_addr_get(unsigned int port_num, unsigned char *p_addr);
55 static void eth_port_uc_addr_set(unsigned int port_num, unsigned char *p_addr);
56 static void eth_port_set_multicast_list(struct net_device *);
57 static void mv643xx_eth_port_enable_tx(unsigned int port_num,
59 static void mv643xx_eth_port_enable_rx(unsigned int port_num,
61 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num);
62 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num);
63 static int mv643xx_eth_open(struct net_device *);
64 static int mv643xx_eth_stop(struct net_device *);
65 static int mv643xx_eth_change_mtu(struct net_device *, int);
66 static void eth_port_init_mac_tables(unsigned int eth_port_num);
68 static int mv643xx_poll(struct napi_struct *napi, int budget);
70 static int ethernet_phy_get(unsigned int eth_port_num);
71 static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr);
72 static int ethernet_phy_detect(unsigned int eth_port_num);
73 static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location);
74 static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val);
75 static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
76 static const struct ethtool_ops mv643xx_ethtool_ops;
78 static char mv643xx_driver_name[] = "mv643xx_eth";
79 static char mv643xx_driver_version[] = "1.0";
81 static void __iomem *mv643xx_eth_base;
83 /* used to protect MV643XX_ETH_SMI_REG, which is shared across ports */
84 static DEFINE_SPINLOCK(mv643xx_eth_phy_lock);
86 static inline u32 mv_read(int offset)
88 return readl(mv643xx_eth_base + offset);
91 static inline void mv_write(int offset, u32 data)
93 writel(data, mv643xx_eth_base + offset);
97 * Changes MTU (maximum transfer unit) of the gigabit ethenret port
99 * Input : pointer to ethernet interface network device structure
101 * Output : 0 upon success, -EINVAL upon failure
103 static int mv643xx_eth_change_mtu(struct net_device *dev, int new_mtu)
105 if ((new_mtu > 9500) || (new_mtu < 64))
110 * Stop then re-open the interface. This will allocate RX skb's with
112 * There is a possible danger that the open will not successed, due
113 * to memory is full, which might fail the open function.
115 if (netif_running(dev)) {
116 mv643xx_eth_stop(dev);
117 if (mv643xx_eth_open(dev))
119 "%s: Fatal error on opening device\n",
127 * mv643xx_eth_rx_refill_descs
129 * Fills / refills RX queue on a certain gigabit ethernet port
131 * Input : pointer to ethernet interface network device structure
134 static void mv643xx_eth_rx_refill_descs(struct net_device *dev)
136 struct mv643xx_private *mp = netdev_priv(dev);
137 struct pkt_info pkt_info;
141 while (mp->rx_desc_count < mp->rx_ring_size) {
142 skb = dev_alloc_skb(ETH_RX_SKB_SIZE + dma_get_cache_alignment());
146 unaligned = (u32)skb->data & (dma_get_cache_alignment() - 1);
148 skb_reserve(skb, dma_get_cache_alignment() - unaligned);
149 pkt_info.cmd_sts = ETH_RX_ENABLE_INTERRUPT;
150 pkt_info.byte_cnt = ETH_RX_SKB_SIZE;
151 pkt_info.buf_ptr = dma_map_single(NULL, skb->data,
152 ETH_RX_SKB_SIZE, DMA_FROM_DEVICE);
153 pkt_info.return_info = skb;
154 if (eth_rx_return_buff(mp, &pkt_info) != ETH_OK) {
156 "%s: Error allocating RX Ring\n", dev->name);
159 skb_reserve(skb, ETH_HW_IP_ALIGN);
162 * If RX ring is empty of SKB, set a timer to try allocating
163 * again at a later time.
165 if (mp->rx_desc_count == 0) {
166 printk(KERN_INFO "%s: Rx ring is empty\n", dev->name);
167 mp->timeout.expires = jiffies + (HZ / 10); /* 100 mSec */
168 add_timer(&mp->timeout);
173 * mv643xx_eth_rx_refill_descs_timer_wrapper
175 * Timer routine to wake up RX queue filling task. This function is
176 * used only in case the RX queue is empty, and all alloc_skb has
177 * failed (due to out of memory event).
179 * Input : pointer to ethernet interface network device structure
182 static inline void mv643xx_eth_rx_refill_descs_timer_wrapper(unsigned long data)
184 mv643xx_eth_rx_refill_descs((struct net_device *)data);
188 * mv643xx_eth_update_mac_address
190 * Update the MAC address of the port in the address table
192 * Input : pointer to ethernet interface network device structure
195 static void mv643xx_eth_update_mac_address(struct net_device *dev)
197 struct mv643xx_private *mp = netdev_priv(dev);
198 unsigned int port_num = mp->port_num;
200 eth_port_init_mac_tables(port_num);
201 eth_port_uc_addr_set(port_num, dev->dev_addr);
205 * mv643xx_eth_set_rx_mode
207 * Change from promiscuos to regular rx mode
209 * Input : pointer to ethernet interface network device structure
212 static void mv643xx_eth_set_rx_mode(struct net_device *dev)
214 struct mv643xx_private *mp = netdev_priv(dev);
217 config_reg = mv_read(MV643XX_ETH_PORT_CONFIG_REG(mp->port_num));
218 if (dev->flags & IFF_PROMISC)
219 config_reg |= (u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE;
221 config_reg &= ~(u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE;
222 mv_write(MV643XX_ETH_PORT_CONFIG_REG(mp->port_num), config_reg);
224 eth_port_set_multicast_list(dev);
228 * mv643xx_eth_set_mac_address
230 * Change the interface's mac address.
231 * No special hardware thing should be done because interface is always
232 * put in promiscuous mode.
234 * Input : pointer to ethernet interface network device structure and
235 * a pointer to the designated entry to be added to the cache.
236 * Output : zero upon success, negative upon failure
238 static int mv643xx_eth_set_mac_address(struct net_device *dev, void *addr)
242 for (i = 0; i < 6; i++)
243 /* +2 is for the offset of the HW addr type */
244 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
245 mv643xx_eth_update_mac_address(dev);
250 * mv643xx_eth_tx_timeout
252 * Called upon a timeout on transmitting a packet
254 * Input : pointer to ethernet interface network device structure.
257 static void mv643xx_eth_tx_timeout(struct net_device *dev)
259 struct mv643xx_private *mp = netdev_priv(dev);
261 printk(KERN_INFO "%s: TX timeout ", dev->name);
263 /* Do the reset outside of interrupt context */
264 schedule_work(&mp->tx_timeout_task);
268 * mv643xx_eth_tx_timeout_task
270 * Actual routine to reset the adapter when a timeout on Tx has occurred
272 static void mv643xx_eth_tx_timeout_task(struct work_struct *ugly)
274 struct mv643xx_private *mp = container_of(ugly, struct mv643xx_private,
276 struct net_device *dev = mp->mii.dev; /* yuck */
278 if (!netif_running(dev))
281 netif_stop_queue(dev);
283 eth_port_reset(mp->port_num);
286 if (mp->tx_ring_size - mp->tx_desc_count >= MAX_DESCS_PER_SKB)
287 netif_wake_queue(dev);
291 * mv643xx_eth_free_tx_descs - Free the tx desc data for completed descriptors
293 * If force is non-zero, frees uncompleted descriptors as well
295 int mv643xx_eth_free_tx_descs(struct net_device *dev, int force)
297 struct mv643xx_private *mp = netdev_priv(dev);
298 struct eth_tx_desc *desc;
307 while (mp->tx_desc_count > 0) {
308 spin_lock_irqsave(&mp->lock, flags);
310 /* tx_desc_count might have changed before acquiring the lock */
311 if (mp->tx_desc_count <= 0) {
312 spin_unlock_irqrestore(&mp->lock, flags);
316 tx_index = mp->tx_used_desc_q;
317 desc = &mp->p_tx_desc_area[tx_index];
318 cmd_sts = desc->cmd_sts;
320 if (!force && (cmd_sts & ETH_BUFFER_OWNED_BY_DMA)) {
321 spin_unlock_irqrestore(&mp->lock, flags);
325 mp->tx_used_desc_q = (tx_index + 1) % mp->tx_ring_size;
328 addr = desc->buf_ptr;
329 count = desc->byte_cnt;
330 skb = mp->tx_skb[tx_index];
332 mp->tx_skb[tx_index] = NULL;
334 if (cmd_sts & ETH_ERROR_SUMMARY) {
335 printk("%s: Error in TX\n", dev->name);
336 dev->stats.tx_errors++;
339 spin_unlock_irqrestore(&mp->lock, flags);
341 if (cmd_sts & ETH_TX_FIRST_DESC)
342 dma_unmap_single(NULL, addr, count, DMA_TO_DEVICE);
344 dma_unmap_page(NULL, addr, count, DMA_TO_DEVICE);
347 dev_kfree_skb_irq(skb);
355 static void mv643xx_eth_free_completed_tx_descs(struct net_device *dev)
357 struct mv643xx_private *mp = netdev_priv(dev);
359 if (mv643xx_eth_free_tx_descs(dev, 0) &&
360 mp->tx_ring_size - mp->tx_desc_count >= MAX_DESCS_PER_SKB)
361 netif_wake_queue(dev);
364 static void mv643xx_eth_free_all_tx_descs(struct net_device *dev)
366 mv643xx_eth_free_tx_descs(dev, 1);
370 * mv643xx_eth_receive
372 * This function is forward packets that are received from the port's
373 * queues toward kernel core or FastRoute them to another interface.
375 * Input : dev - a pointer to the required interface
376 * max - maximum number to receive (0 means unlimted)
378 * Output : number of served packets
380 static int mv643xx_eth_receive_queue(struct net_device *dev, int budget)
382 struct mv643xx_private *mp = netdev_priv(dev);
383 struct net_device_stats *stats = &dev->stats;
384 unsigned int received_packets = 0;
386 struct pkt_info pkt_info;
388 while (budget-- > 0 && eth_port_receive(mp, &pkt_info) == ETH_OK) {
389 dma_unmap_single(NULL, pkt_info.buf_ptr, ETH_RX_SKB_SIZE,
396 * Note byte count includes 4 byte CRC count
399 stats->rx_bytes += pkt_info.byte_cnt;
400 skb = pkt_info.return_info;
402 * In case received a packet without first / last bits on OR
403 * the error summary bit is on, the packets needs to be dropeed.
405 if (((pkt_info.cmd_sts
406 & (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) !=
407 (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC))
408 || (pkt_info.cmd_sts & ETH_ERROR_SUMMARY)) {
410 if ((pkt_info.cmd_sts & (ETH_RX_FIRST_DESC |
411 ETH_RX_LAST_DESC)) !=
412 (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) {
415 "%s: Received packet spread "
416 "on multiple descriptors\n",
419 if (pkt_info.cmd_sts & ETH_ERROR_SUMMARY)
422 dev_kfree_skb_irq(skb);
425 * The -4 is for the CRC in the trailer of the
428 skb_put(skb, pkt_info.byte_cnt - 4);
430 if (pkt_info.cmd_sts & ETH_LAYER_4_CHECKSUM_OK) {
431 skb->ip_summed = CHECKSUM_UNNECESSARY;
433 (pkt_info.cmd_sts & 0x0007fff8) >> 3);
435 skb->protocol = eth_type_trans(skb, dev);
437 netif_receive_skb(skb);
442 dev->last_rx = jiffies;
444 mv643xx_eth_rx_refill_descs(dev); /* Fill RX ring with skb's */
446 return received_packets;
449 /* Set the mv643xx port configuration register for the speed/duplex mode. */
450 static void mv643xx_eth_update_pscr(struct net_device *dev,
451 struct ethtool_cmd *ecmd)
453 struct mv643xx_private *mp = netdev_priv(dev);
454 int port_num = mp->port_num;
458 o_pscr = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
461 /* clear speed, duplex and rx buffer size fields */
462 n_pscr &= ~(MV643XX_ETH_SET_MII_SPEED_TO_100 |
463 MV643XX_ETH_SET_GMII_SPEED_TO_1000 |
464 MV643XX_ETH_SET_FULL_DUPLEX_MODE |
465 MV643XX_ETH_MAX_RX_PACKET_MASK);
467 if (ecmd->duplex == DUPLEX_FULL)
468 n_pscr |= MV643XX_ETH_SET_FULL_DUPLEX_MODE;
470 if (ecmd->speed == SPEED_1000)
471 n_pscr |= MV643XX_ETH_SET_GMII_SPEED_TO_1000 |
472 MV643XX_ETH_MAX_RX_PACKET_9700BYTE;
474 if (ecmd->speed == SPEED_100)
475 n_pscr |= MV643XX_ETH_SET_MII_SPEED_TO_100;
476 n_pscr |= MV643XX_ETH_MAX_RX_PACKET_1522BYTE;
479 if (n_pscr != o_pscr) {
480 if ((o_pscr & MV643XX_ETH_SERIAL_PORT_ENABLE) == 0)
481 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
484 queues = mv643xx_eth_port_disable_tx(port_num);
486 o_pscr &= ~MV643XX_ETH_SERIAL_PORT_ENABLE;
487 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
489 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
491 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
494 mv643xx_eth_port_enable_tx(port_num, queues);
500 * mv643xx_eth_int_handler
502 * Main interrupt handler for the gigbit ethernet ports
504 * Input : irq - irq number (not used)
505 * dev_id - a pointer to the required interface's data structure
510 static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id)
512 struct net_device *dev = (struct net_device *)dev_id;
513 struct mv643xx_private *mp = netdev_priv(dev);
514 u32 eth_int_cause, eth_int_cause_ext = 0;
515 unsigned int port_num = mp->port_num;
517 /* Read interrupt cause registers */
518 eth_int_cause = mv_read(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num)) &
520 if (eth_int_cause & ETH_INT_CAUSE_EXT) {
521 eth_int_cause_ext = mv_read(
522 MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num)) &
523 ETH_INT_UNMASK_ALL_EXT;
524 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num),
528 /* PHY status changed */
529 if (eth_int_cause_ext & (ETH_INT_CAUSE_PHY | ETH_INT_CAUSE_STATE)) {
530 struct ethtool_cmd cmd;
532 if (mii_link_ok(&mp->mii)) {
533 mii_ethtool_gset(&mp->mii, &cmd);
534 mv643xx_eth_update_pscr(dev, &cmd);
535 mv643xx_eth_port_enable_tx(port_num,
536 ETH_TX_QUEUES_ENABLED);
537 if (!netif_carrier_ok(dev)) {
538 netif_carrier_on(dev);
539 if (mp->tx_ring_size - mp->tx_desc_count >=
541 netif_wake_queue(dev);
543 } else if (netif_carrier_ok(dev)) {
544 netif_stop_queue(dev);
545 netif_carrier_off(dev);
550 if (eth_int_cause & ETH_INT_CAUSE_RX) {
551 /* schedule the NAPI poll routine to maintain port */
552 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
554 /* wait for previous write to complete */
555 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
557 netif_rx_schedule(dev, &mp->napi);
560 if (eth_int_cause & ETH_INT_CAUSE_RX)
561 mv643xx_eth_receive_queue(dev, INT_MAX);
563 if (eth_int_cause_ext & ETH_INT_CAUSE_TX)
564 mv643xx_eth_free_completed_tx_descs(dev);
567 * If no real interrupt occured, exit.
568 * This can happen when using gigE interrupt coalescing mechanism.
570 if ((eth_int_cause == 0x0) && (eth_int_cause_ext == 0x0))
579 * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
582 * This routine sets the RX coalescing interrupt mechanism parameter.
583 * This parameter is a timeout counter, that counts in 64 t_clk
584 * chunks ; that when timeout event occurs a maskable interrupt
586 * The parameter is calculated using the tClk of the MV-643xx chip
587 * , and the required delay of the interrupt in usec.
590 * unsigned int eth_port_num Ethernet port number
591 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
592 * unsigned int delay Delay in usec
595 * Interrupt coalescing mechanism value is set in MV-643xx chip.
598 * The interrupt coalescing value set in the gigE port.
601 static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num,
602 unsigned int t_clk, unsigned int delay)
604 unsigned int coal = ((t_clk / 1000000) * delay) / 64;
606 /* Set RX Coalescing mechanism */
607 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num),
608 ((coal & 0x3fff) << 8) |
609 (mv_read(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num))
617 * eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
620 * This routine sets the TX coalescing interrupt mechanism parameter.
621 * This parameter is a timeout counter, that counts in 64 t_clk
622 * chunks ; that when timeout event occurs a maskable interrupt
624 * The parameter is calculated using the t_cLK frequency of the
625 * MV-643xx chip and the required delay in the interrupt in uSec
628 * unsigned int eth_port_num Ethernet port number
629 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
630 * unsigned int delay Delay in uSeconds
633 * Interrupt coalescing mechanism value is set in MV-643xx chip.
636 * The interrupt coalescing value set in the gigE port.
639 static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num,
640 unsigned int t_clk, unsigned int delay)
643 coal = ((t_clk / 1000000) * delay) / 64;
644 /* Set TX Coalescing mechanism */
645 mv_write(MV643XX_ETH_TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num),
651 * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
654 * This function prepares a Rx chained list of descriptors and packet
655 * buffers in a form of a ring. The routine must be called after port
656 * initialization routine and before port start routine.
657 * The Ethernet SDMA engine uses CPU bus addresses to access the various
658 * devices in the system (i.e. DRAM). This function uses the ethernet
659 * struct 'virtual to physical' routine (set by the user) to set the ring
660 * with physical addresses.
663 * struct mv643xx_private *mp Ethernet Port Control srtuct.
666 * The routine updates the Ethernet port control struct with information
667 * regarding the Rx descriptors and buffers.
672 static void ether_init_rx_desc_ring(struct mv643xx_private *mp)
674 volatile struct eth_rx_desc *p_rx_desc;
675 int rx_desc_num = mp->rx_ring_size;
678 /* initialize the next_desc_ptr links in the Rx descriptors ring */
679 p_rx_desc = (struct eth_rx_desc *)mp->p_rx_desc_area;
680 for (i = 0; i < rx_desc_num; i++) {
681 p_rx_desc[i].next_desc_ptr = mp->rx_desc_dma +
682 ((i + 1) % rx_desc_num) * sizeof(struct eth_rx_desc);
685 /* Save Rx desc pointer to driver struct. */
686 mp->rx_curr_desc_q = 0;
687 mp->rx_used_desc_q = 0;
689 mp->rx_desc_area_size = rx_desc_num * sizeof(struct eth_rx_desc);
693 * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
696 * This function prepares a Tx chained list of descriptors and packet
697 * buffers in a form of a ring. The routine must be called after port
698 * initialization routine and before port start routine.
699 * The Ethernet SDMA engine uses CPU bus addresses to access the various
700 * devices in the system (i.e. DRAM). This function uses the ethernet
701 * struct 'virtual to physical' routine (set by the user) to set the ring
702 * with physical addresses.
705 * struct mv643xx_private *mp Ethernet Port Control srtuct.
708 * The routine updates the Ethernet port control struct with information
709 * regarding the Tx descriptors and buffers.
714 static void ether_init_tx_desc_ring(struct mv643xx_private *mp)
716 int tx_desc_num = mp->tx_ring_size;
717 struct eth_tx_desc *p_tx_desc;
720 /* Initialize the next_desc_ptr links in the Tx descriptors ring */
721 p_tx_desc = (struct eth_tx_desc *)mp->p_tx_desc_area;
722 for (i = 0; i < tx_desc_num; i++) {
723 p_tx_desc[i].next_desc_ptr = mp->tx_desc_dma +
724 ((i + 1) % tx_desc_num) * sizeof(struct eth_tx_desc);
727 mp->tx_curr_desc_q = 0;
728 mp->tx_used_desc_q = 0;
730 mp->tx_desc_area_size = tx_desc_num * sizeof(struct eth_tx_desc);
733 static int mv643xx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
735 struct mv643xx_private *mp = netdev_priv(dev);
738 spin_lock_irq(&mp->lock);
739 err = mii_ethtool_sset(&mp->mii, cmd);
740 spin_unlock_irq(&mp->lock);
745 static int mv643xx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
747 struct mv643xx_private *mp = netdev_priv(dev);
750 spin_lock_irq(&mp->lock);
751 err = mii_ethtool_gset(&mp->mii, cmd);
752 spin_unlock_irq(&mp->lock);
754 /* The PHY may support 1000baseT_Half, but the mv643xx does not */
755 cmd->supported &= ~SUPPORTED_1000baseT_Half;
756 cmd->advertising &= ~ADVERTISED_1000baseT_Half;
764 * This function is called when openning the network device. The function
765 * should initialize all the hardware, initialize cyclic Rx/Tx
766 * descriptors chain and buffers and allocate an IRQ to the network
769 * Input : a pointer to the network device structure
771 * Output : zero of success , nonzero if fails.
774 static int mv643xx_eth_open(struct net_device *dev)
776 struct mv643xx_private *mp = netdev_priv(dev);
777 unsigned int port_num = mp->port_num;
781 /* Clear any pending ethernet port interrupts */
782 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0);
783 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
784 /* wait for previous write to complete */
785 mv_read (MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num));
787 err = request_irq(dev->irq, mv643xx_eth_int_handler,
788 IRQF_SHARED | IRQF_SAMPLE_RANDOM, dev->name, dev);
790 printk(KERN_ERR "Can not assign IRQ number to MV643XX_eth%d\n",
797 memset(&mp->timeout, 0, sizeof(struct timer_list));
798 mp->timeout.function = mv643xx_eth_rx_refill_descs_timer_wrapper;
799 mp->timeout.data = (unsigned long)dev;
801 /* Allocate RX and TX skb rings */
802 mp->rx_skb = kmalloc(sizeof(*mp->rx_skb) * mp->rx_ring_size,
805 printk(KERN_ERR "%s: Cannot allocate Rx skb ring\n", dev->name);
809 mp->tx_skb = kmalloc(sizeof(*mp->tx_skb) * mp->tx_ring_size,
812 printk(KERN_ERR "%s: Cannot allocate Tx skb ring\n", dev->name);
814 goto out_free_rx_skb;
817 /* Allocate TX ring */
818 mp->tx_desc_count = 0;
819 size = mp->tx_ring_size * sizeof(struct eth_tx_desc);
820 mp->tx_desc_area_size = size;
822 if (mp->tx_sram_size) {
823 mp->p_tx_desc_area = ioremap(mp->tx_sram_addr,
825 mp->tx_desc_dma = mp->tx_sram_addr;
827 mp->p_tx_desc_area = dma_alloc_coherent(NULL, size,
831 if (!mp->p_tx_desc_area) {
832 printk(KERN_ERR "%s: Cannot allocate Tx Ring (size %d bytes)\n",
835 goto out_free_tx_skb;
837 BUG_ON((u32) mp->p_tx_desc_area & 0xf); /* check 16-byte alignment */
838 memset((void *)mp->p_tx_desc_area, 0, mp->tx_desc_area_size);
840 ether_init_tx_desc_ring(mp);
842 /* Allocate RX ring */
843 mp->rx_desc_count = 0;
844 size = mp->rx_ring_size * sizeof(struct eth_rx_desc);
845 mp->rx_desc_area_size = size;
847 if (mp->rx_sram_size) {
848 mp->p_rx_desc_area = ioremap(mp->rx_sram_addr,
850 mp->rx_desc_dma = mp->rx_sram_addr;
852 mp->p_rx_desc_area = dma_alloc_coherent(NULL, size,
856 if (!mp->p_rx_desc_area) {
857 printk(KERN_ERR "%s: Cannot allocate Rx ring (size %d bytes)\n",
859 printk(KERN_ERR "%s: Freeing previously allocated TX queues...",
861 if (mp->rx_sram_size)
862 iounmap(mp->p_tx_desc_area);
864 dma_free_coherent(NULL, mp->tx_desc_area_size,
865 mp->p_tx_desc_area, mp->tx_desc_dma);
867 goto out_free_tx_skb;
869 memset((void *)mp->p_rx_desc_area, 0, size);
871 ether_init_rx_desc_ring(mp);
873 mv643xx_eth_rx_refill_descs(dev); /* Fill RX ring with skb's */
876 napi_enable(&mp->napi);
881 /* Interrupt Coalescing */
885 eth_port_set_rx_coal(port_num, 133000000, MV643XX_RX_COAL);
889 eth_port_set_tx_coal(port_num, 133000000, MV643XX_TX_COAL);
891 /* Unmask phy and link status changes interrupts */
892 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num),
893 ETH_INT_UNMASK_ALL_EXT);
895 /* Unmask RX buffer and TX end interrupt */
896 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
905 free_irq(dev->irq, dev);
910 static void mv643xx_eth_free_tx_rings(struct net_device *dev)
912 struct mv643xx_private *mp = netdev_priv(dev);
915 mv643xx_eth_port_disable_tx(mp->port_num);
917 /* Free outstanding skb's on TX ring */
918 mv643xx_eth_free_all_tx_descs(dev);
920 BUG_ON(mp->tx_used_desc_q != mp->tx_curr_desc_q);
923 if (mp->tx_sram_size)
924 iounmap(mp->p_tx_desc_area);
926 dma_free_coherent(NULL, mp->tx_desc_area_size,
927 mp->p_tx_desc_area, mp->tx_desc_dma);
930 static void mv643xx_eth_free_rx_rings(struct net_device *dev)
932 struct mv643xx_private *mp = netdev_priv(dev);
933 unsigned int port_num = mp->port_num;
937 mv643xx_eth_port_disable_rx(port_num);
939 /* Free preallocated skb's on RX rings */
940 for (curr = 0; mp->rx_desc_count && curr < mp->rx_ring_size; curr++) {
941 if (mp->rx_skb[curr]) {
942 dev_kfree_skb(mp->rx_skb[curr]);
947 if (mp->rx_desc_count)
949 "%s: Error in freeing Rx Ring. %d skb's still"
950 " stuck in RX Ring - ignoring them\n", dev->name,
953 if (mp->rx_sram_size)
954 iounmap(mp->p_rx_desc_area);
956 dma_free_coherent(NULL, mp->rx_desc_area_size,
957 mp->p_rx_desc_area, mp->rx_desc_dma);
963 * This function is used when closing the network device.
964 * It updates the hardware,
965 * release all memory that holds buffers and descriptors and release the IRQ.
966 * Input : a pointer to the device structure
967 * Output : zero if success , nonzero if fails
970 static int mv643xx_eth_stop(struct net_device *dev)
972 struct mv643xx_private *mp = netdev_priv(dev);
973 unsigned int port_num = mp->port_num;
975 /* Mask all interrupts on ethernet port */
976 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL);
977 /* wait for previous write to complete */
978 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
981 napi_disable(&mp->napi);
983 netif_carrier_off(dev);
984 netif_stop_queue(dev);
986 eth_port_reset(mp->port_num);
988 mv643xx_eth_free_tx_rings(dev);
989 mv643xx_eth_free_rx_rings(dev);
991 free_irq(dev->irq, dev);
1000 * This function is used in case of NAPI
1002 static int mv643xx_poll(struct napi_struct *napi, int budget)
1004 struct mv643xx_private *mp = container_of(napi, struct mv643xx_private, napi);
1005 struct net_device *dev = mp->dev;
1006 unsigned int port_num = mp->port_num;
1009 #ifdef MV643XX_TX_FAST_REFILL
1010 if (++mp->tx_clean_threshold > 5) {
1011 mv643xx_eth_free_completed_tx_descs(dev);
1012 mp->tx_clean_threshold = 0;
1017 if ((mv_read(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num)))
1018 != (u32) mp->rx_used_desc_q)
1019 work_done = mv643xx_eth_receive_queue(dev, budget);
1021 if (work_done < budget) {
1022 netif_rx_complete(dev, napi);
1023 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0);
1024 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
1025 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num),
1026 ETH_INT_UNMASK_ALL);
1034 * has_tiny_unaligned_frags - check if skb has any small, unaligned fragments
1036 * Hardware can't handle unaligned fragments smaller than 9 bytes.
1037 * This helper function detects that case.
1040 static inline unsigned int has_tiny_unaligned_frags(struct sk_buff *skb)
1045 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
1046 fragp = &skb_shinfo(skb)->frags[frag];
1047 if (fragp->size <= 8 && fragp->page_offset & 0x7)
1054 * eth_alloc_tx_desc_index - return the index of the next available tx desc
1056 static int eth_alloc_tx_desc_index(struct mv643xx_private *mp)
1060 BUG_ON(mp->tx_desc_count >= mp->tx_ring_size);
1062 tx_desc_curr = mp->tx_curr_desc_q;
1063 mp->tx_curr_desc_q = (tx_desc_curr + 1) % mp->tx_ring_size;
1065 BUG_ON(mp->tx_curr_desc_q == mp->tx_used_desc_q);
1067 return tx_desc_curr;
1071 * eth_tx_fill_frag_descs - fill tx hw descriptors for an skb's fragments.
1073 * Ensure the data for each fragment to be transmitted is mapped properly,
1074 * then fill in descriptors in the tx hw queue.
1076 static void eth_tx_fill_frag_descs(struct mv643xx_private *mp,
1077 struct sk_buff *skb)
1081 struct eth_tx_desc *desc;
1083 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
1084 skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
1086 tx_index = eth_alloc_tx_desc_index(mp);
1087 desc = &mp->p_tx_desc_area[tx_index];
1089 desc->cmd_sts = ETH_BUFFER_OWNED_BY_DMA;
1090 /* Last Frag enables interrupt and frees the skb */
1091 if (frag == (skb_shinfo(skb)->nr_frags - 1)) {
1092 desc->cmd_sts |= ETH_ZERO_PADDING |
1094 ETH_TX_ENABLE_INTERRUPT;
1095 mp->tx_skb[tx_index] = skb;
1097 mp->tx_skb[tx_index] = NULL;
1099 desc = &mp->p_tx_desc_area[tx_index];
1101 desc->byte_cnt = this_frag->size;
1102 desc->buf_ptr = dma_map_page(NULL, this_frag->page,
1103 this_frag->page_offset,
1110 * eth_tx_submit_descs_for_skb - submit data from an skb to the tx hw
1112 * Ensure the data for an skb to be transmitted is mapped properly,
1113 * then fill in descriptors in the tx hw queue and start the hardware.
1115 static void eth_tx_submit_descs_for_skb(struct mv643xx_private *mp,
1116 struct sk_buff *skb)
1119 struct eth_tx_desc *desc;
1122 int nr_frags = skb_shinfo(skb)->nr_frags;
1124 cmd_sts = ETH_TX_FIRST_DESC | ETH_GEN_CRC | ETH_BUFFER_OWNED_BY_DMA;
1126 tx_index = eth_alloc_tx_desc_index(mp);
1127 desc = &mp->p_tx_desc_area[tx_index];
1130 eth_tx_fill_frag_descs(mp, skb);
1132 length = skb_headlen(skb);
1133 mp->tx_skb[tx_index] = NULL;
1135 cmd_sts |= ETH_ZERO_PADDING |
1137 ETH_TX_ENABLE_INTERRUPT;
1139 mp->tx_skb[tx_index] = skb;
1142 desc->byte_cnt = length;
1143 desc->buf_ptr = dma_map_single(NULL, skb->data, length, DMA_TO_DEVICE);
1145 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1146 BUG_ON(skb->protocol != ETH_P_IP);
1148 cmd_sts |= ETH_GEN_TCP_UDP_CHECKSUM |
1149 ETH_GEN_IP_V_4_CHECKSUM |
1150 ip_hdr(skb)->ihl << ETH_TX_IHL_SHIFT;
1152 switch (ip_hdr(skb)->protocol) {
1154 cmd_sts |= ETH_UDP_FRAME;
1155 desc->l4i_chk = udp_hdr(skb)->check;
1158 desc->l4i_chk = tcp_hdr(skb)->check;
1164 /* Errata BTS #50, IHL must be 5 if no HW checksum */
1165 cmd_sts |= 5 << ETH_TX_IHL_SHIFT;
1169 /* ensure all other descriptors are written before first cmd_sts */
1171 desc->cmd_sts = cmd_sts;
1173 /* ensure all descriptors are written before poking hardware */
1175 mv643xx_eth_port_enable_tx(mp->port_num, ETH_TX_QUEUES_ENABLED);
1177 mp->tx_desc_count += nr_frags + 1;
1181 * mv643xx_eth_start_xmit - queue an skb to the hardware for transmission
1184 static int mv643xx_eth_start_xmit(struct sk_buff *skb, struct net_device *dev)
1186 struct mv643xx_private *mp = netdev_priv(dev);
1187 struct net_device_stats *stats = &dev->stats;
1188 unsigned long flags;
1190 BUG_ON(netif_queue_stopped(dev));
1191 BUG_ON(skb == NULL);
1193 if (mp->tx_ring_size - mp->tx_desc_count < MAX_DESCS_PER_SKB) {
1194 printk(KERN_ERR "%s: transmit with queue full\n", dev->name);
1195 netif_stop_queue(dev);
1199 if (has_tiny_unaligned_frags(skb)) {
1200 if (__skb_linearize(skb)) {
1201 stats->tx_dropped++;
1202 printk(KERN_DEBUG "%s: failed to linearize tiny "
1203 "unaligned fragment\n", dev->name);
1208 spin_lock_irqsave(&mp->lock, flags);
1210 eth_tx_submit_descs_for_skb(mp, skb);
1211 stats->tx_bytes += skb->len;
1212 stats->tx_packets++;
1213 dev->trans_start = jiffies;
1215 if (mp->tx_ring_size - mp->tx_desc_count < MAX_DESCS_PER_SKB)
1216 netif_stop_queue(dev);
1218 spin_unlock_irqrestore(&mp->lock, flags);
1220 return 0; /* success */
1223 #ifdef CONFIG_NET_POLL_CONTROLLER
1224 static void mv643xx_netpoll(struct net_device *netdev)
1226 struct mv643xx_private *mp = netdev_priv(netdev);
1227 int port_num = mp->port_num;
1229 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL);
1230 /* wait for previous write to complete */
1231 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
1233 mv643xx_eth_int_handler(netdev->irq, netdev);
1235 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
1239 static void mv643xx_init_ethtool_cmd(struct net_device *dev, int phy_address,
1240 int speed, int duplex,
1241 struct ethtool_cmd *cmd)
1243 struct mv643xx_private *mp = netdev_priv(dev);
1245 memset(cmd, 0, sizeof(*cmd));
1247 cmd->port = PORT_MII;
1248 cmd->transceiver = XCVR_INTERNAL;
1249 cmd->phy_address = phy_address;
1252 cmd->autoneg = AUTONEG_ENABLE;
1253 /* mii lib checks, but doesn't use speed on AUTONEG_ENABLE */
1254 cmd->speed = SPEED_100;
1255 cmd->advertising = ADVERTISED_10baseT_Half |
1256 ADVERTISED_10baseT_Full |
1257 ADVERTISED_100baseT_Half |
1258 ADVERTISED_100baseT_Full;
1259 if (mp->mii.supports_gmii)
1260 cmd->advertising |= ADVERTISED_1000baseT_Full;
1262 cmd->autoneg = AUTONEG_DISABLE;
1264 cmd->duplex = duplex;
1271 * First function called after registering the network device.
1272 * It's purpose is to initialize the device as an ethernet device,
1273 * fill the ethernet device structure with pointers * to functions,
1274 * and set the MAC address of the interface
1276 * Input : struct device *
1277 * Output : -ENOMEM if failed , 0 if success
1279 static int mv643xx_eth_probe(struct platform_device *pdev)
1281 struct mv643xx_eth_platform_data *pd;
1283 struct mv643xx_private *mp;
1284 struct net_device *dev;
1286 struct resource *res;
1288 struct ethtool_cmd cmd;
1289 int duplex = DUPLEX_HALF;
1290 int speed = 0; /* default to auto-negotiation */
1291 DECLARE_MAC_BUF(mac);
1293 pd = pdev->dev.platform_data;
1295 printk(KERN_ERR "No mv643xx_eth_platform_data\n");
1299 dev = alloc_etherdev(sizeof(struct mv643xx_private));
1303 platform_set_drvdata(pdev, dev);
1305 mp = netdev_priv(dev);
1308 netif_napi_add(dev, &mp->napi, mv643xx_poll, 64);
1311 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1313 dev->irq = res->start;
1315 dev->open = mv643xx_eth_open;
1316 dev->stop = mv643xx_eth_stop;
1317 dev->hard_start_xmit = mv643xx_eth_start_xmit;
1318 dev->set_mac_address = mv643xx_eth_set_mac_address;
1319 dev->set_multicast_list = mv643xx_eth_set_rx_mode;
1321 /* No need to Tx Timeout */
1322 dev->tx_timeout = mv643xx_eth_tx_timeout;
1324 #ifdef CONFIG_NET_POLL_CONTROLLER
1325 dev->poll_controller = mv643xx_netpoll;
1328 dev->watchdog_timeo = 2 * HZ;
1330 dev->change_mtu = mv643xx_eth_change_mtu;
1331 dev->do_ioctl = mv643xx_eth_do_ioctl;
1332 SET_ETHTOOL_OPS(dev, &mv643xx_ethtool_ops);
1334 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1335 #ifdef MAX_SKB_FRAGS
1337 * Zero copy can only work if we use Discovery II memory. Else, we will
1338 * have to map the buffers to ISA memory which is only 16 MB
1340 dev->features = NETIF_F_SG | NETIF_F_IP_CSUM;
1344 /* Configure the timeout task */
1345 INIT_WORK(&mp->tx_timeout_task, mv643xx_eth_tx_timeout_task);
1347 spin_lock_init(&mp->lock);
1349 port_num = mp->port_num = pd->port_number;
1351 /* set default config values */
1352 eth_port_uc_addr_get(port_num, dev->dev_addr);
1353 mp->rx_ring_size = MV643XX_ETH_PORT_DEFAULT_RECEIVE_QUEUE_SIZE;
1354 mp->tx_ring_size = MV643XX_ETH_PORT_DEFAULT_TRANSMIT_QUEUE_SIZE;
1356 if (is_valid_ether_addr(pd->mac_addr))
1357 memcpy(dev->dev_addr, pd->mac_addr, 6);
1359 if (pd->phy_addr || pd->force_phy_addr)
1360 ethernet_phy_set(port_num, pd->phy_addr);
1362 if (pd->rx_queue_size)
1363 mp->rx_ring_size = pd->rx_queue_size;
1365 if (pd->tx_queue_size)
1366 mp->tx_ring_size = pd->tx_queue_size;
1368 if (pd->tx_sram_size) {
1369 mp->tx_sram_size = pd->tx_sram_size;
1370 mp->tx_sram_addr = pd->tx_sram_addr;
1373 if (pd->rx_sram_size) {
1374 mp->rx_sram_size = pd->rx_sram_size;
1375 mp->rx_sram_addr = pd->rx_sram_addr;
1378 duplex = pd->duplex;
1381 /* Hook up MII support for ethtool */
1383 mp->mii.mdio_read = mv643xx_mdio_read;
1384 mp->mii.mdio_write = mv643xx_mdio_write;
1385 mp->mii.phy_id = ethernet_phy_get(port_num);
1386 mp->mii.phy_id_mask = 0x3f;
1387 mp->mii.reg_num_mask = 0x1f;
1389 err = ethernet_phy_detect(port_num);
1391 pr_debug("MV643xx ethernet port %d: "
1392 "No PHY detected at addr %d\n",
1393 port_num, ethernet_phy_get(port_num));
1397 ethernet_phy_reset(port_num);
1398 mp->mii.supports_gmii = mii_check_gmii_support(&mp->mii);
1399 mv643xx_init_ethtool_cmd(dev, mp->mii.phy_id, speed, duplex, &cmd);
1400 mv643xx_eth_update_pscr(dev, &cmd);
1401 mv643xx_set_settings(dev, &cmd);
1403 SET_NETDEV_DEV(dev, &pdev->dev);
1404 err = register_netdev(dev);
1410 "%s: port %d with MAC address %s\n",
1411 dev->name, port_num, print_mac(mac, p));
1413 if (dev->features & NETIF_F_SG)
1414 printk(KERN_NOTICE "%s: Scatter Gather Enabled\n", dev->name);
1416 if (dev->features & NETIF_F_IP_CSUM)
1417 printk(KERN_NOTICE "%s: TX TCP/IP Checksumming Supported\n",
1420 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1421 printk(KERN_NOTICE "%s: RX TCP/UDP Checksum Offload ON \n", dev->name);
1425 printk(KERN_NOTICE "%s: TX and RX Interrupt Coalescing ON \n",
1430 printk(KERN_NOTICE "%s: RX NAPI Enabled \n", dev->name);
1433 if (mp->tx_sram_size > 0)
1434 printk(KERN_NOTICE "%s: Using SRAM\n", dev->name);
1444 static int mv643xx_eth_remove(struct platform_device *pdev)
1446 struct net_device *dev = platform_get_drvdata(pdev);
1448 unregister_netdev(dev);
1449 flush_scheduled_work();
1452 platform_set_drvdata(pdev, NULL);
1456 static int mv643xx_eth_shared_probe(struct platform_device *pdev)
1458 struct resource *res;
1460 printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n");
1462 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1466 mv643xx_eth_base = ioremap(res->start, res->end - res->start + 1);
1467 if (mv643xx_eth_base == NULL)
1474 static int mv643xx_eth_shared_remove(struct platform_device *pdev)
1476 iounmap(mv643xx_eth_base);
1477 mv643xx_eth_base = NULL;
1482 static void mv643xx_eth_shutdown(struct platform_device *pdev)
1484 struct net_device *dev = platform_get_drvdata(pdev);
1485 struct mv643xx_private *mp = netdev_priv(dev);
1486 unsigned int port_num = mp->port_num;
1488 /* Mask all interrupts on ethernet port */
1489 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), 0);
1490 mv_read (MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
1492 eth_port_reset(port_num);
1495 static struct platform_driver mv643xx_eth_driver = {
1496 .probe = mv643xx_eth_probe,
1497 .remove = mv643xx_eth_remove,
1498 .shutdown = mv643xx_eth_shutdown,
1500 .name = MV643XX_ETH_NAME,
1504 static struct platform_driver mv643xx_eth_shared_driver = {
1505 .probe = mv643xx_eth_shared_probe,
1506 .remove = mv643xx_eth_shared_remove,
1508 .name = MV643XX_ETH_SHARED_NAME,
1513 * mv643xx_init_module
1515 * Registers the network drivers into the Linux kernel
1521 static int __init mv643xx_init_module(void)
1525 rc = platform_driver_register(&mv643xx_eth_shared_driver);
1527 rc = platform_driver_register(&mv643xx_eth_driver);
1529 platform_driver_unregister(&mv643xx_eth_shared_driver);
1535 * mv643xx_cleanup_module
1537 * Registers the network drivers into the Linux kernel
1543 static void __exit mv643xx_cleanup_module(void)
1545 platform_driver_unregister(&mv643xx_eth_driver);
1546 platform_driver_unregister(&mv643xx_eth_shared_driver);
1549 module_init(mv643xx_init_module);
1550 module_exit(mv643xx_cleanup_module);
1552 MODULE_LICENSE("GPL");
1553 MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani"
1554 " and Dale Farnsworth");
1555 MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX");
1558 * The second part is the low level driver of the gigE ethernet ports.
1562 * Marvell's Gigabit Ethernet controller low level driver
1565 * This file introduce low level API to Marvell's Gigabit Ethernet
1566 * controller. This Gigabit Ethernet Controller driver API controls
1567 * 1) Operations (i.e. port init, start, reset etc').
1568 * 2) Data flow (i.e. port send, receive etc').
1569 * Each Gigabit Ethernet port is controlled via
1570 * struct mv643xx_private.
1571 * This struct includes user configuration information as well as
1572 * driver internal data needed for its operations.
1574 * Supported Features:
1575 * - This low level driver is OS independent. Allocating memory for
1576 * the descriptor rings and buffers are not within the scope of
1578 * - The user is free from Rx/Tx queue managing.
1579 * - This low level driver introduce functionality API that enable
1580 * the to operate Marvell's Gigabit Ethernet Controller in a
1582 * - Simple Gigabit Ethernet port operation API.
1583 * - Simple Gigabit Ethernet port data flow API.
1584 * - Data flow and operation API support per queue functionality.
1585 * - Support cached descriptors for better performance.
1586 * - Enable access to all four DRAM banks and internal SRAM memory
1588 * - PHY access and control API.
1589 * - Port control register configuration API.
1590 * - Full control over Unicast and Multicast MAC configurations.
1594 * Initialization phase
1595 * This phase complete the initialization of the the
1596 * mv643xx_private struct.
1597 * User information regarding port configuration has to be set
1598 * prior to calling the port initialization routine.
1600 * In this phase any port Tx/Rx activity is halted, MIB counters
1601 * are cleared, PHY address is set according to user parameter and
1602 * access to DRAM and internal SRAM memory spaces.
1604 * Driver ring initialization
1605 * Allocating memory for the descriptor rings and buffers is not
1606 * within the scope of this driver. Thus, the user is required to
1607 * allocate memory for the descriptors ring and buffers. Those
1608 * memory parameters are used by the Rx and Tx ring initialization
1609 * routines in order to curve the descriptor linked list in a form
1611 * Note: Pay special attention to alignment issues when using
1612 * cached descriptors/buffers. In this phase the driver store
1613 * information in the mv643xx_private struct regarding each queue
1617 * This phase prepares the Ethernet port for Rx and Tx activity.
1618 * It uses the information stored in the mv643xx_private struct to
1619 * initialize the various port registers.
1622 * All packet references to/from the driver are done using
1624 * This struct is a unified struct used with Rx and Tx operations.
1625 * This way the user is not required to be familiar with neither
1626 * Tx nor Rx descriptors structures.
1627 * The driver's descriptors rings are management by indexes.
1628 * Those indexes controls the ring resources and used to indicate
1629 * a SW resource error:
1631 * This index points to the current available resource for use. For
1632 * example in Rx process this index will point to the descriptor
1633 * that will be passed to the user upon calling the receive
1634 * routine. In Tx process, this index will point to the descriptor
1635 * that will be assigned with the user packet info and transmitted.
1637 * This index points to the descriptor that need to restore its
1638 * resources. For example in Rx process, using the Rx buffer return
1639 * API will attach the buffer returned in packet info to the
1640 * descriptor pointed by 'used'. In Tx process, using the Tx
1641 * descriptor return will merely return the user packet info with
1642 * the command status of the transmitted buffer pointed by the
1643 * 'used' index. Nevertheless, it is essential to use this routine
1644 * to update the 'used' index.
1646 * This index supports Tx Scatter-Gather. It points to the first
1647 * descriptor of a packet assembled of multiple buffers. For
1648 * example when in middle of Such packet we have a Tx resource
1649 * error the 'curr' index get the value of 'first' to indicate
1650 * that the ring returned to its state before trying to transmit
1653 * Receive operation:
1654 * The eth_port_receive API set the packet information struct,
1655 * passed by the caller, with received information from the
1656 * 'current' SDMA descriptor.
1657 * It is the user responsibility to return this resource back
1658 * to the Rx descriptor ring to enable the reuse of this source.
1659 * Return Rx resource is done using the eth_rx_return_buff API.
1661 * Prior to calling the initialization routine eth_port_init() the user
1662 * must set the following fields under mv643xx_private struct:
1663 * port_num User Ethernet port number.
1664 * port_config User port configuration value.
1665 * port_config_extend User port config extend value.
1666 * port_sdma_config User port SDMA config value.
1667 * port_serial_control User port serial control value.
1669 * This driver data flow is done using the struct pkt_info which
1670 * is a unified struct for Rx and Tx operations:
1672 * byte_cnt Tx/Rx descriptor buffer byte count.
1673 * l4i_chk CPU provided TCP Checksum. For Tx operation
1675 * cmd_sts Tx/Rx descriptor command status.
1676 * buf_ptr Tx/Rx descriptor buffer pointer.
1677 * return_info Tx/Rx user resource return information.
1681 static int ethernet_phy_get(unsigned int eth_port_num);
1682 static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr);
1684 /* Ethernet Port routines */
1685 static void eth_port_set_filter_table_entry(int table, unsigned char entry);
1688 * eth_port_init - Initialize the Ethernet port driver
1691 * This function prepares the ethernet port to start its activity:
1692 * 1) Completes the ethernet port driver struct initialization toward port
1694 * 2) Resets the device to a quiescent state in case of warm reboot.
1695 * 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
1696 * 4) Clean MAC tables. The reset status of those tables is unknown.
1697 * 5) Set PHY address.
1698 * Note: Call this routine prior to eth_port_start routine and after
1699 * setting user values in the user fields of Ethernet port control
1703 * struct mv643xx_private *mp Ethernet port control struct
1711 static void eth_port_init(struct mv643xx_private *mp)
1713 mp->rx_resource_err = 0;
1715 eth_port_reset(mp->port_num);
1717 eth_port_init_mac_tables(mp->port_num);
1721 * eth_port_start - Start the Ethernet port activity.
1724 * This routine prepares the Ethernet port for Rx and Tx activity:
1725 * 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
1726 * has been initialized a descriptor's ring (using
1727 * ether_init_tx_desc_ring for Tx and ether_init_rx_desc_ring for Rx)
1728 * 2. Initialize and enable the Ethernet configuration port by writing to
1729 * the port's configuration and command registers.
1730 * 3. Initialize and enable the SDMA by writing to the SDMA's
1731 * configuration and command registers. After completing these steps,
1732 * the ethernet port SDMA can starts to perform Rx and Tx activities.
1734 * Note: Each Rx and Tx queue descriptor's list must be initialized prior
1735 * to calling this function (use ether_init_tx_desc_ring for Tx queues
1736 * and ether_init_rx_desc_ring for Rx queues).
1739 * dev - a pointer to the required interface
1742 * Ethernet port is ready to receive and transmit.
1747 static void eth_port_start(struct net_device *dev)
1749 struct mv643xx_private *mp = netdev_priv(dev);
1750 unsigned int port_num = mp->port_num;
1751 int tx_curr_desc, rx_curr_desc;
1753 struct ethtool_cmd ethtool_cmd;
1755 /* Assignment of Tx CTRP of given queue */
1756 tx_curr_desc = mp->tx_curr_desc_q;
1757 mv_write(MV643XX_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port_num),
1758 (u32)((struct eth_tx_desc *)mp->tx_desc_dma + tx_curr_desc));
1760 /* Assignment of Rx CRDP of given queue */
1761 rx_curr_desc = mp->rx_curr_desc_q;
1762 mv_write(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num),
1763 (u32)((struct eth_rx_desc *)mp->rx_desc_dma + rx_curr_desc));
1765 /* Add the assigned Ethernet address to the port's address table */
1766 eth_port_uc_addr_set(port_num, dev->dev_addr);
1768 /* Assign port configuration and command. */
1769 mv_write(MV643XX_ETH_PORT_CONFIG_REG(port_num),
1770 MV643XX_ETH_PORT_CONFIG_DEFAULT_VALUE);
1772 mv_write(MV643XX_ETH_PORT_CONFIG_EXTEND_REG(port_num),
1773 MV643XX_ETH_PORT_CONFIG_EXTEND_DEFAULT_VALUE);
1775 pscr = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
1777 pscr &= ~(MV643XX_ETH_SERIAL_PORT_ENABLE | MV643XX_ETH_FORCE_LINK_PASS);
1778 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr);
1780 pscr |= MV643XX_ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL |
1781 MV643XX_ETH_DISABLE_AUTO_NEG_SPEED_GMII |
1782 MV643XX_ETH_DISABLE_AUTO_NEG_FOR_DUPLX |
1783 MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL |
1784 MV643XX_ETH_SERIAL_PORT_CONTROL_RESERVED;
1786 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr);
1788 pscr |= MV643XX_ETH_SERIAL_PORT_ENABLE;
1789 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr);
1791 /* Assign port SDMA configuration */
1792 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(port_num),
1793 MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE);
1795 /* Enable port Rx. */
1796 mv643xx_eth_port_enable_rx(port_num, ETH_RX_QUEUES_ENABLED);
1798 /* Disable port bandwidth limits by clearing MTU register */
1799 mv_write(MV643XX_ETH_MAXIMUM_TRANSMIT_UNIT(port_num), 0);
1801 /* save phy settings across reset */
1802 mv643xx_get_settings(dev, ðtool_cmd);
1803 ethernet_phy_reset(mp->port_num);
1804 mv643xx_set_settings(dev, ðtool_cmd);
1808 * eth_port_uc_addr_set - Write a MAC address into the port's hw registers
1810 static void eth_port_uc_addr_set(unsigned int port_num, unsigned char *p_addr)
1816 mac_l = (p_addr[4] << 8) | (p_addr[5]);
1817 mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) | (p_addr[2] << 8) |
1820 mv_write(MV643XX_ETH_MAC_ADDR_LOW(port_num), mac_l);
1821 mv_write(MV643XX_ETH_MAC_ADDR_HIGH(port_num), mac_h);
1823 /* Accept frames with this address */
1824 table = MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE(port_num);
1825 eth_port_set_filter_table_entry(table, p_addr[5] & 0x0f);
1829 * eth_port_uc_addr_get - Read the MAC address from the port's hw registers
1831 static void eth_port_uc_addr_get(unsigned int port_num, unsigned char *p_addr)
1836 mac_h = mv_read(MV643XX_ETH_MAC_ADDR_HIGH(port_num));
1837 mac_l = mv_read(MV643XX_ETH_MAC_ADDR_LOW(port_num));
1839 p_addr[0] = (mac_h >> 24) & 0xff;
1840 p_addr[1] = (mac_h >> 16) & 0xff;
1841 p_addr[2] = (mac_h >> 8) & 0xff;
1842 p_addr[3] = mac_h & 0xff;
1843 p_addr[4] = (mac_l >> 8) & 0xff;
1844 p_addr[5] = mac_l & 0xff;
1848 * The entries in each table are indexed by a hash of a packet's MAC
1849 * address. One bit in each entry determines whether the packet is
1850 * accepted. There are 4 entries (each 8 bits wide) in each register
1851 * of the table. The bits in each entry are defined as follows:
1852 * 0 Accept=1, Drop=0
1853 * 3-1 Queue (ETH_Q0=0)
1856 static void eth_port_set_filter_table_entry(int table, unsigned char entry)
1858 unsigned int table_reg;
1859 unsigned int tbl_offset;
1860 unsigned int reg_offset;
1862 tbl_offset = (entry / 4) * 4; /* Register offset of DA table entry */
1863 reg_offset = entry % 4; /* Entry offset within the register */
1865 /* Set "accepts frame bit" at specified table entry */
1866 table_reg = mv_read(table + tbl_offset);
1867 table_reg |= 0x01 << (8 * reg_offset);
1868 mv_write(table + tbl_offset, table_reg);
1872 * eth_port_mc_addr - Multicast address settings.
1874 * The MV device supports multicast using two tables:
1875 * 1) Special Multicast Table for MAC addresses of the form
1876 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_FF).
1877 * The MAC DA[7:0] bits are used as a pointer to the Special Multicast
1878 * Table entries in the DA-Filter table.
1879 * 2) Other Multicast Table for multicast of another type. A CRC-8bit
1880 * is used as an index to the Other Multicast Table entries in the
1881 * DA-Filter table. This function calculates the CRC-8bit value.
1882 * In either case, eth_port_set_filter_table_entry() is then called
1883 * to set to set the actual table entry.
1885 static void eth_port_mc_addr(unsigned int eth_port_num, unsigned char *p_addr)
1889 unsigned char crc_result = 0;
1895 if ((p_addr[0] == 0x01) && (p_addr[1] == 0x00) &&
1896 (p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00)) {
1897 table = MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
1899 eth_port_set_filter_table_entry(table, p_addr[5]);
1903 /* Calculate CRC-8 out of the given address */
1904 mac_h = (p_addr[0] << 8) | (p_addr[1]);
1905 mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
1906 (p_addr[4] << 8) | (p_addr[5] << 0);
1908 for (i = 0; i < 32; i++)
1909 mac_array[i] = (mac_l >> i) & 0x1;
1910 for (i = 32; i < 48; i++)
1911 mac_array[i] = (mac_h >> (i - 32)) & 0x1;
1913 crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^ mac_array[39] ^
1914 mac_array[35] ^ mac_array[34] ^ mac_array[31] ^ mac_array[30] ^
1915 mac_array[28] ^ mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
1916 mac_array[18] ^ mac_array[16] ^ mac_array[14] ^ mac_array[12] ^
1917 mac_array[8] ^ mac_array[7] ^ mac_array[6] ^ mac_array[0];
1919 crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^ mac_array[43] ^
1920 mac_array[41] ^ mac_array[39] ^ mac_array[36] ^ mac_array[34] ^
1921 mac_array[32] ^ mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
1922 mac_array[24] ^ mac_array[23] ^ mac_array[22] ^ mac_array[21] ^
1923 mac_array[20] ^ mac_array[18] ^ mac_array[17] ^ mac_array[16] ^
1924 mac_array[15] ^ mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
1925 mac_array[9] ^ mac_array[6] ^ mac_array[1] ^ mac_array[0];
1927 crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^ mac_array[43] ^
1928 mac_array[42] ^ mac_array[39] ^ mac_array[37] ^ mac_array[34] ^
1929 mac_array[33] ^ mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
1930 mac_array[24] ^ mac_array[22] ^ mac_array[17] ^ mac_array[15] ^
1931 mac_array[13] ^ mac_array[12] ^ mac_array[10] ^ mac_array[8] ^
1932 mac_array[6] ^ mac_array[2] ^ mac_array[1] ^ mac_array[0];
1934 crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^ mac_array[43] ^
1935 mac_array[40] ^ mac_array[38] ^ mac_array[35] ^ mac_array[34] ^
1936 mac_array[30] ^ mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
1937 mac_array[23] ^ mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
1938 mac_array[13] ^ mac_array[11] ^ mac_array[9] ^ mac_array[7] ^
1939 mac_array[3] ^ mac_array[2] ^ mac_array[1];
1941 crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^ mac_array[41] ^
1942 mac_array[39] ^ mac_array[36] ^ mac_array[35] ^ mac_array[31] ^
1943 mac_array[30] ^ mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
1944 mac_array[19] ^ mac_array[17] ^ mac_array[15] ^ mac_array[14] ^
1945 mac_array[12] ^ mac_array[10] ^ mac_array[8] ^ mac_array[4] ^
1946 mac_array[3] ^ mac_array[2];
1948 crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^ mac_array[42] ^
1949 mac_array[40] ^ mac_array[37] ^ mac_array[36] ^ mac_array[32] ^
1950 mac_array[31] ^ mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
1951 mac_array[20] ^ mac_array[18] ^ mac_array[16] ^ mac_array[15] ^
1952 mac_array[13] ^ mac_array[11] ^ mac_array[9] ^ mac_array[5] ^
1953 mac_array[4] ^ mac_array[3];
1955 crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^ mac_array[41] ^
1956 mac_array[38] ^ mac_array[37] ^ mac_array[33] ^ mac_array[32] ^
1957 mac_array[29] ^ mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
1958 mac_array[19] ^ mac_array[17] ^ mac_array[16] ^ mac_array[14] ^
1959 mac_array[12] ^ mac_array[10] ^ mac_array[6] ^ mac_array[5] ^
1962 crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^ mac_array[39] ^
1963 mac_array[38] ^ mac_array[34] ^ mac_array[33] ^ mac_array[30] ^
1964 mac_array[29] ^ mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
1965 mac_array[18] ^ mac_array[17] ^ mac_array[15] ^ mac_array[13] ^
1966 mac_array[11] ^ mac_array[7] ^ mac_array[6] ^ mac_array[5];
1968 for (i = 0; i < 8; i++)
1969 crc_result = crc_result | (crc[i] << i);
1971 table = MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num);
1972 eth_port_set_filter_table_entry(table, crc_result);
1976 * Set the entire multicast list based on dev->mc_list.
1978 static void eth_port_set_multicast_list(struct net_device *dev)
1981 struct dev_mc_list *mc_list;
1984 struct mv643xx_private *mp = netdev_priv(dev);
1985 unsigned int eth_port_num = mp->port_num;
1987 /* If the device is in promiscuous mode or in all multicast mode,
1988 * we will fully populate both multicast tables with accept.
1989 * This is guaranteed to yield a match on all multicast addresses...
1991 if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI)) {
1992 for (table_index = 0; table_index <= 0xFC; table_index += 4) {
1993 /* Set all entries in DA filter special multicast
1995 * Set for ETH_Q0 for now
1997 * 0 Accept=1, Drop=0
1998 * 3-1 Queue ETH_Q0=0
2001 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101);
2003 /* Set all entries in DA filter other multicast
2005 * Set for ETH_Q0 for now
2007 * 0 Accept=1, Drop=0
2008 * 3-1 Queue ETH_Q0=0
2011 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101);
2016 /* We will clear out multicast tables every time we get the list.
2017 * Then add the entire new list...
2019 for (table_index = 0; table_index <= 0xFC; table_index += 4) {
2020 /* Clear DA filter special multicast table (Ex_dFSMT) */
2021 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2022 (eth_port_num) + table_index, 0);
2024 /* Clear DA filter other multicast table (Ex_dFOMT) */
2025 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2026 (eth_port_num) + table_index, 0);
2029 /* Get pointer to net_device multicast list and add each one... */
2030 for (i = 0, mc_list = dev->mc_list;
2031 (i < 256) && (mc_list != NULL) && (i < dev->mc_count);
2032 i++, mc_list = mc_list->next)
2033 if (mc_list->dmi_addrlen == 6)
2034 eth_port_mc_addr(eth_port_num, mc_list->dmi_addr);
2038 * eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
2041 * Go through all the DA filter tables (Unicast, Special Multicast &
2042 * Other Multicast) and set each entry to 0.
2045 * unsigned int eth_port_num Ethernet Port number.
2048 * Multicast and Unicast packets are rejected.
2053 static void eth_port_init_mac_tables(unsigned int eth_port_num)
2057 /* Clear DA filter unicast table (Ex_dFUT) */
2058 for (table_index = 0; table_index <= 0xC; table_index += 4)
2059 mv_write(MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
2060 (eth_port_num) + table_index, 0);
2062 for (table_index = 0; table_index <= 0xFC; table_index += 4) {
2063 /* Clear DA filter special multicast table (Ex_dFSMT) */
2064 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2065 (eth_port_num) + table_index, 0);
2066 /* Clear DA filter other multicast table (Ex_dFOMT) */
2067 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2068 (eth_port_num) + table_index, 0);
2073 * eth_clear_mib_counters - Clear all MIB counters
2076 * This function clears all MIB counters of a specific ethernet port.
2077 * A read from the MIB counter will reset the counter.
2080 * unsigned int eth_port_num Ethernet Port number.
2083 * After reading all MIB counters, the counters resets.
2086 * MIB counter value.
2089 static void eth_clear_mib_counters(unsigned int eth_port_num)
2093 /* Perform dummy reads from MIB counters */
2094 for (i = ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i < ETH_MIB_LATE_COLLISION;
2096 mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(eth_port_num) + i);
2099 static inline u32 read_mib(struct mv643xx_private *mp, int offset)
2101 return mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(mp->port_num) + offset);
2104 static void eth_update_mib_counters(struct mv643xx_private *mp)
2106 struct mv643xx_mib_counters *p = &mp->mib_counters;
2109 p->good_octets_received +=
2110 read_mib(mp, ETH_MIB_GOOD_OCTETS_RECEIVED_LOW);
2111 p->good_octets_received +=
2112 (u64)read_mib(mp, ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH) << 32;
2114 for (offset = ETH_MIB_BAD_OCTETS_RECEIVED;
2115 offset <= ETH_MIB_FRAMES_1024_TO_MAX_OCTETS;
2117 *(u32 *)((char *)p + offset) += read_mib(mp, offset);
2119 p->good_octets_sent += read_mib(mp, ETH_MIB_GOOD_OCTETS_SENT_LOW);
2120 p->good_octets_sent +=
2121 (u64)read_mib(mp, ETH_MIB_GOOD_OCTETS_SENT_HIGH) << 32;
2123 for (offset = ETH_MIB_GOOD_FRAMES_SENT;
2124 offset <= ETH_MIB_LATE_COLLISION;
2126 *(u32 *)((char *)p + offset) += read_mib(mp, offset);
2130 * ethernet_phy_detect - Detect whether a phy is present
2133 * This function tests whether there is a PHY present on
2134 * the specified port.
2137 * unsigned int eth_port_num Ethernet Port number.
2144 * -ENODEV on failure
2147 static int ethernet_phy_detect(unsigned int port_num)
2149 unsigned int phy_reg_data0;
2152 eth_port_read_smi_reg(port_num, 0, &phy_reg_data0);
2153 auto_neg = phy_reg_data0 & 0x1000;
2154 phy_reg_data0 ^= 0x1000; /* invert auto_neg */
2155 eth_port_write_smi_reg(port_num, 0, phy_reg_data0);
2157 eth_port_read_smi_reg(port_num, 0, &phy_reg_data0);
2158 if ((phy_reg_data0 & 0x1000) == auto_neg)
2159 return -ENODEV; /* change didn't take */
2161 phy_reg_data0 ^= 0x1000;
2162 eth_port_write_smi_reg(port_num, 0, phy_reg_data0);
2167 * ethernet_phy_get - Get the ethernet port PHY address.
2170 * This routine returns the given ethernet port PHY address.
2173 * unsigned int eth_port_num Ethernet Port number.
2182 static int ethernet_phy_get(unsigned int eth_port_num)
2184 unsigned int reg_data;
2186 reg_data = mv_read(MV643XX_ETH_PHY_ADDR_REG);
2188 return ((reg_data >> (5 * eth_port_num)) & 0x1f);
2192 * ethernet_phy_set - Set the ethernet port PHY address.
2195 * This routine sets the given ethernet port PHY address.
2198 * unsigned int eth_port_num Ethernet Port number.
2199 * int phy_addr PHY address.
2208 static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr)
2211 int addr_shift = 5 * eth_port_num;
2213 reg_data = mv_read(MV643XX_ETH_PHY_ADDR_REG);
2214 reg_data &= ~(0x1f << addr_shift);
2215 reg_data |= (phy_addr & 0x1f) << addr_shift;
2216 mv_write(MV643XX_ETH_PHY_ADDR_REG, reg_data);
2220 * ethernet_phy_reset - Reset Ethernet port PHY.
2223 * This routine utilizes the SMI interface to reset the ethernet port PHY.
2226 * unsigned int eth_port_num Ethernet Port number.
2235 static void ethernet_phy_reset(unsigned int eth_port_num)
2237 unsigned int phy_reg_data;
2240 eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data);
2241 phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */
2242 eth_port_write_smi_reg(eth_port_num, 0, phy_reg_data);
2244 /* wait for PHY to come out of reset */
2247 eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data);
2248 } while (phy_reg_data & 0x8000);
2251 static void mv643xx_eth_port_enable_tx(unsigned int port_num,
2252 unsigned int queues)
2254 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), queues);
2257 static void mv643xx_eth_port_enable_rx(unsigned int port_num,
2258 unsigned int queues)
2260 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), queues);
2263 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num)
2267 /* Stop Tx port activity. Check port Tx activity. */
2268 queues = mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num))
2271 /* Issue stop command for active queues only */
2272 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num),
2275 /* Wait for all Tx activity to terminate. */
2276 /* Check port cause register that all Tx queues are stopped */
2277 while (mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num))
2279 udelay(PHY_WAIT_MICRO_SECONDS);
2281 /* Wait for Tx FIFO to empty */
2282 while (mv_read(MV643XX_ETH_PORT_STATUS_REG(port_num)) &
2283 ETH_PORT_TX_FIFO_EMPTY)
2284 udelay(PHY_WAIT_MICRO_SECONDS);
2290 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num)
2294 /* Stop Rx port activity. Check port Rx activity. */
2295 queues = mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num))
2298 /* Issue stop command for active queues only */
2299 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num),
2302 /* Wait for all Rx activity to terminate. */
2303 /* Check port cause register that all Rx queues are stopped */
2304 while (mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num))
2306 udelay(PHY_WAIT_MICRO_SECONDS);
2313 * eth_port_reset - Reset Ethernet port
2316 * This routine resets the chip by aborting any SDMA engine activity and
2317 * clearing the MIB counters. The Receiver and the Transmit unit are in
2318 * idle state after this command is performed and the port is disabled.
2321 * unsigned int eth_port_num Ethernet Port number.
2324 * Channel activity is halted.
2330 static void eth_port_reset(unsigned int port_num)
2332 unsigned int reg_data;
2334 mv643xx_eth_port_disable_tx(port_num);
2335 mv643xx_eth_port_disable_rx(port_num);
2337 /* Clear all MIB counters */
2338 eth_clear_mib_counters(port_num);
2340 /* Reset the Enable bit in the Configuration Register */
2341 reg_data = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
2342 reg_data &= ~(MV643XX_ETH_SERIAL_PORT_ENABLE |
2343 MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL |
2344 MV643XX_ETH_FORCE_LINK_PASS);
2345 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), reg_data);
2350 * eth_port_read_smi_reg - Read PHY registers
2353 * This routine utilize the SMI interface to interact with the PHY in
2354 * order to perform PHY register read.
2357 * unsigned int port_num Ethernet Port number.
2358 * unsigned int phy_reg PHY register address offset.
2359 * unsigned int *value Register value buffer.
2362 * Write the value of a specified PHY register into given buffer.
2365 * false if the PHY is busy or read data is not in valid state.
2369 static void eth_port_read_smi_reg(unsigned int port_num,
2370 unsigned int phy_reg, unsigned int *value)
2372 int phy_addr = ethernet_phy_get(port_num);
2373 unsigned long flags;
2376 /* the SMI register is a shared resource */
2377 spin_lock_irqsave(&mv643xx_eth_phy_lock, flags);
2379 /* wait for the SMI register to become available */
2380 for (i = 0; mv_read(MV643XX_ETH_SMI_REG) & ETH_SMI_BUSY; i++) {
2381 if (i == PHY_WAIT_ITERATIONS) {
2382 printk("mv643xx PHY busy timeout, port %d\n", port_num);
2385 udelay(PHY_WAIT_MICRO_SECONDS);
2388 mv_write(MV643XX_ETH_SMI_REG,
2389 (phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ);
2391 /* now wait for the data to be valid */
2392 for (i = 0; !(mv_read(MV643XX_ETH_SMI_REG) & ETH_SMI_READ_VALID); i++) {
2393 if (i == PHY_WAIT_ITERATIONS) {
2394 printk("mv643xx PHY read timeout, port %d\n", port_num);
2397 udelay(PHY_WAIT_MICRO_SECONDS);
2400 *value = mv_read(MV643XX_ETH_SMI_REG) & 0xffff;
2402 spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags);
2406 * eth_port_write_smi_reg - Write to PHY registers
2409 * This routine utilize the SMI interface to interact with the PHY in
2410 * order to perform writes to PHY registers.
2413 * unsigned int eth_port_num Ethernet Port number.
2414 * unsigned int phy_reg PHY register address offset.
2415 * unsigned int value Register value.
2418 * Write the given value to the specified PHY register.
2421 * false if the PHY is busy.
2425 static void eth_port_write_smi_reg(unsigned int eth_port_num,
2426 unsigned int phy_reg, unsigned int value)
2430 unsigned long flags;
2432 phy_addr = ethernet_phy_get(eth_port_num);
2434 /* the SMI register is a shared resource */
2435 spin_lock_irqsave(&mv643xx_eth_phy_lock, flags);
2437 /* wait for the SMI register to become available */
2438 for (i = 0; mv_read(MV643XX_ETH_SMI_REG) & ETH_SMI_BUSY; i++) {
2439 if (i == PHY_WAIT_ITERATIONS) {
2440 printk("mv643xx PHY busy timeout, port %d\n",
2444 udelay(PHY_WAIT_MICRO_SECONDS);
2447 mv_write(MV643XX_ETH_SMI_REG, (phy_addr << 16) | (phy_reg << 21) |
2448 ETH_SMI_OPCODE_WRITE | (value & 0xffff));
2450 spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags);
2454 * Wrappers for MII support library.
2456 static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location)
2459 struct mv643xx_private *mp = netdev_priv(dev);
2461 eth_port_read_smi_reg(mp->port_num, location, &val);
2465 static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val)
2467 struct mv643xx_private *mp = netdev_priv(dev);
2468 eth_port_write_smi_reg(mp->port_num, location, val);
2472 * eth_port_receive - Get received information from Rx ring.
2475 * This routine returns the received data to the caller. There is no
2476 * data copying during routine operation. All information is returned
2477 * using pointer to packet information struct passed from the caller.
2478 * If the routine exhausts Rx ring resources then the resource error flag
2482 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2483 * struct pkt_info *p_pkt_info User packet buffer.
2486 * Rx ring current and used indexes are updated.
2489 * ETH_ERROR in case the routine can not access Rx desc ring.
2490 * ETH_QUEUE_FULL if Rx ring resources are exhausted.
2491 * ETH_END_OF_JOB if there is no received data.
2494 static ETH_FUNC_RET_STATUS eth_port_receive(struct mv643xx_private *mp,
2495 struct pkt_info *p_pkt_info)
2497 int rx_next_curr_desc, rx_curr_desc, rx_used_desc;
2498 volatile struct eth_rx_desc *p_rx_desc;
2499 unsigned int command_status;
2500 unsigned long flags;
2502 /* Do not process Rx ring in case of Rx ring resource error */
2503 if (mp->rx_resource_err)
2504 return ETH_QUEUE_FULL;
2506 spin_lock_irqsave(&mp->lock, flags);
2508 /* Get the Rx Desc ring 'curr and 'used' indexes */
2509 rx_curr_desc = mp->rx_curr_desc_q;
2510 rx_used_desc = mp->rx_used_desc_q;
2512 p_rx_desc = &mp->p_rx_desc_area[rx_curr_desc];
2514 /* The following parameters are used to save readings from memory */
2515 command_status = p_rx_desc->cmd_sts;
2518 /* Nothing to receive... */
2519 if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
2520 spin_unlock_irqrestore(&mp->lock, flags);
2521 return ETH_END_OF_JOB;
2524 p_pkt_info->byte_cnt = (p_rx_desc->byte_cnt) - RX_BUF_OFFSET;
2525 p_pkt_info->cmd_sts = command_status;
2526 p_pkt_info->buf_ptr = (p_rx_desc->buf_ptr) + RX_BUF_OFFSET;
2527 p_pkt_info->return_info = mp->rx_skb[rx_curr_desc];
2528 p_pkt_info->l4i_chk = p_rx_desc->buf_size;
2531 * Clean the return info field to indicate that the
2532 * packet has been moved to the upper layers
2534 mp->rx_skb[rx_curr_desc] = NULL;
2536 /* Update current index in data structure */
2537 rx_next_curr_desc = (rx_curr_desc + 1) % mp->rx_ring_size;
2538 mp->rx_curr_desc_q = rx_next_curr_desc;
2540 /* Rx descriptors exhausted. Set the Rx ring resource error flag */
2541 if (rx_next_curr_desc == rx_used_desc)
2542 mp->rx_resource_err = 1;
2544 spin_unlock_irqrestore(&mp->lock, flags);
2550 * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
2553 * This routine returns a Rx buffer back to the Rx ring. It retrieves the
2554 * next 'used' descriptor and attached the returned buffer to it.
2555 * In case the Rx ring was in "resource error" condition, where there are
2556 * no available Rx resources, the function resets the resource error flag.
2559 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2560 * struct pkt_info *p_pkt_info Information on returned buffer.
2563 * New available Rx resource in Rx descriptor ring.
2566 * ETH_ERROR in case the routine can not access Rx desc ring.
2569 static ETH_FUNC_RET_STATUS eth_rx_return_buff(struct mv643xx_private *mp,
2570 struct pkt_info *p_pkt_info)
2572 int used_rx_desc; /* Where to return Rx resource */
2573 volatile struct eth_rx_desc *p_used_rx_desc;
2574 unsigned long flags;
2576 spin_lock_irqsave(&mp->lock, flags);
2578 /* Get 'used' Rx descriptor */
2579 used_rx_desc = mp->rx_used_desc_q;
2580 p_used_rx_desc = &mp->p_rx_desc_area[used_rx_desc];
2582 p_used_rx_desc->buf_ptr = p_pkt_info->buf_ptr;
2583 p_used_rx_desc->buf_size = p_pkt_info->byte_cnt;
2584 mp->rx_skb[used_rx_desc] = p_pkt_info->return_info;
2586 /* Flush the write pipe */
2588 /* Return the descriptor to DMA ownership */
2590 p_used_rx_desc->cmd_sts =
2591 ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT;
2594 /* Move the used descriptor pointer to the next descriptor */
2595 mp->rx_used_desc_q = (used_rx_desc + 1) % mp->rx_ring_size;
2597 /* Any Rx return cancels the Rx resource error status */
2598 mp->rx_resource_err = 0;
2600 spin_unlock_irqrestore(&mp->lock, flags);
2605 /************* Begin ethtool support *************************/
2607 struct mv643xx_stats {
2608 char stat_string[ETH_GSTRING_LEN];
2613 #define MV643XX_STAT(m) sizeof(((struct mv643xx_private *)0)->m), \
2614 offsetof(struct mv643xx_private, m)
2616 static const struct mv643xx_stats mv643xx_gstrings_stats[] = {
2617 { "rx_packets", MV643XX_STAT(stats.rx_packets) },
2618 { "tx_packets", MV643XX_STAT(stats.tx_packets) },
2619 { "rx_bytes", MV643XX_STAT(stats.rx_bytes) },
2620 { "tx_bytes", MV643XX_STAT(stats.tx_bytes) },
2621 { "rx_errors", MV643XX_STAT(stats.rx_errors) },
2622 { "tx_errors", MV643XX_STAT(stats.tx_errors) },
2623 { "rx_dropped", MV643XX_STAT(stats.rx_dropped) },
2624 { "tx_dropped", MV643XX_STAT(stats.tx_dropped) },
2625 { "good_octets_received", MV643XX_STAT(mib_counters.good_octets_received) },
2626 { "bad_octets_received", MV643XX_STAT(mib_counters.bad_octets_received) },
2627 { "internal_mac_transmit_err", MV643XX_STAT(mib_counters.internal_mac_transmit_err) },
2628 { "good_frames_received", MV643XX_STAT(mib_counters.good_frames_received) },
2629 { "bad_frames_received", MV643XX_STAT(mib_counters.bad_frames_received) },
2630 { "broadcast_frames_received", MV643XX_STAT(mib_counters.broadcast_frames_received) },
2631 { "multicast_frames_received", MV643XX_STAT(mib_counters.multicast_frames_received) },
2632 { "frames_64_octets", MV643XX_STAT(mib_counters.frames_64_octets) },
2633 { "frames_65_to_127_octets", MV643XX_STAT(mib_counters.frames_65_to_127_octets) },
2634 { "frames_128_to_255_octets", MV643XX_STAT(mib_counters.frames_128_to_255_octets) },
2635 { "frames_256_to_511_octets", MV643XX_STAT(mib_counters.frames_256_to_511_octets) },
2636 { "frames_512_to_1023_octets", MV643XX_STAT(mib_counters.frames_512_to_1023_octets) },
2637 { "frames_1024_to_max_octets", MV643XX_STAT(mib_counters.frames_1024_to_max_octets) },
2638 { "good_octets_sent", MV643XX_STAT(mib_counters.good_octets_sent) },
2639 { "good_frames_sent", MV643XX_STAT(mib_counters.good_frames_sent) },
2640 { "excessive_collision", MV643XX_STAT(mib_counters.excessive_collision) },
2641 { "multicast_frames_sent", MV643XX_STAT(mib_counters.multicast_frames_sent) },
2642 { "broadcast_frames_sent", MV643XX_STAT(mib_counters.broadcast_frames_sent) },
2643 { "unrec_mac_control_received", MV643XX_STAT(mib_counters.unrec_mac_control_received) },
2644 { "fc_sent", MV643XX_STAT(mib_counters.fc_sent) },
2645 { "good_fc_received", MV643XX_STAT(mib_counters.good_fc_received) },
2646 { "bad_fc_received", MV643XX_STAT(mib_counters.bad_fc_received) },
2647 { "undersize_received", MV643XX_STAT(mib_counters.undersize_received) },
2648 { "fragments_received", MV643XX_STAT(mib_counters.fragments_received) },
2649 { "oversize_received", MV643XX_STAT(mib_counters.oversize_received) },
2650 { "jabber_received", MV643XX_STAT(mib_counters.jabber_received) },
2651 { "mac_receive_error", MV643XX_STAT(mib_counters.mac_receive_error) },
2652 { "bad_crc_event", MV643XX_STAT(mib_counters.bad_crc_event) },
2653 { "collision", MV643XX_STAT(mib_counters.collision) },
2654 { "late_collision", MV643XX_STAT(mib_counters.late_collision) },
2657 #define MV643XX_STATS_LEN ARRAY_SIZE(mv643xx_gstrings_stats)
2659 static void mv643xx_get_drvinfo(struct net_device *netdev,
2660 struct ethtool_drvinfo *drvinfo)
2662 strncpy(drvinfo->driver, mv643xx_driver_name, 32);
2663 strncpy(drvinfo->version, mv643xx_driver_version, 32);
2664 strncpy(drvinfo->fw_version, "N/A", 32);
2665 strncpy(drvinfo->bus_info, "mv643xx", 32);
2666 drvinfo->n_stats = MV643XX_STATS_LEN;
2669 static int mv643xx_get_sset_count(struct net_device *netdev, int sset)
2673 return MV643XX_STATS_LEN;
2679 static void mv643xx_get_ethtool_stats(struct net_device *netdev,
2680 struct ethtool_stats *stats, uint64_t *data)
2682 struct mv643xx_private *mp = netdev->priv;
2685 eth_update_mib_counters(mp);
2687 for (i = 0; i < MV643XX_STATS_LEN; i++) {
2688 char *p = (char *)mp+mv643xx_gstrings_stats[i].stat_offset;
2689 data[i] = (mv643xx_gstrings_stats[i].sizeof_stat ==
2690 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
2694 static void mv643xx_get_strings(struct net_device *netdev, uint32_t stringset,
2701 for (i=0; i < MV643XX_STATS_LEN; i++) {
2702 memcpy(data + i * ETH_GSTRING_LEN,
2703 mv643xx_gstrings_stats[i].stat_string,
2710 static u32 mv643xx_eth_get_link(struct net_device *dev)
2712 struct mv643xx_private *mp = netdev_priv(dev);
2714 return mii_link_ok(&mp->mii);
2717 static int mv643xx_eth_nway_restart(struct net_device *dev)
2719 struct mv643xx_private *mp = netdev_priv(dev);
2721 return mii_nway_restart(&mp->mii);
2724 static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2726 struct mv643xx_private *mp = netdev_priv(dev);
2728 return generic_mii_ioctl(&mp->mii, if_mii(ifr), cmd, NULL);
2731 static const struct ethtool_ops mv643xx_ethtool_ops = {
2732 .get_settings = mv643xx_get_settings,
2733 .set_settings = mv643xx_set_settings,
2734 .get_drvinfo = mv643xx_get_drvinfo,
2735 .get_link = mv643xx_eth_get_link,
2736 .set_sg = ethtool_op_set_sg,
2737 .get_ethtool_stats = mv643xx_get_ethtool_stats,
2738 .get_strings = mv643xx_get_strings,
2739 .nway_reset = mv643xx_eth_nway_restart,
2742 /************* End ethtool support *************************/