drivers/net/irda/smsc-ircc2.c

   1 /*********************************************************************
   2  * $Id: smsc-ircc2.c,v 1.19.2.5 2002/10/27 11:34:26 dip Exp $
   3  *
   4  * Description:   Driver for the SMC Infrared Communications Controller
   5  * Status:        Experimental.
   6  * Author:        Daniele Peri (peri@csai.unipa.it)
   7  * Created at:
   8  * Modified at:
   9  * Modified by:
  10  *
  11  *     Copyright (c) 2002      Daniele Peri
  12  *     All Rights Reserved.
  13  *     Copyright (c) 2002      Jean Tourrilhes
  14  *
  15  *
  16  * Based on smc-ircc.c:
  17  *
  18  *     Copyright (c) 2001      Stefani Seibold
  19  *     Copyright (c) 1999-2001 Dag Brattli
  20  *     Copyright (c) 1998-1999 Thomas Davis,
  21  *
  22  *      and irport.c:
  23  *
  24  *     Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved.
  25  *
  26  *
  27  *     This program is free software; you can redistribute it and/or
  28  *     modify it under the terms of the GNU General Public License as
  29  *     published by the Free Software Foundation; either version 2 of
  30  *     the License, or (at your option) any later version.
  31  *
  32  *     This program is distributed in the hope that it will be useful,
  33  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  34  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  35  *     GNU General Public License for more details.
  36  *
  37  *     You should have received a copy of the GNU General Public License
  38  *     along with this program; if not, write to the Free Software
  39  *     Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  40  *     MA 02111-1307 USA
  41  *
  42  ********************************************************************/
  43
  44 #include <linux/module.h>
  45 #include <linux/kernel.h>
  46 #include <linux/types.h>
  47 #include <linux/skbuff.h>
  48 #include <linux/netdevice.h>
  49 #include <linux/ioport.h>
  50 #include <linux/delay.h>
  51 #include <linux/slab.h>
  52 #include <linux/init.h>
  53 #include <linux/rtnetlink.h>
  54 #include <linux/serial_reg.h>
  55 #include <linux/dma-mapping.h>
  56
  57 #include <asm/io.h>
  58 #include <asm/dma.h>
  59 #include <asm/byteorder.h>
  60
  61 #include <linux/spinlock.h>
  62 #include <linux/pm.h>
  63
  64 #include <net/irda/wrapper.h>
  65 #include <net/irda/irda.h>
  66 #include <net/irda/irda_device.h>
  67
  68 #include "smsc-ircc2.h"
  69 #include "smsc-sio.h"
  70
  71
  72 MODULE_AUTHOR("Daniele Peri <peri@csai.unipa.it>");
  73 MODULE_DESCRIPTION("SMC IrCC SIR/FIR controller driver");
  74 MODULE_LICENSE("GPL");
  75
  76 static int ircc_dma = 255;
  77 module_param(ircc_dma, int, 0);
  78 MODULE_PARM_DESC(ircc_dma, "DMA channel");
  79
  80 static int ircc_irq = 255;
  81 module_param(ircc_irq, int, 0);
  82 MODULE_PARM_DESC(ircc_irq, "IRQ line");
  83
  84 static int ircc_fir;
  85 module_param(ircc_fir, int, 0);
  86 MODULE_PARM_DESC(ircc_fir, "FIR Base Address");
  87
  88 static int ircc_sir;
  89 module_param(ircc_sir, int, 0);
  90 MODULE_PARM_DESC(ircc_sir, "SIR Base Address");
  91
  92 static int ircc_cfg;
  93 module_param(ircc_cfg, int, 0);
  94 MODULE_PARM_DESC(ircc_cfg, "Configuration register base address");
  95
  96 static int ircc_transceiver;
  97 module_param(ircc_transceiver, int, 0);
  98 MODULE_PARM_DESC(ircc_transceiver, "Transceiver type");
  99
 100 /* Types */
 101
 102 struct smsc_transceiver {
 103         char *name;
 104         void (*set_for_speed)(int fir_base, u32 speed);
 105         int  (*probe)(int fir_base);
 106 };
 107
 108 struct smsc_chip {
 109         char *name;
 110         #if 0
 111         u8      type;
 112         #endif
 113         u16 flags;
 114         u8 devid;
 115         u8 rev;
 116 };
 117
 118 struct smsc_chip_address {
 119         unsigned int cfg_base;
 120         unsigned int type;
 121 };
 122
 123 /* Private data for each instance */
 124 struct smsc_ircc_cb {
 125         struct net_device *netdev;     /* Yes! we are some kind of netdevice */
 126         struct net_device_stats stats;
 127         struct irlap_cb    *irlap; /* The link layer we are binded to */
 128
 129         chipio_t io;               /* IrDA controller information */
 130         iobuff_t tx_buff;          /* Transmit buffer */
 131         iobuff_t rx_buff;          /* Receive buffer */
 132         dma_addr_t tx_buff_dma;
 133         dma_addr_t rx_buff_dma;
 134
 135         struct qos_info qos;       /* QoS capabilities for this device */
 136
 137         spinlock_t lock;           /* For serializing operations */
 138
 139         __u32 new_speed;
 140         __u32 flags;               /* Interface flags */
 141
 142         int tx_buff_offsets[10];   /* Offsets between frames in tx_buff */
 143         int tx_len;                /* Number of frames in tx_buff */
 144
 145         int transceiver;
 146         struct platform_device *pldev;
 147 };
 148
 149 /* Constants */
 150
 151 #define SMSC_IRCC2_DRIVER_NAME                  "smsc-ircc2"
 152
 153 #define SMSC_IRCC2_C_IRDA_FALLBACK_SPEED        9600
 154 #define SMSC_IRCC2_C_DEFAULT_TRANSCEIVER        1
 155 #define SMSC_IRCC2_C_NET_TIMEOUT                0
 156 #define SMSC_IRCC2_C_SIR_STOP                   0
 157
 158 static const char *driver_name = SMSC_IRCC2_DRIVER_NAME;
 159
 160 /* Prototypes */
 161
 162 static int smsc_ircc_open(unsigned int firbase, unsigned int sirbase, u8 dma, u8 irq);
 163 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base);
 164 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq);
 165 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self);
 166 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self);
 167 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self);
 168 static int  smsc_ircc_dma_receive(struct smsc_ircc_cb *self);
 169 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self);
 170 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self);
 171 static int  smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
 172 static int  smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
 173 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs);
 174 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self);
 175 static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed);
 176 static void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, u32 speed);
 177 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
 178 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev);
 179 static void smsc_ircc_sir_start(struct smsc_ircc_cb *self);
 180 #if SMSC_IRCC2_C_SIR_STOP
 181 static void smsc_ircc_sir_stop(struct smsc_ircc_cb *self);
 182 #endif
 183 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self);
 184 static int  smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
 185 static int  smsc_ircc_net_open(struct net_device *dev);
 186 static int  smsc_ircc_net_close(struct net_device *dev);
 187 static int  smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 188 #if SMSC_IRCC2_C_NET_TIMEOUT
 189 static void smsc_ircc_timeout(struct net_device *dev);
 190 #endif
 191 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev);
 192 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self);
 193 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self);
 194 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed);
 195 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self);
 196
 197 /* Probing */
 198 static int __init smsc_ircc_look_for_chips(void);
 199 static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type);
 200 static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
 201 static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
 202 static int __init smsc_superio_fdc(unsigned short cfg_base);
 203 static int __init smsc_superio_lpc(unsigned short cfg_base);
 204
 205 /* Transceivers specific functions */
 206
 207 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed);
 208 static int  smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base);
 209 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed);
 210 static int  smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base);
 211 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed);
 212 static int  smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base);
 213
 214 /* Power Management */
 215
 216 static int smsc_ircc_suspend(struct device *dev, pm_message_t state, u32 level);
 217 static int smsc_ircc_resume(struct device *dev, u32 level);
 218
 219 static struct device_driver smsc_ircc_driver = {
 220         .name           = SMSC_IRCC2_DRIVER_NAME,
 221         .bus            = &platform_bus_type,
 222         .suspend        = smsc_ircc_suspend,
 223         .resume         = smsc_ircc_resume,
 224 };
 225
 226 /* Transceivers for SMSC-ircc */
 227
 228 static struct smsc_transceiver smsc_transceivers[] =
 229 {
 230         { "Toshiba Satellite 1800 (GP data pin select)", smsc_ircc_set_transceiver_toshiba_sat1800, smsc_ircc_probe_transceiver_toshiba_sat1800 },
 231         { "Fast pin select", smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select, smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select },
 232         { "ATC IRMode", smsc_ircc_set_transceiver_smsc_ircc_atc, smsc_ircc_probe_transceiver_smsc_ircc_atc },
 233         { NULL, NULL }
 234 };
 235 #define SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS (ARRAY_SIZE(smsc_transceivers) - 1)
 236
 237 /*  SMC SuperIO chipsets definitions */
 238
 239 #define KEY55_1 0       /* SuperIO Configuration mode with Key <0x55> */
 240 #define KEY55_2 1       /* SuperIO Configuration mode with Key <0x55,0x55> */
 241 #define NoIRDA  2       /* SuperIO Chip has no IRDA Port */
 242 #define SIR     0       /* SuperIO Chip has only slow IRDA */
 243 #define FIR     4       /* SuperIO Chip has fast IRDA */
 244 #define SERx4   8       /* SuperIO Chip supports 115,2 KBaud * 4=460,8 KBaud */
 245
 246 static struct smsc_chip __initdata fdc_chips_flat[] =
 247 {
 248         /* Base address 0x3f0 or 0x370 */
 249         { "37C44",      KEY55_1|NoIRDA,         0x00, 0x00 }, /* This chip cannot be detected */
 250         { "37C665GT",   KEY55_2|NoIRDA,         0x65, 0x01 },
 251         { "37C665GT",   KEY55_2|NoIRDA,         0x66, 0x01 },
 252         { "37C669",     KEY55_2|SIR|SERx4,      0x03, 0x02 },
 253         { "37C669",     KEY55_2|SIR|SERx4,      0x04, 0x02 }, /* ID? */
 254         { "37C78",      KEY55_2|NoIRDA,         0x78, 0x00 },
 255         { "37N769",     KEY55_1|FIR|SERx4,      0x28, 0x00 },
 256         { "37N869",     KEY55_1|FIR|SERx4,      0x29, 0x00 },
 257         { NULL }
 258 };
 259
 260 static struct smsc_chip __initdata fdc_chips_paged[] =
 261 {
 262         /* Base address 0x3f0 or 0x370 */
 263         { "37B72X",     KEY55_1|SIR|SERx4,      0x4c, 0x00 },
 264         { "37B77X",     KEY55_1|SIR|SERx4,      0x43, 0x00 },
 265         { "37B78X",     KEY55_1|SIR|SERx4,      0x44, 0x00 },
 266         { "37B80X",     KEY55_1|SIR|SERx4,      0x42, 0x00 },
 267         { "37C67X",     KEY55_1|FIR|SERx4,      0x40, 0x00 },
 268         { "37C93X",     KEY55_2|SIR|SERx4,      0x02, 0x01 },
 269         { "37C93XAPM",  KEY55_1|SIR|SERx4,      0x30, 0x01 },
 270         { "37C93XFR",   KEY55_2|FIR|SERx4,      0x03, 0x01 },
 271         { "37M707",     KEY55_1|SIR|SERx4,      0x42, 0x00 },
 272         { "37M81X",     KEY55_1|SIR|SERx4,      0x4d, 0x00 },
 273         { "37N958FR",   KEY55_1|FIR|SERx4,      0x09, 0x04 },
 274         { "37N971",     KEY55_1|FIR|SERx4,      0x0a, 0x00 },
 275         { "37N972",     KEY55_1|FIR|SERx4,      0x0b, 0x00 },
 276         { NULL }
 277 };
 278
 279 static struct smsc_chip __initdata lpc_chips_flat[] =
 280 {
 281         /* Base address 0x2E or 0x4E */
 282         { "47N227",     KEY55_1|FIR|SERx4,      0x5a, 0x00 },
 283         { "47N267",     KEY55_1|FIR|SERx4,      0x5e, 0x00 },
 284         { NULL }
 285 };
 286
 287 static struct smsc_chip __initdata lpc_chips_paged[] =
 288 {
 289         /* Base address 0x2E or 0x4E */
 290         { "47B27X",     KEY55_1|SIR|SERx4,      0x51, 0x00 },
 291         { "47B37X",     KEY55_1|SIR|SERx4,      0x52, 0x00 },
 292         { "47M10X",     KEY55_1|SIR|SERx4,      0x59, 0x00 },
 293         { "47M120",     KEY55_1|NoIRDA|SERx4,   0x5c, 0x00 },
 294         { "47M13X",     KEY55_1|SIR|SERx4,      0x59, 0x00 },
 295         { "47M14X",     KEY55_1|SIR|SERx4,      0x5f, 0x00 },
 296         { "47N252",     KEY55_1|FIR|SERx4,      0x0e, 0x00 },
 297         { "47S42X",     KEY55_1|SIR|SERx4,      0x57, 0x00 },
 298         { NULL }
 299 };
 300
 301 #define SMSCSIO_TYPE_FDC        1
 302 #define SMSCSIO_TYPE_LPC        2
 303 #define SMSCSIO_TYPE_FLAT       4
 304 #define SMSCSIO_TYPE_PAGED      8
 305
 306 static struct smsc_chip_address __initdata possible_addresses[] =
 307 {
 308         { 0x3f0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 309         { 0x370, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 310         { 0xe0,  SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 311         { 0x2e,  SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 312         { 0x4e,  SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 313         { 0, 0 }
 314 };
 315
 316 /* Globals */
 317
 318 static struct smsc_ircc_cb *dev_self[] = { NULL, NULL };
 319 static unsigned short dev_count;
 320
 321 static inline void register_bank(int iobase, int bank)
 322 {
 323         outb(((inb(iobase + IRCC_MASTER) & 0xf0) | (bank & 0x07)),
 324                iobase + IRCC_MASTER);
 325 }
 326
 327
 328 /*******************************************************************************
 329  *
 330  *
 331  * SMSC-ircc stuff
 332  *
 333  *
 334  *******************************************************************************/
 335
 336 /*
 337  * Function smsc_ircc_init ()
 338  *
 339  *    Initialize chip. Just try to find out how many chips we are dealing with
 340  *    and where they are
 341  */
 342 static int __init smsc_ircc_init(void)
 343 {
 344         int ret;
 345
 346         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 347
 348         ret = driver_register(&smsc_ircc_driver);
 349         if (ret) {
 350                 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
 351                 return ret;
 352         }
 353
 354         dev_count = 0;
 355
 356         if (ircc_fir > 0 && ircc_sir > 0) {
 357                 IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir);
 358                 IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir);
 359
 360                 if (smsc_ircc_open(ircc_fir, ircc_sir, ircc_dma, ircc_irq))
 361                         ret = -ENODEV;
 362         } else {
 363
 364                 /* try user provided configuration register base address */
 365                 if (ircc_cfg > 0) {
 366                         IRDA_MESSAGE(" Overriding configuration address "
 367                                      "0x%04x\n", ircc_cfg);
 368                         if (!smsc_superio_fdc(ircc_cfg))
 369                                 ret = 0;
 370                         if (!smsc_superio_lpc(ircc_cfg))
 371                                 ret = 0;
 372                 }
 373
 374                 if (smsc_ircc_look_for_chips() > 0)
 375                         ret = 0;
 376         }
 377
 378         if (ret)
 379                 driver_unregister(&smsc_ircc_driver);
 380
 381         return ret;
 382 }
 383
 384 /*
 385  * Function smsc_ircc_open (firbase, sirbase, dma, irq)
 386  *
 387  *    Try to open driver instance
 388  *
 389  */
 390 static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq)
 391 {
 392         struct smsc_ircc_cb *self;
 393         struct net_device *dev;
 394         int err;
 395
 396         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 397
 398         err = smsc_ircc_present(fir_base, sir_base);
 399         if (err)
 400                 goto err_out;
 401
 402         err = -ENOMEM;
 403         if (dev_count >= ARRAY_SIZE(dev_self)) {
 404                 IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__);
 405                 goto err_out1;
 406         }
 407
 408         /*
 409          *  Allocate new instance of the driver
 410          */
 411         dev = alloc_irdadev(sizeof(struct smsc_ircc_cb));
 412         if (!dev) {
 413                 IRDA_WARNING("%s() can't allocate net device\n", __FUNCTION__);
 414                 goto err_out1;
 415         }
 416
 417         SET_MODULE_OWNER(dev);
 418
 419         dev->hard_start_xmit = smsc_ircc_hard_xmit_sir;
 420 #if SMSC_IRCC2_C_NET_TIMEOUT
 421         dev->tx_timeout      = smsc_ircc_timeout;
 422         dev->watchdog_timeo  = HZ * 2;  /* Allow enough time for speed change */
 423 #endif
 424         dev->open            = smsc_ircc_net_open;
 425         dev->stop            = smsc_ircc_net_close;
 426         dev->do_ioctl        = smsc_ircc_net_ioctl;
 427         dev->get_stats       = smsc_ircc_net_get_stats;
 428
 429         self = netdev_priv(dev);
 430         self->netdev = dev;
 431
 432         /* Make ifconfig display some details */
 433         dev->base_addr = self->io.fir_base = fir_base;
 434         dev->irq = self->io.irq = irq;
 435
 436         /* Need to store self somewhere */
 437         dev_self[dev_count] = self;
 438         spin_lock_init(&self->lock);
 439
 440         self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE;
 441         self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE;
 442
 443         self->rx_buff.head =
 444                 dma_alloc_coherent(NULL, self->rx_buff.truesize,
 445                                    &self->rx_buff_dma, GFP_KERNEL);
 446         if (self->rx_buff.head == NULL) {
 447                 IRDA_ERROR("%s, Can't allocate memory for receive buffer!\n",
 448                            driver_name);
 449                 goto err_out2;
 450         }
 451
 452         self->tx_buff.head =
 453                 dma_alloc_coherent(NULL, self->tx_buff.truesize,
 454                                    &self->tx_buff_dma, GFP_KERNEL);
 455         if (self->tx_buff.head == NULL) {
 456                 IRDA_ERROR("%s, Can't allocate memory for transmit buffer!\n",
 457                            driver_name);
 458                 goto err_out3;
 459         }
 460
 461         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
 462         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
 463
 464         self->rx_buff.in_frame = FALSE;
 465         self->rx_buff.state = OUTSIDE_FRAME;
 466         self->tx_buff.data = self->tx_buff.head;
 467         self->rx_buff.data = self->rx_buff.head;
 468
 469         smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
 470         smsc_ircc_setup_qos(self);
 471         smsc_ircc_init_chip(self);
 472
 473         if (ircc_transceiver > 0  &&
 474             ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS)
 475                 self->transceiver = ircc_transceiver;
 476         else
 477                 smsc_ircc_probe_transceiver(self);
 478
 479         err = register_netdev(self->netdev);
 480         if (err) {
 481                 IRDA_ERROR("%s, Network device registration failed!\n",
 482                            driver_name);
 483                 goto err_out4;
 484         }
 485
 486         self->pldev = platform_device_register_simple(SMSC_IRCC2_DRIVER_NAME,
 487                                                       dev_count, NULL, 0);
 488         if (IS_ERR(self->pldev)) {
 489                 err = PTR_ERR(self->pldev);
 490                 goto err_out5;
 491         }
 492         dev_set_drvdata(&self->pldev->dev, self);
 493
 494         IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
 495         dev_count++;
 496
 497         return 0;
 498
 499  err_out5:
 500         unregister_netdev(self->netdev);
 501
 502  err_out4:
 503         dma_free_coherent(NULL, self->tx_buff.truesize,
 504                           self->tx_buff.head, self->tx_buff_dma);
 505  err_out3:
 506         dma_free_coherent(NULL, self->rx_buff.truesize,
 507                           self->rx_buff.head, self->rx_buff_dma);
 508  err_out2:
 509         free_netdev(self->netdev);
 510         dev_self[dev_count] = NULL;
 511  err_out1:
 512         release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
 513         release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
 514  err_out:
 515         return err;
 516 }
 517
 518 /*
 519  * Function smsc_ircc_present(fir_base, sir_base)
 520  *
 521  *    Check the smsc-ircc chip presence
 522  *
 523  */
 524 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
 525 {
 526         unsigned char low, high, chip, config, dma, irq, version;
 527
 528         if (!request_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT,
 529                             driver_name)) {
 530                 IRDA_WARNING("%s: can't get fir_base of 0x%03x\n",
 531                              __FUNCTION__, fir_base);
 532                 goto out1;
 533         }
 534
 535         if (!request_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT,
 536                             driver_name)) {
 537                 IRDA_WARNING("%s: can't get sir_base of 0x%03x\n",
 538                              __FUNCTION__, sir_base);
 539                 goto out2;
 540         }
 541
 542         register_bank(fir_base, 3);
 543
 544         high    = inb(fir_base + IRCC_ID_HIGH);
 545         low     = inb(fir_base + IRCC_ID_LOW);
 546         chip    = inb(fir_base + IRCC_CHIP_ID);
 547         version = inb(fir_base + IRCC_VERSION);
 548         config  = inb(fir_base + IRCC_INTERFACE);
 549         dma     = config & IRCC_INTERFACE_DMA_MASK;
 550         irq     = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
 551
 552         if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
 553                 IRDA_WARNING("%s(), addr 0x%04x - no device found!\n",
 554                              __FUNCTION__, fir_base);
 555                 goto out3;
 556         }
 557         IRDA_MESSAGE("SMsC IrDA Controller found\n IrCC version %d.%d, "
 558                      "firport 0x%03x, sirport 0x%03x dma=%d, irq=%d\n",
 559                      chip & 0x0f, version, fir_base, sir_base, dma, irq);
 560
 561         return 0;
 562
 563  out3:
 564         release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
 565  out2:
 566         release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
 567  out1:
 568         return -ENODEV;
 569 }
 570
 571 /*
 572  * Function smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq)
 573  *
 574  *    Setup I/O
 575  *
 576  */
 577 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
 578                                unsigned int fir_base, unsigned int sir_base,
 579                                u8 dma, u8 irq)
 580 {
 581         unsigned char config, chip_dma, chip_irq;
 582
 583         register_bank(fir_base, 3);
 584         config = inb(fir_base + IRCC_INTERFACE);
 585         chip_dma = config & IRCC_INTERFACE_DMA_MASK;
 586         chip_irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
 587
 588         self->io.fir_base  = fir_base;
 589         self->io.sir_base  = sir_base;
 590         self->io.fir_ext   = SMSC_IRCC2_FIR_CHIP_IO_EXTENT;
 591         self->io.sir_ext   = SMSC_IRCC2_SIR_CHIP_IO_EXTENT;
 592         self->io.fifo_size = SMSC_IRCC2_FIFO_SIZE;
 593         self->io.speed = SMSC_IRCC2_C_IRDA_FALLBACK_SPEED;
 594
 595         if (irq < 255) {
 596                 if (irq != chip_irq)
 597                         IRDA_MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n",
 598                                      driver_name, chip_irq, irq);
 599                 self->io.irq = irq;
 600         } else
 601                 self->io.irq = chip_irq;
 602
 603         if (dma < 255) {
 604                 if (dma != chip_dma)
 605                         IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
 606                                      driver_name, chip_dma, dma);
 607                 self->io.dma = dma;
 608         } else
 609                 self->io.dma = chip_dma;
 610
 611 }
 612
 613 /*
 614  * Function smsc_ircc_setup_qos(self)
 615  *
 616  *    Setup qos
 617  *
 618  */
 619 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self)
 620 {
 621         /* Initialize QoS for this device */
 622         irda_init_max_qos_capabilies(&self->qos);
 623
 624         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 625                 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
 626
 627         self->qos.min_turn_time.bits = SMSC_IRCC2_MIN_TURN_TIME;
 628         self->qos.window_size.bits = SMSC_IRCC2_WINDOW_SIZE;
 629         irda_qos_bits_to_value(&self->qos);
 630 }
 631
 632 /*
 633  * Function smsc_ircc_init_chip(self)
 634  *
 635  *    Init chip
 636  *
 637  */
 638 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self)
 639 {
 640         int iobase, ir_mode, ctrl, fast;
 641
 642         IRDA_ASSERT(self != NULL, return;);
 643
 644         iobase = self->io.fir_base;
 645         ir_mode = IRCC_CFGA_IRDA_SIR_A;
 646         ctrl = 0;
 647         fast = 0;
 648
 649         register_bank(iobase, 0);
 650         outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
 651         outb(0x00, iobase + IRCC_MASTER);
 652
 653         register_bank(iobase, 1);
 654         outb(((inb(iobase + IRCC_SCE_CFGA) & 0x87) | ir_mode),
 655              iobase + IRCC_SCE_CFGA);
 656
 657 #ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */
 658         outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
 659              iobase + IRCC_SCE_CFGB);
 660 #else
 661         outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
 662              iobase + IRCC_SCE_CFGB);
 663 #endif
 664         (void) inb(iobase + IRCC_FIFO_THRESHOLD);
 665         outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase + IRCC_FIFO_THRESHOLD);
 666
 667         register_bank(iobase, 4);
 668         outb((inb(iobase + IRCC_CONTROL) & 0x30) | ctrl, iobase + IRCC_CONTROL);
 669
 670         register_bank(iobase, 0);
 671         outb(fast, iobase + IRCC_LCR_A);
 672
 673         smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
 674
 675         /* Power on device */
 676         outb(0x00, iobase + IRCC_MASTER);
 677 }
 678
 679 /*
 680  * Function smsc_ircc_net_ioctl (dev, rq, cmd)
 681  *
 682  *    Process IOCTL commands for this device
 683  *
 684  */
 685 static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 686 {
 687         struct if_irda_req *irq = (struct if_irda_req *) rq;
 688         struct smsc_ircc_cb *self;
 689         unsigned long flags;
 690         int ret = 0;
 691
 692         IRDA_ASSERT(dev != NULL, return -1;);
 693
 694         self = netdev_priv(dev);
 695
 696         IRDA_ASSERT(self != NULL, return -1;);
 697
 698         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
 699
 700         switch (cmd) {
 701         case SIOCSBANDWIDTH: /* Set bandwidth */
 702                 if (!capable(CAP_NET_ADMIN))
 703                         ret = -EPERM;
 704                 else {
 705                         /* Make sure we are the only one touching
 706                          * self->io.speed and the hardware - Jean II */
 707                         spin_lock_irqsave(&self->lock, flags);
 708                         smsc_ircc_change_speed(self, irq->ifr_baudrate);
 709                         spin_unlock_irqrestore(&self->lock, flags);
 710                 }
 711                 break;
 712         case SIOCSMEDIABUSY: /* Set media busy */
 713                 if (!capable(CAP_NET_ADMIN)) {
 714                         ret = -EPERM;
 715                         break;
 716                 }
 717
 718                 irda_device_set_media_busy(self->netdev, TRUE);
 719                 break;
 720         case SIOCGRECEIVING: /* Check if we are receiving right now */
 721                 irq->ifr_receiving = smsc_ircc_is_receiving(self);
 722                 break;
 723         #if 0
 724         case SIOCSDTRRTS:
 725                 if (!capable(CAP_NET_ADMIN)) {
 726                         ret = -EPERM;
 727                         break;
 728                 }
 729                 smsc_ircc_sir_set_dtr_rts(dev, irq->ifr_dtr, irq->ifr_rts);
 730                 break;
 731         #endif
 732         default:
 733                 ret = -EOPNOTSUPP;
 734         }
 735
 736         return ret;
 737 }
 738
 739 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev)
 740 {
 741         struct smsc_ircc_cb *self = netdev_priv(dev);
 742
 743         return &self->stats;
 744 }
 745
 746 #if SMSC_IRCC2_C_NET_TIMEOUT
 747 /*
 748  * Function smsc_ircc_timeout (struct net_device *dev)
 749  *
 750  *    The networking timeout management.
 751  *
 752  */
 753
 754 static void smsc_ircc_timeout(struct net_device *dev)
 755 {
 756         struct smsc_ircc_cb *self = netdev_priv(dev);
 757         unsigned long flags;
 758
 759         IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n",
 760                      dev->name, self->io.speed);
 761         spin_lock_irqsave(&self->lock, flags);
 762         smsc_ircc_sir_start(self);
 763         smsc_ircc_change_speed(self, self->io.speed);
 764         dev->trans_start = jiffies;
 765         netif_wake_queue(dev);
 766         spin_unlock_irqrestore(&self->lock, flags);
 767 }
 768 #endif
 769
 770 /*
 771  * Function smsc_ircc_hard_xmit_sir (struct sk_buff *skb, struct net_device *dev)
 772  *
 773  *    Transmits the current frame until FIFO is full, then
 774  *    waits until the next transmit interrupt, and continues until the
 775  *    frame is transmitted.
 776  */
 777 int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
 778 {
 779         struct smsc_ircc_cb *self;
 780         unsigned long flags;
 781         s32 speed;
 782
 783         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 784
 785         IRDA_ASSERT(dev != NULL, return 0;);
 786
 787         self = netdev_priv(dev);
 788         IRDA_ASSERT(self != NULL, return 0;);
 789
 790         netif_stop_queue(dev);
 791
 792         /* Make sure test of self->io.speed & speed change are atomic */
 793         spin_lock_irqsave(&self->lock, flags);
 794
 795         /* Check if we need to change the speed */
 796         speed = irda_get_next_speed(skb);
 797         if (speed != self->io.speed && speed != -1) {
 798                 /* Check for empty frame */
 799                 if (!skb->len) {
 800                         /*
 801                          * We send frames one by one in SIR mode (no
 802                          * pipelining), so at this point, if we were sending
 803                          * a previous frame, we just received the interrupt
 804                          * telling us it is finished (UART_IIR_THRI).
 805                          * Therefore, waiting for the transmitter to really
 806                          * finish draining the fifo won't take too long.
 807                          * And the interrupt handler is not expected to run.
 808                          * - Jean II */
 809                         smsc_ircc_sir_wait_hw_transmitter_finish(self);
 810                         smsc_ircc_change_speed(self, speed);
 811                         spin_unlock_irqrestore(&self->lock, flags);
 812                         dev_kfree_skb(skb);
 813                         return 0;
 814                 }
 815                 self->new_speed = speed;
 816         }
 817
 818         /* Init tx buffer */
 819         self->tx_buff.data = self->tx_buff.head;
 820
 821         /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
 822         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
 823                                            self->tx_buff.truesize);
 824
 825         self->stats.tx_bytes += self->tx_buff.len;
 826
 827         /* Turn on transmit finished interrupt. Will fire immediately!  */
 828         outb(UART_IER_THRI, self->io.sir_base + UART_IER);
 829
 830         spin_unlock_irqrestore(&self->lock, flags);
 831
 832         dev_kfree_skb(skb);
 833
 834         return 0;
 835 }
 836
 837 /*
 838  * Function smsc_ircc_set_fir_speed (self, baud)
 839  *
 840  *    Change the speed of the device
 841  *
 842  */
 843 static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed)
 844 {
 845         int fir_base, ir_mode, ctrl, fast;
 846
 847         IRDA_ASSERT(self != NULL, return;);
 848         fir_base = self->io.fir_base;
 849
 850         self->io.speed = speed;
 851
 852         switch (speed) {
 853         default:
 854         case 576000:
 855                 ir_mode = IRCC_CFGA_IRDA_HDLC;
 856                 ctrl = IRCC_CRC;
 857                 fast = 0;
 858                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
 859                 break;
 860         case 1152000:
 861                 ir_mode = IRCC_CFGA_IRDA_HDLC;
 862                 ctrl = IRCC_1152 | IRCC_CRC;
 863                 fast = IRCC_LCR_A_FAST | IRCC_LCR_A_GP_DATA;
 864                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n",
 865                            __FUNCTION__);
 866                 break;
 867         case 4000000:
 868                 ir_mode = IRCC_CFGA_IRDA_4PPM;
 869                 ctrl = IRCC_CRC;
 870                 fast = IRCC_LCR_A_FAST;
 871                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n",
 872                            __FUNCTION__);
 873                 break;
 874         }
 875         #if 0
 876         Now in tranceiver!
 877         /* This causes an interrupt */
 878         register_bank(fir_base, 0);
 879         outb((inb(fir_base + IRCC_LCR_A) &  0xbf) | fast, fir_base + IRCC_LCR_A);
 880         #endif
 881
 882         register_bank(fir_base, 1);
 883         outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base + IRCC_SCE_CFGA);
 884
 885         register_bank(fir_base, 4);
 886         outb((inb(fir_base + IRCC_CONTROL) & 0x30) | ctrl, fir_base + IRCC_CONTROL);
 887 }
 888
 889 /*
 890  * Function smsc_ircc_fir_start(self)
 891  *
 892  *    Change the speed of the device
 893  *
 894  */
 895 static void smsc_ircc_fir_start(struct smsc_ircc_cb *self)
 896 {
 897         struct net_device *dev;
 898         int fir_base;
 899
 900         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 901
 902         IRDA_ASSERT(self != NULL, return;);
 903         dev = self->netdev;
 904         IRDA_ASSERT(dev != NULL, return;);
 905
 906         fir_base = self->io.fir_base;
 907
 908         /* Reset everything */
 909
 910         /* Install FIR transmit handler */
 911         dev->hard_start_xmit = smsc_ircc_hard_xmit_fir;
 912
 913         /* Clear FIFO */
 914         outb(inb(fir_base + IRCC_LCR_A) | IRCC_LCR_A_FIFO_RESET, fir_base + IRCC_LCR_A);
 915
 916         /* Enable interrupt */
 917         /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base + IRCC_IER);*/
 918
 919         register_bank(fir_base, 1);
 920
 921         /* Select the TX/RX interface */
 922 #ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */
 923         outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
 924              fir_base + IRCC_SCE_CFGB);
 925 #else
 926         outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
 927              fir_base + IRCC_SCE_CFGB);
 928 #endif
 929         (void) inb(fir_base + IRCC_FIFO_THRESHOLD);
 930
 931         /* Enable SCE interrupts */
 932         outb(0, fir_base + IRCC_MASTER);
 933         register_bank(fir_base, 0);
 934         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, fir_base + IRCC_IER);
 935         outb(IRCC_MASTER_INT_EN, fir_base + IRCC_MASTER);
 936 }
 937
 938 /*
 939  * Function smsc_ircc_fir_stop(self, baud)
 940  *
 941  *    Change the speed of the device
 942  *
 943  */
 944 static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self)
 945 {
 946         int fir_base;
 947
 948         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 949
 950         IRDA_ASSERT(self != NULL, return;);
 951
 952         fir_base = self->io.fir_base;
 953         register_bank(fir_base, 0);
 954         /*outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);*/
 955         outb(inb(fir_base + IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base + IRCC_LCR_B);
 956 }
 957
 958
 959 /*
 960  * Function smsc_ircc_change_speed(self, baud)
 961  *
 962  *    Change the speed of the device
 963  *
 964  * This function *must* be called with spinlock held, because it may
 965  * be called from the irq handler. - Jean II
 966  */
 967 static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed)
 968 {
 969         struct net_device *dev;
 970         int last_speed_was_sir;
 971
 972         IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed);
 973
 974         IRDA_ASSERT(self != NULL, return;);
 975         dev = self->netdev;
 976
 977         last_speed_was_sir = self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED;
 978
 979         #if 0
 980         /* Temp Hack */
 981         speed= 1152000;
 982         self->io.speed = speed;
 983         last_speed_was_sir = 0;
 984         smsc_ircc_fir_start(self);
 985         #endif
 986
 987         if (self->io.speed == 0)
 988                 smsc_ircc_sir_start(self);
 989
 990         #if 0
 991         if (!last_speed_was_sir) speed = self->io.speed;
 992         #endif
 993
 994         if (self->io.speed != speed)
 995                 smsc_ircc_set_transceiver_for_speed(self, speed);
 996
 997         self->io.speed = speed;
 998
 999         if (speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
1000                 if (!last_speed_was_sir) {
1001                         smsc_ircc_fir_stop(self);
1002                         smsc_ircc_sir_start(self);
1003                 }
1004                 smsc_ircc_set_sir_speed(self, speed);
1005         } else {
1006                 if (last_speed_was_sir) {
1007                         #if SMSC_IRCC2_C_SIR_STOP
1008                         smsc_ircc_sir_stop(self);
1009                         #endif
1010                         smsc_ircc_fir_start(self);
1011                 }
1012                 smsc_ircc_set_fir_speed(self, speed);
1013
1014                 #if 0
1015                 self->tx_buff.len = 10;
1016                 self->tx_buff.data = self->tx_buff.head;
1017
1018                 smsc_ircc_dma_xmit(self, 4000);
1019                 #endif
1020                 /* Be ready for incoming frames */
1021                 smsc_ircc_dma_receive(self);
1022         }
1023
1024         netif_wake_queue(dev);
1025 }
1026
1027 /*
1028  * Function smsc_ircc_set_sir_speed (self, speed)
1029  *
1030  *    Set speed of IrDA port to specified baudrate
1031  *
1032  */
1033 void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, __u32 speed)
1034 {
1035         int iobase;
1036         int fcr;    /* FIFO control reg */
1037         int lcr;    /* Line control reg */
1038         int divisor;
1039
1040         IRDA_DEBUG(0, "%s(), Setting speed to: %d\n", __FUNCTION__, speed);
1041
1042         IRDA_ASSERT(self != NULL, return;);
1043         iobase = self->io.sir_base;
1044
1045         /* Update accounting for new speed */
1046         self->io.speed = speed;
1047
1048         /* Turn off interrupts */
1049         outb(0, iobase + UART_IER);
1050
1051         divisor = SMSC_IRCC2_MAX_SIR_SPEED / speed;
1052
1053         fcr = UART_FCR_ENABLE_FIFO;
1054
1055         /*
1056          * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1057          * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1058          * about this timeout since it will always be fast enough.
1059          */
1060         fcr |= self->io.speed < 38400 ?
1061                 UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1062
1063         /* IrDA ports use 8N1 */
1064         lcr = UART_LCR_WLEN8;
1065
1066         outb(UART_LCR_DLAB | lcr, iobase + UART_LCR); /* Set DLAB */
1067         outb(divisor & 0xff,      iobase + UART_DLL); /* Set speed */
1068         outb(divisor >> 8,        iobase + UART_DLM);
1069         outb(lcr,                 iobase + UART_LCR); /* Set 8N1 */
1070         outb(fcr,                 iobase + UART_FCR); /* Enable FIFO's */
1071
1072         /* Turn on interrups */
1073         outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER);
1074
1075         IRDA_DEBUG(2, "%s() speed changed to: %d\n", __FUNCTION__, speed);
1076 }
1077
1078
1079 /*
1080  * Function smsc_ircc_hard_xmit_fir (skb, dev)
1081  *
1082  *    Transmit the frame!
1083  *
1084  */
1085 static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1086 {
1087         struct smsc_ircc_cb *self;
1088         unsigned long flags;
1089         s32 speed;
1090         int mtt;
1091
1092         IRDA_ASSERT(dev != NULL, return 0;);
1093         self = netdev_priv(dev);
1094         IRDA_ASSERT(self != NULL, return 0;);
1095
1096         netif_stop_queue(dev);
1097
1098         /* Make sure test of self->io.speed & speed change are atomic */
1099         spin_lock_irqsave(&self->lock, flags);
1100
1101         /* Check if we need to change the speed after this frame */
1102         speed = irda_get_next_speed(skb);
1103         if (speed != self->io.speed && speed != -1) {
1104                 /* Check for empty frame */
1105                 if (!skb->len) {
1106                         /* Note : you should make sure that speed changes
1107                          * are not going to corrupt any outgoing frame.
1108                          * Look at nsc-ircc for the gory details - Jean II */
1109                         smsc_ircc_change_speed(self, speed);
1110                         spin_unlock_irqrestore(&self->lock, flags);
1111                         dev_kfree_skb(skb);
1112                         return 0;
1113                 }
1114
1115                 self->new_speed = speed;
1116         }
1117
1118         memcpy(self->tx_buff.head, skb->data, skb->len);
1119
1120         self->tx_buff.len = skb->len;
1121         self->tx_buff.data = self->tx_buff.head;
1122
1123         mtt = irda_get_mtt(skb);
1124         if (mtt) {
1125                 int bofs;
1126
1127                 /*
1128                  * Compute how many BOFs (STA or PA's) we need to waste the
1129                  * min turn time given the speed of the link.
1130                  */
1131                 bofs = mtt * (self->io.speed / 1000) / 8000;
1132                 if (bofs > 4095)
1133                         bofs = 4095;
1134
1135                 smsc_ircc_dma_xmit(self, bofs);
1136         } else {
1137                 /* Transmit frame */
1138                 smsc_ircc_dma_xmit(self, 0);
1139         }
1140
1141         spin_unlock_irqrestore(&self->lock, flags);
1142         dev_kfree_skb(skb);
1143
1144         return 0;
1145 }
1146
1147 /*
1148  * Function smsc_ircc_dma_xmit (self, bofs)
1149  *
1150  *    Transmit data using DMA
1151  *
1152  */
1153 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs)
1154 {
1155         int iobase = self->io.fir_base;
1156         u8 ctrl;
1157
1158         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1159 #if 1
1160         /* Disable Rx */
1161         register_bank(iobase, 0);
1162         outb(0x00, iobase + IRCC_LCR_B);
1163 #endif
1164         register_bank(iobase, 1);
1165         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1166              iobase + IRCC_SCE_CFGB);
1167
1168         self->io.direction = IO_XMIT;
1169
1170         /* Set BOF additional count for generating the min turn time */
1171         register_bank(iobase, 4);
1172         outb(bofs & 0xff, iobase + IRCC_BOF_COUNT_LO);
1173         ctrl = inb(iobase + IRCC_CONTROL) & 0xf0;
1174         outb(ctrl | ((bofs >> 8) & 0x0f), iobase + IRCC_BOF_COUNT_HI);
1175
1176         /* Set max Tx frame size */
1177         outb(self->tx_buff.len >> 8, iobase + IRCC_TX_SIZE_HI);
1178         outb(self->tx_buff.len & 0xff, iobase + IRCC_TX_SIZE_LO);
1179
1180         /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/
1181
1182         /* Enable burst mode chip Tx DMA */
1183         register_bank(iobase, 1);
1184         outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1185              IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1186
1187         /* Setup DMA controller (must be done after enabling chip DMA) */
1188         irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
1189                        DMA_TX_MODE);
1190
1191         /* Enable interrupt */
1192
1193         register_bank(iobase, 0);
1194         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1195         outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1196
1197         /* Enable transmit */
1198         outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase + IRCC_LCR_B);
1199 }
1200
1201 /*
1202  * Function smsc_ircc_dma_xmit_complete (self)
1203  *
1204  *    The transfer of a frame in finished. This function will only be called
1205  *    by the interrupt handler
1206  *
1207  */
1208 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self)
1209 {
1210         int iobase = self->io.fir_base;
1211
1212         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1213 #if 0
1214         /* Disable Tx */
1215         register_bank(iobase, 0);
1216         outb(0x00, iobase + IRCC_LCR_B);
1217 #endif
1218         register_bank(iobase, 1);
1219         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1220              iobase + IRCC_SCE_CFGB);
1221
1222         /* Check for underrun! */
1223         register_bank(iobase, 0);
1224         if (inb(iobase + IRCC_LSR) & IRCC_LSR_UNDERRUN) {
1225                 self->stats.tx_errors++;
1226                 self->stats.tx_fifo_errors++;
1227
1228                 /* Reset error condition */
1229                 register_bank(iobase, 0);
1230                 outb(IRCC_MASTER_ERROR_RESET, iobase + IRCC_MASTER);
1231                 outb(0x00, iobase + IRCC_MASTER);
1232         } else {
1233                 self->stats.tx_packets++;
1234                 self->stats.tx_bytes += self->tx_buff.len;
1235         }
1236
1237         /* Check if it's time to change the speed */
1238         if (self->new_speed) {
1239                 smsc_ircc_change_speed(self, self->new_speed);
1240                 self->new_speed = 0;
1241         }
1242
1243         netif_wake_queue(self->netdev);
1244 }
1245
1246 /*
1247  * Function smsc_ircc_dma_receive(self)
1248  *
1249  *    Get ready for receiving a frame. The device will initiate a DMA
1250  *    if it starts to receive a frame.
1251  *
1252  */
1253 static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self)
1254 {
1255         int iobase = self->io.fir_base;
1256 #if 0
1257         /* Turn off chip DMA */
1258         register_bank(iobase, 1);
1259         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1260              iobase + IRCC_SCE_CFGB);
1261 #endif
1262
1263         /* Disable Tx */
1264         register_bank(iobase, 0);
1265         outb(0x00, iobase + IRCC_LCR_B);
1266
1267         /* Turn off chip DMA */
1268         register_bank(iobase, 1);
1269         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1270              iobase + IRCC_SCE_CFGB);
1271
1272         self->io.direction = IO_RECV;
1273         self->rx_buff.data = self->rx_buff.head;
1274
1275         /* Set max Rx frame size */
1276         register_bank(iobase, 4);
1277         outb((2050 >> 8) & 0x0f, iobase + IRCC_RX_SIZE_HI);
1278         outb(2050 & 0xff, iobase + IRCC_RX_SIZE_LO);
1279
1280         /* Setup DMA controller */
1281         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1282                        DMA_RX_MODE);
1283
1284         /* Enable burst mode chip Rx DMA */
1285         register_bank(iobase, 1);
1286         outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1287              IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1288
1289         /* Enable interrupt */
1290         register_bank(iobase, 0);
1291         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1292         outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1293
1294         /* Enable receiver */
1295         register_bank(iobase, 0);
1296         outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
1297              iobase + IRCC_LCR_B);
1298
1299         return 0;
1300 }
1301
1302 /*
1303  * Function smsc_ircc_dma_receive_complete(self)
1304  *
1305  *    Finished with receiving frames
1306  *
1307  */
1308 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self)
1309 {
1310         struct sk_buff *skb;
1311         int len, msgcnt, lsr;
1312         int iobase = self->io.fir_base;
1313
1314         register_bank(iobase, 0);
1315
1316         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1317 #if 0
1318         /* Disable Rx */
1319         register_bank(iobase, 0);
1320         outb(0x00, iobase + IRCC_LCR_B);
1321 #endif
1322         register_bank(iobase, 0);
1323         outb(inb(iobase + IRCC_LSAR) & ~IRCC_LSAR_ADDRESS_MASK, iobase + IRCC_LSAR);
1324         lsr= inb(iobase + IRCC_LSR);
1325         msgcnt = inb(iobase + IRCC_LCR_B) & 0x08;
1326
1327         IRDA_DEBUG(2, "%s: dma count = %d\n", __FUNCTION__,
1328                    get_dma_residue(self->io.dma));
1329
1330         len = self->rx_buff.truesize - get_dma_residue(self->io.dma);
1331
1332         /* Look for errors */
1333         if (lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) {
1334                 self->stats.rx_errors++;
1335                 if (lsr & IRCC_LSR_FRAME_ERROR)
1336                         self->stats.rx_frame_errors++;
1337                 if (lsr & IRCC_LSR_CRC_ERROR)
1338                         self->stats.rx_crc_errors++;
1339                 if (lsr & IRCC_LSR_SIZE_ERROR)
1340                         self->stats.rx_length_errors++;
1341                 if (lsr & (IRCC_LSR_UNDERRUN | IRCC_LSR_OVERRUN))
1342                         self->stats.rx_length_errors++;
1343                 return;
1344         }
1345
1346         /* Remove CRC */
1347         len -= self->io.speed < 4000000 ? 2 : 4;
1348
1349         if (len < 2 || len > 2050) {
1350                 IRDA_WARNING("%s(), bogus len=%d\n", __FUNCTION__, len);
1351                 return;
1352         }
1353         IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __FUNCTION__, msgcnt, len);
1354
1355         skb = dev_alloc_skb(len + 1);
1356         if (!skb) {
1357                 IRDA_WARNING("%s(), memory squeeze, dropping frame.\n",
1358                              __FUNCTION__);
1359                 return;
1360         }
1361         /* Make sure IP header gets aligned */
1362         skb_reserve(skb, 1);
1363
1364         memcpy(skb_put(skb, len), self->rx_buff.data, len);
1365         self->stats.rx_packets++;
1366         self->stats.rx_bytes += len;
1367
1368         skb->dev = self->netdev;
1369         skb->mac.raw  = skb->data;
1370         skb->protocol = htons(ETH_P_IRDA);
1371         netif_rx(skb);
1372 }
1373
1374 /*
1375  * Function smsc_ircc_sir_receive (self)
1376  *
1377  *    Receive one frame from the infrared port
1378  *
1379  */
1380 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1381 {
1382         int boguscount = 0;
1383         int iobase;
1384
1385         IRDA_ASSERT(self != NULL, return;);
1386
1387         iobase = self->io.sir_base;
1388
1389         /*
1390          * Receive all characters in Rx FIFO, unwrap and unstuff them.
1391          * async_unwrap_char will deliver all found frames
1392          */
1393         do {
1394                 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1395                                   inb(iobase + UART_RX));
1396
1397                 /* Make sure we don't stay here to long */
1398                 if (boguscount++ > 32) {
1399                         IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__);
1400                         break;
1401                 }
1402         } while (inb(iobase + UART_LSR) & UART_LSR_DR);
1403 }
1404
1405
1406 /*
1407  * Function smsc_ircc_interrupt (irq, dev_id, regs)
1408  *
1409  *    An interrupt from the chip has arrived. Time to do some work
1410  *
1411  */
1412 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1413 {
1414         struct net_device *dev = (struct net_device *) dev_id;
1415         struct smsc_ircc_cb *self;
1416         int iobase, iir, lcra, lsr;
1417         irqreturn_t ret = IRQ_NONE;
1418
1419         if (dev == NULL) {
1420                 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1421                        driver_name, irq);
1422                 goto irq_ret;
1423         }
1424
1425         self = netdev_priv(dev);
1426         IRDA_ASSERT(self != NULL, return IRQ_NONE;);
1427
1428         /* Serialise the interrupt handler in various CPUs, stop Tx path */
1429         spin_lock(&self->lock);
1430
1431         /* Check if we should use the SIR interrupt handler */
1432         if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
1433                 ret = smsc_ircc_interrupt_sir(dev);
1434                 goto irq_ret_unlock;
1435         }
1436
1437         iobase = self->io.fir_base;
1438
1439         register_bank(iobase, 0);
1440         iir = inb(iobase + IRCC_IIR);
1441         if (iir == 0)
1442                 goto irq_ret_unlock;
1443         ret = IRQ_HANDLED;
1444
1445         /* Disable interrupts */
1446         outb(0, iobase + IRCC_IER);
1447         lcra = inb(iobase + IRCC_LCR_A);
1448         lsr = inb(iobase + IRCC_LSR);
1449
1450         IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir);
1451
1452         if (iir & IRCC_IIR_EOM) {
1453                 if (self->io.direction == IO_RECV)
1454                         smsc_ircc_dma_receive_complete(self);
1455                 else
1456                         smsc_ircc_dma_xmit_complete(self);
1457
1458                 smsc_ircc_dma_receive(self);
1459         }
1460
1461         if (iir & IRCC_IIR_ACTIVE_FRAME) {
1462                 /*printk(KERN_WARNING "%s(): Active Frame\n", __FUNCTION__);*/
1463         }
1464
1465         /* Enable interrupts again */
1466
1467         register_bank(iobase, 0);
1468         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1469
1470  irq_ret_unlock:
1471         spin_unlock(&self->lock);
1472  irq_ret:
1473         return ret;
1474 }
1475
1476 /*
1477  * Function irport_interrupt_sir (irq, dev_id, regs)
1478  *
1479  *    Interrupt handler for SIR modes
1480  */
1481 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1482 {
1483         struct smsc_ircc_cb *self = netdev_priv(dev);
1484         int boguscount = 0;
1485         int iobase;
1486         int iir, lsr;
1487
1488         /* Already locked comming here in smsc_ircc_interrupt() */
1489         /*spin_lock(&self->lock);*/
1490
1491         iobase = self->io.sir_base;
1492
1493         iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1494         if (iir == 0)
1495                 return IRQ_NONE;
1496         while (iir) {
1497                 /* Clear interrupt */
1498                 lsr = inb(iobase + UART_LSR);
1499
1500                 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
1501                             __FUNCTION__, iir, lsr, iobase);
1502
1503                 switch (iir) {
1504                 case UART_IIR_RLSI:
1505                         IRDA_DEBUG(2, "%s(), RLSI\n", __FUNCTION__);
1506                         break;
1507                 case UART_IIR_RDI:
1508                         /* Receive interrupt */
1509                         smsc_ircc_sir_receive(self);
1510                         break;
1511                 case UART_IIR_THRI:
1512                         if (lsr & UART_LSR_THRE)
1513                                 /* Transmitter ready for data */
1514                                 smsc_ircc_sir_write_wakeup(self);
1515                         break;
1516                 default:
1517                         IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n",
1518                                    __FUNCTION__, iir);
1519                         break;
1520                 }
1521
1522                 /* Make sure we don't stay here to long */
1523                 if (boguscount++ > 100)
1524                         break;
1525
1526                 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1527         }
1528         /*spin_unlock(&self->lock);*/
1529         return IRQ_HANDLED;
1530 }
1531
1532
1533 #if 0 /* unused */
1534 /*
1535  * Function ircc_is_receiving (self)
1536  *
1537  *    Return TRUE is we are currently receiving a frame
1538  *
1539  */
1540 static int ircc_is_receiving(struct smsc_ircc_cb *self)
1541 {
1542         int status = FALSE;
1543         /* int iobase; */
1544
1545         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1546
1547         IRDA_ASSERT(self != NULL, return FALSE;);
1548
1549         IRDA_DEBUG(0, "%s: dma count = %d\n", __FUNCTION__,
1550                    get_dma_residue(self->io.dma));
1551
1552         status = (self->rx_buff.state != OUTSIDE_FRAME);
1553
1554         return status;
1555 }
1556 #endif /* unused */
1557
1558
1559 /*
1560  * Function smsc_ircc_net_open (dev)
1561  *
1562  *    Start the device
1563  *
1564  */
1565 static int smsc_ircc_net_open(struct net_device *dev)
1566 {
1567         struct smsc_ircc_cb *self;
1568         char hwname[16];
1569         unsigned long flags;
1570
1571         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1572
1573         IRDA_ASSERT(dev != NULL, return -1;);
1574         self = netdev_priv(dev);
1575         IRDA_ASSERT(self != NULL, return 0;);
1576
1577         if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name,
1578                         (void *) dev)) {
1579                 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n",
1580                            __FUNCTION__, self->io.irq);
1581                 return -EAGAIN;
1582         }
1583
1584         spin_lock_irqsave(&self->lock, flags);
1585         /*smsc_ircc_sir_start(self);*/
1586         self->io.speed = 0;
1587         smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
1588         spin_unlock_irqrestore(&self->lock, flags);
1589
1590         /* Give self a hardware name */
1591         /* It would be cool to offer the chip revision here - Jean II */
1592         sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
1593
1594         /*
1595          * Open new IrLAP layer instance, now that everything should be
1596          * initialized properly
1597          */
1598         self->irlap = irlap_open(dev, &self->qos, hwname);
1599
1600         /*
1601          * Always allocate the DMA channel after the IRQ,
1602          * and clean up on failure.
1603          */
1604         if (request_dma(self->io.dma, dev->name)) {
1605                 smsc_ircc_net_close(dev);
1606
1607                 IRDA_WARNING("%s(), unable to allocate DMA=%d\n",
1608                              __FUNCTION__, self->io.dma);
1609                 return -EAGAIN;
1610         }
1611
1612         netif_start_queue(dev);
1613
1614         return 0;
1615 }
1616
1617 /*
1618  * Function smsc_ircc_net_close (dev)
1619  *
1620  *    Stop the device
1621  *
1622  */
1623 static int smsc_ircc_net_close(struct net_device *dev)
1624 {
1625         struct smsc_ircc_cb *self;
1626
1627         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1628
1629         IRDA_ASSERT(dev != NULL, return -1;);
1630         self = netdev_priv(dev);
1631         IRDA_ASSERT(self != NULL, return 0;);
1632
1633         /* Stop device */
1634         netif_stop_queue(dev);
1635
1636         /* Stop and remove instance of IrLAP */
1637         if (self->irlap)
1638                 irlap_close(self->irlap);
1639         self->irlap = NULL;
1640
1641         free_irq(self->io.irq, dev);
1642         disable_dma(self->io.dma);
1643         free_dma(self->io.dma);
1644
1645         return 0;
1646 }
1647
1648 static int smsc_ircc_suspend(struct device *dev, pm_message_t state, u32 level)
1649 {
1650         struct smsc_ircc_cb *self = dev_get_drvdata(dev);
1651
1652         IRDA_MESSAGE("%s, Suspending\n", driver_name);
1653
1654         if (level == SUSPEND_DISABLE && !self->io.suspended) {
1655                 smsc_ircc_net_close(self->netdev);
1656                 self->io.suspended = 1;
1657         }
1658
1659         return 0;
1660 }
1661
1662 static int smsc_ircc_resume(struct device *dev, u32 level)
1663 {
1664         struct smsc_ircc_cb *self = dev_get_drvdata(dev);
1665
1666         if (level == RESUME_ENABLE && self->io.suspended) {
1667
1668                 smsc_ircc_net_open(self->netdev);
1669                 self->io.suspended = 0;
1670
1671                 IRDA_MESSAGE("%s, Waking up\n", driver_name);
1672         }
1673         return 0;
1674 }
1675
1676 /*
1677  * Function smsc_ircc_close (self)
1678  *
1679  *    Close driver instance
1680  *
1681  */
1682 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1683 {
1684         int iobase;
1685         unsigned long flags;
1686
1687         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1688
1689         IRDA_ASSERT(self != NULL, return -1;);
1690
1691         platform_device_unregister(self->pldev);
1692
1693         /* Remove netdevice */
1694         unregister_netdev(self->netdev);
1695
1696         /* Make sure the irq handler is not exectuting */
1697         spin_lock_irqsave(&self->lock, flags);
1698
1699         /* Stop interrupts */
1700         iobase = self->io.fir_base;
1701         register_bank(iobase, 0);
1702         outb(0, iobase + IRCC_IER);
1703         outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
1704         outb(0x00, iobase + IRCC_MASTER);
1705 #if 0
1706         /* Reset to SIR mode */
1707         register_bank(iobase, 1);
1708         outb(IRCC_CFGA_IRDA_SIR_A|IRCC_CFGA_TX_POLARITY, iobase + IRCC_SCE_CFGA);
1709         outb(IRCC_CFGB_IR, iobase + IRCC_SCE_CFGB);
1710 #endif
1711         spin_unlock_irqrestore(&self->lock, flags);
1712
1713         /* Release the PORTS that this driver is using */
1714         IRDA_DEBUG(0, "%s(), releasing 0x%03x\n",  __FUNCTION__,
1715                    self->io.fir_base);
1716
1717         release_region(self->io.fir_base, self->io.fir_ext);
1718
1719         IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
1720                    self->io.sir_base);
1721
1722         release_region(self->io.sir_base, self->io.sir_ext);
1723
1724         if (self->tx_buff.head)
1725                 dma_free_coherent(NULL, self->tx_buff.truesize,
1726                                   self->tx_buff.head, self->tx_buff_dma);
1727
1728         if (self->rx_buff.head)
1729                 dma_free_coherent(NULL, self->rx_buff.truesize,
1730                                   self->rx_buff.head, self->rx_buff_dma);
1731
1732         free_netdev(self->netdev);
1733
1734         return 0;
1735 }
1736
1737 static void __exit smsc_ircc_cleanup(void)
1738 {
1739         int i;
1740
1741         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1742
1743         for (i = 0; i < 2; i++) {
1744                 if (dev_self[i])
1745                         smsc_ircc_close(dev_self[i]);
1746         }
1747
1748         driver_unregister(&smsc_ircc_driver);
1749 }
1750
1751 /*
1752  *      Start SIR operations
1753  *
1754  * This function *must* be called with spinlock held, because it may
1755  * be called from the irq handler (via smsc_ircc_change_speed()). - Jean II
1756  */
1757 void smsc_ircc_sir_start(struct smsc_ircc_cb *self)
1758 {
1759         struct net_device *dev;
1760         int fir_base, sir_base;
1761
1762         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1763
1764         IRDA_ASSERT(self != NULL, return;);
1765         dev = self->netdev;
1766         IRDA_ASSERT(dev != NULL, return;);
1767         dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir;
1768
1769         fir_base = self->io.fir_base;
1770         sir_base = self->io.sir_base;
1771
1772         /* Reset everything */
1773         outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);
1774
1775         #if SMSC_IRCC2_C_SIR_STOP
1776         /*smsc_ircc_sir_stop(self);*/
1777         #endif
1778
1779         register_bank(fir_base, 1);
1780         outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base + IRCC_SCE_CFGA);
1781
1782         /* Initialize UART */
1783         outb(UART_LCR_WLEN8, sir_base + UART_LCR);  /* Reset DLAB */
1784         outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base + UART_MCR);
1785
1786         /* Turn on interrups */
1787         outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base + UART_IER);
1788
1789         IRDA_DEBUG(3, "%s() - exit\n", __FUNCTION__);
1790
1791         outb(0x00, fir_base + IRCC_MASTER);
1792 }
1793
1794 #if SMSC_IRCC2_C_SIR_STOP
1795 void smsc_ircc_sir_stop(struct smsc_ircc_cb *self)
1796 {
1797         int iobase;
1798
1799         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1800         iobase = self->io.sir_base;
1801
1802         /* Reset UART */
1803         outb(0, iobase + UART_MCR);
1804
1805         /* Turn off interrupts */
1806         outb(0, iobase + UART_IER);
1807 }
1808 #endif
1809
1810 /*
1811  * Function smsc_sir_write_wakeup (self)
1812  *
1813  *    Called by the SIR interrupt handler when there's room for more data.
1814  *    If we have more packets to send, we send them here.
1815  *
1816  */
1817 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1818 {
1819         int actual = 0;
1820         int iobase;
1821         int fcr;
1822
1823         IRDA_ASSERT(self != NULL, return;);
1824
1825         IRDA_DEBUG(4, "%s\n", __FUNCTION__);
1826
1827         iobase = self->io.sir_base;
1828
1829         /* Finished with frame?  */
1830         if (self->tx_buff.len > 0)  {
1831                 /* Write data left in transmit buffer */
1832                 actual = smsc_ircc_sir_write(iobase, self->io.fifo_size,
1833                                       self->tx_buff.data, self->tx_buff.len);
1834                 self->tx_buff.data += actual;
1835                 self->tx_buff.len  -= actual;
1836         } else {
1837
1838         /*if (self->tx_buff.len ==0)  {*/
1839
1840                 /*
1841                  *  Now serial buffer is almost free & we can start
1842                  *  transmission of another packet. But first we must check
1843                  *  if we need to change the speed of the hardware
1844                  */
1845                 if (self->new_speed) {
1846                         IRDA_DEBUG(5, "%s(), Changing speed to %d.\n",
1847                                    __FUNCTION__, self->new_speed);
1848                         smsc_ircc_sir_wait_hw_transmitter_finish(self);
1849                         smsc_ircc_change_speed(self, self->new_speed);
1850                         self->new_speed = 0;
1851                 } else {
1852                         /* Tell network layer that we want more frames */
1853                         netif_wake_queue(self->netdev);
1854                 }
1855                 self->stats.tx_packets++;
1856
1857                 if (self->io.speed <= 115200) {
1858                         /*
1859                          * Reset Rx FIFO to make sure that all reflected transmit data
1860                          * is discarded. This is needed for half duplex operation
1861                          */
1862                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR;
1863                         fcr |= self->io.speed < 38400 ?
1864                                         UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1865
1866                         outb(fcr, iobase + UART_FCR);
1867
1868                         /* Turn on receive interrupts */
1869                         outb(UART_IER_RDI, iobase + UART_IER);
1870                 }
1871         }
1872 }
1873
1874 /*
1875  * Function smsc_ircc_sir_write (iobase, fifo_size, buf, len)
1876  *
1877  *    Fill Tx FIFO with transmit data
1878  *
1879  */
1880 static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1881 {
1882         int actual = 0;
1883
1884         /* Tx FIFO should be empty! */
1885         if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) {
1886                 IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__);
1887                 return 0;
1888         }
1889
1890         /* Fill FIFO with current frame */
1891         while (fifo_size-- > 0 && actual < len) {
1892                 /* Transmit next byte */
1893                 outb(buf[actual], iobase + UART_TX);
1894                 actual++;
1895         }
1896         return actual;
1897 }
1898
1899 /*
1900  * Function smsc_ircc_is_receiving (self)
1901  *
1902  *    Returns true is we are currently receiving data
1903  *
1904  */
1905 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self)
1906 {
1907         return (self->rx_buff.state != OUTSIDE_FRAME);
1908 }
1909
1910
1911 /*
1912  * Function smsc_ircc_probe_transceiver(self)
1913  *
1914  *    Tries to find the used Transceiver
1915  *
1916  */
1917 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1918 {
1919         unsigned int    i;
1920
1921         IRDA_ASSERT(self != NULL, return;);
1922
1923         for (i = 0; smsc_transceivers[i].name != NULL; i++)
1924                 if (smsc_transceivers[i].probe(self->io.fir_base)) {
1925                         IRDA_MESSAGE(" %s transceiver found\n",
1926                                      smsc_transceivers[i].name);
1927                         self->transceiver= i + 1;
1928                         return;
1929                 }
1930
1931         IRDA_MESSAGE("No transceiver found. Defaulting to %s\n",
1932                      smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name);
1933
1934         self->transceiver = SMSC_IRCC2_C_DEFAULT_TRANSCEIVER;
1935 }
1936
1937
1938 /*
1939  * Function smsc_ircc_set_transceiver_for_speed(self, speed)
1940  *
1941  *    Set the transceiver according to the speed
1942  *
1943  */
1944 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed)
1945 {
1946         unsigned int trx;
1947
1948         trx = self->transceiver;
1949         if (trx > 0)
1950                 smsc_transceivers[trx - 1].set_for_speed(self->io.fir_base, speed);
1951 }
1952
1953 /*
1954  * Function smsc_ircc_wait_hw_transmitter_finish ()
1955  *
1956  *    Wait for the real end of HW transmission
1957  *
1958  * The UART is a strict FIFO, and we get called only when we have finished
1959  * pushing data to the FIFO, so the maximum amount of time we must wait
1960  * is only for the FIFO to drain out.
1961  *
1962  * We use a simple calibrated loop. We may need to adjust the loop
1963  * delay (udelay) to balance I/O traffic and latency. And we also need to
1964  * adjust the maximum timeout.
1965  * It would probably be better to wait for the proper interrupt,
1966  * but it doesn't seem to be available.
1967  *
1968  * We can't use jiffies or kernel timers because :
1969  * 1) We are called from the interrupt handler, which disable softirqs,
1970  * so jiffies won't be increased
1971  * 2) Jiffies granularity is usually very coarse (10ms), and we don't
1972  * want to wait that long to detect stuck hardware.
1973  * Jean II
1974  */
1975
1976 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self)
1977 {
1978         int iobase = self->io.sir_base;
1979         int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US;
1980
1981         /* Calibrated busy loop */
1982         while (count-- > 0 && !(inb(iobase + UART_LSR) & UART_LSR_TEMT))
1983                 udelay(1);
1984
1985         if (count == 0)
1986                 IRDA_DEBUG(0, "%s(): stuck transmitter\n", __FUNCTION__);
1987 }
1988
1989
1990 /* PROBING
1991  *
1992  *
1993  */
1994
1995 static int __init smsc_ircc_look_for_chips(void)
1996 {
1997         struct smsc_chip_address *address;
1998         char *type;
1999         unsigned int cfg_base, found;
2000
2001         found = 0;
2002         address = possible_addresses;
2003
2004         while (address->cfg_base) {
2005                 cfg_base = address->cfg_base;
2006
2007                 /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/
2008
2009                 if (address->type & SMSCSIO_TYPE_FDC) {
2010                         type = "FDC";
2011                         if (address->type & SMSCSIO_TYPE_FLAT)
2012                                 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, type))
2013                                         found++;
2014
2015                         if (address->type & SMSCSIO_TYPE_PAGED)
2016                                 if (!smsc_superio_paged(fdc_chips_paged, cfg_base, type))
2017                                         found++;
2018                 }
2019                 if (address->type & SMSCSIO_TYPE_LPC) {
2020                         type = "LPC";
2021                         if (address->type & SMSCSIO_TYPE_FLAT)
2022                                 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, type))
2023                                         found++;
2024
2025                         if (address->type & SMSCSIO_TYPE_PAGED)
2026                                 if (!smsc_superio_paged(lpc_chips_paged, cfg_base, type))
2027                                         found++;
2028                 }
2029                 address++;
2030         }
2031         return found;
2032 }
2033
2034 /*
2035  * Function smsc_superio_flat (chip, base, type)
2036  *
2037  *    Try to get configuration of a smc SuperIO chip with flat register model
2038  *
2039  */
2040 static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfgbase, char *type)
2041 {
2042         unsigned short firbase, sirbase;
2043         u8 mode, dma, irq;
2044         int ret = -ENODEV;
2045
2046         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2047
2048         if (smsc_ircc_probe(cfgbase, SMSCSIOFLAT_DEVICEID_REG, chips, type) == NULL)
2049                 return ret;
2050
2051         outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase);
2052         mode = inb(cfgbase + 1);
2053
2054         /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/
2055
2056         if (!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA))
2057                 IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__);
2058
2059         outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase);
2060         sirbase = inb(cfgbase + 1) << 2;
2061
2062         /* FIR iobase */
2063         outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase);
2064         firbase = inb(cfgbase + 1) << 3;
2065
2066         /* DMA */
2067         outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase);
2068         dma = inb(cfgbase + 1) & SMSCSIOFLAT_FIRDMASELECT_MASK;
2069
2070         /* IRQ */
2071         outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase);
2072         irq = inb(cfgbase + 1) & SMSCSIOFLAT_UART2IRQSELECT_MASK;
2073
2074         IRDA_MESSAGE("%s(): fir: 0x%02x, sir: 0x%02x, dma: %02d, irq: %d, mode: 0x%02x\n", __FUNCTION__, firbase, sirbase, dma, irq, mode);
2075
2076         if (firbase && smsc_ircc_open(firbase, sirbase, dma, irq) == 0)
2077                 ret = 0;
2078
2079         /* Exit configuration */
2080         outb(SMSCSIO_CFGEXITKEY, cfgbase);
2081
2082         return ret;
2083 }
2084
2085 /*
2086  * Function smsc_superio_paged (chip, base, type)
2087  *
2088  *    Try  to get configuration of a smc SuperIO chip with paged register model
2089  *
2090  */
2091 static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type)
2092 {
2093         unsigned short fir_io, sir_io;
2094         int ret = -ENODEV;
2095
2096         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2097
2098         if (smsc_ircc_probe(cfg_base, 0x20, chips, type) == NULL)
2099                 return ret;
2100
2101         /* Select logical device (UART2) */
2102         outb(0x07, cfg_base);
2103         outb(0x05, cfg_base + 1);
2104
2105         /* SIR iobase */
2106         outb(0x60, cfg_base);
2107         sir_io = inb(cfg_base + 1) << 8;
2108         outb(0x61, cfg_base);
2109         sir_io |= inb(cfg_base + 1);
2110
2111         /* Read FIR base */
2112         outb(0x62, cfg_base);
2113         fir_io = inb(cfg_base + 1) << 8;
2114         outb(0x63, cfg_base);
2115         fir_io |= inb(cfg_base + 1);
2116         outb(0x2b, cfg_base); /* ??? */
2117
2118         if (fir_io && smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0)
2119                 ret = 0;
2120
2121         /* Exit configuration */
2122         outb(SMSCSIO_CFGEXITKEY, cfg_base);
2123
2124         return ret;
2125 }
2126
2127
2128 static int __init smsc_access(unsigned short cfg_base, unsigned char reg)
2129 {
2130         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2131
2132         outb(reg, cfg_base);
2133         return inb(cfg_base) != reg ? -1 : 0;
2134 }
2135
2136 static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type)
2137 {
2138         u8 devid, xdevid, rev;
2139
2140         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2141
2142         /* Leave configuration */
2143
2144         outb(SMSCSIO_CFGEXITKEY, cfg_base);
2145
2146         if (inb(cfg_base) == SMSCSIO_CFGEXITKEY)        /* not a smc superio chip */
2147                 return NULL;
2148
2149         outb(reg, cfg_base);
2150
2151         xdevid = inb(cfg_base + 1);
2152
2153         /* Enter configuration */
2154
2155         outb(SMSCSIO_CFGACCESSKEY, cfg_base);
2156
2157         #if 0
2158         if (smsc_access(cfg_base,0x55)) /* send second key and check */
2159                 return NULL;
2160         #endif
2161
2162         /* probe device ID */
2163
2164         if (smsc_access(cfg_base, reg))
2165                 return NULL;
2166
2167         devid = inb(cfg_base + 1);
2168
2169         if (devid == 0 || devid == 0xff)        /* typical values for unused port */
2170                 return NULL;
2171
2172         /* probe revision ID */
2173
2174         if (smsc_access(cfg_base, reg + 1))
2175                 return NULL;
2176
2177         rev = inb(cfg_base + 1);
2178
2179         if (rev >= 128)                 /* i think this will make no sense */
2180                 return NULL;
2181
2182         if (devid == xdevid)            /* protection against false positives */
2183                 return NULL;
2184
2185         /* Check for expected device ID; are there others? */
2186
2187         while (chip->devid != devid) {
2188
2189                 chip++;
2190
2191                 if (chip->name == NULL)
2192                         return NULL;
2193         }
2194
2195         IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",
2196                      devid, rev, cfg_base, type, chip->name);
2197
2198         if (chip->rev > rev) {
2199                 IRDA_MESSAGE("Revision higher than expected\n");
2200                 return NULL;
2201         }
2202
2203         if (chip->flags & NoIRDA)
2204                 IRDA_MESSAGE("chipset does not support IRDA\n");
2205
2206         return chip;
2207 }
2208
2209 static int __init smsc_superio_fdc(unsigned short cfg_base)
2210 {
2211         int ret = -1;
2212
2213         if (!request_region(cfg_base, 2, driver_name)) {
2214                 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2215                              __FUNCTION__, cfg_base);
2216         } else {
2217                 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, "FDC") ||
2218                     !smsc_superio_paged(fdc_chips_paged, cfg_base, "FDC"))
2219                         ret =  0;
2220
2221                 release_region(cfg_base, 2);
2222         }
2223
2224         return ret;
2225 }
2226
2227 static int __init smsc_superio_lpc(unsigned short cfg_base)
2228 {
2229         int ret = -1;
2230
2231         if (!request_region(cfg_base, 2, driver_name)) {
2232                 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2233                              __FUNCTION__, cfg_base);
2234         } else {
2235                 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, "LPC") ||
2236                     !smsc_superio_paged(lpc_chips_paged, cfg_base, "LPC"))
2237                         ret = 0;
2238
2239                 release_region(cfg_base, 2);
2240         }
2241         return ret;
2242 }
2243
2244 /************************************************
2245  *
2246  * Transceivers specific functions
2247  *
2248  ************************************************/
2249
2250
2251 /*
2252  * Function smsc_ircc_set_transceiver_smsc_ircc_atc(fir_base, speed)
2253  *
2254  *    Program transceiver through smsc-ircc ATC circuitry
2255  *
2256  */
2257
2258 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed)
2259 {
2260         unsigned long jiffies_now, jiffies_timeout;
2261         u8 val;
2262
2263         jiffies_now = jiffies;
2264         jiffies_timeout = jiffies + SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES;
2265
2266         /* ATC */
2267         register_bank(fir_base, 4);
2268         outb((inb(fir_base + IRCC_ATC) & IRCC_ATC_MASK) | IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE,
2269              fir_base + IRCC_ATC);
2270
2271         while ((val = (inb(fir_base + IRCC_ATC) & IRCC_ATC_nPROGREADY)) &&
2272                 !time_after(jiffies, jiffies_timeout))
2273                 /* empty */;
2274
2275         if (val)
2276                 IRDA_WARNING("%s(): ATC: 0x%02x\n", __FUNCTION__,
2277                              inb(fir_base + IRCC_ATC));
2278 }
2279
2280 /*
2281  * Function smsc_ircc_probe_transceiver_smsc_ircc_atc(fir_base)
2282  *
2283  *    Probe transceiver smsc-ircc ATC circuitry
2284  *
2285  */
2286
2287 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base)
2288 {
2289         return 0;
2290 }
2291
2292 /*
2293  * Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed)
2294  *
2295  *    Set transceiver
2296  *
2297  */
2298
2299 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
2300 {
2301         u8 fast_mode;
2302
2303         switch (speed) {
2304         default:
2305         case 576000 :
2306                 fast_mode = 0;
2307                 break;
2308         case 1152000 :
2309         case 4000000 :
2310                 fast_mode = IRCC_LCR_A_FAST;
2311                 break;
2312         }
2313         register_bank(fir_base, 0);
2314         outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2315 }
2316
2317 /*
2318  * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
2319  *
2320  *    Probe transceiver
2321  *
2322  */
2323
2324 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base)
2325 {
2326         return 0;
2327 }
2328
2329 /*
2330  * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
2331  *
2332  *    Set transceiver
2333  *
2334  */
2335
2336 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2337 {
2338         u8 fast_mode;
2339
2340         switch (speed) {
2341         default:
2342         case 576000 :
2343                 fast_mode = 0;
2344                 break;
2345         case 1152000 :
2346         case 4000000 :
2347                 fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA;
2348                 break;
2349
2350         }
2351         /* This causes an interrupt */
2352         register_bank(fir_base, 0);
2353         outb((inb(fir_base + IRCC_LCR_A) &  0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2354 }
2355
2356 /*
2357  * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
2358  *
2359  *    Probe transceiver
2360  *
2361  */
2362
2363 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base)
2364 {
2365         return 0;
2366 }
2367
2368
2369 module_init(smsc_ircc_init);
2370 module_exit(smsc_ircc_cleanup);