9aa074b44dd3df9f419e86e70ec137b5549c2fa9
[sfrench/cifs-2.6.git] / drivers / net / irda / nsc-ircc.c
1 /*********************************************************************
2  *                
3  * Filename:      nsc-ircc.c
4  * Version:       1.0
5  * Description:   Driver for the NSC PC'108 and PC'338 IrDA chipsets
6  * Status:        Stable.
7  * Author:        Dag Brattli <dagb@cs.uit.no>
8  * Created at:    Sat Nov  7 21:43:15 1998
9  * Modified at:   Wed Mar  1 11:29:34 2000
10  * Modified by:   Dag Brattli <dagb@cs.uit.no>
11  * 
12  *     Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13  *     Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14  *     Copyright (c) 1998 Actisys Corp., www.actisys.com
15  *     Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
16  *     All Rights Reserved
17  *      
18  *     This program is free software; you can redistribute it and/or 
19  *     modify it under the terms of the GNU General Public License as 
20  *     published by the Free Software Foundation; either version 2 of 
21  *     the License, or (at your option) any later version.
22  *  
23  *     Neither Dag Brattli nor University of Tromsø admit liability nor
24  *     provide warranty for any of this software. This material is 
25  *     provided "AS-IS" and at no charge.
26  *
27  *     Notice that all functions that needs to access the chip in _any_
28  *     way, must save BSR register on entry, and restore it on exit. 
29  *     It is _very_ important to follow this policy!
30  *
31  *         __u8 bank;
32  *     
33  *         bank = inb(iobase+BSR);
34  *  
35  *         do_your_stuff_here();
36  *
37  *         outb(bank, iobase+BSR);
38  *
39  *    If you find bugs in this file, its very likely that the same bug
40  *    will also be in w83977af_ir.c since the implementations are quite
41  *    similar.
42  *     
43  ********************************************************************/
44
45 #include <linux/module.h>
46
47 #include <linux/kernel.h>
48 #include <linux/types.h>
49 #include <linux/skbuff.h>
50 #include <linux/netdevice.h>
51 #include <linux/ioport.h>
52 #include <linux/delay.h>
53 #include <linux/slab.h>
54 #include <linux/init.h>
55 #include <linux/rtnetlink.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/pnp.h>
58 #include <linux/platform_device.h>
59
60 #include <asm/io.h>
61 #include <asm/dma.h>
62 #include <asm/byteorder.h>
63
64 #include <net/irda/wrapper.h>
65 #include <net/irda/irda.h>
66 #include <net/irda/irda_device.h>
67
68 #include "nsc-ircc.h"
69
70 #define CHIP_IO_EXTENT 8
71 #define BROKEN_DONGLE_ID
72
73 static char *driver_name = "nsc-ircc";
74
75 /* Power Management */
76 #define NSC_IRCC_DRIVER_NAME                  "nsc-ircc"
77 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
78 static int nsc_ircc_resume(struct platform_device *dev);
79
80 static struct platform_driver nsc_ircc_driver = {
81         .suspend        = nsc_ircc_suspend,
82         .resume         = nsc_ircc_resume,
83         .driver         = {
84                 .name   = NSC_IRCC_DRIVER_NAME,
85         },
86 };
87
88 /* Module parameters */
89 static int qos_mtt_bits = 0x07;  /* 1 ms or more */
90 static int dongle_id;
91
92 /* Use BIOS settions by default, but user may supply module parameters */
93 static unsigned int io[]  = { ~0, ~0, ~0, ~0, ~0 };
94 static unsigned int irq[] = {  0,  0,  0,  0,  0 };
95 static unsigned int dma[] = {  0,  0,  0,  0,  0 };
96
97 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
98 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
99 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
100 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
101 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
102 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
103 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
104
105 /* These are the known NSC chips */
106 static nsc_chip_t chips[] = {
107 /*  Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
108         { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0, 
109           nsc_ircc_probe_108, nsc_ircc_init_108 },
110         { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8, 
111           nsc_ircc_probe_338, nsc_ircc_init_338 },
112         /* Contributed by Steffen Pingel - IBM X40 */
113         { "PC8738x", { 0x164e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
114           nsc_ircc_probe_39x, nsc_ircc_init_39x },
115         /* Contributed by Jan Frey - IBM A30/A31 */
116         { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff, 
117           nsc_ircc_probe_39x, nsc_ircc_init_39x },
118         { "IBM", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
119           nsc_ircc_probe_39x, nsc_ircc_init_39x },
120         { NULL }
121 };
122
123 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
124
125 static char *dongle_types[] = {
126         "Differential serial interface",
127         "Differential serial interface",
128         "Reserved",
129         "Reserved",
130         "Sharp RY5HD01",
131         "Reserved",
132         "Single-ended serial interface",
133         "Consumer-IR only",
134         "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
135         "IBM31T1100 or Temic TFDS6000/TFDS6500",
136         "Reserved",
137         "Reserved",
138         "HP HSDL-1100/HSDL-2100",
139         "HP HSDL-1100/HSDL-2100",
140         "Supports SIR Mode only",
141         "No dongle connected",
142 };
143
144 /* PNP probing */
145 static chipio_t pnp_info;
146 static const struct pnp_device_id nsc_ircc_pnp_table[] = {
147         { .id = "NSC6001", .driver_data = 0 },
148         { .id = "IBM0071", .driver_data = 0 },
149         { }
150 };
151
152 MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
153
154 static struct pnp_driver nsc_ircc_pnp_driver = {
155         .name = "nsc-ircc",
156         .id_table = nsc_ircc_pnp_table,
157         .probe = nsc_ircc_pnp_probe,
158 };
159
160 /* Some prototypes */
161 static int  nsc_ircc_open(chipio_t *info);
162 static int  nsc_ircc_close(struct nsc_ircc_cb *self);
163 static int  nsc_ircc_setup(chipio_t *info);
164 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
165 static int  nsc_ircc_dma_receive(struct nsc_ircc_cb *self); 
166 static int  nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
167 static int  nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
168 static int  nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
169 static int  nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
170 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
171 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
172 static int  nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
173 static int  nsc_ircc_read_dongle_id (int iobase);
174 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
175
176 static int  nsc_ircc_net_open(struct net_device *dev);
177 static int  nsc_ircc_net_close(struct net_device *dev);
178 static int  nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
179 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
180
181 /* Globals */
182 static int pnp_registered;
183 static int pnp_succeeded;
184
185 /*
186  * Function nsc_ircc_init ()
187  *
188  *    Initialize chip. Just try to find out how many chips we are dealing with
189  *    and where they are
190  */
191 static int __init nsc_ircc_init(void)
192 {
193         chipio_t info;
194         nsc_chip_t *chip;
195         int ret;
196         int cfg_base;
197         int cfg, id;
198         int reg;
199         int i = 0;
200
201         ret = platform_driver_register(&nsc_ircc_driver);
202         if (ret) {
203                 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
204                 return ret;
205         }
206
207         /* Register with PnP subsystem to detect disable ports */
208         ret = pnp_register_driver(&nsc_ircc_pnp_driver);
209
210         if (!ret)
211                 pnp_registered = 1;
212
213         ret = -ENODEV;
214
215         /* Probe for all the NSC chipsets we know about */
216         for (chip = chips; chip->name ; chip++) {
217                 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
218                            chip->name);
219                 
220                 /* Try all config registers for this chip */
221                 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
222                         cfg_base = chip->cfg[cfg];
223                         if (!cfg_base)
224                                 continue;
225
226                         /* Read index register */
227                         reg = inb(cfg_base);
228                         if (reg == 0xff) {
229                                 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __FUNCTION__, cfg_base);
230                                 continue;
231                         }
232                         
233                         /* Read chip identification register */
234                         outb(chip->cid_index, cfg_base);
235                         id = inb(cfg_base+1);
236                         if ((id & chip->cid_mask) == chip->cid_value) {
237                                 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
238                                            __FUNCTION__, chip->name, id & ~chip->cid_mask);
239
240                                 /*
241                                  * If we found a correct PnP setting,
242                                  * we first try it.
243                                  */
244                                 if (pnp_succeeded) {
245                                         memset(&info, 0, sizeof(chipio_t));
246                                         info.cfg_base = cfg_base;
247                                         info.fir_base = pnp_info.fir_base;
248                                         info.dma = pnp_info.dma;
249                                         info.irq = pnp_info.irq;
250
251                                         if (info.fir_base < 0x2000) {
252                                                 IRDA_MESSAGE("%s, chip->init\n", driver_name);
253                                                 chip->init(chip, &info);
254                                         } else
255                                                 chip->probe(chip, &info);
256
257                                         if (nsc_ircc_open(&info) >= 0)
258                                                 ret = 0;
259                                 }
260
261                                 /*
262                                  * Opening based on PnP values failed.
263                                  * Let's fallback to user values, or probe
264                                  * the chip.
265                                  */
266                                 if (ret) {
267                                         IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
268                                         memset(&info, 0, sizeof(chipio_t));
269                                         info.cfg_base = cfg_base;
270                                         info.fir_base = io[i];
271                                         info.dma = dma[i];
272                                         info.irq = irq[i];
273
274                                         /*
275                                          * If the user supplies the base address, then
276                                          * we init the chip, if not we probe the values
277                                          * set by the BIOS
278                                          */
279                                         if (io[i] < 0x2000) {
280                                                 chip->init(chip, &info);
281                                         } else
282                                                 chip->probe(chip, &info);
283
284                                         if (nsc_ircc_open(&info) >= 0)
285                                                 ret = 0;
286                                 }
287                                 i++;
288                         } else {
289                                 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
290                         }
291                 } 
292         }
293
294         if (ret) {
295                 platform_driver_unregister(&nsc_ircc_driver);
296                 pnp_unregister_driver(&nsc_ircc_pnp_driver);
297                 pnp_registered = 0;
298         }
299
300         return ret;
301 }
302
303 /*
304  * Function nsc_ircc_cleanup ()
305  *
306  *    Close all configured chips
307  *
308  */
309 static void __exit nsc_ircc_cleanup(void)
310 {
311         int i;
312
313         for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
314                 if (dev_self[i])
315                         nsc_ircc_close(dev_self[i]);
316         }
317
318         platform_driver_unregister(&nsc_ircc_driver);
319
320         if (pnp_registered)
321                 pnp_unregister_driver(&nsc_ircc_pnp_driver);
322
323         pnp_registered = 0;
324 }
325
326 /*
327  * Function nsc_ircc_open (iobase, irq)
328  *
329  *    Open driver instance
330  *
331  */
332 static int __init nsc_ircc_open(chipio_t *info)
333 {
334         struct net_device *dev;
335         struct nsc_ircc_cb *self;
336         void *ret;
337         int err, chip_index;
338
339         IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
340
341
342         for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
343                 if (!dev_self[chip_index])
344                         break;
345         }
346
347         if (chip_index == ARRAY_SIZE(dev_self)) {
348                 IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __FUNCTION__);
349                 return -ENOMEM;
350         }
351
352         IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
353                      info->cfg_base);
354
355         if ((nsc_ircc_setup(info)) == -1)
356                 return -1;
357
358         IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
359
360         dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
361         if (dev == NULL) {
362                 IRDA_ERROR("%s(), can't allocate memory for "
363                            "control block!\n", __FUNCTION__);
364                 return -ENOMEM;
365         }
366
367         self = dev->priv;
368         self->netdev = dev;
369         spin_lock_init(&self->lock);
370    
371         /* Need to store self somewhere */
372         dev_self[chip_index] = self;
373         self->index = chip_index;
374
375         /* Initialize IO */
376         self->io.cfg_base  = info->cfg_base;
377         self->io.fir_base  = info->fir_base;
378         self->io.irq       = info->irq;
379         self->io.fir_ext   = CHIP_IO_EXTENT;
380         self->io.dma       = info->dma;
381         self->io.fifo_size = 32;
382         
383         /* Reserve the ioports that we need */
384         ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
385         if (!ret) {
386                 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
387                              __FUNCTION__, self->io.fir_base);
388                 err = -ENODEV;
389                 goto out1;
390         }
391
392         /* Initialize QoS for this device */
393         irda_init_max_qos_capabilies(&self->qos);
394         
395         /* The only value we must override it the baudrate */
396         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
397                 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
398         
399         self->qos.min_turn_time.bits = qos_mtt_bits;
400         irda_qos_bits_to_value(&self->qos);
401         
402         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
403         self->rx_buff.truesize = 14384; 
404         self->tx_buff.truesize = 14384;
405
406         /* Allocate memory if needed */
407         self->rx_buff.head =
408                 dma_alloc_coherent(NULL, self->rx_buff.truesize,
409                                    &self->rx_buff_dma, GFP_KERNEL);
410         if (self->rx_buff.head == NULL) {
411                 err = -ENOMEM;
412                 goto out2;
413
414         }
415         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
416         
417         self->tx_buff.head =
418                 dma_alloc_coherent(NULL, self->tx_buff.truesize,
419                                    &self->tx_buff_dma, GFP_KERNEL);
420         if (self->tx_buff.head == NULL) {
421                 err = -ENOMEM;
422                 goto out3;
423         }
424         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
425
426         self->rx_buff.in_frame = FALSE;
427         self->rx_buff.state = OUTSIDE_FRAME;
428         self->tx_buff.data = self->tx_buff.head;
429         self->rx_buff.data = self->rx_buff.head;
430         
431         /* Reset Tx queue info */
432         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
433         self->tx_fifo.tail = self->tx_buff.head;
434
435         /* Override the network functions we need to use */
436         SET_MODULE_OWNER(dev);
437         dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
438         dev->open            = nsc_ircc_net_open;
439         dev->stop            = nsc_ircc_net_close;
440         dev->do_ioctl        = nsc_ircc_net_ioctl;
441         dev->get_stats       = nsc_ircc_net_get_stats;
442
443         err = register_netdev(dev);
444         if (err) {
445                 IRDA_ERROR("%s(), register_netdev() failed!\n", __FUNCTION__);
446                 goto out4;
447         }
448         IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
449
450         /* Check if user has supplied a valid dongle id or not */
451         if ((dongle_id <= 0) ||
452             (dongle_id >= ARRAY_SIZE(dongle_types))) {
453                 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
454                 
455                 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
456                              dongle_types[dongle_id]);
457         } else {
458                 IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name,
459                              dongle_types[dongle_id]);
460         }
461         
462         self->io.dongle_id = dongle_id;
463         nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
464
465         self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
466                                                       self->index, NULL, 0);
467         if (IS_ERR(self->pldev)) {
468                 err = PTR_ERR(self->pldev);
469                 goto out5;
470         }
471         platform_set_drvdata(self->pldev, self);
472
473         return chip_index;
474
475  out5:
476         unregister_netdev(dev);
477  out4:
478         dma_free_coherent(NULL, self->tx_buff.truesize,
479                           self->tx_buff.head, self->tx_buff_dma);
480  out3:
481         dma_free_coherent(NULL, self->rx_buff.truesize,
482                           self->rx_buff.head, self->rx_buff_dma);
483  out2:
484         release_region(self->io.fir_base, self->io.fir_ext);
485  out1:
486         free_netdev(dev);
487         dev_self[chip_index] = NULL;
488         return err;
489 }
490
491 /*
492  * Function nsc_ircc_close (self)
493  *
494  *    Close driver instance
495  *
496  */
497 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
498 {
499         int iobase;
500
501         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
502
503         IRDA_ASSERT(self != NULL, return -1;);
504
505         iobase = self->io.fir_base;
506
507         platform_device_unregister(self->pldev);
508
509         /* Remove netdevice */
510         unregister_netdev(self->netdev);
511
512         /* Release the PORT that this driver is using */
513         IRDA_DEBUG(4, "%s(), Releasing Region %03x\n", 
514                    __FUNCTION__, self->io.fir_base);
515         release_region(self->io.fir_base, self->io.fir_ext);
516
517         if (self->tx_buff.head)
518                 dma_free_coherent(NULL, self->tx_buff.truesize,
519                                   self->tx_buff.head, self->tx_buff_dma);
520         
521         if (self->rx_buff.head)
522                 dma_free_coherent(NULL, self->rx_buff.truesize,
523                                   self->rx_buff.head, self->rx_buff_dma);
524
525         dev_self[self->index] = NULL;
526         free_netdev(self->netdev);
527         
528         return 0;
529 }
530
531 /*
532  * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
533  *
534  *    Initialize the NSC '108 chip
535  *
536  */
537 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
538 {
539         int cfg_base = info->cfg_base;
540         __u8 temp=0;
541
542         outb(2, cfg_base);      /* Mode Control Register (MCTL) */
543         outb(0x00, cfg_base+1); /* Disable device */
544         
545         /* Base Address and Interrupt Control Register (BAIC) */
546         outb(CFG_108_BAIC, cfg_base);
547         switch (info->fir_base) {
548         case 0x3e8: outb(0x14, cfg_base+1); break;
549         case 0x2e8: outb(0x15, cfg_base+1); break;
550         case 0x3f8: outb(0x16, cfg_base+1); break;
551         case 0x2f8: outb(0x17, cfg_base+1); break;
552         default: IRDA_ERROR("%s(), invalid base_address", __FUNCTION__);
553         }
554         
555         /* Control Signal Routing Register (CSRT) */
556         switch (info->irq) {
557         case 3:  temp = 0x01; break;
558         case 4:  temp = 0x02; break;
559         case 5:  temp = 0x03; break;
560         case 7:  temp = 0x04; break;
561         case 9:  temp = 0x05; break;
562         case 11: temp = 0x06; break;
563         case 15: temp = 0x07; break;
564         default: IRDA_ERROR("%s(), invalid irq", __FUNCTION__);
565         }
566         outb(CFG_108_CSRT, cfg_base);
567         
568         switch (info->dma) {    
569         case 0: outb(0x08+temp, cfg_base+1); break;
570         case 1: outb(0x10+temp, cfg_base+1); break;
571         case 3: outb(0x18+temp, cfg_base+1); break;
572         default: IRDA_ERROR("%s(), invalid dma", __FUNCTION__);
573         }
574         
575         outb(CFG_108_MCTL, cfg_base);      /* Mode Control Register (MCTL) */
576         outb(0x03, cfg_base+1); /* Enable device */
577
578         return 0;
579 }
580
581 /*
582  * Function nsc_ircc_probe_108 (chip, info)
583  *
584  *    
585  *
586  */
587 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info) 
588 {
589         int cfg_base = info->cfg_base;
590         int reg;
591
592         /* Read address and interrupt control register (BAIC) */
593         outb(CFG_108_BAIC, cfg_base);
594         reg = inb(cfg_base+1);
595         
596         switch (reg & 0x03) {
597         case 0:
598                 info->fir_base = 0x3e8;
599                 break;
600         case 1:
601                 info->fir_base = 0x2e8;
602                 break;
603         case 2:
604                 info->fir_base = 0x3f8;
605                 break;
606         case 3:
607                 info->fir_base = 0x2f8;
608                 break;
609         }
610         info->sir_base = info->fir_base;
611         IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__,
612                    info->fir_base);
613
614         /* Read control signals routing register (CSRT) */
615         outb(CFG_108_CSRT, cfg_base);
616         reg = inb(cfg_base+1);
617
618         switch (reg & 0x07) {
619         case 0:
620                 info->irq = -1;
621                 break;
622         case 1:
623                 info->irq = 3;
624                 break;
625         case 2:
626                 info->irq = 4;
627                 break;
628         case 3:
629                 info->irq = 5;
630                 break;
631         case 4:
632                 info->irq = 7;
633                 break;
634         case 5:
635                 info->irq = 9;
636                 break;
637         case 6:
638                 info->irq = 11;
639                 break;
640         case 7:
641                 info->irq = 15;
642                 break;
643         }
644         IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq);
645
646         /* Currently we only read Rx DMA but it will also be used for Tx */
647         switch ((reg >> 3) & 0x03) {
648         case 0:
649                 info->dma = -1;
650                 break;
651         case 1:
652                 info->dma = 0;
653                 break;
654         case 2:
655                 info->dma = 1;
656                 break;
657         case 3:
658                 info->dma = 3;
659                 break;
660         }
661         IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma);
662
663         /* Read mode control register (MCTL) */
664         outb(CFG_108_MCTL, cfg_base);
665         reg = inb(cfg_base+1);
666
667         info->enabled = reg & 0x01;
668         info->suspended = !((reg >> 1) & 0x01);
669
670         return 0;
671 }
672
673 /*
674  * Function nsc_ircc_init_338 (chip, info)
675  *
676  *    Initialize the NSC '338 chip. Remember that the 87338 needs two 
677  *    consecutive writes to the data registers while CPU interrupts are
678  *    disabled. The 97338 does not require this, but shouldn't be any
679  *    harm if we do it anyway.
680  */
681 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info) 
682 {
683         /* No init yet */
684         
685         return 0;
686 }
687
688 /*
689  * Function nsc_ircc_probe_338 (chip, info)
690  *
691  *    
692  *
693  */
694 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info) 
695 {
696         int cfg_base = info->cfg_base;
697         int reg, com = 0;
698         int pnp;
699
700         /* Read funtion enable register (FER) */
701         outb(CFG_338_FER, cfg_base);
702         reg = inb(cfg_base+1);
703
704         info->enabled = (reg >> 2) & 0x01;
705
706         /* Check if we are in Legacy or PnP mode */
707         outb(CFG_338_PNP0, cfg_base);
708         reg = inb(cfg_base+1);
709         
710         pnp = (reg >> 3) & 0x01;
711         if (pnp) {
712                 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
713                 outb(0x46, cfg_base);
714                 reg = (inb(cfg_base+1) & 0xfe) << 2;
715
716                 outb(0x47, cfg_base);
717                 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
718
719                 info->fir_base = reg;
720         } else {
721                 /* Read function address register (FAR) */
722                 outb(CFG_338_FAR, cfg_base);
723                 reg = inb(cfg_base+1);
724                 
725                 switch ((reg >> 4) & 0x03) {
726                 case 0:
727                         info->fir_base = 0x3f8;
728                         break;
729                 case 1:
730                         info->fir_base = 0x2f8;
731                         break;
732                 case 2:
733                         com = 3;
734                         break;
735                 case 3:
736                         com = 4;
737                         break;
738                 }
739                 
740                 if (com) {
741                         switch ((reg >> 6) & 0x03) {
742                         case 0:
743                                 if (com == 3)
744                                         info->fir_base = 0x3e8;
745                                 else
746                                         info->fir_base = 0x2e8;
747                                 break;
748                         case 1:
749                                 if (com == 3)
750                                         info->fir_base = 0x338;
751                                 else
752                                         info->fir_base = 0x238;
753                                 break;
754                         case 2:
755                                 if (com == 3)
756                                         info->fir_base = 0x2e8;
757                                 else
758                                         info->fir_base = 0x2e0;
759                                 break;
760                         case 3:
761                                 if (com == 3)
762                                         info->fir_base = 0x220;
763                                 else
764                                         info->fir_base = 0x228;
765                                 break;
766                         }
767                 }
768         }
769         info->sir_base = info->fir_base;
770
771         /* Read PnP register 1 (PNP1) */
772         outb(CFG_338_PNP1, cfg_base);
773         reg = inb(cfg_base+1);
774         
775         info->irq = reg >> 4;
776         
777         /* Read PnP register 3 (PNP3) */
778         outb(CFG_338_PNP3, cfg_base);
779         reg = inb(cfg_base+1);
780
781         info->dma = (reg & 0x07) - 1;
782
783         /* Read power and test register (PTR) */
784         outb(CFG_338_PTR, cfg_base);
785         reg = inb(cfg_base+1);
786
787         info->suspended = reg & 0x01;
788
789         return 0;
790 }
791
792
793 /*
794  * Function nsc_ircc_init_39x (chip, info)
795  *
796  *    Now that we know it's a '39x (see probe below), we need to
797  *    configure it so we can use it.
798  *
799  * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
800  * the configuration of the different functionality (serial, parallel,
801  * floppy...) are each in a different bank (Logical Device Number).
802  * The base address, irq and dma configuration registers are common
803  * to all functionalities (index 0x30 to 0x7F).
804  * There is only one configuration register specific to the
805  * serial port, CFG_39X_SPC.
806  * JeanII
807  *
808  * Note : this code was written by Jan Frey <janfrey@web.de>
809  */
810 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info) 
811 {
812         int cfg_base = info->cfg_base;
813         int enabled;
814
815         /* User is shure about his config... accept it. */
816         IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
817                    "io=0x%04x, irq=%d, dma=%d\n", 
818                    __FUNCTION__, info->fir_base, info->irq, info->dma);
819
820         /* Access bank for SP2 */
821         outb(CFG_39X_LDN, cfg_base);
822         outb(0x02, cfg_base+1);
823
824         /* Configure SP2 */
825
826         /* We want to enable the device if not enabled */
827         outb(CFG_39X_ACT, cfg_base);
828         enabled = inb(cfg_base+1) & 0x01;
829         
830         if (!enabled) {
831                 /* Enable the device */
832                 outb(CFG_39X_SIOCF1, cfg_base);
833                 outb(0x01, cfg_base+1);
834                 /* May want to update info->enabled. Jean II */
835         }
836
837         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
838          * power mode (wake up from sleep mode) (bit 1) */
839         outb(CFG_39X_SPC, cfg_base);
840         outb(0x82, cfg_base+1);
841
842         return 0;
843 }
844
845 /*
846  * Function nsc_ircc_probe_39x (chip, info)
847  *
848  *    Test if we really have a '39x chip at the given address
849  *
850  * Note : this code was written by Jan Frey <janfrey@web.de>
851  */
852 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info) 
853 {
854         int cfg_base = info->cfg_base;
855         int reg1, reg2, irq, irqt, dma1, dma2;
856         int enabled, susp;
857
858         IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
859                    __FUNCTION__, cfg_base);
860
861         /* This function should be executed with irq off to avoid
862          * another driver messing with the Super I/O bank - Jean II */
863
864         /* Access bank for SP2 */
865         outb(CFG_39X_LDN, cfg_base);
866         outb(0x02, cfg_base+1);
867
868         /* Read infos about SP2 ; store in info struct */
869         outb(CFG_39X_BASEH, cfg_base);
870         reg1 = inb(cfg_base+1);
871         outb(CFG_39X_BASEL, cfg_base);
872         reg2 = inb(cfg_base+1);
873         info->fir_base = (reg1 << 8) | reg2;
874
875         outb(CFG_39X_IRQNUM, cfg_base);
876         irq = inb(cfg_base+1);
877         outb(CFG_39X_IRQSEL, cfg_base);
878         irqt = inb(cfg_base+1);
879         info->irq = irq;
880
881         outb(CFG_39X_DMA0, cfg_base);
882         dma1 = inb(cfg_base+1);
883         outb(CFG_39X_DMA1, cfg_base);
884         dma2 = inb(cfg_base+1);
885         info->dma = dma1 -1;
886
887         outb(CFG_39X_ACT, cfg_base);
888         info->enabled = enabled = inb(cfg_base+1) & 0x01;
889         
890         outb(CFG_39X_SPC, cfg_base);
891         susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
892
893         IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
894
895         /* Configure SP2 */
896
897         /* We want to enable the device if not enabled */
898         outb(CFG_39X_ACT, cfg_base);
899         enabled = inb(cfg_base+1) & 0x01;
900         
901         if (!enabled) {
902                 /* Enable the device */
903                 outb(CFG_39X_SIOCF1, cfg_base);
904                 outb(0x01, cfg_base+1);
905                 /* May want to update info->enabled. Jean II */
906         }
907
908         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
909          * power mode (wake up from sleep mode) (bit 1) */
910         outb(CFG_39X_SPC, cfg_base);
911         outb(0x82, cfg_base+1);
912
913         return 0;
914 }
915
916 /* PNP probing */
917 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
918 {
919         memset(&pnp_info, 0, sizeof(chipio_t));
920         pnp_info.irq = -1;
921         pnp_info.dma = -1;
922         pnp_succeeded = 1;
923
924         /* There don't seem to be any way to get the cfg_base.
925          * On my box, cfg_base is in the PnP descriptor of the
926          * motherboard. Oh well... Jean II */
927
928         if (pnp_port_valid(dev, 0) &&
929                 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
930                 pnp_info.fir_base = pnp_port_start(dev, 0);
931
932         if (pnp_irq_valid(dev, 0) &&
933                 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
934                 pnp_info.irq = pnp_irq(dev, 0);
935
936         if (pnp_dma_valid(dev, 0) &&
937                 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
938                 pnp_info.dma = pnp_dma(dev, 0);
939
940         IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
941                    __FUNCTION__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
942
943         if((pnp_info.fir_base == 0) ||
944            (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
945                 /* Returning an error will disable the device. Yuck ! */
946                 //return -EINVAL;
947                 pnp_succeeded = 0;
948         }
949
950         return 0;
951 }
952
953 /*
954  * Function nsc_ircc_setup (info)
955  *
956  *    Returns non-negative on success.
957  *
958  */
959 static int nsc_ircc_setup(chipio_t *info)
960 {
961         int version;
962         int iobase = info->fir_base;
963
964         /* Read the Module ID */
965         switch_bank(iobase, BANK3);
966         version = inb(iobase+MID);
967
968         IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
969                    __FUNCTION__, driver_name, version);
970
971         /* Should be 0x2? */
972         if (0x20 != (version & 0xf0)) {
973                 IRDA_ERROR("%s, Wrong chip version %02x\n",
974                            driver_name, version);
975                 return -1;
976         }
977
978         /* Switch to advanced mode */
979         switch_bank(iobase, BANK2);
980         outb(ECR1_EXT_SL, iobase+ECR1);
981         switch_bank(iobase, BANK0);
982         
983         /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
984         switch_bank(iobase, BANK0);
985         outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
986
987         outb(0x03, iobase+LCR);         /* 8 bit word length */
988         outb(MCR_SIR, iobase+MCR);      /* Start at SIR-mode, also clears LSR*/
989
990         /* Set FIFO size to 32 */
991         switch_bank(iobase, BANK2);
992         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
993
994         /* IRCR2: FEND_MD is not set */
995         switch_bank(iobase, BANK5);
996         outb(0x02, iobase+4);
997
998         /* Make sure that some defaults are OK */
999         switch_bank(iobase, BANK6);
1000         outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
1001         outb(0x0a, iobase+1); /* Set MIR pulse width */
1002         outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
1003         outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
1004
1005         /* Enable receive interrupts */
1006         switch_bank(iobase, BANK0);
1007         outb(IER_RXHDL_IE, iobase+IER);
1008
1009         return 0;
1010 }
1011
1012 /*
1013  * Function nsc_ircc_read_dongle_id (void)
1014  *
1015  * Try to read dongle indentification. This procedure needs to be executed
1016  * once after power-on/reset. It also needs to be used whenever you suspect
1017  * that the user may have plugged/unplugged the IrDA Dongle.
1018  */
1019 static int nsc_ircc_read_dongle_id (int iobase)
1020 {
1021         int dongle_id;
1022         __u8 bank;
1023
1024         bank = inb(iobase+BSR);
1025
1026         /* Select Bank 7 */
1027         switch_bank(iobase, BANK7);
1028         
1029         /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1030         outb(0x00, iobase+7);
1031         
1032         /* ID0, 1, and 2 are pulled up/down very slowly */
1033         udelay(50);
1034         
1035         /* IRCFG1: read the ID bits */
1036         dongle_id = inb(iobase+4) & 0x0f;
1037
1038 #ifdef BROKEN_DONGLE_ID
1039         if (dongle_id == 0x0a)
1040                 dongle_id = 0x09;
1041 #endif  
1042         /* Go back to  bank 0 before returning */
1043         switch_bank(iobase, BANK0);
1044
1045         outb(bank, iobase+BSR);
1046
1047         return dongle_id;
1048 }
1049
1050 /*
1051  * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1052  *
1053  *     This function initializes the dongle for the transceiver that is
1054  *     used. This procedure needs to be executed once after
1055  *     power-on/reset. It also needs to be used whenever you suspect that
1056  *     the dongle is changed. 
1057  */
1058 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1059 {
1060         int bank;
1061
1062         /* Save current bank */
1063         bank = inb(iobase+BSR);
1064
1065         /* Select Bank 7 */
1066         switch_bank(iobase, BANK7);
1067         
1068         /* IRCFG4: set according to dongle_id */
1069         switch (dongle_id) {
1070         case 0x00: /* same as */
1071         case 0x01: /* Differential serial interface */
1072                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1073                            __FUNCTION__, dongle_types[dongle_id]); 
1074                 break;
1075         case 0x02: /* same as */
1076         case 0x03: /* Reserved */
1077                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1078                            __FUNCTION__, dongle_types[dongle_id]); 
1079                 break;
1080         case 0x04: /* Sharp RY5HD01 */
1081                 break;
1082         case 0x05: /* Reserved, but this is what the Thinkpad reports */
1083                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1084                            __FUNCTION__, dongle_types[dongle_id]); 
1085                 break;
1086         case 0x06: /* Single-ended serial interface */
1087                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1088                            __FUNCTION__, dongle_types[dongle_id]); 
1089                 break;
1090         case 0x07: /* Consumer-IR only */
1091                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1092                            __FUNCTION__, dongle_types[dongle_id]); 
1093                 break;
1094         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1095                 IRDA_DEBUG(0, "%s(), %s\n",
1096                            __FUNCTION__, dongle_types[dongle_id]);
1097                 break;
1098         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1099                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1100                 break;
1101         case 0x0A: /* same as */
1102         case 0x0B: /* Reserved */
1103                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1104                            __FUNCTION__, dongle_types[dongle_id]); 
1105                 break;
1106         case 0x0C: /* same as */
1107         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1108                 /* 
1109                  * Set irsl0 as input, irsl[1-2] as output, and separate 
1110                  * inputs are used for SIR and MIR/FIR 
1111                  */
1112                 outb(0x48, iobase+7); 
1113                 break;
1114         case 0x0E: /* Supports SIR Mode only */
1115                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1116                 break;
1117         case 0x0F: /* No dongle connected */
1118                 IRDA_DEBUG(0, "%s(), %s\n",
1119                            __FUNCTION__, dongle_types[dongle_id]); 
1120
1121                 switch_bank(iobase, BANK0);
1122                 outb(0x62, iobase+MCR);
1123                 break;
1124         default: 
1125                 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x", 
1126                            __FUNCTION__, dongle_id);
1127         }
1128         
1129         /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1130         outb(0x00, iobase+4);
1131
1132         /* Restore bank register */
1133         outb(bank, iobase+BSR);
1134         
1135 } /* set_up_dongle_interface */
1136
1137 /*
1138  * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1139  *
1140  *    Change speed of the attach dongle
1141  *
1142  */
1143 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1144 {
1145         __u8 bank;
1146
1147         /* Save current bank */
1148         bank = inb(iobase+BSR);
1149
1150         /* Select Bank 7 */
1151         switch_bank(iobase, BANK7);
1152         
1153         /* IRCFG1: set according to dongle_id */
1154         switch (dongle_id) {
1155         case 0x00: /* same as */
1156         case 0x01: /* Differential serial interface */
1157                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1158                            __FUNCTION__, dongle_types[dongle_id]); 
1159                 break;
1160         case 0x02: /* same as */
1161         case 0x03: /* Reserved */
1162                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1163                            __FUNCTION__, dongle_types[dongle_id]); 
1164                 break;
1165         case 0x04: /* Sharp RY5HD01 */
1166                 break;
1167         case 0x05: /* Reserved */
1168                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1169                            __FUNCTION__, dongle_types[dongle_id]); 
1170                 break;
1171         case 0x06: /* Single-ended serial interface */
1172                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1173                            __FUNCTION__, dongle_types[dongle_id]); 
1174                 break;
1175         case 0x07: /* Consumer-IR only */
1176                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1177                            __FUNCTION__, dongle_types[dongle_id]); 
1178                 break;
1179         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1180                 IRDA_DEBUG(0, "%s(), %s\n", 
1181                            __FUNCTION__, dongle_types[dongle_id]); 
1182                 outb(0x00, iobase+4);
1183                 if (speed > 115200)
1184                         outb(0x01, iobase+4);
1185                 break;
1186         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1187                 outb(0x01, iobase+4);
1188
1189                 if (speed == 4000000) {
1190                         /* There was a cli() there, but we now are already
1191                          * under spin_lock_irqsave() - JeanII */
1192                         outb(0x81, iobase+4);
1193                         outb(0x80, iobase+4);
1194                 } else
1195                         outb(0x00, iobase+4);
1196                 break;
1197         case 0x0A: /* same as */
1198         case 0x0B: /* Reserved */
1199                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1200                            __FUNCTION__, dongle_types[dongle_id]); 
1201                 break;
1202         case 0x0C: /* same as */
1203         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1204                 break;
1205         case 0x0E: /* Supports SIR Mode only */
1206                 break;
1207         case 0x0F: /* No dongle connected */
1208                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1209                            __FUNCTION__, dongle_types[dongle_id]);
1210
1211                 switch_bank(iobase, BANK0); 
1212                 outb(0x62, iobase+MCR);
1213                 break;
1214         default: 
1215                 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__);
1216         }
1217         /* Restore bank register */
1218         outb(bank, iobase+BSR);
1219 }
1220
1221 /*
1222  * Function nsc_ircc_change_speed (self, baud)
1223  *
1224  *    Change the speed of the device
1225  *
1226  * This function *must* be called with irq off and spin-lock.
1227  */
1228 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1229 {
1230         struct net_device *dev = self->netdev;
1231         __u8 mcr = MCR_SIR;
1232         int iobase; 
1233         __u8 bank;
1234         __u8 ier;                  /* Interrupt enable register */
1235
1236         IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed);
1237
1238         IRDA_ASSERT(self != NULL, return 0;);
1239
1240         iobase = self->io.fir_base;
1241
1242         /* Update accounting for new speed */
1243         self->io.speed = speed;
1244
1245         /* Save current bank */
1246         bank = inb(iobase+BSR);
1247
1248         /* Disable interrupts */
1249         switch_bank(iobase, BANK0);
1250         outb(0, iobase+IER);
1251
1252         /* Select Bank 2 */
1253         switch_bank(iobase, BANK2);
1254
1255         outb(0x00, iobase+BGDH);
1256         switch (speed) {
1257         case 9600:   outb(0x0c, iobase+BGDL); break;
1258         case 19200:  outb(0x06, iobase+BGDL); break;
1259         case 38400:  outb(0x03, iobase+BGDL); break;
1260         case 57600:  outb(0x02, iobase+BGDL); break;
1261         case 115200: outb(0x01, iobase+BGDL); break;
1262         case 576000:
1263                 switch_bank(iobase, BANK5);
1264                 
1265                 /* IRCR2: MDRS is set */
1266                 outb(inb(iobase+4) | 0x04, iobase+4);
1267                
1268                 mcr = MCR_MIR;
1269                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
1270                 break;
1271         case 1152000:
1272                 mcr = MCR_MIR;
1273                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
1274                 break;
1275         case 4000000:
1276                 mcr = MCR_FIR;
1277                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
1278                 break;
1279         default:
1280                 mcr = MCR_FIR;
1281                 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n", 
1282                            __FUNCTION__, speed);
1283                 break;
1284         }
1285
1286         /* Set appropriate speed mode */
1287         switch_bank(iobase, BANK0);
1288         outb(mcr | MCR_TX_DFR, iobase+MCR);
1289
1290         /* Give some hits to the transceiver */
1291         nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1292
1293         /* Set FIFO threshold to TX17, RX16 */
1294         switch_bank(iobase, BANK0);
1295         outb(0x00, iobase+FCR);
1296         outb(FCR_FIFO_EN, iobase+FCR);
1297         outb(FCR_RXTH|     /* Set Rx FIFO threshold */
1298              FCR_TXTH|     /* Set Tx FIFO threshold */
1299              FCR_TXSR|     /* Reset Tx FIFO */
1300              FCR_RXSR|     /* Reset Rx FIFO */
1301              FCR_FIFO_EN,  /* Enable FIFOs */
1302              iobase+FCR);
1303         
1304         /* Set FIFO size to 32 */
1305         switch_bank(iobase, BANK2);
1306         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1307         
1308         /* Enable some interrupts so we can receive frames */
1309         switch_bank(iobase, BANK0); 
1310         if (speed > 115200) {
1311                 /* Install FIR xmit handler */
1312                 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1313                 ier = IER_SFIF_IE;
1314                 nsc_ircc_dma_receive(self);
1315         } else {
1316                 /* Install SIR xmit handler */
1317                 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1318                 ier = IER_RXHDL_IE;
1319         }
1320         /* Set our current interrupt mask */
1321         outb(ier, iobase+IER);
1322         
1323         /* Restore BSR */
1324         outb(bank, iobase+BSR);
1325
1326         /* Make sure interrupt handlers keep the proper interrupt mask */
1327         return(ier);
1328 }
1329
1330 /*
1331  * Function nsc_ircc_hard_xmit (skb, dev)
1332  *
1333  *    Transmit the frame!
1334  *
1335  */
1336 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1337 {
1338         struct nsc_ircc_cb *self;
1339         unsigned long flags;
1340         int iobase;
1341         __s32 speed;
1342         __u8 bank;
1343         
1344         self = (struct nsc_ircc_cb *) dev->priv;
1345
1346         IRDA_ASSERT(self != NULL, return 0;);
1347
1348         iobase = self->io.fir_base;
1349
1350         netif_stop_queue(dev);
1351                 
1352         /* Make sure tests *& speed change are atomic */
1353         spin_lock_irqsave(&self->lock, flags);
1354         
1355         /* Check if we need to change the speed */
1356         speed = irda_get_next_speed(skb);
1357         if ((speed != self->io.speed) && (speed != -1)) {
1358                 /* Check for empty frame. */
1359                 if (!skb->len) {
1360                         /* If we just sent a frame, we get called before
1361                          * the last bytes get out (because of the SIR FIFO).
1362                          * If this is the case, let interrupt handler change
1363                          * the speed itself... Jean II */
1364                         if (self->io.direction == IO_RECV) {
1365                                 nsc_ircc_change_speed(self, speed); 
1366                                 /* TODO : For SIR->SIR, the next packet
1367                                  * may get corrupted - Jean II */
1368                                 netif_wake_queue(dev);
1369                         } else {
1370                                 self->new_speed = speed;
1371                                 /* Queue will be restarted after speed change
1372                                  * to make sure packets gets through the
1373                                  * proper xmit handler - Jean II */
1374                         }
1375                         dev->trans_start = jiffies;
1376                         spin_unlock_irqrestore(&self->lock, flags);
1377                         dev_kfree_skb(skb);
1378                         return 0;
1379                 } else
1380                         self->new_speed = speed;
1381         }
1382
1383         /* Save current bank */
1384         bank = inb(iobase+BSR);
1385         
1386         self->tx_buff.data = self->tx_buff.head;
1387         
1388         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data, 
1389                                            self->tx_buff.truesize);
1390
1391         self->stats.tx_bytes += self->tx_buff.len;
1392         
1393         /* Add interrupt on tx low level (will fire immediately) */
1394         switch_bank(iobase, BANK0);
1395         outb(IER_TXLDL_IE, iobase+IER);
1396         
1397         /* Restore bank register */
1398         outb(bank, iobase+BSR);
1399
1400         dev->trans_start = jiffies;
1401         spin_unlock_irqrestore(&self->lock, flags);
1402
1403         dev_kfree_skb(skb);
1404
1405         return 0;
1406 }
1407
1408 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1409 {
1410         struct nsc_ircc_cb *self;
1411         unsigned long flags;
1412         int iobase;
1413         __s32 speed;
1414         __u8 bank;
1415         int mtt, diff;
1416         
1417         self = (struct nsc_ircc_cb *) dev->priv;
1418         iobase = self->io.fir_base;
1419
1420         netif_stop_queue(dev);
1421         
1422         /* Make sure tests *& speed change are atomic */
1423         spin_lock_irqsave(&self->lock, flags);
1424
1425         /* Check if we need to change the speed */
1426         speed = irda_get_next_speed(skb);
1427         if ((speed != self->io.speed) && (speed != -1)) {
1428                 /* Check for empty frame. */
1429                 if (!skb->len) {
1430                         /* If we are currently transmitting, defer to
1431                          * interrupt handler. - Jean II */
1432                         if(self->tx_fifo.len == 0) {
1433                                 nsc_ircc_change_speed(self, speed); 
1434                                 netif_wake_queue(dev);
1435                         } else {
1436                                 self->new_speed = speed;
1437                                 /* Keep queue stopped :
1438                                  * the speed change operation may change the
1439                                  * xmit handler, and we want to make sure
1440                                  * the next packet get through the proper
1441                                  * Tx path, so block the Tx queue until
1442                                  * the speed change has been done.
1443                                  * Jean II */
1444                         }
1445                         dev->trans_start = jiffies;
1446                         spin_unlock_irqrestore(&self->lock, flags);
1447                         dev_kfree_skb(skb);
1448                         return 0;
1449                 } else {
1450                         /* Change speed after current frame */
1451                         self->new_speed = speed;
1452                 }
1453         }
1454
1455         /* Save current bank */
1456         bank = inb(iobase+BSR);
1457
1458         /* Register and copy this frame to DMA memory */
1459         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1460         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1461         self->tx_fifo.tail += skb->len;
1462
1463         self->stats.tx_bytes += skb->len;
1464
1465         memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data, 
1466                skb->len);
1467         
1468         self->tx_fifo.len++;
1469         self->tx_fifo.free++;
1470
1471         /* Start transmit only if there is currently no transmit going on */
1472         if (self->tx_fifo.len == 1) {
1473                 /* Check if we must wait the min turn time or not */
1474                 mtt = irda_get_mtt(skb);
1475                 if (mtt) {
1476                         /* Check how much time we have used already */
1477                         do_gettimeofday(&self->now);
1478                         diff = self->now.tv_usec - self->stamp.tv_usec;
1479                         if (diff < 0) 
1480                                 diff += 1000000;
1481                         
1482                         /* Check if the mtt is larger than the time we have
1483                          * already used by all the protocol processing
1484                          */
1485                         if (mtt > diff) {
1486                                 mtt -= diff;
1487
1488                                 /* 
1489                                  * Use timer if delay larger than 125 us, and
1490                                  * use udelay for smaller values which should
1491                                  * be acceptable
1492                                  */
1493                                 if (mtt > 125) {
1494                                         /* Adjust for timer resolution */
1495                                         mtt = mtt / 125;
1496                                         
1497                                         /* Setup timer */
1498                                         switch_bank(iobase, BANK4);
1499                                         outb(mtt & 0xff, iobase+TMRL);
1500                                         outb((mtt >> 8) & 0x0f, iobase+TMRH);
1501                                         
1502                                         /* Start timer */
1503                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1504                                         self->io.direction = IO_XMIT;
1505                                         
1506                                         /* Enable timer interrupt */
1507                                         switch_bank(iobase, BANK0);
1508                                         outb(IER_TMR_IE, iobase+IER);
1509                                         
1510                                         /* Timer will take care of the rest */
1511                                         goto out; 
1512                                 } else
1513                                         udelay(mtt);
1514                         }
1515                 }               
1516                 /* Enable DMA interrupt */
1517                 switch_bank(iobase, BANK0);
1518                 outb(IER_DMA_IE, iobase+IER);
1519
1520                 /* Transmit frame */
1521                 nsc_ircc_dma_xmit(self, iobase);
1522         }
1523  out:
1524         /* Not busy transmitting anymore if window is not full,
1525          * and if we don't need to change speed */
1526         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1527                 netif_wake_queue(self->netdev);
1528
1529         /* Restore bank register */
1530         outb(bank, iobase+BSR);
1531
1532         dev->trans_start = jiffies;
1533         spin_unlock_irqrestore(&self->lock, flags);
1534         dev_kfree_skb(skb);
1535
1536         return 0;
1537 }
1538
1539 /*
1540  * Function nsc_ircc_dma_xmit (self, iobase)
1541  *
1542  *    Transmit data using DMA
1543  *
1544  */
1545 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1546 {
1547         int bsr;
1548
1549         /* Save current bank */
1550         bsr = inb(iobase+BSR);
1551
1552         /* Disable DMA */
1553         switch_bank(iobase, BANK0);
1554         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1555         
1556         self->io.direction = IO_XMIT;
1557         
1558         /* Choose transmit DMA channel  */ 
1559         switch_bank(iobase, BANK2);
1560         outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1561         
1562         irda_setup_dma(self->io.dma, 
1563                        ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1564                         self->tx_buff.head) + self->tx_buff_dma,
1565                        self->tx_fifo.queue[self->tx_fifo.ptr].len, 
1566                        DMA_TX_MODE);
1567
1568         /* Enable DMA and SIR interaction pulse */
1569         switch_bank(iobase, BANK0);     
1570         outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1571
1572         /* Restore bank register */
1573         outb(bsr, iobase+BSR);
1574 }
1575
1576 /*
1577  * Function nsc_ircc_pio_xmit (self, iobase)
1578  *
1579  *    Transmit data using PIO. Returns the number of bytes that actually
1580  *    got transferred
1581  *
1582  */
1583 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1584 {
1585         int actual = 0;
1586         __u8 bank;
1587         
1588         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1589
1590         /* Save current bank */
1591         bank = inb(iobase+BSR);
1592
1593         switch_bank(iobase, BANK0);
1594         if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1595                 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1596                            __FUNCTION__);
1597
1598                 /* FIFO may still be filled to the Tx interrupt threshold */
1599                 fifo_size -= 17;
1600         }
1601
1602         /* Fill FIFO with current frame */
1603         while ((fifo_size-- > 0) && (actual < len)) {
1604                 /* Transmit next byte */
1605                 outb(buf[actual++], iobase+TXD);
1606         }
1607         
1608         IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n", 
1609                    __FUNCTION__, fifo_size, actual, len);
1610         
1611         /* Restore bank */
1612         outb(bank, iobase+BSR);
1613
1614         return actual;
1615 }
1616
1617 /*
1618  * Function nsc_ircc_dma_xmit_complete (self)
1619  *
1620  *    The transfer of a frame in finished. This function will only be called 
1621  *    by the interrupt handler
1622  *
1623  */
1624 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1625 {
1626         int iobase;
1627         __u8 bank;
1628         int ret = TRUE;
1629
1630         IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
1631
1632         iobase = self->io.fir_base;
1633
1634         /* Save current bank */
1635         bank = inb(iobase+BSR);
1636
1637         /* Disable DMA */
1638         switch_bank(iobase, BANK0);
1639         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1640         
1641         /* Check for underrrun! */
1642         if (inb(iobase+ASCR) & ASCR_TXUR) {
1643                 self->stats.tx_errors++;
1644                 self->stats.tx_fifo_errors++;
1645                 
1646                 /* Clear bit, by writing 1 into it */
1647                 outb(ASCR_TXUR, iobase+ASCR);
1648         } else {
1649                 self->stats.tx_packets++;
1650         }
1651
1652         /* Finished with this frame, so prepare for next */
1653         self->tx_fifo.ptr++;
1654         self->tx_fifo.len--;
1655
1656         /* Any frames to be sent back-to-back? */
1657         if (self->tx_fifo.len) {
1658                 nsc_ircc_dma_xmit(self, iobase);
1659                 
1660                 /* Not finished yet! */
1661                 ret = FALSE;
1662         } else {
1663                 /* Reset Tx FIFO info */
1664                 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1665                 self->tx_fifo.tail = self->tx_buff.head;
1666         }
1667
1668         /* Make sure we have room for more frames and
1669          * that we don't need to change speed */
1670         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1671                 /* Not busy transmitting anymore */
1672                 /* Tell the network layer, that we can accept more frames */
1673                 netif_wake_queue(self->netdev);
1674         }
1675
1676         /* Restore bank */
1677         outb(bank, iobase+BSR);
1678         
1679         return ret;
1680 }
1681
1682 /*
1683  * Function nsc_ircc_dma_receive (self)
1684  *
1685  *    Get ready for receiving a frame. The device will initiate a DMA
1686  *    if it starts to receive a frame.
1687  *
1688  */
1689 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self) 
1690 {
1691         int iobase;
1692         __u8 bsr;
1693
1694         iobase = self->io.fir_base;
1695
1696         /* Reset Tx FIFO info */
1697         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1698         self->tx_fifo.tail = self->tx_buff.head;
1699
1700         /* Save current bank */
1701         bsr = inb(iobase+BSR);
1702
1703         /* Disable DMA */
1704         switch_bank(iobase, BANK0);
1705         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1706
1707         /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1708         switch_bank(iobase, BANK2);
1709         outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1710
1711         self->io.direction = IO_RECV;
1712         self->rx_buff.data = self->rx_buff.head;
1713         
1714         /* Reset Rx FIFO. This will also flush the ST_FIFO */
1715         switch_bank(iobase, BANK0);
1716         outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1717
1718         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1719         self->st_fifo.tail = self->st_fifo.head = 0;
1720         
1721         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1722                        DMA_RX_MODE);
1723
1724         /* Enable DMA */
1725         switch_bank(iobase, BANK0);
1726         outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1727
1728         /* Restore bank register */
1729         outb(bsr, iobase+BSR);
1730         
1731         return 0;
1732 }
1733
1734 /*
1735  * Function nsc_ircc_dma_receive_complete (self)
1736  *
1737  *    Finished with receiving frames
1738  *
1739  *    
1740  */
1741 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1742 {
1743         struct st_fifo *st_fifo;
1744         struct sk_buff *skb;
1745         __u8 status;
1746         __u8 bank;
1747         int len;
1748
1749         st_fifo = &self->st_fifo;
1750
1751         /* Save current bank */
1752         bank = inb(iobase+BSR);
1753         
1754         /* Read all entries in status FIFO */
1755         switch_bank(iobase, BANK5);
1756         while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1757                 /* We must empty the status FIFO no matter what */
1758                 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1759
1760                 if (st_fifo->tail >= MAX_RX_WINDOW) {
1761                         IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__);
1762                         continue;
1763                 }
1764                         
1765                 st_fifo->entries[st_fifo->tail].status = status;
1766                 st_fifo->entries[st_fifo->tail].len = len;
1767                 st_fifo->pending_bytes += len;
1768                 st_fifo->tail++;
1769                 st_fifo->len++;
1770         }
1771         /* Try to process all entries in status FIFO */
1772         while (st_fifo->len > 0) {
1773                 /* Get first entry */
1774                 status = st_fifo->entries[st_fifo->head].status;
1775                 len    = st_fifo->entries[st_fifo->head].len;
1776                 st_fifo->pending_bytes -= len;
1777                 st_fifo->head++;
1778                 st_fifo->len--;
1779
1780                 /* Check for errors */
1781                 if (status & FRM_ST_ERR_MSK) {
1782                         if (status & FRM_ST_LOST_FR) {
1783                                 /* Add number of lost frames to stats */
1784                                 self->stats.rx_errors += len;   
1785                         } else {
1786                                 /* Skip frame */
1787                                 self->stats.rx_errors++;
1788                                 
1789                                 self->rx_buff.data += len;
1790                         
1791                                 if (status & FRM_ST_MAX_LEN)
1792                                         self->stats.rx_length_errors++;
1793                                 
1794                                 if (status & FRM_ST_PHY_ERR) 
1795                                         self->stats.rx_frame_errors++;
1796                                 
1797                                 if (status & FRM_ST_BAD_CRC) 
1798                                         self->stats.rx_crc_errors++;
1799                         }
1800                         /* The errors below can be reported in both cases */
1801                         if (status & FRM_ST_OVR1)
1802                                 self->stats.rx_fifo_errors++;                  
1803                         
1804                         if (status & FRM_ST_OVR2)
1805                                 self->stats.rx_fifo_errors++;
1806                 } else {
1807                         /*  
1808                          * First we must make sure that the frame we
1809                          * want to deliver is all in main memory. If we
1810                          * cannot tell, then we check if the Rx FIFO is
1811                          * empty. If not then we will have to take a nap
1812                          * and try again later.  
1813                          */
1814                         if (st_fifo->pending_bytes < self->io.fifo_size) {
1815                                 switch_bank(iobase, BANK0);
1816                                 if (inb(iobase+LSR) & LSR_RXDA) {
1817                                         /* Put this entry back in fifo */
1818                                         st_fifo->head--;
1819                                         st_fifo->len++;
1820                                         st_fifo->pending_bytes += len;
1821                                         st_fifo->entries[st_fifo->head].status = status;
1822                                         st_fifo->entries[st_fifo->head].len = len;
1823                                         /*  
1824                                          * DMA not finished yet, so try again 
1825                                          * later, set timer value, resolution 
1826                                          * 125 us 
1827                                          */
1828                                         switch_bank(iobase, BANK4);
1829                                         outb(0x02, iobase+TMRL); /* x 125 us */
1830                                         outb(0x00, iobase+TMRH);
1831
1832                                         /* Start timer */
1833                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1834
1835                                         /* Restore bank register */
1836                                         outb(bank, iobase+BSR);
1837                                         
1838                                         return FALSE; /* I'll be back! */
1839                                 }
1840                         }
1841
1842                         /* 
1843                          * Remember the time we received this frame, so we can
1844                          * reduce the min turn time a bit since we will know
1845                          * how much time we have used for protocol processing
1846                          */
1847                         do_gettimeofday(&self->stamp);
1848
1849                         skb = dev_alloc_skb(len+1);
1850                         if (skb == NULL)  {
1851                                 IRDA_WARNING("%s(), memory squeeze, "
1852                                              "dropping frame.\n",
1853                                              __FUNCTION__);
1854                                 self->stats.rx_dropped++;
1855
1856                                 /* Restore bank register */
1857                                 outb(bank, iobase+BSR);
1858
1859                                 return FALSE;
1860                         }
1861                         
1862                         /* Make sure IP header gets aligned */
1863                         skb_reserve(skb, 1); 
1864
1865                         /* Copy frame without CRC */
1866                         if (self->io.speed < 4000000) {
1867                                 skb_put(skb, len-2);
1868                                 memcpy(skb->data, self->rx_buff.data, len-2);
1869                         } else {
1870                                 skb_put(skb, len-4);
1871                                 memcpy(skb->data, self->rx_buff.data, len-4);
1872                         }
1873
1874                         /* Move to next frame */
1875                         self->rx_buff.data += len;
1876                         self->stats.rx_bytes += len;
1877                         self->stats.rx_packets++;
1878
1879                         skb->dev = self->netdev;
1880                         skb->mac.raw  = skb->data;
1881                         skb->protocol = htons(ETH_P_IRDA);
1882                         netif_rx(skb);
1883                         self->netdev->last_rx = jiffies;
1884                 }
1885         }
1886         /* Restore bank register */
1887         outb(bank, iobase+BSR);
1888
1889         return TRUE;
1890 }
1891
1892 /*
1893  * Function nsc_ircc_pio_receive (self)
1894  *
1895  *    Receive all data in receiver FIFO
1896  *
1897  */
1898 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self) 
1899 {
1900         __u8 byte;
1901         int iobase;
1902
1903         iobase = self->io.fir_base;
1904         
1905         /*  Receive all characters in Rx FIFO */
1906         do {
1907                 byte = inb(iobase+RXD);
1908                 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff, 
1909                                   byte);
1910         } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */      
1911 }
1912
1913 /*
1914  * Function nsc_ircc_sir_interrupt (self, eir)
1915  *
1916  *    Handle SIR interrupt
1917  *
1918  */
1919 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1920 {
1921         int actual;
1922
1923         /* Check if transmit FIFO is low on data */
1924         if (eir & EIR_TXLDL_EV) {
1925                 /* Write data left in transmit buffer */
1926                 actual = nsc_ircc_pio_write(self->io.fir_base, 
1927                                            self->tx_buff.data, 
1928                                            self->tx_buff.len, 
1929                                            self->io.fifo_size);
1930                 self->tx_buff.data += actual;
1931                 self->tx_buff.len  -= actual;
1932                 
1933                 self->io.direction = IO_XMIT;
1934
1935                 /* Check if finished */
1936                 if (self->tx_buff.len > 0)
1937                         self->ier = IER_TXLDL_IE;
1938                 else { 
1939
1940                         self->stats.tx_packets++;
1941                         netif_wake_queue(self->netdev);
1942                         self->ier = IER_TXEMP_IE;
1943                 }
1944                         
1945         }
1946         /* Check if transmission has completed */
1947         if (eir & EIR_TXEMP_EV) {
1948                 /* Turn around and get ready to receive some data */
1949                 self->io.direction = IO_RECV;
1950                 self->ier = IER_RXHDL_IE;
1951                 /* Check if we need to change the speed?
1952                  * Need to be after self->io.direction to avoid race with
1953                  * nsc_ircc_hard_xmit_sir() - Jean II */
1954                 if (self->new_speed) {
1955                         IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1956                         self->ier = nsc_ircc_change_speed(self,
1957                                                           self->new_speed);
1958                         self->new_speed = 0;
1959                         netif_wake_queue(self->netdev);
1960
1961                         /* Check if we are going to FIR */
1962                         if (self->io.speed > 115200) {
1963                                 /* No need to do anymore SIR stuff */
1964                                 return;
1965                         }
1966                 }
1967         }
1968
1969         /* Rx FIFO threshold or timeout */
1970         if (eir & EIR_RXHDL_EV) {
1971                 nsc_ircc_pio_receive(self);
1972
1973                 /* Keep receiving */
1974                 self->ier = IER_RXHDL_IE;
1975         }
1976 }
1977
1978 /*
1979  * Function nsc_ircc_fir_interrupt (self, eir)
1980  *
1981  *    Handle MIR/FIR interrupt
1982  *
1983  */
1984 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase, 
1985                                    int eir)
1986 {
1987         __u8 bank;
1988
1989         bank = inb(iobase+BSR);
1990         
1991         /* Status FIFO event*/
1992         if (eir & EIR_SFIF_EV) {
1993                 /* Check if DMA has finished */
1994                 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1995                         /* Wait for next status FIFO interrupt */
1996                         self->ier = IER_SFIF_IE;
1997                 } else {
1998                         self->ier = IER_SFIF_IE | IER_TMR_IE;
1999                 }
2000         } else if (eir & EIR_TMR_EV) { /* Timer finished */
2001                 /* Disable timer */
2002                 switch_bank(iobase, BANK4);
2003                 outb(0, iobase+IRCR1);
2004
2005                 /* Clear timer event */
2006                 switch_bank(iobase, BANK0);
2007                 outb(ASCR_CTE, iobase+ASCR);
2008
2009                 /* Check if this is a Tx timer interrupt */
2010                 if (self->io.direction == IO_XMIT) {
2011                         nsc_ircc_dma_xmit(self, iobase);
2012
2013                         /* Interrupt on DMA */
2014                         self->ier = IER_DMA_IE;
2015                 } else {
2016                         /* Check (again) if DMA has finished */
2017                         if (nsc_ircc_dma_receive_complete(self, iobase)) {
2018                                 self->ier = IER_SFIF_IE;
2019                         } else {
2020                                 self->ier = IER_SFIF_IE | IER_TMR_IE;
2021                         }
2022                 }
2023         } else if (eir & EIR_DMA_EV) {
2024                 /* Finished with all transmissions? */
2025                 if (nsc_ircc_dma_xmit_complete(self)) {
2026                         if(self->new_speed != 0) {
2027                                 /* As we stop the Tx queue, the speed change
2028                                  * need to be done when the Tx fifo is
2029                                  * empty. Ask for a Tx done interrupt */
2030                                 self->ier = IER_TXEMP_IE;
2031                         } else {
2032                                 /* Check if there are more frames to be
2033                                  * transmitted */
2034                                 if (irda_device_txqueue_empty(self->netdev)) {
2035                                         /* Prepare for receive */
2036                                         nsc_ircc_dma_receive(self);
2037                                         self->ier = IER_SFIF_IE;
2038                                 } else
2039                                         IRDA_WARNING("%s(), potential "
2040                                                      "Tx queue lockup !\n",
2041                                                      __FUNCTION__);
2042                         }
2043                 } else {
2044                         /*  Not finished yet, so interrupt on DMA again */
2045                         self->ier = IER_DMA_IE;
2046                 }
2047         } else if (eir & EIR_TXEMP_EV) {
2048                 /* The Tx FIFO has totally drained out, so now we can change
2049                  * the speed... - Jean II */
2050                 self->ier = nsc_ircc_change_speed(self, self->new_speed);
2051                 self->new_speed = 0;
2052                 netif_wake_queue(self->netdev);
2053                 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2054         }
2055
2056         outb(bank, iobase+BSR);
2057 }
2058
2059 /*
2060  * Function nsc_ircc_interrupt (irq, dev_id, regs)
2061  *
2062  *    An interrupt from the chip has arrived. Time to do some work
2063  *
2064  */
2065 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id,
2066                                 struct pt_regs *regs)
2067 {
2068         struct net_device *dev = (struct net_device *) dev_id;
2069         struct nsc_ircc_cb *self;
2070         __u8 bsr, eir;
2071         int iobase;
2072
2073         if (!dev) {
2074                 IRDA_WARNING("%s: irq %d for unknown device.\n",
2075                              driver_name, irq);
2076                 return IRQ_NONE;
2077         }
2078         self = (struct nsc_ircc_cb *) dev->priv;
2079
2080         spin_lock(&self->lock); 
2081
2082         iobase = self->io.fir_base;
2083
2084         bsr = inb(iobase+BSR);  /* Save current bank */
2085
2086         switch_bank(iobase, BANK0);     
2087         self->ier = inb(iobase+IER); 
2088         eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */ 
2089
2090         outb(0, iobase+IER); /* Disable interrupts */
2091         
2092         if (eir) {
2093                 /* Dispatch interrupt handler for the current speed */
2094                 if (self->io.speed > 115200)
2095                         nsc_ircc_fir_interrupt(self, iobase, eir);
2096                 else
2097                         nsc_ircc_sir_interrupt(self, eir);
2098         }
2099         
2100         outb(self->ier, iobase+IER); /* Restore interrupts */
2101         outb(bsr, iobase+BSR);       /* Restore bank register */
2102
2103         spin_unlock(&self->lock);
2104         return IRQ_RETVAL(eir);
2105 }
2106
2107 /*
2108  * Function nsc_ircc_is_receiving (self)
2109  *
2110  *    Return TRUE is we are currently receiving a frame
2111  *
2112  */
2113 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2114 {
2115         unsigned long flags;
2116         int status = FALSE;
2117         int iobase;
2118         __u8 bank;
2119
2120         IRDA_ASSERT(self != NULL, return FALSE;);
2121
2122         spin_lock_irqsave(&self->lock, flags);
2123
2124         if (self->io.speed > 115200) {
2125                 iobase = self->io.fir_base;
2126
2127                 /* Check if rx FIFO is not empty */
2128                 bank = inb(iobase+BSR);
2129                 switch_bank(iobase, BANK2);
2130                 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2131                         /* We are receiving something */
2132                         status =  TRUE;
2133                 }
2134                 outb(bank, iobase+BSR);
2135         } else 
2136                 status = (self->rx_buff.state != OUTSIDE_FRAME);
2137         
2138         spin_unlock_irqrestore(&self->lock, flags);
2139
2140         return status;
2141 }
2142
2143 /*
2144  * Function nsc_ircc_net_open (dev)
2145  *
2146  *    Start the device
2147  *
2148  */
2149 static int nsc_ircc_net_open(struct net_device *dev)
2150 {
2151         struct nsc_ircc_cb *self;
2152         int iobase;
2153         char hwname[32];
2154         __u8 bank;
2155         
2156         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2157         
2158         IRDA_ASSERT(dev != NULL, return -1;);
2159         self = (struct nsc_ircc_cb *) dev->priv;
2160         
2161         IRDA_ASSERT(self != NULL, return 0;);
2162         
2163         iobase = self->io.fir_base;
2164         
2165         if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2166                 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2167                              driver_name, self->io.irq);
2168                 return -EAGAIN;
2169         }
2170         /*
2171          * Always allocate the DMA channel after the IRQ, and clean up on 
2172          * failure.
2173          */
2174         if (request_dma(self->io.dma, dev->name)) {
2175                 IRDA_WARNING("%s, unable to allocate dma=%d\n",
2176                              driver_name, self->io.dma);
2177                 free_irq(self->io.irq, dev);
2178                 return -EAGAIN;
2179         }
2180         
2181         /* Save current bank */
2182         bank = inb(iobase+BSR);
2183         
2184         /* turn on interrupts */
2185         switch_bank(iobase, BANK0);
2186         outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2187
2188         /* Restore bank register */
2189         outb(bank, iobase+BSR);
2190
2191         /* Ready to play! */
2192         netif_start_queue(dev);
2193         
2194         /* Give self a hardware name */
2195         sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2196
2197         /* 
2198          * Open new IrLAP layer instance, now that everything should be
2199          * initialized properly 
2200          */
2201         self->irlap = irlap_open(dev, &self->qos, hwname);
2202
2203         return 0;
2204 }
2205
2206 /*
2207  * Function nsc_ircc_net_close (dev)
2208  *
2209  *    Stop the device
2210  *
2211  */
2212 static int nsc_ircc_net_close(struct net_device *dev)
2213 {
2214         struct nsc_ircc_cb *self;
2215         int iobase;
2216         __u8 bank;
2217
2218         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2219         
2220         IRDA_ASSERT(dev != NULL, return -1;);
2221
2222         self = (struct nsc_ircc_cb *) dev->priv;
2223         IRDA_ASSERT(self != NULL, return 0;);
2224
2225         /* Stop device */
2226         netif_stop_queue(dev);
2227         
2228         /* Stop and remove instance of IrLAP */
2229         if (self->irlap)
2230                 irlap_close(self->irlap);
2231         self->irlap = NULL;
2232         
2233         iobase = self->io.fir_base;
2234
2235         disable_dma(self->io.dma);
2236
2237         /* Save current bank */
2238         bank = inb(iobase+BSR);
2239
2240         /* Disable interrupts */
2241         switch_bank(iobase, BANK0);
2242         outb(0, iobase+IER); 
2243        
2244         free_irq(self->io.irq, dev);
2245         free_dma(self->io.dma);
2246
2247         /* Restore bank register */
2248         outb(bank, iobase+BSR);
2249
2250         return 0;
2251 }
2252
2253 /*
2254  * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2255  *
2256  *    Process IOCTL commands for this device
2257  *
2258  */
2259 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2260 {
2261         struct if_irda_req *irq = (struct if_irda_req *) rq;
2262         struct nsc_ircc_cb *self;
2263         unsigned long flags;
2264         int ret = 0;
2265
2266         IRDA_ASSERT(dev != NULL, return -1;);
2267
2268         self = dev->priv;
2269
2270         IRDA_ASSERT(self != NULL, return -1;);
2271
2272         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
2273         
2274         switch (cmd) {
2275         case SIOCSBANDWIDTH: /* Set bandwidth */
2276                 if (!capable(CAP_NET_ADMIN)) {
2277                         ret = -EPERM;
2278                         break;
2279                 }
2280                 spin_lock_irqsave(&self->lock, flags);
2281                 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2282                 spin_unlock_irqrestore(&self->lock, flags);
2283                 break;
2284         case SIOCSMEDIABUSY: /* Set media busy */
2285                 if (!capable(CAP_NET_ADMIN)) {
2286                         ret = -EPERM;
2287                         break;
2288                 }
2289                 irda_device_set_media_busy(self->netdev, TRUE);
2290                 break;
2291         case SIOCGRECEIVING: /* Check if we are receiving right now */
2292                 /* This is already protected */
2293                 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2294                 break;
2295         default:
2296                 ret = -EOPNOTSUPP;
2297         }
2298         return ret;
2299 }
2300
2301 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2302 {
2303         struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2304         
2305         return &self->stats;
2306 }
2307
2308 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
2309 {
2310         struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2311         int bank;
2312         unsigned long flags;
2313         int iobase = self->io.fir_base;
2314
2315         if (self->io.suspended)
2316                 return 0;
2317
2318         IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
2319
2320         rtnl_lock();
2321         if (netif_running(self->netdev)) {
2322                 netif_device_detach(self->netdev);
2323                 spin_lock_irqsave(&self->lock, flags);
2324                 /* Save current bank */
2325                 bank = inb(iobase+BSR);
2326
2327                 /* Disable interrupts */
2328                 switch_bank(iobase, BANK0);
2329                 outb(0, iobase+IER);
2330
2331                 /* Restore bank register */
2332                 outb(bank, iobase+BSR);
2333
2334                 spin_unlock_irqrestore(&self->lock, flags);
2335                 free_irq(self->io.irq, self->netdev);
2336                 disable_dma(self->io.dma);
2337         }
2338         self->io.suspended = 1;
2339         rtnl_unlock();
2340
2341         return 0;
2342 }
2343
2344 static int nsc_ircc_resume(struct platform_device *dev)
2345 {
2346         struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2347         unsigned long flags;
2348
2349         if (!self->io.suspended)
2350                 return 0;
2351
2352         IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2353
2354         rtnl_lock();
2355         nsc_ircc_setup(&self->io);
2356         nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
2357
2358         if (netif_running(self->netdev)) {
2359                 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2360                                 self->netdev->name, self->netdev)) {
2361                         IRDA_WARNING("%s, unable to allocate irq=%d\n",
2362                                      driver_name, self->io.irq);
2363
2364                         /*
2365                          * Don't fail resume process, just kill this
2366                          * network interface
2367                          */
2368                         unregister_netdevice(self->netdev);
2369                 } else {
2370                         spin_lock_irqsave(&self->lock, flags);
2371                         nsc_ircc_change_speed(self, self->io.speed);
2372                         spin_unlock_irqrestore(&self->lock, flags);
2373                         netif_device_attach(self->netdev);
2374                 }
2375
2376         } else {
2377                 spin_lock_irqsave(&self->lock, flags);
2378                 nsc_ircc_change_speed(self, 9600);
2379                 spin_unlock_irqrestore(&self->lock, flags);
2380         }
2381         self->io.suspended = 0;
2382         rtnl_unlock();
2383
2384         return 0;
2385 }
2386
2387 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2388 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2389 MODULE_LICENSE("GPL");
2390
2391
2392 module_param(qos_mtt_bits, int, 0);
2393 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2394 module_param_array(io, int, NULL, 0);
2395 MODULE_PARM_DESC(io, "Base I/O addresses");
2396 module_param_array(irq, int, NULL, 0);
2397 MODULE_PARM_DESC(irq, "IRQ lines");
2398 module_param_array(dma, int, NULL, 0);
2399 MODULE_PARM_DESC(dma, "DMA channels");
2400 module_param(dongle_id, int, 0);
2401 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2402
2403 module_init(nsc_ircc_init);
2404 module_exit(nsc_ircc_cleanup);
2405