Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[sfrench/cifs-2.6.git] / drivers / net / hamradio / baycom_epp.c
1 /*****************************************************************************/
2
3 /*
4  *      baycom_epp.c  -- baycom epp radio modem driver.
5  *
6  *      Copyright (C) 1998-2000
7  *          Thomas Sailer (sailer@ife.ee.ethz.ch)
8  *
9  *      This program is free software; you can redistribute it and/or modify
10  *      it under the terms of the GNU General Public License as published by
11  *      the Free Software Foundation; either version 2 of the License, or
12  *      (at your option) any later version.
13  *
14  *      This program is distributed in the hope that it will be useful,
15  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *      GNU General Public License for more details.
18  *
19  *      You should have received a copy of the GNU General Public License
20  *      along with this program; if not, write to the Free Software
21  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  *
23  *  Please note that the GPL allows you to use the driver, NOT the radio.
24  *  In order to use the radio, you need a license from the communications
25  *  authority of your country.
26  *
27  *
28  *  History:
29  *   0.1  xx.xx.1998  Initial version by Matthias Welwarsky (dg2fef)
30  *   0.2  21.04.1998  Massive rework by Thomas Sailer
31  *                    Integrated FPGA EPP modem configuration routines
32  *   0.3  11.05.1998  Took FPGA config out and moved it into a separate program
33  *   0.4  26.07.1999  Adapted to new lowlevel parport driver interface
34  *   0.5  03.08.1999  adapt to Linus' new __setup/__initcall
35  *                    removed some pre-2.2 kernel compatibility cruft
36  *   0.6  10.08.1999  Check if parport can do SPP and is safe to access during interrupt contexts
37  *   0.7  12.02.2000  adapted to softnet driver interface
38  *
39  */
40
41 /*****************************************************************************/
42
43 #include <linux/crc-ccitt.h>
44 #include <linux/module.h>
45 #include <linux/kernel.h>
46 #include <linux/init.h>
47 #include <linux/string.h>
48 #include <linux/workqueue.h>
49 #include <linux/fs.h>
50 #include <linux/parport.h>
51 #include <linux/if_arp.h>
52 #include <linux/hdlcdrv.h>
53 #include <linux/baycom.h>
54 #include <linux/jiffies.h>
55 #include <net/ax25.h> 
56 #include <asm/uaccess.h>
57
58 /* --------------------------------------------------------------------- */
59
60 #define BAYCOM_DEBUG
61 #define BAYCOM_MAGIC 19730510
62
63 /* --------------------------------------------------------------------- */
64
65 static const char paranoia_str[] = KERN_ERR 
66         "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n";
67
68 static const char bc_drvname[] = "baycom_epp";
69 static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n"
70 KERN_INFO "baycom_epp: version 0.7 compiled " __TIME__ " " __DATE__ "\n";
71
72 /* --------------------------------------------------------------------- */
73
74 #define NR_PORTS 4
75
76 static struct net_device *baycom_device[NR_PORTS];
77
78 /* --------------------------------------------------------------------- */
79
80 /* EPP status register */
81 #define EPP_DCDBIT      0x80
82 #define EPP_PTTBIT      0x08
83 #define EPP_NREF        0x01
84 #define EPP_NRAEF       0x02
85 #define EPP_NRHF        0x04
86 #define EPP_NTHF        0x20
87 #define EPP_NTAEF       0x10
88 #define EPP_NTEF        EPP_PTTBIT
89
90 /* EPP control register */
91 #define EPP_TX_FIFO_ENABLE 0x10
92 #define EPP_RX_FIFO_ENABLE 0x08
93 #define EPP_MODEM_ENABLE   0x20
94 #define EPP_LEDS           0xC0
95 #define EPP_IRQ_ENABLE     0x10
96
97 /* LPT registers */
98 #define LPTREG_ECONTROL       0x402
99 #define LPTREG_CONFIGB        0x401
100 #define LPTREG_CONFIGA        0x400
101 #define LPTREG_EPPDATA        0x004
102 #define LPTREG_EPPADDR        0x003
103 #define LPTREG_CONTROL        0x002
104 #define LPTREG_STATUS         0x001
105 #define LPTREG_DATA           0x000
106
107 /* LPT control register */
108 #define LPTCTRL_PROGRAM       0x04   /* 0 to reprogram */
109 #define LPTCTRL_WRITE         0x01
110 #define LPTCTRL_ADDRSTB       0x08
111 #define LPTCTRL_DATASTB       0x02
112 #define LPTCTRL_INTEN         0x10
113
114 /* LPT status register */
115 #define LPTSTAT_SHIFT_NINTR   6
116 #define LPTSTAT_WAIT          0x80
117 #define LPTSTAT_NINTR         (1<<LPTSTAT_SHIFT_NINTR)
118 #define LPTSTAT_PE            0x20
119 #define LPTSTAT_DONE          0x10
120 #define LPTSTAT_NERROR        0x08
121 #define LPTSTAT_EPPTIMEOUT    0x01
122
123 /* LPT data register */
124 #define LPTDATA_SHIFT_TDI     0
125 #define LPTDATA_SHIFT_TMS     2
126 #define LPTDATA_TDI           (1<<LPTDATA_SHIFT_TDI)
127 #define LPTDATA_TCK           0x02
128 #define LPTDATA_TMS           (1<<LPTDATA_SHIFT_TMS)
129 #define LPTDATA_INITBIAS      0x80
130
131
132 /* EPP modem config/status bits */
133 #define EPP_DCDBIT            0x80
134 #define EPP_PTTBIT            0x08
135 #define EPP_RXEBIT            0x01
136 #define EPP_RXAEBIT           0x02
137 #define EPP_RXHFULL           0x04
138
139 #define EPP_NTHF              0x20
140 #define EPP_NTAEF             0x10
141 #define EPP_NTEF              EPP_PTTBIT
142
143 #define EPP_TX_FIFO_ENABLE    0x10
144 #define EPP_RX_FIFO_ENABLE    0x08
145 #define EPP_MODEM_ENABLE      0x20
146 #define EPP_LEDS              0xC0
147 #define EPP_IRQ_ENABLE        0x10
148
149 /* Xilinx 4k JTAG instructions */
150 #define XC4K_IRLENGTH   3
151 #define XC4K_EXTEST     0
152 #define XC4K_PRELOAD    1
153 #define XC4K_CONFIGURE  5
154 #define XC4K_BYPASS     7
155
156 #define EPP_CONVENTIONAL  0
157 #define EPP_FPGA          1
158 #define EPP_FPGAEXTSTATUS 2
159
160 #define TXBUFFER_SIZE     ((HDLCDRV_MAXFLEN*6/5)+8)
161
162 /* ---------------------------------------------------------------------- */
163 /*
164  * Information that need to be kept for each board.
165  */
166
167 struct baycom_state {
168         int magic;
169
170         struct pardevice *pdev;
171         unsigned int work_running;
172         struct work_struct run_work;
173         unsigned int modem;
174         unsigned int bitrate;
175         unsigned char stat;
176
177         struct {
178                 unsigned int intclk;
179                 unsigned int fclk;
180                 unsigned int bps;
181                 unsigned int extmodem;
182                 unsigned int loopback;
183         } cfg;
184
185         struct hdlcdrv_channel_params ch_params;
186
187         struct {
188                 unsigned int bitbuf, bitstream, numbits, state;
189                 unsigned char *bufptr;
190                 int bufcnt;
191                 unsigned char buf[TXBUFFER_SIZE];
192         } hdlcrx;
193
194         struct {
195                 int calibrate;
196                 int slotcnt;
197                 int flags;
198                 enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state;
199                 unsigned char *bufptr;
200                 int bufcnt;
201                 unsigned char buf[TXBUFFER_SIZE];
202         } hdlctx;
203
204         struct net_device_stats stats;
205         unsigned int ptt_keyed;
206         struct sk_buff *skb;  /* next transmit packet  */
207
208 #ifdef BAYCOM_DEBUG
209         struct debug_vals {
210                 unsigned long last_jiffies;
211                 unsigned cur_intcnt;
212                 unsigned last_intcnt;
213                 int cur_pllcorr;
214                 int last_pllcorr;
215                 unsigned int mod_cycles;
216                 unsigned int demod_cycles;
217         } debug_vals;
218 #endif /* BAYCOM_DEBUG */
219 };
220
221 /* --------------------------------------------------------------------- */
222
223 #define KISS_VERBOSE
224
225 /* --------------------------------------------------------------------- */
226
227 #define PARAM_TXDELAY   1
228 #define PARAM_PERSIST   2
229 #define PARAM_SLOTTIME  3
230 #define PARAM_TXTAIL    4
231 #define PARAM_FULLDUP   5
232 #define PARAM_HARDWARE  6
233 #define PARAM_RETURN    255
234
235 /* --------------------------------------------------------------------- */
236 /*
237  * the CRC routines are stolen from WAMPES
238  * by Dieter Deyke
239  */
240
241
242 /*---------------------------------------------------------------------------*/
243
244 #if 0
245 static inline void append_crc_ccitt(unsigned char *buffer, int len)
246 {
247         unsigned int crc = 0xffff;
248
249         for (;len>0;len--)
250                 crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff];
251         crc ^= 0xffff;
252         *buffer++ = crc;
253         *buffer++ = crc >> 8;
254 }
255 #endif
256
257 /*---------------------------------------------------------------------------*/
258
259 static inline int check_crc_ccitt(const unsigned char *buf, int cnt)
260 {
261         return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8;
262 }
263
264 /*---------------------------------------------------------------------------*/
265
266 static inline int calc_crc_ccitt(const unsigned char *buf, int cnt)
267 {
268         return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff;
269 }
270
271 /* ---------------------------------------------------------------------- */
272
273 #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800)
274
275 /* --------------------------------------------------------------------- */
276
277 static inline void baycom_int_freq(struct baycom_state *bc)
278 {
279 #ifdef BAYCOM_DEBUG
280         unsigned long cur_jiffies = jiffies;
281         /*
282          * measure the interrupt frequency
283          */
284         bc->debug_vals.cur_intcnt++;
285         if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
286                 bc->debug_vals.last_jiffies = cur_jiffies;
287                 bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
288                 bc->debug_vals.cur_intcnt = 0;
289                 bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
290                 bc->debug_vals.cur_pllcorr = 0;
291         }
292 #endif /* BAYCOM_DEBUG */
293 }
294
295 /* ---------------------------------------------------------------------- */
296 /*
297  *    eppconfig_path should be setable  via /proc/sys.
298  */
299
300 static char eppconfig_path[256] = "/usr/sbin/eppfpga";
301
302 static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL };
303
304 /* eppconfig: called during ifconfig up to configure the modem */
305 static int eppconfig(struct baycom_state *bc)
306 {
307         char modearg[256];
308         char portarg[16];
309         char *argv[] = { eppconfig_path, "-s", "-p", portarg, "-m", modearg,
310                          NULL };
311
312         /* set up arguments */
313         sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat",
314                 bc->cfg.intclk ? "int" : "ext",
315                 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
316                 (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps),
317                 bc->cfg.loopback ? ",loopback" : "");
318         sprintf(portarg, "%ld", bc->pdev->port->base);
319         printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg);
320
321         return call_usermodehelper(eppconfig_path, argv, envp, 1);
322 }
323
324 /* ---------------------------------------------------------------------- */
325
326 static void epp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
327 {
328 }
329
330 /* ---------------------------------------------------------------------- */
331
332 static inline void do_kiss_params(struct baycom_state *bc,
333                                   unsigned char *data, unsigned long len)
334 {
335
336 #ifdef KISS_VERBOSE
337 #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b)
338 #else /* KISS_VERBOSE */              
339 #define PKP(a,b) 
340 #endif /* KISS_VERBOSE */             
341
342         if (len < 2)
343                 return;
344         switch(data[0]) {
345         case PARAM_TXDELAY:
346                 bc->ch_params.tx_delay = data[1];
347                 PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay);
348                 break;
349         case PARAM_PERSIST:   
350                 bc->ch_params.ppersist = data[1];
351                 PKP("p persistence = %u", bc->ch_params.ppersist);
352                 break;
353         case PARAM_SLOTTIME:  
354                 bc->ch_params.slottime = data[1];
355                 PKP("slot time = %ums", bc->ch_params.slottime);
356                 break;
357         case PARAM_TXTAIL:    
358                 bc->ch_params.tx_tail = data[1];
359                 PKP("TX tail = %ums", bc->ch_params.tx_tail);
360                 break;
361         case PARAM_FULLDUP:   
362                 bc->ch_params.fulldup = !!data[1];
363                 PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half");
364                 break;
365         default:
366                 break;
367         }
368 #undef PKP
369 }
370
371 /* --------------------------------------------------------------------- */
372
373 static void encode_hdlc(struct baycom_state *bc)
374 {
375         struct sk_buff *skb;
376         unsigned char *wp, *bp;
377         int pkt_len;
378         unsigned bitstream, notbitstream, bitbuf, numbit, crc;
379         unsigned char crcarr[2];
380         int j;
381         
382         if (bc->hdlctx.bufcnt > 0)
383                 return;
384         skb = bc->skb;
385         if (!skb)
386                 return;
387         bc->skb = NULL;
388         pkt_len = skb->len-1; /* strip KISS byte */
389         wp = bc->hdlctx.buf;
390         bp = skb->data+1;
391         crc = calc_crc_ccitt(bp, pkt_len);
392         crcarr[0] = crc;
393         crcarr[1] = crc >> 8;
394         *wp++ = 0x7e;
395         bitstream = bitbuf = numbit = 0;
396         while (pkt_len > -2) {
397                 bitstream >>= 8;
398                 bitstream |= ((unsigned int)*bp) << 8;
399                 bitbuf |= ((unsigned int)*bp) << numbit;
400                 notbitstream = ~bitstream;
401                 bp++;
402                 pkt_len--;
403                 if (!pkt_len)
404                         bp = crcarr;
405                 for (j = 0; j < 8; j++)
406                         if (unlikely(!(notbitstream & (0x1f0 << j)))) {
407                                 bitstream &= ~(0x100 << j);
408                                 bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) |
409                                         ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1);
410                                 numbit++;
411                                 notbitstream = ~bitstream;
412                         }
413                 numbit += 8;
414                 while (numbit >= 8) {
415                         *wp++ = bitbuf;
416                         bitbuf >>= 8;
417                         numbit -= 8;
418                 }
419         }
420         bitbuf |= 0x7e7e << numbit;
421         numbit += 16;
422         while (numbit >= 8) {
423                 *wp++ = bitbuf;
424                 bitbuf >>= 8;
425                 numbit -= 8;
426         }
427         bc->hdlctx.bufptr = bc->hdlctx.buf;
428         bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
429         dev_kfree_skb(skb);
430         bc->stats.tx_packets++;
431 }
432
433 /* ---------------------------------------------------------------------- */
434
435 static unsigned short random_seed;
436
437 static inline unsigned short random_num(void)
438 {
439         random_seed = 28629 * random_seed + 157;
440         return random_seed;
441 }
442
443 /* ---------------------------------------------------------------------- */
444
445 static int transmit(struct baycom_state *bc, int cnt, unsigned char stat)
446 {
447         struct parport *pp = bc->pdev->port;
448         unsigned char tmp[128];
449         int i, j;
450
451         if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
452                 bc->hdlctx.state = tx_idle;
453         if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
454                 if (bc->hdlctx.bufcnt <= 0)
455                         encode_hdlc(bc);
456                 if (bc->hdlctx.bufcnt <= 0)
457                         return 0;
458                 if (!bc->ch_params.fulldup) {
459                         if (!(stat & EPP_DCDBIT)) {
460                                 bc->hdlctx.slotcnt = bc->ch_params.slottime;
461                                 return 0;
462                         }
463                         if ((--bc->hdlctx.slotcnt) > 0)
464                                 return 0;
465                         bc->hdlctx.slotcnt = bc->ch_params.slottime;
466                         if ((random_num() % 256) > bc->ch_params.ppersist)
467                                 return 0;
468                 }
469         }
470         if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
471                 bc->hdlctx.state = tx_keyup;
472                 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
473                 bc->ptt_keyed++;
474         }
475         while (cnt > 0) {
476                 switch (bc->hdlctx.state) {
477                 case tx_keyup:
478                         i = min_t(int, cnt, bc->hdlctx.flags);
479                         cnt -= i;
480                         bc->hdlctx.flags -= i;
481                         if (bc->hdlctx.flags <= 0)
482                                 bc->hdlctx.state = tx_data;
483                         memset(tmp, 0x7e, sizeof(tmp));
484                         while (i > 0) {
485                                 j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
486                                 if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
487                                         return -1;
488                                 i -= j;
489                         }
490                         break;
491
492                 case tx_data:
493                         if (bc->hdlctx.bufcnt <= 0) {
494                                 encode_hdlc(bc);
495                                 if (bc->hdlctx.bufcnt <= 0) {
496                                         bc->hdlctx.state = tx_tail;
497                                         bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
498                                         break;
499                                 }
500                         }
501                         i = min_t(int, cnt, bc->hdlctx.bufcnt);
502                         bc->hdlctx.bufcnt -= i;
503                         cnt -= i;
504                         if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
505                                         return -1;
506                         bc->hdlctx.bufptr += i;
507                         break;
508                         
509                 case tx_tail:
510                         encode_hdlc(bc);
511                         if (bc->hdlctx.bufcnt > 0) {
512                                 bc->hdlctx.state = tx_data;
513                                 break;
514                         }
515                         i = min_t(int, cnt, bc->hdlctx.flags);
516                         if (i) {
517                                 cnt -= i;
518                                 bc->hdlctx.flags -= i;
519                                 memset(tmp, 0x7e, sizeof(tmp));
520                                 while (i > 0) {
521                                         j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
522                                         if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
523                                                 return -1;
524                                         i -= j;
525                                 }
526                                 break;
527                         }
528
529                 default:  /* fall through */
530                         if (bc->hdlctx.calibrate <= 0)
531                                 return 0;
532                         i = min_t(int, cnt, bc->hdlctx.calibrate);
533                         cnt -= i;
534                         bc->hdlctx.calibrate -= i;
535                         memset(tmp, 0, sizeof(tmp));
536                         while (i > 0) {
537                                 j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
538                                 if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
539                                         return -1;
540                                 i -= j;
541                         }
542                         break;
543                 }
544         }
545         return 0;
546 }
547
548 /* ---------------------------------------------------------------------- */
549
550 static void do_rxpacket(struct net_device *dev)
551 {
552         struct baycom_state *bc = netdev_priv(dev);
553         struct sk_buff *skb;
554         unsigned char *cp;
555         unsigned pktlen;
556
557         if (bc->hdlcrx.bufcnt < 4) 
558                 return;
559         if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt)) 
560                 return;
561         pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */
562         if (!(skb = dev_alloc_skb(pktlen))) {
563                 printk("%s: memory squeeze, dropping packet\n", dev->name);
564                 bc->stats.rx_dropped++;
565                 return;
566         }
567         cp = skb_put(skb, pktlen);
568         *cp++ = 0; /* KISS kludge */
569         memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
570         skb->protocol = ax25_type_trans(skb, dev);
571         netif_rx(skb);
572         dev->last_rx = jiffies;
573         bc->stats.rx_packets++;
574 }
575
576 static int receive(struct net_device *dev, int cnt)
577 {
578         struct baycom_state *bc = netdev_priv(dev);
579         struct parport *pp = bc->pdev->port;
580         unsigned int bitbuf, notbitstream, bitstream, numbits, state;
581         unsigned char tmp[128];
582         unsigned char *cp;
583         int cnt2, ret = 0;
584         int j;
585         
586         numbits = bc->hdlcrx.numbits;
587         state = bc->hdlcrx.state;
588         bitstream = bc->hdlcrx.bitstream;
589         bitbuf = bc->hdlcrx.bitbuf;
590         while (cnt > 0) {
591                 cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt;
592                 cnt -= cnt2;
593                 if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) {
594                         ret = -1;
595                         break;
596                 }
597                 cp = tmp;
598                 for (; cnt2 > 0; cnt2--, cp++) {
599                         bitstream >>= 8;
600                         bitstream |= (*cp) << 8;
601                         bitbuf >>= 8;
602                         bitbuf |= (*cp) << 8;
603                         numbits += 8;
604                         notbitstream = ~bitstream;
605                         for (j = 0; j < 8; j++) {
606
607                                 /* flag or abort */
608                                 if (unlikely(!(notbitstream & (0x0fc << j)))) {
609
610                                         /* abort received */
611                                         if (!(notbitstream & (0x1fc << j)))
612                                                 state = 0;
613
614                                         /* not flag received */
615                                         else if (!(bitstream & (0x1fe << j)) != (0x0fc << j)) {
616                                                 if (state)
617                                                         do_rxpacket(dev);
618                                                 bc->hdlcrx.bufcnt = 0;
619                                                 bc->hdlcrx.bufptr = bc->hdlcrx.buf;
620                                                 state = 1;
621                                                 numbits = 7-j;
622                                                 }
623                                         }
624
625                                 /* stuffed bit */
626                                 else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) {
627                                         numbits--;
628                                         bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1);
629                                         }
630                                 }
631                         while (state && numbits >= 8) {
632                                 if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) {
633                                         state = 0;
634                                 } else {
635                                         *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits);
636                                         bc->hdlcrx.bufcnt++;
637                                         numbits -= 8;
638                                 }
639                         }
640                 }
641         }
642         bc->hdlcrx.numbits = numbits;
643         bc->hdlcrx.state = state;
644         bc->hdlcrx.bitstream = bitstream;
645         bc->hdlcrx.bitbuf = bitbuf;
646         return ret;
647 }
648
649 /* --------------------------------------------------------------------- */
650
651 #ifdef __i386__
652 #include <asm/msr.h>
653 #define GETTICK(x)                                                \
654 ({                                                                \
655         if (cpu_has_tsc)                                          \
656                 rdtscl(x);                                        \
657 })
658 #else /* __i386__ */
659 #define GETTICK(x)
660 #endif /* __i386__ */
661
662 static void epp_bh(struct net_device *dev)
663 {
664         struct baycom_state *bc;
665         struct parport *pp;
666         unsigned char stat;
667         unsigned char tmp[2];
668         unsigned int time1 = 0, time2 = 0, time3 = 0;
669         int cnt, cnt2;
670         
671         bc = netdev_priv(dev);
672         if (!bc->work_running)
673                 return;
674         baycom_int_freq(bc);
675         pp = bc->pdev->port;
676         /* update status */
677         if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
678                 goto epptimeout;
679         bc->stat = stat;
680         bc->debug_vals.last_pllcorr = stat;
681         GETTICK(time1);
682         if (bc->modem == EPP_FPGAEXTSTATUS) {
683                 /* get input count */
684                 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1;
685                 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
686                         goto epptimeout;
687                 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
688                         goto epptimeout;
689                 cnt = tmp[0] | (tmp[1] << 8);
690                 cnt &= 0x7fff;
691                 /* get output count */
692                 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2;
693                 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
694                         goto epptimeout;
695                 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
696                         goto epptimeout;
697                 cnt2 = tmp[0] | (tmp[1] << 8);
698                 cnt2 = 16384 - (cnt2 & 0x7fff);
699                 /* return to normal */
700                 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
701                 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
702                         goto epptimeout;
703                 if (transmit(bc, cnt2, stat))
704                         goto epptimeout;
705                 GETTICK(time2);
706                 if (receive(dev, cnt))
707                         goto epptimeout;
708                 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
709                         goto epptimeout;
710                 bc->stat = stat;
711         } else {
712                 /* try to tx */
713                 switch (stat & (EPP_NTAEF|EPP_NTHF)) {
714                 case EPP_NTHF:
715                         cnt = 2048 - 256;
716                         break;
717                 
718                 case EPP_NTAEF:
719                         cnt = 2048 - 1793;
720                         break;
721                 
722                 case 0:
723                         cnt = 0;
724                         break;
725                 
726                 default:
727                         cnt = 2048 - 1025;
728                         break;
729                 }
730                 if (transmit(bc, cnt, stat))
731                         goto epptimeout;
732                 GETTICK(time2);
733                 /* do receiver */
734                 while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) {
735                         switch (stat & (EPP_NRAEF|EPP_NRHF)) {
736                         case EPP_NRAEF:
737                                 cnt = 1025;
738                                 break;
739
740                         case 0:
741                                 cnt = 1793;
742                                 break;
743
744                         default:
745                                 cnt = 256;
746                                 break;
747                         }
748                         if (receive(dev, cnt))
749                                 goto epptimeout;
750                         if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
751                                 goto epptimeout;
752                 }
753                 cnt = 0;
754                 if (bc->bitrate < 50000)
755                         cnt = 256;
756                 else if (bc->bitrate < 100000)
757                         cnt = 128;
758                 while (cnt > 0 && stat & EPP_NREF) {
759                         if (receive(dev, 1))
760                                 goto epptimeout;
761                         cnt--;
762                         if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
763                                 goto epptimeout;
764                 }
765         }
766         GETTICK(time3);
767 #ifdef BAYCOM_DEBUG
768         bc->debug_vals.mod_cycles = time2 - time1;
769         bc->debug_vals.demod_cycles = time3 - time2;
770 #endif /* BAYCOM_DEBUG */
771         schedule_delayed_work(&bc->run_work, 1);
772         if (!bc->skb)
773                 netif_wake_queue(dev);
774         return;
775  epptimeout:
776         printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname);
777 }
778
779 /* ---------------------------------------------------------------------- */
780 /*
781  * ===================== network driver interface =========================
782  */
783
784 static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev)
785 {
786         struct baycom_state *bc = netdev_priv(dev);
787
788         if (skb->data[0] != 0) {
789                 do_kiss_params(bc, skb->data, skb->len);
790                 dev_kfree_skb(skb);
791                 return 0;
792         }
793         if (bc->skb)
794                 return -1;
795         /* strip KISS byte */
796         if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) {
797                 dev_kfree_skb(skb);
798                 return 0;
799         }
800         netif_stop_queue(dev);
801         bc->skb = skb;
802         return 0;
803 }
804
805 /* --------------------------------------------------------------------- */
806
807 static int baycom_set_mac_address(struct net_device *dev, void *addr)
808 {
809         struct sockaddr *sa = (struct sockaddr *)addr;
810
811         /* addr is an AX.25 shifted ASCII mac address */
812         memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); 
813         return 0;                                         
814 }
815
816 /* --------------------------------------------------------------------- */
817
818 static struct net_device_stats *baycom_get_stats(struct net_device *dev)
819 {
820         struct baycom_state *bc = netdev_priv(dev);
821
822         /* 
823          * Get the current statistics.  This may be called with the
824          * card open or closed. 
825          */
826         return &bc->stats;
827 }
828
829 /* --------------------------------------------------------------------- */
830
831 static void epp_wakeup(void *handle)
832 {
833         struct net_device *dev = (struct net_device *)handle;
834         struct baycom_state *bc = netdev_priv(dev);
835
836         printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name);
837         if (!parport_claim(bc->pdev))
838                 printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name);
839 }
840
841 /* --------------------------------------------------------------------- */
842
843 /*
844  * Open/initialize the board. This is called (in the current kernel)
845  * sometime after booting when the 'ifconfig' program is run.
846  *
847  * This routine should set everything up anew at each open, even
848  * registers that "should" only need to be set once at boot, so that
849  * there is non-reboot way to recover if something goes wrong.
850  */
851
852 static int epp_open(struct net_device *dev)
853 {
854         struct baycom_state *bc = netdev_priv(dev);
855         struct parport *pp = parport_find_base(dev->base_addr);
856         unsigned int i, j;
857         unsigned char tmp[128];
858         unsigned char stat;
859         unsigned long tstart;
860         
861         if (!pp) {
862                 printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr);
863                 return -ENXIO;
864         }
865 #if 0
866         if (pp->irq < 0) {
867                 printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base);
868                 parport_put_port(pp);
869                 return -ENXIO;
870         }
871 #endif
872         if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
873                 printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n",
874                        bc_drvname, pp->base);
875                 parport_put_port(pp);
876                 return -EIO;
877         }
878         memset(&bc->modem, 0, sizeof(bc->modem));
879         bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup, 
880                                         epp_interrupt, PARPORT_DEV_EXCL, dev);
881         parport_put_port(pp);
882         if (!bc->pdev) {
883                 printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base);
884                 return -ENXIO;
885         }
886         if (parport_claim(bc->pdev)) {
887                 printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base);
888                 parport_unregister_device(bc->pdev);
889                 return -EBUSY;
890         }
891         dev->irq = /*pp->irq*/ 0;
892         INIT_WORK(&bc->run_work, (void *)(void *)epp_bh, dev);
893         bc->work_running = 1;
894         bc->modem = EPP_CONVENTIONAL;
895         if (eppconfig(bc))
896                 printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname);
897         else
898                 bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS;
899         parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */
900         /* reset the modem */
901         tmp[0] = 0;
902         tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
903         if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2)
904                 goto epptimeout;
905         /* autoprobe baud rate */
906         tstart = jiffies;
907         i = 0;
908         while ((signed)(jiffies-tstart-HZ/3) < 0) {
909                 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
910                         goto epptimeout;
911                 if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
912                         schedule();
913                         continue;
914                 }
915                 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
916                         goto epptimeout;
917                 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
918                         goto epptimeout;
919                 i += 256;
920         }
921         for (j = 0; j < 256; j++) {
922                 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
923                         goto epptimeout;
924                 if (!(stat & EPP_NREF))
925                         break;
926                 if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1)
927                         goto epptimeout;
928                 i++;
929         }
930         tstart = jiffies - tstart;
931         bc->bitrate = i * (8 * HZ) / tstart;
932         j = 1;
933         i = bc->bitrate >> 3;
934         while (j < 7 && i > 150) {
935                 j++;
936                 i >>= 1;
937         }
938         printk(KERN_INFO "%s: autoprobed bitrate: %d  int divider: %d  int rate: %d\n", 
939                bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2));
940         tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/;
941         if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
942                 goto epptimeout;
943         /*
944          * initialise hdlc variables
945          */
946         bc->hdlcrx.state = 0;
947         bc->hdlcrx.numbits = 0;
948         bc->hdlctx.state = tx_idle;
949         bc->hdlctx.bufcnt = 0;
950         bc->hdlctx.slotcnt = bc->ch_params.slottime;
951         bc->hdlctx.calibrate = 0;
952         /* start the bottom half stuff */
953         schedule_delayed_work(&bc->run_work, 1);
954         netif_start_queue(dev);
955         return 0;
956
957  epptimeout:
958         printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname);
959         parport_write_control(pp, 0); /* reset the adapter */
960         parport_release(bc->pdev);
961         parport_unregister_device(bc->pdev);
962         return -EIO;
963 }
964
965 /* --------------------------------------------------------------------- */
966
967 static int epp_close(struct net_device *dev)
968 {
969         struct baycom_state *bc = netdev_priv(dev);
970         struct parport *pp = bc->pdev->port;
971         unsigned char tmp[1];
972
973         bc->work_running = 0;
974         flush_scheduled_work();
975         bc->stat = EPP_DCDBIT;
976         tmp[0] = 0;
977         pp->ops->epp_write_addr(pp, tmp, 1, 0);
978         parport_write_control(pp, 0); /* reset the adapter */
979         parport_release(bc->pdev);
980         parport_unregister_device(bc->pdev);
981         if (bc->skb)
982                 dev_kfree_skb(bc->skb);
983         bc->skb = NULL;
984         printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n",
985                bc_drvname, dev->base_addr, dev->irq);
986         return 0;
987 }
988
989 /* --------------------------------------------------------------------- */
990
991 static int baycom_setmode(struct baycom_state *bc, const char *modestr)
992 {
993         const char *cp;
994
995         if (strstr(modestr,"intclk"))
996                 bc->cfg.intclk = 1;
997         if (strstr(modestr,"extclk"))
998                 bc->cfg.intclk = 0;
999         if (strstr(modestr,"intmodem"))
1000                 bc->cfg.extmodem = 0;
1001         if (strstr(modestr,"extmodem"))
1002                 bc->cfg.extmodem = 1;
1003         if (strstr(modestr,"noloopback"))
1004                 bc->cfg.loopback = 0;
1005         if (strstr(modestr,"loopback"))
1006                 bc->cfg.loopback = 1;
1007         if ((cp = strstr(modestr,"fclk="))) {
1008                 bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0);
1009                 if (bc->cfg.fclk < 1000000)
1010                         bc->cfg.fclk = 1000000;
1011                 if (bc->cfg.fclk > 25000000)
1012                         bc->cfg.fclk = 25000000;
1013         }
1014         if ((cp = strstr(modestr,"bps="))) {
1015                 bc->cfg.bps = simple_strtoul(cp+4, NULL, 0);
1016                 if (bc->cfg.bps < 1000)
1017                         bc->cfg.bps = 1000;
1018                 if (bc->cfg.bps > 1500000)
1019                         bc->cfg.bps = 1500000;
1020         }
1021         return 0;
1022 }
1023
1024 /* --------------------------------------------------------------------- */
1025
1026 static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1027 {
1028         struct baycom_state *bc = netdev_priv(dev);
1029         struct hdlcdrv_ioctl hi;
1030
1031         if (cmd != SIOCDEVPRIVATE)
1032                 return -ENOIOCTLCMD;
1033
1034         if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi)))
1035                 return -EFAULT;
1036         switch (hi.cmd) {
1037         default:
1038                 return -ENOIOCTLCMD;
1039
1040         case HDLCDRVCTL_GETCHANNELPAR:
1041                 hi.data.cp.tx_delay = bc->ch_params.tx_delay;
1042                 hi.data.cp.tx_tail = bc->ch_params.tx_tail;
1043                 hi.data.cp.slottime = bc->ch_params.slottime;
1044                 hi.data.cp.ppersist = bc->ch_params.ppersist;
1045                 hi.data.cp.fulldup = bc->ch_params.fulldup;
1046                 break;
1047
1048         case HDLCDRVCTL_SETCHANNELPAR:
1049                 if (!capable(CAP_NET_ADMIN))
1050                         return -EACCES;
1051                 bc->ch_params.tx_delay = hi.data.cp.tx_delay;
1052                 bc->ch_params.tx_tail = hi.data.cp.tx_tail;
1053                 bc->ch_params.slottime = hi.data.cp.slottime;
1054                 bc->ch_params.ppersist = hi.data.cp.ppersist;
1055                 bc->ch_params.fulldup = hi.data.cp.fulldup;
1056                 bc->hdlctx.slotcnt = 1;
1057                 return 0;
1058                 
1059         case HDLCDRVCTL_GETMODEMPAR:
1060                 hi.data.mp.iobase = dev->base_addr;
1061                 hi.data.mp.irq = dev->irq;
1062                 hi.data.mp.dma = dev->dma;
1063                 hi.data.mp.dma2 = 0;
1064                 hi.data.mp.seriobase = 0;
1065                 hi.data.mp.pariobase = 0;
1066                 hi.data.mp.midiiobase = 0;
1067                 break;
1068
1069         case HDLCDRVCTL_SETMODEMPAR:
1070                 if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev))
1071                         return -EACCES;
1072                 dev->base_addr = hi.data.mp.iobase;
1073                 dev->irq = /*hi.data.mp.irq*/0;
1074                 dev->dma = /*hi.data.mp.dma*/0;
1075                 return 0;       
1076                 
1077         case HDLCDRVCTL_GETSTAT:
1078                 hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT);
1079                 hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT);
1080                 hi.data.cs.ptt_keyed = bc->ptt_keyed;
1081                 hi.data.cs.tx_packets = bc->stats.tx_packets;
1082                 hi.data.cs.tx_errors = bc->stats.tx_errors;
1083                 hi.data.cs.rx_packets = bc->stats.rx_packets;
1084                 hi.data.cs.rx_errors = bc->stats.rx_errors;
1085                 break;          
1086
1087         case HDLCDRVCTL_OLDGETSTAT:
1088                 hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT);
1089                 hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT);
1090                 hi.data.ocs.ptt_keyed = bc->ptt_keyed;
1091                 break;          
1092
1093         case HDLCDRVCTL_CALIBRATE:
1094                 if (!capable(CAP_SYS_RAWIO))
1095                         return -EACCES;
1096                 bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;
1097                 return 0;
1098
1099         case HDLCDRVCTL_DRIVERNAME:
1100                 strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));
1101                 break;
1102                 
1103         case HDLCDRVCTL_GETMODE:
1104                 sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s", 
1105                         bc->cfg.intclk ? "int" : "ext",
1106                         bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
1107                         bc->cfg.loopback ? ",loopback" : "");
1108                 break;
1109
1110         case HDLCDRVCTL_SETMODE:
1111                 if (!capable(CAP_NET_ADMIN) || netif_running(dev))
1112                         return -EACCES;
1113                 hi.data.modename[sizeof(hi.data.modename)-1] = '\0';
1114                 return baycom_setmode(bc, hi.data.modename);
1115
1116         case HDLCDRVCTL_MODELIST:
1117                 strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",
1118                         sizeof(hi.data.modename));
1119                 break;
1120
1121         case HDLCDRVCTL_MODEMPARMASK:
1122                 return HDLCDRV_PARMASK_IOBASE;
1123
1124         }
1125         if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi)))
1126                 return -EFAULT;
1127         return 0;
1128 }
1129
1130 /* --------------------------------------------------------------------- */
1131
1132 /*
1133  * Check for a network adaptor of this type, and return '0' if one exists.
1134  * If dev->base_addr == 0, probe all likely locations.
1135  * If dev->base_addr == 1, always return failure.
1136  * If dev->base_addr == 2, allocate space for the device and return success
1137  * (detachable devices only).
1138  */
1139 static void baycom_probe(struct net_device *dev)
1140 {
1141         static char ax25_bcast[AX25_ADDR_LEN] = {
1142                 'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1
1143         };
1144         static char ax25_nocall[AX25_ADDR_LEN] = {
1145                 'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1
1146         };
1147         const struct hdlcdrv_channel_params dflt_ch_params = { 
1148                 20, 2, 10, 40, 0 
1149         };
1150         struct baycom_state *bc;
1151
1152         /*
1153          * not a real probe! only initialize data structures
1154          */
1155         bc = netdev_priv(dev);
1156         /*
1157          * initialize the baycom_state struct
1158          */
1159         bc->ch_params = dflt_ch_params;
1160         bc->ptt_keyed = 0;
1161
1162         /*
1163          * initialize the device struct
1164          */
1165         dev->open = epp_open;
1166         dev->stop = epp_close;
1167         dev->do_ioctl = baycom_ioctl;
1168         dev->hard_start_xmit = baycom_send_packet;
1169         dev->get_stats = baycom_get_stats;
1170
1171         /* Fill in the fields of the device structure */
1172         bc->skb = NULL;
1173         
1174         dev->hard_header = ax25_hard_header;
1175         dev->rebuild_header = ax25_rebuild_header;
1176         dev->set_mac_address = baycom_set_mac_address;
1177         
1178         dev->type = ARPHRD_AX25;           /* AF_AX25 device */
1179         dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
1180         dev->mtu = AX25_DEF_PACLEN;        /* eth_mtu is the default */
1181         dev->addr_len = AX25_ADDR_LEN;     /* sizeof an ax.25 address */
1182         memcpy(dev->broadcast, ax25_bcast, AX25_ADDR_LEN);
1183         memcpy(dev->dev_addr, ax25_nocall, AX25_ADDR_LEN);
1184         dev->tx_queue_len = 16;
1185
1186         /* New style flags */
1187         dev->flags = 0;
1188 }
1189
1190 /* --------------------------------------------------------------------- */
1191
1192 /*
1193  * command line settable parameters
1194  */
1195 static const char *mode[NR_PORTS] = { "", };
1196 static int iobase[NR_PORTS] = { 0x378, };
1197
1198 module_param_array(mode, charp, NULL, 0);
1199 MODULE_PARM_DESC(mode, "baycom operating mode");
1200 module_param_array(iobase, int, NULL, 0);
1201 MODULE_PARM_DESC(iobase, "baycom io base address");
1202
1203 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
1204 MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
1205 MODULE_LICENSE("GPL");
1206
1207 /* --------------------------------------------------------------------- */
1208
1209 static void __init baycom_epp_dev_setup(struct net_device *dev)
1210 {
1211         struct baycom_state *bc = netdev_priv(dev);
1212
1213         /*
1214          * initialize part of the baycom_state struct
1215          */
1216         bc->magic = BAYCOM_MAGIC;
1217         bc->cfg.fclk = 19666600;
1218         bc->cfg.bps = 9600;
1219         /*
1220          * initialize part of the device struct
1221          */
1222         baycom_probe(dev);
1223 }
1224
1225 static int __init init_baycomepp(void)
1226 {
1227         int i, found = 0;
1228         char set_hw = 1;
1229
1230         printk(bc_drvinfo);
1231         /*
1232          * register net devices
1233          */
1234         for (i = 0; i < NR_PORTS; i++) {
1235                 struct net_device *dev;
1236                 
1237                 dev = alloc_netdev(sizeof(struct baycom_state), "bce%d",
1238                                    baycom_epp_dev_setup);
1239
1240                 if (!dev) {
1241                         printk(KERN_WARNING "bce%d : out of memory\n", i);
1242                         return found ? 0 : -ENOMEM;
1243                 }
1244                         
1245                 sprintf(dev->name, "bce%d", i);
1246                 dev->base_addr = iobase[i];
1247
1248                 if (!mode[i])
1249                         set_hw = 0;
1250                 if (!set_hw)
1251                         iobase[i] = 0;
1252
1253                 if (register_netdev(dev)) {
1254                         printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name);
1255                         free_netdev(dev);
1256                         break;
1257                 }
1258                 if (set_hw && baycom_setmode(netdev_priv(dev), mode[i]))
1259                         set_hw = 0;
1260                 baycom_device[i] = dev;
1261                 found++;
1262         }
1263
1264         return found ? 0 : -ENXIO;
1265 }
1266
1267 static void __exit cleanup_baycomepp(void)
1268 {
1269         int i;
1270
1271         for(i = 0; i < NR_PORTS; i++) {
1272                 struct net_device *dev = baycom_device[i];
1273
1274                 if (dev) {
1275                         struct baycom_state *bc = netdev_priv(dev);
1276                         if (bc->magic == BAYCOM_MAGIC) {
1277                                 unregister_netdev(dev);
1278                                 free_netdev(dev);
1279                         } else
1280                                 printk(paranoia_str, "cleanup_module");
1281                 }
1282         }
1283 }
1284
1285 module_init(init_baycomepp);
1286 module_exit(cleanup_baycomepp);
1287
1288 /* --------------------------------------------------------------------- */
1289
1290 #ifndef MODULE
1291
1292 /*
1293  * format: baycom_epp=io,mode
1294  * mode: fpga config options
1295  */
1296
1297 static int __init baycom_epp_setup(char *str)
1298 {
1299         static unsigned __initdata nr_dev = 0;
1300         int ints[2];
1301
1302         if (nr_dev >= NR_PORTS)
1303                 return 0;
1304         str = get_options(str, 2, ints);
1305         if (ints[0] < 1)
1306                 return 0;
1307         mode[nr_dev] = str;
1308         iobase[nr_dev] = ints[1];
1309         nr_dev++;
1310         return 1;
1311 }
1312
1313 __setup("baycom_epp=", baycom_epp_setup);
1314
1315 #endif /* MODULE */
1316 /* --------------------------------------------------------------------- */