1 /*******************************************************************************
2 Copyright (C) 2013 Vayavya Labs Pvt Ltd
4 This implements all the API for managing HW timestamp & PTP.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 The full GNU General Public License is included in this distribution in
16 the file called "COPYING".
18 Author: Rayagond Kokatanur <rayagond@vayavyalabs.com>
19 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
20 *******************************************************************************/
23 #include <linux/delay.h>
25 #include "stmmac_ptp.h"
27 static void stmmac_config_hw_tstamping(void __iomem *ioaddr, u32 data)
29 writel(data, ioaddr + PTP_TCR);
32 static u32 stmmac_config_sub_second_increment(void __iomem *ioaddr,
33 u32 ptp_clock, int gmac4)
35 u32 value = readl(ioaddr + PTP_TCR);
39 /* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
40 * formula = (1/ptp_clock) * 1000000000
41 * where ptp_clock is 50MHz if fine method is used to update system
43 if (value & PTP_TCR_TSCFUPDT)
44 data = (1000000000ULL / 50000000);
46 data = (1000000000ULL / ptp_clock);
48 /* 0.465ns accuracy */
49 if (!(value & PTP_TCR_TSCTRLSSR))
50 data = (data * 1000) / 465;
52 data &= PTP_SSIR_SSINC_MASK;
56 reg_value <<= GMAC4_PTP_SSIR_SSINC_SHIFT;
58 writel(reg_value, ioaddr + PTP_SSIR);
63 static int stmmac_init_systime(void __iomem *ioaddr, u32 sec, u32 nsec)
68 writel(sec, ioaddr + PTP_STSUR);
69 writel(nsec, ioaddr + PTP_STNSUR);
70 /* issue command to initialize the system time value */
71 value = readl(ioaddr + PTP_TCR);
72 value |= PTP_TCR_TSINIT;
73 writel(value, ioaddr + PTP_TCR);
75 /* wait for present system time initialize to complete */
78 if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSINIT))
88 static int stmmac_config_addend(void __iomem *ioaddr, u32 addend)
93 writel(addend, ioaddr + PTP_TAR);
94 /* issue command to update the addend value */
95 value = readl(ioaddr + PTP_TCR);
96 value |= PTP_TCR_TSADDREG;
97 writel(value, ioaddr + PTP_TCR);
99 /* wait for present addend update to complete */
102 if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSADDREG))
112 static int stmmac_adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec,
113 int add_sub, int gmac4)
119 /* If the new sec value needs to be subtracted with
120 * the system time, then MAC_STSUR reg should be
121 * programmed with (2^32 – <new_sec_value>)
124 sec = (100000000ULL - sec);
126 value = readl(ioaddr + PTP_TCR);
127 if (value & PTP_TCR_TSCTRLSSR)
128 nsec = (PTP_DIGITAL_ROLLOVER_MODE - nsec);
130 nsec = (PTP_BINARY_ROLLOVER_MODE - nsec);
133 writel(sec, ioaddr + PTP_STSUR);
134 value = (add_sub << PTP_STNSUR_ADDSUB_SHIFT) | nsec;
135 writel(value, ioaddr + PTP_STNSUR);
137 /* issue command to initialize the system time value */
138 value = readl(ioaddr + PTP_TCR);
139 value |= PTP_TCR_TSUPDT;
140 writel(value, ioaddr + PTP_TCR);
142 /* wait for present system time adjust/update to complete */
145 if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSUPDT))
155 static u64 stmmac_get_systime(void __iomem *ioaddr)
159 /* Get the TSSS value */
160 ns = readl(ioaddr + PTP_STNSR);
161 /* Get the TSS and convert sec time value to nanosecond */
162 ns += readl(ioaddr + PTP_STSR) * 1000000000ULL;
167 const struct stmmac_hwtimestamp stmmac_ptp = {
168 .config_hw_tstamping = stmmac_config_hw_tstamping,
169 .init_systime = stmmac_init_systime,
170 .config_sub_second_increment = stmmac_config_sub_second_increment,
171 .config_addend = stmmac_config_addend,
172 .adjust_systime = stmmac_adjust_systime,
173 .get_systime = stmmac_get_systime,