Merge tag 'char-misc-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregk...
[sfrench/cifs-2.6.git] / drivers / net / ethernet / qlogic / qlcnic / qlcnic_dcb.c
1 /*
2  * QLogic qlcnic NIC Driver
3  * Copyright (c)  2009-2013 QLogic Corporation
4  *
5  * See LICENSE.qlcnic for copyright and licensing details.
6  */
7
8 #include <linux/types.h>
9 #include "qlcnic.h"
10
11 #define QLC_DCB_NUM_PARAM               3
12 #define QLC_DCB_LOCAL_IDX               0
13 #define QLC_DCB_OPER_IDX                1
14 #define QLC_DCB_PEER_IDX                2
15
16 #define QLC_DCB_GET_MAP(V)              (1 << V)
17
18 #define QLC_DCB_FW_VER                  0x2
19 #define QLC_DCB_MAX_TC                  0x8
20 #define QLC_DCB_MAX_APP                 0x8
21 #define QLC_DCB_MAX_PRIO                QLC_DCB_MAX_TC
22 #define QLC_DCB_MAX_PG                  QLC_DCB_MAX_TC
23
24 #define QLC_DCB_TSA_SUPPORT(V)          (V & 0x1)
25 #define QLC_DCB_ETS_SUPPORT(V)          ((V >> 1) & 0x1)
26 #define QLC_DCB_VERSION_SUPPORT(V)      ((V >> 2) & 0xf)
27 #define QLC_DCB_MAX_NUM_TC(V)           ((V >> 20) & 0xf)
28 #define QLC_DCB_MAX_NUM_ETS_TC(V)       ((V >> 24) & 0xf)
29 #define QLC_DCB_MAX_NUM_PFC_TC(V)       ((V >> 28) & 0xf)
30 #define QLC_DCB_GET_TC_PRIO(X, P)       ((X >> (P * 3)) & 0x7)
31 #define QLC_DCB_GET_PGID_PRIO(X, P)     ((X >> (P * 8)) & 0xff)
32 #define QLC_DCB_GET_BWPER_PG(X, P)      ((X >> (P * 8)) & 0xff)
33 #define QLC_DCB_GET_TSA_PG(X, P)        ((X >> (P * 8)) & 0xff)
34 #define QLC_DCB_GET_PFC_PRIO(X, P)      (((X >> 24) >> P) & 0x1)
35 #define QLC_DCB_GET_PROTO_ID_APP(X)     ((X >> 8) & 0xffff)
36 #define QLC_DCB_GET_SELECTOR_APP(X)     (X & 0xff)
37
38 #define QLC_DCB_LOCAL_PARAM_FWID        0x3
39 #define QLC_DCB_OPER_PARAM_FWID         0x1
40 #define QLC_DCB_PEER_PARAM_FWID         0x2
41
42 #define QLC_83XX_DCB_GET_NUMAPP(X)      ((X >> 2) & 0xf)
43 #define QLC_83XX_DCB_TSA_VALID(X)       (X & 0x1)
44 #define QLC_83XX_DCB_PFC_VALID(X)       ((X >> 1) & 0x1)
45 #define QLC_83XX_DCB_GET_PRIOMAP_APP(X) (X >> 24)
46
47 #define QLC_82XX_DCB_GET_NUMAPP(X)      ((X >> 12) & 0xf)
48 #define QLC_82XX_DCB_TSA_VALID(X)       ((X >> 4) & 0x1)
49 #define QLC_82XX_DCB_PFC_VALID(X)       ((X >> 5) & 0x1)
50 #define QLC_82XX_DCB_GET_PRIOVAL_APP(X) ((X >> 24) & 0x7)
51 #define QLC_82XX_DCB_GET_PRIOMAP_APP(X) (1 << X)
52 #define QLC_82XX_DCB_PRIO_TC_MAP        (0x76543210)
53
54 static const struct dcbnl_rtnl_ops qlcnic_dcbnl_ops;
55
56 static void qlcnic_dcb_aen_work(struct work_struct *);
57 static void qlcnic_dcb_data_cee_param_map(struct qlcnic_adapter *);
58
59 static inline void __qlcnic_init_dcbnl_ops(struct qlcnic_dcb *);
60 static void __qlcnic_dcb_free(struct qlcnic_dcb *);
61 static int __qlcnic_dcb_attach(struct qlcnic_dcb *);
62 static int __qlcnic_dcb_query_hw_capability(struct qlcnic_dcb *, char *);
63 static void __qlcnic_dcb_get_info(struct qlcnic_dcb *);
64
65 static int qlcnic_82xx_dcb_get_hw_capability(struct qlcnic_dcb *);
66 static int qlcnic_82xx_dcb_query_cee_param(struct qlcnic_dcb *, char *, u8);
67 static int qlcnic_82xx_dcb_get_cee_cfg(struct qlcnic_dcb *);
68 static void qlcnic_82xx_dcb_aen_handler(struct qlcnic_dcb *, void *);
69
70 static int qlcnic_83xx_dcb_get_hw_capability(struct qlcnic_dcb *);
71 static int qlcnic_83xx_dcb_query_cee_param(struct qlcnic_dcb *, char *, u8);
72 static int qlcnic_83xx_dcb_get_cee_cfg(struct qlcnic_dcb *);
73 static void qlcnic_83xx_dcb_aen_handler(struct qlcnic_dcb *, void *);
74
75 struct qlcnic_dcb_capability {
76         bool    tsa_capability;
77         bool    ets_capability;
78         u8      max_num_tc;
79         u8      max_ets_tc;
80         u8      max_pfc_tc;
81         u8      dcb_capability;
82 };
83
84 struct qlcnic_dcb_param {
85         u32 hdr_prio_pfc_map[2];
86         u32 prio_pg_map[2];
87         u32 pg_bw_map[2];
88         u32 pg_tsa_map[2];
89         u32 app[QLC_DCB_MAX_APP];
90 };
91
92 struct qlcnic_dcb_mbx_params {
93         /* 1st local, 2nd operational 3rd remote */
94         struct qlcnic_dcb_param type[3];
95         u32 prio_tc_map;
96 };
97
98 struct qlcnic_82xx_dcb_param_mbx_le {
99         __le32 hdr_prio_pfc_map[2];
100         __le32 prio_pg_map[2];
101         __le32 pg_bw_map[2];
102         __le32 pg_tsa_map[2];
103         __le32 app[QLC_DCB_MAX_APP];
104 };
105
106 enum qlcnic_dcb_selector {
107         QLC_SELECTOR_DEF = 0x0,
108         QLC_SELECTOR_ETHER,
109         QLC_SELECTOR_TCP,
110         QLC_SELECTOR_UDP,
111 };
112
113 enum qlcnic_dcb_prio_type {
114         QLC_PRIO_NONE = 0,
115         QLC_PRIO_GROUP,
116         QLC_PRIO_LINK,
117 };
118
119 enum qlcnic_dcb_pfc_type {
120         QLC_PFC_DISABLED = 0,
121         QLC_PFC_FULL,
122         QLC_PFC_TX,
123         QLC_PFC_RX
124 };
125
126 struct qlcnic_dcb_prio_cfg {
127         bool valid;
128         enum qlcnic_dcb_pfc_type pfc_type;
129 };
130
131 struct qlcnic_dcb_pg_cfg {
132         bool valid;
133         u8 total_bw_percent;            /* of Link/ port BW */
134         u8 prio_count;
135         u8 tsa_type;
136 };
137
138 struct qlcnic_dcb_tc_cfg {
139         bool valid;
140         struct qlcnic_dcb_prio_cfg prio_cfg[QLC_DCB_MAX_PRIO];
141         enum qlcnic_dcb_prio_type prio_type;    /* always prio_link */
142         u8 link_percent;                        /* % of link bandwidth */
143         u8 bwg_percent;                         /* % of BWG's bandwidth */
144         u8 up_tc_map;
145         u8 pgid;
146 };
147
148 struct qlcnic_dcb_app {
149         bool valid;
150         enum qlcnic_dcb_selector selector;
151         u16 protocol;
152         u8 priority;
153 };
154
155 struct qlcnic_dcb_cee {
156         struct qlcnic_dcb_tc_cfg tc_cfg[QLC_DCB_MAX_TC];
157         struct qlcnic_dcb_pg_cfg pg_cfg[QLC_DCB_MAX_PG];
158         struct qlcnic_dcb_app app[QLC_DCB_MAX_APP];
159         bool tc_param_valid;
160         bool pfc_mode_enable;
161 };
162
163 struct qlcnic_dcb_cfg {
164         /* 0 - local, 1 - operational, 2 - remote */
165         struct qlcnic_dcb_cee type[QLC_DCB_NUM_PARAM];
166         struct qlcnic_dcb_capability capability;
167         u32 version;
168 };
169
170 static struct qlcnic_dcb_ops qlcnic_83xx_dcb_ops = {
171         .init_dcbnl_ops         = __qlcnic_init_dcbnl_ops,
172         .free                   = __qlcnic_dcb_free,
173         .attach                 = __qlcnic_dcb_attach,
174         .query_hw_capability    = __qlcnic_dcb_query_hw_capability,
175         .get_info               = __qlcnic_dcb_get_info,
176
177         .get_hw_capability      = qlcnic_83xx_dcb_get_hw_capability,
178         .query_cee_param        = qlcnic_83xx_dcb_query_cee_param,
179         .get_cee_cfg            = qlcnic_83xx_dcb_get_cee_cfg,
180         .aen_handler            = qlcnic_83xx_dcb_aen_handler,
181 };
182
183 static struct qlcnic_dcb_ops qlcnic_82xx_dcb_ops = {
184         .init_dcbnl_ops         = __qlcnic_init_dcbnl_ops,
185         .free                   = __qlcnic_dcb_free,
186         .attach                 = __qlcnic_dcb_attach,
187         .query_hw_capability    = __qlcnic_dcb_query_hw_capability,
188         .get_info               = __qlcnic_dcb_get_info,
189
190         .get_hw_capability      = qlcnic_82xx_dcb_get_hw_capability,
191         .query_cee_param        = qlcnic_82xx_dcb_query_cee_param,
192         .get_cee_cfg            = qlcnic_82xx_dcb_get_cee_cfg,
193         .aen_handler            = qlcnic_82xx_dcb_aen_handler,
194 };
195
196 static u8 qlcnic_dcb_get_num_app(struct qlcnic_adapter *adapter, u32 val)
197 {
198         if (qlcnic_82xx_check(adapter))
199                 return QLC_82XX_DCB_GET_NUMAPP(val);
200         else
201                 return QLC_83XX_DCB_GET_NUMAPP(val);
202 }
203
204 static inline u8 qlcnic_dcb_pfc_hdr_valid(struct qlcnic_adapter *adapter,
205                                           u32 val)
206 {
207         if (qlcnic_82xx_check(adapter))
208                 return QLC_82XX_DCB_PFC_VALID(val);
209         else
210                 return QLC_83XX_DCB_PFC_VALID(val);
211 }
212
213 static inline u8 qlcnic_dcb_tsa_hdr_valid(struct qlcnic_adapter *adapter,
214                                           u32 val)
215 {
216         if (qlcnic_82xx_check(adapter))
217                 return QLC_82XX_DCB_TSA_VALID(val);
218         else
219                 return QLC_83XX_DCB_TSA_VALID(val);
220 }
221
222 static inline u8 qlcnic_dcb_get_prio_map_app(struct qlcnic_adapter *adapter,
223                                              u32 val)
224 {
225         if (qlcnic_82xx_check(adapter))
226                 return QLC_82XX_DCB_GET_PRIOMAP_APP(val);
227         else
228                 return QLC_83XX_DCB_GET_PRIOMAP_APP(val);
229 }
230
231 static int qlcnic_dcb_prio_count(u8 up_tc_map)
232 {
233         int j;
234
235         for (j = 0; j < QLC_DCB_MAX_TC; j++)
236                 if (up_tc_map & QLC_DCB_GET_MAP(j))
237                         break;
238
239         return j;
240 }
241
242 static inline void __qlcnic_init_dcbnl_ops(struct qlcnic_dcb *dcb)
243 {
244         if (test_bit(QLCNIC_DCB_STATE, &dcb->state))
245                 dcb->adapter->netdev->dcbnl_ops = &qlcnic_dcbnl_ops;
246 }
247
248 static void qlcnic_set_dcb_ops(struct qlcnic_adapter *adapter)
249 {
250         if (qlcnic_82xx_check(adapter))
251                 adapter->dcb->ops = &qlcnic_82xx_dcb_ops;
252         else if (qlcnic_83xx_check(adapter))
253                 adapter->dcb->ops = &qlcnic_83xx_dcb_ops;
254 }
255
256 int qlcnic_register_dcb(struct qlcnic_adapter *adapter)
257 {
258         struct qlcnic_dcb *dcb;
259
260         if (qlcnic_sriov_vf_check(adapter))
261                 return 0;
262
263         dcb = kzalloc(sizeof(struct qlcnic_dcb), GFP_ATOMIC);
264         if (!dcb)
265                 return -ENOMEM;
266
267         adapter->dcb = dcb;
268         dcb->adapter = adapter;
269         qlcnic_set_dcb_ops(adapter);
270         dcb->state = 0;
271
272         return 0;
273 }
274
275 static void __qlcnic_dcb_free(struct qlcnic_dcb *dcb)
276 {
277         struct qlcnic_adapter *adapter;
278
279         if (!dcb)
280                 return;
281
282         adapter = dcb->adapter;
283
284         while (test_bit(QLCNIC_DCB_AEN_MODE, &dcb->state))
285                 usleep_range(10000, 11000);
286
287         cancel_delayed_work_sync(&dcb->aen_work);
288
289         if (dcb->wq) {
290                 destroy_workqueue(dcb->wq);
291                 dcb->wq = NULL;
292         }
293
294         kfree(dcb->cfg);
295         dcb->cfg = NULL;
296         kfree(dcb->param);
297         dcb->param = NULL;
298         kfree(dcb);
299         adapter->dcb = NULL;
300 }
301
302 static void __qlcnic_dcb_get_info(struct qlcnic_dcb *dcb)
303 {
304         qlcnic_dcb_get_hw_capability(dcb);
305         qlcnic_dcb_get_cee_cfg(dcb);
306 }
307
308 static int __qlcnic_dcb_attach(struct qlcnic_dcb *dcb)
309 {
310         int err = 0;
311
312         INIT_DELAYED_WORK(&dcb->aen_work, qlcnic_dcb_aen_work);
313
314         dcb->wq = create_singlethread_workqueue("qlcnic-dcb");
315         if (!dcb->wq) {
316                 dev_err(&dcb->adapter->pdev->dev,
317                         "DCB workqueue allocation failed. DCB will be disabled\n");
318                 return -1;
319         }
320
321         dcb->cfg = kzalloc(sizeof(struct qlcnic_dcb_cfg), GFP_ATOMIC);
322         if (!dcb->cfg) {
323                 err = -ENOMEM;
324                 goto out_free_wq;
325         }
326
327         dcb->param = kzalloc(sizeof(struct qlcnic_dcb_mbx_params), GFP_ATOMIC);
328         if (!dcb->param) {
329                 err = -ENOMEM;
330                 goto out_free_cfg;
331         }
332
333         qlcnic_dcb_get_info(dcb);
334
335         return 0;
336 out_free_cfg:
337         kfree(dcb->cfg);
338         dcb->cfg = NULL;
339
340 out_free_wq:
341         destroy_workqueue(dcb->wq);
342         dcb->wq = NULL;
343
344         return err;
345 }
346
347 static int __qlcnic_dcb_query_hw_capability(struct qlcnic_dcb *dcb, char *buf)
348 {
349         struct qlcnic_adapter *adapter = dcb->adapter;
350         struct qlcnic_cmd_args cmd;
351         u32 mbx_out;
352         int err;
353
354         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DCB_QUERY_CAP);
355         if (err)
356                 return err;
357
358         err = qlcnic_issue_cmd(adapter, &cmd);
359         if (err) {
360                 dev_err(&adapter->pdev->dev,
361                         "Failed to query DCBX capability, err %d\n", err);
362         } else {
363                 mbx_out = cmd.rsp.arg[1];
364                 if (buf)
365                         memcpy(buf, &mbx_out, sizeof(u32));
366         }
367
368         qlcnic_free_mbx_args(&cmd);
369
370         return err;
371 }
372
373 static int __qlcnic_dcb_get_capability(struct qlcnic_dcb *dcb, u32 *val)
374 {
375         struct qlcnic_dcb_capability *cap = &dcb->cfg->capability;
376         u32 mbx_out;
377         int err;
378
379         memset(cap, 0, sizeof(struct qlcnic_dcb_capability));
380
381         err = qlcnic_dcb_query_hw_capability(dcb, (char *)val);
382         if (err)
383                 return err;
384
385         mbx_out = *val;
386         if (QLC_DCB_TSA_SUPPORT(mbx_out))
387                 cap->tsa_capability = true;
388
389         if (QLC_DCB_ETS_SUPPORT(mbx_out))
390                 cap->ets_capability = true;
391
392         cap->max_num_tc = QLC_DCB_MAX_NUM_TC(mbx_out);
393         cap->max_ets_tc = QLC_DCB_MAX_NUM_ETS_TC(mbx_out);
394         cap->max_pfc_tc = QLC_DCB_MAX_NUM_PFC_TC(mbx_out);
395
396         if (cap->max_num_tc > QLC_DCB_MAX_TC ||
397             cap->max_ets_tc > cap->max_num_tc ||
398             cap->max_pfc_tc > cap->max_num_tc) {
399                 dev_err(&dcb->adapter->pdev->dev, "Invalid DCB configuration\n");
400                 return -EINVAL;
401         }
402
403         return err;
404 }
405
406 static int qlcnic_82xx_dcb_get_hw_capability(struct qlcnic_dcb *dcb)
407 {
408         struct qlcnic_dcb_cfg *cfg = dcb->cfg;
409         struct qlcnic_dcb_capability *cap;
410         u32 mbx_out;
411         int err;
412
413         err = __qlcnic_dcb_get_capability(dcb, &mbx_out);
414         if (err)
415                 return err;
416
417         cap = &cfg->capability;
418         cap->dcb_capability = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_LLD_MANAGED;
419
420         if (cap->dcb_capability && cap->tsa_capability && cap->ets_capability)
421                 set_bit(QLCNIC_DCB_STATE, &dcb->state);
422
423         return err;
424 }
425
426 static int qlcnic_82xx_dcb_query_cee_param(struct qlcnic_dcb *dcb,
427                                            char *buf, u8 type)
428 {
429         u16 size = sizeof(struct qlcnic_82xx_dcb_param_mbx_le);
430         struct qlcnic_adapter *adapter = dcb->adapter;
431         struct qlcnic_82xx_dcb_param_mbx_le *prsp_le;
432         struct device *dev = &adapter->pdev->dev;
433         dma_addr_t cardrsp_phys_addr;
434         struct qlcnic_dcb_param rsp;
435         struct qlcnic_cmd_args cmd;
436         u64 phys_addr;
437         void *addr;
438         int err, i;
439
440         switch (type) {
441         case QLC_DCB_LOCAL_PARAM_FWID:
442         case QLC_DCB_OPER_PARAM_FWID:
443         case QLC_DCB_PEER_PARAM_FWID:
444                 break;
445         default:
446                 dev_err(dev, "Invalid parameter type %d\n", type);
447                 return -EINVAL;
448         }
449
450         addr = dma_alloc_coherent(dev, size, &cardrsp_phys_addr, GFP_KERNEL);
451         if (addr == NULL)
452                 return -ENOMEM;
453
454         prsp_le = addr;
455
456         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DCB_QUERY_PARAM);
457         if (err)
458                 goto out_free_rsp;
459
460         phys_addr = cardrsp_phys_addr;
461         cmd.req.arg[1] = size | (type << 16);
462         cmd.req.arg[2] = MSD(phys_addr);
463         cmd.req.arg[3] = LSD(phys_addr);
464
465         err = qlcnic_issue_cmd(adapter, &cmd);
466         if (err) {
467                 dev_err(dev, "Failed to query DCBX parameter, err %d\n", err);
468                 goto out;
469         }
470
471         memset(&rsp, 0, sizeof(struct qlcnic_dcb_param));
472         rsp.hdr_prio_pfc_map[0] = le32_to_cpu(prsp_le->hdr_prio_pfc_map[0]);
473         rsp.hdr_prio_pfc_map[1] = le32_to_cpu(prsp_le->hdr_prio_pfc_map[1]);
474         rsp.prio_pg_map[0] = le32_to_cpu(prsp_le->prio_pg_map[0]);
475         rsp.prio_pg_map[1] = le32_to_cpu(prsp_le->prio_pg_map[1]);
476         rsp.pg_bw_map[0] = le32_to_cpu(prsp_le->pg_bw_map[0]);
477         rsp.pg_bw_map[1] = le32_to_cpu(prsp_le->pg_bw_map[1]);
478         rsp.pg_tsa_map[0] = le32_to_cpu(prsp_le->pg_tsa_map[0]);
479         rsp.pg_tsa_map[1] = le32_to_cpu(prsp_le->pg_tsa_map[1]);
480
481         for (i = 0; i < QLC_DCB_MAX_APP; i++)
482                 rsp.app[i] = le32_to_cpu(prsp_le->app[i]);
483
484         if (buf)
485                 memcpy(buf, &rsp, size);
486 out:
487         qlcnic_free_mbx_args(&cmd);
488
489 out_free_rsp:
490         dma_free_coherent(dev, size, addr, cardrsp_phys_addr);
491
492         return err;
493 }
494
495 static int qlcnic_82xx_dcb_get_cee_cfg(struct qlcnic_dcb *dcb)
496 {
497         struct qlcnic_dcb_mbx_params *mbx;
498         int err;
499
500         mbx = dcb->param;
501         if (!mbx)
502                 return 0;
503
504         err = qlcnic_dcb_query_cee_param(dcb, (char *)&mbx->type[0],
505                                          QLC_DCB_LOCAL_PARAM_FWID);
506         if (err)
507                 return err;
508
509         err = qlcnic_dcb_query_cee_param(dcb, (char *)&mbx->type[1],
510                                          QLC_DCB_OPER_PARAM_FWID);
511         if (err)
512                 return err;
513
514         err = qlcnic_dcb_query_cee_param(dcb, (char *)&mbx->type[2],
515                                          QLC_DCB_PEER_PARAM_FWID);
516         if (err)
517                 return err;
518
519         mbx->prio_tc_map = QLC_82XX_DCB_PRIO_TC_MAP;
520
521         qlcnic_dcb_data_cee_param_map(dcb->adapter);
522
523         return err;
524 }
525
526 static void qlcnic_dcb_aen_work(struct work_struct *work)
527 {
528         struct qlcnic_dcb *dcb;
529
530         dcb = container_of(work, struct qlcnic_dcb, aen_work.work);
531
532         qlcnic_dcb_get_cee_cfg(dcb);
533         clear_bit(QLCNIC_DCB_AEN_MODE, &dcb->state);
534 }
535
536 static void qlcnic_82xx_dcb_aen_handler(struct qlcnic_dcb *dcb, void *data)
537 {
538         if (test_and_set_bit(QLCNIC_DCB_AEN_MODE, &dcb->state))
539                 return;
540
541         queue_delayed_work(dcb->wq, &dcb->aen_work, 0);
542 }
543
544 static int qlcnic_83xx_dcb_get_hw_capability(struct qlcnic_dcb *dcb)
545 {
546         struct qlcnic_dcb_capability *cap = &dcb->cfg->capability;
547         u32 mbx_out;
548         int err;
549
550         err = __qlcnic_dcb_get_capability(dcb, &mbx_out);
551         if (err)
552                 return err;
553
554         if (mbx_out & BIT_2)
555                 cap->dcb_capability = DCB_CAP_DCBX_VER_CEE;
556         if (mbx_out & BIT_3)
557                 cap->dcb_capability |= DCB_CAP_DCBX_VER_IEEE;
558         if (cap->dcb_capability)
559                 cap->dcb_capability |= DCB_CAP_DCBX_LLD_MANAGED;
560
561         if (cap->dcb_capability && cap->tsa_capability && cap->ets_capability)
562                 set_bit(QLCNIC_DCB_STATE, &dcb->state);
563
564         return err;
565 }
566
567 static int qlcnic_83xx_dcb_query_cee_param(struct qlcnic_dcb *dcb,
568                                            char *buf, u8 idx)
569 {
570         struct qlcnic_adapter *adapter = dcb->adapter;
571         struct qlcnic_dcb_mbx_params mbx_out;
572         int err, i, j, k, max_app, size;
573         struct qlcnic_dcb_param *each;
574         struct qlcnic_cmd_args cmd;
575         u32 val;
576         char *p;
577
578         size = 0;
579         memset(&mbx_out, 0, sizeof(struct qlcnic_dcb_mbx_params));
580         memset(buf, 0, sizeof(struct qlcnic_dcb_mbx_params));
581
582         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DCB_QUERY_PARAM);
583         if (err)
584                 return err;
585
586         cmd.req.arg[0] |= QLC_DCB_FW_VER << 29;
587         err = qlcnic_issue_cmd(adapter, &cmd);
588         if (err) {
589                 dev_err(&adapter->pdev->dev,
590                         "Failed to query DCBX param, err %d\n", err);
591                 goto out;
592         }
593
594         mbx_out.prio_tc_map = cmd.rsp.arg[1];
595         p = memcpy(buf, &mbx_out, sizeof(u32));
596         k = 2;
597         p += sizeof(u32);
598
599         for (j = 0; j < QLC_DCB_NUM_PARAM; j++) {
600                 each = &mbx_out.type[j];
601
602                 each->hdr_prio_pfc_map[0] = cmd.rsp.arg[k++];
603                 each->hdr_prio_pfc_map[1] = cmd.rsp.arg[k++];
604                 each->prio_pg_map[0] = cmd.rsp.arg[k++];
605                 each->prio_pg_map[1] = cmd.rsp.arg[k++];
606                 each->pg_bw_map[0] = cmd.rsp.arg[k++];
607                 each->pg_bw_map[1] = cmd.rsp.arg[k++];
608                 each->pg_tsa_map[0] = cmd.rsp.arg[k++];
609                 each->pg_tsa_map[1] = cmd.rsp.arg[k++];
610                 val = each->hdr_prio_pfc_map[0];
611
612                 max_app = qlcnic_dcb_get_num_app(adapter, val);
613                 for (i = 0; i < max_app; i++)
614                         each->app[i] = cmd.rsp.arg[i + k];
615
616                 size = 16 * sizeof(u32);
617                 memcpy(p, &each->hdr_prio_pfc_map[0], size);
618                 p += size;
619                 if (j == 0)
620                         k = 18;
621                 else
622                         k = 34;
623         }
624 out:
625         qlcnic_free_mbx_args(&cmd);
626
627         return err;
628 }
629
630 static int qlcnic_83xx_dcb_get_cee_cfg(struct qlcnic_dcb *dcb)
631 {
632         int err;
633
634         err = qlcnic_dcb_query_cee_param(dcb, (char *)dcb->param, 0);
635         if (err)
636                 return err;
637
638         qlcnic_dcb_data_cee_param_map(dcb->adapter);
639
640         return err;
641 }
642
643 static void qlcnic_83xx_dcb_aen_handler(struct qlcnic_dcb *dcb, void *data)
644 {
645         u32 *val = data;
646
647         if (test_and_set_bit(QLCNIC_DCB_AEN_MODE, &dcb->state))
648                 return;
649
650         if (*val & BIT_8)
651                 set_bit(QLCNIC_DCB_STATE, &dcb->state);
652         else
653                 clear_bit(QLCNIC_DCB_STATE, &dcb->state);
654
655         queue_delayed_work(dcb->wq, &dcb->aen_work, 0);
656 }
657
658 static void qlcnic_dcb_fill_cee_tc_params(struct qlcnic_dcb_mbx_params *mbx,
659                                           struct qlcnic_dcb_param *each,
660                                           struct qlcnic_dcb_cee *type)
661 {
662         struct qlcnic_dcb_tc_cfg *tc_cfg;
663         u8 i, tc, pgid;
664
665         for (i = 0; i < QLC_DCB_MAX_PRIO; i++) {
666                 tc = QLC_DCB_GET_TC_PRIO(mbx->prio_tc_map, i);
667                 tc_cfg = &type->tc_cfg[tc];
668                 tc_cfg->valid = true;
669                 tc_cfg->up_tc_map |= QLC_DCB_GET_MAP(i);
670
671                 if (QLC_DCB_GET_PFC_PRIO(each->hdr_prio_pfc_map[1], i) &&
672                     type->pfc_mode_enable) {
673                         tc_cfg->prio_cfg[i].valid = true;
674                         tc_cfg->prio_cfg[i].pfc_type = QLC_PFC_FULL;
675                 }
676
677                 if (i < 4)
678                         pgid = QLC_DCB_GET_PGID_PRIO(each->prio_pg_map[0], i);
679                 else
680                         pgid = QLC_DCB_GET_PGID_PRIO(each->prio_pg_map[1], i);
681
682                 tc_cfg->pgid = pgid;
683
684                 tc_cfg->prio_type = QLC_PRIO_LINK;
685                 type->pg_cfg[tc_cfg->pgid].prio_count++;
686         }
687 }
688
689 static void qlcnic_dcb_fill_cee_pg_params(struct qlcnic_dcb_param *each,
690                                           struct qlcnic_dcb_cee *type)
691 {
692         struct qlcnic_dcb_pg_cfg *pg_cfg;
693         u8 i, tsa, bw_per;
694
695         for (i = 0; i < QLC_DCB_MAX_PG; i++) {
696                 pg_cfg = &type->pg_cfg[i];
697                 pg_cfg->valid = true;
698
699                 if (i < 4) {
700                         bw_per = QLC_DCB_GET_BWPER_PG(each->pg_bw_map[0], i);
701                         tsa = QLC_DCB_GET_TSA_PG(each->pg_tsa_map[0], i);
702                 } else {
703                         bw_per = QLC_DCB_GET_BWPER_PG(each->pg_bw_map[1], i);
704                         tsa = QLC_DCB_GET_TSA_PG(each->pg_tsa_map[1], i);
705                 }
706
707                 pg_cfg->total_bw_percent = bw_per;
708                 pg_cfg->tsa_type = tsa;
709         }
710 }
711
712 static void
713 qlcnic_dcb_fill_cee_app_params(struct qlcnic_adapter *adapter, u8 idx,
714                                struct qlcnic_dcb_param *each,
715                                struct qlcnic_dcb_cee *type)
716 {
717         struct qlcnic_dcb_app *app;
718         u8 i, num_app, map, cnt;
719         struct dcb_app new_app;
720
721         num_app = qlcnic_dcb_get_num_app(adapter, each->hdr_prio_pfc_map[0]);
722         for (i = 0; i < num_app; i++) {
723                 app = &type->app[i];
724                 app->valid = true;
725
726                 /* Only for CEE (-1) */
727                 app->selector = QLC_DCB_GET_SELECTOR_APP(each->app[i]) - 1;
728                 new_app.selector = app->selector;
729                 app->protocol = QLC_DCB_GET_PROTO_ID_APP(each->app[i]);
730                 new_app.protocol = app->protocol;
731                 map = qlcnic_dcb_get_prio_map_app(adapter, each->app[i]);
732                 cnt = qlcnic_dcb_prio_count(map);
733
734                 if (cnt >= QLC_DCB_MAX_TC)
735                         cnt = 0;
736
737                 app->priority = cnt;
738                 new_app.priority = cnt;
739
740                 if (idx == QLC_DCB_OPER_IDX && adapter->netdev->dcbnl_ops)
741                         dcb_setapp(adapter->netdev, &new_app);
742         }
743 }
744
745 static void qlcnic_dcb_map_cee_params(struct qlcnic_adapter *adapter, u8 idx)
746 {
747         struct qlcnic_dcb_mbx_params *mbx = adapter->dcb->param;
748         struct qlcnic_dcb_param *each = &mbx->type[idx];
749         struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
750         struct qlcnic_dcb_cee *type = &cfg->type[idx];
751
752         type->tc_param_valid = false;
753         type->pfc_mode_enable = false;
754         memset(type->tc_cfg, 0,
755                sizeof(struct qlcnic_dcb_tc_cfg) * QLC_DCB_MAX_TC);
756         memset(type->pg_cfg, 0,
757                sizeof(struct qlcnic_dcb_pg_cfg) * QLC_DCB_MAX_TC);
758
759         if (qlcnic_dcb_pfc_hdr_valid(adapter, each->hdr_prio_pfc_map[0]) &&
760             cfg->capability.max_pfc_tc)
761                 type->pfc_mode_enable = true;
762
763         if (qlcnic_dcb_tsa_hdr_valid(adapter, each->hdr_prio_pfc_map[0]) &&
764             cfg->capability.max_ets_tc)
765                 type->tc_param_valid = true;
766
767         qlcnic_dcb_fill_cee_tc_params(mbx, each, type);
768         qlcnic_dcb_fill_cee_pg_params(each, type);
769         qlcnic_dcb_fill_cee_app_params(adapter, idx, each, type);
770 }
771
772 static void qlcnic_dcb_data_cee_param_map(struct qlcnic_adapter *adapter)
773 {
774         int i;
775
776         for (i = 0; i < QLC_DCB_NUM_PARAM; i++)
777                 qlcnic_dcb_map_cee_params(adapter, i);
778
779         dcbnl_cee_notify(adapter->netdev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
780 }
781
782 static u8 qlcnic_dcb_get_state(struct net_device *netdev)
783 {
784         struct qlcnic_adapter *adapter = netdev_priv(netdev);
785
786         return test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state);
787 }
788
789 static void qlcnic_dcb_get_perm_hw_addr(struct net_device *netdev, u8 *addr)
790 {
791         memcpy(addr, netdev->perm_addr, netdev->addr_len);
792 }
793
794 static void
795 qlcnic_dcb_get_pg_tc_cfg_tx(struct net_device *netdev, int tc, u8 *prio,
796                             u8 *pgid, u8 *bw_per, u8 *up_tc_map)
797 {
798         struct qlcnic_adapter *adapter = netdev_priv(netdev);
799         struct qlcnic_dcb_tc_cfg *tc_cfg, *temp;
800         struct qlcnic_dcb_cee *type;
801         u8 i, cnt, pg;
802
803         type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
804         *prio = *pgid = *bw_per = *up_tc_map = 0;
805
806         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state) ||
807             !type->tc_param_valid)
808                 return;
809
810         if (tc < 0 || (tc >= QLC_DCB_MAX_TC))
811                 return;
812
813         tc_cfg = &type->tc_cfg[tc];
814         if (!tc_cfg->valid)
815                 return;
816
817         *pgid = tc_cfg->pgid;
818         *prio = tc_cfg->prio_type;
819         *up_tc_map = tc_cfg->up_tc_map;
820         pg = *pgid;
821
822         for (i = 0, cnt = 0; i < QLC_DCB_MAX_TC; i++) {
823                 temp = &type->tc_cfg[i];
824                 if (temp->valid && (pg == temp->pgid))
825                         cnt++;
826         }
827
828         tc_cfg->bwg_percent = (100 / cnt);
829         *bw_per = tc_cfg->bwg_percent;
830 }
831
832 static void qlcnic_dcb_get_pg_bwg_cfg_tx(struct net_device *netdev, int pgid,
833                                          u8 *bw_pct)
834 {
835         struct qlcnic_adapter *adapter = netdev_priv(netdev);
836         struct qlcnic_dcb_pg_cfg *pgcfg;
837         struct qlcnic_dcb_cee *type;
838
839         *bw_pct = 0;
840         type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
841
842         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state) ||
843             !type->tc_param_valid)
844                 return;
845
846         if (pgid < 0 || pgid >= QLC_DCB_MAX_PG)
847                 return;
848
849         pgcfg = &type->pg_cfg[pgid];
850         if (!pgcfg->valid)
851                 return;
852
853         *bw_pct = pgcfg->total_bw_percent;
854 }
855
856 static void qlcnic_dcb_get_pfc_cfg(struct net_device *netdev, int prio,
857                                    u8 *setting)
858 {
859         struct qlcnic_adapter *adapter = netdev_priv(netdev);
860         struct qlcnic_dcb_tc_cfg *tc_cfg;
861         u8 val = QLC_DCB_GET_MAP(prio);
862         struct qlcnic_dcb_cee *type;
863         u8 i;
864
865         *setting = 0;
866         type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
867
868         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state) ||
869             !type->pfc_mode_enable)
870                 return;
871
872         for (i = 0; i < QLC_DCB_MAX_TC; i++) {
873                 tc_cfg = &type->tc_cfg[i];
874                 if (!tc_cfg->valid)
875                         continue;
876
877                 if ((val & tc_cfg->up_tc_map) && (tc_cfg->prio_cfg[prio].valid))
878                         *setting = tc_cfg->prio_cfg[prio].pfc_type;
879         }
880 }
881
882 static u8 qlcnic_dcb_get_capability(struct net_device *netdev, int capid,
883                                     u8 *cap)
884 {
885         struct qlcnic_adapter *adapter = netdev_priv(netdev);
886
887         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
888                 return 0;
889
890         switch (capid) {
891         case DCB_CAP_ATTR_PG:
892         case DCB_CAP_ATTR_UP2TC:
893         case DCB_CAP_ATTR_PFC:
894         case DCB_CAP_ATTR_GSP:
895                 *cap = true;
896                 break;
897         case DCB_CAP_ATTR_PG_TCS:
898         case DCB_CAP_ATTR_PFC_TCS:
899                 *cap = 0x80;    /* 8 priorities for PGs */
900                 break;
901         case DCB_CAP_ATTR_DCBX:
902                 *cap = adapter->dcb->cfg->capability.dcb_capability;
903                 break;
904         default:
905                 *cap = false;
906         }
907
908         return 0;
909 }
910
911 static int qlcnic_dcb_get_num_tcs(struct net_device *netdev, int attr, u8 *num)
912 {
913         struct qlcnic_adapter *adapter = netdev_priv(netdev);
914         struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
915
916         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
917                 return -EINVAL;
918
919         switch (attr) {
920         case DCB_NUMTCS_ATTR_PG:
921                 *num = cfg->capability.max_ets_tc;
922                 return 0;
923         case DCB_NUMTCS_ATTR_PFC:
924                 *num = cfg->capability.max_pfc_tc;
925                 return 0;
926         default:
927                 return -EINVAL;
928         }
929 }
930
931 static u8 qlcnic_dcb_get_app(struct net_device *netdev, u8 idtype, u16 id)
932 {
933         struct qlcnic_adapter *adapter = netdev_priv(netdev);
934         struct dcb_app app = {
935                                 .selector = idtype,
936                                 .protocol = id,
937                              };
938
939         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
940                 return 0;
941
942         return dcb_getapp(netdev, &app);
943 }
944
945 static u8 qlcnic_dcb_get_pfc_state(struct net_device *netdev)
946 {
947         struct qlcnic_adapter *adapter = netdev_priv(netdev);
948         struct qlcnic_dcb *dcb = adapter->dcb;
949
950         if (!test_bit(QLCNIC_DCB_STATE, &dcb->state))
951                 return 0;
952
953         return dcb->cfg->type[QLC_DCB_OPER_IDX].pfc_mode_enable;
954 }
955
956 static u8 qlcnic_dcb_get_dcbx(struct net_device *netdev)
957 {
958         struct qlcnic_adapter *adapter = netdev_priv(netdev);
959         struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
960
961         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
962                 return 0;
963
964         return cfg->capability.dcb_capability;
965 }
966
967 static u8 qlcnic_dcb_get_feat_cfg(struct net_device *netdev, int fid, u8 *flag)
968 {
969         struct qlcnic_adapter *adapter = netdev_priv(netdev);
970         struct qlcnic_dcb_cee *type;
971
972         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
973                 return 1;
974
975         type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
976         *flag = 0;
977
978         switch (fid) {
979         case DCB_FEATCFG_ATTR_PG:
980                 if (type->tc_param_valid)
981                         *flag |= DCB_FEATCFG_ENABLE;
982                 else
983                         *flag |= DCB_FEATCFG_ERROR;
984                 break;
985         case DCB_FEATCFG_ATTR_PFC:
986                 if (type->pfc_mode_enable) {
987                         if (type->tc_cfg[0].prio_cfg[0].pfc_type)
988                                 *flag |= DCB_FEATCFG_ENABLE;
989                 } else {
990                         *flag |= DCB_FEATCFG_ERROR;
991                 }
992                 break;
993         case DCB_FEATCFG_ATTR_APP:
994                 *flag |= DCB_FEATCFG_ENABLE;
995                 break;
996         default:
997                 netdev_err(netdev, "Invalid Feature ID %d\n", fid);
998                 return 1;
999         }
1000
1001         return 0;
1002 }
1003
1004 static inline void
1005 qlcnic_dcb_get_pg_tc_cfg_rx(struct net_device *netdev, int prio, u8 *prio_type,
1006                             u8 *pgid, u8 *bw_pct, u8 *up_map)
1007 {
1008         *prio_type = *pgid = *bw_pct = *up_map = 0;
1009 }
1010
1011 static inline void
1012 qlcnic_dcb_get_pg_bwg_cfg_rx(struct net_device *netdev, int pgid, u8 *bw_pct)
1013 {
1014         *bw_pct = 0;
1015 }
1016
1017 static int qlcnic_dcb_peer_app_info(struct net_device *netdev,
1018                                     struct dcb_peer_app_info *info,
1019                                     u16 *app_count)
1020 {
1021         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1022         struct qlcnic_dcb_cee *peer;
1023         int i;
1024
1025         *app_count = 0;
1026
1027         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
1028                 return 0;
1029
1030         peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX];
1031
1032         for (i = 0; i < QLC_DCB_MAX_APP; i++) {
1033                 if (peer->app[i].valid)
1034                         (*app_count)++;
1035         }
1036
1037         return 0;
1038 }
1039
1040 static int qlcnic_dcb_peer_app_table(struct net_device *netdev,
1041                                      struct dcb_app *table)
1042 {
1043         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1044         struct qlcnic_dcb_cee *peer;
1045         struct qlcnic_dcb_app *app;
1046         int i, j;
1047
1048         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
1049                 return 0;
1050
1051         peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX];
1052
1053         for (i = 0, j = 0; i < QLC_DCB_MAX_APP; i++) {
1054                 app = &peer->app[i];
1055                 if (!app->valid)
1056                         continue;
1057
1058                 table[j].selector = app->selector;
1059                 table[j].priority = app->priority;
1060                 table[j++].protocol = app->protocol;
1061         }
1062
1063         return 0;
1064 }
1065
1066 static int qlcnic_dcb_cee_peer_get_pg(struct net_device *netdev,
1067                                       struct cee_pg *pg)
1068 {
1069         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1070         struct qlcnic_dcb_cee *peer;
1071         u8 i, j, k, map;
1072
1073         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
1074                 return 0;
1075
1076         peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX];
1077
1078         for (i = 0, j = 0; i < QLC_DCB_MAX_PG; i++) {
1079                 if (!peer->pg_cfg[i].valid)
1080                         continue;
1081
1082                 pg->pg_bw[j] = peer->pg_cfg[i].total_bw_percent;
1083
1084                 for (k = 0; k < QLC_DCB_MAX_TC; k++) {
1085                         if (peer->tc_cfg[i].valid &&
1086                             (peer->tc_cfg[i].pgid == i)) {
1087                                 map = peer->tc_cfg[i].up_tc_map;
1088                                 pg->prio_pg[j++] = map;
1089                                 break;
1090                         }
1091                 }
1092         }
1093
1094         return 0;
1095 }
1096
1097 static int qlcnic_dcb_cee_peer_get_pfc(struct net_device *netdev,
1098                                        struct cee_pfc *pfc)
1099 {
1100         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1101         struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
1102         struct qlcnic_dcb_tc_cfg *tc;
1103         struct qlcnic_dcb_cee *peer;
1104         u8 i, setting, prio;
1105
1106         pfc->pfc_en = 0;
1107
1108         if (!test_bit(QLCNIC_DCB_STATE, &adapter->dcb->state))
1109                 return 0;
1110
1111         peer = &cfg->type[QLC_DCB_PEER_IDX];
1112
1113         for (i = 0; i < QLC_DCB_MAX_TC; i++) {
1114                 tc = &peer->tc_cfg[i];
1115                 prio = qlcnic_dcb_prio_count(tc->up_tc_map);
1116
1117                 setting = 0;
1118                 qlcnic_dcb_get_pfc_cfg(netdev, prio, &setting);
1119                 if (setting)
1120                         pfc->pfc_en |= QLC_DCB_GET_MAP(i);
1121         }
1122
1123         pfc->tcs_supported = cfg->capability.max_pfc_tc;
1124
1125         return 0;
1126 }
1127
1128 static const struct dcbnl_rtnl_ops qlcnic_dcbnl_ops = {
1129         .getstate               = qlcnic_dcb_get_state,
1130         .getpermhwaddr          = qlcnic_dcb_get_perm_hw_addr,
1131         .getpgtccfgtx           = qlcnic_dcb_get_pg_tc_cfg_tx,
1132         .getpgbwgcfgtx          = qlcnic_dcb_get_pg_bwg_cfg_tx,
1133         .getpfccfg              = qlcnic_dcb_get_pfc_cfg,
1134         .getcap                 = qlcnic_dcb_get_capability,
1135         .getnumtcs              = qlcnic_dcb_get_num_tcs,
1136         .getapp                 = qlcnic_dcb_get_app,
1137         .getpfcstate            = qlcnic_dcb_get_pfc_state,
1138         .getdcbx                = qlcnic_dcb_get_dcbx,
1139         .getfeatcfg             = qlcnic_dcb_get_feat_cfg,
1140
1141         .getpgtccfgrx           = qlcnic_dcb_get_pg_tc_cfg_rx,
1142         .getpgbwgcfgrx          = qlcnic_dcb_get_pg_bwg_cfg_rx,
1143
1144         .peer_getappinfo        = qlcnic_dcb_peer_app_info,
1145         .peer_getapptable       = qlcnic_dcb_peer_app_table,
1146         .cee_peer_getpg         = qlcnic_dcb_cee_peer_get_pg,
1147         .cee_peer_getpfc        = qlcnic_dcb_cee_peer_get_pfc,
1148 };