1 /* QLogic qede NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 #include <linux/version.h>
33 #include <linux/types.h>
34 #include <linux/netdevice.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/string.h>
38 #include <linux/pci.h>
39 #include <linux/capability.h>
40 #include <linux/vmalloc.h>
44 #define QEDE_RQSTAT_OFFSET(stat_name) \
45 (offsetof(struct qede_rx_queue, stat_name))
46 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
47 #define QEDE_RQSTAT(stat_name) \
48 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
50 #define QEDE_SELFTEST_POLL_COUNT 100
54 char string[ETH_GSTRING_LEN];
55 } qede_rqstats_arr[] = {
56 QEDE_RQSTAT(rcv_pkts),
57 QEDE_RQSTAT(rx_hw_errors),
58 QEDE_RQSTAT(rx_alloc_errors),
59 QEDE_RQSTAT(rx_ip_frags),
60 QEDE_RQSTAT(xdp_no_pass),
63 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
64 #define QEDE_TQSTAT_OFFSET(stat_name) \
65 (offsetof(struct qede_tx_queue, stat_name))
66 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
67 #define QEDE_TQSTAT(stat_name) \
68 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
69 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
72 char string[ETH_GSTRING_LEN];
73 } qede_tqstats_arr[] = {
74 QEDE_TQSTAT(xmit_pkts),
75 QEDE_TQSTAT(stopped_cnt),
78 #define QEDE_STAT_OFFSET(stat_name, type, base) \
79 (offsetof(type, stat_name) + (base))
80 #define QEDE_STAT_STRING(stat_name) (#stat_name)
81 #define _QEDE_STAT(stat_name, type, base, attr) \
82 {QEDE_STAT_OFFSET(stat_name, type, base), \
83 QEDE_STAT_STRING(stat_name), \
85 #define QEDE_STAT(stat_name) \
86 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
87 #define QEDE_PF_STAT(stat_name) \
88 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
89 BIT(QEDE_STAT_PF_ONLY))
90 #define QEDE_PF_BB_STAT(stat_name) \
91 _QEDE_STAT(stat_name, struct qede_stats_bb, \
92 offsetof(struct qede_stats, bb), \
93 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
94 #define QEDE_PF_AH_STAT(stat_name) \
95 _QEDE_STAT(stat_name, struct qede_stats_ah, \
96 offsetof(struct qede_stats, ah), \
97 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
100 char string[ETH_GSTRING_LEN];
102 #define QEDE_STAT_PF_ONLY 0
103 #define QEDE_STAT_BB_ONLY 1
104 #define QEDE_STAT_AH_ONLY 2
105 } qede_stats_arr[] = {
106 QEDE_STAT(rx_ucast_bytes),
107 QEDE_STAT(rx_mcast_bytes),
108 QEDE_STAT(rx_bcast_bytes),
109 QEDE_STAT(rx_ucast_pkts),
110 QEDE_STAT(rx_mcast_pkts),
111 QEDE_STAT(rx_bcast_pkts),
113 QEDE_STAT(tx_ucast_bytes),
114 QEDE_STAT(tx_mcast_bytes),
115 QEDE_STAT(tx_bcast_bytes),
116 QEDE_STAT(tx_ucast_pkts),
117 QEDE_STAT(tx_mcast_pkts),
118 QEDE_STAT(tx_bcast_pkts),
120 QEDE_PF_STAT(rx_64_byte_packets),
121 QEDE_PF_STAT(rx_65_to_127_byte_packets),
122 QEDE_PF_STAT(rx_128_to_255_byte_packets),
123 QEDE_PF_STAT(rx_256_to_511_byte_packets),
124 QEDE_PF_STAT(rx_512_to_1023_byte_packets),
125 QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
126 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
127 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
128 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
129 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
130 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
131 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
132 QEDE_PF_STAT(tx_64_byte_packets),
133 QEDE_PF_STAT(tx_65_to_127_byte_packets),
134 QEDE_PF_STAT(tx_128_to_255_byte_packets),
135 QEDE_PF_STAT(tx_256_to_511_byte_packets),
136 QEDE_PF_STAT(tx_512_to_1023_byte_packets),
137 QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
138 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
139 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
140 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
141 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
142 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
143 QEDE_PF_STAT(rx_mac_crtl_frames),
144 QEDE_PF_STAT(tx_mac_ctrl_frames),
145 QEDE_PF_STAT(rx_pause_frames),
146 QEDE_PF_STAT(tx_pause_frames),
147 QEDE_PF_STAT(rx_pfc_frames),
148 QEDE_PF_STAT(tx_pfc_frames),
150 QEDE_PF_STAT(rx_crc_errors),
151 QEDE_PF_STAT(rx_align_errors),
152 QEDE_PF_STAT(rx_carrier_errors),
153 QEDE_PF_STAT(rx_oversize_packets),
154 QEDE_PF_STAT(rx_jabbers),
155 QEDE_PF_STAT(rx_undersize_packets),
156 QEDE_PF_STAT(rx_fragments),
157 QEDE_PF_BB_STAT(tx_lpi_entry_count),
158 QEDE_PF_BB_STAT(tx_total_collisions),
159 QEDE_PF_STAT(brb_truncates),
160 QEDE_PF_STAT(brb_discards),
161 QEDE_STAT(no_buff_discards),
162 QEDE_PF_STAT(mftag_filter_discards),
163 QEDE_PF_STAT(mac_filter_discards),
164 QEDE_PF_STAT(gft_filter_drop),
165 QEDE_STAT(tx_err_drop_pkts),
166 QEDE_STAT(ttl0_discard),
167 QEDE_STAT(packet_too_big_discard),
169 QEDE_STAT(coalesced_pkts),
170 QEDE_STAT(coalesced_events),
171 QEDE_STAT(coalesced_aborts_num),
172 QEDE_STAT(non_coalesced_pkts),
173 QEDE_STAT(coalesced_bytes),
175 QEDE_STAT(link_change_count),
178 #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
179 #define QEDE_STAT_IS_PF_ONLY(i) \
180 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
181 #define QEDE_STAT_IS_BB_ONLY(i) \
182 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
183 #define QEDE_STAT_IS_AH_ONLY(i) \
184 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
191 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
195 enum qede_ethtool_tests {
196 QEDE_ETHTOOL_INT_LOOPBACK,
197 QEDE_ETHTOOL_INTERRUPT_TEST,
198 QEDE_ETHTOOL_MEMORY_TEST,
199 QEDE_ETHTOOL_REGISTER_TEST,
200 QEDE_ETHTOOL_CLOCK_TEST,
201 QEDE_ETHTOOL_NVRAM_TEST,
202 QEDE_ETHTOOL_TEST_MAX
205 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
206 "Internal loopback (offline)",
207 "Interrupt (online)\t",
208 "Memory (online)\t\t",
209 "Register (online)\t",
210 "Clock (online)\t\t",
211 "Nvram (online)\t\t",
214 static void qede_get_strings_stats_txq(struct qede_dev *edev,
215 struct qede_tx_queue *txq, u8 **buf)
219 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
221 sprintf(*buf, "%d [XDP]: %s",
222 QEDE_TXQ_XDP_TO_IDX(edev, txq),
223 qede_tqstats_arr[i].string);
225 sprintf(*buf, "%d: %s", txq->index,
226 qede_tqstats_arr[i].string);
227 *buf += ETH_GSTRING_LEN;
231 static void qede_get_strings_stats_rxq(struct qede_dev *edev,
232 struct qede_rx_queue *rxq, u8 **buf)
236 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
237 sprintf(*buf, "%d: %s", rxq->rxq_id,
238 qede_rqstats_arr[i].string);
239 *buf += ETH_GSTRING_LEN;
243 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
245 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
246 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
247 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
250 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
252 struct qede_fastpath *fp;
255 /* Account for queue statistics */
256 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
257 fp = &edev->fp_array[i];
259 if (fp->type & QEDE_FASTPATH_RX)
260 qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
262 if (fp->type & QEDE_FASTPATH_XDP)
263 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
265 if (fp->type & QEDE_FASTPATH_TX)
266 qede_get_strings_stats_txq(edev, fp->txq, &buf);
269 /* Account for non-queue statistics */
270 for (i = 0; i < QEDE_NUM_STATS; i++) {
271 if (qede_is_irrelevant_stat(edev, i))
273 strcpy(buf, qede_stats_arr[i].string);
274 buf += ETH_GSTRING_LEN;
278 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
280 struct qede_dev *edev = netdev_priv(dev);
284 qede_get_strings_stats(edev, buf);
286 case ETH_SS_PRIV_FLAGS:
287 memcpy(buf, qede_private_arr,
288 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
291 memcpy(buf, qede_tests_str_arr,
292 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
295 DP_VERBOSE(edev, QED_MSG_DEBUG,
296 "Unsupported stringset 0x%08x\n", stringset);
300 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
304 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
305 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
310 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
314 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
315 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
320 static void qede_get_ethtool_stats(struct net_device *dev,
321 struct ethtool_stats *stats, u64 *buf)
323 struct qede_dev *edev = netdev_priv(dev);
324 struct qede_fastpath *fp;
327 qede_fill_by_demand_stats(edev);
329 /* Need to protect the access to the fastpath array */
332 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
333 fp = &edev->fp_array[i];
335 if (fp->type & QEDE_FASTPATH_RX)
336 qede_get_ethtool_stats_rxq(fp->rxq, &buf);
338 if (fp->type & QEDE_FASTPATH_XDP)
339 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
341 if (fp->type & QEDE_FASTPATH_TX)
342 qede_get_ethtool_stats_txq(fp->txq, &buf);
345 for (i = 0; i < QEDE_NUM_STATS; i++) {
346 if (qede_is_irrelevant_stat(edev, i))
348 *buf = *((u64 *)(((void *)&edev->stats) +
349 qede_stats_arr[i].offset));
357 static int qede_get_sset_count(struct net_device *dev, int stringset)
359 struct qede_dev *edev = netdev_priv(dev);
360 int num_stats = QEDE_NUM_STATS, i;
364 for (i = 0; i < QEDE_NUM_STATS; i++)
365 if (qede_is_irrelevant_stat(edev, i))
368 /* Account for the Regular Tx statistics */
369 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS;
371 /* Account for the Regular Rx statistics */
372 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
374 /* Account for XDP statistics [if needed] */
376 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
379 case ETH_SS_PRIV_FLAGS:
380 return QEDE_PRI_FLAG_LEN;
383 return QEDE_ETHTOOL_TEST_MAX;
387 DP_VERBOSE(edev, QED_MSG_DEBUG,
388 "Unsupported stringset 0x%08x\n", stringset);
393 static u32 qede_get_priv_flags(struct net_device *dev)
395 struct qede_dev *edev = netdev_priv(dev);
397 return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT;
400 struct qede_link_mode_mapping {
402 u32 ethtool_link_mode;
405 static const struct qede_link_mode_mapping qed_lm_map[] = {
406 {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},
407 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
408 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
409 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
410 {QED_LM_1000baseT_Half_BIT, ETHTOOL_LINK_MODE_1000baseT_Half_BIT},
411 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
412 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
413 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
414 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
415 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
416 {QED_LM_100000baseKR4_Full_BIT,
417 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
420 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \
424 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
425 if ((caps) & (qed_lm_map[i].qed_link_mode)) \
426 __set_bit(qed_lm_map[i].ethtool_link_mode,\
427 lk_ksettings->link_modes.name); \
431 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \
435 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
436 if (test_bit(qed_lm_map[i].ethtool_link_mode, \
437 lk_ksettings->link_modes.name)) \
438 caps |= qed_lm_map[i].qed_link_mode; \
442 static int qede_get_link_ksettings(struct net_device *dev,
443 struct ethtool_link_ksettings *cmd)
445 struct ethtool_link_settings *base = &cmd->base;
446 struct qede_dev *edev = netdev_priv(dev);
447 struct qed_link_output current_link;
451 memset(¤t_link, 0, sizeof(current_link));
452 edev->ops->common->get_link(edev->cdev, ¤t_link);
454 ethtool_link_ksettings_zero_link_mode(cmd, supported);
455 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
457 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
458 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
460 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
461 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
463 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
464 base->speed = current_link.speed;
465 base->duplex = current_link.duplex;
467 base->speed = SPEED_UNKNOWN;
468 base->duplex = DUPLEX_UNKNOWN;
473 base->port = current_link.port;
474 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
480 static int qede_set_link_ksettings(struct net_device *dev,
481 const struct ethtool_link_ksettings *cmd)
483 const struct ethtool_link_settings *base = &cmd->base;
484 struct qede_dev *edev = netdev_priv(dev);
485 struct qed_link_output current_link;
486 struct qed_link_params params;
488 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
489 DP_INFO(edev, "Link settings are not allowed to be changed\n");
492 memset(¤t_link, 0, sizeof(current_link));
493 memset(¶ms, 0, sizeof(params));
494 edev->ops->common->get_link(edev->cdev, ¤t_link);
496 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
497 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
498 if (base->autoneg == AUTONEG_ENABLE) {
499 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
500 DP_INFO(edev, "Auto negotiation is not supported\n");
504 params.autoneg = true;
505 params.forced_speed = 0;
506 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
507 } else { /* forced speed */
508 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
509 params.autoneg = false;
510 params.forced_speed = base->speed;
511 switch (base->speed) {
513 if (!(current_link.supported_caps &
514 QED_LM_1000baseT_Full_BIT)) {
515 DP_INFO(edev, "1G speed not supported\n");
518 params.adv_speeds = QED_LM_1000baseT_Full_BIT;
521 if (!(current_link.supported_caps &
522 QED_LM_10000baseKR_Full_BIT)) {
523 DP_INFO(edev, "10G speed not supported\n");
526 params.adv_speeds = QED_LM_10000baseKR_Full_BIT;
529 if (!(current_link.supported_caps &
530 QED_LM_25000baseKR_Full_BIT)) {
531 DP_INFO(edev, "25G speed not supported\n");
534 params.adv_speeds = QED_LM_25000baseKR_Full_BIT;
537 if (!(current_link.supported_caps &
538 QED_LM_40000baseLR4_Full_BIT)) {
539 DP_INFO(edev, "40G speed not supported\n");
542 params.adv_speeds = QED_LM_40000baseLR4_Full_BIT;
545 if (!(current_link.supported_caps &
546 QED_LM_50000baseKR2_Full_BIT)) {
547 DP_INFO(edev, "50G speed not supported\n");
550 params.adv_speeds = QED_LM_50000baseKR2_Full_BIT;
553 if (!(current_link.supported_caps &
554 QED_LM_100000baseKR4_Full_BIT)) {
555 DP_INFO(edev, "100G speed not supported\n");
558 params.adv_speeds = QED_LM_100000baseKR4_Full_BIT;
561 DP_INFO(edev, "Unsupported speed %u\n", base->speed);
566 params.link_up = true;
567 edev->ops->common->set_link(edev->cdev, ¶ms);
572 static void qede_get_drvinfo(struct net_device *ndev,
573 struct ethtool_drvinfo *info)
575 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
576 struct qede_dev *edev = netdev_priv(ndev);
578 strlcpy(info->driver, "qede", sizeof(info->driver));
579 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
581 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
582 edev->dev_info.common.fw_major,
583 edev->dev_info.common.fw_minor,
584 edev->dev_info.common.fw_rev,
585 edev->dev_info.common.fw_eng);
587 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
588 (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
589 (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
590 (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
591 edev->dev_info.common.mfw_rev & 0xFF);
593 if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) <
594 sizeof(info->fw_version)) {
595 snprintf(info->fw_version, sizeof(info->fw_version),
596 "mfw %s storm %s", mfw, storm);
598 snprintf(info->fw_version, sizeof(info->fw_version),
599 "%s %s", mfw, storm);
602 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
605 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
607 struct qede_dev *edev = netdev_priv(ndev);
609 if (edev->dev_info.common.wol_support) {
610 wol->supported = WAKE_MAGIC;
611 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
615 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
617 struct qede_dev *edev = netdev_priv(ndev);
621 if (wol->wolopts & ~WAKE_MAGIC) {
623 "Can't support WoL options other than magic-packet\n");
627 wol_requested = !!(wol->wolopts & WAKE_MAGIC);
628 if (wol_requested == edev->wol_enabled)
631 /* Need to actually change configuration */
632 if (!edev->dev_info.common.wol_support) {
633 DP_INFO(edev, "Device doesn't support WoL\n");
637 rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
639 edev->wol_enabled = wol_requested;
644 static u32 qede_get_msglevel(struct net_device *ndev)
646 struct qede_dev *edev = netdev_priv(ndev);
648 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
651 static void qede_set_msglevel(struct net_device *ndev, u32 level)
653 struct qede_dev *edev = netdev_priv(ndev);
657 qede_config_debug(level, &dp_module, &dp_level);
659 edev->dp_level = dp_level;
660 edev->dp_module = dp_module;
661 edev->ops->common->update_msglvl(edev->cdev,
662 dp_module, dp_level);
665 static int qede_nway_reset(struct net_device *dev)
667 struct qede_dev *edev = netdev_priv(dev);
668 struct qed_link_output current_link;
669 struct qed_link_params link_params;
671 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
672 DP_INFO(edev, "Link settings are not allowed to be changed\n");
676 if (!netif_running(dev))
679 memset(¤t_link, 0, sizeof(current_link));
680 edev->ops->common->get_link(edev->cdev, ¤t_link);
681 if (!current_link.link_up)
684 /* Toggle the link */
685 memset(&link_params, 0, sizeof(link_params));
686 link_params.link_up = false;
687 edev->ops->common->set_link(edev->cdev, &link_params);
688 link_params.link_up = true;
689 edev->ops->common->set_link(edev->cdev, &link_params);
694 static u32 qede_get_link(struct net_device *dev)
696 struct qede_dev *edev = netdev_priv(dev);
697 struct qed_link_output current_link;
699 memset(¤t_link, 0, sizeof(current_link));
700 edev->ops->common->get_link(edev->cdev, ¤t_link);
702 return current_link.link_up;
705 static int qede_flash_device(struct net_device *dev,
706 struct ethtool_flash *flash)
708 struct qede_dev *edev = netdev_priv(dev);
710 return edev->ops->common->nvm_flash(edev->cdev, flash->data);
713 static int qede_get_coalesce(struct net_device *dev,
714 struct ethtool_coalesce *coal)
716 void *rx_handle = NULL, *tx_handle = NULL;
717 struct qede_dev *edev = netdev_priv(dev);
718 u16 rx_coal, tx_coal, i, rc = 0;
719 struct qede_fastpath *fp;
721 rx_coal = QED_DEFAULT_RX_USECS;
722 tx_coal = QED_DEFAULT_TX_USECS;
724 memset(coal, 0, sizeof(struct ethtool_coalesce));
727 if (edev->state == QEDE_STATE_OPEN) {
729 fp = &edev->fp_array[i];
731 if (fp->type & QEDE_FASTPATH_RX) {
732 rx_handle = fp->rxq->handle;
737 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
739 DP_INFO(edev, "Read Rx coalesce error\n");
744 fp = &edev->fp_array[i];
745 if (fp->type & QEDE_FASTPATH_TX) {
746 tx_handle = fp->txq->handle;
751 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
753 DP_INFO(edev, "Read Tx coalesce error\n");
759 coal->rx_coalesce_usecs = rx_coal;
760 coal->tx_coalesce_usecs = tx_coal;
765 static int qede_set_coalesce(struct net_device *dev,
766 struct ethtool_coalesce *coal)
768 struct qede_dev *edev = netdev_priv(dev);
769 struct qede_fastpath *fp;
773 if (!netif_running(dev)) {
774 DP_INFO(edev, "Interface is down\n");
778 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
779 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
781 "Can't support requested %s coalesce value [max supported value %d]\n",
782 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
783 "tx", QED_COALESCE_MAX);
787 rxc = (u16)coal->rx_coalesce_usecs;
788 txc = (u16)coal->tx_coalesce_usecs;
790 fp = &edev->fp_array[i];
792 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
793 rc = edev->ops->common->set_coalesce(edev->cdev,
798 "Set RX coalesce error, rc = %d\n", rc);
803 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
804 rc = edev->ops->common->set_coalesce(edev->cdev,
809 "Set TX coalesce error, rc = %d\n", rc);
818 static void qede_get_ringparam(struct net_device *dev,
819 struct ethtool_ringparam *ering)
821 struct qede_dev *edev = netdev_priv(dev);
823 ering->rx_max_pending = NUM_RX_BDS_MAX;
824 ering->rx_pending = edev->q_num_rx_buffers;
825 ering->tx_max_pending = NUM_TX_BDS_MAX;
826 ering->tx_pending = edev->q_num_tx_buffers;
829 static int qede_set_ringparam(struct net_device *dev,
830 struct ethtool_ringparam *ering)
832 struct qede_dev *edev = netdev_priv(dev);
834 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
835 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
836 ering->rx_pending, ering->tx_pending);
838 /* Validate legality of configuration */
839 if (ering->rx_pending > NUM_RX_BDS_MAX ||
840 ering->rx_pending < NUM_RX_BDS_MIN ||
841 ering->tx_pending > NUM_TX_BDS_MAX ||
842 ering->tx_pending < NUM_TX_BDS_MIN) {
843 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
844 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
845 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
846 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
850 /* Change ring size and re-load */
851 edev->q_num_rx_buffers = ering->rx_pending;
852 edev->q_num_tx_buffers = ering->tx_pending;
854 qede_reload(edev, NULL, false);
859 static void qede_get_pauseparam(struct net_device *dev,
860 struct ethtool_pauseparam *epause)
862 struct qede_dev *edev = netdev_priv(dev);
863 struct qed_link_output current_link;
865 memset(¤t_link, 0, sizeof(current_link));
866 edev->ops->common->get_link(edev->cdev, ¤t_link);
868 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
869 epause->autoneg = true;
870 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
871 epause->rx_pause = true;
872 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
873 epause->tx_pause = true;
875 DP_VERBOSE(edev, QED_MSG_DEBUG,
876 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
877 epause->cmd, epause->autoneg, epause->rx_pause,
881 static int qede_set_pauseparam(struct net_device *dev,
882 struct ethtool_pauseparam *epause)
884 struct qede_dev *edev = netdev_priv(dev);
885 struct qed_link_params params;
886 struct qed_link_output current_link;
888 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
890 "Pause settings are not allowed to be changed\n");
894 memset(¤t_link, 0, sizeof(current_link));
895 edev->ops->common->get_link(edev->cdev, ¤t_link);
897 memset(¶ms, 0, sizeof(params));
898 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
899 if (epause->autoneg) {
900 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
901 DP_INFO(edev, "autoneg not supported\n");
904 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
906 if (epause->rx_pause)
907 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
908 if (epause->tx_pause)
909 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
911 params.link_up = true;
912 edev->ops->common->set_link(edev->cdev, ¶ms);
917 static void qede_get_regs(struct net_device *ndev,
918 struct ethtool_regs *regs, void *buffer)
920 struct qede_dev *edev = netdev_priv(ndev);
923 memset(buffer, 0, regs->len);
925 if (edev->ops && edev->ops->common)
926 edev->ops->common->dbg_all_data(edev->cdev, buffer);
929 static int qede_get_regs_len(struct net_device *ndev)
931 struct qede_dev *edev = netdev_priv(ndev);
933 if (edev->ops && edev->ops->common)
934 return edev->ops->common->dbg_all_data_size(edev->cdev);
939 static void qede_update_mtu(struct qede_dev *edev,
940 struct qede_reload_args *args)
942 edev->ndev->mtu = args->u.mtu;
946 int qede_change_mtu(struct net_device *ndev, int new_mtu)
948 struct qede_dev *edev = netdev_priv(ndev);
949 struct qede_reload_args args;
951 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
952 "Configuring MTU size of %d\n", new_mtu);
954 if (new_mtu > PAGE_SIZE)
955 ndev->features &= ~NETIF_F_GRO_HW;
957 /* Set the mtu field and re-start the interface if needed */
958 args.u.mtu = new_mtu;
959 args.func = &qede_update_mtu;
960 qede_reload(edev, &args, false);
962 edev->ops->common->update_mtu(edev->cdev, new_mtu);
967 static void qede_get_channels(struct net_device *dev,
968 struct ethtool_channels *channels)
970 struct qede_dev *edev = netdev_priv(dev);
972 channels->max_combined = QEDE_MAX_RSS_CNT(edev);
973 channels->max_rx = QEDE_MAX_RSS_CNT(edev);
974 channels->max_tx = QEDE_MAX_RSS_CNT(edev);
975 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
977 channels->tx_count = edev->fp_num_tx;
978 channels->rx_count = edev->fp_num_rx;
981 static int qede_set_channels(struct net_device *dev,
982 struct ethtool_channels *channels)
984 struct qede_dev *edev = netdev_priv(dev);
987 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
988 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
989 channels->rx_count, channels->tx_count,
990 channels->other_count, channels->combined_count);
992 count = channels->rx_count + channels->tx_count +
993 channels->combined_count;
995 /* We don't support `other' channels */
996 if (channels->other_count) {
997 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
998 "command parameters not supported\n");
1002 if (!(channels->combined_count || (channels->rx_count &&
1003 channels->tx_count))) {
1004 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1005 "need to request at least one transmit and one receive channel\n");
1009 if (count > QEDE_MAX_RSS_CNT(edev)) {
1010 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1011 "requested channels = %d max supported channels = %d\n",
1012 count, QEDE_MAX_RSS_CNT(edev));
1016 /* Check if there was a change in the active parameters */
1017 if ((count == QEDE_QUEUE_CNT(edev)) &&
1018 (channels->tx_count == edev->fp_num_tx) &&
1019 (channels->rx_count == edev->fp_num_rx)) {
1020 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1021 "No change in active parameters\n");
1025 /* We need the number of queues to be divisible between the hwfns */
1026 if ((count % edev->dev_info.common.num_hwfns) ||
1027 (channels->tx_count % edev->dev_info.common.num_hwfns) ||
1028 (channels->rx_count % edev->dev_info.common.num_hwfns)) {
1029 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1030 "Number of channels must be divisible by %04x\n",
1031 edev->dev_info.common.num_hwfns);
1035 /* Set number of queues and reload if necessary */
1036 edev->req_queues = count;
1037 edev->req_num_tx = channels->tx_count;
1038 edev->req_num_rx = channels->rx_count;
1039 /* Reset the indirection table if rx queue count is updated */
1040 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
1041 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
1042 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
1045 qede_reload(edev, NULL, false);
1050 static int qede_get_ts_info(struct net_device *dev,
1051 struct ethtool_ts_info *info)
1053 struct qede_dev *edev = netdev_priv(dev);
1055 return qede_ptp_get_ts_info(edev, info);
1058 static int qede_set_phys_id(struct net_device *dev,
1059 enum ethtool_phys_id_state state)
1061 struct qede_dev *edev = netdev_priv(dev);
1065 case ETHTOOL_ID_ACTIVE:
1066 return 1; /* cycle on/off once per second */
1069 led_state = QED_LED_MODE_ON;
1072 case ETHTOOL_ID_OFF:
1073 led_state = QED_LED_MODE_OFF;
1076 case ETHTOOL_ID_INACTIVE:
1077 led_state = QED_LED_MODE_RESTORE;
1081 edev->ops->common->set_led(edev->cdev, led_state);
1086 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1088 info->data = RXH_IP_SRC | RXH_IP_DST;
1090 switch (info->flow_type) {
1093 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1096 if (edev->rss_caps & QED_RSS_IPV4_UDP)
1097 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1100 if (edev->rss_caps & QED_RSS_IPV6_UDP)
1101 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1114 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1117 struct qede_dev *edev = netdev_priv(dev);
1120 switch (info->cmd) {
1121 case ETHTOOL_GRXRINGS:
1122 info->data = QEDE_RSS_COUNT(edev);
1125 rc = qede_get_rss_flags(edev, info);
1127 case ETHTOOL_GRXCLSRLCNT:
1128 info->rule_cnt = qede_get_arfs_filter_count(edev);
1129 info->data = QEDE_RFS_MAX_FLTR;
1131 case ETHTOOL_GRXCLSRULE:
1132 rc = qede_get_cls_rule_entry(edev, info);
1134 case ETHTOOL_GRXCLSRLALL:
1135 rc = qede_get_cls_rule_all(edev, info, rule_locs);
1138 DP_ERR(edev, "Command parameters not supported\n");
1145 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1147 struct qed_update_vport_params *vport_update_params;
1148 u8 set_caps = 0, clr_caps = 0;
1151 DP_VERBOSE(edev, QED_MSG_DEBUG,
1152 "Set rss flags command parameters: flow type = %d, data = %llu\n",
1153 info->flow_type, info->data);
1155 switch (info->flow_type) {
1158 /* For TCP only 4-tuple hash is supported */
1159 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
1160 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1161 DP_INFO(edev, "Command parameters not supported\n");
1166 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1167 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1168 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1169 set_caps = QED_RSS_IPV4_UDP;
1170 DP_VERBOSE(edev, QED_MSG_DEBUG,
1171 "UDP 4-tuple enabled\n");
1172 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1173 clr_caps = QED_RSS_IPV4_UDP;
1174 DP_VERBOSE(edev, QED_MSG_DEBUG,
1175 "UDP 4-tuple disabled\n");
1181 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1182 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1183 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1184 set_caps = QED_RSS_IPV6_UDP;
1185 DP_VERBOSE(edev, QED_MSG_DEBUG,
1186 "UDP 4-tuple enabled\n");
1187 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1188 clr_caps = QED_RSS_IPV6_UDP;
1189 DP_VERBOSE(edev, QED_MSG_DEBUG,
1190 "UDP 4-tuple disabled\n");
1197 /* For IP only 2-tuple hash is supported */
1198 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
1199 DP_INFO(edev, "Command parameters not supported\n");
1204 case AH_ESP_V4_FLOW:
1208 case AH_ESP_V6_FLOW:
1213 /* RSS is not supported for these protocols */
1215 DP_INFO(edev, "Command parameters not supported\n");
1223 /* No action is needed if there is no change in the rss capability */
1224 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
1227 /* Update internal configuration */
1228 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
1229 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
1231 /* Re-configure if possible */
1233 if (edev->state == QEDE_STATE_OPEN) {
1234 vport_update_params = vzalloc(sizeof(*vport_update_params));
1235 if (!vport_update_params) {
1236 __qede_unlock(edev);
1239 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1240 &vport_update_params->update_rss_flg);
1241 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1242 vfree(vport_update_params);
1244 __qede_unlock(edev);
1249 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
1251 struct qede_dev *edev = netdev_priv(dev);
1254 switch (info->cmd) {
1256 rc = qede_set_rss_flags(edev, info);
1258 case ETHTOOL_SRXCLSRLINS:
1259 rc = qede_add_cls_rule(edev, info);
1261 case ETHTOOL_SRXCLSRLDEL:
1262 rc = qede_del_cls_rule(edev, info);
1265 DP_INFO(edev, "Command parameters not supported\n");
1272 static u32 qede_get_rxfh_indir_size(struct net_device *dev)
1274 return QED_RSS_IND_TABLE_SIZE;
1277 static u32 qede_get_rxfh_key_size(struct net_device *dev)
1279 struct qede_dev *edev = netdev_priv(dev);
1281 return sizeof(edev->rss_key);
1284 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
1286 struct qede_dev *edev = netdev_priv(dev);
1290 *hfunc = ETH_RSS_HASH_TOP;
1295 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1296 indir[i] = edev->rss_ind_table[i];
1299 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
1304 static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
1305 const u8 *key, const u8 hfunc)
1307 struct qed_update_vport_params *vport_update_params;
1308 struct qede_dev *edev = netdev_priv(dev);
1311 if (edev->dev_info.common.num_hwfns > 1) {
1313 "RSS configuration is not supported for 100G devices\n");
1317 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
1324 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1325 edev->rss_ind_table[i] = indir[i];
1326 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
1330 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
1331 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
1335 if (edev->state == QEDE_STATE_OPEN) {
1336 vport_update_params = vzalloc(sizeof(*vport_update_params));
1337 if (!vport_update_params) {
1338 __qede_unlock(edev);
1341 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1342 &vport_update_params->update_rss_flg);
1343 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1344 vfree(vport_update_params);
1346 __qede_unlock(edev);
1351 /* This function enables the interrupt generation and the NAPI on the device */
1352 static void qede_netif_start(struct qede_dev *edev)
1356 if (!netif_running(edev->ndev))
1360 /* Update and reenable interrupts */
1361 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
1362 napi_enable(&edev->fp_array[i].napi);
1366 /* This function disables the NAPI and the interrupt generation on the device */
1367 static void qede_netif_stop(struct qede_dev *edev)
1372 napi_disable(&edev->fp_array[i].napi);
1373 /* Disable interrupts */
1374 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
1378 static int qede_selftest_transmit_traffic(struct qede_dev *edev,
1379 struct sk_buff *skb)
1381 struct qede_tx_queue *txq = NULL;
1382 struct eth_tx_1st_bd *first_bd;
1388 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1389 txq = edev->fp_array[i].txq;
1395 DP_NOTICE(edev, "Tx path is not available\n");
1399 /* Fill the entry in the SW ring and the BDs in the FW ring */
1400 idx = txq->sw_tx_prod;
1401 txq->sw_tx_ring.skbs[idx].skb = skb;
1402 first_bd = qed_chain_produce(&txq->tx_pbl);
1403 memset(first_bd, 0, sizeof(*first_bd));
1404 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1405 first_bd->data.bd_flags.bitfields = val;
1406 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
1407 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1408 first_bd->data.bitfields |= cpu_to_le16(val);
1410 /* Map skb linear data for DMA and set in the first BD */
1411 mapping = dma_map_single(&edev->pdev->dev, skb->data,
1412 skb_headlen(skb), DMA_TO_DEVICE);
1413 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1414 DP_NOTICE(edev, "SKB mapping failed\n");
1417 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1419 /* update the first BD with the actual num BDs */
1420 first_bd->data.nbds = 1;
1421 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1422 /* 'next page' entries are counted in the producer value */
1423 val = qed_chain_get_prod_idx(&txq->tx_pbl);
1424 txq->tx_db.data.bd_prod = cpu_to_le16(val);
1426 /* wmb makes sure that the BDs data is updated before updating the
1427 * producer, otherwise FW may read old data from the BDs.
1431 writel(txq->tx_db.raw, txq->doorbell_addr);
1433 /* mmiowb is needed to synchronize doorbell writes from more than one
1434 * processor. It guarantees that the write arrives to the device before
1435 * the queue lock is released and another start_xmit is called (possibly
1436 * on another CPU). Without this barrier, the next doorbell can bypass
1437 * this doorbell. This is applicable to IA64/Altix systems.
1441 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
1442 if (qede_txq_has_work(txq))
1444 usleep_range(100, 200);
1447 if (!qede_txq_has_work(txq)) {
1448 DP_NOTICE(edev, "Tx completion didn't happen\n");
1452 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
1453 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
1454 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
1455 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
1456 txq->sw_tx_ring.skbs[idx].skb = NULL;
1461 static int qede_selftest_receive_traffic(struct qede_dev *edev)
1463 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len;
1464 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1465 struct qede_rx_queue *rxq = NULL;
1466 struct sw_rx_data *sw_rx_data;
1467 union eth_rx_cqe *cqe;
1468 int i, iter, rc = 0;
1472 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
1473 rxq = edev->fp_array[i].rxq;
1479 DP_NOTICE(edev, "Rx path is not available\n");
1483 /* The packet is expected to receive on rx-queue 0 even though RSS is
1484 * enabled. This is because the queue 0 is configured as the default
1485 * queue and that the loopback traffic is not IP.
1487 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
1488 if (!qede_has_rx_work(rxq)) {
1489 usleep_range(100, 200);
1493 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1494 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1496 /* Memory barrier to prevent the CPU from doing speculative
1497 * reads of CQE/BD before reading hw_comp_cons. If the CQE is
1498 * read before it is written by FW, then FW writes CQE and SB,
1499 * and then the CPU reads the hw_comp_cons, it will use an old
1504 /* Get the CQE from the completion ring */
1505 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1507 /* Get the data from the SW ring */
1508 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1509 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1510 fp_cqe = &cqe->fast_path_regular;
1511 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1512 data_ptr = (u8 *)(page_address(sw_rx_data->data) +
1513 fp_cqe->placement_offset +
1514 sw_rx_data->page_offset +
1516 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
1517 ether_addr_equal(data_ptr + ETH_ALEN,
1518 edev->ndev->dev_addr)) {
1519 for (i = ETH_HLEN; i < len; i++)
1520 if (data_ptr[i] != (unsigned char)(i & 0xff)) {
1525 qede_recycle_rx_bd_ring(rxq, 1);
1526 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1530 DP_INFO(edev, "Not the transmitted packet\n");
1531 qede_recycle_rx_bd_ring(rxq, 1);
1532 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1535 if (iter == QEDE_SELFTEST_POLL_COUNT) {
1536 DP_NOTICE(edev, "Failed to receive the traffic\n");
1540 qede_update_rx_prod(edev, rxq);
1545 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
1547 struct qed_link_params link_params;
1548 struct sk_buff *skb = NULL;
1553 if (!netif_running(edev->ndev)) {
1554 DP_NOTICE(edev, "Interface is down\n");
1558 qede_netif_stop(edev);
1560 /* Bring up the link in Loopback mode */
1561 memset(&link_params, 0, sizeof(link_params));
1562 link_params.link_up = true;
1563 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1564 link_params.loopback_mode = loopback_mode;
1565 edev->ops->common->set_link(edev->cdev, &link_params);
1567 /* Wait for loopback configuration to apply */
1568 msleep_interruptible(500);
1570 /* prepare the loopback packet */
1571 pkt_size = edev->ndev->mtu + ETH_HLEN;
1573 skb = netdev_alloc_skb(edev->ndev, pkt_size);
1575 DP_INFO(edev, "Can't allocate skb\n");
1577 goto test_loopback_exit;
1579 packet = skb_put(skb, pkt_size);
1580 ether_addr_copy(packet, edev->ndev->dev_addr);
1581 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
1582 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
1583 for (i = ETH_HLEN; i < pkt_size; i++)
1584 packet[i] = (unsigned char)(i & 0xff);
1586 rc = qede_selftest_transmit_traffic(edev, skb);
1588 goto test_loopback_exit;
1590 rc = qede_selftest_receive_traffic(edev);
1592 goto test_loopback_exit;
1594 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
1599 /* Bring up the link in Normal mode */
1600 memset(&link_params, 0, sizeof(link_params));
1601 link_params.link_up = true;
1602 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1603 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
1604 edev->ops->common->set_link(edev->cdev, &link_params);
1606 /* Wait for loopback configuration to apply */
1607 msleep_interruptible(500);
1609 qede_netif_start(edev);
1614 static void qede_self_test(struct net_device *dev,
1615 struct ethtool_test *etest, u64 *buf)
1617 struct qede_dev *edev = netdev_priv(dev);
1619 DP_VERBOSE(edev, QED_MSG_DEBUG,
1620 "Self-test command parameters: offline = %d, external_lb = %d\n",
1621 (etest->flags & ETH_TEST_FL_OFFLINE),
1622 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
1624 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
1626 if (etest->flags & ETH_TEST_FL_OFFLINE) {
1627 if (qede_selftest_run_loopback(edev,
1628 QED_LINK_LOOPBACK_INT_PHY)) {
1629 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
1630 etest->flags |= ETH_TEST_FL_FAILED;
1634 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
1635 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
1636 etest->flags |= ETH_TEST_FL_FAILED;
1639 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
1640 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
1641 etest->flags |= ETH_TEST_FL_FAILED;
1644 if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
1645 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
1646 etest->flags |= ETH_TEST_FL_FAILED;
1649 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
1650 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
1651 etest->flags |= ETH_TEST_FL_FAILED;
1654 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
1655 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
1656 etest->flags |= ETH_TEST_FL_FAILED;
1660 static int qede_set_tunable(struct net_device *dev,
1661 const struct ethtool_tunable *tuna,
1664 struct qede_dev *edev = netdev_priv(dev);
1668 case ETHTOOL_RX_COPYBREAK:
1670 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
1671 DP_VERBOSE(edev, QED_MSG_DEBUG,
1672 "Invalid rx copy break value, range is [%u, %u]",
1673 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
1677 edev->rx_copybreak = *(u32 *)data;
1686 static int qede_get_tunable(struct net_device *dev,
1687 const struct ethtool_tunable *tuna, void *data)
1689 struct qede_dev *edev = netdev_priv(dev);
1692 case ETHTOOL_RX_COPYBREAK:
1693 *(u32 *)data = edev->rx_copybreak;
1702 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1704 struct qede_dev *edev = netdev_priv(dev);
1705 struct qed_link_output current_link;
1707 memset(¤t_link, 0, sizeof(current_link));
1708 edev->ops->common->get_link(edev->cdev, ¤t_link);
1710 if (!current_link.eee_supported) {
1711 DP_INFO(edev, "EEE is not supported\n");
1715 if (current_link.eee.adv_caps & QED_EEE_1G_ADV)
1716 edata->advertised = ADVERTISED_1000baseT_Full;
1717 if (current_link.eee.adv_caps & QED_EEE_10G_ADV)
1718 edata->advertised |= ADVERTISED_10000baseT_Full;
1719 if (current_link.sup_caps & QED_EEE_1G_ADV)
1720 edata->supported = ADVERTISED_1000baseT_Full;
1721 if (current_link.sup_caps & QED_EEE_10G_ADV)
1722 edata->supported |= ADVERTISED_10000baseT_Full;
1723 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV)
1724 edata->lp_advertised = ADVERTISED_1000baseT_Full;
1725 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV)
1726 edata->lp_advertised |= ADVERTISED_10000baseT_Full;
1728 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
1729 edata->eee_enabled = current_link.eee.enable;
1730 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
1731 edata->eee_active = current_link.eee_active;
1736 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1738 struct qede_dev *edev = netdev_priv(dev);
1739 struct qed_link_output current_link;
1740 struct qed_link_params params;
1742 if (!edev->ops->common->can_link_change(edev->cdev)) {
1743 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1747 memset(¤t_link, 0, sizeof(current_link));
1748 edev->ops->common->get_link(edev->cdev, ¤t_link);
1750 if (!current_link.eee_supported) {
1751 DP_INFO(edev, "EEE is not supported\n");
1755 memset(¶ms, 0, sizeof(params));
1756 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
1758 if (!(edata->advertised & (ADVERTISED_1000baseT_Full |
1759 ADVERTISED_10000baseT_Full)) ||
1760 ((edata->advertised & (ADVERTISED_1000baseT_Full |
1761 ADVERTISED_10000baseT_Full)) !=
1762 edata->advertised)) {
1763 DP_VERBOSE(edev, QED_MSG_DEBUG,
1764 "Invalid advertised capabilities %d\n",
1769 if (edata->advertised & ADVERTISED_1000baseT_Full)
1770 params.eee.adv_caps = QED_EEE_1G_ADV;
1771 if (edata->advertised & ADVERTISED_10000baseT_Full)
1772 params.eee.adv_caps |= QED_EEE_10G_ADV;
1773 params.eee.enable = edata->eee_enabled;
1774 params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
1775 params.eee.tx_lpi_timer = edata->tx_lpi_timer;
1777 params.link_up = true;
1778 edev->ops->common->set_link(edev->cdev, ¶ms);
1783 static int qede_get_module_info(struct net_device *dev,
1784 struct ethtool_modinfo *modinfo)
1786 struct qede_dev *edev = netdev_priv(dev);
1790 /* Read first 4 bytes to find the sfp type */
1791 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1792 QED_I2C_DEV_ADDR_A0, 0, 4);
1794 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc);
1799 case 0x3: /* SFP, SFP+, SFP-28 */
1800 modinfo->type = ETH_MODULE_SFF_8472;
1801 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1803 case 0xc: /* QSFP */
1804 case 0xd: /* QSFP+ */
1805 modinfo->type = ETH_MODULE_SFF_8436;
1806 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1808 case 0x11: /* QSFP-28 */
1809 modinfo->type = ETH_MODULE_SFF_8636;
1810 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1813 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]);
1820 static int qede_get_module_eeprom(struct net_device *dev,
1821 struct ethtool_eeprom *ee, u8 *data)
1823 struct qede_dev *edev = netdev_priv(dev);
1824 u32 start_addr = ee->offset, size = 0;
1828 /* Read A0 section */
1829 if (ee->offset < ETH_MODULE_SFF_8079_LEN) {
1830 /* Limit transfer size to the A0 section boundary */
1831 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN)
1832 size = ETH_MODULE_SFF_8079_LEN - ee->offset;
1836 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1837 QED_I2C_DEV_ADDR_A0,
1840 DP_ERR(edev, "Failed reading A0 section %d\n", rc);
1848 /* Read A2 section */
1849 if (start_addr >= ETH_MODULE_SFF_8079_LEN &&
1850 start_addr < ETH_MODULE_SFF_8472_LEN) {
1851 size = ee->len - size;
1852 /* Limit transfer size to the A2 section boundary */
1853 if (start_addr + size > ETH_MODULE_SFF_8472_LEN)
1854 size = ETH_MODULE_SFF_8472_LEN - start_addr;
1855 start_addr -= ETH_MODULE_SFF_8079_LEN;
1856 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1857 QED_I2C_DEV_ADDR_A2,
1860 DP_VERBOSE(edev, QED_MSG_DEBUG,
1861 "Failed reading A2 section %d\n", rc);
1869 static const struct ethtool_ops qede_ethtool_ops = {
1870 .get_link_ksettings = qede_get_link_ksettings,
1871 .set_link_ksettings = qede_set_link_ksettings,
1872 .get_drvinfo = qede_get_drvinfo,
1873 .get_regs_len = qede_get_regs_len,
1874 .get_regs = qede_get_regs,
1875 .get_wol = qede_get_wol,
1876 .set_wol = qede_set_wol,
1877 .get_msglevel = qede_get_msglevel,
1878 .set_msglevel = qede_set_msglevel,
1879 .nway_reset = qede_nway_reset,
1880 .get_link = qede_get_link,
1881 .get_coalesce = qede_get_coalesce,
1882 .set_coalesce = qede_set_coalesce,
1883 .get_ringparam = qede_get_ringparam,
1884 .set_ringparam = qede_set_ringparam,
1885 .get_pauseparam = qede_get_pauseparam,
1886 .set_pauseparam = qede_set_pauseparam,
1887 .get_strings = qede_get_strings,
1888 .set_phys_id = qede_set_phys_id,
1889 .get_ethtool_stats = qede_get_ethtool_stats,
1890 .get_priv_flags = qede_get_priv_flags,
1891 .get_sset_count = qede_get_sset_count,
1892 .get_rxnfc = qede_get_rxnfc,
1893 .set_rxnfc = qede_set_rxnfc,
1894 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
1895 .get_rxfh_key_size = qede_get_rxfh_key_size,
1896 .get_rxfh = qede_get_rxfh,
1897 .set_rxfh = qede_set_rxfh,
1898 .get_ts_info = qede_get_ts_info,
1899 .get_channels = qede_get_channels,
1900 .set_channels = qede_set_channels,
1901 .self_test = qede_self_test,
1902 .get_module_info = qede_get_module_info,
1903 .get_module_eeprom = qede_get_module_eeprom,
1904 .get_eee = qede_get_eee,
1905 .set_eee = qede_set_eee,
1907 .get_tunable = qede_get_tunable,
1908 .set_tunable = qede_set_tunable,
1909 .flash_device = qede_flash_device,
1912 static const struct ethtool_ops qede_vf_ethtool_ops = {
1913 .get_link_ksettings = qede_get_link_ksettings,
1914 .get_drvinfo = qede_get_drvinfo,
1915 .get_msglevel = qede_get_msglevel,
1916 .set_msglevel = qede_set_msglevel,
1917 .get_link = qede_get_link,
1918 .get_coalesce = qede_get_coalesce,
1919 .set_coalesce = qede_set_coalesce,
1920 .get_ringparam = qede_get_ringparam,
1921 .set_ringparam = qede_set_ringparam,
1922 .get_strings = qede_get_strings,
1923 .get_ethtool_stats = qede_get_ethtool_stats,
1924 .get_priv_flags = qede_get_priv_flags,
1925 .get_sset_count = qede_get_sset_count,
1926 .get_rxnfc = qede_get_rxnfc,
1927 .set_rxnfc = qede_set_rxnfc,
1928 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
1929 .get_rxfh_key_size = qede_get_rxfh_key_size,
1930 .get_rxfh = qede_get_rxfh,
1931 .set_rxfh = qede_set_rxfh,
1932 .get_channels = qede_get_channels,
1933 .set_channels = qede_set_channels,
1934 .get_tunable = qede_get_tunable,
1935 .set_tunable = qede_set_tunable,
1938 void qede_set_ethtool_ops(struct net_device *dev)
1940 struct qede_dev *edev = netdev_priv(dev);
1943 dev->ethtool_ops = &qede_vf_ethtool_ops;
1945 dev->ethtool_ops = &qede_ethtool_ops;