2 * Copyright (c) 2016, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/mlx5/driver.h>
36 #include "mlx5_core.h"
39 static void mlx5e_vxlan_add_port(struct mlx5e_priv *priv, u16 port);
41 void mlx5e_vxlan_init(struct mlx5e_priv *priv)
43 struct mlx5e_vxlan_db *vxlan_db = &priv->vxlan;
45 spin_lock_init(&vxlan_db->lock);
46 hash_init(vxlan_db->htable);
48 if (mlx5e_vxlan_allowed(priv->mdev))
49 /* Hardware adds 4789 by default.
50 * Lockless since we are the only hash table consumers, wq and TX are disabled.
52 mlx5e_vxlan_add_port(priv, 4789);
55 static inline u8 mlx5e_vxlan_max_udp_ports(struct mlx5_core_dev *mdev)
57 return MLX5_CAP_ETH(mdev, max_vxlan_udp_ports) ?: 4;
60 static int mlx5e_vxlan_core_add_port_cmd(struct mlx5_core_dev *mdev, u16 port)
62 u32 in[MLX5_ST_SZ_DW(add_vxlan_udp_dport_in)] = {0};
63 u32 out[MLX5_ST_SZ_DW(add_vxlan_udp_dport_out)] = {0};
65 MLX5_SET(add_vxlan_udp_dport_in, in, opcode,
66 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT);
67 MLX5_SET(add_vxlan_udp_dport_in, in, vxlan_udp_port, port);
68 return mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
71 static int mlx5e_vxlan_core_del_port_cmd(struct mlx5_core_dev *mdev, u16 port)
73 u32 in[MLX5_ST_SZ_DW(delete_vxlan_udp_dport_in)] = {0};
74 u32 out[MLX5_ST_SZ_DW(delete_vxlan_udp_dport_out)] = {0};
76 MLX5_SET(delete_vxlan_udp_dport_in, in, opcode,
77 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT);
78 MLX5_SET(delete_vxlan_udp_dport_in, in, vxlan_udp_port, port);
79 return mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
82 static struct mlx5e_vxlan *mlx5e_vxlan_lookup_port_locked(struct mlx5e_priv *priv,
85 struct mlx5e_vxlan_db *vxlan_db = &priv->vxlan;
86 struct mlx5e_vxlan *vxlan;
88 hash_for_each_possible(vxlan_db->htable, vxlan, hlist, port) {
89 if (vxlan->udp_port == port)
96 struct mlx5e_vxlan *mlx5e_vxlan_lookup_port(struct mlx5e_priv *priv, u16 port)
98 struct mlx5e_vxlan_db *vxlan_db = &priv->vxlan;
99 struct mlx5e_vxlan *vxlan;
101 spin_lock_bh(&vxlan_db->lock);
102 vxlan = mlx5e_vxlan_lookup_port_locked(priv, port);
103 spin_unlock_bh(&vxlan_db->lock);
108 static void mlx5e_vxlan_add_port(struct mlx5e_priv *priv, u16 port)
110 struct mlx5e_vxlan_db *vxlan_db = &priv->vxlan;
111 struct mlx5e_vxlan *vxlan;
113 vxlan = mlx5e_vxlan_lookup_port(priv, port);
115 atomic_inc(&vxlan->refcount);
119 if (vxlan_db->num_ports >= mlx5e_vxlan_max_udp_ports(priv->mdev)) {
120 netdev_info(priv->netdev,
121 "UDP port (%d) not offloaded, max number of UDP ports (%d) are already offloaded\n",
122 port, mlx5e_vxlan_max_udp_ports(priv->mdev));
126 if (mlx5e_vxlan_core_add_port_cmd(priv->mdev, port))
129 vxlan = kzalloc(sizeof(*vxlan), GFP_KERNEL);
131 goto err_delete_port;
133 vxlan->udp_port = port;
134 atomic_set(&vxlan->refcount, 1);
136 spin_lock_bh(&vxlan_db->lock);
137 hash_add(vxlan_db->htable, &vxlan->hlist, port);
138 spin_unlock_bh(&vxlan_db->lock);
140 vxlan_db->num_ports++;
144 mlx5e_vxlan_core_del_port_cmd(priv->mdev, port);
147 static void mlx5e_vxlan_add_work(struct work_struct *work)
149 struct mlx5e_vxlan_work *vxlan_work =
150 container_of(work, struct mlx5e_vxlan_work, work);
151 struct mlx5e_priv *priv = vxlan_work->priv;
152 u16 port = vxlan_work->port;
154 mutex_lock(&priv->state_lock);
155 mlx5e_vxlan_add_port(priv, port);
156 mutex_unlock(&priv->state_lock);
161 static void mlx5e_vxlan_del_work(struct work_struct *work)
163 struct mlx5e_vxlan_work *vxlan_work =
164 container_of(work, struct mlx5e_vxlan_work, work);
165 struct mlx5e_priv *priv = vxlan_work->priv;
166 struct mlx5e_vxlan_db *vxlan_db = &priv->vxlan;
167 u16 port = vxlan_work->port;
168 struct mlx5e_vxlan *vxlan;
171 mutex_lock(&priv->state_lock);
172 spin_lock_bh(&vxlan_db->lock);
173 vxlan = mlx5e_vxlan_lookup_port_locked(priv, port);
177 if (atomic_dec_and_test(&vxlan->refcount)) {
178 hash_del(&vxlan->hlist);
183 spin_unlock_bh(&vxlan_db->lock);
186 mlx5e_vxlan_core_del_port_cmd(priv->mdev, port);
188 vxlan_db->num_ports--;
190 mutex_unlock(&priv->state_lock);
194 void mlx5e_vxlan_queue_work(struct mlx5e_priv *priv, u16 port, int add)
196 struct mlx5e_vxlan_work *vxlan_work;
198 vxlan_work = kmalloc(sizeof(*vxlan_work), GFP_ATOMIC);
203 INIT_WORK(&vxlan_work->work, mlx5e_vxlan_add_work);
205 INIT_WORK(&vxlan_work->work, mlx5e_vxlan_del_work);
207 vxlan_work->priv = priv;
208 vxlan_work->port = port;
209 queue_work(priv->wq, &vxlan_work->work);
212 void mlx5e_vxlan_cleanup(struct mlx5e_priv *priv)
214 struct mlx5e_vxlan_db *vxlan_db = &priv->vxlan;
215 struct mlx5e_vxlan *vxlan;
216 struct hlist_node *tmp;
219 /* Lockless since we are the only hash table consumers, wq and TX are disabled */
220 hash_for_each_safe(vxlan_db->htable, bkt, tmp, vxlan, hlist) {
221 hash_del(&vxlan->hlist);
222 mlx5e_vxlan_core_del_port_cmd(priv->mdev, vxlan->udp_port);