2 * Copyright (c) 2017, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
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8 * OpenIB.org BSD license below:
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11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/hash.h>
36 #define MLX5I_MAX_LOG_PKEY_SUP 7
38 struct qpn_to_netdev {
39 struct net_device *netdev;
40 struct hlist_node hlist;
44 struct mlx5i_pkey_qpn_ht {
45 struct hlist_head buckets[1 << MLX5I_MAX_LOG_PKEY_SUP];
46 spinlock_t ht_lock; /* Synchronise with NAPI */
49 int mlx5i_pkey_qpn_ht_init(struct net_device *netdev)
51 struct mlx5i_priv *ipriv = netdev_priv(netdev);
52 struct mlx5i_pkey_qpn_ht *qpn_htbl;
54 qpn_htbl = kzalloc(sizeof(*qpn_htbl), GFP_KERNEL);
58 ipriv->qpn_htbl = qpn_htbl;
59 spin_lock_init(&qpn_htbl->ht_lock);
64 void mlx5i_pkey_qpn_ht_cleanup(struct net_device *netdev)
66 struct mlx5i_priv *ipriv = netdev_priv(netdev);
68 kfree(ipriv->qpn_htbl);
71 static struct qpn_to_netdev *mlx5i_find_qpn_to_netdev_node(struct hlist_head *buckets,
74 struct hlist_head *h = &buckets[hash_32(qpn, MLX5I_MAX_LOG_PKEY_SUP)];
75 struct qpn_to_netdev *node;
77 hlist_for_each_entry(node, h, hlist) {
78 if (node->underlay_qpn == qpn)
85 int mlx5i_pkey_add_qpn(struct net_device *netdev, u32 qpn)
87 struct mlx5i_priv *ipriv = netdev_priv(netdev);
88 struct mlx5i_pkey_qpn_ht *ht = ipriv->qpn_htbl;
89 u8 key = hash_32(qpn, MLX5I_MAX_LOG_PKEY_SUP);
90 struct qpn_to_netdev *new_node;
92 new_node = kzalloc(sizeof(*new_node), GFP_KERNEL);
96 new_node->netdev = netdev;
97 new_node->underlay_qpn = qpn;
98 spin_lock_bh(&ht->ht_lock);
99 hlist_add_head(&new_node->hlist, &ht->buckets[key]);
100 spin_unlock_bh(&ht->ht_lock);
105 int mlx5i_pkey_del_qpn(struct net_device *netdev, u32 qpn)
107 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
108 struct mlx5i_priv *ipriv = epriv->ppriv;
109 struct mlx5i_pkey_qpn_ht *ht = ipriv->qpn_htbl;
110 struct qpn_to_netdev *node;
112 node = mlx5i_find_qpn_to_netdev_node(ht->buckets, qpn);
114 mlx5_core_warn(epriv->mdev, "QPN to netdev delete from HT failed\n");
118 spin_lock_bh(&ht->ht_lock);
119 hlist_del_init(&node->hlist);
120 spin_unlock_bh(&ht->ht_lock);
126 struct net_device *mlx5i_pkey_get_netdev(struct net_device *netdev, u32 qpn)
128 struct mlx5i_priv *ipriv = netdev_priv(netdev);
129 struct qpn_to_netdev *node;
131 node = mlx5i_find_qpn_to_netdev_node(ipriv->qpn_htbl->buckets, qpn);
138 static int mlx5i_pkey_open(struct net_device *netdev);
139 static int mlx5i_pkey_close(struct net_device *netdev);
140 static int mlx5i_pkey_dev_init(struct net_device *dev);
141 static void mlx5i_pkey_dev_cleanup(struct net_device *netdev);
142 static int mlx5i_pkey_change_mtu(struct net_device *netdev, int new_mtu);
143 static int mlx5i_pkey_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
145 static const struct net_device_ops mlx5i_pkey_netdev_ops = {
146 .ndo_open = mlx5i_pkey_open,
147 .ndo_stop = mlx5i_pkey_close,
148 .ndo_init = mlx5i_pkey_dev_init,
149 .ndo_uninit = mlx5i_pkey_dev_cleanup,
150 .ndo_change_mtu = mlx5i_pkey_change_mtu,
151 .ndo_do_ioctl = mlx5i_pkey_ioctl,
155 static int mlx5i_pkey_dev_init(struct net_device *dev)
157 struct mlx5e_priv *priv = mlx5i_epriv(dev);
158 struct mlx5i_priv *ipriv, *parent_ipriv;
159 struct net_device *parent_dev;
164 /* Get QPN to netdevice hash table from parent */
165 parent_ifindex = dev->netdev_ops->ndo_get_iflink(dev);
166 parent_dev = dev_get_by_index(dev_net(dev), parent_ifindex);
168 mlx5_core_warn(priv->mdev, "failed to get parent device\n");
172 parent_ipriv = netdev_priv(parent_dev);
173 ipriv->qpn_htbl = parent_ipriv->qpn_htbl;
176 return mlx5i_dev_init(dev);
179 static int mlx5i_pkey_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
181 return mlx5i_ioctl(dev, ifr, cmd);
184 static void mlx5i_pkey_dev_cleanup(struct net_device *netdev)
186 return mlx5i_dev_cleanup(netdev);
189 static int mlx5i_pkey_open(struct net_device *netdev)
191 struct mlx5e_priv *epriv = mlx5i_epriv(netdev);
192 struct mlx5i_priv *ipriv = epriv->ppriv;
193 struct mlx5_core_dev *mdev = epriv->mdev;
196 mutex_lock(&epriv->state_lock);
198 set_bit(MLX5E_STATE_OPENED, &epriv->state);
200 err = mlx5i_init_underlay_qp(epriv);
202 mlx5_core_warn(mdev, "prepare child underlay qp state failed, %d\n", err);
203 goto err_release_lock;
206 err = mlx5_fs_add_rx_underlay_qpn(mdev, ipriv->qp.qpn);
208 mlx5_core_warn(mdev, "attach child underlay qp to ft failed, %d\n", err);
209 goto err_unint_underlay_qp;
212 err = mlx5e_create_tis(mdev, 0 /* tc */, ipriv->qp.qpn, &epriv->tisn[0]);
214 mlx5_core_warn(mdev, "create child tis failed, %d\n", err);
215 goto err_remove_rx_uderlay_qp;
218 err = mlx5e_open_channels(epriv, &epriv->channels);
220 mlx5_core_warn(mdev, "opening child channels failed, %d\n", err);
221 goto err_clear_state_opened_flag;
223 mlx5e_refresh_tirs(epriv, false);
224 mlx5e_activate_priv_channels(epriv);
225 mutex_unlock(&epriv->state_lock);
229 err_clear_state_opened_flag:
230 mlx5e_destroy_tis(mdev, epriv->tisn[0]);
231 err_remove_rx_uderlay_qp:
232 mlx5_fs_remove_rx_underlay_qpn(mdev, ipriv->qp.qpn);
233 err_unint_underlay_qp:
234 mlx5i_uninit_underlay_qp(epriv);
236 clear_bit(MLX5E_STATE_OPENED, &epriv->state);
237 mutex_unlock(&epriv->state_lock);
241 static int mlx5i_pkey_close(struct net_device *netdev)
243 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
244 struct mlx5i_priv *ipriv = priv->ppriv;
245 struct mlx5_core_dev *mdev = priv->mdev;
247 mutex_lock(&priv->state_lock);
249 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
252 clear_bit(MLX5E_STATE_OPENED, &priv->state);
254 netif_carrier_off(priv->netdev);
255 mlx5_fs_remove_rx_underlay_qpn(mdev, ipriv->qp.qpn);
256 mlx5i_uninit_underlay_qp(priv);
257 mlx5e_deactivate_priv_channels(priv);
258 mlx5e_close_channels(&priv->channels);
259 mlx5e_destroy_tis(mdev, priv->tisn[0]);
261 mutex_unlock(&priv->state_lock);
265 static int mlx5i_pkey_change_mtu(struct net_device *netdev, int new_mtu)
267 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
269 mutex_lock(&priv->state_lock);
270 netdev->mtu = new_mtu;
271 mutex_unlock(&priv->state_lock);
276 /* Called directly after IPoIB netdevice was created to initialize SW structs */
277 static void mlx5i_pkey_init(struct mlx5_core_dev *mdev,
278 struct net_device *netdev,
279 const struct mlx5e_profile *profile,
282 struct mlx5e_priv *priv = mlx5i_epriv(netdev);
284 mlx5i_init(mdev, netdev, profile, ppriv);
286 /* Override parent ndo */
287 netdev->netdev_ops = &mlx5i_pkey_netdev_ops;
289 /* Set child limited ethtool support */
290 netdev->ethtool_ops = &mlx5i_pkey_ethtool_ops;
293 priv->channels.params.log_rq_mtu_frames = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE;
296 /* Called directly before IPoIB netdevice is destroyed to cleanup SW structs */
297 static void mlx5i_pkey_cleanup(struct mlx5e_priv *priv)
302 static int mlx5i_pkey_init_tx(struct mlx5e_priv *priv)
304 struct mlx5i_priv *ipriv = priv->ppriv;
307 err = mlx5i_create_underlay_qp(priv->mdev, &ipriv->qp);
309 mlx5_core_warn(priv->mdev, "create child underlay QP failed, %d\n", err);
316 static void mlx5i_pkey_cleanup_tx(struct mlx5e_priv *priv)
318 struct mlx5i_priv *ipriv = priv->ppriv;
320 mlx5i_destroy_underlay_qp(priv->mdev, &ipriv->qp);
323 static int mlx5i_pkey_init_rx(struct mlx5e_priv *priv)
325 /* Since the rx resources are shared between child and parent, the
326 * parent interface is taking care of rx resource allocation and init
331 static void mlx5i_pkey_cleanup_rx(struct mlx5e_priv *priv)
333 /* Since the rx resources are shared between child and parent, the
334 * parent interface is taking care of rx resource free and de-init
338 static const struct mlx5e_profile mlx5i_pkey_nic_profile = {
339 .init = mlx5i_pkey_init,
340 .cleanup = mlx5i_pkey_cleanup,
341 .init_tx = mlx5i_pkey_init_tx,
342 .cleanup_tx = mlx5i_pkey_cleanup_tx,
343 .init_rx = mlx5i_pkey_init_rx,
344 .cleanup_rx = mlx5i_pkey_cleanup_rx,
347 .update_stats = NULL,
348 .max_nch = mlx5e_get_max_num_channels,
349 .rx_handlers.handle_rx_cqe = mlx5i_handle_rx_cqe,
350 .rx_handlers.handle_rx_cqe_mpwqe = NULL, /* Not supported */
351 .max_tc = MLX5I_MAX_NUM_TC,
354 const struct mlx5e_profile *mlx5i_pkey_get_profile(void)
356 return &mlx5i_pkey_nic_profile;