2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/etherdevice.h>
34 #include <linux/mlx5/driver.h>
35 #include <linux/mlx5/mlx5_ifc.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/fs.h>
38 #include "mlx5_core.h"
46 struct mlx5_flow_handle *
47 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
48 struct mlx5_flow_spec *spec,
49 struct mlx5_esw_flow_attr *attr)
51 struct mlx5_flow_destination dest[2] = {};
52 struct mlx5_flow_act flow_act = {0};
53 struct mlx5_fc *counter = NULL;
54 struct mlx5_flow_handle *rule;
58 if (esw->mode != SRIOV_OFFLOADS)
59 return ERR_PTR(-EOPNOTSUPP);
61 /* per flow vlan pop/push is emulated, don't set that into the firmware */
62 flow_act.action = attr->action & ~(MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH | MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
64 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
65 dest[i].type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
66 dest[i].vport_num = attr->out_rep->vport;
69 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
70 counter = mlx5_fc_create(esw->dev, true);
71 if (IS_ERR(counter)) {
72 rule = ERR_CAST(counter);
73 goto err_counter_alloc;
75 dest[i].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
76 dest[i].counter = counter;
80 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
81 MLX5_SET(fte_match_set_misc, misc, source_port, attr->in_rep->vport);
83 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
84 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
86 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS |
87 MLX5_MATCH_MISC_PARAMETERS;
88 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_DECAP)
89 spec->match_criteria_enable |= MLX5_MATCH_INNER_HEADERS;
91 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
92 flow_act.modify_id = attr->mod_hdr_id;
94 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
95 flow_act.encap_id = attr->encap_id;
97 rule = mlx5_add_flow_rules((struct mlx5_flow_table *)esw->fdb_table.fdb,
98 spec, &flow_act, dest, i);
102 esw->offloads.num_flows++;
107 mlx5_fc_destroy(esw->dev, counter);
113 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
114 struct mlx5_flow_handle *rule,
115 struct mlx5_esw_flow_attr *attr)
117 struct mlx5_fc *counter = NULL;
119 counter = mlx5_flow_rule_counter(rule);
120 mlx5_del_flow_rules(rule);
121 mlx5_fc_destroy(esw->dev, counter);
122 esw->offloads.num_flows--;
125 static int esw_set_global_vlan_pop(struct mlx5_eswitch *esw, u8 val)
127 struct mlx5_eswitch_rep *rep;
128 int vf_vport, err = 0;
130 esw_debug(esw->dev, "%s applying global %s policy\n", __func__, val ? "pop" : "none");
131 for (vf_vport = 1; vf_vport < esw->enabled_vports; vf_vport++) {
132 rep = &esw->offloads.vport_reps[vf_vport];
133 if (!rep->rep_if[REP_ETH].valid)
136 err = __mlx5_eswitch_set_vport_vlan(esw, rep->vport, 0, 0, val);
145 static struct mlx5_eswitch_rep *
146 esw_vlan_action_get_vport(struct mlx5_esw_flow_attr *attr, bool push, bool pop)
148 struct mlx5_eswitch_rep *in_rep, *out_rep, *vport = NULL;
150 in_rep = attr->in_rep;
151 out_rep = attr->out_rep;
163 static int esw_add_vlan_action_check(struct mlx5_esw_flow_attr *attr,
164 bool push, bool pop, bool fwd)
166 struct mlx5_eswitch_rep *in_rep, *out_rep;
168 if ((push || pop) && !fwd)
171 in_rep = attr->in_rep;
172 out_rep = attr->out_rep;
174 if (push && in_rep->vport == FDB_UPLINK_VPORT)
177 if (pop && out_rep->vport == FDB_UPLINK_VPORT)
180 /* vport has vlan push configured, can't offload VF --> wire rules w.o it */
181 if (!push && !pop && fwd)
182 if (in_rep->vlan && out_rep->vport == FDB_UPLINK_VPORT)
185 /* protects against (1) setting rules with different vlans to push and
186 * (2) setting rules w.o vlans (attr->vlan = 0) && w. vlans to push (!= 0)
188 if (push && in_rep->vlan_refcount && (in_rep->vlan != attr->vlan))
197 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
198 struct mlx5_esw_flow_attr *attr)
200 struct offloads_fdb *offloads = &esw->fdb_table.offloads;
201 struct mlx5_eswitch_rep *vport = NULL;
205 push = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH);
206 pop = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
207 fwd = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST);
209 err = esw_add_vlan_action_check(attr, push, pop, fwd);
213 attr->vlan_handled = false;
215 vport = esw_vlan_action_get_vport(attr, push, pop);
217 if (!push && !pop && fwd) {
218 /* tracks VF --> wire rules without vlan push action */
219 if (attr->out_rep->vport == FDB_UPLINK_VPORT) {
220 vport->vlan_refcount++;
221 attr->vlan_handled = true;
230 if (!(offloads->vlan_push_pop_refcount)) {
231 /* it's the 1st vlan rule, apply global vlan pop policy */
232 err = esw_set_global_vlan_pop(esw, SET_VLAN_STRIP);
236 offloads->vlan_push_pop_refcount++;
239 if (vport->vlan_refcount)
242 err = __mlx5_eswitch_set_vport_vlan(esw, vport->vport, attr->vlan, 0,
243 SET_VLAN_INSERT | SET_VLAN_STRIP);
246 vport->vlan = attr->vlan;
248 vport->vlan_refcount++;
252 attr->vlan_handled = true;
256 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
257 struct mlx5_esw_flow_attr *attr)
259 struct offloads_fdb *offloads = &esw->fdb_table.offloads;
260 struct mlx5_eswitch_rep *vport = NULL;
264 if (!attr->vlan_handled)
267 push = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH);
268 pop = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
269 fwd = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST);
271 vport = esw_vlan_action_get_vport(attr, push, pop);
273 if (!push && !pop && fwd) {
274 /* tracks VF --> wire rules without vlan push action */
275 if (attr->out_rep->vport == FDB_UPLINK_VPORT)
276 vport->vlan_refcount--;
282 vport->vlan_refcount--;
283 if (vport->vlan_refcount)
284 goto skip_unset_push;
287 err = __mlx5_eswitch_set_vport_vlan(esw, vport->vport,
288 0, 0, SET_VLAN_STRIP);
294 offloads->vlan_push_pop_refcount--;
295 if (offloads->vlan_push_pop_refcount)
298 /* no more vlan rules, stop global vlan pop policy */
299 err = esw_set_global_vlan_pop(esw, 0);
305 struct mlx5_flow_handle *
306 mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *esw, int vport, u32 sqn)
308 struct mlx5_flow_act flow_act = {0};
309 struct mlx5_flow_destination dest = {};
310 struct mlx5_flow_handle *flow_rule;
311 struct mlx5_flow_spec *spec;
314 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
316 flow_rule = ERR_PTR(-ENOMEM);
320 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
321 MLX5_SET(fte_match_set_misc, misc, source_sqn, sqn);
322 MLX5_SET(fte_match_set_misc, misc, source_port, 0x0); /* source vport is 0 */
324 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
325 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_sqn);
326 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
328 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS;
329 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
330 dest.vport_num = vport;
331 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
333 flow_rule = mlx5_add_flow_rules(esw->fdb_table.offloads.fdb, spec,
334 &flow_act, &dest, 1);
335 if (IS_ERR(flow_rule))
336 esw_warn(esw->dev, "FDB: Failed to add send to vport rule err %ld\n", PTR_ERR(flow_rule));
341 EXPORT_SYMBOL(mlx5_eswitch_add_send_to_vport_rule);
343 void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule)
345 mlx5_del_flow_rules(rule);
348 static int esw_add_fdb_miss_rule(struct mlx5_eswitch *esw)
350 struct mlx5_flow_act flow_act = {0};
351 struct mlx5_flow_destination dest = {};
352 struct mlx5_flow_handle *flow_rule = NULL;
353 struct mlx5_flow_spec *spec;
360 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
366 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
367 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
369 dmac_c = MLX5_ADDR_OF(fte_match_param, headers_c,
370 outer_headers.dmac_47_16);
373 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
375 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
377 flow_rule = mlx5_add_flow_rules(esw->fdb_table.offloads.fdb, spec,
378 &flow_act, &dest, 1);
379 if (IS_ERR(flow_rule)) {
380 err = PTR_ERR(flow_rule);
381 esw_warn(esw->dev, "FDB: Failed to add unicast miss flow rule err %d\n", err);
385 esw->fdb_table.offloads.miss_rule_uni = flow_rule;
387 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
389 dmac_v = MLX5_ADDR_OF(fte_match_param, headers_v,
390 outer_headers.dmac_47_16);
392 flow_rule = mlx5_add_flow_rules(esw->fdb_table.offloads.fdb, spec,
393 &flow_act, &dest, 1);
394 if (IS_ERR(flow_rule)) {
395 err = PTR_ERR(flow_rule);
396 esw_warn(esw->dev, "FDB: Failed to add multicast miss flow rule err %d\n", err);
397 mlx5_del_flow_rules(esw->fdb_table.offloads.miss_rule_uni);
401 esw->fdb_table.offloads.miss_rule_multi = flow_rule;
408 #define ESW_OFFLOADS_NUM_GROUPS 4
410 static int esw_create_offloads_fast_fdb_table(struct mlx5_eswitch *esw)
412 struct mlx5_core_dev *dev = esw->dev;
413 struct mlx5_flow_namespace *root_ns;
414 struct mlx5_flow_table *fdb = NULL;
415 int esw_size, err = 0;
417 u32 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
418 MLX5_CAP_GEN(dev, max_flow_counter_15_0);
420 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
422 esw_warn(dev, "Failed to get FDB flow namespace\n");
427 esw_debug(dev, "Create offloads FDB table, min (max esw size(2^%d), max counters(%d)*groups(%d))\n",
428 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size),
429 max_flow_counter, ESW_OFFLOADS_NUM_GROUPS);
431 esw_size = min_t(int, max_flow_counter * ESW_OFFLOADS_NUM_GROUPS,
432 1 << MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
434 if (esw->offloads.encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE)
435 flags |= MLX5_FLOW_TABLE_TUNNEL_EN;
437 fdb = mlx5_create_auto_grouped_flow_table(root_ns, FDB_FAST_PATH,
439 ESW_OFFLOADS_NUM_GROUPS, 0,
443 esw_warn(dev, "Failed to create Fast path FDB Table err %d\n", err);
446 esw->fdb_table.fdb = fdb;
452 static void esw_destroy_offloads_fast_fdb_table(struct mlx5_eswitch *esw)
454 mlx5_destroy_flow_table(esw->fdb_table.fdb);
457 #define MAX_PF_SQ 256
458 #define MAX_SQ_NVPORTS 32
460 static int esw_create_offloads_fdb_tables(struct mlx5_eswitch *esw, int nvports)
462 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
463 struct mlx5_flow_table_attr ft_attr = {};
464 struct mlx5_core_dev *dev = esw->dev;
465 struct mlx5_flow_namespace *root_ns;
466 struct mlx5_flow_table *fdb = NULL;
467 int table_size, ix, err = 0;
468 struct mlx5_flow_group *g;
469 void *match_criteria;
473 esw_debug(esw->dev, "Create offloads FDB Tables\n");
474 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
478 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
480 esw_warn(dev, "Failed to get FDB flow namespace\n");
485 err = esw_create_offloads_fast_fdb_table(esw);
489 table_size = nvports * MAX_SQ_NVPORTS + MAX_PF_SQ + 2;
491 ft_attr.max_fte = table_size;
492 ft_attr.prio = FDB_SLOW_PATH;
494 fdb = mlx5_create_flow_table(root_ns, &ft_attr);
497 esw_warn(dev, "Failed to create slow path FDB Table err %d\n", err);
500 esw->fdb_table.offloads.fdb = fdb;
502 /* create send-to-vport group */
503 memset(flow_group_in, 0, inlen);
504 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
505 MLX5_MATCH_MISC_PARAMETERS);
507 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
509 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_sqn);
510 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_port);
512 ix = nvports * MAX_SQ_NVPORTS + MAX_PF_SQ;
513 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
514 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, ix - 1);
516 g = mlx5_create_flow_group(fdb, flow_group_in);
519 esw_warn(dev, "Failed to create send-to-vport flow group err(%d)\n", err);
522 esw->fdb_table.offloads.send_to_vport_grp = g;
524 /* create miss group */
525 memset(flow_group_in, 0, inlen);
526 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
527 MLX5_MATCH_OUTER_HEADERS);
528 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in,
530 dmac = MLX5_ADDR_OF(fte_match_param, match_criteria,
531 outer_headers.dmac_47_16);
534 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, ix);
535 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, ix + 2);
537 g = mlx5_create_flow_group(fdb, flow_group_in);
540 esw_warn(dev, "Failed to create miss flow group err(%d)\n", err);
543 esw->fdb_table.offloads.miss_grp = g;
545 err = esw_add_fdb_miss_rule(esw);
552 mlx5_destroy_flow_group(esw->fdb_table.offloads.miss_grp);
554 mlx5_destroy_flow_group(esw->fdb_table.offloads.send_to_vport_grp);
556 mlx5_destroy_flow_table(esw->fdb_table.offloads.fdb);
558 mlx5_destroy_flow_table(esw->fdb_table.fdb);
561 kvfree(flow_group_in);
565 static void esw_destroy_offloads_fdb_tables(struct mlx5_eswitch *esw)
567 if (!esw->fdb_table.fdb)
570 esw_debug(esw->dev, "Destroy offloads FDB Tables\n");
571 mlx5_del_flow_rules(esw->fdb_table.offloads.miss_rule_multi);
572 mlx5_del_flow_rules(esw->fdb_table.offloads.miss_rule_uni);
573 mlx5_destroy_flow_group(esw->fdb_table.offloads.send_to_vport_grp);
574 mlx5_destroy_flow_group(esw->fdb_table.offloads.miss_grp);
576 mlx5_destroy_flow_table(esw->fdb_table.offloads.fdb);
577 esw_destroy_offloads_fast_fdb_table(esw);
580 static int esw_create_offloads_table(struct mlx5_eswitch *esw)
582 struct mlx5_flow_table_attr ft_attr = {};
583 struct mlx5_core_dev *dev = esw->dev;
584 struct mlx5_flow_table *ft_offloads;
585 struct mlx5_flow_namespace *ns;
588 ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_OFFLOADS);
590 esw_warn(esw->dev, "Failed to get offloads flow namespace\n");
594 ft_attr.max_fte = dev->priv.sriov.num_vfs + 2;
596 ft_offloads = mlx5_create_flow_table(ns, &ft_attr);
597 if (IS_ERR(ft_offloads)) {
598 err = PTR_ERR(ft_offloads);
599 esw_warn(esw->dev, "Failed to create offloads table, err %d\n", err);
603 esw->offloads.ft_offloads = ft_offloads;
607 static void esw_destroy_offloads_table(struct mlx5_eswitch *esw)
609 struct mlx5_esw_offload *offloads = &esw->offloads;
611 mlx5_destroy_flow_table(offloads->ft_offloads);
614 static int esw_create_vport_rx_group(struct mlx5_eswitch *esw)
616 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
617 struct mlx5_flow_group *g;
618 struct mlx5_priv *priv = &esw->dev->priv;
620 void *match_criteria, *misc;
622 int nvports = priv->sriov.num_vfs + 2;
624 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
628 /* create vport rx group */
629 memset(flow_group_in, 0, inlen);
630 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
631 MLX5_MATCH_MISC_PARAMETERS);
633 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
634 misc = MLX5_ADDR_OF(fte_match_param, match_criteria, misc_parameters);
635 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
637 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
638 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, nvports - 1);
640 g = mlx5_create_flow_group(esw->offloads.ft_offloads, flow_group_in);
644 mlx5_core_warn(esw->dev, "Failed to create vport rx group err %d\n", err);
648 esw->offloads.vport_rx_group = g;
650 kfree(flow_group_in);
654 static void esw_destroy_vport_rx_group(struct mlx5_eswitch *esw)
656 mlx5_destroy_flow_group(esw->offloads.vport_rx_group);
659 struct mlx5_flow_handle *
660 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, int vport, u32 tirn)
662 struct mlx5_flow_act flow_act = {0};
663 struct mlx5_flow_destination dest = {};
664 struct mlx5_flow_handle *flow_rule;
665 struct mlx5_flow_spec *spec;
668 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
670 flow_rule = ERR_PTR(-ENOMEM);
674 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
675 MLX5_SET(fte_match_set_misc, misc, source_port, vport);
677 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
678 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
680 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS;
681 dest.type = MLX5_FLOW_DESTINATION_TYPE_TIR;
684 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
685 flow_rule = mlx5_add_flow_rules(esw->offloads.ft_offloads, spec,
686 &flow_act, &dest, 1);
687 if (IS_ERR(flow_rule)) {
688 esw_warn(esw->dev, "fs offloads: Failed to add vport rx rule err %ld\n", PTR_ERR(flow_rule));
697 static int esw_offloads_start(struct mlx5_eswitch *esw)
699 int err, err1, num_vfs = esw->dev->priv.sriov.num_vfs;
701 if (esw->mode != SRIOV_LEGACY) {
702 esw_warn(esw->dev, "Can't set offloads mode, SRIOV legacy not enabled\n");
706 mlx5_eswitch_disable_sriov(esw);
707 err = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_OFFLOADS);
709 esw_warn(esw->dev, "Failed setting eswitch to offloads, err %d\n", err);
710 err1 = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_LEGACY);
712 esw_warn(esw->dev, "Failed setting eswitch back to legacy, err %d\n", err1);
714 if (esw->offloads.inline_mode == MLX5_INLINE_MODE_NONE) {
715 if (mlx5_eswitch_inline_mode_get(esw,
717 &esw->offloads.inline_mode)) {
718 esw->offloads.inline_mode = MLX5_INLINE_MODE_L2;
719 esw_warn(esw->dev, "Inline mode is different between vports\n");
725 void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw)
727 kfree(esw->offloads.vport_reps);
730 int esw_offloads_init_reps(struct mlx5_eswitch *esw)
732 int total_vfs = MLX5_TOTAL_VPORTS(esw->dev);
733 struct mlx5_core_dev *dev = esw->dev;
734 struct mlx5_esw_offload *offloads;
735 struct mlx5_eswitch_rep *rep;
739 esw->offloads.vport_reps = kcalloc(total_vfs,
740 sizeof(struct mlx5_eswitch_rep),
742 if (!esw->offloads.vport_reps)
745 offloads = &esw->offloads;
746 mlx5_query_nic_vport_mac_address(dev, 0, hw_id);
748 for (vport = 0; vport < total_vfs; vport++) {
749 rep = &offloads->vport_reps[vport];
752 ether_addr_copy(rep->hw_id, hw_id);
755 offloads->vport_reps[0].vport = FDB_UPLINK_VPORT;
760 static void esw_offloads_unload_reps_type(struct mlx5_eswitch *esw, int nvports,
763 struct mlx5_eswitch_rep *rep;
766 for (vport = nvports - 1; vport >= 0; vport--) {
767 rep = &esw->offloads.vport_reps[vport];
768 if (!rep->rep_if[rep_type].valid)
771 rep->rep_if[rep_type].unload(rep);
775 static void esw_offloads_unload_reps(struct mlx5_eswitch *esw, int nvports)
777 u8 rep_type = NUM_REP_TYPES;
779 while (rep_type-- > 0)
780 esw_offloads_unload_reps_type(esw, nvports, rep_type);
783 static int esw_offloads_load_reps_type(struct mlx5_eswitch *esw, int nvports,
786 struct mlx5_eswitch_rep *rep;
790 for (vport = 0; vport < nvports; vport++) {
791 rep = &esw->offloads.vport_reps[vport];
792 if (!rep->rep_if[rep_type].valid)
795 err = rep->rep_if[rep_type].load(esw->dev, rep);
803 esw_offloads_unload_reps_type(esw, vport, rep_type);
807 static int esw_offloads_load_reps(struct mlx5_eswitch *esw, int nvports)
812 for (rep_type = 0; rep_type < NUM_REP_TYPES; rep_type++) {
813 err = esw_offloads_load_reps_type(esw, nvports, rep_type);
821 while (rep_type-- > 0)
822 esw_offloads_unload_reps_type(esw, nvports, rep_type);
826 int esw_offloads_init(struct mlx5_eswitch *esw, int nvports)
830 err = esw_create_offloads_fdb_tables(esw, nvports);
834 err = esw_create_offloads_table(esw);
838 err = esw_create_vport_rx_group(esw);
842 err = esw_offloads_load_reps(esw, nvports);
849 esw_destroy_vport_rx_group(esw);
852 esw_destroy_offloads_table(esw);
855 esw_destroy_offloads_fdb_tables(esw);
860 static int esw_offloads_stop(struct mlx5_eswitch *esw)
862 int err, err1, num_vfs = esw->dev->priv.sriov.num_vfs;
864 mlx5_eswitch_disable_sriov(esw);
865 err = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_LEGACY);
867 esw_warn(esw->dev, "Failed setting eswitch to legacy, err %d\n", err);
868 err1 = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_OFFLOADS);
870 esw_warn(esw->dev, "Failed setting eswitch back to offloads, err %d\n", err);
873 /* enable back PF RoCE */
874 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
879 void esw_offloads_cleanup(struct mlx5_eswitch *esw, int nvports)
881 esw_offloads_unload_reps(esw, nvports);
882 esw_destroy_vport_rx_group(esw);
883 esw_destroy_offloads_table(esw);
884 esw_destroy_offloads_fdb_tables(esw);
887 static int esw_mode_from_devlink(u16 mode, u16 *mlx5_mode)
890 case DEVLINK_ESWITCH_MODE_LEGACY:
891 *mlx5_mode = SRIOV_LEGACY;
893 case DEVLINK_ESWITCH_MODE_SWITCHDEV:
894 *mlx5_mode = SRIOV_OFFLOADS;
903 static int esw_mode_to_devlink(u16 mlx5_mode, u16 *mode)
907 *mode = DEVLINK_ESWITCH_MODE_LEGACY;
910 *mode = DEVLINK_ESWITCH_MODE_SWITCHDEV;
919 static int esw_inline_mode_from_devlink(u8 mode, u8 *mlx5_mode)
922 case DEVLINK_ESWITCH_INLINE_MODE_NONE:
923 *mlx5_mode = MLX5_INLINE_MODE_NONE;
925 case DEVLINK_ESWITCH_INLINE_MODE_LINK:
926 *mlx5_mode = MLX5_INLINE_MODE_L2;
928 case DEVLINK_ESWITCH_INLINE_MODE_NETWORK:
929 *mlx5_mode = MLX5_INLINE_MODE_IP;
931 case DEVLINK_ESWITCH_INLINE_MODE_TRANSPORT:
932 *mlx5_mode = MLX5_INLINE_MODE_TCP_UDP;
941 static int esw_inline_mode_to_devlink(u8 mlx5_mode, u8 *mode)
944 case MLX5_INLINE_MODE_NONE:
945 *mode = DEVLINK_ESWITCH_INLINE_MODE_NONE;
947 case MLX5_INLINE_MODE_L2:
948 *mode = DEVLINK_ESWITCH_INLINE_MODE_LINK;
950 case MLX5_INLINE_MODE_IP:
951 *mode = DEVLINK_ESWITCH_INLINE_MODE_NETWORK;
953 case MLX5_INLINE_MODE_TCP_UDP:
954 *mode = DEVLINK_ESWITCH_INLINE_MODE_TRANSPORT;
963 static int mlx5_devlink_eswitch_check(struct devlink *devlink)
965 struct mlx5_core_dev *dev = devlink_priv(devlink);
967 if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
970 if (!MLX5_CAP_GEN(dev, vport_group_manager))
973 if (dev->priv.eswitch->mode == SRIOV_NONE)
979 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode)
981 struct mlx5_core_dev *dev = devlink_priv(devlink);
982 u16 cur_mlx5_mode, mlx5_mode = 0;
985 err = mlx5_devlink_eswitch_check(devlink);
989 cur_mlx5_mode = dev->priv.eswitch->mode;
991 if (esw_mode_from_devlink(mode, &mlx5_mode))
994 if (cur_mlx5_mode == mlx5_mode)
997 if (mode == DEVLINK_ESWITCH_MODE_SWITCHDEV)
998 return esw_offloads_start(dev->priv.eswitch);
999 else if (mode == DEVLINK_ESWITCH_MODE_LEGACY)
1000 return esw_offloads_stop(dev->priv.eswitch);
1005 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode)
1007 struct mlx5_core_dev *dev = devlink_priv(devlink);
1010 err = mlx5_devlink_eswitch_check(devlink);
1014 return esw_mode_to_devlink(dev->priv.eswitch->mode, mode);
1017 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode)
1019 struct mlx5_core_dev *dev = devlink_priv(devlink);
1020 struct mlx5_eswitch *esw = dev->priv.eswitch;
1024 err = mlx5_devlink_eswitch_check(devlink);
1028 switch (MLX5_CAP_ETH(dev, wqe_inline_mode)) {
1029 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1030 if (mode == DEVLINK_ESWITCH_INLINE_MODE_NONE)
1033 case MLX5_CAP_INLINE_MODE_L2:
1034 esw_warn(dev, "Inline mode can't be set\n");
1036 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1040 if (esw->offloads.num_flows > 0) {
1041 esw_warn(dev, "Can't set inline mode when flows are configured\n");
1045 err = esw_inline_mode_from_devlink(mode, &mlx5_mode);
1049 for (vport = 1; vport < esw->enabled_vports; vport++) {
1050 err = mlx5_modify_nic_vport_min_inline(dev, vport, mlx5_mode);
1052 esw_warn(dev, "Failed to set min inline on vport %d\n",
1054 goto revert_inline_mode;
1058 esw->offloads.inline_mode = mlx5_mode;
1063 mlx5_modify_nic_vport_min_inline(dev,
1065 esw->offloads.inline_mode);
1070 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode)
1072 struct mlx5_core_dev *dev = devlink_priv(devlink);
1073 struct mlx5_eswitch *esw = dev->priv.eswitch;
1076 err = mlx5_devlink_eswitch_check(devlink);
1080 return esw_inline_mode_to_devlink(esw->offloads.inline_mode, mode);
1083 int mlx5_eswitch_inline_mode_get(struct mlx5_eswitch *esw, int nvfs, u8 *mode)
1085 u8 prev_mlx5_mode, mlx5_mode = MLX5_INLINE_MODE_L2;
1086 struct mlx5_core_dev *dev = esw->dev;
1089 if (!MLX5_CAP_GEN(dev, vport_group_manager))
1092 if (esw->mode == SRIOV_NONE)
1095 switch (MLX5_CAP_ETH(dev, wqe_inline_mode)) {
1096 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1097 mlx5_mode = MLX5_INLINE_MODE_NONE;
1099 case MLX5_CAP_INLINE_MODE_L2:
1100 mlx5_mode = MLX5_INLINE_MODE_L2;
1102 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1107 for (vport = 1; vport <= nvfs; vport++) {
1108 mlx5_query_nic_vport_min_inline(dev, vport, &mlx5_mode);
1109 if (vport > 1 && prev_mlx5_mode != mlx5_mode)
1111 prev_mlx5_mode = mlx5_mode;
1119 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink, u8 encap)
1121 struct mlx5_core_dev *dev = devlink_priv(devlink);
1122 struct mlx5_eswitch *esw = dev->priv.eswitch;
1125 err = mlx5_devlink_eswitch_check(devlink);
1129 if (encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE &&
1130 (!MLX5_CAP_ESW_FLOWTABLE_FDB(dev, encap) ||
1131 !MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap)))
1134 if (encap && encap != DEVLINK_ESWITCH_ENCAP_MODE_BASIC)
1137 if (esw->mode == SRIOV_LEGACY) {
1138 esw->offloads.encap = encap;
1142 if (esw->offloads.encap == encap)
1145 if (esw->offloads.num_flows > 0) {
1146 esw_warn(dev, "Can't set encapsulation when flows are configured\n");
1150 esw_destroy_offloads_fast_fdb_table(esw);
1152 esw->offloads.encap = encap;
1153 err = esw_create_offloads_fast_fdb_table(esw);
1155 esw_warn(esw->dev, "Failed re-creating fast FDB table, err %d\n", err);
1156 esw->offloads.encap = !encap;
1157 (void)esw_create_offloads_fast_fdb_table(esw);
1162 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink, u8 *encap)
1164 struct mlx5_core_dev *dev = devlink_priv(devlink);
1165 struct mlx5_eswitch *esw = dev->priv.eswitch;
1168 err = mlx5_devlink_eswitch_check(devlink);
1172 *encap = esw->offloads.encap;
1176 void mlx5_eswitch_register_vport_rep(struct mlx5_eswitch *esw,
1178 struct mlx5_eswitch_rep_if *__rep_if,
1181 struct mlx5_esw_offload *offloads = &esw->offloads;
1182 struct mlx5_eswitch_rep_if *rep_if;
1184 rep_if = &offloads->vport_reps[vport_index].rep_if[rep_type];
1186 rep_if->load = __rep_if->load;
1187 rep_if->unload = __rep_if->unload;
1188 rep_if->get_proto_dev = __rep_if->get_proto_dev;
1189 rep_if->priv = __rep_if->priv;
1191 rep_if->valid = true;
1193 EXPORT_SYMBOL(mlx5_eswitch_register_vport_rep);
1195 void mlx5_eswitch_unregister_vport_rep(struct mlx5_eswitch *esw,
1196 int vport_index, u8 rep_type)
1198 struct mlx5_esw_offload *offloads = &esw->offloads;
1199 struct mlx5_eswitch_rep *rep;
1201 rep = &offloads->vport_reps[vport_index];
1203 if (esw->mode == SRIOV_OFFLOADS && esw->vports[vport_index].enabled)
1204 rep->rep_if[rep_type].unload(rep);
1206 rep->rep_if[rep_type].valid = false;
1208 EXPORT_SYMBOL(mlx5_eswitch_unregister_vport_rep);
1210 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type)
1212 #define UPLINK_REP_INDEX 0
1213 struct mlx5_esw_offload *offloads = &esw->offloads;
1214 struct mlx5_eswitch_rep *rep;
1216 rep = &offloads->vport_reps[UPLINK_REP_INDEX];
1217 return rep->rep_if[rep_type].priv;
1220 void *mlx5_eswitch_get_proto_dev(struct mlx5_eswitch *esw,
1224 struct mlx5_esw_offload *offloads = &esw->offloads;
1225 struct mlx5_eswitch_rep *rep;
1227 if (vport == FDB_UPLINK_VPORT)
1228 vport = UPLINK_REP_INDEX;
1230 rep = &offloads->vport_reps[vport];
1232 if (rep->rep_if[rep_type].valid &&
1233 rep->rep_if[rep_type].get_proto_dev)
1234 return rep->rep_if[rep_type].get_proto_dev(rep);
1237 EXPORT_SYMBOL(mlx5_eswitch_get_proto_dev);
1239 void *mlx5_eswitch_uplink_get_proto_dev(struct mlx5_eswitch *esw, u8 rep_type)
1241 return mlx5_eswitch_get_proto_dev(esw, UPLINK_REP_INDEX, rep_type);
1243 EXPORT_SYMBOL(mlx5_eswitch_uplink_get_proto_dev);
1245 struct mlx5_eswitch_rep *mlx5_eswitch_vport_rep(struct mlx5_eswitch *esw,
1248 return &esw->offloads.vport_reps[vport];
1250 EXPORT_SYMBOL(mlx5_eswitch_vport_rep);