2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/etherdevice.h>
34 #include <linux/mlx5/driver.h>
35 #include <linux/mlx5/mlx5_ifc.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/fs.h>
38 #include "mlx5_core.h"
41 #define UPLINK_VPORT 0xFFFF
49 /* E-Switch UC L2 table hash node */
51 struct l2addr_node node;
56 /* Vport UC/MC hash node */
58 struct l2addr_node node;
61 struct mlx5_flow_handle *flow_rule; /* SRIOV only */
62 /* A flag indicating that mac was added due to mc promiscuous vport */
67 UC_ADDR_CHANGE = BIT(0),
68 MC_ADDR_CHANGE = BIT(1),
69 PROMISC_CHANGE = BIT(3),
72 /* Vport context events */
73 #define SRIOV_VPORT_EVENTS (UC_ADDR_CHANGE | \
77 static int arm_vport_context_events_cmd(struct mlx5_core_dev *dev, u16 vport,
80 int in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {0};
81 int out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
84 MLX5_SET(modify_nic_vport_context_in, in,
85 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
86 MLX5_SET(modify_nic_vport_context_in, in, field_select.change_event, 1);
87 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
89 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
90 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
91 in, nic_vport_context);
93 MLX5_SET(nic_vport_context, nic_vport_ctx, arm_change_event, 1);
95 if (events_mask & UC_ADDR_CHANGE)
96 MLX5_SET(nic_vport_context, nic_vport_ctx,
97 event_on_uc_address_change, 1);
98 if (events_mask & MC_ADDR_CHANGE)
99 MLX5_SET(nic_vport_context, nic_vport_ctx,
100 event_on_mc_address_change, 1);
101 if (events_mask & PROMISC_CHANGE)
102 MLX5_SET(nic_vport_context, nic_vport_ctx,
103 event_on_promisc_change, 1);
105 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
108 /* E-Switch vport context HW commands */
109 static int modify_esw_vport_context_cmd(struct mlx5_core_dev *dev, u16 vport,
112 u32 out[MLX5_ST_SZ_DW(modify_esw_vport_context_out)] = {0};
114 MLX5_SET(modify_esw_vport_context_in, in, opcode,
115 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT);
116 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
118 MLX5_SET(modify_esw_vport_context_in, in, other_vport, 1);
119 return mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
122 static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u32 vport,
123 u16 vlan, u8 qos, u8 set_flags)
125 u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)] = {0};
127 if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
128 !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
131 esw_debug(dev, "Set Vport[%d] VLAN %d qos %d set=%x\n",
132 vport, vlan, qos, set_flags);
134 if (set_flags & SET_VLAN_STRIP)
135 MLX5_SET(modify_esw_vport_context_in, in,
136 esw_vport_context.vport_cvlan_strip, 1);
138 if (set_flags & SET_VLAN_INSERT) {
139 /* insert only if no vlan in packet */
140 MLX5_SET(modify_esw_vport_context_in, in,
141 esw_vport_context.vport_cvlan_insert, 1);
143 MLX5_SET(modify_esw_vport_context_in, in,
144 esw_vport_context.cvlan_pcp, qos);
145 MLX5_SET(modify_esw_vport_context_in, in,
146 esw_vport_context.cvlan_id, vlan);
149 MLX5_SET(modify_esw_vport_context_in, in,
150 field_select.vport_cvlan_strip, 1);
151 MLX5_SET(modify_esw_vport_context_in, in,
152 field_select.vport_cvlan_insert, 1);
154 return modify_esw_vport_context_cmd(dev, vport, in, sizeof(in));
157 /* HW L2 Table (MPFS) management */
158 static int set_l2_table_entry_cmd(struct mlx5_core_dev *dev, u32 index,
159 u8 *mac, u8 vlan_valid, u16 vlan)
161 u32 in[MLX5_ST_SZ_DW(set_l2_table_entry_in)] = {0};
162 u32 out[MLX5_ST_SZ_DW(set_l2_table_entry_out)] = {0};
165 MLX5_SET(set_l2_table_entry_in, in, opcode,
166 MLX5_CMD_OP_SET_L2_TABLE_ENTRY);
167 MLX5_SET(set_l2_table_entry_in, in, table_index, index);
168 MLX5_SET(set_l2_table_entry_in, in, vlan_valid, vlan_valid);
169 MLX5_SET(set_l2_table_entry_in, in, vlan, vlan);
171 in_mac_addr = MLX5_ADDR_OF(set_l2_table_entry_in, in, mac_address);
172 ether_addr_copy(&in_mac_addr[2], mac);
174 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
177 static int del_l2_table_entry_cmd(struct mlx5_core_dev *dev, u32 index)
179 u32 in[MLX5_ST_SZ_DW(delete_l2_table_entry_in)] = {0};
180 u32 out[MLX5_ST_SZ_DW(delete_l2_table_entry_out)] = {0};
182 MLX5_SET(delete_l2_table_entry_in, in, opcode,
183 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
184 MLX5_SET(delete_l2_table_entry_in, in, table_index, index);
185 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
188 static int alloc_l2_table_index(struct mlx5_l2_table *l2_table, u32 *ix)
192 *ix = find_first_zero_bit(l2_table->bitmap, l2_table->size);
193 if (*ix >= l2_table->size)
196 __set_bit(*ix, l2_table->bitmap);
201 static void free_l2_table_index(struct mlx5_l2_table *l2_table, u32 ix)
203 __clear_bit(ix, l2_table->bitmap);
206 static int set_l2_table_entry(struct mlx5_core_dev *dev, u8 *mac,
207 u8 vlan_valid, u16 vlan,
210 struct mlx5_l2_table *l2_table = &dev->priv.eswitch->l2_table;
213 err = alloc_l2_table_index(l2_table, index);
217 err = set_l2_table_entry_cmd(dev, *index, mac, vlan_valid, vlan);
219 free_l2_table_index(l2_table, *index);
224 static void del_l2_table_entry(struct mlx5_core_dev *dev, u32 index)
226 struct mlx5_l2_table *l2_table = &dev->priv.eswitch->l2_table;
228 del_l2_table_entry_cmd(dev, index);
229 free_l2_table_index(l2_table, index);
233 static struct mlx5_flow_handle *
234 __esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u32 vport, bool rx_rule,
235 u8 mac_c[ETH_ALEN], u8 mac_v[ETH_ALEN])
237 int match_header = (is_zero_ether_addr(mac_c) ? 0 :
238 MLX5_MATCH_OUTER_HEADERS);
239 struct mlx5_flow_handle *flow_rule = NULL;
240 struct mlx5_flow_act flow_act = {0};
241 struct mlx5_flow_destination dest;
242 struct mlx5_flow_spec *spec;
243 void *mv_misc = NULL;
244 void *mc_misc = NULL;
249 match_header |= MLX5_MATCH_MISC_PARAMETERS;
251 spec = mlx5_vzalloc(sizeof(*spec));
253 esw_warn(esw->dev, "FDB: Failed to alloc match parameters\n");
256 dmac_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
257 outer_headers.dmac_47_16);
258 dmac_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
259 outer_headers.dmac_47_16);
261 if (match_header & MLX5_MATCH_OUTER_HEADERS) {
262 ether_addr_copy(dmac_v, mac_v);
263 ether_addr_copy(dmac_c, mac_c);
266 if (match_header & MLX5_MATCH_MISC_PARAMETERS) {
267 mv_misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
269 mc_misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
271 MLX5_SET(fte_match_set_misc, mv_misc, source_port, UPLINK_VPORT);
272 MLX5_SET_TO_ONES(fte_match_set_misc, mc_misc, source_port);
275 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
276 dest.vport_num = vport;
279 "\tFDB add rule dmac_v(%pM) dmac_c(%pM) -> vport(%d)\n",
280 dmac_v, dmac_c, vport);
281 spec->match_criteria_enable = match_header;
282 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
284 mlx5_add_flow_rules(esw->fdb_table.fdb, spec,
285 &flow_act, &dest, 1);
286 if (IS_ERR(flow_rule)) {
288 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%ld)\n",
289 dmac_v, dmac_c, vport, PTR_ERR(flow_rule));
297 static struct mlx5_flow_handle *
298 esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u32 vport)
302 eth_broadcast_addr(mac_c);
303 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac);
306 static struct mlx5_flow_handle *
307 esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch *esw, u32 vport)
312 eth_zero_addr(mac_c);
313 eth_zero_addr(mac_v);
316 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac_v);
319 static struct mlx5_flow_handle *
320 esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch *esw, u32 vport)
325 eth_zero_addr(mac_c);
326 eth_zero_addr(mac_v);
327 return __esw_fdb_set_vport_rule(esw, vport, true, mac_c, mac_v);
330 static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw, int nvports)
332 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
333 struct mlx5_flow_table_attr ft_attr = {};
334 struct mlx5_core_dev *dev = esw->dev;
335 struct mlx5_flow_namespace *root_ns;
336 struct mlx5_flow_table *fdb;
337 struct mlx5_flow_group *g;
338 void *match_criteria;
344 esw_debug(dev, "Create FDB log_max_size(%d)\n",
345 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
347 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
349 esw_warn(dev, "Failed to get FDB flow namespace\n");
353 flow_group_in = mlx5_vzalloc(inlen);
356 memset(flow_group_in, 0, inlen);
358 table_size = BIT(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
360 ft_attr.max_fte = table_size;
361 fdb = mlx5_create_flow_table(root_ns, &ft_attr);
364 esw_warn(dev, "Failed to create FDB Table err %d\n", err);
367 esw->fdb_table.fdb = fdb;
369 /* Addresses group : Full match unicast/multicast addresses */
370 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
371 MLX5_MATCH_OUTER_HEADERS);
372 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
373 dmac = MLX5_ADDR_OF(fte_match_param, match_criteria, outer_headers.dmac_47_16);
374 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
375 /* Preserve 2 entries for allmulti and promisc rules*/
376 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 3);
377 eth_broadcast_addr(dmac);
378 g = mlx5_create_flow_group(fdb, flow_group_in);
381 esw_warn(dev, "Failed to create flow group err(%d)\n", err);
384 esw->fdb_table.legacy.addr_grp = g;
386 /* Allmulti group : One rule that forwards any mcast traffic */
387 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
388 MLX5_MATCH_OUTER_HEADERS);
389 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 2);
390 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 2);
393 g = mlx5_create_flow_group(fdb, flow_group_in);
396 esw_warn(dev, "Failed to create allmulti flow group err(%d)\n", err);
399 esw->fdb_table.legacy.allmulti_grp = g;
401 /* Promiscuous group :
402 * One rule that forward all unmatched traffic from previous groups
405 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
406 MLX5_MATCH_MISC_PARAMETERS);
407 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_port);
408 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 1);
409 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 1);
410 g = mlx5_create_flow_group(fdb, flow_group_in);
413 esw_warn(dev, "Failed to create promisc flow group err(%d)\n", err);
416 esw->fdb_table.legacy.promisc_grp = g;
420 if (!IS_ERR_OR_NULL(esw->fdb_table.legacy.allmulti_grp)) {
421 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
422 esw->fdb_table.legacy.allmulti_grp = NULL;
424 if (!IS_ERR_OR_NULL(esw->fdb_table.legacy.addr_grp)) {
425 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
426 esw->fdb_table.legacy.addr_grp = NULL;
428 if (!IS_ERR_OR_NULL(esw->fdb_table.fdb)) {
429 mlx5_destroy_flow_table(esw->fdb_table.fdb);
430 esw->fdb_table.fdb = NULL;
434 kvfree(flow_group_in);
438 static void esw_destroy_legacy_fdb_table(struct mlx5_eswitch *esw)
440 if (!esw->fdb_table.fdb)
443 esw_debug(esw->dev, "Destroy FDB Table\n");
444 mlx5_destroy_flow_group(esw->fdb_table.legacy.promisc_grp);
445 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
446 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
447 mlx5_destroy_flow_table(esw->fdb_table.fdb);
448 esw->fdb_table.fdb = NULL;
449 esw->fdb_table.legacy.addr_grp = NULL;
450 esw->fdb_table.legacy.allmulti_grp = NULL;
451 esw->fdb_table.legacy.promisc_grp = NULL;
454 /* E-Switch vport UC/MC lists management */
455 typedef int (*vport_addr_action)(struct mlx5_eswitch *esw,
456 struct vport_addr *vaddr);
458 static int esw_add_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
460 struct hlist_head *hash = esw->l2_table.l2_hash;
461 struct esw_uc_addr *esw_uc;
462 u8 *mac = vaddr->node.addr;
463 u32 vport = vaddr->vport;
466 esw_uc = l2addr_hash_find(hash, mac, struct esw_uc_addr);
469 "Failed to set L2 mac(%pM) for vport(%d), mac is already in use by vport(%d)\n",
470 mac, vport, esw_uc->vport);
474 esw_uc = l2addr_hash_add(hash, mac, struct esw_uc_addr, GFP_KERNEL);
477 esw_uc->vport = vport;
479 err = set_l2_table_entry(esw->dev, mac, 0, 0, &esw_uc->table_index);
483 /* SRIOV is enabled: Forward UC MAC to vport */
484 if (esw->fdb_table.fdb && esw->mode == SRIOV_LEGACY)
485 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
487 esw_debug(esw->dev, "\tADDED UC MAC: vport[%d] %pM index:%d fr(%p)\n",
488 vport, mac, esw_uc->table_index, vaddr->flow_rule);
491 l2addr_hash_del(esw_uc);
495 static int esw_del_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
497 struct hlist_head *hash = esw->l2_table.l2_hash;
498 struct esw_uc_addr *esw_uc;
499 u8 *mac = vaddr->node.addr;
500 u32 vport = vaddr->vport;
502 esw_uc = l2addr_hash_find(hash, mac, struct esw_uc_addr);
503 if (!esw_uc || esw_uc->vport != vport) {
505 "MAC(%pM) doesn't belong to vport (%d)\n",
509 esw_debug(esw->dev, "\tDELETE UC MAC: vport[%d] %pM index:%d fr(%p)\n",
510 vport, mac, esw_uc->table_index, vaddr->flow_rule);
512 del_l2_table_entry(esw->dev, esw_uc->table_index);
514 if (vaddr->flow_rule)
515 mlx5_del_flow_rules(vaddr->flow_rule);
516 vaddr->flow_rule = NULL;
518 l2addr_hash_del(esw_uc);
522 static void update_allmulti_vports(struct mlx5_eswitch *esw,
523 struct vport_addr *vaddr,
524 struct esw_mc_addr *esw_mc)
526 u8 *mac = vaddr->node.addr;
529 for (vport_idx = 0; vport_idx < esw->total_vports; vport_idx++) {
530 struct mlx5_vport *vport = &esw->vports[vport_idx];
531 struct hlist_head *vport_hash = vport->mc_list;
532 struct vport_addr *iter_vaddr =
533 l2addr_hash_find(vport_hash,
536 if (IS_ERR_OR_NULL(vport->allmulti_rule) ||
537 vaddr->vport == vport_idx)
539 switch (vaddr->action) {
540 case MLX5_ACTION_ADD:
543 iter_vaddr = l2addr_hash_add(vport_hash, mac,
548 "ALL-MULTI: Failed to add MAC(%pM) to vport[%d] DB\n",
552 iter_vaddr->vport = vport_idx;
553 iter_vaddr->flow_rule =
554 esw_fdb_set_vport_rule(esw,
557 iter_vaddr->mc_promisc = true;
559 case MLX5_ACTION_DEL:
562 mlx5_del_flow_rules(iter_vaddr->flow_rule);
563 l2addr_hash_del(iter_vaddr);
569 static int esw_add_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
571 struct hlist_head *hash = esw->mc_table;
572 struct esw_mc_addr *esw_mc;
573 u8 *mac = vaddr->node.addr;
574 u32 vport = vaddr->vport;
576 if (!esw->fdb_table.fdb)
579 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
583 esw_mc = l2addr_hash_add(hash, mac, struct esw_mc_addr, GFP_KERNEL);
587 esw_mc->uplink_rule = /* Forward MC MAC to Uplink */
588 esw_fdb_set_vport_rule(esw, mac, UPLINK_VPORT);
590 /* Add this multicast mac to all the mc promiscuous vports */
591 update_allmulti_vports(esw, vaddr, esw_mc);
594 /* If the multicast mac is added as a result of mc promiscuous vport,
595 * don't increment the multicast ref count
597 if (!vaddr->mc_promisc)
600 /* Forward MC MAC to vport */
601 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
603 "\tADDED MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
604 vport, mac, vaddr->flow_rule,
605 esw_mc->refcnt, esw_mc->uplink_rule);
609 static int esw_del_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
611 struct hlist_head *hash = esw->mc_table;
612 struct esw_mc_addr *esw_mc;
613 u8 *mac = vaddr->node.addr;
614 u32 vport = vaddr->vport;
616 if (!esw->fdb_table.fdb)
619 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
622 "Failed to find eswitch MC addr for MAC(%pM) vport(%d)",
627 "\tDELETE MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
628 vport, mac, vaddr->flow_rule, esw_mc->refcnt,
629 esw_mc->uplink_rule);
631 if (vaddr->flow_rule)
632 mlx5_del_flow_rules(vaddr->flow_rule);
633 vaddr->flow_rule = NULL;
635 /* If the multicast mac is added as a result of mc promiscuous vport,
636 * don't decrement the multicast ref count.
638 if (vaddr->mc_promisc || (--esw_mc->refcnt > 0))
641 /* Remove this multicast mac from all the mc promiscuous vports */
642 update_allmulti_vports(esw, vaddr, esw_mc);
644 if (esw_mc->uplink_rule)
645 mlx5_del_flow_rules(esw_mc->uplink_rule);
647 l2addr_hash_del(esw_mc);
651 /* Apply vport UC/MC list to HW l2 table and FDB table */
652 static void esw_apply_vport_addr_list(struct mlx5_eswitch *esw,
653 u32 vport_num, int list_type)
655 struct mlx5_vport *vport = &esw->vports[vport_num];
656 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
657 vport_addr_action vport_addr_add;
658 vport_addr_action vport_addr_del;
659 struct vport_addr *addr;
660 struct l2addr_node *node;
661 struct hlist_head *hash;
662 struct hlist_node *tmp;
665 vport_addr_add = is_uc ? esw_add_uc_addr :
667 vport_addr_del = is_uc ? esw_del_uc_addr :
670 hash = is_uc ? vport->uc_list : vport->mc_list;
671 for_each_l2hash_node(node, tmp, hash, hi) {
672 addr = container_of(node, struct vport_addr, node);
673 switch (addr->action) {
674 case MLX5_ACTION_ADD:
675 vport_addr_add(esw, addr);
676 addr->action = MLX5_ACTION_NONE;
678 case MLX5_ACTION_DEL:
679 vport_addr_del(esw, addr);
680 l2addr_hash_del(addr);
686 /* Sync vport UC/MC list from vport context */
687 static void esw_update_vport_addr_list(struct mlx5_eswitch *esw,
688 u32 vport_num, int list_type)
690 struct mlx5_vport *vport = &esw->vports[vport_num];
691 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
692 u8 (*mac_list)[ETH_ALEN];
693 struct l2addr_node *node;
694 struct vport_addr *addr;
695 struct hlist_head *hash;
696 struct hlist_node *tmp;
702 size = is_uc ? MLX5_MAX_UC_PER_VPORT(esw->dev) :
703 MLX5_MAX_MC_PER_VPORT(esw->dev);
705 mac_list = kcalloc(size, ETH_ALEN, GFP_KERNEL);
709 hash = is_uc ? vport->uc_list : vport->mc_list;
711 for_each_l2hash_node(node, tmp, hash, hi) {
712 addr = container_of(node, struct vport_addr, node);
713 addr->action = MLX5_ACTION_DEL;
719 err = mlx5_query_nic_vport_mac_list(esw->dev, vport_num, list_type,
723 esw_debug(esw->dev, "vport[%d] context update %s list size (%d)\n",
724 vport_num, is_uc ? "UC" : "MC", size);
726 for (i = 0; i < size; i++) {
727 if (is_uc && !is_valid_ether_addr(mac_list[i]))
730 if (!is_uc && !is_multicast_ether_addr(mac_list[i]))
733 addr = l2addr_hash_find(hash, mac_list[i], struct vport_addr);
735 addr->action = MLX5_ACTION_NONE;
736 /* If this mac was previously added because of allmulti
737 * promiscuous rx mode, its now converted to be original
740 if (addr->mc_promisc) {
741 struct esw_mc_addr *esw_mc =
742 l2addr_hash_find(esw->mc_table,
747 "Failed to MAC(%pM) in mcast DB\n",
752 addr->mc_promisc = false;
757 addr = l2addr_hash_add(hash, mac_list[i], struct vport_addr,
761 "Failed to add MAC(%pM) to vport[%d] DB\n",
762 mac_list[i], vport_num);
765 addr->vport = vport_num;
766 addr->action = MLX5_ACTION_ADD;
772 /* Sync vport UC/MC list from vport context
773 * Must be called after esw_update_vport_addr_list
775 static void esw_update_vport_mc_promisc(struct mlx5_eswitch *esw, u32 vport_num)
777 struct mlx5_vport *vport = &esw->vports[vport_num];
778 struct l2addr_node *node;
779 struct vport_addr *addr;
780 struct hlist_head *hash;
781 struct hlist_node *tmp;
784 hash = vport->mc_list;
786 for_each_l2hash_node(node, tmp, esw->mc_table, hi) {
787 u8 *mac = node->addr;
789 addr = l2addr_hash_find(hash, mac, struct vport_addr);
791 if (addr->action == MLX5_ACTION_DEL)
792 addr->action = MLX5_ACTION_NONE;
795 addr = l2addr_hash_add(hash, mac, struct vport_addr,
799 "Failed to add allmulti MAC(%pM) to vport[%d] DB\n",
803 addr->vport = vport_num;
804 addr->action = MLX5_ACTION_ADD;
805 addr->mc_promisc = true;
809 /* Apply vport rx mode to HW FDB table */
810 static void esw_apply_vport_rx_mode(struct mlx5_eswitch *esw, u32 vport_num,
811 bool promisc, bool mc_promisc)
813 struct esw_mc_addr *allmulti_addr = &esw->mc_promisc;
814 struct mlx5_vport *vport = &esw->vports[vport_num];
816 if (IS_ERR_OR_NULL(vport->allmulti_rule) != mc_promisc)
820 vport->allmulti_rule =
821 esw_fdb_set_vport_allmulti_rule(esw, vport_num);
822 if (!allmulti_addr->uplink_rule)
823 allmulti_addr->uplink_rule =
824 esw_fdb_set_vport_allmulti_rule(esw,
826 allmulti_addr->refcnt++;
827 } else if (vport->allmulti_rule) {
828 mlx5_del_flow_rules(vport->allmulti_rule);
829 vport->allmulti_rule = NULL;
831 if (--allmulti_addr->refcnt > 0)
834 if (allmulti_addr->uplink_rule)
835 mlx5_del_flow_rules(allmulti_addr->uplink_rule);
836 allmulti_addr->uplink_rule = NULL;
840 if (IS_ERR_OR_NULL(vport->promisc_rule) != promisc)
844 vport->promisc_rule = esw_fdb_set_vport_promisc_rule(esw,
846 } else if (vport->promisc_rule) {
847 mlx5_del_flow_rules(vport->promisc_rule);
848 vport->promisc_rule = NULL;
852 /* Sync vport rx mode from vport context */
853 static void esw_update_vport_rx_mode(struct mlx5_eswitch *esw, u32 vport_num)
855 struct mlx5_vport *vport = &esw->vports[vport_num];
861 err = mlx5_query_nic_vport_promisc(esw->dev,
868 esw_debug(esw->dev, "vport[%d] context update rx mode promisc_all=%d, all_multi=%d\n",
869 vport_num, promisc_all, promisc_mc);
871 if (!vport->info.trusted || !vport->enabled) {
877 esw_apply_vport_rx_mode(esw, vport_num, promisc_all,
878 (promisc_all || promisc_mc));
881 static void esw_vport_change_handle_locked(struct mlx5_vport *vport)
883 struct mlx5_core_dev *dev = vport->dev;
884 struct mlx5_eswitch *esw = dev->priv.eswitch;
887 mlx5_query_nic_vport_mac_address(dev, vport->vport, mac);
888 esw_debug(dev, "vport[%d] Context Changed: perm mac: %pM\n",
891 if (vport->enabled_events & UC_ADDR_CHANGE) {
892 esw_update_vport_addr_list(esw, vport->vport,
893 MLX5_NVPRT_LIST_TYPE_UC);
894 esw_apply_vport_addr_list(esw, vport->vport,
895 MLX5_NVPRT_LIST_TYPE_UC);
898 if (vport->enabled_events & MC_ADDR_CHANGE) {
899 esw_update_vport_addr_list(esw, vport->vport,
900 MLX5_NVPRT_LIST_TYPE_MC);
903 if (vport->enabled_events & PROMISC_CHANGE) {
904 esw_update_vport_rx_mode(esw, vport->vport);
905 if (!IS_ERR_OR_NULL(vport->allmulti_rule))
906 esw_update_vport_mc_promisc(esw, vport->vport);
909 if (vport->enabled_events & (PROMISC_CHANGE | MC_ADDR_CHANGE)) {
910 esw_apply_vport_addr_list(esw, vport->vport,
911 MLX5_NVPRT_LIST_TYPE_MC);
914 esw_debug(esw->dev, "vport[%d] Context Changed: Done\n", vport->vport);
916 arm_vport_context_events_cmd(dev, vport->vport,
917 vport->enabled_events);
920 static void esw_vport_change_handler(struct work_struct *work)
922 struct mlx5_vport *vport =
923 container_of(work, struct mlx5_vport, vport_change_handler);
924 struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
926 mutex_lock(&esw->state_lock);
927 esw_vport_change_handle_locked(vport);
928 mutex_unlock(&esw->state_lock);
931 static int esw_vport_enable_egress_acl(struct mlx5_eswitch *esw,
932 struct mlx5_vport *vport)
934 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
935 struct mlx5_flow_group *vlan_grp = NULL;
936 struct mlx5_flow_group *drop_grp = NULL;
937 struct mlx5_core_dev *dev = esw->dev;
938 struct mlx5_flow_namespace *root_ns;
939 struct mlx5_flow_table *acl;
940 void *match_criteria;
942 /* The egress acl table contains 2 rules:
943 * 1)Allow traffic with vlan_tag=vst_vlan_id
944 * 2)Drop all other traffic.
949 if (!MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
952 if (!IS_ERR_OR_NULL(vport->egress.acl))
955 esw_debug(dev, "Create vport[%d] egress ACL log_max_size(%d)\n",
956 vport->vport, MLX5_CAP_ESW_EGRESS_ACL(dev, log_max_ft_size));
958 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_EGRESS);
960 esw_warn(dev, "Failed to get E-Switch egress flow namespace\n");
964 flow_group_in = mlx5_vzalloc(inlen);
968 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
971 esw_warn(dev, "Failed to create E-Switch vport[%d] egress flow Table, err(%d)\n",
976 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
977 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
978 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
979 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.first_vid);
980 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
981 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
983 vlan_grp = mlx5_create_flow_group(acl, flow_group_in);
984 if (IS_ERR(vlan_grp)) {
985 err = PTR_ERR(vlan_grp);
986 esw_warn(dev, "Failed to create E-Switch vport[%d] egress allowed vlans flow group, err(%d)\n",
991 memset(flow_group_in, 0, inlen);
992 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
993 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
994 drop_grp = mlx5_create_flow_group(acl, flow_group_in);
995 if (IS_ERR(drop_grp)) {
996 err = PTR_ERR(drop_grp);
997 esw_warn(dev, "Failed to create E-Switch vport[%d] egress drop flow group, err(%d)\n",
1002 vport->egress.acl = acl;
1003 vport->egress.drop_grp = drop_grp;
1004 vport->egress.allowed_vlans_grp = vlan_grp;
1006 kvfree(flow_group_in);
1007 if (err && !IS_ERR_OR_NULL(vlan_grp))
1008 mlx5_destroy_flow_group(vlan_grp);
1009 if (err && !IS_ERR_OR_NULL(acl))
1010 mlx5_destroy_flow_table(acl);
1014 static void esw_vport_cleanup_egress_rules(struct mlx5_eswitch *esw,
1015 struct mlx5_vport *vport)
1017 if (!IS_ERR_OR_NULL(vport->egress.allowed_vlan))
1018 mlx5_del_flow_rules(vport->egress.allowed_vlan);
1020 if (!IS_ERR_OR_NULL(vport->egress.drop_rule))
1021 mlx5_del_flow_rules(vport->egress.drop_rule);
1023 vport->egress.allowed_vlan = NULL;
1024 vport->egress.drop_rule = NULL;
1027 static void esw_vport_disable_egress_acl(struct mlx5_eswitch *esw,
1028 struct mlx5_vport *vport)
1030 if (IS_ERR_OR_NULL(vport->egress.acl))
1033 esw_debug(esw->dev, "Destroy vport[%d] E-Switch egress ACL\n", vport->vport);
1035 esw_vport_cleanup_egress_rules(esw, vport);
1036 mlx5_destroy_flow_group(vport->egress.allowed_vlans_grp);
1037 mlx5_destroy_flow_group(vport->egress.drop_grp);
1038 mlx5_destroy_flow_table(vport->egress.acl);
1039 vport->egress.allowed_vlans_grp = NULL;
1040 vport->egress.drop_grp = NULL;
1041 vport->egress.acl = NULL;
1044 static int esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw,
1045 struct mlx5_vport *vport)
1047 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
1048 struct mlx5_core_dev *dev = esw->dev;
1049 struct mlx5_flow_namespace *root_ns;
1050 struct mlx5_flow_table *acl;
1051 struct mlx5_flow_group *g;
1052 void *match_criteria;
1054 /* The ingress acl table contains 4 groups
1055 * (2 active rules at the same time -
1056 * 1 allow rule from one of the first 3 groups.
1057 * 1 drop rule from the last group):
1058 * 1)Allow untagged traffic with smac=original mac.
1059 * 2)Allow untagged traffic.
1060 * 3)Allow traffic with smac=original mac.
1061 * 4)Drop all other traffic.
1066 if (!MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support))
1069 if (!IS_ERR_OR_NULL(vport->ingress.acl))
1072 esw_debug(dev, "Create vport[%d] ingress ACL log_max_size(%d)\n",
1073 vport->vport, MLX5_CAP_ESW_INGRESS_ACL(dev, log_max_ft_size));
1075 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_INGRESS);
1077 esw_warn(dev, "Failed to get E-Switch ingress flow namespace\n");
1081 flow_group_in = mlx5_vzalloc(inlen);
1085 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
1088 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress flow Table, err(%d)\n",
1092 vport->ingress.acl = acl;
1094 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
1096 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1097 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
1098 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1099 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1100 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
1101 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
1103 g = mlx5_create_flow_group(acl, flow_group_in);
1106 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged spoofchk flow group, err(%d)\n",
1110 vport->ingress.allow_untagged_spoofchk_grp = g;
1112 memset(flow_group_in, 0, inlen);
1113 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1114 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
1115 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
1116 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
1118 g = mlx5_create_flow_group(acl, flow_group_in);
1121 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged flow group, err(%d)\n",
1125 vport->ingress.allow_untagged_only_grp = g;
1127 memset(flow_group_in, 0, inlen);
1128 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1129 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1130 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1131 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 2);
1132 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 2);
1134 g = mlx5_create_flow_group(acl, flow_group_in);
1137 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress spoofchk flow group, err(%d)\n",
1141 vport->ingress.allow_spoofchk_only_grp = g;
1143 memset(flow_group_in, 0, inlen);
1144 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 3);
1145 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 3);
1147 g = mlx5_create_flow_group(acl, flow_group_in);
1150 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress drop flow group, err(%d)\n",
1154 vport->ingress.drop_grp = g;
1158 if (!IS_ERR_OR_NULL(vport->ingress.allow_spoofchk_only_grp))
1159 mlx5_destroy_flow_group(
1160 vport->ingress.allow_spoofchk_only_grp);
1161 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_only_grp))
1162 mlx5_destroy_flow_group(
1163 vport->ingress.allow_untagged_only_grp);
1164 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_spoofchk_grp))
1165 mlx5_destroy_flow_group(
1166 vport->ingress.allow_untagged_spoofchk_grp);
1167 if (!IS_ERR_OR_NULL(vport->ingress.acl))
1168 mlx5_destroy_flow_table(vport->ingress.acl);
1171 kvfree(flow_group_in);
1175 static void esw_vport_cleanup_ingress_rules(struct mlx5_eswitch *esw,
1176 struct mlx5_vport *vport)
1178 if (!IS_ERR_OR_NULL(vport->ingress.drop_rule))
1179 mlx5_del_flow_rules(vport->ingress.drop_rule);
1181 if (!IS_ERR_OR_NULL(vport->ingress.allow_rule))
1182 mlx5_del_flow_rules(vport->ingress.allow_rule);
1184 vport->ingress.drop_rule = NULL;
1185 vport->ingress.allow_rule = NULL;
1188 static void esw_vport_disable_ingress_acl(struct mlx5_eswitch *esw,
1189 struct mlx5_vport *vport)
1191 if (IS_ERR_OR_NULL(vport->ingress.acl))
1194 esw_debug(esw->dev, "Destroy vport[%d] E-Switch ingress ACL\n", vport->vport);
1196 esw_vport_cleanup_ingress_rules(esw, vport);
1197 mlx5_destroy_flow_group(vport->ingress.allow_spoofchk_only_grp);
1198 mlx5_destroy_flow_group(vport->ingress.allow_untagged_only_grp);
1199 mlx5_destroy_flow_group(vport->ingress.allow_untagged_spoofchk_grp);
1200 mlx5_destroy_flow_group(vport->ingress.drop_grp);
1201 mlx5_destroy_flow_table(vport->ingress.acl);
1202 vport->ingress.acl = NULL;
1203 vport->ingress.drop_grp = NULL;
1204 vport->ingress.allow_spoofchk_only_grp = NULL;
1205 vport->ingress.allow_untagged_only_grp = NULL;
1206 vport->ingress.allow_untagged_spoofchk_grp = NULL;
1209 static int esw_vport_ingress_config(struct mlx5_eswitch *esw,
1210 struct mlx5_vport *vport)
1212 struct mlx5_flow_act flow_act = {0};
1213 struct mlx5_flow_spec *spec;
1217 if (vport->info.spoofchk && !is_valid_ether_addr(vport->info.mac)) {
1218 mlx5_core_warn(esw->dev,
1219 "vport[%d] configure ingress rules failed, illegal mac with spoofchk\n",
1225 esw_vport_cleanup_ingress_rules(esw, vport);
1227 if (!vport->info.vlan && !vport->info.qos && !vport->info.spoofchk) {
1228 esw_vport_disable_ingress_acl(esw, vport);
1232 err = esw_vport_enable_ingress_acl(esw, vport);
1234 mlx5_core_warn(esw->dev,
1235 "failed to enable ingress acl (%d) on vport[%d]\n",
1241 "vport[%d] configure ingress rules, vlan(%d) qos(%d)\n",
1242 vport->vport, vport->info.vlan, vport->info.qos);
1244 spec = mlx5_vzalloc(sizeof(*spec));
1247 esw_warn(esw->dev, "vport[%d] configure ingress rules failed, err(%d)\n",
1252 if (vport->info.vlan || vport->info.qos)
1253 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.cvlan_tag);
1255 if (vport->info.spoofchk) {
1256 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_47_16);
1257 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_15_0);
1258 smac_v = MLX5_ADDR_OF(fte_match_param,
1260 outer_headers.smac_47_16);
1261 ether_addr_copy(smac_v, vport->info.mac);
1264 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1265 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
1266 vport->ingress.allow_rule =
1267 mlx5_add_flow_rules(vport->ingress.acl, spec,
1268 &flow_act, NULL, 0);
1269 if (IS_ERR(vport->ingress.allow_rule)) {
1270 err = PTR_ERR(vport->ingress.allow_rule);
1272 "vport[%d] configure ingress allow rule, err(%d)\n",
1274 vport->ingress.allow_rule = NULL;
1278 memset(spec, 0, sizeof(*spec));
1279 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
1280 vport->ingress.drop_rule =
1281 mlx5_add_flow_rules(vport->ingress.acl, spec,
1282 &flow_act, NULL, 0);
1283 if (IS_ERR(vport->ingress.drop_rule)) {
1284 err = PTR_ERR(vport->ingress.drop_rule);
1286 "vport[%d] configure ingress drop rule, err(%d)\n",
1288 vport->ingress.drop_rule = NULL;
1294 esw_vport_cleanup_ingress_rules(esw, vport);
1299 static int esw_vport_egress_config(struct mlx5_eswitch *esw,
1300 struct mlx5_vport *vport)
1302 struct mlx5_flow_act flow_act = {0};
1303 struct mlx5_flow_spec *spec;
1306 esw_vport_cleanup_egress_rules(esw, vport);
1308 if (!vport->info.vlan && !vport->info.qos) {
1309 esw_vport_disable_egress_acl(esw, vport);
1313 err = esw_vport_enable_egress_acl(esw, vport);
1315 mlx5_core_warn(esw->dev,
1316 "failed to enable egress acl (%d) on vport[%d]\n",
1322 "vport[%d] configure egress rules, vlan(%d) qos(%d)\n",
1323 vport->vport, vport->info.vlan, vport->info.qos);
1325 spec = mlx5_vzalloc(sizeof(*spec));
1328 esw_warn(esw->dev, "vport[%d] configure egress rules failed, err(%d)\n",
1333 /* Allowed vlan rule */
1334 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.cvlan_tag);
1335 MLX5_SET_TO_ONES(fte_match_param, spec->match_value, outer_headers.cvlan_tag);
1336 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.first_vid);
1337 MLX5_SET(fte_match_param, spec->match_value, outer_headers.first_vid, vport->info.vlan);
1339 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1340 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
1341 vport->egress.allowed_vlan =
1342 mlx5_add_flow_rules(vport->egress.acl, spec,
1343 &flow_act, NULL, 0);
1344 if (IS_ERR(vport->egress.allowed_vlan)) {
1345 err = PTR_ERR(vport->egress.allowed_vlan);
1347 "vport[%d] configure egress allowed vlan rule failed, err(%d)\n",
1349 vport->egress.allowed_vlan = NULL;
1353 /* Drop others rule (star rule) */
1354 memset(spec, 0, sizeof(*spec));
1355 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
1356 vport->egress.drop_rule =
1357 mlx5_add_flow_rules(vport->egress.acl, spec,
1358 &flow_act, NULL, 0);
1359 if (IS_ERR(vport->egress.drop_rule)) {
1360 err = PTR_ERR(vport->egress.drop_rule);
1362 "vport[%d] configure egress drop rule failed, err(%d)\n",
1364 vport->egress.drop_rule = NULL;
1371 /* Vport QoS management */
1372 static int esw_create_tsar(struct mlx5_eswitch *esw)
1374 u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1375 struct mlx5_core_dev *dev = esw->dev;
1378 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
1381 if (esw->qos.enabled)
1384 err = mlx5_create_scheduling_element_cmd(dev,
1385 SCHEDULING_HIERARCHY_E_SWITCH,
1387 &esw->qos.root_tsar_id);
1389 esw_warn(esw->dev, "E-Switch create TSAR failed (%d)\n", err);
1393 esw->qos.enabled = true;
1397 static void esw_destroy_tsar(struct mlx5_eswitch *esw)
1401 if (!esw->qos.enabled)
1404 err = mlx5_destroy_scheduling_element_cmd(esw->dev,
1405 SCHEDULING_HIERARCHY_E_SWITCH,
1406 esw->qos.root_tsar_id);
1408 esw_warn(esw->dev, "E-Switch destroy TSAR failed (%d)\n", err);
1410 esw->qos.enabled = false;
1413 static int esw_vport_enable_qos(struct mlx5_eswitch *esw, int vport_num,
1414 u32 initial_max_rate, u32 initial_bw_share)
1416 u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1417 struct mlx5_vport *vport = &esw->vports[vport_num];
1418 struct mlx5_core_dev *dev = esw->dev;
1422 if (!esw->qos.enabled || !MLX5_CAP_GEN(dev, qos) ||
1423 !MLX5_CAP_QOS(dev, esw_scheduling))
1426 if (vport->qos.enabled)
1429 MLX5_SET(scheduling_context, &sched_ctx, element_type,
1430 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
1431 vport_elem = MLX5_ADDR_OF(scheduling_context, &sched_ctx,
1432 element_attributes);
1433 MLX5_SET(vport_element, vport_elem, vport_number, vport_num);
1434 MLX5_SET(scheduling_context, &sched_ctx, parent_element_id,
1435 esw->qos.root_tsar_id);
1436 MLX5_SET(scheduling_context, &sched_ctx, max_average_bw,
1438 MLX5_SET(scheduling_context, &sched_ctx, bw_share, initial_bw_share);
1440 err = mlx5_create_scheduling_element_cmd(dev,
1441 SCHEDULING_HIERARCHY_E_SWITCH,
1443 &vport->qos.esw_tsar_ix);
1445 esw_warn(esw->dev, "E-Switch create TSAR vport element failed (vport=%d,err=%d)\n",
1450 vport->qos.enabled = true;
1454 static void esw_vport_disable_qos(struct mlx5_eswitch *esw, int vport_num)
1456 struct mlx5_vport *vport = &esw->vports[vport_num];
1459 if (!vport->qos.enabled)
1462 err = mlx5_destroy_scheduling_element_cmd(esw->dev,
1463 SCHEDULING_HIERARCHY_E_SWITCH,
1464 vport->qos.esw_tsar_ix);
1466 esw_warn(esw->dev, "E-Switch destroy TSAR vport element failed (vport=%d,err=%d)\n",
1469 vport->qos.enabled = false;
1472 static int esw_vport_qos_config(struct mlx5_eswitch *esw, int vport_num,
1473 u32 max_rate, u32 bw_share)
1475 u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1476 struct mlx5_vport *vport = &esw->vports[vport_num];
1477 struct mlx5_core_dev *dev = esw->dev;
1482 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
1485 if (!vport->qos.enabled)
1488 MLX5_SET(scheduling_context, &sched_ctx, element_type,
1489 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
1490 vport_elem = MLX5_ADDR_OF(scheduling_context, &sched_ctx,
1491 element_attributes);
1492 MLX5_SET(vport_element, vport_elem, vport_number, vport_num);
1493 MLX5_SET(scheduling_context, &sched_ctx, parent_element_id,
1494 esw->qos.root_tsar_id);
1495 MLX5_SET(scheduling_context, &sched_ctx, max_average_bw,
1497 MLX5_SET(scheduling_context, &sched_ctx, bw_share, bw_share);
1498 bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW;
1499 bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE;
1501 err = mlx5_modify_scheduling_element_cmd(dev,
1502 SCHEDULING_HIERARCHY_E_SWITCH,
1504 vport->qos.esw_tsar_ix,
1507 esw_warn(esw->dev, "E-Switch modify TSAR vport element failed (vport=%d,err=%d)\n",
1515 static void node_guid_gen_from_mac(u64 *node_guid, u8 mac[ETH_ALEN])
1517 ((u8 *)node_guid)[7] = mac[0];
1518 ((u8 *)node_guid)[6] = mac[1];
1519 ((u8 *)node_guid)[5] = mac[2];
1520 ((u8 *)node_guid)[4] = 0xff;
1521 ((u8 *)node_guid)[3] = 0xfe;
1522 ((u8 *)node_guid)[2] = mac[3];
1523 ((u8 *)node_guid)[1] = mac[4];
1524 ((u8 *)node_guid)[0] = mac[5];
1527 static void esw_apply_vport_conf(struct mlx5_eswitch *esw,
1528 struct mlx5_vport *vport)
1530 int vport_num = vport->vport;
1535 mlx5_modify_vport_admin_state(esw->dev,
1536 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1538 vport->info.link_state);
1539 mlx5_modify_nic_vport_mac_address(esw->dev, vport_num, vport->info.mac);
1540 mlx5_modify_nic_vport_node_guid(esw->dev, vport_num, vport->info.node_guid);
1541 modify_esw_vport_cvlan(esw->dev, vport_num, vport->info.vlan, vport->info.qos,
1542 (vport->info.vlan || vport->info.qos));
1544 /* Only legacy mode needs ACLs */
1545 if (esw->mode == SRIOV_LEGACY) {
1546 esw_vport_ingress_config(esw, vport);
1547 esw_vport_egress_config(esw, vport);
1551 static void esw_enable_vport(struct mlx5_eswitch *esw, int vport_num,
1554 struct mlx5_vport *vport = &esw->vports[vport_num];
1556 mutex_lock(&esw->state_lock);
1557 WARN_ON(vport->enabled);
1559 esw_debug(esw->dev, "Enabling VPORT(%d)\n", vport_num);
1561 /* Restore old vport configuration */
1562 esw_apply_vport_conf(esw, vport);
1564 /* Attach vport to the eswitch rate limiter */
1565 if (esw_vport_enable_qos(esw, vport_num, vport->info.max_rate,
1566 vport->qos.bw_share))
1567 esw_warn(esw->dev, "Failed to attach vport %d to eswitch rate limiter", vport_num);
1569 /* Sync with current vport context */
1570 vport->enabled_events = enable_events;
1571 vport->enabled = true;
1573 /* only PF is trusted by default */
1575 vport->info.trusted = true;
1577 esw_vport_change_handle_locked(vport);
1579 esw->enabled_vports++;
1580 esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);
1581 mutex_unlock(&esw->state_lock);
1584 static void esw_disable_vport(struct mlx5_eswitch *esw, int vport_num)
1586 struct mlx5_vport *vport = &esw->vports[vport_num];
1588 if (!vport->enabled)
1591 esw_debug(esw->dev, "Disabling vport(%d)\n", vport_num);
1592 /* Mark this vport as disabled to discard new events */
1593 vport->enabled = false;
1595 synchronize_irq(mlx5_get_msix_vec(esw->dev, MLX5_EQ_VEC_ASYNC));
1596 /* Wait for current already scheduled events to complete */
1597 flush_workqueue(esw->work_queue);
1598 /* Disable events from this vport */
1599 arm_vport_context_events_cmd(esw->dev, vport->vport, 0);
1600 mutex_lock(&esw->state_lock);
1601 /* We don't assume VFs will cleanup after themselves.
1602 * Calling vport change handler while vport is disabled will cleanup
1603 * the vport resources.
1605 esw_vport_change_handle_locked(vport);
1606 vport->enabled_events = 0;
1607 esw_vport_disable_qos(esw, vport_num);
1608 if (vport_num && esw->mode == SRIOV_LEGACY) {
1609 mlx5_modify_vport_admin_state(esw->dev,
1610 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1612 MLX5_ESW_VPORT_ADMIN_STATE_DOWN);
1613 esw_vport_disable_egress_acl(esw, vport);
1614 esw_vport_disable_ingress_acl(esw, vport);
1616 esw->enabled_vports--;
1617 mutex_unlock(&esw->state_lock);
1620 /* Public E-Switch API */
1621 int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode)
1624 int i, enabled_events;
1626 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1627 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1630 if (!MLX5_CAP_GEN(esw->dev, eswitch_flow_table) ||
1631 !MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ft_support)) {
1632 esw_warn(esw->dev, "E-Switch FDB is not supported, aborting ...\n");
1636 if (!MLX5_CAP_ESW_INGRESS_ACL(esw->dev, ft_support))
1637 esw_warn(esw->dev, "E-Switch ingress ACL is not supported by FW\n");
1639 if (!MLX5_CAP_ESW_EGRESS_ACL(esw->dev, ft_support))
1640 esw_warn(esw->dev, "E-Switch engress ACL is not supported by FW\n");
1642 esw_info(esw->dev, "E-Switch enable SRIOV: nvfs(%d) mode (%d)\n", nvfs, mode);
1644 esw_disable_vport(esw, 0);
1646 if (mode == SRIOV_LEGACY)
1647 err = esw_create_legacy_fdb_table(esw, nvfs + 1);
1649 err = esw_offloads_init(esw, nvfs + 1);
1653 err = esw_create_tsar(esw);
1655 esw_warn(esw->dev, "Failed to create eswitch TSAR");
1657 enabled_events = (mode == SRIOV_LEGACY) ? SRIOV_VPORT_EVENTS : UC_ADDR_CHANGE;
1658 for (i = 0; i <= nvfs; i++)
1659 esw_enable_vport(esw, i, enabled_events);
1661 esw_info(esw->dev, "SRIOV enabled: active vports(%d)\n",
1662 esw->enabled_vports);
1666 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1667 esw->mode = SRIOV_NONE;
1671 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw)
1673 struct esw_mc_addr *mc_promisc;
1677 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1678 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1681 esw_info(esw->dev, "disable SRIOV: active vports(%d) mode(%d)\n",
1682 esw->enabled_vports, esw->mode);
1684 mc_promisc = &esw->mc_promisc;
1685 nvports = esw->enabled_vports;
1687 for (i = 0; i < esw->total_vports; i++)
1688 esw_disable_vport(esw, i);
1690 if (mc_promisc && mc_promisc->uplink_rule)
1691 mlx5_del_flow_rules(mc_promisc->uplink_rule);
1693 esw_destroy_tsar(esw);
1695 if (esw->mode == SRIOV_LEGACY)
1696 esw_destroy_legacy_fdb_table(esw);
1697 else if (esw->mode == SRIOV_OFFLOADS)
1698 esw_offloads_cleanup(esw, nvports);
1700 esw->mode = SRIOV_NONE;
1701 /* VPORT 0 (PF) must be enabled back with non-sriov configuration */
1702 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1705 void mlx5_eswitch_attach(struct mlx5_eswitch *esw)
1707 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1708 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1711 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1712 /* VF Vports will be enabled when SRIOV is enabled */
1715 void mlx5_eswitch_detach(struct mlx5_eswitch *esw)
1717 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1718 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1721 esw_disable_vport(esw, 0);
1724 int mlx5_eswitch_init(struct mlx5_core_dev *dev)
1726 int l2_table_size = 1 << MLX5_CAP_GEN(dev, log_max_l2_table);
1727 int total_vports = MLX5_TOTAL_VPORTS(dev);
1728 struct mlx5_eswitch *esw;
1732 if (!MLX5_CAP_GEN(dev, vport_group_manager) ||
1733 MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1737 "Total vports %d, l2 table size(%d), per vport: max uc(%d) max mc(%d)\n",
1738 total_vports, l2_table_size,
1739 MLX5_MAX_UC_PER_VPORT(dev),
1740 MLX5_MAX_MC_PER_VPORT(dev));
1742 esw = kzalloc(sizeof(*esw), GFP_KERNEL);
1748 esw->l2_table.bitmap = kcalloc(BITS_TO_LONGS(l2_table_size),
1749 sizeof(uintptr_t), GFP_KERNEL);
1750 if (!esw->l2_table.bitmap) {
1754 esw->l2_table.size = l2_table_size;
1756 esw->work_queue = create_singlethread_workqueue("mlx5_esw_wq");
1757 if (!esw->work_queue) {
1762 esw->vports = kcalloc(total_vports, sizeof(struct mlx5_vport),
1769 esw->offloads.vport_reps =
1770 kzalloc(total_vports * sizeof(struct mlx5_eswitch_rep),
1772 if (!esw->offloads.vport_reps) {
1777 hash_init(esw->offloads.encap_tbl);
1778 mutex_init(&esw->state_lock);
1780 for (vport_num = 0; vport_num < total_vports; vport_num++) {
1781 struct mlx5_vport *vport = &esw->vports[vport_num];
1783 vport->vport = vport_num;
1784 vport->info.link_state = MLX5_ESW_VPORT_ADMIN_STATE_AUTO;
1786 INIT_WORK(&vport->vport_change_handler,
1787 esw_vport_change_handler);
1790 esw->total_vports = total_vports;
1791 esw->enabled_vports = 0;
1792 esw->mode = SRIOV_NONE;
1793 esw->offloads.inline_mode = MLX5_INLINE_MODE_NONE;
1794 if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, encap) &&
1795 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap))
1796 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_BASIC;
1798 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_NONE;
1800 dev->priv.eswitch = esw;
1803 if (esw->work_queue)
1804 destroy_workqueue(esw->work_queue);
1805 kfree(esw->l2_table.bitmap);
1807 kfree(esw->offloads.vport_reps);
1812 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
1814 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1815 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1818 esw_info(esw->dev, "cleanup\n");
1820 esw->dev->priv.eswitch = NULL;
1821 destroy_workqueue(esw->work_queue);
1822 kfree(esw->l2_table.bitmap);
1823 kfree(esw->offloads.vport_reps);
1828 void mlx5_eswitch_vport_event(struct mlx5_eswitch *esw, struct mlx5_eqe *eqe)
1830 struct mlx5_eqe_vport_change *vc_eqe = &eqe->data.vport_change;
1831 u16 vport_num = be16_to_cpu(vc_eqe->vport_num);
1832 struct mlx5_vport *vport;
1835 pr_warn("MLX5 E-Switch: vport %d got an event while eswitch is not initialized\n",
1840 vport = &esw->vports[vport_num];
1842 queue_work(esw->work_queue, &vport->vport_change_handler);
1845 /* Vport Administration */
1846 #define ESW_ALLOWED(esw) \
1847 (esw && MLX5_CAP_GEN(esw->dev, vport_group_manager) && mlx5_core_is_pf(esw->dev))
1848 #define LEGAL_VPORT(esw, vport) (vport >= 0 && vport < esw->total_vports)
1850 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
1851 int vport, u8 mac[ETH_ALEN])
1853 struct mlx5_vport *evport;
1857 if (!ESW_ALLOWED(esw))
1859 if (!LEGAL_VPORT(esw, vport) || is_multicast_ether_addr(mac))
1862 mutex_lock(&esw->state_lock);
1863 evport = &esw->vports[vport];
1865 if (evport->info.spoofchk && !is_valid_ether_addr(mac)) {
1866 mlx5_core_warn(esw->dev,
1867 "MAC invalidation is not allowed when spoofchk is on, vport(%d)\n",
1873 err = mlx5_modify_nic_vport_mac_address(esw->dev, vport, mac);
1875 mlx5_core_warn(esw->dev,
1876 "Failed to mlx5_modify_nic_vport_mac vport(%d) err=(%d)\n",
1881 node_guid_gen_from_mac(&node_guid, mac);
1882 err = mlx5_modify_nic_vport_node_guid(esw->dev, vport, node_guid);
1884 mlx5_core_warn(esw->dev,
1885 "Failed to set vport %d node guid, err = %d. RDMA_CM will not function properly for this VF.\n",
1888 ether_addr_copy(evport->info.mac, mac);
1889 evport->info.node_guid = node_guid;
1890 if (evport->enabled && esw->mode == SRIOV_LEGACY)
1891 err = esw_vport_ingress_config(esw, evport);
1894 mutex_unlock(&esw->state_lock);
1898 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
1899 int vport, int link_state)
1901 struct mlx5_vport *evport;
1904 if (!ESW_ALLOWED(esw))
1906 if (!LEGAL_VPORT(esw, vport))
1909 mutex_lock(&esw->state_lock);
1910 evport = &esw->vports[vport];
1912 err = mlx5_modify_vport_admin_state(esw->dev,
1913 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1916 mlx5_core_warn(esw->dev,
1917 "Failed to set vport %d link state, err = %d",
1922 evport->info.link_state = link_state;
1925 mutex_unlock(&esw->state_lock);
1929 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
1930 int vport, struct ifla_vf_info *ivi)
1932 struct mlx5_vport *evport;
1934 if (!ESW_ALLOWED(esw))
1936 if (!LEGAL_VPORT(esw, vport))
1939 evport = &esw->vports[vport];
1941 memset(ivi, 0, sizeof(*ivi));
1942 ivi->vf = vport - 1;
1944 mutex_lock(&esw->state_lock);
1945 ether_addr_copy(ivi->mac, evport->info.mac);
1946 ivi->linkstate = evport->info.link_state;
1947 ivi->vlan = evport->info.vlan;
1948 ivi->qos = evport->info.qos;
1949 ivi->spoofchk = evport->info.spoofchk;
1950 ivi->trusted = evport->info.trusted;
1951 ivi->min_tx_rate = evport->info.min_rate;
1952 ivi->max_tx_rate = evport->info.max_rate;
1953 mutex_unlock(&esw->state_lock);
1958 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
1959 int vport, u16 vlan, u8 qos, u8 set_flags)
1961 struct mlx5_vport *evport;
1964 if (!ESW_ALLOWED(esw))
1966 if (!LEGAL_VPORT(esw, vport) || (vlan > 4095) || (qos > 7))
1969 mutex_lock(&esw->state_lock);
1970 evport = &esw->vports[vport];
1972 err = modify_esw_vport_cvlan(esw->dev, vport, vlan, qos, set_flags);
1976 evport->info.vlan = vlan;
1977 evport->info.qos = qos;
1978 if (evport->enabled && esw->mode == SRIOV_LEGACY) {
1979 err = esw_vport_ingress_config(esw, evport);
1982 err = esw_vport_egress_config(esw, evport);
1986 mutex_unlock(&esw->state_lock);
1990 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
1991 int vport, u16 vlan, u8 qos)
1996 set_flags = SET_VLAN_STRIP | SET_VLAN_INSERT;
1998 return __mlx5_eswitch_set_vport_vlan(esw, vport, vlan, qos, set_flags);
2001 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
2002 int vport, bool spoofchk)
2004 struct mlx5_vport *evport;
2008 if (!ESW_ALLOWED(esw))
2010 if (!LEGAL_VPORT(esw, vport))
2013 mutex_lock(&esw->state_lock);
2014 evport = &esw->vports[vport];
2015 pschk = evport->info.spoofchk;
2016 evport->info.spoofchk = spoofchk;
2017 if (evport->enabled && esw->mode == SRIOV_LEGACY)
2018 err = esw_vport_ingress_config(esw, evport);
2020 evport->info.spoofchk = pschk;
2021 mutex_unlock(&esw->state_lock);
2026 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
2027 int vport, bool setting)
2029 struct mlx5_vport *evport;
2031 if (!ESW_ALLOWED(esw))
2033 if (!LEGAL_VPORT(esw, vport))
2036 mutex_lock(&esw->state_lock);
2037 evport = &esw->vports[vport];
2038 evport->info.trusted = setting;
2039 if (evport->enabled)
2040 esw_vport_change_handle_locked(evport);
2041 mutex_unlock(&esw->state_lock);
2046 static u32 calculate_vports_min_rate_divider(struct mlx5_eswitch *esw)
2048 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2049 struct mlx5_vport *evport;
2050 u32 max_guarantee = 0;
2053 for (i = 0; i <= esw->total_vports; i++) {
2054 evport = &esw->vports[i];
2055 if (!evport->enabled || evport->info.min_rate < max_guarantee)
2057 max_guarantee = evport->info.min_rate;
2060 return max_t(u32, max_guarantee / fw_max_bw_share, 1);
2063 static int normalize_vports_min_rate(struct mlx5_eswitch *esw, u32 divider)
2065 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2066 struct mlx5_vport *evport;
2073 for (i = 0; i <= esw->total_vports; i++) {
2074 evport = &esw->vports[i];
2075 if (!evport->enabled)
2077 vport_min_rate = evport->info.min_rate;
2078 vport_max_rate = evport->info.max_rate;
2079 bw_share = MLX5_MIN_BW_SHARE;
2082 bw_share = MLX5_RATE_TO_BW_SHARE(vport_min_rate,
2086 if (bw_share == evport->qos.bw_share)
2089 err = esw_vport_qos_config(esw, i, vport_max_rate,
2092 evport->qos.bw_share = bw_share;
2100 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, int vport,
2101 u32 max_rate, u32 min_rate)
2103 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2104 bool min_rate_supported = MLX5_CAP_QOS(esw->dev, esw_bw_share) &&
2105 fw_max_bw_share >= MLX5_MIN_BW_SHARE;
2106 bool max_rate_supported = MLX5_CAP_QOS(esw->dev, esw_rate_limit);
2107 struct mlx5_vport *evport;
2108 u32 previous_min_rate;
2112 if (!ESW_ALLOWED(esw))
2114 if (!LEGAL_VPORT(esw, vport))
2116 if ((min_rate && !min_rate_supported) || (max_rate && !max_rate_supported))
2119 mutex_lock(&esw->state_lock);
2120 evport = &esw->vports[vport];
2122 if (min_rate == evport->info.min_rate)
2125 previous_min_rate = evport->info.min_rate;
2126 evport->info.min_rate = min_rate;
2127 divider = calculate_vports_min_rate_divider(esw);
2128 err = normalize_vports_min_rate(esw, divider);
2130 evport->info.min_rate = previous_min_rate;
2135 if (max_rate == evport->info.max_rate)
2138 err = esw_vport_qos_config(esw, vport, max_rate, evport->qos.bw_share);
2140 evport->info.max_rate = max_rate;
2143 mutex_unlock(&esw->state_lock);
2147 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
2149 struct ifla_vf_stats *vf_stats)
2151 int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
2152 u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {0};
2156 if (!ESW_ALLOWED(esw))
2158 if (!LEGAL_VPORT(esw, vport))
2161 out = mlx5_vzalloc(outlen);
2165 MLX5_SET(query_vport_counter_in, in, opcode,
2166 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
2167 MLX5_SET(query_vport_counter_in, in, op_mod, 0);
2168 MLX5_SET(query_vport_counter_in, in, vport_number, vport);
2170 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
2172 memset(out, 0, outlen);
2173 err = mlx5_cmd_exec(esw->dev, in, sizeof(in), out, outlen);
2177 #define MLX5_GET_CTR(p, x) \
2178 MLX5_GET64(query_vport_counter_out, p, x)
2180 memset(vf_stats, 0, sizeof(*vf_stats));
2181 vf_stats->rx_packets =
2182 MLX5_GET_CTR(out, received_eth_unicast.packets) +
2183 MLX5_GET_CTR(out, received_eth_multicast.packets) +
2184 MLX5_GET_CTR(out, received_eth_broadcast.packets);
2186 vf_stats->rx_bytes =
2187 MLX5_GET_CTR(out, received_eth_unicast.octets) +
2188 MLX5_GET_CTR(out, received_eth_multicast.octets) +
2189 MLX5_GET_CTR(out, received_eth_broadcast.octets);
2191 vf_stats->tx_packets =
2192 MLX5_GET_CTR(out, transmitted_eth_unicast.packets) +
2193 MLX5_GET_CTR(out, transmitted_eth_multicast.packets) +
2194 MLX5_GET_CTR(out, transmitted_eth_broadcast.packets);
2196 vf_stats->tx_bytes =
2197 MLX5_GET_CTR(out, transmitted_eth_unicast.octets) +
2198 MLX5_GET_CTR(out, transmitted_eth_multicast.octets) +
2199 MLX5_GET_CTR(out, transmitted_eth_broadcast.octets);
2201 vf_stats->multicast =
2202 MLX5_GET_CTR(out, received_eth_multicast.packets);
2204 vf_stats->broadcast =
2205 MLX5_GET_CTR(out, received_eth_broadcast.packets);