2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/etherdevice.h>
34 #include <linux/mlx5/driver.h>
35 #include <linux/mlx5/mlx5_ifc.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/fs.h>
38 #include "mlx5_core.h"
41 #define UPLINK_VPORT 0xFFFF
49 /* E-Switch UC L2 table hash node */
51 struct l2addr_node node;
56 /* E-Switch MC FDB table hash node */
57 struct esw_mc_addr { /* SRIOV only */
58 struct l2addr_node node;
59 struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */
63 /* Vport UC/MC hash node */
65 struct l2addr_node node;
68 struct mlx5_flow_handle *flow_rule; /* SRIOV only */
69 /* A flag indicating that mac was added due to mc promiscuous vport */
74 UC_ADDR_CHANGE = BIT(0),
75 MC_ADDR_CHANGE = BIT(1),
76 PROMISC_CHANGE = BIT(3),
79 /* Vport context events */
80 #define SRIOV_VPORT_EVENTS (UC_ADDR_CHANGE | \
84 static int arm_vport_context_events_cmd(struct mlx5_core_dev *dev, u16 vport,
87 int in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {0};
88 int out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
91 MLX5_SET(modify_nic_vport_context_in, in,
92 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
93 MLX5_SET(modify_nic_vport_context_in, in, field_select.change_event, 1);
94 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
96 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
97 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
98 in, nic_vport_context);
100 MLX5_SET(nic_vport_context, nic_vport_ctx, arm_change_event, 1);
102 if (events_mask & UC_ADDR_CHANGE)
103 MLX5_SET(nic_vport_context, nic_vport_ctx,
104 event_on_uc_address_change, 1);
105 if (events_mask & MC_ADDR_CHANGE)
106 MLX5_SET(nic_vport_context, nic_vport_ctx,
107 event_on_mc_address_change, 1);
108 if (events_mask & PROMISC_CHANGE)
109 MLX5_SET(nic_vport_context, nic_vport_ctx,
110 event_on_promisc_change, 1);
112 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
115 /* E-Switch vport context HW commands */
116 static int modify_esw_vport_context_cmd(struct mlx5_core_dev *dev, u16 vport,
119 u32 out[MLX5_ST_SZ_DW(modify_esw_vport_context_out)] = {0};
121 MLX5_SET(modify_esw_vport_context_in, in, opcode,
122 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT);
123 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
125 MLX5_SET(modify_esw_vport_context_in, in, other_vport, 1);
126 return mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
129 static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u32 vport,
130 u16 vlan, u8 qos, u8 set_flags)
132 u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)] = {0};
134 if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
135 !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
138 esw_debug(dev, "Set Vport[%d] VLAN %d qos %d set=%x\n",
139 vport, vlan, qos, set_flags);
141 if (set_flags & SET_VLAN_STRIP)
142 MLX5_SET(modify_esw_vport_context_in, in,
143 esw_vport_context.vport_cvlan_strip, 1);
145 if (set_flags & SET_VLAN_INSERT) {
146 /* insert only if no vlan in packet */
147 MLX5_SET(modify_esw_vport_context_in, in,
148 esw_vport_context.vport_cvlan_insert, 1);
150 MLX5_SET(modify_esw_vport_context_in, in,
151 esw_vport_context.cvlan_pcp, qos);
152 MLX5_SET(modify_esw_vport_context_in, in,
153 esw_vport_context.cvlan_id, vlan);
156 MLX5_SET(modify_esw_vport_context_in, in,
157 field_select.vport_cvlan_strip, 1);
158 MLX5_SET(modify_esw_vport_context_in, in,
159 field_select.vport_cvlan_insert, 1);
161 return modify_esw_vport_context_cmd(dev, vport, in, sizeof(in));
164 /* HW L2 Table (MPFS) management */
165 static int set_l2_table_entry_cmd(struct mlx5_core_dev *dev, u32 index,
166 u8 *mac, u8 vlan_valid, u16 vlan)
168 u32 in[MLX5_ST_SZ_DW(set_l2_table_entry_in)] = {0};
169 u32 out[MLX5_ST_SZ_DW(set_l2_table_entry_out)] = {0};
172 MLX5_SET(set_l2_table_entry_in, in, opcode,
173 MLX5_CMD_OP_SET_L2_TABLE_ENTRY);
174 MLX5_SET(set_l2_table_entry_in, in, table_index, index);
175 MLX5_SET(set_l2_table_entry_in, in, vlan_valid, vlan_valid);
176 MLX5_SET(set_l2_table_entry_in, in, vlan, vlan);
178 in_mac_addr = MLX5_ADDR_OF(set_l2_table_entry_in, in, mac_address);
179 ether_addr_copy(&in_mac_addr[2], mac);
181 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
184 static int del_l2_table_entry_cmd(struct mlx5_core_dev *dev, u32 index)
186 u32 in[MLX5_ST_SZ_DW(delete_l2_table_entry_in)] = {0};
187 u32 out[MLX5_ST_SZ_DW(delete_l2_table_entry_out)] = {0};
189 MLX5_SET(delete_l2_table_entry_in, in, opcode,
190 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
191 MLX5_SET(delete_l2_table_entry_in, in, table_index, index);
192 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
195 static int alloc_l2_table_index(struct mlx5_l2_table *l2_table, u32 *ix)
199 *ix = find_first_zero_bit(l2_table->bitmap, l2_table->size);
200 if (*ix >= l2_table->size)
203 __set_bit(*ix, l2_table->bitmap);
208 static void free_l2_table_index(struct mlx5_l2_table *l2_table, u32 ix)
210 __clear_bit(ix, l2_table->bitmap);
213 static int set_l2_table_entry(struct mlx5_core_dev *dev, u8 *mac,
214 u8 vlan_valid, u16 vlan,
217 struct mlx5_l2_table *l2_table = &dev->priv.eswitch->l2_table;
220 err = alloc_l2_table_index(l2_table, index);
224 err = set_l2_table_entry_cmd(dev, *index, mac, vlan_valid, vlan);
226 free_l2_table_index(l2_table, *index);
231 static void del_l2_table_entry(struct mlx5_core_dev *dev, u32 index)
233 struct mlx5_l2_table *l2_table = &dev->priv.eswitch->l2_table;
235 del_l2_table_entry_cmd(dev, index);
236 free_l2_table_index(l2_table, index);
240 static struct mlx5_flow_handle *
241 __esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u32 vport, bool rx_rule,
242 u8 mac_c[ETH_ALEN], u8 mac_v[ETH_ALEN])
244 int match_header = (is_zero_ether_addr(mac_c) ? 0 :
245 MLX5_MATCH_OUTER_HEADERS);
246 struct mlx5_flow_handle *flow_rule = NULL;
247 struct mlx5_flow_act flow_act = {0};
248 struct mlx5_flow_destination dest;
249 struct mlx5_flow_spec *spec;
250 void *mv_misc = NULL;
251 void *mc_misc = NULL;
256 match_header |= MLX5_MATCH_MISC_PARAMETERS;
258 spec = mlx5_vzalloc(sizeof(*spec));
260 esw_warn(esw->dev, "FDB: Failed to alloc match parameters\n");
263 dmac_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
264 outer_headers.dmac_47_16);
265 dmac_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
266 outer_headers.dmac_47_16);
268 if (match_header & MLX5_MATCH_OUTER_HEADERS) {
269 ether_addr_copy(dmac_v, mac_v);
270 ether_addr_copy(dmac_c, mac_c);
273 if (match_header & MLX5_MATCH_MISC_PARAMETERS) {
274 mv_misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
276 mc_misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
278 MLX5_SET(fte_match_set_misc, mv_misc, source_port, UPLINK_VPORT);
279 MLX5_SET_TO_ONES(fte_match_set_misc, mc_misc, source_port);
282 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
283 dest.vport_num = vport;
286 "\tFDB add rule dmac_v(%pM) dmac_c(%pM) -> vport(%d)\n",
287 dmac_v, dmac_c, vport);
288 spec->match_criteria_enable = match_header;
289 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
291 mlx5_add_flow_rules(esw->fdb_table.fdb, spec,
292 &flow_act, &dest, 1);
293 if (IS_ERR(flow_rule)) {
295 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%ld)\n",
296 dmac_v, dmac_c, vport, PTR_ERR(flow_rule));
304 static struct mlx5_flow_handle *
305 esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u32 vport)
309 eth_broadcast_addr(mac_c);
310 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac);
313 static struct mlx5_flow_handle *
314 esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch *esw, u32 vport)
319 eth_zero_addr(mac_c);
320 eth_zero_addr(mac_v);
323 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac_v);
326 static struct mlx5_flow_handle *
327 esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch *esw, u32 vport)
332 eth_zero_addr(mac_c);
333 eth_zero_addr(mac_v);
334 return __esw_fdb_set_vport_rule(esw, vport, true, mac_c, mac_v);
337 static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw, int nvports)
339 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
340 struct mlx5_core_dev *dev = esw->dev;
341 struct mlx5_flow_namespace *root_ns;
342 struct mlx5_flow_table *fdb;
343 struct mlx5_flow_group *g;
344 void *match_criteria;
350 esw_debug(dev, "Create FDB log_max_size(%d)\n",
351 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
353 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
355 esw_warn(dev, "Failed to get FDB flow namespace\n");
359 flow_group_in = mlx5_vzalloc(inlen);
362 memset(flow_group_in, 0, inlen);
364 table_size = BIT(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
365 fdb = mlx5_create_flow_table(root_ns, 0, table_size, 0, 0);
368 esw_warn(dev, "Failed to create FDB Table err %d\n", err);
371 esw->fdb_table.fdb = fdb;
373 /* Addresses group : Full match unicast/multicast addresses */
374 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
375 MLX5_MATCH_OUTER_HEADERS);
376 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
377 dmac = MLX5_ADDR_OF(fte_match_param, match_criteria, outer_headers.dmac_47_16);
378 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
379 /* Preserve 2 entries for allmulti and promisc rules*/
380 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 3);
381 eth_broadcast_addr(dmac);
382 g = mlx5_create_flow_group(fdb, flow_group_in);
385 esw_warn(dev, "Failed to create flow group err(%d)\n", err);
388 esw->fdb_table.legacy.addr_grp = g;
390 /* Allmulti group : One rule that forwards any mcast traffic */
391 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
392 MLX5_MATCH_OUTER_HEADERS);
393 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 2);
394 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 2);
397 g = mlx5_create_flow_group(fdb, flow_group_in);
400 esw_warn(dev, "Failed to create allmulti flow group err(%d)\n", err);
403 esw->fdb_table.legacy.allmulti_grp = g;
405 /* Promiscuous group :
406 * One rule that forward all unmatched traffic from previous groups
409 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
410 MLX5_MATCH_MISC_PARAMETERS);
411 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_port);
412 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 1);
413 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 1);
414 g = mlx5_create_flow_group(fdb, flow_group_in);
417 esw_warn(dev, "Failed to create promisc flow group err(%d)\n", err);
420 esw->fdb_table.legacy.promisc_grp = g;
424 if (!IS_ERR_OR_NULL(esw->fdb_table.legacy.allmulti_grp)) {
425 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
426 esw->fdb_table.legacy.allmulti_grp = NULL;
428 if (!IS_ERR_OR_NULL(esw->fdb_table.legacy.addr_grp)) {
429 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
430 esw->fdb_table.legacy.addr_grp = NULL;
432 if (!IS_ERR_OR_NULL(esw->fdb_table.fdb)) {
433 mlx5_destroy_flow_table(esw->fdb_table.fdb);
434 esw->fdb_table.fdb = NULL;
438 kvfree(flow_group_in);
442 static void esw_destroy_legacy_fdb_table(struct mlx5_eswitch *esw)
444 if (!esw->fdb_table.fdb)
447 esw_debug(esw->dev, "Destroy FDB Table\n");
448 mlx5_destroy_flow_group(esw->fdb_table.legacy.promisc_grp);
449 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
450 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
451 mlx5_destroy_flow_table(esw->fdb_table.fdb);
452 esw->fdb_table.fdb = NULL;
453 esw->fdb_table.legacy.addr_grp = NULL;
454 esw->fdb_table.legacy.allmulti_grp = NULL;
455 esw->fdb_table.legacy.promisc_grp = NULL;
458 /* E-Switch vport UC/MC lists management */
459 typedef int (*vport_addr_action)(struct mlx5_eswitch *esw,
460 struct vport_addr *vaddr);
462 static int esw_add_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
464 struct hlist_head *hash = esw->l2_table.l2_hash;
465 struct esw_uc_addr *esw_uc;
466 u8 *mac = vaddr->node.addr;
467 u32 vport = vaddr->vport;
470 esw_uc = l2addr_hash_find(hash, mac, struct esw_uc_addr);
473 "Failed to set L2 mac(%pM) for vport(%d), mac is already in use by vport(%d)\n",
474 mac, vport, esw_uc->vport);
478 esw_uc = l2addr_hash_add(hash, mac, struct esw_uc_addr, GFP_KERNEL);
481 esw_uc->vport = vport;
483 err = set_l2_table_entry(esw->dev, mac, 0, 0, &esw_uc->table_index);
487 /* SRIOV is enabled: Forward UC MAC to vport */
488 if (esw->fdb_table.fdb && esw->mode == SRIOV_LEGACY)
489 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
491 esw_debug(esw->dev, "\tADDED UC MAC: vport[%d] %pM index:%d fr(%p)\n",
492 vport, mac, esw_uc->table_index, vaddr->flow_rule);
495 l2addr_hash_del(esw_uc);
499 static int esw_del_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
501 struct hlist_head *hash = esw->l2_table.l2_hash;
502 struct esw_uc_addr *esw_uc;
503 u8 *mac = vaddr->node.addr;
504 u32 vport = vaddr->vport;
506 esw_uc = l2addr_hash_find(hash, mac, struct esw_uc_addr);
507 if (!esw_uc || esw_uc->vport != vport) {
509 "MAC(%pM) doesn't belong to vport (%d)\n",
513 esw_debug(esw->dev, "\tDELETE UC MAC: vport[%d] %pM index:%d fr(%p)\n",
514 vport, mac, esw_uc->table_index, vaddr->flow_rule);
516 del_l2_table_entry(esw->dev, esw_uc->table_index);
518 if (vaddr->flow_rule)
519 mlx5_del_flow_rules(vaddr->flow_rule);
520 vaddr->flow_rule = NULL;
522 l2addr_hash_del(esw_uc);
526 static void update_allmulti_vports(struct mlx5_eswitch *esw,
527 struct vport_addr *vaddr,
528 struct esw_mc_addr *esw_mc)
530 u8 *mac = vaddr->node.addr;
533 for (vport_idx = 0; vport_idx < esw->total_vports; vport_idx++) {
534 struct mlx5_vport *vport = &esw->vports[vport_idx];
535 struct hlist_head *vport_hash = vport->mc_list;
536 struct vport_addr *iter_vaddr =
537 l2addr_hash_find(vport_hash,
540 if (IS_ERR_OR_NULL(vport->allmulti_rule) ||
541 vaddr->vport == vport_idx)
543 switch (vaddr->action) {
544 case MLX5_ACTION_ADD:
547 iter_vaddr = l2addr_hash_add(vport_hash, mac,
552 "ALL-MULTI: Failed to add MAC(%pM) to vport[%d] DB\n",
556 iter_vaddr->vport = vport_idx;
557 iter_vaddr->flow_rule =
558 esw_fdb_set_vport_rule(esw,
561 iter_vaddr->mc_promisc = true;
563 case MLX5_ACTION_DEL:
566 mlx5_del_flow_rules(iter_vaddr->flow_rule);
567 l2addr_hash_del(iter_vaddr);
573 static int esw_add_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
575 struct hlist_head *hash = esw->mc_table;
576 struct esw_mc_addr *esw_mc;
577 u8 *mac = vaddr->node.addr;
578 u32 vport = vaddr->vport;
580 if (!esw->fdb_table.fdb)
583 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
587 esw_mc = l2addr_hash_add(hash, mac, struct esw_mc_addr, GFP_KERNEL);
591 esw_mc->uplink_rule = /* Forward MC MAC to Uplink */
592 esw_fdb_set_vport_rule(esw, mac, UPLINK_VPORT);
594 /* Add this multicast mac to all the mc promiscuous vports */
595 update_allmulti_vports(esw, vaddr, esw_mc);
598 /* If the multicast mac is added as a result of mc promiscuous vport,
599 * don't increment the multicast ref count
601 if (!vaddr->mc_promisc)
604 /* Forward MC MAC to vport */
605 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
607 "\tADDED MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
608 vport, mac, vaddr->flow_rule,
609 esw_mc->refcnt, esw_mc->uplink_rule);
613 static int esw_del_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
615 struct hlist_head *hash = esw->mc_table;
616 struct esw_mc_addr *esw_mc;
617 u8 *mac = vaddr->node.addr;
618 u32 vport = vaddr->vport;
620 if (!esw->fdb_table.fdb)
623 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
626 "Failed to find eswitch MC addr for MAC(%pM) vport(%d)",
631 "\tDELETE MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
632 vport, mac, vaddr->flow_rule, esw_mc->refcnt,
633 esw_mc->uplink_rule);
635 if (vaddr->flow_rule)
636 mlx5_del_flow_rules(vaddr->flow_rule);
637 vaddr->flow_rule = NULL;
639 /* If the multicast mac is added as a result of mc promiscuous vport,
640 * don't decrement the multicast ref count.
642 if (vaddr->mc_promisc || (--esw_mc->refcnt > 0))
645 /* Remove this multicast mac from all the mc promiscuous vports */
646 update_allmulti_vports(esw, vaddr, esw_mc);
648 if (esw_mc->uplink_rule)
649 mlx5_del_flow_rules(esw_mc->uplink_rule);
651 l2addr_hash_del(esw_mc);
655 /* Apply vport UC/MC list to HW l2 table and FDB table */
656 static void esw_apply_vport_addr_list(struct mlx5_eswitch *esw,
657 u32 vport_num, int list_type)
659 struct mlx5_vport *vport = &esw->vports[vport_num];
660 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
661 vport_addr_action vport_addr_add;
662 vport_addr_action vport_addr_del;
663 struct vport_addr *addr;
664 struct l2addr_node *node;
665 struct hlist_head *hash;
666 struct hlist_node *tmp;
669 vport_addr_add = is_uc ? esw_add_uc_addr :
671 vport_addr_del = is_uc ? esw_del_uc_addr :
674 hash = is_uc ? vport->uc_list : vport->mc_list;
675 for_each_l2hash_node(node, tmp, hash, hi) {
676 addr = container_of(node, struct vport_addr, node);
677 switch (addr->action) {
678 case MLX5_ACTION_ADD:
679 vport_addr_add(esw, addr);
680 addr->action = MLX5_ACTION_NONE;
682 case MLX5_ACTION_DEL:
683 vport_addr_del(esw, addr);
684 l2addr_hash_del(addr);
690 /* Sync vport UC/MC list from vport context */
691 static void esw_update_vport_addr_list(struct mlx5_eswitch *esw,
692 u32 vport_num, int list_type)
694 struct mlx5_vport *vport = &esw->vports[vport_num];
695 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
696 u8 (*mac_list)[ETH_ALEN];
697 struct l2addr_node *node;
698 struct vport_addr *addr;
699 struct hlist_head *hash;
700 struct hlist_node *tmp;
706 size = is_uc ? MLX5_MAX_UC_PER_VPORT(esw->dev) :
707 MLX5_MAX_MC_PER_VPORT(esw->dev);
709 mac_list = kcalloc(size, ETH_ALEN, GFP_KERNEL);
713 hash = is_uc ? vport->uc_list : vport->mc_list;
715 for_each_l2hash_node(node, tmp, hash, hi) {
716 addr = container_of(node, struct vport_addr, node);
717 addr->action = MLX5_ACTION_DEL;
723 err = mlx5_query_nic_vport_mac_list(esw->dev, vport_num, list_type,
727 esw_debug(esw->dev, "vport[%d] context update %s list size (%d)\n",
728 vport_num, is_uc ? "UC" : "MC", size);
730 for (i = 0; i < size; i++) {
731 if (is_uc && !is_valid_ether_addr(mac_list[i]))
734 if (!is_uc && !is_multicast_ether_addr(mac_list[i]))
737 addr = l2addr_hash_find(hash, mac_list[i], struct vport_addr);
739 addr->action = MLX5_ACTION_NONE;
740 /* If this mac was previously added because of allmulti
741 * promiscuous rx mode, its now converted to be original
744 if (addr->mc_promisc) {
745 struct esw_mc_addr *esw_mc =
746 l2addr_hash_find(esw->mc_table,
751 "Failed to MAC(%pM) in mcast DB\n",
756 addr->mc_promisc = false;
761 addr = l2addr_hash_add(hash, mac_list[i], struct vport_addr,
765 "Failed to add MAC(%pM) to vport[%d] DB\n",
766 mac_list[i], vport_num);
769 addr->vport = vport_num;
770 addr->action = MLX5_ACTION_ADD;
776 /* Sync vport UC/MC list from vport context
777 * Must be called after esw_update_vport_addr_list
779 static void esw_update_vport_mc_promisc(struct mlx5_eswitch *esw, u32 vport_num)
781 struct mlx5_vport *vport = &esw->vports[vport_num];
782 struct l2addr_node *node;
783 struct vport_addr *addr;
784 struct hlist_head *hash;
785 struct hlist_node *tmp;
788 hash = vport->mc_list;
790 for_each_l2hash_node(node, tmp, esw->mc_table, hi) {
791 u8 *mac = node->addr;
793 addr = l2addr_hash_find(hash, mac, struct vport_addr);
795 if (addr->action == MLX5_ACTION_DEL)
796 addr->action = MLX5_ACTION_NONE;
799 addr = l2addr_hash_add(hash, mac, struct vport_addr,
803 "Failed to add allmulti MAC(%pM) to vport[%d] DB\n",
807 addr->vport = vport_num;
808 addr->action = MLX5_ACTION_ADD;
809 addr->mc_promisc = true;
813 /* Apply vport rx mode to HW FDB table */
814 static void esw_apply_vport_rx_mode(struct mlx5_eswitch *esw, u32 vport_num,
815 bool promisc, bool mc_promisc)
817 struct esw_mc_addr *allmulti_addr = esw->mc_promisc;
818 struct mlx5_vport *vport = &esw->vports[vport_num];
820 if (IS_ERR_OR_NULL(vport->allmulti_rule) != mc_promisc)
824 vport->allmulti_rule =
825 esw_fdb_set_vport_allmulti_rule(esw, vport_num);
826 if (!allmulti_addr->uplink_rule)
827 allmulti_addr->uplink_rule =
828 esw_fdb_set_vport_allmulti_rule(esw,
830 allmulti_addr->refcnt++;
831 } else if (vport->allmulti_rule) {
832 mlx5_del_flow_rules(vport->allmulti_rule);
833 vport->allmulti_rule = NULL;
835 if (--allmulti_addr->refcnt > 0)
838 if (allmulti_addr->uplink_rule)
839 mlx5_del_flow_rules(allmulti_addr->uplink_rule);
840 allmulti_addr->uplink_rule = NULL;
844 if (IS_ERR_OR_NULL(vport->promisc_rule) != promisc)
848 vport->promisc_rule = esw_fdb_set_vport_promisc_rule(esw,
850 } else if (vport->promisc_rule) {
851 mlx5_del_flow_rules(vport->promisc_rule);
852 vport->promisc_rule = NULL;
856 /* Sync vport rx mode from vport context */
857 static void esw_update_vport_rx_mode(struct mlx5_eswitch *esw, u32 vport_num)
859 struct mlx5_vport *vport = &esw->vports[vport_num];
865 err = mlx5_query_nic_vport_promisc(esw->dev,
872 esw_debug(esw->dev, "vport[%d] context update rx mode promisc_all=%d, all_multi=%d\n",
873 vport_num, promisc_all, promisc_mc);
875 if (!vport->info.trusted || !vport->enabled) {
881 esw_apply_vport_rx_mode(esw, vport_num, promisc_all,
882 (promisc_all || promisc_mc));
885 static void esw_vport_change_handle_locked(struct mlx5_vport *vport)
887 struct mlx5_core_dev *dev = vport->dev;
888 struct mlx5_eswitch *esw = dev->priv.eswitch;
891 mlx5_query_nic_vport_mac_address(dev, vport->vport, mac);
892 esw_debug(dev, "vport[%d] Context Changed: perm mac: %pM\n",
895 if (vport->enabled_events & UC_ADDR_CHANGE) {
896 esw_update_vport_addr_list(esw, vport->vport,
897 MLX5_NVPRT_LIST_TYPE_UC);
898 esw_apply_vport_addr_list(esw, vport->vport,
899 MLX5_NVPRT_LIST_TYPE_UC);
902 if (vport->enabled_events & MC_ADDR_CHANGE) {
903 esw_update_vport_addr_list(esw, vport->vport,
904 MLX5_NVPRT_LIST_TYPE_MC);
907 if (vport->enabled_events & PROMISC_CHANGE) {
908 esw_update_vport_rx_mode(esw, vport->vport);
909 if (!IS_ERR_OR_NULL(vport->allmulti_rule))
910 esw_update_vport_mc_promisc(esw, vport->vport);
913 if (vport->enabled_events & (PROMISC_CHANGE | MC_ADDR_CHANGE)) {
914 esw_apply_vport_addr_list(esw, vport->vport,
915 MLX5_NVPRT_LIST_TYPE_MC);
918 esw_debug(esw->dev, "vport[%d] Context Changed: Done\n", vport->vport);
920 arm_vport_context_events_cmd(dev, vport->vport,
921 vport->enabled_events);
924 static void esw_vport_change_handler(struct work_struct *work)
926 struct mlx5_vport *vport =
927 container_of(work, struct mlx5_vport, vport_change_handler);
928 struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
930 mutex_lock(&esw->state_lock);
931 esw_vport_change_handle_locked(vport);
932 mutex_unlock(&esw->state_lock);
935 static int esw_vport_enable_egress_acl(struct mlx5_eswitch *esw,
936 struct mlx5_vport *vport)
938 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
939 struct mlx5_flow_group *vlan_grp = NULL;
940 struct mlx5_flow_group *drop_grp = NULL;
941 struct mlx5_core_dev *dev = esw->dev;
942 struct mlx5_flow_namespace *root_ns;
943 struct mlx5_flow_table *acl;
944 void *match_criteria;
946 /* The egress acl table contains 2 rules:
947 * 1)Allow traffic with vlan_tag=vst_vlan_id
948 * 2)Drop all other traffic.
953 if (!MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
956 if (!IS_ERR_OR_NULL(vport->egress.acl))
959 esw_debug(dev, "Create vport[%d] egress ACL log_max_size(%d)\n",
960 vport->vport, MLX5_CAP_ESW_EGRESS_ACL(dev, log_max_ft_size));
962 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_EGRESS);
964 esw_warn(dev, "Failed to get E-Switch egress flow namespace\n");
968 flow_group_in = mlx5_vzalloc(inlen);
972 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
975 esw_warn(dev, "Failed to create E-Switch vport[%d] egress flow Table, err(%d)\n",
980 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
981 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
982 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
983 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.first_vid);
984 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
985 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
987 vlan_grp = mlx5_create_flow_group(acl, flow_group_in);
988 if (IS_ERR(vlan_grp)) {
989 err = PTR_ERR(vlan_grp);
990 esw_warn(dev, "Failed to create E-Switch vport[%d] egress allowed vlans flow group, err(%d)\n",
995 memset(flow_group_in, 0, inlen);
996 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
997 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
998 drop_grp = mlx5_create_flow_group(acl, flow_group_in);
999 if (IS_ERR(drop_grp)) {
1000 err = PTR_ERR(drop_grp);
1001 esw_warn(dev, "Failed to create E-Switch vport[%d] egress drop flow group, err(%d)\n",
1006 vport->egress.acl = acl;
1007 vport->egress.drop_grp = drop_grp;
1008 vport->egress.allowed_vlans_grp = vlan_grp;
1010 kvfree(flow_group_in);
1011 if (err && !IS_ERR_OR_NULL(vlan_grp))
1012 mlx5_destroy_flow_group(vlan_grp);
1013 if (err && !IS_ERR_OR_NULL(acl))
1014 mlx5_destroy_flow_table(acl);
1018 static void esw_vport_cleanup_egress_rules(struct mlx5_eswitch *esw,
1019 struct mlx5_vport *vport)
1021 if (!IS_ERR_OR_NULL(vport->egress.allowed_vlan))
1022 mlx5_del_flow_rules(vport->egress.allowed_vlan);
1024 if (!IS_ERR_OR_NULL(vport->egress.drop_rule))
1025 mlx5_del_flow_rules(vport->egress.drop_rule);
1027 vport->egress.allowed_vlan = NULL;
1028 vport->egress.drop_rule = NULL;
1031 static void esw_vport_disable_egress_acl(struct mlx5_eswitch *esw,
1032 struct mlx5_vport *vport)
1034 if (IS_ERR_OR_NULL(vport->egress.acl))
1037 esw_debug(esw->dev, "Destroy vport[%d] E-Switch egress ACL\n", vport->vport);
1039 esw_vport_cleanup_egress_rules(esw, vport);
1040 mlx5_destroy_flow_group(vport->egress.allowed_vlans_grp);
1041 mlx5_destroy_flow_group(vport->egress.drop_grp);
1042 mlx5_destroy_flow_table(vport->egress.acl);
1043 vport->egress.allowed_vlans_grp = NULL;
1044 vport->egress.drop_grp = NULL;
1045 vport->egress.acl = NULL;
1048 static int esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw,
1049 struct mlx5_vport *vport)
1051 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
1052 struct mlx5_core_dev *dev = esw->dev;
1053 struct mlx5_flow_namespace *root_ns;
1054 struct mlx5_flow_table *acl;
1055 struct mlx5_flow_group *g;
1056 void *match_criteria;
1058 /* The ingress acl table contains 4 groups
1059 * (2 active rules at the same time -
1060 * 1 allow rule from one of the first 3 groups.
1061 * 1 drop rule from the last group):
1062 * 1)Allow untagged traffic with smac=original mac.
1063 * 2)Allow untagged traffic.
1064 * 3)Allow traffic with smac=original mac.
1065 * 4)Drop all other traffic.
1070 if (!MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support))
1073 if (!IS_ERR_OR_NULL(vport->ingress.acl))
1076 esw_debug(dev, "Create vport[%d] ingress ACL log_max_size(%d)\n",
1077 vport->vport, MLX5_CAP_ESW_INGRESS_ACL(dev, log_max_ft_size));
1079 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_INGRESS);
1081 esw_warn(dev, "Failed to get E-Switch ingress flow namespace\n");
1085 flow_group_in = mlx5_vzalloc(inlen);
1089 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
1092 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress flow Table, err(%d)\n",
1096 vport->ingress.acl = acl;
1098 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
1100 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1101 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
1102 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1103 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1104 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
1105 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
1107 g = mlx5_create_flow_group(acl, flow_group_in);
1110 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged spoofchk flow group, err(%d)\n",
1114 vport->ingress.allow_untagged_spoofchk_grp = g;
1116 memset(flow_group_in, 0, inlen);
1117 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1118 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
1119 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
1120 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
1122 g = mlx5_create_flow_group(acl, flow_group_in);
1125 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged flow group, err(%d)\n",
1129 vport->ingress.allow_untagged_only_grp = g;
1131 memset(flow_group_in, 0, inlen);
1132 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1133 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1134 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1135 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 2);
1136 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 2);
1138 g = mlx5_create_flow_group(acl, flow_group_in);
1141 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress spoofchk flow group, err(%d)\n",
1145 vport->ingress.allow_spoofchk_only_grp = g;
1147 memset(flow_group_in, 0, inlen);
1148 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 3);
1149 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 3);
1151 g = mlx5_create_flow_group(acl, flow_group_in);
1154 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress drop flow group, err(%d)\n",
1158 vport->ingress.drop_grp = g;
1162 if (!IS_ERR_OR_NULL(vport->ingress.allow_spoofchk_only_grp))
1163 mlx5_destroy_flow_group(
1164 vport->ingress.allow_spoofchk_only_grp);
1165 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_only_grp))
1166 mlx5_destroy_flow_group(
1167 vport->ingress.allow_untagged_only_grp);
1168 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_spoofchk_grp))
1169 mlx5_destroy_flow_group(
1170 vport->ingress.allow_untagged_spoofchk_grp);
1171 if (!IS_ERR_OR_NULL(vport->ingress.acl))
1172 mlx5_destroy_flow_table(vport->ingress.acl);
1175 kvfree(flow_group_in);
1179 static void esw_vport_cleanup_ingress_rules(struct mlx5_eswitch *esw,
1180 struct mlx5_vport *vport)
1182 if (!IS_ERR_OR_NULL(vport->ingress.drop_rule))
1183 mlx5_del_flow_rules(vport->ingress.drop_rule);
1185 if (!IS_ERR_OR_NULL(vport->ingress.allow_rule))
1186 mlx5_del_flow_rules(vport->ingress.allow_rule);
1188 vport->ingress.drop_rule = NULL;
1189 vport->ingress.allow_rule = NULL;
1192 static void esw_vport_disable_ingress_acl(struct mlx5_eswitch *esw,
1193 struct mlx5_vport *vport)
1195 if (IS_ERR_OR_NULL(vport->ingress.acl))
1198 esw_debug(esw->dev, "Destroy vport[%d] E-Switch ingress ACL\n", vport->vport);
1200 esw_vport_cleanup_ingress_rules(esw, vport);
1201 mlx5_destroy_flow_group(vport->ingress.allow_spoofchk_only_grp);
1202 mlx5_destroy_flow_group(vport->ingress.allow_untagged_only_grp);
1203 mlx5_destroy_flow_group(vport->ingress.allow_untagged_spoofchk_grp);
1204 mlx5_destroy_flow_group(vport->ingress.drop_grp);
1205 mlx5_destroy_flow_table(vport->ingress.acl);
1206 vport->ingress.acl = NULL;
1207 vport->ingress.drop_grp = NULL;
1208 vport->ingress.allow_spoofchk_only_grp = NULL;
1209 vport->ingress.allow_untagged_only_grp = NULL;
1210 vport->ingress.allow_untagged_spoofchk_grp = NULL;
1213 static int esw_vport_ingress_config(struct mlx5_eswitch *esw,
1214 struct mlx5_vport *vport)
1216 struct mlx5_flow_act flow_act = {0};
1217 struct mlx5_flow_spec *spec;
1221 if (vport->info.spoofchk && !is_valid_ether_addr(vport->info.mac)) {
1222 mlx5_core_warn(esw->dev,
1223 "vport[%d] configure ingress rules failed, illegal mac with spoofchk\n",
1229 esw_vport_cleanup_ingress_rules(esw, vport);
1231 if (!vport->info.vlan && !vport->info.qos && !vport->info.spoofchk) {
1232 esw_vport_disable_ingress_acl(esw, vport);
1236 err = esw_vport_enable_ingress_acl(esw, vport);
1238 mlx5_core_warn(esw->dev,
1239 "failed to enable ingress acl (%d) on vport[%d]\n",
1245 "vport[%d] configure ingress rules, vlan(%d) qos(%d)\n",
1246 vport->vport, vport->info.vlan, vport->info.qos);
1248 spec = mlx5_vzalloc(sizeof(*spec));
1251 esw_warn(esw->dev, "vport[%d] configure ingress rules failed, err(%d)\n",
1256 if (vport->info.vlan || vport->info.qos)
1257 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.cvlan_tag);
1259 if (vport->info.spoofchk) {
1260 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_47_16);
1261 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_15_0);
1262 smac_v = MLX5_ADDR_OF(fte_match_param,
1264 outer_headers.smac_47_16);
1265 ether_addr_copy(smac_v, vport->info.mac);
1268 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1269 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
1270 vport->ingress.allow_rule =
1271 mlx5_add_flow_rules(vport->ingress.acl, spec,
1272 &flow_act, NULL, 0);
1273 if (IS_ERR(vport->ingress.allow_rule)) {
1274 err = PTR_ERR(vport->ingress.allow_rule);
1276 "vport[%d] configure ingress allow rule, err(%d)\n",
1278 vport->ingress.allow_rule = NULL;
1282 memset(spec, 0, sizeof(*spec));
1283 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
1284 vport->ingress.drop_rule =
1285 mlx5_add_flow_rules(vport->ingress.acl, spec,
1286 &flow_act, NULL, 0);
1287 if (IS_ERR(vport->ingress.drop_rule)) {
1288 err = PTR_ERR(vport->ingress.drop_rule);
1290 "vport[%d] configure ingress drop rule, err(%d)\n",
1292 vport->ingress.drop_rule = NULL;
1298 esw_vport_cleanup_ingress_rules(esw, vport);
1303 static int esw_vport_egress_config(struct mlx5_eswitch *esw,
1304 struct mlx5_vport *vport)
1306 struct mlx5_flow_act flow_act = {0};
1307 struct mlx5_flow_spec *spec;
1310 esw_vport_cleanup_egress_rules(esw, vport);
1312 if (!vport->info.vlan && !vport->info.qos) {
1313 esw_vport_disable_egress_acl(esw, vport);
1317 err = esw_vport_enable_egress_acl(esw, vport);
1319 mlx5_core_warn(esw->dev,
1320 "failed to enable egress acl (%d) on vport[%d]\n",
1326 "vport[%d] configure egress rules, vlan(%d) qos(%d)\n",
1327 vport->vport, vport->info.vlan, vport->info.qos);
1329 spec = mlx5_vzalloc(sizeof(*spec));
1332 esw_warn(esw->dev, "vport[%d] configure egress rules failed, err(%d)\n",
1337 /* Allowed vlan rule */
1338 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.cvlan_tag);
1339 MLX5_SET_TO_ONES(fte_match_param, spec->match_value, outer_headers.cvlan_tag);
1340 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.first_vid);
1341 MLX5_SET(fte_match_param, spec->match_value, outer_headers.first_vid, vport->info.vlan);
1343 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1344 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
1345 vport->egress.allowed_vlan =
1346 mlx5_add_flow_rules(vport->egress.acl, spec,
1347 &flow_act, NULL, 0);
1348 if (IS_ERR(vport->egress.allowed_vlan)) {
1349 err = PTR_ERR(vport->egress.allowed_vlan);
1351 "vport[%d] configure egress allowed vlan rule failed, err(%d)\n",
1353 vport->egress.allowed_vlan = NULL;
1357 /* Drop others rule (star rule) */
1358 memset(spec, 0, sizeof(*spec));
1359 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
1360 vport->egress.drop_rule =
1361 mlx5_add_flow_rules(vport->egress.acl, spec,
1362 &flow_act, NULL, 0);
1363 if (IS_ERR(vport->egress.drop_rule)) {
1364 err = PTR_ERR(vport->egress.drop_rule);
1366 "vport[%d] configure egress drop rule failed, err(%d)\n",
1368 vport->egress.drop_rule = NULL;
1375 /* Vport QoS management */
1376 static int esw_create_tsar(struct mlx5_eswitch *esw)
1378 u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1379 struct mlx5_core_dev *dev = esw->dev;
1382 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
1385 if (esw->qos.enabled)
1388 err = mlx5_create_scheduling_element_cmd(dev,
1389 SCHEDULING_HIERARCHY_E_SWITCH,
1391 &esw->qos.root_tsar_id);
1393 esw_warn(esw->dev, "E-Switch create TSAR failed (%d)\n", err);
1397 esw->qos.enabled = true;
1401 static void esw_destroy_tsar(struct mlx5_eswitch *esw)
1405 if (!esw->qos.enabled)
1408 err = mlx5_destroy_scheduling_element_cmd(esw->dev,
1409 SCHEDULING_HIERARCHY_E_SWITCH,
1410 esw->qos.root_tsar_id);
1412 esw_warn(esw->dev, "E-Switch destroy TSAR failed (%d)\n", err);
1414 esw->qos.enabled = false;
1417 static int esw_vport_enable_qos(struct mlx5_eswitch *esw, int vport_num,
1418 u32 initial_max_rate, u32 initial_bw_share)
1420 u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1421 struct mlx5_vport *vport = &esw->vports[vport_num];
1422 struct mlx5_core_dev *dev = esw->dev;
1426 if (!esw->qos.enabled || !MLX5_CAP_GEN(dev, qos) ||
1427 !MLX5_CAP_QOS(dev, esw_scheduling))
1430 if (vport->qos.enabled)
1433 MLX5_SET(scheduling_context, &sched_ctx, element_type,
1434 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
1435 vport_elem = MLX5_ADDR_OF(scheduling_context, &sched_ctx,
1436 element_attributes);
1437 MLX5_SET(vport_element, vport_elem, vport_number, vport_num);
1438 MLX5_SET(scheduling_context, &sched_ctx, parent_element_id,
1439 esw->qos.root_tsar_id);
1440 MLX5_SET(scheduling_context, &sched_ctx, max_average_bw,
1442 MLX5_SET(scheduling_context, &sched_ctx, bw_share, initial_bw_share);
1444 err = mlx5_create_scheduling_element_cmd(dev,
1445 SCHEDULING_HIERARCHY_E_SWITCH,
1447 &vport->qos.esw_tsar_ix);
1449 esw_warn(esw->dev, "E-Switch create TSAR vport element failed (vport=%d,err=%d)\n",
1454 vport->qos.enabled = true;
1458 static void esw_vport_disable_qos(struct mlx5_eswitch *esw, int vport_num)
1460 struct mlx5_vport *vport = &esw->vports[vport_num];
1463 if (!vport->qos.enabled)
1466 err = mlx5_destroy_scheduling_element_cmd(esw->dev,
1467 SCHEDULING_HIERARCHY_E_SWITCH,
1468 vport->qos.esw_tsar_ix);
1470 esw_warn(esw->dev, "E-Switch destroy TSAR vport element failed (vport=%d,err=%d)\n",
1473 vport->qos.enabled = false;
1476 static int esw_vport_qos_config(struct mlx5_eswitch *esw, int vport_num,
1477 u32 max_rate, u32 bw_share)
1479 u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1480 struct mlx5_vport *vport = &esw->vports[vport_num];
1481 struct mlx5_core_dev *dev = esw->dev;
1486 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
1489 if (!vport->qos.enabled)
1492 MLX5_SET(scheduling_context, &sched_ctx, element_type,
1493 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
1494 vport_elem = MLX5_ADDR_OF(scheduling_context, &sched_ctx,
1495 element_attributes);
1496 MLX5_SET(vport_element, vport_elem, vport_number, vport_num);
1497 MLX5_SET(scheduling_context, &sched_ctx, parent_element_id,
1498 esw->qos.root_tsar_id);
1499 MLX5_SET(scheduling_context, &sched_ctx, max_average_bw,
1501 MLX5_SET(scheduling_context, &sched_ctx, bw_share, bw_share);
1502 bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW;
1503 bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE;
1505 err = mlx5_modify_scheduling_element_cmd(dev,
1506 SCHEDULING_HIERARCHY_E_SWITCH,
1508 vport->qos.esw_tsar_ix,
1511 esw_warn(esw->dev, "E-Switch modify TSAR vport element failed (vport=%d,err=%d)\n",
1519 static void node_guid_gen_from_mac(u64 *node_guid, u8 mac[ETH_ALEN])
1521 ((u8 *)node_guid)[7] = mac[0];
1522 ((u8 *)node_guid)[6] = mac[1];
1523 ((u8 *)node_guid)[5] = mac[2];
1524 ((u8 *)node_guid)[4] = 0xff;
1525 ((u8 *)node_guid)[3] = 0xfe;
1526 ((u8 *)node_guid)[2] = mac[3];
1527 ((u8 *)node_guid)[1] = mac[4];
1528 ((u8 *)node_guid)[0] = mac[5];
1531 static void esw_apply_vport_conf(struct mlx5_eswitch *esw,
1532 struct mlx5_vport *vport)
1534 int vport_num = vport->vport;
1539 mlx5_modify_vport_admin_state(esw->dev,
1540 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1542 vport->info.link_state);
1543 mlx5_modify_nic_vport_mac_address(esw->dev, vport_num, vport->info.mac);
1544 mlx5_modify_nic_vport_node_guid(esw->dev, vport_num, vport->info.node_guid);
1545 modify_esw_vport_cvlan(esw->dev, vport_num, vport->info.vlan, vport->info.qos,
1546 (vport->info.vlan || vport->info.qos));
1548 /* Only legacy mode needs ACLs */
1549 if (esw->mode == SRIOV_LEGACY) {
1550 esw_vport_ingress_config(esw, vport);
1551 esw_vport_egress_config(esw, vport);
1555 static void esw_enable_vport(struct mlx5_eswitch *esw, int vport_num,
1558 struct mlx5_vport *vport = &esw->vports[vport_num];
1560 mutex_lock(&esw->state_lock);
1561 WARN_ON(vport->enabled);
1563 esw_debug(esw->dev, "Enabling VPORT(%d)\n", vport_num);
1565 /* Restore old vport configuration */
1566 esw_apply_vport_conf(esw, vport);
1568 /* Attach vport to the eswitch rate limiter */
1569 if (esw_vport_enable_qos(esw, vport_num, vport->info.max_rate,
1570 vport->qos.bw_share))
1571 esw_warn(esw->dev, "Failed to attach vport %d to eswitch rate limiter", vport_num);
1573 /* Sync with current vport context */
1574 vport->enabled_events = enable_events;
1575 vport->enabled = true;
1577 /* only PF is trusted by default */
1579 vport->info.trusted = true;
1581 esw_vport_change_handle_locked(vport);
1583 esw->enabled_vports++;
1584 esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);
1585 mutex_unlock(&esw->state_lock);
1588 static void esw_disable_vport(struct mlx5_eswitch *esw, int vport_num)
1590 struct mlx5_vport *vport = &esw->vports[vport_num];
1592 if (!vport->enabled)
1595 esw_debug(esw->dev, "Disabling vport(%d)\n", vport_num);
1596 /* Mark this vport as disabled to discard new events */
1597 vport->enabled = false;
1599 synchronize_irq(mlx5_get_msix_vec(esw->dev, MLX5_EQ_VEC_ASYNC));
1600 /* Wait for current already scheduled events to complete */
1601 flush_workqueue(esw->work_queue);
1602 /* Disable events from this vport */
1603 arm_vport_context_events_cmd(esw->dev, vport->vport, 0);
1604 mutex_lock(&esw->state_lock);
1605 /* We don't assume VFs will cleanup after themselves.
1606 * Calling vport change handler while vport is disabled will cleanup
1607 * the vport resources.
1609 esw_vport_change_handle_locked(vport);
1610 vport->enabled_events = 0;
1611 esw_vport_disable_qos(esw, vport_num);
1612 if (vport_num && esw->mode == SRIOV_LEGACY) {
1613 mlx5_modify_vport_admin_state(esw->dev,
1614 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1616 MLX5_ESW_VPORT_ADMIN_STATE_DOWN);
1617 esw_vport_disable_egress_acl(esw, vport);
1618 esw_vport_disable_ingress_acl(esw, vport);
1620 esw->enabled_vports--;
1621 mutex_unlock(&esw->state_lock);
1624 /* Public E-Switch API */
1625 int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode)
1628 int i, enabled_events;
1630 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1631 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1634 if (!MLX5_CAP_GEN(esw->dev, eswitch_flow_table) ||
1635 !MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ft_support)) {
1636 esw_warn(esw->dev, "E-Switch FDB is not supported, aborting ...\n");
1640 if (!MLX5_CAP_ESW_INGRESS_ACL(esw->dev, ft_support))
1641 esw_warn(esw->dev, "E-Switch ingress ACL is not supported by FW\n");
1643 if (!MLX5_CAP_ESW_EGRESS_ACL(esw->dev, ft_support))
1644 esw_warn(esw->dev, "E-Switch engress ACL is not supported by FW\n");
1646 esw_info(esw->dev, "E-Switch enable SRIOV: nvfs(%d) mode (%d)\n", nvfs, mode);
1648 esw_disable_vport(esw, 0);
1650 if (mode == SRIOV_LEGACY)
1651 err = esw_create_legacy_fdb_table(esw, nvfs + 1);
1653 err = esw_offloads_init(esw, nvfs + 1);
1657 err = esw_create_tsar(esw);
1659 esw_warn(esw->dev, "Failed to create eswitch TSAR");
1661 enabled_events = (mode == SRIOV_LEGACY) ? SRIOV_VPORT_EVENTS : UC_ADDR_CHANGE;
1662 for (i = 0; i <= nvfs; i++)
1663 esw_enable_vport(esw, i, enabled_events);
1665 esw_info(esw->dev, "SRIOV enabled: active vports(%d)\n",
1666 esw->enabled_vports);
1670 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1671 esw->mode = SRIOV_NONE;
1675 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw)
1677 struct esw_mc_addr *mc_promisc;
1681 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1682 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1685 esw_info(esw->dev, "disable SRIOV: active vports(%d) mode(%d)\n",
1686 esw->enabled_vports, esw->mode);
1688 mc_promisc = esw->mc_promisc;
1689 nvports = esw->enabled_vports;
1691 for (i = 0; i < esw->total_vports; i++)
1692 esw_disable_vport(esw, i);
1694 if (mc_promisc && mc_promisc->uplink_rule)
1695 mlx5_del_flow_rules(mc_promisc->uplink_rule);
1697 esw_destroy_tsar(esw);
1699 if (esw->mode == SRIOV_LEGACY)
1700 esw_destroy_legacy_fdb_table(esw);
1701 else if (esw->mode == SRIOV_OFFLOADS)
1702 esw_offloads_cleanup(esw, nvports);
1704 esw->mode = SRIOV_NONE;
1705 /* VPORT 0 (PF) must be enabled back with non-sriov configuration */
1706 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1709 void mlx5_eswitch_attach(struct mlx5_eswitch *esw)
1711 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1712 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1715 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1716 /* VF Vports will be enabled when SRIOV is enabled */
1719 void mlx5_eswitch_detach(struct mlx5_eswitch *esw)
1721 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1722 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1725 esw_disable_vport(esw, 0);
1728 int mlx5_eswitch_init(struct mlx5_core_dev *dev)
1730 int l2_table_size = 1 << MLX5_CAP_GEN(dev, log_max_l2_table);
1731 int total_vports = MLX5_TOTAL_VPORTS(dev);
1732 struct esw_mc_addr *mc_promisc;
1733 struct mlx5_eswitch *esw;
1737 if (!MLX5_CAP_GEN(dev, vport_group_manager) ||
1738 MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1742 "Total vports %d, l2 table size(%d), per vport: max uc(%d) max mc(%d)\n",
1743 total_vports, l2_table_size,
1744 MLX5_MAX_UC_PER_VPORT(dev),
1745 MLX5_MAX_MC_PER_VPORT(dev));
1747 esw = kzalloc(sizeof(*esw), GFP_KERNEL);
1753 esw->l2_table.bitmap = kcalloc(BITS_TO_LONGS(l2_table_size),
1754 sizeof(uintptr_t), GFP_KERNEL);
1755 if (!esw->l2_table.bitmap) {
1759 esw->l2_table.size = l2_table_size;
1761 mc_promisc = kzalloc(sizeof(*mc_promisc), GFP_KERNEL);
1766 esw->mc_promisc = mc_promisc;
1768 esw->work_queue = create_singlethread_workqueue("mlx5_esw_wq");
1769 if (!esw->work_queue) {
1774 esw->vports = kcalloc(total_vports, sizeof(struct mlx5_vport),
1781 esw->offloads.vport_reps =
1782 kzalloc(total_vports * sizeof(struct mlx5_eswitch_rep),
1784 if (!esw->offloads.vport_reps) {
1789 hash_init(esw->offloads.encap_tbl);
1790 mutex_init(&esw->state_lock);
1792 for (vport_num = 0; vport_num < total_vports; vport_num++) {
1793 struct mlx5_vport *vport = &esw->vports[vport_num];
1795 vport->vport = vport_num;
1796 vport->info.link_state = MLX5_ESW_VPORT_ADMIN_STATE_AUTO;
1798 INIT_WORK(&vport->vport_change_handler,
1799 esw_vport_change_handler);
1802 esw->total_vports = total_vports;
1803 esw->enabled_vports = 0;
1804 esw->mode = SRIOV_NONE;
1805 esw->offloads.inline_mode = MLX5_INLINE_MODE_NONE;
1807 dev->priv.eswitch = esw;
1810 if (esw->work_queue)
1811 destroy_workqueue(esw->work_queue);
1812 kfree(esw->l2_table.bitmap);
1814 kfree(esw->offloads.vport_reps);
1819 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
1821 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1822 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1825 esw_info(esw->dev, "cleanup\n");
1827 esw->dev->priv.eswitch = NULL;
1828 destroy_workqueue(esw->work_queue);
1829 kfree(esw->l2_table.bitmap);
1830 kfree(esw->mc_promisc);
1831 kfree(esw->offloads.vport_reps);
1836 void mlx5_eswitch_vport_event(struct mlx5_eswitch *esw, struct mlx5_eqe *eqe)
1838 struct mlx5_eqe_vport_change *vc_eqe = &eqe->data.vport_change;
1839 u16 vport_num = be16_to_cpu(vc_eqe->vport_num);
1840 struct mlx5_vport *vport;
1843 pr_warn("MLX5 E-Switch: vport %d got an event while eswitch is not initialized\n",
1848 vport = &esw->vports[vport_num];
1850 queue_work(esw->work_queue, &vport->vport_change_handler);
1853 /* Vport Administration */
1854 #define ESW_ALLOWED(esw) \
1855 (esw && MLX5_CAP_GEN(esw->dev, vport_group_manager) && mlx5_core_is_pf(esw->dev))
1856 #define LEGAL_VPORT(esw, vport) (vport >= 0 && vport < esw->total_vports)
1858 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
1859 int vport, u8 mac[ETH_ALEN])
1861 struct mlx5_vport *evport;
1865 if (!ESW_ALLOWED(esw))
1867 if (!LEGAL_VPORT(esw, vport) || is_multicast_ether_addr(mac))
1870 mutex_lock(&esw->state_lock);
1871 evport = &esw->vports[vport];
1873 if (evport->info.spoofchk && !is_valid_ether_addr(mac)) {
1874 mlx5_core_warn(esw->dev,
1875 "MAC invalidation is not allowed when spoofchk is on, vport(%d)\n",
1881 err = mlx5_modify_nic_vport_mac_address(esw->dev, vport, mac);
1883 mlx5_core_warn(esw->dev,
1884 "Failed to mlx5_modify_nic_vport_mac vport(%d) err=(%d)\n",
1889 node_guid_gen_from_mac(&node_guid, mac);
1890 err = mlx5_modify_nic_vport_node_guid(esw->dev, vport, node_guid);
1892 mlx5_core_warn(esw->dev,
1893 "Failed to set vport %d node guid, err = %d. RDMA_CM will not function properly for this VF.\n",
1896 ether_addr_copy(evport->info.mac, mac);
1897 evport->info.node_guid = node_guid;
1898 if (evport->enabled && esw->mode == SRIOV_LEGACY)
1899 err = esw_vport_ingress_config(esw, evport);
1902 mutex_unlock(&esw->state_lock);
1906 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
1907 int vport, int link_state)
1909 struct mlx5_vport *evport;
1912 if (!ESW_ALLOWED(esw))
1914 if (!LEGAL_VPORT(esw, vport))
1917 mutex_lock(&esw->state_lock);
1918 evport = &esw->vports[vport];
1920 err = mlx5_modify_vport_admin_state(esw->dev,
1921 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1924 mlx5_core_warn(esw->dev,
1925 "Failed to set vport %d link state, err = %d",
1930 evport->info.link_state = link_state;
1933 mutex_unlock(&esw->state_lock);
1937 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
1938 int vport, struct ifla_vf_info *ivi)
1940 struct mlx5_vport *evport;
1942 if (!ESW_ALLOWED(esw))
1944 if (!LEGAL_VPORT(esw, vport))
1947 evport = &esw->vports[vport];
1949 memset(ivi, 0, sizeof(*ivi));
1950 ivi->vf = vport - 1;
1952 mutex_lock(&esw->state_lock);
1953 ether_addr_copy(ivi->mac, evport->info.mac);
1954 ivi->linkstate = evport->info.link_state;
1955 ivi->vlan = evport->info.vlan;
1956 ivi->qos = evport->info.qos;
1957 ivi->spoofchk = evport->info.spoofchk;
1958 ivi->trusted = evport->info.trusted;
1959 ivi->min_tx_rate = evport->info.min_rate;
1960 ivi->max_tx_rate = evport->info.max_rate;
1961 mutex_unlock(&esw->state_lock);
1966 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
1967 int vport, u16 vlan, u8 qos, u8 set_flags)
1969 struct mlx5_vport *evport;
1972 if (!ESW_ALLOWED(esw))
1974 if (!LEGAL_VPORT(esw, vport) || (vlan > 4095) || (qos > 7))
1977 mutex_lock(&esw->state_lock);
1978 evport = &esw->vports[vport];
1980 err = modify_esw_vport_cvlan(esw->dev, vport, vlan, qos, set_flags);
1984 evport->info.vlan = vlan;
1985 evport->info.qos = qos;
1986 if (evport->enabled && esw->mode == SRIOV_LEGACY) {
1987 err = esw_vport_ingress_config(esw, evport);
1990 err = esw_vport_egress_config(esw, evport);
1994 mutex_unlock(&esw->state_lock);
1998 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
1999 int vport, u16 vlan, u8 qos)
2004 set_flags = SET_VLAN_STRIP | SET_VLAN_INSERT;
2006 return __mlx5_eswitch_set_vport_vlan(esw, vport, vlan, qos, set_flags);
2009 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
2010 int vport, bool spoofchk)
2012 struct mlx5_vport *evport;
2016 if (!ESW_ALLOWED(esw))
2018 if (!LEGAL_VPORT(esw, vport))
2021 mutex_lock(&esw->state_lock);
2022 evport = &esw->vports[vport];
2023 pschk = evport->info.spoofchk;
2024 evport->info.spoofchk = spoofchk;
2025 if (evport->enabled && esw->mode == SRIOV_LEGACY)
2026 err = esw_vport_ingress_config(esw, evport);
2028 evport->info.spoofchk = pschk;
2029 mutex_unlock(&esw->state_lock);
2034 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
2035 int vport, bool setting)
2037 struct mlx5_vport *evport;
2039 if (!ESW_ALLOWED(esw))
2041 if (!LEGAL_VPORT(esw, vport))
2044 mutex_lock(&esw->state_lock);
2045 evport = &esw->vports[vport];
2046 evport->info.trusted = setting;
2047 if (evport->enabled)
2048 esw_vport_change_handle_locked(evport);
2049 mutex_unlock(&esw->state_lock);
2054 static u32 calculate_vports_min_rate_divider(struct mlx5_eswitch *esw)
2056 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2057 struct mlx5_vport *evport;
2058 u32 max_guarantee = 0;
2061 for (i = 0; i <= esw->total_vports; i++) {
2062 evport = &esw->vports[i];
2063 if (!evport->enabled || evport->info.min_rate < max_guarantee)
2065 max_guarantee = evport->info.min_rate;
2068 return max_t(u32, max_guarantee / fw_max_bw_share, 1);
2071 static int normalize_vports_min_rate(struct mlx5_eswitch *esw, u32 divider)
2073 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2074 struct mlx5_vport *evport;
2081 for (i = 0; i <= esw->total_vports; i++) {
2082 evport = &esw->vports[i];
2083 if (!evport->enabled)
2085 vport_min_rate = evport->info.min_rate;
2086 vport_max_rate = evport->info.max_rate;
2087 bw_share = MLX5_MIN_BW_SHARE;
2090 bw_share = MLX5_RATE_TO_BW_SHARE(vport_min_rate,
2094 if (bw_share == evport->qos.bw_share)
2097 err = esw_vport_qos_config(esw, i, vport_max_rate,
2100 evport->qos.bw_share = bw_share;
2108 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, int vport,
2109 u32 max_rate, u32 min_rate)
2111 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2112 bool min_rate_supported = MLX5_CAP_QOS(esw->dev, esw_bw_share) &&
2113 fw_max_bw_share >= MLX5_MIN_BW_SHARE;
2114 bool max_rate_supported = MLX5_CAP_QOS(esw->dev, esw_rate_limit);
2115 struct mlx5_vport *evport;
2116 u32 previous_min_rate;
2120 if (!ESW_ALLOWED(esw))
2122 if (!LEGAL_VPORT(esw, vport))
2124 if ((min_rate && !min_rate_supported) || (max_rate && !max_rate_supported))
2127 mutex_lock(&esw->state_lock);
2128 evport = &esw->vports[vport];
2130 if (min_rate == evport->info.min_rate)
2133 previous_min_rate = evport->info.min_rate;
2134 evport->info.min_rate = min_rate;
2135 divider = calculate_vports_min_rate_divider(esw);
2136 err = normalize_vports_min_rate(esw, divider);
2138 evport->info.min_rate = previous_min_rate;
2143 if (max_rate == evport->info.max_rate)
2146 err = esw_vport_qos_config(esw, vport, max_rate, evport->qos.bw_share);
2148 evport->info.max_rate = max_rate;
2151 mutex_unlock(&esw->state_lock);
2155 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
2157 struct ifla_vf_stats *vf_stats)
2159 int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
2160 u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {0};
2164 if (!ESW_ALLOWED(esw))
2166 if (!LEGAL_VPORT(esw, vport))
2169 out = mlx5_vzalloc(outlen);
2173 MLX5_SET(query_vport_counter_in, in, opcode,
2174 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
2175 MLX5_SET(query_vport_counter_in, in, op_mod, 0);
2176 MLX5_SET(query_vport_counter_in, in, vport_number, vport);
2178 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
2180 memset(out, 0, outlen);
2181 err = mlx5_cmd_exec(esw->dev, in, sizeof(in), out, outlen);
2185 #define MLX5_GET_CTR(p, x) \
2186 MLX5_GET64(query_vport_counter_out, p, x)
2188 memset(vf_stats, 0, sizeof(*vf_stats));
2189 vf_stats->rx_packets =
2190 MLX5_GET_CTR(out, received_eth_unicast.packets) +
2191 MLX5_GET_CTR(out, received_eth_multicast.packets) +
2192 MLX5_GET_CTR(out, received_eth_broadcast.packets);
2194 vf_stats->rx_bytes =
2195 MLX5_GET_CTR(out, received_eth_unicast.octets) +
2196 MLX5_GET_CTR(out, received_eth_multicast.octets) +
2197 MLX5_GET_CTR(out, received_eth_broadcast.octets);
2199 vf_stats->tx_packets =
2200 MLX5_GET_CTR(out, transmitted_eth_unicast.packets) +
2201 MLX5_GET_CTR(out, transmitted_eth_multicast.packets) +
2202 MLX5_GET_CTR(out, transmitted_eth_broadcast.packets);
2204 vf_stats->tx_bytes =
2205 MLX5_GET_CTR(out, transmitted_eth_unicast.octets) +
2206 MLX5_GET_CTR(out, transmitted_eth_multicast.octets) +
2207 MLX5_GET_CTR(out, transmitted_eth_broadcast.octets);
2209 vf_stats->multicast =
2210 MLX5_GET_CTR(out, received_eth_multicast.packets);
2212 vf_stats->broadcast =
2213 MLX5_GET_CTR(out, received_eth_broadcast.packets);