drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/sch_generic.h>
  35 #include <net/pkt_cls.h>
  36 #include <net/tc_act/tc_gact.h>
  37 #include <net/tc_act/tc_skbedit.h>
  38 #include <linux/mlx5/fs.h>
  39 #include <linux/mlx5/device.h>
  40 #include <linux/rhashtable.h>
  41 #include <net/switchdev.h>
  42 #include <net/tc_act/tc_mirred.h>
  43 #include <net/tc_act/tc_vlan.h>
  44 #include <net/tc_act/tc_tunnel_key.h>
  45 #include <net/tc_act/tc_pedit.h>
  46 #include <net/tc_act/tc_csum.h>
  47 #include <net/vxlan.h>
  48 #include <net/arp.h>
  49 #include "en.h"
  50 #include "en_rep.h"
  51 #include "en_tc.h"
  52 #include "eswitch.h"
  53 #include "lib/vxlan.h"
  54 #include "fs_core.h"
  55 #include "en/port.h"
  56
  57 struct mlx5_nic_flow_attr {
  58         u32 action;
  59         u32 flow_tag;
  60         u32 mod_hdr_id;
  61         u32 hairpin_tirn;
  62         u8 match_level;
  63         struct mlx5_flow_table  *hairpin_ft;
  64 };
  65
  66 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
  67
  68 enum {
  69         MLX5E_TC_FLOW_INGRESS   = MLX5E_TC_INGRESS,
  70         MLX5E_TC_FLOW_EGRESS    = MLX5E_TC_EGRESS,
  71         MLX5E_TC_FLOW_ESWITCH   = BIT(MLX5E_TC_FLOW_BASE),
  72         MLX5E_TC_FLOW_NIC       = BIT(MLX5E_TC_FLOW_BASE + 1),
  73         MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2),
  74         MLX5E_TC_FLOW_HAIRPIN   = BIT(MLX5E_TC_FLOW_BASE + 3),
  75         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4),
  76 };
  77
  78 #define MLX5E_TC_MAX_SPLITS 1
  79
  80 struct mlx5e_tc_flow {
  81         struct rhash_head       node;
  82         struct mlx5e_priv       *priv;
  83         u64                     cookie;
  84         u8                      flags;
  85         struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1];
  86         struct list_head        encap;   /* flows sharing the same encap ID */
  87         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
  88         struct list_head        hairpin; /* flows sharing the same hairpin */
  89         union {
  90                 struct mlx5_esw_flow_attr esw_attr[0];
  91                 struct mlx5_nic_flow_attr nic_attr[0];
  92         };
  93 };
  94
  95 struct mlx5e_tc_flow_parse_attr {
  96         struct ip_tunnel_info tun_info;
  97         struct mlx5_flow_spec spec;
  98         int num_mod_hdr_actions;
  99         void *mod_hdr_actions;
 100         int mirred_ifindex;
 101 };
 102
 103 enum {
 104         MLX5_HEADER_TYPE_VXLAN = 0x0,
 105         MLX5_HEADER_TYPE_NVGRE = 0x1,
 106 };
 107
 108 #define MLX5E_TC_TABLE_NUM_GROUPS 4
 109 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
 110
 111 struct mlx5e_hairpin {
 112         struct mlx5_hairpin *pair;
 113
 114         struct mlx5_core_dev *func_mdev;
 115         struct mlx5e_priv *func_priv;
 116         u32 tdn;
 117         u32 tirn;
 118
 119         int num_channels;
 120         struct mlx5e_rqt indir_rqt;
 121         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
 122         struct mlx5e_ttc_table ttc;
 123 };
 124
 125 struct mlx5e_hairpin_entry {
 126         /* a node of a hash table which keeps all the  hairpin entries */
 127         struct hlist_node hairpin_hlist;
 128
 129         /* flows sharing the same hairpin */
 130         struct list_head flows;
 131
 132         u16 peer_vhca_id;
 133         u8 prio;
 134         struct mlx5e_hairpin *hp;
 135 };
 136
 137 struct mod_hdr_key {
 138         int num_actions;
 139         void *actions;
 140 };
 141
 142 struct mlx5e_mod_hdr_entry {
 143         /* a node of a hash table which keeps all the mod_hdr entries */
 144         struct hlist_node mod_hdr_hlist;
 145
 146         /* flows sharing the same mod_hdr entry */
 147         struct list_head flows;
 148
 149         struct mod_hdr_key key;
 150
 151         u32 mod_hdr_id;
 152 };
 153
 154 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
 155
 156 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
 157 {
 158         return jhash(key->actions,
 159                      key->num_actions * MLX5_MH_ACT_SZ, 0);
 160 }
 161
 162 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
 163                                    struct mod_hdr_key *b)
 164 {
 165         if (a->num_actions != b->num_actions)
 166                 return 1;
 167
 168         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
 169 }
 170
 171 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
 172                                 struct mlx5e_tc_flow *flow,
 173                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
 174 {
 175         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 176         int num_actions, actions_size, namespace, err;
 177         struct mlx5e_mod_hdr_entry *mh;
 178         struct mod_hdr_key key;
 179         bool found = false;
 180         u32 hash_key;
 181
 182         num_actions  = parse_attr->num_mod_hdr_actions;
 183         actions_size = MLX5_MH_ACT_SZ * num_actions;
 184
 185         key.actions = parse_attr->mod_hdr_actions;
 186         key.num_actions = num_actions;
 187
 188         hash_key = hash_mod_hdr_info(&key);
 189
 190         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
 191                 namespace = MLX5_FLOW_NAMESPACE_FDB;
 192                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
 193                                        mod_hdr_hlist, hash_key) {
 194                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 195                                 found = true;
 196                                 break;
 197                         }
 198                 }
 199         } else {
 200                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
 201                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
 202                                        mod_hdr_hlist, hash_key) {
 203                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 204                                 found = true;
 205                                 break;
 206                         }
 207                 }
 208         }
 209
 210         if (found)
 211                 goto attach_flow;
 212
 213         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
 214         if (!mh)
 215                 return -ENOMEM;
 216
 217         mh->key.actions = (void *)mh + sizeof(*mh);
 218         memcpy(mh->key.actions, key.actions, actions_size);
 219         mh->key.num_actions = num_actions;
 220         INIT_LIST_HEAD(&mh->flows);
 221
 222         err = mlx5_modify_header_alloc(priv->mdev, namespace,
 223                                        mh->key.num_actions,
 224                                        mh->key.actions,
 225                                        &mh->mod_hdr_id);
 226         if (err)
 227                 goto out_err;
 228
 229         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 230                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 231         else
 232                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 233
 234 attach_flow:
 235         list_add(&flow->mod_hdr, &mh->flows);
 236         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 237                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
 238         else
 239                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
 240
 241         return 0;
 242
 243 out_err:
 244         kfree(mh);
 245         return err;
 246 }
 247
 248 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
 249                                  struct mlx5e_tc_flow *flow)
 250 {
 251         struct list_head *next = flow->mod_hdr.next;
 252
 253         list_del(&flow->mod_hdr);
 254
 255         if (list_empty(next)) {
 256                 struct mlx5e_mod_hdr_entry *mh;
 257
 258                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
 259
 260                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
 261                 hash_del(&mh->mod_hdr_hlist);
 262                 kfree(mh);
 263         }
 264 }
 265
 266 static
 267 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 268 {
 269         struct net_device *netdev;
 270         struct mlx5e_priv *priv;
 271
 272         netdev = __dev_get_by_index(net, ifindex);
 273         priv = netdev_priv(netdev);
 274         return priv->mdev;
 275 }
 276
 277 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 278 {
 279         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
 280         void *tirc;
 281         int err;
 282
 283         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 284         if (err)
 285                 goto alloc_tdn_err;
 286
 287         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 288
 289         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
 290         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
 291         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 292
 293         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
 294         if (err)
 295                 goto create_tir_err;
 296
 297         return 0;
 298
 299 create_tir_err:
 300         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 301 alloc_tdn_err:
 302         return err;
 303 }
 304
 305 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 306 {
 307         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
 308         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 309 }
 310
 311 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
 312 {
 313         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
 314         struct mlx5e_priv *priv = hp->func_priv;
 315         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
 316
 317         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
 318                                       hp->num_channels);
 319
 320         for (i = 0; i < sz; i++) {
 321                 ix = i;
 322                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
 323                         ix = mlx5e_bits_invert(i, ilog2(sz));
 324                 ix = indirection_rqt[ix];
 325                 rqn = hp->pair->rqn[ix];
 326                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
 327         }
 328 }
 329
 330 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 331 {
 332         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
 333         struct mlx5e_priv *priv = hp->func_priv;
 334         struct mlx5_core_dev *mdev = priv->mdev;
 335         void *rqtc;
 336         u32 *in;
 337
 338         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
 339         in = kvzalloc(inlen, GFP_KERNEL);
 340         if (!in)
 341                 return -ENOMEM;
 342
 343         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
 344
 345         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
 346         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
 347
 348         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
 349
 350         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
 351         if (!err)
 352                 hp->indir_rqt.enabled = true;
 353
 354         kvfree(in);
 355         return err;
 356 }
 357
 358 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 359 {
 360         struct mlx5e_priv *priv = hp->func_priv;
 361         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
 362         int tt, i, err;
 363         void *tirc;
 364
 365         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 366                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
 367                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 368
 369                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 370                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
 371                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
 372                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
 373
 374                 err = mlx5_core_create_tir(hp->func_mdev, in,
 375                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
 376                 if (err) {
 377                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 378                         goto err_destroy_tirs;
 379                 }
 380         }
 381         return 0;
 382
 383 err_destroy_tirs:
 384         for (i = 0; i < tt; i++)
 385                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
 386         return err;
 387 }
 388
 389 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 390 {
 391         int tt;
 392
 393         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 394                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
 395 }
 396
 397 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 398                                          struct ttc_params *ttc_params)
 399 {
 400         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 401         int tt;
 402
 403         memset(ttc_params, 0, sizeof(*ttc_params));
 404
 405         ttc_params->any_tt_tirn = hp->tirn;
 406
 407         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 408                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
 409
 410         ft_attr->max_fte = MLX5E_NUM_TT;
 411         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 412         ft_attr->prio = MLX5E_TC_PRIO;
 413 }
 414
 415 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 416 {
 417         struct mlx5e_priv *priv = hp->func_priv;
 418         struct ttc_params ttc_params;
 419         int err;
 420
 421         err = mlx5e_hairpin_create_indirect_rqt(hp);
 422         if (err)
 423                 return err;
 424
 425         err = mlx5e_hairpin_create_indirect_tirs(hp);
 426         if (err)
 427                 goto err_create_indirect_tirs;
 428
 429         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 430         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
 431         if (err)
 432                 goto err_create_ttc_table;
 433
 434         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 435                    hp->num_channels, hp->ttc.ft.t->id);
 436
 437         return 0;
 438
 439 err_create_ttc_table:
 440         mlx5e_hairpin_destroy_indirect_tirs(hp);
 441 err_create_indirect_tirs:
 442         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 443
 444         return err;
 445 }
 446
 447 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 448 {
 449         struct mlx5e_priv *priv = hp->func_priv;
 450
 451         mlx5e_destroy_ttc_table(priv, &hp->ttc);
 452         mlx5e_hairpin_destroy_indirect_tirs(hp);
 453         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 454 }
 455
 456 static struct mlx5e_hairpin *
 457 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 458                      int peer_ifindex)
 459 {
 460         struct mlx5_core_dev *func_mdev, *peer_mdev;
 461         struct mlx5e_hairpin *hp;
 462         struct mlx5_hairpin *pair;
 463         int err;
 464
 465         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 466         if (!hp)
 467                 return ERR_PTR(-ENOMEM);
 468
 469         func_mdev = priv->mdev;
 470         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 471
 472         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 473         if (IS_ERR(pair)) {
 474                 err = PTR_ERR(pair);
 475                 goto create_pair_err;
 476         }
 477         hp->pair = pair;
 478         hp->func_mdev = func_mdev;
 479         hp->func_priv = priv;
 480         hp->num_channels = params->num_channels;
 481
 482         err = mlx5e_hairpin_create_transport(hp);
 483         if (err)
 484                 goto create_transport_err;
 485
 486         if (hp->num_channels > 1) {
 487                 err = mlx5e_hairpin_rss_init(hp);
 488                 if (err)
 489                         goto rss_init_err;
 490         }
 491
 492         return hp;
 493
 494 rss_init_err:
 495         mlx5e_hairpin_destroy_transport(hp);
 496 create_transport_err:
 497         mlx5_core_hairpin_destroy(hp->pair);
 498 create_pair_err:
 499         kfree(hp);
 500         return ERR_PTR(err);
 501 }
 502
 503 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 504 {
 505         if (hp->num_channels > 1)
 506                 mlx5e_hairpin_rss_cleanup(hp);
 507         mlx5e_hairpin_destroy_transport(hp);
 508         mlx5_core_hairpin_destroy(hp->pair);
 509         kvfree(hp);
 510 }
 511
 512 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 513 {
 514         return (peer_vhca_id << 16 | prio);
 515 }
 516
 517 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 518                                                      u16 peer_vhca_id, u8 prio)
 519 {
 520         struct mlx5e_hairpin_entry *hpe;
 521         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 522
 523         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
 524                                hairpin_hlist, hash_key) {
 525                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
 526                         return hpe;
 527         }
 528
 529         return NULL;
 530 }
 531
 532 #define UNKNOWN_MATCH_PRIO 8
 533
 534 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 535                                   struct mlx5_flow_spec *spec, u8 *match_prio)
 536 {
 537         void *headers_c, *headers_v;
 538         u8 prio_val, prio_mask = 0;
 539         bool vlan_present;
 540
 541 #ifdef CONFIG_MLX5_CORE_EN_DCB
 542         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
 543                 netdev_warn(priv->netdev,
 544                             "only PCP trust state supported for hairpin\n");
 545                 return -EOPNOTSUPP;
 546         }
 547 #endif
 548         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
 549         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
 550
 551         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
 552         if (vlan_present) {
 553                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
 554                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
 555         }
 556
 557         if (!vlan_present || !prio_mask) {
 558                 prio_val = UNKNOWN_MATCH_PRIO;
 559         } else if (prio_mask != 0x7) {
 560                 netdev_warn(priv->netdev,
 561                             "masked priority match not supported for hairpin\n");
 562                 return -EOPNOTSUPP;
 563         }
 564
 565         *match_prio = prio_val;
 566         return 0;
 567 }
 568
 569 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
 570                                   struct mlx5e_tc_flow *flow,
 571                                   struct mlx5e_tc_flow_parse_attr *parse_attr)
 572 {
 573         int peer_ifindex = parse_attr->mirred_ifindex;
 574         struct mlx5_hairpin_params params;
 575         struct mlx5_core_dev *peer_mdev;
 576         struct mlx5e_hairpin_entry *hpe;
 577         struct mlx5e_hairpin *hp;
 578         u64 link_speed64;
 579         u32 link_speed;
 580         u8 match_prio;
 581         u16 peer_id;
 582         int err;
 583
 584         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 585         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
 586                 netdev_warn(priv->netdev, "hairpin is not supported\n");
 587                 return -EOPNOTSUPP;
 588         }
 589
 590         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
 591         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio);
 592         if (err)
 593                 return err;
 594         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
 595         if (hpe)
 596                 goto attach_flow;
 597
 598         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
 599         if (!hpe)
 600                 return -ENOMEM;
 601
 602         INIT_LIST_HEAD(&hpe->flows);
 603         hpe->peer_vhca_id = peer_id;
 604         hpe->prio = match_prio;
 605
 606         params.log_data_size = 15;
 607         params.log_data_size = min_t(u8, params.log_data_size,
 608                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
 609         params.log_data_size = max_t(u8, params.log_data_size,
 610                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
 611
 612         params.log_num_packets = params.log_data_size -
 613                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
 614         params.log_num_packets = min_t(u8, params.log_num_packets,
 615                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
 616
 617         params.q_counter = priv->q_counter;
 618         /* set hairpin pair per each 50Gbs share of the link */
 619         mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
 620         link_speed = max_t(u32, link_speed, 50000);
 621         link_speed64 = link_speed;
 622         do_div(link_speed64, 50000);
 623         params.num_channels = link_speed64;
 624
 625         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
 626         if (IS_ERR(hp)) {
 627                 err = PTR_ERR(hp);
 628                 goto create_hairpin_err;
 629         }
 630
 631         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
 632                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
 633                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
 634
 635         hpe->hp = hp;
 636         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
 637                  hash_hairpin_info(peer_id, match_prio));
 638
 639 attach_flow:
 640         if (hpe->hp->num_channels > 1) {
 641                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
 642                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
 643         } else {
 644                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
 645         }
 646         list_add(&flow->hairpin, &hpe->flows);
 647
 648         return 0;
 649
 650 create_hairpin_err:
 651         kfree(hpe);
 652         return err;
 653 }
 654
 655 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
 656                                    struct mlx5e_tc_flow *flow)
 657 {
 658         struct list_head *next = flow->hairpin.next;
 659
 660         list_del(&flow->hairpin);
 661
 662         /* no more hairpin flows for us, release the hairpin pair */
 663         if (list_empty(next)) {
 664                 struct mlx5e_hairpin_entry *hpe;
 665
 666                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
 667
 668                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 669                            hpe->hp->pair->peer_mdev->priv.name);
 670
 671                 mlx5e_hairpin_destroy(hpe->hp);
 672                 hash_del(&hpe->hairpin_hlist);
 673                 kfree(hpe);
 674         }
 675 }
 676
 677 static struct mlx5_flow_handle *
 678 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
 679                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 680                       struct mlx5e_tc_flow *flow)
 681 {
 682         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 683         struct mlx5_core_dev *dev = priv->mdev;
 684         struct mlx5_flow_destination dest[2] = {};
 685         struct mlx5_flow_act flow_act = {
 686                 .action = attr->action,
 687                 .has_flow_tag = true,
 688                 .flow_tag = attr->flow_tag,
 689                 .encap_id = 0,
 690         };
 691         struct mlx5_fc *counter = NULL;
 692         struct mlx5_flow_handle *rule;
 693         bool table_created = false;
 694         int err, dest_ix = 0;
 695
 696         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
 697                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr);
 698                 if (err) {
 699                         rule = ERR_PTR(err);
 700                         goto err_add_hairpin_flow;
 701                 }
 702                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
 703                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 704                         dest[dest_ix].ft = attr->hairpin_ft;
 705                 } else {
 706                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 707                         dest[dest_ix].tir_num = attr->hairpin_tirn;
 708                 }
 709                 dest_ix++;
 710         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
 711                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 712                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
 713                 dest_ix++;
 714         }
 715
 716         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 717                 counter = mlx5_fc_create(dev, true);
 718                 if (IS_ERR(counter)) {
 719                         rule = ERR_CAST(counter);
 720                         goto err_fc_create;
 721                 }
 722                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
 723                 dest[dest_ix].counter = counter;
 724                 dest_ix++;
 725         }
 726
 727         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 728                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 729                 flow_act.modify_id = attr->mod_hdr_id;
 730                 kfree(parse_attr->mod_hdr_actions);
 731                 if (err) {
 732                         rule = ERR_PTR(err);
 733                         goto err_create_mod_hdr_id;
 734                 }
 735         }
 736
 737         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
 738                 int tc_grp_size, tc_tbl_size;
 739                 u32 max_flow_counter;
 740
 741                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
 742                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
 743
 744                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
 745
 746                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
 747                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
 748
 749                 priv->fs.tc.t =
 750                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
 751                                                             MLX5E_TC_PRIO,
 752                                                             tc_tbl_size,
 753                                                             MLX5E_TC_TABLE_NUM_GROUPS,
 754                                                             MLX5E_TC_FT_LEVEL, 0);
 755                 if (IS_ERR(priv->fs.tc.t)) {
 756                         netdev_err(priv->netdev,
 757                                    "Failed to create tc offload table\n");
 758                         rule = ERR_CAST(priv->fs.tc.t);
 759                         goto err_create_ft;
 760                 }
 761
 762                 table_created = true;
 763         }
 764
 765         if (attr->match_level != MLX5_MATCH_NONE)
 766                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
 767
 768         rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
 769                                    &flow_act, dest, dest_ix);
 770
 771         if (IS_ERR(rule))
 772                 goto err_add_rule;
 773
 774         return rule;
 775
 776 err_add_rule:
 777         if (table_created) {
 778                 mlx5_destroy_flow_table(priv->fs.tc.t);
 779                 priv->fs.tc.t = NULL;
 780         }
 781 err_create_ft:
 782         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 783                 mlx5e_detach_mod_hdr(priv, flow);
 784 err_create_mod_hdr_id:
 785         mlx5_fc_destroy(dev, counter);
 786 err_fc_create:
 787         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 788                 mlx5e_hairpin_flow_del(priv, flow);
 789 err_add_hairpin_flow:
 790         return rule;
 791 }
 792
 793 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
 794                                   struct mlx5e_tc_flow *flow)
 795 {
 796         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 797         struct mlx5_fc *counter = NULL;
 798
 799         counter = mlx5_flow_rule_counter(flow->rule[0]);
 800         mlx5_del_flow_rules(flow->rule[0]);
 801         mlx5_fc_destroy(priv->mdev, counter);
 802
 803         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
 804                 mlx5_destroy_flow_table(priv->fs.tc.t);
 805                 priv->fs.tc.t = NULL;
 806         }
 807
 808         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 809                 mlx5e_detach_mod_hdr(priv, flow);
 810
 811         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 812                 mlx5e_hairpin_flow_del(priv, flow);
 813 }
 814
 815 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
 816                                struct mlx5e_tc_flow *flow);
 817
 818 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
 819                               struct ip_tunnel_info *tun_info,
 820                               struct net_device *mirred_dev,
 821                               struct net_device **encap_dev,
 822                               struct mlx5e_tc_flow *flow);
 823
 824 static struct mlx5_flow_handle *
 825 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
 826                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 827                       struct mlx5e_tc_flow *flow)
 828 {
 829         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 830         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 831         struct net_device *out_dev, *encap_dev = NULL;
 832         struct mlx5_flow_handle *rule = NULL;
 833         struct mlx5e_rep_priv *rpriv;
 834         struct mlx5e_priv *out_priv;
 835         int err;
 836
 837         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
 838                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
 839                                              attr->parse_attr->mirred_ifindex);
 840                 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
 841                                          out_dev, &encap_dev, flow);
 842                 if (err) {
 843                         rule = ERR_PTR(err);
 844                         if (err != -EAGAIN)
 845                                 goto err_attach_encap;
 846                 }
 847                 out_priv = netdev_priv(encap_dev);
 848                 rpriv = out_priv->ppriv;
 849                 attr->out_rep[attr->out_count] = rpriv->rep;
 850                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
 851         }
 852
 853         err = mlx5_eswitch_add_vlan_action(esw, attr);
 854         if (err) {
 855                 rule = ERR_PTR(err);
 856                 goto err_add_vlan;
 857         }
 858
 859         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 860                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 861                 kfree(parse_attr->mod_hdr_actions);
 862                 if (err) {
 863                         rule = ERR_PTR(err);
 864                         goto err_mod_hdr;
 865                 }
 866         }
 867
 868         /* we get here if (1) there's no error (rule being null) or when
 869          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
 870          */
 871         if (rule != ERR_PTR(-EAGAIN)) {
 872                 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
 873                 if (IS_ERR(rule))
 874                         goto err_add_rule;
 875
 876                 if (attr->mirror_count) {
 877                         flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, &parse_attr->spec, attr);
 878                         if (IS_ERR(flow->rule[1]))
 879                                 goto err_fwd_rule;
 880                 }
 881         }
 882         return rule;
 883
 884 err_fwd_rule:
 885         mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
 886         rule = flow->rule[1];
 887 err_add_rule:
 888         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 889                 mlx5e_detach_mod_hdr(priv, flow);
 890 err_mod_hdr:
 891         mlx5_eswitch_del_vlan_action(esw, attr);
 892 err_add_vlan:
 893         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
 894                 mlx5e_detach_encap(priv, flow);
 895 err_attach_encap:
 896         return rule;
 897 }
 898
 899 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
 900                                   struct mlx5e_tc_flow *flow)
 901 {
 902         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 903         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 904
 905         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 906                 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 907                 if (attr->mirror_count)
 908                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[1], attr);
 909                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
 910         }
 911
 912         mlx5_eswitch_del_vlan_action(esw, attr);
 913
 914         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
 915                 mlx5e_detach_encap(priv, flow);
 916                 kvfree(attr->parse_attr);
 917         }
 918
 919         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 920                 mlx5e_detach_mod_hdr(priv, flow);
 921 }
 922
 923 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
 924                               struct mlx5e_encap_entry *e)
 925 {
 926         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 927         struct mlx5_esw_flow_attr *esw_attr;
 928         struct mlx5e_tc_flow *flow;
 929         int err;
 930
 931         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
 932                                e->encap_size, e->encap_header,
 933                                &e->encap_id);
 934         if (err) {
 935                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
 936                                err);
 937                 return;
 938         }
 939         e->flags |= MLX5_ENCAP_ENTRY_VALID;
 940         mlx5e_rep_queue_neigh_stats_work(priv);
 941
 942         list_for_each_entry(flow, &e->flows, encap) {
 943                 esw_attr = flow->esw_attr;
 944                 esw_attr->encap_id = e->encap_id;
 945                 flow->rule[0] = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
 946                 if (IS_ERR(flow->rule[0])) {
 947                         err = PTR_ERR(flow->rule[0]);
 948                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
 949                                        err);
 950                         continue;
 951                 }
 952
 953                 if (esw_attr->mirror_count) {
 954                         flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
 955                         if (IS_ERR(flow->rule[1])) {
 956                                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], esw_attr);
 957                                 err = PTR_ERR(flow->rule[1]);
 958                                 mlx5_core_warn(priv->mdev, "Failed to update cached mirror flow, %d\n",
 959                                                err);
 960                                 continue;
 961                         }
 962                 }
 963
 964                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
 965         }
 966 }
 967
 968 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
 969                               struct mlx5e_encap_entry *e)
 970 {
 971         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 972         struct mlx5e_tc_flow *flow;
 973
 974         list_for_each_entry(flow, &e->flows, encap) {
 975                 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 976                         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 977
 978                         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 979                         if (attr->mirror_count)
 980                                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[1], attr);
 981                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
 982                 }
 983         }
 984
 985         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
 986                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
 987                 mlx5_encap_dealloc(priv->mdev, e->encap_id);
 988         }
 989 }
 990
 991 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
 992 {
 993         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
 994         u64 bytes, packets, lastuse = 0;
 995         struct mlx5e_tc_flow *flow;
 996         struct mlx5e_encap_entry *e;
 997         struct mlx5_fc *counter;
 998         struct neigh_table *tbl;
 999         bool neigh_used = false;
1000         struct neighbour *n;
1001
1002         if (m_neigh->family == AF_INET)
1003                 tbl = &arp_tbl;
1004 #if IS_ENABLED(CONFIG_IPV6)
1005         else if (m_neigh->family == AF_INET6)
1006                 tbl = &nd_tbl;
1007 #endif
1008         else
1009                 return;
1010
1011         list_for_each_entry(e, &nhe->encap_list, encap_list) {
1012                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
1013                         continue;
1014                 list_for_each_entry(flow, &e->flows, encap) {
1015                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1016                                 counter = mlx5_flow_rule_counter(flow->rule[0]);
1017                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1018                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
1019                                         neigh_used = true;
1020                                         break;
1021                                 }
1022                         }
1023                 }
1024                 if (neigh_used)
1025                         break;
1026         }
1027
1028         if (neigh_used) {
1029                 nhe->reported_lastuse = jiffies;
1030
1031                 /* find the relevant neigh according to the cached device and
1032                  * dst ip pair
1033                  */
1034                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1035                 if (!n)
1036                         return;
1037
1038                 neigh_event_send(n, NULL);
1039                 neigh_release(n);
1040         }
1041 }
1042
1043 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1044                                struct mlx5e_tc_flow *flow)
1045 {
1046         struct list_head *next = flow->encap.next;
1047
1048         list_del(&flow->encap);
1049         if (list_empty(next)) {
1050                 struct mlx5e_encap_entry *e;
1051
1052                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1053                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1054
1055                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1056                         mlx5_encap_dealloc(priv->mdev, e->encap_id);
1057
1058                 hash_del_rcu(&e->encap_hlist);
1059                 kfree(e->encap_header);
1060                 kfree(e);
1061         }
1062 }
1063
1064 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1065                               struct mlx5e_tc_flow *flow)
1066 {
1067         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1068                 mlx5e_tc_del_fdb_flow(priv, flow);
1069         else
1070                 mlx5e_tc_del_nic_flow(priv, flow);
1071 }
1072
1073 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1074                              struct tc_cls_flower_offload *f)
1075 {
1076         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1077                                        outer_headers);
1078         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1079                                        outer_headers);
1080         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1081                                     misc_parameters);
1082         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1083                                     misc_parameters);
1084
1085         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1086         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1087
1088         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1089                 struct flow_dissector_key_keyid *key =
1090                         skb_flow_dissector_target(f->dissector,
1091                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1092                                                   f->key);
1093                 struct flow_dissector_key_keyid *mask =
1094                         skb_flow_dissector_target(f->dissector,
1095                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1096                                                   f->mask);
1097                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1098                          be32_to_cpu(mask->keyid));
1099                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1100                          be32_to_cpu(key->keyid));
1101         }
1102 }
1103
1104 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1105                              struct mlx5_flow_spec *spec,
1106                              struct tc_cls_flower_offload *f)
1107 {
1108         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1109                                        outer_headers);
1110         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1111                                        outer_headers);
1112
1113         struct flow_dissector_key_control *enc_control =
1114                 skb_flow_dissector_target(f->dissector,
1115                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1116                                           f->key);
1117
1118         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1119                 struct flow_dissector_key_ports *key =
1120                         skb_flow_dissector_target(f->dissector,
1121                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1122                                                   f->key);
1123                 struct flow_dissector_key_ports *mask =
1124                         skb_flow_dissector_target(f->dissector,
1125                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1126                                                   f->mask);
1127
1128                 /* Full udp dst port must be given */
1129                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1130                         goto vxlan_match_offload_err;
1131
1132                 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->dst)) &&
1133                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1134                         parse_vxlan_attr(spec, f);
1135                 else {
1136                         netdev_warn(priv->netdev,
1137                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1138                         return -EOPNOTSUPP;
1139                 }
1140
1141                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1142                          udp_dport, ntohs(mask->dst));
1143                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1144                          udp_dport, ntohs(key->dst));
1145
1146                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1147                          udp_sport, ntohs(mask->src));
1148                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1149                          udp_sport, ntohs(key->src));
1150         } else { /* udp dst port must be given */
1151 vxlan_match_offload_err:
1152                 netdev_warn(priv->netdev,
1153                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1154                 return -EOPNOTSUPP;
1155         }
1156
1157         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1158                 struct flow_dissector_key_ipv4_addrs *key =
1159                         skb_flow_dissector_target(f->dissector,
1160                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1161                                                   f->key);
1162                 struct flow_dissector_key_ipv4_addrs *mask =
1163                         skb_flow_dissector_target(f->dissector,
1164                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1165                                                   f->mask);
1166                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1167                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1168                          ntohl(mask->src));
1169                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1170                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1171                          ntohl(key->src));
1172
1173                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1174                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1175                          ntohl(mask->dst));
1176                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1177                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1178                          ntohl(key->dst));
1179
1180                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1181                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1182         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1183                 struct flow_dissector_key_ipv6_addrs *key =
1184                         skb_flow_dissector_target(f->dissector,
1185                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1186                                                   f->key);
1187                 struct flow_dissector_key_ipv6_addrs *mask =
1188                         skb_flow_dissector_target(f->dissector,
1189                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1190                                                   f->mask);
1191
1192                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1193                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1194                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1195                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1196                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1197                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1198
1199                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1200                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1201                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1202                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1203                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1204                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1205
1206                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1207                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1208         }
1209
1210         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_IP)) {
1211                 struct flow_dissector_key_ip *key =
1212                         skb_flow_dissector_target(f->dissector,
1213                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1214                                                   f->key);
1215                 struct flow_dissector_key_ip *mask =
1216                         skb_flow_dissector_target(f->dissector,
1217                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1218                                                   f->mask);
1219
1220                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1221                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1222
1223                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1224                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1225
1226                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1227                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1228         }
1229
1230         /* Enforce DMAC when offloading incoming tunneled flows.
1231          * Flow counters require a match on the DMAC.
1232          */
1233         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1234         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1235         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1236                                      dmac_47_16), priv->netdev->dev_addr);
1237
1238         /* let software handle IP fragments */
1239         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1240         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1241
1242         return 0;
1243 }
1244
1245 static int __parse_cls_flower(struct mlx5e_priv *priv,
1246                               struct mlx5_flow_spec *spec,
1247                               struct tc_cls_flower_offload *f,
1248                               u8 *match_level)
1249 {
1250         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1251                                        outer_headers);
1252         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1253                                        outer_headers);
1254         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1255                                     misc_parameters);
1256         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1257                                     misc_parameters);
1258         u16 addr_type = 0;
1259         u8 ip_proto = 0;
1260
1261         *match_level = MLX5_MATCH_NONE;
1262
1263         if (f->dissector->used_keys &
1264             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1265               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1266               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1267               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1268               BIT(FLOW_DISSECTOR_KEY_CVLAN) |
1269               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1270               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1271               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1272               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1273               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1274               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1275               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1276               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1277               BIT(FLOW_DISSECTOR_KEY_TCP) |
1278               BIT(FLOW_DISSECTOR_KEY_IP)  |
1279               BIT(FLOW_DISSECTOR_KEY_ENC_IP))) {
1280                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1281                             f->dissector->used_keys);
1282                 return -EOPNOTSUPP;
1283         }
1284
1285         if ((dissector_uses_key(f->dissector,
1286                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1287              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1288              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1289             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1290                 struct flow_dissector_key_control *key =
1291                         skb_flow_dissector_target(f->dissector,
1292                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1293                                                   f->key);
1294                 switch (key->addr_type) {
1295                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1296                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1297                         if (parse_tunnel_attr(priv, spec, f))
1298                                 return -EOPNOTSUPP;
1299                         break;
1300                 default:
1301                         return -EOPNOTSUPP;
1302                 }
1303
1304                 /* In decap flow, header pointers should point to the inner
1305                  * headers, outer header were already set by parse_tunnel_attr
1306                  */
1307                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1308                                          inner_headers);
1309                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1310                                          inner_headers);
1311         }
1312
1313         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1314                 struct flow_dissector_key_eth_addrs *key =
1315                         skb_flow_dissector_target(f->dissector,
1316                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1317                                                   f->key);
1318                 struct flow_dissector_key_eth_addrs *mask =
1319                         skb_flow_dissector_target(f->dissector,
1320                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1321                                                   f->mask);
1322
1323                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1324                                              dmac_47_16),
1325                                 mask->dst);
1326                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1327                                              dmac_47_16),
1328                                 key->dst);
1329
1330                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1331                                              smac_47_16),
1332                                 mask->src);
1333                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1334                                              smac_47_16),
1335                                 key->src);
1336
1337                 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1338                         *match_level = MLX5_MATCH_L2;
1339         }
1340
1341         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1342                 struct flow_dissector_key_vlan *key =
1343                         skb_flow_dissector_target(f->dissector,
1344                                                   FLOW_DISSECTOR_KEY_VLAN,
1345                                                   f->key);
1346                 struct flow_dissector_key_vlan *mask =
1347                         skb_flow_dissector_target(f->dissector,
1348                                                   FLOW_DISSECTOR_KEY_VLAN,
1349                                                   f->mask);
1350                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1351                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1352                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1353                                          svlan_tag, 1);
1354                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1355                                          svlan_tag, 1);
1356                         } else {
1357                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1358                                          cvlan_tag, 1);
1359                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1360                                          cvlan_tag, 1);
1361                         }
1362
1363                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1364                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1365
1366                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1367                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1368
1369                         *match_level = MLX5_MATCH_L2;
1370                 }
1371         } else {
1372                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, svlan_tag, 1);
1373                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1374         }
1375
1376         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CVLAN)) {
1377                 struct flow_dissector_key_vlan *key =
1378                         skb_flow_dissector_target(f->dissector,
1379                                                   FLOW_DISSECTOR_KEY_CVLAN,
1380                                                   f->key);
1381                 struct flow_dissector_key_vlan *mask =
1382                         skb_flow_dissector_target(f->dissector,
1383                                                   FLOW_DISSECTOR_KEY_CVLAN,
1384                                                   f->mask);
1385                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1386                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1387                                 MLX5_SET(fte_match_set_misc, misc_c,
1388                                          outer_second_svlan_tag, 1);
1389                                 MLX5_SET(fte_match_set_misc, misc_v,
1390                                          outer_second_svlan_tag, 1);
1391                         } else {
1392                                 MLX5_SET(fte_match_set_misc, misc_c,
1393                                          outer_second_cvlan_tag, 1);
1394                                 MLX5_SET(fte_match_set_misc, misc_v,
1395                                          outer_second_cvlan_tag, 1);
1396                         }
1397
1398                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
1399                                  mask->vlan_id);
1400                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
1401                                  key->vlan_id);
1402                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
1403                                  mask->vlan_priority);
1404                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
1405                                  key->vlan_priority);
1406
1407                         *match_level = MLX5_MATCH_L2;
1408                 }
1409         }
1410
1411         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1412                 struct flow_dissector_key_basic *key =
1413                         skb_flow_dissector_target(f->dissector,
1414                                                   FLOW_DISSECTOR_KEY_BASIC,
1415                                                   f->key);
1416                 struct flow_dissector_key_basic *mask =
1417                         skb_flow_dissector_target(f->dissector,
1418                                                   FLOW_DISSECTOR_KEY_BASIC,
1419                                                   f->mask);
1420                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1421                          ntohs(mask->n_proto));
1422                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1423                          ntohs(key->n_proto));
1424
1425                 if (mask->n_proto)
1426                         *match_level = MLX5_MATCH_L2;
1427         }
1428
1429         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1430                 struct flow_dissector_key_control *key =
1431                         skb_flow_dissector_target(f->dissector,
1432                                                   FLOW_DISSECTOR_KEY_CONTROL,
1433                                                   f->key);
1434
1435                 struct flow_dissector_key_control *mask =
1436                         skb_flow_dissector_target(f->dissector,
1437                                                   FLOW_DISSECTOR_KEY_CONTROL,
1438                                                   f->mask);
1439                 addr_type = key->addr_type;
1440
1441                 /* the HW doesn't support frag first/later */
1442                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1443                         return -EOPNOTSUPP;
1444
1445                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1446                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1447                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1448                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1449
1450                         /* the HW doesn't need L3 inline to match on frag=no */
1451                         if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1452                                 *match_level = MLX5_INLINE_MODE_L2;
1453         /* ***  L2 attributes parsing up to here *** */
1454                         else
1455                                 *match_level = MLX5_INLINE_MODE_IP;
1456                 }
1457         }
1458
1459         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1460                 struct flow_dissector_key_basic *key =
1461                         skb_flow_dissector_target(f->dissector,
1462                                                   FLOW_DISSECTOR_KEY_BASIC,
1463                                                   f->key);
1464                 struct flow_dissector_key_basic *mask =
1465                         skb_flow_dissector_target(f->dissector,
1466                                                   FLOW_DISSECTOR_KEY_BASIC,
1467                                                   f->mask);
1468                 ip_proto = key->ip_proto;
1469
1470                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1471                          mask->ip_proto);
1472                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1473                          key->ip_proto);
1474
1475                 if (mask->ip_proto)
1476                         *match_level = MLX5_MATCH_L3;
1477         }
1478
1479         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1480                 struct flow_dissector_key_ipv4_addrs *key =
1481                         skb_flow_dissector_target(f->dissector,
1482                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1483                                                   f->key);
1484                 struct flow_dissector_key_ipv4_addrs *mask =
1485                         skb_flow_dissector_target(f->dissector,
1486                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1487                                                   f->mask);
1488
1489                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1490                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1491                        &mask->src, sizeof(mask->src));
1492                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1493                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1494                        &key->src, sizeof(key->src));
1495                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1496                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1497                        &mask->dst, sizeof(mask->dst));
1498                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1499                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1500                        &key->dst, sizeof(key->dst));
1501
1502                 if (mask->src || mask->dst)
1503                         *match_level = MLX5_MATCH_L3;
1504         }
1505
1506         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1507                 struct flow_dissector_key_ipv6_addrs *key =
1508                         skb_flow_dissector_target(f->dissector,
1509                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1510                                                   f->key);
1511                 struct flow_dissector_key_ipv6_addrs *mask =
1512                         skb_flow_dissector_target(f->dissector,
1513                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1514                                                   f->mask);
1515
1516                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1517                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1518                        &mask->src, sizeof(mask->src));
1519                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1520                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1521                        &key->src, sizeof(key->src));
1522
1523                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1524                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1525                        &mask->dst, sizeof(mask->dst));
1526                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1527                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1528                        &key->dst, sizeof(key->dst));
1529
1530                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1531                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1532                         *match_level = MLX5_MATCH_L3;
1533         }
1534
1535         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1536                 struct flow_dissector_key_ip *key =
1537                         skb_flow_dissector_target(f->dissector,
1538                                                   FLOW_DISSECTOR_KEY_IP,
1539                                                   f->key);
1540                 struct flow_dissector_key_ip *mask =
1541                         skb_flow_dissector_target(f->dissector,
1542                                                   FLOW_DISSECTOR_KEY_IP,
1543                                                   f->mask);
1544
1545                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1546                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1547
1548                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1549                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1550
1551                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1552                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1553
1554                 if (mask->ttl &&
1555                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1556                                                 ft_field_support.outer_ipv4_ttl))
1557                         return -EOPNOTSUPP;
1558
1559                 if (mask->tos || mask->ttl)
1560                         *match_level = MLX5_MATCH_L3;
1561         }
1562
1563         /* ***  L3 attributes parsing up to here *** */
1564
1565         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1566                 struct flow_dissector_key_ports *key =
1567                         skb_flow_dissector_target(f->dissector,
1568                                                   FLOW_DISSECTOR_KEY_PORTS,
1569                                                   f->key);
1570                 struct flow_dissector_key_ports *mask =
1571                         skb_flow_dissector_target(f->dissector,
1572                                                   FLOW_DISSECTOR_KEY_PORTS,
1573                                                   f->mask);
1574                 switch (ip_proto) {
1575                 case IPPROTO_TCP:
1576                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1577                                  tcp_sport, ntohs(mask->src));
1578                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1579                                  tcp_sport, ntohs(key->src));
1580
1581                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1582                                  tcp_dport, ntohs(mask->dst));
1583                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1584                                  tcp_dport, ntohs(key->dst));
1585                         break;
1586
1587                 case IPPROTO_UDP:
1588                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1589                                  udp_sport, ntohs(mask->src));
1590                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1591                                  udp_sport, ntohs(key->src));
1592
1593                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1594                                  udp_dport, ntohs(mask->dst));
1595                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1596                                  udp_dport, ntohs(key->dst));
1597                         break;
1598                 default:
1599                         netdev_err(priv->netdev,
1600                                    "Only UDP and TCP transport are supported\n");
1601                         return -EINVAL;
1602                 }
1603
1604                 if (mask->src || mask->dst)
1605                         *match_level = MLX5_MATCH_L4;
1606         }
1607
1608         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1609                 struct flow_dissector_key_tcp *key =
1610                         skb_flow_dissector_target(f->dissector,
1611                                                   FLOW_DISSECTOR_KEY_TCP,
1612                                                   f->key);
1613                 struct flow_dissector_key_tcp *mask =
1614                         skb_flow_dissector_target(f->dissector,
1615                                                   FLOW_DISSECTOR_KEY_TCP,
1616                                                   f->mask);
1617
1618                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1619                          ntohs(mask->flags));
1620                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1621                          ntohs(key->flags));
1622
1623                 if (mask->flags)
1624                         *match_level = MLX5_MATCH_L4;
1625         }
1626
1627         return 0;
1628 }
1629
1630 static int parse_cls_flower(struct mlx5e_priv *priv,
1631                             struct mlx5e_tc_flow *flow,
1632                             struct mlx5_flow_spec *spec,
1633                             struct tc_cls_flower_offload *f)
1634 {
1635         struct mlx5_core_dev *dev = priv->mdev;
1636         struct mlx5_eswitch *esw = dev->priv.eswitch;
1637         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1638         struct mlx5_eswitch_rep *rep;
1639         u8 match_level;
1640         int err;
1641
1642         err = __parse_cls_flower(priv, spec, f, &match_level);
1643
1644         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1645                 rep = rpriv->rep;
1646                 if (rep->vport != FDB_UPLINK_VPORT &&
1647                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1648                     esw->offloads.inline_mode < match_level)) {
1649                         netdev_warn(priv->netdev,
1650                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1651                                     match_level, esw->offloads.inline_mode);
1652                         return -EOPNOTSUPP;
1653                 }
1654         }
1655
1656         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1657                 flow->esw_attr->match_level = match_level;
1658         else
1659                 flow->nic_attr->match_level = match_level;
1660
1661         return err;
1662 }
1663
1664 struct pedit_headers {
1665         struct ethhdr  eth;
1666         struct iphdr   ip4;
1667         struct ipv6hdr ip6;
1668         struct tcphdr  tcp;
1669         struct udphdr  udp;
1670 };
1671
1672 static int pedit_header_offsets[] = {
1673         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1674         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1675         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1676         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1677         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1678 };
1679
1680 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1681
1682 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1683                          struct pedit_headers *masks,
1684                          struct pedit_headers *vals)
1685 {
1686         u32 *curr_pmask, *curr_pval;
1687
1688         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1689                 goto out_err;
1690
1691         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1692         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1693
1694         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1695                 goto out_err;
1696
1697         *curr_pmask |= mask;
1698         *curr_pval  |= (val & mask);
1699
1700         return 0;
1701
1702 out_err:
1703         return -EOPNOTSUPP;
1704 }
1705
1706 struct mlx5_fields {
1707         u8  field;
1708         u8  size;
1709         u32 offset;
1710 };
1711
1712 #define OFFLOAD(fw_field, size, field, off) \
1713                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1714
1715 static struct mlx5_fields fields[] = {
1716         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1717         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1718         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1719         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1720         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1721
1722         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1723         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1724         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1725
1726         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1727         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1728         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1729         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1730         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1731         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1732         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1733         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1734         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1735
1736         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1737         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1738         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1739
1740         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1741         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1742 };
1743
1744 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1745  * max from the SW pedit action. On success, it says how many HW actions were
1746  * actually parsed.
1747  */
1748 static int offload_pedit_fields(struct pedit_headers *masks,
1749                                 struct pedit_headers *vals,
1750                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
1751 {
1752         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1753         int i, action_size, nactions, max_actions, first, last, next_z;
1754         void *s_masks_p, *a_masks_p, *vals_p;
1755         struct mlx5_fields *f;
1756         u8 cmd, field_bsize;
1757         u32 s_mask, a_mask;
1758         unsigned long mask;
1759         __be32 mask_be32;
1760         __be16 mask_be16;
1761         void *action;
1762
1763         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1764         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1765         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1766         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1767
1768         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1769         action = parse_attr->mod_hdr_actions;
1770         max_actions = parse_attr->num_mod_hdr_actions;
1771         nactions = 0;
1772
1773         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1774                 f = &fields[i];
1775                 /* avoid seeing bits set from previous iterations */
1776                 s_mask = 0;
1777                 a_mask = 0;
1778
1779                 s_masks_p = (void *)set_masks + f->offset;
1780                 a_masks_p = (void *)add_masks + f->offset;
1781
1782                 memcpy(&s_mask, s_masks_p, f->size);
1783                 memcpy(&a_mask, a_masks_p, f->size);
1784
1785                 if (!s_mask && !a_mask) /* nothing to offload here */
1786                         continue;
1787
1788                 if (s_mask && a_mask) {
1789                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1790                         return -EOPNOTSUPP;
1791                 }
1792
1793                 if (nactions == max_actions) {
1794                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1795                         return -EOPNOTSUPP;
1796                 }
1797
1798                 if (s_mask) {
1799                         cmd  = MLX5_ACTION_TYPE_SET;
1800                         mask = s_mask;
1801                         vals_p = (void *)set_vals + f->offset;
1802                         /* clear to denote we consumed this field */
1803                         memset(s_masks_p, 0, f->size);
1804                 } else {
1805                         cmd  = MLX5_ACTION_TYPE_ADD;
1806                         mask = a_mask;
1807                         vals_p = (void *)add_vals + f->offset;
1808                         /* clear to denote we consumed this field */
1809                         memset(a_masks_p, 0, f->size);
1810                 }
1811
1812                 field_bsize = f->size * BITS_PER_BYTE;
1813
1814                 if (field_bsize == 32) {
1815                         mask_be32 = *(__be32 *)&mask;
1816                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1817                 } else if (field_bsize == 16) {
1818                         mask_be16 = *(__be16 *)&mask;
1819                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1820                 }
1821
1822                 first = find_first_bit(&mask, field_bsize);
1823                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1824                 last  = find_last_bit(&mask, field_bsize);
1825                 if (first < next_z && next_z < last) {
1826                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1827                                mask);
1828                         return -EOPNOTSUPP;
1829                 }
1830
1831                 MLX5_SET(set_action_in, action, action_type, cmd);
1832                 MLX5_SET(set_action_in, action, field, f->field);
1833
1834                 if (cmd == MLX5_ACTION_TYPE_SET) {
1835                         MLX5_SET(set_action_in, action, offset, first);
1836                         /* length is num of bits to be written, zero means length of 32 */
1837                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1838                 }
1839
1840                 if (field_bsize == 32)
1841                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1842                 else if (field_bsize == 16)
1843                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1844                 else if (field_bsize == 8)
1845                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1846
1847                 action += action_size;
1848                 nactions++;
1849         }
1850
1851         parse_attr->num_mod_hdr_actions = nactions;
1852         return 0;
1853 }
1854
1855 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1856                                  const struct tc_action *a, int namespace,
1857                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1858 {
1859         int nkeys, action_size, max_actions;
1860
1861         nkeys = tcf_pedit_nkeys(a);
1862         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1863
1864         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1865                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1866         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1867                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1868
1869         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1870         max_actions = min(max_actions, nkeys * 16);
1871
1872         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1873         if (!parse_attr->mod_hdr_actions)
1874                 return -ENOMEM;
1875
1876         parse_attr->num_mod_hdr_actions = max_actions;
1877         return 0;
1878 }
1879
1880 static const struct pedit_headers zero_masks = {};
1881
1882 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1883                                  const struct tc_action *a, int namespace,
1884                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1885 {
1886         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1887         int nkeys, i, err = -EOPNOTSUPP;
1888         u32 mask, val, offset;
1889         u8 cmd, htype;
1890
1891         nkeys = tcf_pedit_nkeys(a);
1892
1893         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1894         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1895
1896         for (i = 0; i < nkeys; i++) {
1897                 htype = tcf_pedit_htype(a, i);
1898                 cmd = tcf_pedit_cmd(a, i);
1899                 err = -EOPNOTSUPP; /* can't be all optimistic */
1900
1901                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1902                         netdev_warn(priv->netdev, "legacy pedit isn't offloaded\n");
1903                         goto out_err;
1904                 }
1905
1906                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1907                         netdev_warn(priv->netdev, "pedit cmd %d isn't offloaded\n", cmd);
1908                         goto out_err;
1909                 }
1910
1911                 mask = tcf_pedit_mask(a, i);
1912                 val = tcf_pedit_val(a, i);
1913                 offset = tcf_pedit_offset(a, i);
1914
1915                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1916                 if (err)
1917                         goto out_err;
1918         }
1919
1920         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1921         if (err)
1922                 goto out_err;
1923
1924         err = offload_pedit_fields(masks, vals, parse_attr);
1925         if (err < 0)
1926                 goto out_dealloc_parsed_actions;
1927
1928         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1929                 cmd_masks = &masks[cmd];
1930                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1931                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
1932                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1933                                        16, 1, cmd_masks, sizeof(zero_masks), true);
1934                         err = -EOPNOTSUPP;
1935                         goto out_dealloc_parsed_actions;
1936                 }
1937         }
1938
1939         return 0;
1940
1941 out_dealloc_parsed_actions:
1942         kfree(parse_attr->mod_hdr_actions);
1943 out_err:
1944         return err;
1945 }
1946
1947 static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags)
1948 {
1949         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1950                          TCA_CSUM_UPDATE_FLAG_UDP;
1951
1952         /*  The HW recalcs checksums only if re-writing headers */
1953         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1954                 netdev_warn(priv->netdev,
1955                             "TC csum action is only offloaded with pedit\n");
1956                 return false;
1957         }
1958
1959         if (update_flags & ~prot_flags) {
1960                 netdev_warn(priv->netdev,
1961                             "can't offload TC csum action for some header/s - flags %#x\n",
1962                             update_flags);
1963                 return false;
1964         }
1965
1966         return true;
1967 }
1968
1969 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
1970                                           struct tcf_exts *exts)
1971 {
1972         const struct tc_action *a;
1973         bool modify_ip_header;
1974         LIST_HEAD(actions);
1975         u8 htype, ip_proto;
1976         void *headers_v;
1977         u16 ethertype;
1978         int nkeys, i;
1979
1980         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1981         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1982
1983         /* for non-IP we only re-write MACs, so we're okay */
1984         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
1985                 goto out_ok;
1986
1987         modify_ip_header = false;
1988         tcf_exts_for_each_action(i, a, exts) {
1989                 int k;
1990
1991                 if (!is_tcf_pedit(a))
1992                         continue;
1993
1994                 nkeys = tcf_pedit_nkeys(a);
1995                 for (k = 0; k < nkeys; k++) {
1996                         htype = tcf_pedit_htype(a, k);
1997                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
1998                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
1999                                 modify_ip_header = true;
2000                                 break;
2001                         }
2002                 }
2003         }
2004
2005         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
2006         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
2007             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
2008                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
2009                 return false;
2010         }
2011
2012 out_ok:
2013         return true;
2014 }
2015
2016 static bool actions_match_supported(struct mlx5e_priv *priv,
2017                                     struct tcf_exts *exts,
2018                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
2019                                     struct mlx5e_tc_flow *flow)
2020 {
2021         u32 actions;
2022
2023         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
2024                 actions = flow->esw_attr->action;
2025         else
2026                 actions = flow->nic_attr->action;
2027
2028         if (flow->flags & MLX5E_TC_FLOW_EGRESS &&
2029             !(actions & MLX5_FLOW_CONTEXT_ACTION_DECAP))
2030                 return false;
2031
2032         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
2033                 return modify_header_match_supported(&parse_attr->spec, exts);
2034
2035         return true;
2036 }
2037
2038 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
2039 {
2040         struct mlx5_core_dev *fmdev, *pmdev;
2041         u64 fsystem_guid, psystem_guid;
2042
2043         fmdev = priv->mdev;
2044         pmdev = peer_priv->mdev;
2045
2046         mlx5_query_nic_vport_system_image_guid(fmdev, &fsystem_guid);
2047         mlx5_query_nic_vport_system_image_guid(pmdev, &psystem_guid);
2048
2049         return (fsystem_guid == psystem_guid);
2050 }
2051
2052 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2053                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2054                                 struct mlx5e_tc_flow *flow)
2055 {
2056         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
2057         const struct tc_action *a;
2058         LIST_HEAD(actions);
2059         u32 action = 0;
2060         int err, i;
2061
2062         if (!tcf_exts_has_actions(exts))
2063                 return -EINVAL;
2064
2065         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
2066
2067         tcf_exts_for_each_action(i, a, exts) {
2068                 if (is_tcf_gact_shot(a)) {
2069                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
2070                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
2071                                                flow_table_properties_nic_receive.flow_counter))
2072                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
2073                         continue;
2074                 }
2075
2076                 if (is_tcf_pedit(a)) {
2077                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
2078                                                     parse_attr);
2079                         if (err)
2080                                 return err;
2081
2082                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
2083                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2084                         continue;
2085                 }
2086
2087                 if (is_tcf_csum(a)) {
2088                         if (csum_offload_supported(priv, action,
2089                                                    tcf_csum_update_flags(a)))
2090                                 continue;
2091
2092                         return -EOPNOTSUPP;
2093                 }
2094
2095                 if (is_tcf_mirred_egress_redirect(a)) {
2096                         struct net_device *peer_dev = tcf_mirred_dev(a);
2097
2098                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
2099                             same_hw_devs(priv, netdev_priv(peer_dev))) {
2100                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
2101                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2102                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2103                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2104                         } else {
2105                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2106                                             peer_dev->name);
2107                                 return -EINVAL;
2108                         }
2109                         continue;
2110                 }
2111
2112                 if (is_tcf_skbedit_mark(a)) {
2113                         u32 mark = tcf_skbedit_mark(a);
2114
2115                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2116                                 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
2117                                             mark);
2118                                 return -EINVAL;
2119                         }
2120
2121                         attr->flow_tag = mark;
2122                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2123                         continue;
2124                 }
2125
2126                 return -EINVAL;
2127         }
2128
2129         attr->action = action;
2130         if (!actions_match_supported(priv, exts, parse_attr, flow))
2131                 return -EOPNOTSUPP;
2132
2133         return 0;
2134 }
2135
2136 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2137                                  struct ip_tunnel_key *b)
2138 {
2139         return memcmp(a, b, sizeof(*a));
2140 }
2141
2142 static inline int hash_encap_info(struct ip_tunnel_key *key)
2143 {
2144         return jhash(key, sizeof(*key), 0);
2145 }
2146
2147 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2148                                    struct net_device *mirred_dev,
2149                                    struct net_device **out_dev,
2150                                    struct flowi4 *fl4,
2151                                    struct neighbour **out_n,
2152                                    u8 *out_ttl)
2153 {
2154         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2155         struct mlx5e_rep_priv *uplink_rpriv;
2156         struct rtable *rt;
2157         struct neighbour *n = NULL;
2158
2159 #if IS_ENABLED(CONFIG_INET)
2160         int ret;
2161
2162         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2163         ret = PTR_ERR_OR_ZERO(rt);
2164         if (ret)
2165                 return ret;
2166 #else
2167         return -EOPNOTSUPP;
2168 #endif
2169         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2170         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2171         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2172                 *out_dev = uplink_rpriv->netdev;
2173         else
2174                 *out_dev = rt->dst.dev;
2175
2176         if (!(*out_ttl))
2177                 *out_ttl = ip4_dst_hoplimit(&rt->dst);
2178         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2179         ip_rt_put(rt);
2180         if (!n)
2181                 return -ENOMEM;
2182
2183         *out_n = n;
2184         return 0;
2185 }
2186
2187 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2188                                   struct net_device *peer_netdev)
2189 {
2190         struct mlx5e_priv *peer_priv;
2191
2192         peer_priv = netdev_priv(peer_netdev);
2193
2194         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2195                 (priv->netdev->netdev_ops == peer_netdev->netdev_ops) &&
2196                 same_hw_devs(priv, peer_priv) &&
2197                 MLX5_VPORT_MANAGER(peer_priv->mdev) &&
2198                 (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS));
2199 }
2200
2201 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2202                                    struct net_device *mirred_dev,
2203                                    struct net_device **out_dev,
2204                                    struct flowi6 *fl6,
2205                                    struct neighbour **out_n,
2206                                    u8 *out_ttl)
2207 {
2208         struct neighbour *n = NULL;
2209         struct dst_entry *dst;
2210
2211 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2212         struct mlx5e_rep_priv *uplink_rpriv;
2213         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2214         int ret;
2215
2216         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2217                                          fl6);
2218         if (ret < 0)
2219                 return ret;
2220
2221         if (!(*out_ttl))
2222                 *out_ttl = ip6_dst_hoplimit(dst);
2223
2224         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2225         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2226         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2227                 *out_dev = uplink_rpriv->netdev;
2228         else
2229                 *out_dev = dst->dev;
2230 #else
2231         return -EOPNOTSUPP;
2232 #endif
2233
2234         n = dst_neigh_lookup(dst, &fl6->daddr);
2235         dst_release(dst);
2236         if (!n)
2237                 return -ENOMEM;
2238
2239         *out_n = n;
2240         return 0;
2241 }
2242
2243 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2244                                   char buf[], int encap_size,
2245                                   unsigned char h_dest[ETH_ALEN],
2246                                   u8 tos, u8 ttl,
2247                                   __be32 daddr,
2248                                   __be32 saddr,
2249                                   __be16 udp_dst_port,
2250                                   __be32 vx_vni)
2251 {
2252         struct ethhdr *eth = (struct ethhdr *)buf;
2253         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2254         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2255         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2256
2257         memset(buf, 0, encap_size);
2258
2259         ether_addr_copy(eth->h_dest, h_dest);
2260         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2261         eth->h_proto = htons(ETH_P_IP);
2262
2263         ip->daddr = daddr;
2264         ip->saddr = saddr;
2265
2266         ip->tos = tos;
2267         ip->ttl = ttl;
2268         ip->protocol = IPPROTO_UDP;
2269         ip->version = 0x4;
2270         ip->ihl = 0x5;
2271
2272         udp->dest = udp_dst_port;
2273         vxh->vx_flags = VXLAN_HF_VNI;
2274         vxh->vx_vni = vxlan_vni_field(vx_vni);
2275 }
2276
2277 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2278                                   char buf[], int encap_size,
2279                                   unsigned char h_dest[ETH_ALEN],
2280                                   u8 tos, u8 ttl,
2281                                   struct in6_addr *daddr,
2282                                   struct in6_addr *saddr,
2283                                   __be16 udp_dst_port,
2284                                   __be32 vx_vni)
2285 {
2286         struct ethhdr *eth = (struct ethhdr *)buf;
2287         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2288         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2289         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2290
2291         memset(buf, 0, encap_size);
2292
2293         ether_addr_copy(eth->h_dest, h_dest);
2294         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2295         eth->h_proto = htons(ETH_P_IPV6);
2296
2297         ip6_flow_hdr(ip6h, tos, 0);
2298         /* the HW fills up ipv6 payload len */
2299         ip6h->nexthdr     = IPPROTO_UDP;
2300         ip6h->hop_limit   = ttl;
2301         ip6h->daddr       = *daddr;
2302         ip6h->saddr       = *saddr;
2303
2304         udp->dest = udp_dst_port;
2305         vxh->vx_flags = VXLAN_HF_VNI;
2306         vxh->vx_vni = vxlan_vni_field(vx_vni);
2307 }
2308
2309 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2310                                           struct net_device *mirred_dev,
2311                                           struct mlx5e_encap_entry *e)
2312 {
2313         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2314         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2315         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2316         struct net_device *out_dev;
2317         struct neighbour *n = NULL;
2318         struct flowi4 fl4 = {};
2319         u8 nud_state, tos, ttl;
2320         char *encap_header;
2321         int err;
2322
2323         if (max_encap_size < ipv4_encap_size) {
2324                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2325                                ipv4_encap_size, max_encap_size);
2326                 return -EOPNOTSUPP;
2327         }
2328
2329         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2330         if (!encap_header)
2331                 return -ENOMEM;
2332
2333         switch (e->tunnel_type) {
2334         case MLX5_HEADER_TYPE_VXLAN:
2335                 fl4.flowi4_proto = IPPROTO_UDP;
2336                 fl4.fl4_dport = tun_key->tp_dst;
2337                 break;
2338         default:
2339                 err = -EOPNOTSUPP;
2340                 goto free_encap;
2341         }
2342
2343         tos = tun_key->tos;
2344         ttl = tun_key->ttl;
2345
2346         fl4.flowi4_tos = tun_key->tos;
2347         fl4.daddr = tun_key->u.ipv4.dst;
2348         fl4.saddr = tun_key->u.ipv4.src;
2349
2350         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2351                                       &fl4, &n, &ttl);
2352         if (err)
2353                 goto free_encap;
2354
2355         /* used by mlx5e_detach_encap to lookup a neigh hash table
2356          * entry in the neigh hash table when a user deletes a rule
2357          */
2358         e->m_neigh.dev = n->dev;
2359         e->m_neigh.family = n->ops->family;
2360         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2361         e->out_dev = out_dev;
2362
2363         /* It's importent to add the neigh to the hash table before checking
2364          * the neigh validity state. So if we'll get a notification, in case the
2365          * neigh changes it's validity state, we would find the relevant neigh
2366          * in the hash.
2367          */
2368         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2369         if (err)
2370                 goto free_encap;
2371
2372         read_lock_bh(&n->lock);
2373         nud_state = n->nud_state;
2374         ether_addr_copy(e->h_dest, n->ha);
2375         read_unlock_bh(&n->lock);
2376
2377         switch (e->tunnel_type) {
2378         case MLX5_HEADER_TYPE_VXLAN:
2379                 gen_vxlan_header_ipv4(out_dev, encap_header,
2380                                       ipv4_encap_size, e->h_dest, tos, ttl,
2381                                       fl4.daddr,
2382                                       fl4.saddr, tun_key->tp_dst,
2383                                       tunnel_id_to_key32(tun_key->tun_id));
2384                 break;
2385         default:
2386                 err = -EOPNOTSUPP;
2387                 goto destroy_neigh_entry;
2388         }
2389         e->encap_size = ipv4_encap_size;
2390         e->encap_header = encap_header;
2391
2392         if (!(nud_state & NUD_VALID)) {
2393                 neigh_event_send(n, NULL);
2394                 err = -EAGAIN;
2395                 goto out;
2396         }
2397
2398         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2399                                ipv4_encap_size, encap_header, &e->encap_id);
2400         if (err)
2401                 goto destroy_neigh_entry;
2402
2403         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2404         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2405         neigh_release(n);
2406         return err;
2407
2408 destroy_neigh_entry:
2409         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2410 free_encap:
2411         kfree(encap_header);
2412 out:
2413         if (n)
2414                 neigh_release(n);
2415         return err;
2416 }
2417
2418 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2419                                           struct net_device *mirred_dev,
2420                                           struct mlx5e_encap_entry *e)
2421 {
2422         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2423         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2424         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2425         struct net_device *out_dev;
2426         struct neighbour *n = NULL;
2427         struct flowi6 fl6 = {};
2428         u8 nud_state, tos, ttl;
2429         char *encap_header;
2430         int err;
2431
2432         if (max_encap_size < ipv6_encap_size) {
2433                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2434                                ipv6_encap_size, max_encap_size);
2435                 return -EOPNOTSUPP;
2436         }
2437
2438         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2439         if (!encap_header)
2440                 return -ENOMEM;
2441
2442         switch (e->tunnel_type) {
2443         case MLX5_HEADER_TYPE_VXLAN:
2444                 fl6.flowi6_proto = IPPROTO_UDP;
2445                 fl6.fl6_dport = tun_key->tp_dst;
2446                 break;
2447         default:
2448                 err = -EOPNOTSUPP;
2449                 goto free_encap;
2450         }
2451
2452         tos = tun_key->tos;
2453         ttl = tun_key->ttl;
2454
2455         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2456         fl6.daddr = tun_key->u.ipv6.dst;
2457         fl6.saddr = tun_key->u.ipv6.src;
2458
2459         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2460                                       &fl6, &n, &ttl);
2461         if (err)
2462                 goto free_encap;
2463
2464         /* used by mlx5e_detach_encap to lookup a neigh hash table
2465          * entry in the neigh hash table when a user deletes a rule
2466          */
2467         e->m_neigh.dev = n->dev;
2468         e->m_neigh.family = n->ops->family;
2469         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2470         e->out_dev = out_dev;
2471
2472         /* It's importent to add the neigh to the hash table before checking
2473          * the neigh validity state. So if we'll get a notification, in case the
2474          * neigh changes it's validity state, we would find the relevant neigh
2475          * in the hash.
2476          */
2477         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2478         if (err)
2479                 goto free_encap;
2480
2481         read_lock_bh(&n->lock);
2482         nud_state = n->nud_state;
2483         ether_addr_copy(e->h_dest, n->ha);
2484         read_unlock_bh(&n->lock);
2485
2486         switch (e->tunnel_type) {
2487         case MLX5_HEADER_TYPE_VXLAN:
2488                 gen_vxlan_header_ipv6(out_dev, encap_header,
2489                                       ipv6_encap_size, e->h_dest, tos, ttl,
2490                                       &fl6.daddr,
2491                                       &fl6.saddr, tun_key->tp_dst,
2492                                       tunnel_id_to_key32(tun_key->tun_id));
2493                 break;
2494         default:
2495                 err = -EOPNOTSUPP;
2496                 goto destroy_neigh_entry;
2497         }
2498
2499         e->encap_size = ipv6_encap_size;
2500         e->encap_header = encap_header;
2501
2502         if (!(nud_state & NUD_VALID)) {
2503                 neigh_event_send(n, NULL);
2504                 err = -EAGAIN;
2505                 goto out;
2506         }
2507
2508         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2509                                ipv6_encap_size, encap_header, &e->encap_id);
2510         if (err)
2511                 goto destroy_neigh_entry;
2512
2513         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2514         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2515         neigh_release(n);
2516         return err;
2517
2518 destroy_neigh_entry:
2519         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2520 free_encap:
2521         kfree(encap_header);
2522 out:
2523         if (n)
2524                 neigh_release(n);
2525         return err;
2526 }
2527
2528 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2529                               struct ip_tunnel_info *tun_info,
2530                               struct net_device *mirred_dev,
2531                               struct net_device **encap_dev,
2532                               struct mlx5e_tc_flow *flow)
2533 {
2534         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2535         unsigned short family = ip_tunnel_info_af(tun_info);
2536         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2537         struct ip_tunnel_key *key = &tun_info->key;
2538         struct mlx5e_encap_entry *e;
2539         int tunnel_type, err = 0;
2540         uintptr_t hash_key;
2541         bool found = false;
2542
2543         /* udp dst port must be set */
2544         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2545                 goto vxlan_encap_offload_err;
2546
2547         /* setting udp src port isn't supported */
2548         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2549 vxlan_encap_offload_err:
2550                 netdev_warn(priv->netdev,
2551                             "must set udp dst port and not set udp src port\n");
2552                 return -EOPNOTSUPP;
2553         }
2554
2555         if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) &&
2556             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2557                 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
2558         } else {
2559                 netdev_warn(priv->netdev,
2560                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2561                 return -EOPNOTSUPP;
2562         }
2563
2564         hash_key = hash_encap_info(key);
2565
2566         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2567                                    encap_hlist, hash_key) {
2568                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2569                         found = true;
2570                         break;
2571                 }
2572         }
2573
2574         /* must verify if encap is valid or not */
2575         if (found)
2576                 goto attach_flow;
2577
2578         e = kzalloc(sizeof(*e), GFP_KERNEL);
2579         if (!e)
2580                 return -ENOMEM;
2581
2582         e->tun_info = *tun_info;
2583         e->tunnel_type = tunnel_type;
2584         INIT_LIST_HEAD(&e->flows);
2585
2586         if (family == AF_INET)
2587                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2588         else if (family == AF_INET6)
2589                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2590
2591         if (err && err != -EAGAIN)
2592                 goto out_err;
2593
2594         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2595
2596 attach_flow:
2597         list_add(&flow->encap, &e->flows);
2598         *encap_dev = e->out_dev;
2599         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2600                 attr->encap_id = e->encap_id;
2601         else
2602                 err = -EAGAIN;
2603
2604         return err;
2605
2606 out_err:
2607         kfree(e);
2608         return err;
2609 }
2610
2611 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
2612                                 const struct tc_action *a,
2613                                 struct mlx5_esw_flow_attr *attr,
2614                                 u32 *action)
2615 {
2616         u8 vlan_idx = attr->total_vlan;
2617
2618         if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
2619                 return -EOPNOTSUPP;
2620
2621         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2622                 if (vlan_idx) {
2623                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2624                                                                  MLX5_FS_VLAN_DEPTH))
2625                                 return -EOPNOTSUPP;
2626
2627                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
2628                 } else {
2629                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2630                 }
2631         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2632                 attr->vlan_vid[vlan_idx] = tcf_vlan_push_vid(a);
2633                 attr->vlan_prio[vlan_idx] = tcf_vlan_push_prio(a);
2634                 attr->vlan_proto[vlan_idx] = tcf_vlan_push_proto(a);
2635                 if (!attr->vlan_proto[vlan_idx])
2636                         attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
2637
2638                 if (vlan_idx) {
2639                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2640                                                                  MLX5_FS_VLAN_DEPTH))
2641                                 return -EOPNOTSUPP;
2642
2643                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
2644                 } else {
2645                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
2646                             (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2647                              tcf_vlan_push_prio(a)))
2648                                 return -EOPNOTSUPP;
2649
2650                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2651                 }
2652         } else { /* action is TCA_VLAN_ACT_MODIFY */
2653                 return -EOPNOTSUPP;
2654         }
2655
2656         attr->total_vlan = vlan_idx + 1;
2657
2658         return 0;
2659 }
2660
2661 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2662                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2663                                 struct mlx5e_tc_flow *flow)
2664 {
2665         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2666         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2667         struct ip_tunnel_info *info = NULL;
2668         const struct tc_action *a;
2669         LIST_HEAD(actions);
2670         bool encap = false;
2671         u32 action = 0;
2672         int err, i;
2673
2674         if (!tcf_exts_has_actions(exts))
2675                 return -EINVAL;
2676
2677         attr->in_rep = rpriv->rep;
2678         attr->in_mdev = priv->mdev;
2679
2680         tcf_exts_for_each_action(i, a, exts) {
2681                 if (is_tcf_gact_shot(a)) {
2682                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2683                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2684                         continue;
2685                 }
2686
2687                 if (is_tcf_pedit(a)) {
2688                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2689                                                     parse_attr);
2690                         if (err)
2691                                 return err;
2692
2693                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2694                         attr->mirror_count = attr->out_count;
2695                         continue;
2696                 }
2697
2698                 if (is_tcf_csum(a)) {
2699                         if (csum_offload_supported(priv, action,
2700                                                    tcf_csum_update_flags(a)))
2701                                 continue;
2702
2703                         return -EOPNOTSUPP;
2704                 }
2705
2706                 if (is_tcf_mirred_egress_redirect(a) || is_tcf_mirred_egress_mirror(a)) {
2707                         struct mlx5e_priv *out_priv;
2708                         struct net_device *out_dev;
2709
2710                         out_dev = tcf_mirred_dev(a);
2711
2712                         if (attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
2713                                 pr_err("can't support more than %d output ports, can't offload forwarding\n",
2714                                        attr->out_count);
2715                                 return -EOPNOTSUPP;
2716                         }
2717
2718                         if (switchdev_port_same_parent_id(priv->netdev,
2719                                                           out_dev) ||
2720                             is_merged_eswitch_dev(priv, out_dev)) {
2721                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2722                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2723                                 out_priv = netdev_priv(out_dev);
2724                                 rpriv = out_priv->ppriv;
2725                                 attr->out_rep[attr->out_count] = rpriv->rep;
2726                                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
2727                         } else if (encap) {
2728                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2729                                 parse_attr->tun_info = *info;
2730                                 attr->parse_attr = parse_attr;
2731                                 action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
2732                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2733                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2734                                 /* attr->out_rep is resolved when we handle encap */
2735                         } else {
2736                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2737                                        priv->netdev->name, out_dev->name);
2738                                 return -EINVAL;
2739                         }
2740                         continue;
2741                 }
2742
2743                 if (is_tcf_tunnel_set(a)) {
2744                         info = tcf_tunnel_info(a);
2745                         if (info)
2746                                 encap = true;
2747                         else
2748                                 return -EOPNOTSUPP;
2749                         attr->mirror_count = attr->out_count;
2750                         continue;
2751                 }
2752
2753                 if (is_tcf_vlan(a)) {
2754                         err = parse_tc_vlan_action(priv, a, attr, &action);
2755
2756                         if (err)
2757                                 return err;
2758
2759                         attr->mirror_count = attr->out_count;
2760                         continue;
2761                 }
2762
2763                 if (is_tcf_tunnel_release(a)) {
2764                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2765                         continue;
2766                 }
2767
2768                 return -EINVAL;
2769         }
2770
2771         attr->action = action;
2772         if (!actions_match_supported(priv, exts, parse_attr, flow))
2773                 return -EOPNOTSUPP;
2774
2775         if (attr->out_count > 1 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
2776                 netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
2777                 return -EOPNOTSUPP;
2778         }
2779
2780         return 0;
2781 }
2782
2783 static void get_flags(int flags, u8 *flow_flags)
2784 {
2785         u8 __flow_flags = 0;
2786
2787         if (flags & MLX5E_TC_INGRESS)
2788                 __flow_flags |= MLX5E_TC_FLOW_INGRESS;
2789         if (flags & MLX5E_TC_EGRESS)
2790                 __flow_flags |= MLX5E_TC_FLOW_EGRESS;
2791
2792         *flow_flags = __flow_flags;
2793 }
2794
2795 static const struct rhashtable_params tc_ht_params = {
2796         .head_offset = offsetof(struct mlx5e_tc_flow, node),
2797         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2798         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2799         .automatic_shrinking = true,
2800 };
2801
2802 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv)
2803 {
2804         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2805         struct mlx5e_rep_priv *uplink_rpriv;
2806
2807         if (MLX5_VPORT_MANAGER(priv->mdev) && esw->mode == SRIOV_OFFLOADS) {
2808                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2809                 return &uplink_rpriv->tc_ht;
2810         } else
2811                 return &priv->fs.tc.ht;
2812 }
2813
2814 int mlx5e_configure_flower(struct mlx5e_priv *priv,
2815                            struct tc_cls_flower_offload *f, int flags)
2816 {
2817         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2818         struct mlx5e_tc_flow_parse_attr *parse_attr;
2819         struct rhashtable *tc_ht = get_tc_ht(priv);
2820         struct mlx5e_tc_flow *flow;
2821         int attr_size, err = 0;
2822         u8 flow_flags = 0;
2823
2824         get_flags(flags, &flow_flags);
2825
2826         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
2827         if (flow) {
2828                 netdev_warn_once(priv->netdev, "flow cookie %lx already exists, ignoring\n", f->cookie);
2829                 return 0;
2830         }
2831
2832         if (esw && esw->mode == SRIOV_OFFLOADS) {
2833                 flow_flags |= MLX5E_TC_FLOW_ESWITCH;
2834                 attr_size  = sizeof(struct mlx5_esw_flow_attr);
2835         } else {
2836                 flow_flags |= MLX5E_TC_FLOW_NIC;
2837                 attr_size  = sizeof(struct mlx5_nic_flow_attr);
2838         }
2839
2840         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
2841         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
2842         if (!parse_attr || !flow) {
2843                 err = -ENOMEM;
2844                 goto err_free;
2845         }
2846
2847         flow->cookie = f->cookie;
2848         flow->flags = flow_flags;
2849         flow->priv = priv;
2850
2851         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
2852         if (err < 0)
2853                 goto err_free;
2854
2855         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
2856                 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow);
2857                 if (err < 0)
2858                         goto err_free;
2859                 flow->rule[0] = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow);
2860         } else {
2861                 err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow);
2862                 if (err < 0)
2863                         goto err_free;
2864                 flow->rule[0] = mlx5e_tc_add_nic_flow(priv, parse_attr, flow);
2865         }
2866
2867         if (IS_ERR(flow->rule[0])) {
2868                 err = PTR_ERR(flow->rule[0]);
2869                 if (err != -EAGAIN)
2870                         goto err_free;
2871         }
2872
2873         if (err != -EAGAIN)
2874                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
2875
2876         if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) ||
2877             !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP))
2878                 kvfree(parse_attr);
2879
2880         err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params);
2881         if (err) {
2882                 mlx5e_tc_del_flow(priv, flow);
2883                 kfree(flow);
2884         }
2885
2886         return err;
2887
2888 err_free:
2889         kvfree(parse_attr);
2890         kfree(flow);
2891         return err;
2892 }
2893
2894 #define DIRECTION_MASK (MLX5E_TC_INGRESS | MLX5E_TC_EGRESS)
2895 #define FLOW_DIRECTION_MASK (MLX5E_TC_FLOW_INGRESS | MLX5E_TC_FLOW_EGRESS)
2896
2897 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
2898 {
2899         if ((flow->flags & FLOW_DIRECTION_MASK) == (flags & DIRECTION_MASK))
2900                 return true;
2901
2902         return false;
2903 }
2904
2905 int mlx5e_delete_flower(struct mlx5e_priv *priv,
2906                         struct tc_cls_flower_offload *f, int flags)
2907 {
2908         struct rhashtable *tc_ht = get_tc_ht(priv);
2909         struct mlx5e_tc_flow *flow;
2910
2911         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
2912         if (!flow || !same_flow_direction(flow, flags))
2913                 return -EINVAL;
2914
2915         rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
2916
2917         mlx5e_tc_del_flow(priv, flow);
2918
2919         kfree(flow);
2920
2921         return 0;
2922 }
2923
2924 int mlx5e_stats_flower(struct mlx5e_priv *priv,
2925                        struct tc_cls_flower_offload *f, int flags)
2926 {
2927         struct rhashtable *tc_ht = get_tc_ht(priv);
2928         struct mlx5e_tc_flow *flow;
2929         struct mlx5_fc *counter;
2930         u64 bytes;
2931         u64 packets;
2932         u64 lastuse;
2933
2934         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
2935         if (!flow || !same_flow_direction(flow, flags))
2936                 return -EINVAL;
2937
2938         if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
2939                 return 0;
2940
2941         counter = mlx5_flow_rule_counter(flow->rule[0]);
2942         if (!counter)
2943                 return 0;
2944
2945         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
2946
2947         tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
2948
2949         return 0;
2950 }
2951
2952 static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv,
2953                                               struct mlx5e_priv *peer_priv)
2954 {
2955         struct mlx5_core_dev *peer_mdev = peer_priv->mdev;
2956         struct mlx5e_hairpin_entry *hpe;
2957         u16 peer_vhca_id;
2958         int bkt;
2959
2960         if (!same_hw_devs(priv, peer_priv))
2961                 return;
2962
2963         peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
2964
2965         hash_for_each(priv->fs.tc.hairpin_tbl, bkt, hpe, hairpin_hlist) {
2966                 if (hpe->peer_vhca_id == peer_vhca_id)
2967                         hpe->hp->pair->peer_gone = true;
2968         }
2969 }
2970
2971 static int mlx5e_tc_netdev_event(struct notifier_block *this,
2972                                  unsigned long event, void *ptr)
2973 {
2974         struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2975         struct mlx5e_flow_steering *fs;
2976         struct mlx5e_priv *peer_priv;
2977         struct mlx5e_tc_table *tc;
2978         struct mlx5e_priv *priv;
2979
2980         if (ndev->netdev_ops != &mlx5e_netdev_ops ||
2981             event != NETDEV_UNREGISTER ||
2982             ndev->reg_state == NETREG_REGISTERED)
2983                 return NOTIFY_DONE;
2984
2985         tc = container_of(this, struct mlx5e_tc_table, netdevice_nb);
2986         fs = container_of(tc, struct mlx5e_flow_steering, tc);
2987         priv = container_of(fs, struct mlx5e_priv, fs);
2988         peer_priv = netdev_priv(ndev);
2989         if (priv == peer_priv ||
2990             !(priv->netdev->features & NETIF_F_HW_TC))
2991                 return NOTIFY_DONE;
2992
2993         mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv);
2994
2995         return NOTIFY_DONE;
2996 }
2997
2998 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
2999 {
3000         struct mlx5e_tc_table *tc = &priv->fs.tc;
3001         int err;
3002
3003         hash_init(tc->mod_hdr_tbl);
3004         hash_init(tc->hairpin_tbl);
3005
3006         err = rhashtable_init(&tc->ht, &tc_ht_params);
3007         if (err)
3008                 return err;
3009
3010         tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event;
3011         if (register_netdevice_notifier(&tc->netdevice_nb)) {
3012                 tc->netdevice_nb.notifier_call = NULL;
3013                 mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n");
3014         }
3015
3016         return err;
3017 }
3018
3019 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
3020 {
3021         struct mlx5e_tc_flow *flow = ptr;
3022         struct mlx5e_priv *priv = flow->priv;
3023
3024         mlx5e_tc_del_flow(priv, flow);
3025         kfree(flow);
3026 }
3027
3028 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
3029 {
3030         struct mlx5e_tc_table *tc = &priv->fs.tc;
3031
3032         if (tc->netdevice_nb.notifier_call)
3033                 unregister_netdevice_notifier(&tc->netdevice_nb);
3034
3035         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
3036
3037         if (!IS_ERR_OR_NULL(tc->t)) {
3038                 mlx5_destroy_flow_table(tc->t);
3039                 tc->t = NULL;
3040         }
3041 }
3042
3043 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
3044 {
3045         return rhashtable_init(tc_ht, &tc_ht_params);
3046 }
3047
3048 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
3049 {
3050         rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
3051 }
3052
3053 int mlx5e_tc_num_filters(struct mlx5e_priv *priv)
3054 {
3055         struct rhashtable *tc_ht = get_tc_ht(priv);
3056
3057         return atomic_read(&tc_ht->nelems);
3058 }