drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/sch_generic.h>
  35 #include <net/pkt_cls.h>
  36 #include <net/tc_act/tc_gact.h>
  37 #include <net/tc_act/tc_skbedit.h>
  38 #include <linux/mlx5/fs.h>
  39 #include <linux/mlx5/device.h>
  40 #include <linux/rhashtable.h>
  41 #include <net/switchdev.h>
  42 #include <net/tc_act/tc_mirred.h>
  43 #include <net/tc_act/tc_vlan.h>
  44 #include <net/tc_act/tc_tunnel_key.h>
  45 #include <net/tc_act/tc_pedit.h>
  46 #include <net/tc_act/tc_csum.h>
  47 #include <net/vxlan.h>
  48 #include <net/arp.h>
  49 #include "en.h"
  50 #include "en_rep.h"
  51 #include "en_tc.h"
  52 #include "eswitch.h"
  53 #include "vxlan.h"
  54 #include "fs_core.h"
  55
  56 struct mlx5_nic_flow_attr {
  57         u32 action;
  58         u32 flow_tag;
  59         u32 mod_hdr_id;
  60         u32 hairpin_tirn;
  61         struct mlx5_flow_table  *hairpin_ft;
  62 };
  63
  64 enum {
  65         MLX5E_TC_FLOW_ESWITCH   = BIT(0),
  66         MLX5E_TC_FLOW_NIC       = BIT(1),
  67         MLX5E_TC_FLOW_OFFLOADED = BIT(2),
  68         MLX5E_TC_FLOW_HAIRPIN   = BIT(3),
  69         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(4),
  70 };
  71
  72 struct mlx5e_tc_flow {
  73         struct rhash_head       node;
  74         u64                     cookie;
  75         u8                      flags;
  76         struct mlx5_flow_handle *rule;
  77         struct list_head        encap;   /* flows sharing the same encap ID */
  78         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
  79         struct list_head        hairpin; /* flows sharing the same hairpin */
  80         union {
  81                 struct mlx5_esw_flow_attr esw_attr[0];
  82                 struct mlx5_nic_flow_attr nic_attr[0];
  83         };
  84 };
  85
  86 struct mlx5e_tc_flow_parse_attr {
  87         struct ip_tunnel_info tun_info;
  88         struct mlx5_flow_spec spec;
  89         int num_mod_hdr_actions;
  90         void *mod_hdr_actions;
  91         int mirred_ifindex;
  92 };
  93
  94 enum {
  95         MLX5_HEADER_TYPE_VXLAN = 0x0,
  96         MLX5_HEADER_TYPE_NVGRE = 0x1,
  97 };
  98
  99 #define MLX5E_TC_TABLE_NUM_GROUPS 4
 100 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE (1 << 16)
 101
 102 struct mlx5e_hairpin {
 103         struct mlx5_hairpin *pair;
 104
 105         struct mlx5_core_dev *func_mdev;
 106         struct mlx5e_priv *func_priv;
 107         u32 tdn;
 108         u32 tirn;
 109
 110         int num_channels;
 111         struct mlx5e_rqt indir_rqt;
 112         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
 113         struct mlx5e_ttc_table ttc;
 114 };
 115
 116 struct mlx5e_hairpin_entry {
 117         /* a node of a hash table which keeps all the  hairpin entries */
 118         struct hlist_node hairpin_hlist;
 119
 120         /* flows sharing the same hairpin */
 121         struct list_head flows;
 122
 123         u16 peer_vhca_id;
 124         u8 prio;
 125         struct mlx5e_hairpin *hp;
 126 };
 127
 128 struct mod_hdr_key {
 129         int num_actions;
 130         void *actions;
 131 };
 132
 133 struct mlx5e_mod_hdr_entry {
 134         /* a node of a hash table which keeps all the mod_hdr entries */
 135         struct hlist_node mod_hdr_hlist;
 136
 137         /* flows sharing the same mod_hdr entry */
 138         struct list_head flows;
 139
 140         struct mod_hdr_key key;
 141
 142         u32 mod_hdr_id;
 143 };
 144
 145 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
 146
 147 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
 148 {
 149         return jhash(key->actions,
 150                      key->num_actions * MLX5_MH_ACT_SZ, 0);
 151 }
 152
 153 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
 154                                    struct mod_hdr_key *b)
 155 {
 156         if (a->num_actions != b->num_actions)
 157                 return 1;
 158
 159         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
 160 }
 161
 162 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
 163                                 struct mlx5e_tc_flow *flow,
 164                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
 165 {
 166         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 167         int num_actions, actions_size, namespace, err;
 168         struct mlx5e_mod_hdr_entry *mh;
 169         struct mod_hdr_key key;
 170         bool found = false;
 171         u32 hash_key;
 172
 173         num_actions  = parse_attr->num_mod_hdr_actions;
 174         actions_size = MLX5_MH_ACT_SZ * num_actions;
 175
 176         key.actions = parse_attr->mod_hdr_actions;
 177         key.num_actions = num_actions;
 178
 179         hash_key = hash_mod_hdr_info(&key);
 180
 181         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
 182                 namespace = MLX5_FLOW_NAMESPACE_FDB;
 183                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
 184                                        mod_hdr_hlist, hash_key) {
 185                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 186                                 found = true;
 187                                 break;
 188                         }
 189                 }
 190         } else {
 191                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
 192                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
 193                                        mod_hdr_hlist, hash_key) {
 194                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 195                                 found = true;
 196                                 break;
 197                         }
 198                 }
 199         }
 200
 201         if (found)
 202                 goto attach_flow;
 203
 204         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
 205         if (!mh)
 206                 return -ENOMEM;
 207
 208         mh->key.actions = (void *)mh + sizeof(*mh);
 209         memcpy(mh->key.actions, key.actions, actions_size);
 210         mh->key.num_actions = num_actions;
 211         INIT_LIST_HEAD(&mh->flows);
 212
 213         err = mlx5_modify_header_alloc(priv->mdev, namespace,
 214                                        mh->key.num_actions,
 215                                        mh->key.actions,
 216                                        &mh->mod_hdr_id);
 217         if (err)
 218                 goto out_err;
 219
 220         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 221                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 222         else
 223                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 224
 225 attach_flow:
 226         list_add(&flow->mod_hdr, &mh->flows);
 227         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 228                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
 229         else
 230                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
 231
 232         return 0;
 233
 234 out_err:
 235         kfree(mh);
 236         return err;
 237 }
 238
 239 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
 240                                  struct mlx5e_tc_flow *flow)
 241 {
 242         struct list_head *next = flow->mod_hdr.next;
 243
 244         list_del(&flow->mod_hdr);
 245
 246         if (list_empty(next)) {
 247                 struct mlx5e_mod_hdr_entry *mh;
 248
 249                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
 250
 251                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
 252                 hash_del(&mh->mod_hdr_hlist);
 253                 kfree(mh);
 254         }
 255 }
 256
 257 static
 258 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 259 {
 260         struct net_device *netdev;
 261         struct mlx5e_priv *priv;
 262
 263         netdev = __dev_get_by_index(net, ifindex);
 264         priv = netdev_priv(netdev);
 265         return priv->mdev;
 266 }
 267
 268 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 269 {
 270         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
 271         void *tirc;
 272         int err;
 273
 274         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 275         if (err)
 276                 goto alloc_tdn_err;
 277
 278         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 279
 280         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
 281         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
 282         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 283
 284         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
 285         if (err)
 286                 goto create_tir_err;
 287
 288         return 0;
 289
 290 create_tir_err:
 291         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 292 alloc_tdn_err:
 293         return err;
 294 }
 295
 296 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 297 {
 298         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
 299         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 300 }
 301
 302 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
 303 {
 304         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
 305         struct mlx5e_priv *priv = hp->func_priv;
 306         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
 307
 308         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
 309                                       hp->num_channels);
 310
 311         for (i = 0; i < sz; i++) {
 312                 ix = i;
 313                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
 314                         ix = mlx5e_bits_invert(i, ilog2(sz));
 315                 ix = indirection_rqt[ix];
 316                 rqn = hp->pair->rqn[ix];
 317                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
 318         }
 319 }
 320
 321 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 322 {
 323         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
 324         struct mlx5e_priv *priv = hp->func_priv;
 325         struct mlx5_core_dev *mdev = priv->mdev;
 326         void *rqtc;
 327         u32 *in;
 328
 329         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
 330         in = kvzalloc(inlen, GFP_KERNEL);
 331         if (!in)
 332                 return -ENOMEM;
 333
 334         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
 335
 336         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
 337         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
 338
 339         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
 340
 341         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
 342         if (!err)
 343                 hp->indir_rqt.enabled = true;
 344
 345         kvfree(in);
 346         return err;
 347 }
 348
 349 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 350 {
 351         struct mlx5e_priv *priv = hp->func_priv;
 352         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
 353         int tt, i, err;
 354         void *tirc;
 355
 356         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 357                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
 358                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 359
 360                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 361                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
 362                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
 363                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
 364
 365                 err = mlx5_core_create_tir(hp->func_mdev, in,
 366                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
 367                 if (err) {
 368                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 369                         goto err_destroy_tirs;
 370                 }
 371         }
 372         return 0;
 373
 374 err_destroy_tirs:
 375         for (i = 0; i < tt; i++)
 376                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
 377         return err;
 378 }
 379
 380 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 381 {
 382         int tt;
 383
 384         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 385                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
 386 }
 387
 388 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 389                                          struct ttc_params *ttc_params)
 390 {
 391         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 392         int tt;
 393
 394         memset(ttc_params, 0, sizeof(*ttc_params));
 395
 396         ttc_params->any_tt_tirn = hp->tirn;
 397
 398         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 399                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
 400
 401         ft_attr->max_fte = MLX5E_NUM_TT;
 402         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 403         ft_attr->prio = MLX5E_TC_PRIO;
 404 }
 405
 406 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 407 {
 408         struct mlx5e_priv *priv = hp->func_priv;
 409         struct ttc_params ttc_params;
 410         int err;
 411
 412         err = mlx5e_hairpin_create_indirect_rqt(hp);
 413         if (err)
 414                 return err;
 415
 416         err = mlx5e_hairpin_create_indirect_tirs(hp);
 417         if (err)
 418                 goto err_create_indirect_tirs;
 419
 420         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 421         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
 422         if (err)
 423                 goto err_create_ttc_table;
 424
 425         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 426                    hp->num_channels, hp->ttc.ft.t->id);
 427
 428         return 0;
 429
 430 err_create_ttc_table:
 431         mlx5e_hairpin_destroy_indirect_tirs(hp);
 432 err_create_indirect_tirs:
 433         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 434
 435         return err;
 436 }
 437
 438 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 439 {
 440         struct mlx5e_priv *priv = hp->func_priv;
 441
 442         mlx5e_destroy_ttc_table(priv, &hp->ttc);
 443         mlx5e_hairpin_destroy_indirect_tirs(hp);
 444         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 445 }
 446
 447 static struct mlx5e_hairpin *
 448 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 449                      int peer_ifindex)
 450 {
 451         struct mlx5_core_dev *func_mdev, *peer_mdev;
 452         struct mlx5e_hairpin *hp;
 453         struct mlx5_hairpin *pair;
 454         int err;
 455
 456         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 457         if (!hp)
 458                 return ERR_PTR(-ENOMEM);
 459
 460         func_mdev = priv->mdev;
 461         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 462
 463         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 464         if (IS_ERR(pair)) {
 465                 err = PTR_ERR(pair);
 466                 goto create_pair_err;
 467         }
 468         hp->pair = pair;
 469         hp->func_mdev = func_mdev;
 470         hp->func_priv = priv;
 471         hp->num_channels = params->num_channels;
 472
 473         err = mlx5e_hairpin_create_transport(hp);
 474         if (err)
 475                 goto create_transport_err;
 476
 477         if (hp->num_channels > 1) {
 478                 err = mlx5e_hairpin_rss_init(hp);
 479                 if (err)
 480                         goto rss_init_err;
 481         }
 482
 483         return hp;
 484
 485 rss_init_err:
 486         mlx5e_hairpin_destroy_transport(hp);
 487 create_transport_err:
 488         mlx5_core_hairpin_destroy(hp->pair);
 489 create_pair_err:
 490         kfree(hp);
 491         return ERR_PTR(err);
 492 }
 493
 494 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 495 {
 496         if (hp->num_channels > 1)
 497                 mlx5e_hairpin_rss_cleanup(hp);
 498         mlx5e_hairpin_destroy_transport(hp);
 499         mlx5_core_hairpin_destroy(hp->pair);
 500         kvfree(hp);
 501 }
 502
 503 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 504 {
 505         return (peer_vhca_id << 16 | prio);
 506 }
 507
 508 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 509                                                      u16 peer_vhca_id, u8 prio)
 510 {
 511         struct mlx5e_hairpin_entry *hpe;
 512         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 513
 514         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
 515                                hairpin_hlist, hash_key) {
 516                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
 517                         return hpe;
 518         }
 519
 520         return NULL;
 521 }
 522
 523 #define UNKNOWN_MATCH_PRIO 8
 524
 525 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 526                                   struct mlx5_flow_spec *spec, u8 *match_prio)
 527 {
 528         void *headers_c, *headers_v;
 529         u8 prio_val, prio_mask = 0;
 530         bool vlan_present;
 531
 532 #ifdef CONFIG_MLX5_CORE_EN_DCB
 533         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
 534                 netdev_warn(priv->netdev,
 535                             "only PCP trust state supported for hairpin\n");
 536                 return -EOPNOTSUPP;
 537         }
 538 #endif
 539         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
 540         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
 541
 542         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
 543         if (vlan_present) {
 544                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
 545                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
 546         }
 547
 548         if (!vlan_present || !prio_mask) {
 549                 prio_val = UNKNOWN_MATCH_PRIO;
 550         } else if (prio_mask != 0x7) {
 551                 netdev_warn(priv->netdev,
 552                             "masked priority match not supported for hairpin\n");
 553                 return -EOPNOTSUPP;
 554         }
 555
 556         *match_prio = prio_val;
 557         return 0;
 558 }
 559
 560 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
 561                                   struct mlx5e_tc_flow *flow,
 562                                   struct mlx5e_tc_flow_parse_attr *parse_attr)
 563 {
 564         int peer_ifindex = parse_attr->mirred_ifindex;
 565         struct mlx5_hairpin_params params;
 566         struct mlx5_core_dev *peer_mdev;
 567         struct mlx5e_hairpin_entry *hpe;
 568         struct mlx5e_hairpin *hp;
 569         u64 link_speed64;
 570         u32 link_speed;
 571         u8 match_prio;
 572         u16 peer_id;
 573         int err;
 574
 575         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 576         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
 577                 netdev_warn(priv->netdev, "hairpin is not supported\n");
 578                 return -EOPNOTSUPP;
 579         }
 580
 581         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
 582         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio);
 583         if (err)
 584                 return err;
 585         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
 586         if (hpe)
 587                 goto attach_flow;
 588
 589         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
 590         if (!hpe)
 591                 return -ENOMEM;
 592
 593         INIT_LIST_HEAD(&hpe->flows);
 594         hpe->peer_vhca_id = peer_id;
 595         hpe->prio = match_prio;
 596
 597         params.log_data_size = 15;
 598         params.log_data_size = min_t(u8, params.log_data_size,
 599                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
 600         params.log_data_size = max_t(u8, params.log_data_size,
 601                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
 602
 603         params.log_num_packets = params.log_data_size -
 604                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
 605         params.log_num_packets = min_t(u8, params.log_num_packets,
 606                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
 607
 608         params.q_counter = priv->q_counter;
 609         /* set hairpin pair per each 50Gbs share of the link */
 610         mlx5e_get_max_linkspeed(priv->mdev, &link_speed);
 611         link_speed = max_t(u32, link_speed, 50000);
 612         link_speed64 = link_speed;
 613         do_div(link_speed64, 50000);
 614         params.num_channels = link_speed64;
 615
 616         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
 617         if (IS_ERR(hp)) {
 618                 err = PTR_ERR(hp);
 619                 goto create_hairpin_err;
 620         }
 621
 622         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
 623                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
 624                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
 625
 626         hpe->hp = hp;
 627         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
 628                  hash_hairpin_info(peer_id, match_prio));
 629
 630 attach_flow:
 631         if (hpe->hp->num_channels > 1) {
 632                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
 633                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
 634         } else {
 635                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
 636         }
 637         list_add(&flow->hairpin, &hpe->flows);
 638
 639         return 0;
 640
 641 create_hairpin_err:
 642         kfree(hpe);
 643         return err;
 644 }
 645
 646 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
 647                                    struct mlx5e_tc_flow *flow)
 648 {
 649         struct list_head *next = flow->hairpin.next;
 650
 651         list_del(&flow->hairpin);
 652
 653         /* no more hairpin flows for us, release the hairpin pair */
 654         if (list_empty(next)) {
 655                 struct mlx5e_hairpin_entry *hpe;
 656
 657                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
 658
 659                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 660                            hpe->hp->pair->peer_mdev->priv.name);
 661
 662                 mlx5e_hairpin_destroy(hpe->hp);
 663                 hash_del(&hpe->hairpin_hlist);
 664                 kfree(hpe);
 665         }
 666 }
 667
 668 static struct mlx5_flow_handle *
 669 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
 670                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 671                       struct mlx5e_tc_flow *flow)
 672 {
 673         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 674         struct mlx5_core_dev *dev = priv->mdev;
 675         struct mlx5_flow_destination dest[2] = {};
 676         struct mlx5_flow_act flow_act = {
 677                 .action = attr->action,
 678                 .flow_tag = attr->flow_tag,
 679                 .encap_id = 0,
 680         };
 681         struct mlx5_fc *counter = NULL;
 682         struct mlx5_flow_handle *rule;
 683         bool table_created = false;
 684         int err, dest_ix = 0;
 685
 686         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
 687                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr);
 688                 if (err) {
 689                         rule = ERR_PTR(err);
 690                         goto err_add_hairpin_flow;
 691                 }
 692                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
 693                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 694                         dest[dest_ix].ft = attr->hairpin_ft;
 695                 } else {
 696                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 697                         dest[dest_ix].tir_num = attr->hairpin_tirn;
 698                 }
 699                 dest_ix++;
 700         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
 701                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 702                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
 703                 dest_ix++;
 704         }
 705
 706         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 707                 counter = mlx5_fc_create(dev, true);
 708                 if (IS_ERR(counter)) {
 709                         rule = ERR_CAST(counter);
 710                         goto err_fc_create;
 711                 }
 712                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
 713                 dest[dest_ix].counter = counter;
 714                 dest_ix++;
 715         }
 716
 717         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 718                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 719                 flow_act.modify_id = attr->mod_hdr_id;
 720                 kfree(parse_attr->mod_hdr_actions);
 721                 if (err) {
 722                         rule = ERR_PTR(err);
 723                         goto err_create_mod_hdr_id;
 724                 }
 725         }
 726
 727         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
 728                 int tc_grp_size, tc_tbl_size;
 729                 u32 max_flow_counter;
 730
 731                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
 732                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
 733
 734                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
 735
 736                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
 737                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
 738
 739                 priv->fs.tc.t =
 740                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
 741                                                             MLX5E_TC_PRIO,
 742                                                             tc_tbl_size,
 743                                                             MLX5E_TC_TABLE_NUM_GROUPS,
 744                                                             MLX5E_TC_FT_LEVEL, 0);
 745                 if (IS_ERR(priv->fs.tc.t)) {
 746                         netdev_err(priv->netdev,
 747                                    "Failed to create tc offload table\n");
 748                         rule = ERR_CAST(priv->fs.tc.t);
 749                         goto err_create_ft;
 750                 }
 751
 752                 table_created = true;
 753         }
 754
 755         parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
 756         rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
 757                                    &flow_act, dest, dest_ix);
 758
 759         if (IS_ERR(rule))
 760                 goto err_add_rule;
 761
 762         return rule;
 763
 764 err_add_rule:
 765         if (table_created) {
 766                 mlx5_destroy_flow_table(priv->fs.tc.t);
 767                 priv->fs.tc.t = NULL;
 768         }
 769 err_create_ft:
 770         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 771                 mlx5e_detach_mod_hdr(priv, flow);
 772 err_create_mod_hdr_id:
 773         mlx5_fc_destroy(dev, counter);
 774 err_fc_create:
 775         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 776                 mlx5e_hairpin_flow_del(priv, flow);
 777 err_add_hairpin_flow:
 778         return rule;
 779 }
 780
 781 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
 782                                   struct mlx5e_tc_flow *flow)
 783 {
 784         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 785         struct mlx5_fc *counter = NULL;
 786
 787         counter = mlx5_flow_rule_counter(flow->rule);
 788         mlx5_del_flow_rules(flow->rule);
 789         mlx5_fc_destroy(priv->mdev, counter);
 790
 791         if (!mlx5e_tc_num_filters(priv) && (priv->fs.tc.t)) {
 792                 mlx5_destroy_flow_table(priv->fs.tc.t);
 793                 priv->fs.tc.t = NULL;
 794         }
 795
 796         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 797                 mlx5e_detach_mod_hdr(priv, flow);
 798
 799         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 800                 mlx5e_hairpin_flow_del(priv, flow);
 801 }
 802
 803 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
 804                                struct mlx5e_tc_flow *flow);
 805
 806 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
 807                               struct ip_tunnel_info *tun_info,
 808                               struct net_device *mirred_dev,
 809                               struct net_device **encap_dev,
 810                               struct mlx5e_tc_flow *flow);
 811
 812 static struct mlx5_flow_handle *
 813 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
 814                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 815                       struct mlx5e_tc_flow *flow)
 816 {
 817         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 818         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 819         struct net_device *out_dev, *encap_dev = NULL;
 820         struct mlx5_flow_handle *rule = NULL;
 821         struct mlx5e_rep_priv *rpriv;
 822         struct mlx5e_priv *out_priv;
 823         int err;
 824
 825         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
 826                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
 827                                              attr->parse_attr->mirred_ifindex);
 828                 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
 829                                          out_dev, &encap_dev, flow);
 830                 if (err) {
 831                         rule = ERR_PTR(err);
 832                         if (err != -EAGAIN)
 833                                 goto err_attach_encap;
 834                 }
 835                 out_priv = netdev_priv(encap_dev);
 836                 rpriv = out_priv->ppriv;
 837                 attr->out_rep = rpriv->rep;
 838         }
 839
 840         err = mlx5_eswitch_add_vlan_action(esw, attr);
 841         if (err) {
 842                 rule = ERR_PTR(err);
 843                 goto err_add_vlan;
 844         }
 845
 846         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 847                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 848                 kfree(parse_attr->mod_hdr_actions);
 849                 if (err) {
 850                         rule = ERR_PTR(err);
 851                         goto err_mod_hdr;
 852                 }
 853         }
 854
 855         /* we get here if (1) there's no error (rule being null) or when
 856          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
 857          */
 858         if (rule != ERR_PTR(-EAGAIN)) {
 859                 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
 860                 if (IS_ERR(rule))
 861                         goto err_add_rule;
 862         }
 863         return rule;
 864
 865 err_add_rule:
 866         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 867                 mlx5e_detach_mod_hdr(priv, flow);
 868 err_mod_hdr:
 869         mlx5_eswitch_del_vlan_action(esw, attr);
 870 err_add_vlan:
 871         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
 872                 mlx5e_detach_encap(priv, flow);
 873 err_attach_encap:
 874         return rule;
 875 }
 876
 877 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
 878                                   struct mlx5e_tc_flow *flow)
 879 {
 880         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 881         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 882
 883         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 884                 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 885                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule, attr);
 886         }
 887
 888         mlx5_eswitch_del_vlan_action(esw, attr);
 889
 890         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
 891                 mlx5e_detach_encap(priv, flow);
 892                 kvfree(attr->parse_attr);
 893         }
 894
 895         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 896                 mlx5e_detach_mod_hdr(priv, flow);
 897 }
 898
 899 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
 900                               struct mlx5e_encap_entry *e)
 901 {
 902         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 903         struct mlx5_esw_flow_attr *esw_attr;
 904         struct mlx5e_tc_flow *flow;
 905         int err;
 906
 907         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
 908                                e->encap_size, e->encap_header,
 909                                &e->encap_id);
 910         if (err) {
 911                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
 912                                err);
 913                 return;
 914         }
 915         e->flags |= MLX5_ENCAP_ENTRY_VALID;
 916         mlx5e_rep_queue_neigh_stats_work(priv);
 917
 918         list_for_each_entry(flow, &e->flows, encap) {
 919                 esw_attr = flow->esw_attr;
 920                 esw_attr->encap_id = e->encap_id;
 921                 flow->rule = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
 922                 if (IS_ERR(flow->rule)) {
 923                         err = PTR_ERR(flow->rule);
 924                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
 925                                        err);
 926                         continue;
 927                 }
 928                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
 929         }
 930 }
 931
 932 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
 933                               struct mlx5e_encap_entry *e)
 934 {
 935         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 936         struct mlx5e_tc_flow *flow;
 937
 938         list_for_each_entry(flow, &e->flows, encap) {
 939                 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 940                         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 941                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule, flow->esw_attr);
 942                 }
 943         }
 944
 945         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
 946                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
 947                 mlx5_encap_dealloc(priv->mdev, e->encap_id);
 948         }
 949 }
 950
 951 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
 952 {
 953         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
 954         u64 bytes, packets, lastuse = 0;
 955         struct mlx5e_tc_flow *flow;
 956         struct mlx5e_encap_entry *e;
 957         struct mlx5_fc *counter;
 958         struct neigh_table *tbl;
 959         bool neigh_used = false;
 960         struct neighbour *n;
 961
 962         if (m_neigh->family == AF_INET)
 963                 tbl = &arp_tbl;
 964 #if IS_ENABLED(CONFIG_IPV6)
 965         else if (m_neigh->family == AF_INET6)
 966                 tbl = ipv6_stub->nd_tbl;
 967 #endif
 968         else
 969                 return;
 970
 971         list_for_each_entry(e, &nhe->encap_list, encap_list) {
 972                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
 973                         continue;
 974                 list_for_each_entry(flow, &e->flows, encap) {
 975                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 976                                 counter = mlx5_flow_rule_counter(flow->rule);
 977                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
 978                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
 979                                         neigh_used = true;
 980                                         break;
 981                                 }
 982                         }
 983                 }
 984         }
 985
 986         if (neigh_used) {
 987                 nhe->reported_lastuse = jiffies;
 988
 989                 /* find the relevant neigh according to the cached device and
 990                  * dst ip pair
 991                  */
 992                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
 993                 if (!n) {
 994                         WARN(1, "The neighbour already freed\n");
 995                         return;
 996                 }
 997
 998                 neigh_event_send(n, NULL);
 999                 neigh_release(n);
1000         }
1001 }
1002
1003 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1004                                struct mlx5e_tc_flow *flow)
1005 {
1006         struct list_head *next = flow->encap.next;
1007
1008         list_del(&flow->encap);
1009         if (list_empty(next)) {
1010                 struct mlx5e_encap_entry *e;
1011
1012                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1013                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1014
1015                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1016                         mlx5_encap_dealloc(priv->mdev, e->encap_id);
1017
1018                 hash_del_rcu(&e->encap_hlist);
1019                 kfree(e->encap_header);
1020                 kfree(e);
1021         }
1022 }
1023
1024 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1025                               struct mlx5e_tc_flow *flow)
1026 {
1027         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1028                 mlx5e_tc_del_fdb_flow(priv, flow);
1029         else
1030                 mlx5e_tc_del_nic_flow(priv, flow);
1031 }
1032
1033 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1034                              struct tc_cls_flower_offload *f)
1035 {
1036         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1037                                        outer_headers);
1038         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1039                                        outer_headers);
1040         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1041                                     misc_parameters);
1042         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1043                                     misc_parameters);
1044
1045         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1046         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1047
1048         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1049                 struct flow_dissector_key_keyid *key =
1050                         skb_flow_dissector_target(f->dissector,
1051                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1052                                                   f->key);
1053                 struct flow_dissector_key_keyid *mask =
1054                         skb_flow_dissector_target(f->dissector,
1055                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1056                                                   f->mask);
1057                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1058                          be32_to_cpu(mask->keyid));
1059                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1060                          be32_to_cpu(key->keyid));
1061         }
1062 }
1063
1064 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1065                              struct mlx5_flow_spec *spec,
1066                              struct tc_cls_flower_offload *f)
1067 {
1068         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1069                                        outer_headers);
1070         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1071                                        outer_headers);
1072
1073         struct flow_dissector_key_control *enc_control =
1074                 skb_flow_dissector_target(f->dissector,
1075                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1076                                           f->key);
1077
1078         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1079                 struct flow_dissector_key_ports *key =
1080                         skb_flow_dissector_target(f->dissector,
1081                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1082                                                   f->key);
1083                 struct flow_dissector_key_ports *mask =
1084                         skb_flow_dissector_target(f->dissector,
1085                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1086                                                   f->mask);
1087                 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1088                 struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1089                 struct net_device *up_dev = uplink_rpriv->netdev;
1090                 struct mlx5e_priv *up_priv = netdev_priv(up_dev);
1091
1092                 /* Full udp dst port must be given */
1093                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1094                         goto vxlan_match_offload_err;
1095
1096                 if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->dst)) &&
1097                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1098                         parse_vxlan_attr(spec, f);
1099                 else {
1100                         netdev_warn(priv->netdev,
1101                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1102                         return -EOPNOTSUPP;
1103                 }
1104
1105                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1106                          udp_dport, ntohs(mask->dst));
1107                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1108                          udp_dport, ntohs(key->dst));
1109
1110                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1111                          udp_sport, ntohs(mask->src));
1112                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1113                          udp_sport, ntohs(key->src));
1114         } else { /* udp dst port must be given */
1115 vxlan_match_offload_err:
1116                 netdev_warn(priv->netdev,
1117                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1118                 return -EOPNOTSUPP;
1119         }
1120
1121         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1122                 struct flow_dissector_key_ipv4_addrs *key =
1123                         skb_flow_dissector_target(f->dissector,
1124                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1125                                                   f->key);
1126                 struct flow_dissector_key_ipv4_addrs *mask =
1127                         skb_flow_dissector_target(f->dissector,
1128                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1129                                                   f->mask);
1130                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1131                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1132                          ntohl(mask->src));
1133                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1134                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1135                          ntohl(key->src));
1136
1137                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1138                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1139                          ntohl(mask->dst));
1140                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1141                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1142                          ntohl(key->dst));
1143
1144                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1145                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1146         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1147                 struct flow_dissector_key_ipv6_addrs *key =
1148                         skb_flow_dissector_target(f->dissector,
1149                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1150                                                   f->key);
1151                 struct flow_dissector_key_ipv6_addrs *mask =
1152                         skb_flow_dissector_target(f->dissector,
1153                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1154                                                   f->mask);
1155
1156                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1157                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1158                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1159                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1160                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1161                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1162
1163                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1164                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1165                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1166                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1167                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1168                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1169
1170                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1171                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1172         }
1173
1174         /* Enforce DMAC when offloading incoming tunneled flows.
1175          * Flow counters require a match on the DMAC.
1176          */
1177         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1178         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1179         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1180                                      dmac_47_16), priv->netdev->dev_addr);
1181
1182         /* let software handle IP fragments */
1183         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1184         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1185
1186         return 0;
1187 }
1188
1189 static int __parse_cls_flower(struct mlx5e_priv *priv,
1190                               struct mlx5_flow_spec *spec,
1191                               struct tc_cls_flower_offload *f,
1192                               u8 *min_inline)
1193 {
1194         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1195                                        outer_headers);
1196         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1197                                        outer_headers);
1198         u16 addr_type = 0;
1199         u8 ip_proto = 0;
1200
1201         *min_inline = MLX5_INLINE_MODE_L2;
1202
1203         if (f->dissector->used_keys &
1204             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1205               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1206               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1207               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1208               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1209               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1210               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1211               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1212               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1213               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1214               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1215               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1216               BIT(FLOW_DISSECTOR_KEY_TCP) |
1217               BIT(FLOW_DISSECTOR_KEY_IP))) {
1218                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1219                             f->dissector->used_keys);
1220                 return -EOPNOTSUPP;
1221         }
1222
1223         if ((dissector_uses_key(f->dissector,
1224                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1225              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1226              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1227             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1228                 struct flow_dissector_key_control *key =
1229                         skb_flow_dissector_target(f->dissector,
1230                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1231                                                   f->key);
1232                 switch (key->addr_type) {
1233                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1234                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1235                         if (parse_tunnel_attr(priv, spec, f))
1236                                 return -EOPNOTSUPP;
1237                         break;
1238                 default:
1239                         return -EOPNOTSUPP;
1240                 }
1241
1242                 /* In decap flow, header pointers should point to the inner
1243                  * headers, outer header were already set by parse_tunnel_attr
1244                  */
1245                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1246                                          inner_headers);
1247                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1248                                          inner_headers);
1249         }
1250
1251         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1252                 struct flow_dissector_key_control *key =
1253                         skb_flow_dissector_target(f->dissector,
1254                                                   FLOW_DISSECTOR_KEY_CONTROL,
1255                                                   f->key);
1256
1257                 struct flow_dissector_key_control *mask =
1258                         skb_flow_dissector_target(f->dissector,
1259                                                   FLOW_DISSECTOR_KEY_CONTROL,
1260                                                   f->mask);
1261                 addr_type = key->addr_type;
1262
1263                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1264                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1265                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1266                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1267
1268                         /* the HW doesn't need L3 inline to match on frag=no */
1269                         if (key->flags & FLOW_DIS_IS_FRAGMENT)
1270                                 *min_inline = MLX5_INLINE_MODE_IP;
1271                 }
1272         }
1273
1274         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1275                 struct flow_dissector_key_basic *key =
1276                         skb_flow_dissector_target(f->dissector,
1277                                                   FLOW_DISSECTOR_KEY_BASIC,
1278                                                   f->key);
1279                 struct flow_dissector_key_basic *mask =
1280                         skb_flow_dissector_target(f->dissector,
1281                                                   FLOW_DISSECTOR_KEY_BASIC,
1282                                                   f->mask);
1283                 ip_proto = key->ip_proto;
1284
1285                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1286                          ntohs(mask->n_proto));
1287                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1288                          ntohs(key->n_proto));
1289
1290                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1291                          mask->ip_proto);
1292                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1293                          key->ip_proto);
1294
1295                 if (mask->ip_proto)
1296                         *min_inline = MLX5_INLINE_MODE_IP;
1297         }
1298
1299         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1300                 struct flow_dissector_key_eth_addrs *key =
1301                         skb_flow_dissector_target(f->dissector,
1302                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1303                                                   f->key);
1304                 struct flow_dissector_key_eth_addrs *mask =
1305                         skb_flow_dissector_target(f->dissector,
1306                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1307                                                   f->mask);
1308
1309                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1310                                              dmac_47_16),
1311                                 mask->dst);
1312                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1313                                              dmac_47_16),
1314                                 key->dst);
1315
1316                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1317                                              smac_47_16),
1318                                 mask->src);
1319                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1320                                              smac_47_16),
1321                                 key->src);
1322         }
1323
1324         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1325                 struct flow_dissector_key_vlan *key =
1326                         skb_flow_dissector_target(f->dissector,
1327                                                   FLOW_DISSECTOR_KEY_VLAN,
1328                                                   f->key);
1329                 struct flow_dissector_key_vlan *mask =
1330                         skb_flow_dissector_target(f->dissector,
1331                                                   FLOW_DISSECTOR_KEY_VLAN,
1332                                                   f->mask);
1333                 if (mask->vlan_id || mask->vlan_priority) {
1334                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1335                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
1336
1337                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1338                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1339
1340                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1341                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1342                 }
1343         }
1344
1345         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1346                 struct flow_dissector_key_ipv4_addrs *key =
1347                         skb_flow_dissector_target(f->dissector,
1348                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1349                                                   f->key);
1350                 struct flow_dissector_key_ipv4_addrs *mask =
1351                         skb_flow_dissector_target(f->dissector,
1352                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1353                                                   f->mask);
1354
1355                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1356                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1357                        &mask->src, sizeof(mask->src));
1358                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1359                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1360                        &key->src, sizeof(key->src));
1361                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1362                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1363                        &mask->dst, sizeof(mask->dst));
1364                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1365                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1366                        &key->dst, sizeof(key->dst));
1367
1368                 if (mask->src || mask->dst)
1369                         *min_inline = MLX5_INLINE_MODE_IP;
1370         }
1371
1372         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1373                 struct flow_dissector_key_ipv6_addrs *key =
1374                         skb_flow_dissector_target(f->dissector,
1375                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1376                                                   f->key);
1377                 struct flow_dissector_key_ipv6_addrs *mask =
1378                         skb_flow_dissector_target(f->dissector,
1379                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1380                                                   f->mask);
1381
1382                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1383                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1384                        &mask->src, sizeof(mask->src));
1385                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1386                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1387                        &key->src, sizeof(key->src));
1388
1389                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1390                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1391                        &mask->dst, sizeof(mask->dst));
1392                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1393                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1394                        &key->dst, sizeof(key->dst));
1395
1396                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1397                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1398                         *min_inline = MLX5_INLINE_MODE_IP;
1399         }
1400
1401         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1402                 struct flow_dissector_key_ip *key =
1403                         skb_flow_dissector_target(f->dissector,
1404                                                   FLOW_DISSECTOR_KEY_IP,
1405                                                   f->key);
1406                 struct flow_dissector_key_ip *mask =
1407                         skb_flow_dissector_target(f->dissector,
1408                                                   FLOW_DISSECTOR_KEY_IP,
1409                                                   f->mask);
1410
1411                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1412                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1413
1414                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1415                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1416
1417                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1418                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1419
1420                 if (mask->ttl &&
1421                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1422                                                 ft_field_support.outer_ipv4_ttl))
1423                         return -EOPNOTSUPP;
1424
1425                 if (mask->tos || mask->ttl)
1426                         *min_inline = MLX5_INLINE_MODE_IP;
1427         }
1428
1429         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1430                 struct flow_dissector_key_ports *key =
1431                         skb_flow_dissector_target(f->dissector,
1432                                                   FLOW_DISSECTOR_KEY_PORTS,
1433                                                   f->key);
1434                 struct flow_dissector_key_ports *mask =
1435                         skb_flow_dissector_target(f->dissector,
1436                                                   FLOW_DISSECTOR_KEY_PORTS,
1437                                                   f->mask);
1438                 switch (ip_proto) {
1439                 case IPPROTO_TCP:
1440                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1441                                  tcp_sport, ntohs(mask->src));
1442                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1443                                  tcp_sport, ntohs(key->src));
1444
1445                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1446                                  tcp_dport, ntohs(mask->dst));
1447                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1448                                  tcp_dport, ntohs(key->dst));
1449                         break;
1450
1451                 case IPPROTO_UDP:
1452                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1453                                  udp_sport, ntohs(mask->src));
1454                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1455                                  udp_sport, ntohs(key->src));
1456
1457                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1458                                  udp_dport, ntohs(mask->dst));
1459                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1460                                  udp_dport, ntohs(key->dst));
1461                         break;
1462                 default:
1463                         netdev_err(priv->netdev,
1464                                    "Only UDP and TCP transport are supported\n");
1465                         return -EINVAL;
1466                 }
1467
1468                 if (mask->src || mask->dst)
1469                         *min_inline = MLX5_INLINE_MODE_TCP_UDP;
1470         }
1471
1472         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1473                 struct flow_dissector_key_tcp *key =
1474                         skb_flow_dissector_target(f->dissector,
1475                                                   FLOW_DISSECTOR_KEY_TCP,
1476                                                   f->key);
1477                 struct flow_dissector_key_tcp *mask =
1478                         skb_flow_dissector_target(f->dissector,
1479                                                   FLOW_DISSECTOR_KEY_TCP,
1480                                                   f->mask);
1481
1482                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1483                          ntohs(mask->flags));
1484                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1485                          ntohs(key->flags));
1486
1487                 if (mask->flags)
1488                         *min_inline = MLX5_INLINE_MODE_TCP_UDP;
1489         }
1490
1491         return 0;
1492 }
1493
1494 static int parse_cls_flower(struct mlx5e_priv *priv,
1495                             struct mlx5e_tc_flow *flow,
1496                             struct mlx5_flow_spec *spec,
1497                             struct tc_cls_flower_offload *f)
1498 {
1499         struct mlx5_core_dev *dev = priv->mdev;
1500         struct mlx5_eswitch *esw = dev->priv.eswitch;
1501         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1502         struct mlx5_eswitch_rep *rep;
1503         u8 min_inline;
1504         int err;
1505
1506         err = __parse_cls_flower(priv, spec, f, &min_inline);
1507
1508         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1509                 rep = rpriv->rep;
1510                 if (rep->vport != FDB_UPLINK_VPORT &&
1511                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1512                     esw->offloads.inline_mode < min_inline)) {
1513                         netdev_warn(priv->netdev,
1514                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1515                                     min_inline, esw->offloads.inline_mode);
1516                         return -EOPNOTSUPP;
1517                 }
1518         }
1519
1520         return err;
1521 }
1522
1523 struct pedit_headers {
1524         struct ethhdr  eth;
1525         struct iphdr   ip4;
1526         struct ipv6hdr ip6;
1527         struct tcphdr  tcp;
1528         struct udphdr  udp;
1529 };
1530
1531 static int pedit_header_offsets[] = {
1532         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1533         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1534         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1535         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1536         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1537 };
1538
1539 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1540
1541 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1542                          struct pedit_headers *masks,
1543                          struct pedit_headers *vals)
1544 {
1545         u32 *curr_pmask, *curr_pval;
1546
1547         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1548                 goto out_err;
1549
1550         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1551         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1552
1553         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1554                 goto out_err;
1555
1556         *curr_pmask |= mask;
1557         *curr_pval  |= (val & mask);
1558
1559         return 0;
1560
1561 out_err:
1562         return -EOPNOTSUPP;
1563 }
1564
1565 struct mlx5_fields {
1566         u8  field;
1567         u8  size;
1568         u32 offset;
1569 };
1570
1571 #define OFFLOAD(fw_field, size, field, off) \
1572                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1573
1574 static struct mlx5_fields fields[] = {
1575         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1576         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1577         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1578         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1579         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1580         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1581
1582         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1583         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1584         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1585
1586         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1587         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1588         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1589         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1590         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1591         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1592         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1593         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1594         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1595
1596         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1597         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1598         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1599
1600         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1601         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1602 };
1603
1604 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1605  * max from the SW pedit action. On success, it says how many HW actions were
1606  * actually parsed.
1607  */
1608 static int offload_pedit_fields(struct pedit_headers *masks,
1609                                 struct pedit_headers *vals,
1610                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
1611 {
1612         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1613         int i, action_size, nactions, max_actions, first, last, next_z;
1614         void *s_masks_p, *a_masks_p, *vals_p;
1615         struct mlx5_fields *f;
1616         u8 cmd, field_bsize;
1617         u32 s_mask, a_mask;
1618         unsigned long mask;
1619         __be32 mask_be32;
1620         __be16 mask_be16;
1621         void *action;
1622
1623         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1624         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1625         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1626         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1627
1628         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1629         action = parse_attr->mod_hdr_actions;
1630         max_actions = parse_attr->num_mod_hdr_actions;
1631         nactions = 0;
1632
1633         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1634                 f = &fields[i];
1635                 /* avoid seeing bits set from previous iterations */
1636                 s_mask = 0;
1637                 a_mask = 0;
1638
1639                 s_masks_p = (void *)set_masks + f->offset;
1640                 a_masks_p = (void *)add_masks + f->offset;
1641
1642                 memcpy(&s_mask, s_masks_p, f->size);
1643                 memcpy(&a_mask, a_masks_p, f->size);
1644
1645                 if (!s_mask && !a_mask) /* nothing to offload here */
1646                         continue;
1647
1648                 if (s_mask && a_mask) {
1649                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1650                         return -EOPNOTSUPP;
1651                 }
1652
1653                 if (nactions == max_actions) {
1654                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1655                         return -EOPNOTSUPP;
1656                 }
1657
1658                 if (s_mask) {
1659                         cmd  = MLX5_ACTION_TYPE_SET;
1660                         mask = s_mask;
1661                         vals_p = (void *)set_vals + f->offset;
1662                         /* clear to denote we consumed this field */
1663                         memset(s_masks_p, 0, f->size);
1664                 } else {
1665                         cmd  = MLX5_ACTION_TYPE_ADD;
1666                         mask = a_mask;
1667                         vals_p = (void *)add_vals + f->offset;
1668                         /* clear to denote we consumed this field */
1669                         memset(a_masks_p, 0, f->size);
1670                 }
1671
1672                 field_bsize = f->size * BITS_PER_BYTE;
1673
1674                 if (field_bsize == 32) {
1675                         mask_be32 = *(__be32 *)&mask;
1676                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1677                 } else if (field_bsize == 16) {
1678                         mask_be16 = *(__be16 *)&mask;
1679                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1680                 }
1681
1682                 first = find_first_bit(&mask, field_bsize);
1683                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1684                 last  = find_last_bit(&mask, field_bsize);
1685                 if (first < next_z && next_z < last) {
1686                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1687                                mask);
1688                         return -EOPNOTSUPP;
1689                 }
1690
1691                 MLX5_SET(set_action_in, action, action_type, cmd);
1692                 MLX5_SET(set_action_in, action, field, f->field);
1693
1694                 if (cmd == MLX5_ACTION_TYPE_SET) {
1695                         MLX5_SET(set_action_in, action, offset, first);
1696                         /* length is num of bits to be written, zero means length of 32 */
1697                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1698                 }
1699
1700                 if (field_bsize == 32)
1701                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1702                 else if (field_bsize == 16)
1703                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1704                 else if (field_bsize == 8)
1705                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1706
1707                 action += action_size;
1708                 nactions++;
1709         }
1710
1711         parse_attr->num_mod_hdr_actions = nactions;
1712         return 0;
1713 }
1714
1715 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1716                                  const struct tc_action *a, int namespace,
1717                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1718 {
1719         int nkeys, action_size, max_actions;
1720
1721         nkeys = tcf_pedit_nkeys(a);
1722         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1723
1724         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1725                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1726         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1727                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1728
1729         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1730         max_actions = min(max_actions, nkeys * 16);
1731
1732         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1733         if (!parse_attr->mod_hdr_actions)
1734                 return -ENOMEM;
1735
1736         parse_attr->num_mod_hdr_actions = max_actions;
1737         return 0;
1738 }
1739
1740 static const struct pedit_headers zero_masks = {};
1741
1742 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1743                                  const struct tc_action *a, int namespace,
1744                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1745 {
1746         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1747         int nkeys, i, err = -EOPNOTSUPP;
1748         u32 mask, val, offset;
1749         u8 cmd, htype;
1750
1751         nkeys = tcf_pedit_nkeys(a);
1752
1753         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1754         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1755
1756         for (i = 0; i < nkeys; i++) {
1757                 htype = tcf_pedit_htype(a, i);
1758                 cmd = tcf_pedit_cmd(a, i);
1759                 err = -EOPNOTSUPP; /* can't be all optimistic */
1760
1761                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1762                         printk(KERN_WARNING "mlx5: legacy pedit isn't offloaded\n");
1763                         goto out_err;
1764                 }
1765
1766                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1767                         printk(KERN_WARNING "mlx5: pedit cmd %d isn't offloaded\n", cmd);
1768                         goto out_err;
1769                 }
1770
1771                 mask = tcf_pedit_mask(a, i);
1772                 val = tcf_pedit_val(a, i);
1773                 offset = tcf_pedit_offset(a, i);
1774
1775                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1776                 if (err)
1777                         goto out_err;
1778         }
1779
1780         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1781         if (err)
1782                 goto out_err;
1783
1784         err = offload_pedit_fields(masks, vals, parse_attr);
1785         if (err < 0)
1786                 goto out_dealloc_parsed_actions;
1787
1788         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1789                 cmd_masks = &masks[cmd];
1790                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1791                         printk(KERN_WARNING "mlx5: attempt to offload an unsupported field (cmd %d)\n",
1792                                cmd);
1793                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1794                                        16, 1, cmd_masks, sizeof(zero_masks), true);
1795                         err = -EOPNOTSUPP;
1796                         goto out_dealloc_parsed_actions;
1797                 }
1798         }
1799
1800         return 0;
1801
1802 out_dealloc_parsed_actions:
1803         kfree(parse_attr->mod_hdr_actions);
1804 out_err:
1805         return err;
1806 }
1807
1808 static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags)
1809 {
1810         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1811                          TCA_CSUM_UPDATE_FLAG_UDP;
1812
1813         /*  The HW recalcs checksums only if re-writing headers */
1814         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1815                 netdev_warn(priv->netdev,
1816                             "TC csum action is only offloaded with pedit\n");
1817                 return false;
1818         }
1819
1820         if (update_flags & ~prot_flags) {
1821                 netdev_warn(priv->netdev,
1822                             "can't offload TC csum action for some header/s - flags %#x\n",
1823                             update_flags);
1824                 return false;
1825         }
1826
1827         return true;
1828 }
1829
1830 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
1831                                           struct tcf_exts *exts)
1832 {
1833         const struct tc_action *a;
1834         bool modify_ip_header;
1835         LIST_HEAD(actions);
1836         u8 htype, ip_proto;
1837         void *headers_v;
1838         u16 ethertype;
1839         int nkeys, i;
1840
1841         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1842         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1843
1844         /* for non-IP we only re-write MACs, so we're okay */
1845         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
1846                 goto out_ok;
1847
1848         modify_ip_header = false;
1849         tcf_exts_to_list(exts, &actions);
1850         list_for_each_entry(a, &actions, list) {
1851                 if (!is_tcf_pedit(a))
1852                         continue;
1853
1854                 nkeys = tcf_pedit_nkeys(a);
1855                 for (i = 0; i < nkeys; i++) {
1856                         htype = tcf_pedit_htype(a, i);
1857                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
1858                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
1859                                 modify_ip_header = true;
1860                                 break;
1861                         }
1862                 }
1863         }
1864
1865         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
1866         if (modify_ip_header && ip_proto != IPPROTO_TCP && ip_proto != IPPROTO_UDP) {
1867                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
1868                 return false;
1869         }
1870
1871 out_ok:
1872         return true;
1873 }
1874
1875 static bool actions_match_supported(struct mlx5e_priv *priv,
1876                                     struct tcf_exts *exts,
1877                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
1878                                     struct mlx5e_tc_flow *flow)
1879 {
1880         u32 actions;
1881
1882         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1883                 actions = flow->esw_attr->action;
1884         else
1885                 actions = flow->nic_attr->action;
1886
1887         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1888                 return modify_header_match_supported(&parse_attr->spec, exts);
1889
1890         return true;
1891 }
1892
1893 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
1894 {
1895         struct mlx5_core_dev *fmdev, *pmdev;
1896         u16 func_id, peer_id;
1897
1898         fmdev = priv->mdev;
1899         pmdev = peer_priv->mdev;
1900
1901         func_id = (u16)((fmdev->pdev->bus->number << 8) | PCI_SLOT(fmdev->pdev->devfn));
1902         peer_id = (u16)((pmdev->pdev->bus->number << 8) | PCI_SLOT(pmdev->pdev->devfn));
1903
1904         return (func_id == peer_id);
1905 }
1906
1907 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
1908                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
1909                                 struct mlx5e_tc_flow *flow)
1910 {
1911         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
1912         const struct tc_action *a;
1913         LIST_HEAD(actions);
1914         int err;
1915
1916         if (!tcf_exts_has_actions(exts))
1917                 return -EINVAL;
1918
1919         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
1920         attr->action = 0;
1921
1922         tcf_exts_to_list(exts, &actions);
1923         list_for_each_entry(a, &actions, list) {
1924                 if (is_tcf_gact_shot(a)) {
1925                         attr->action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
1926                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
1927                                                flow_table_properties_nic_receive.flow_counter))
1928                                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
1929                         continue;
1930                 }
1931
1932                 if (is_tcf_pedit(a)) {
1933                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
1934                                                     parse_attr);
1935                         if (err)
1936                                 return err;
1937
1938                         attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
1939                                         MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1940                         continue;
1941                 }
1942
1943                 if (is_tcf_csum(a)) {
1944                         if (csum_offload_supported(priv, attr->action,
1945                                                    tcf_csum_update_flags(a)))
1946                                 continue;
1947
1948                         return -EOPNOTSUPP;
1949                 }
1950
1951                 if (is_tcf_mirred_egress_redirect(a)) {
1952                         struct net_device *peer_dev = tcf_mirred_dev(a);
1953
1954                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
1955                             same_hw_devs(priv, netdev_priv(peer_dev))) {
1956                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
1957                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
1958                                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
1959                                                 MLX5_FLOW_CONTEXT_ACTION_COUNT;
1960                         } else {
1961                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
1962                                             peer_dev->name);
1963                                 return -EINVAL;
1964                         }
1965                         continue;
1966                 }
1967
1968                 if (is_tcf_skbedit_mark(a)) {
1969                         u32 mark = tcf_skbedit_mark(a);
1970
1971                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
1972                                 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
1973                                             mark);
1974                                 return -EINVAL;
1975                         }
1976
1977                         attr->flow_tag = mark;
1978                         attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1979                         continue;
1980                 }
1981
1982                 return -EINVAL;
1983         }
1984
1985         if (!actions_match_supported(priv, exts, parse_attr, flow))
1986                 return -EOPNOTSUPP;
1987
1988         return 0;
1989 }
1990
1991 static inline int cmp_encap_info(struct ip_tunnel_key *a,
1992                                  struct ip_tunnel_key *b)
1993 {
1994         return memcmp(a, b, sizeof(*a));
1995 }
1996
1997 static inline int hash_encap_info(struct ip_tunnel_key *key)
1998 {
1999         return jhash(key, sizeof(*key), 0);
2000 }
2001
2002 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2003                                    struct net_device *mirred_dev,
2004                                    struct net_device **out_dev,
2005                                    struct flowi4 *fl4,
2006                                    struct neighbour **out_n,
2007                                    int *out_ttl)
2008 {
2009         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2010         struct mlx5e_rep_priv *uplink_rpriv;
2011         struct rtable *rt;
2012         struct neighbour *n = NULL;
2013
2014 #if IS_ENABLED(CONFIG_INET)
2015         int ret;
2016
2017         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2018         ret = PTR_ERR_OR_ZERO(rt);
2019         if (ret)
2020                 return ret;
2021 #else
2022         return -EOPNOTSUPP;
2023 #endif
2024         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2025         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2026         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2027                 *out_dev = uplink_rpriv->netdev;
2028         else
2029                 *out_dev = rt->dst.dev;
2030
2031         *out_ttl = ip4_dst_hoplimit(&rt->dst);
2032         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2033         ip_rt_put(rt);
2034         if (!n)
2035                 return -ENOMEM;
2036
2037         *out_n = n;
2038         return 0;
2039 }
2040
2041 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2042                                    struct net_device *mirred_dev,
2043                                    struct net_device **out_dev,
2044                                    struct flowi6 *fl6,
2045                                    struct neighbour **out_n,
2046                                    int *out_ttl)
2047 {
2048         struct neighbour *n = NULL;
2049         struct dst_entry *dst;
2050
2051 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2052         struct mlx5e_rep_priv *uplink_rpriv;
2053         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2054         int ret;
2055
2056         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2057                                          fl6);
2058         if (ret < 0)
2059                 return ret;
2060
2061         *out_ttl = ip6_dst_hoplimit(dst);
2062
2063         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2064         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2065         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2066                 *out_dev = uplink_rpriv->netdev;
2067         else
2068                 *out_dev = dst->dev;
2069 #else
2070         return -EOPNOTSUPP;
2071 #endif
2072
2073         n = dst_neigh_lookup(dst, &fl6->daddr);
2074         dst_release(dst);
2075         if (!n)
2076                 return -ENOMEM;
2077
2078         *out_n = n;
2079         return 0;
2080 }
2081
2082 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2083                                   char buf[], int encap_size,
2084                                   unsigned char h_dest[ETH_ALEN],
2085                                   int ttl,
2086                                   __be32 daddr,
2087                                   __be32 saddr,
2088                                   __be16 udp_dst_port,
2089                                   __be32 vx_vni)
2090 {
2091         struct ethhdr *eth = (struct ethhdr *)buf;
2092         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2093         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2094         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2095
2096         memset(buf, 0, encap_size);
2097
2098         ether_addr_copy(eth->h_dest, h_dest);
2099         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2100         eth->h_proto = htons(ETH_P_IP);
2101
2102         ip->daddr = daddr;
2103         ip->saddr = saddr;
2104
2105         ip->ttl = ttl;
2106         ip->protocol = IPPROTO_UDP;
2107         ip->version = 0x4;
2108         ip->ihl = 0x5;
2109
2110         udp->dest = udp_dst_port;
2111         vxh->vx_flags = VXLAN_HF_VNI;
2112         vxh->vx_vni = vxlan_vni_field(vx_vni);
2113 }
2114
2115 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2116                                   char buf[], int encap_size,
2117                                   unsigned char h_dest[ETH_ALEN],
2118                                   int ttl,
2119                                   struct in6_addr *daddr,
2120                                   struct in6_addr *saddr,
2121                                   __be16 udp_dst_port,
2122                                   __be32 vx_vni)
2123 {
2124         struct ethhdr *eth = (struct ethhdr *)buf;
2125         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2126         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2127         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2128
2129         memset(buf, 0, encap_size);
2130
2131         ether_addr_copy(eth->h_dest, h_dest);
2132         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2133         eth->h_proto = htons(ETH_P_IPV6);
2134
2135         ip6_flow_hdr(ip6h, 0, 0);
2136         /* the HW fills up ipv6 payload len */
2137         ip6h->nexthdr     = IPPROTO_UDP;
2138         ip6h->hop_limit   = ttl;
2139         ip6h->daddr       = *daddr;
2140         ip6h->saddr       = *saddr;
2141
2142         udp->dest = udp_dst_port;
2143         vxh->vx_flags = VXLAN_HF_VNI;
2144         vxh->vx_vni = vxlan_vni_field(vx_vni);
2145 }
2146
2147 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2148                                           struct net_device *mirred_dev,
2149                                           struct mlx5e_encap_entry *e)
2150 {
2151         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2152         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2153         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2154         struct net_device *out_dev;
2155         struct neighbour *n = NULL;
2156         struct flowi4 fl4 = {};
2157         char *encap_header;
2158         int ttl, err;
2159         u8 nud_state;
2160
2161         if (max_encap_size < ipv4_encap_size) {
2162                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2163                                ipv4_encap_size, max_encap_size);
2164                 return -EOPNOTSUPP;
2165         }
2166
2167         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2168         if (!encap_header)
2169                 return -ENOMEM;
2170
2171         switch (e->tunnel_type) {
2172         case MLX5_HEADER_TYPE_VXLAN:
2173                 fl4.flowi4_proto = IPPROTO_UDP;
2174                 fl4.fl4_dport = tun_key->tp_dst;
2175                 break;
2176         default:
2177                 err = -EOPNOTSUPP;
2178                 goto free_encap;
2179         }
2180         fl4.flowi4_tos = tun_key->tos;
2181         fl4.daddr = tun_key->u.ipv4.dst;
2182         fl4.saddr = tun_key->u.ipv4.src;
2183
2184         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2185                                       &fl4, &n, &ttl);
2186         if (err)
2187                 goto free_encap;
2188
2189         /* used by mlx5e_detach_encap to lookup a neigh hash table
2190          * entry in the neigh hash table when a user deletes a rule
2191          */
2192         e->m_neigh.dev = n->dev;
2193         e->m_neigh.family = n->ops->family;
2194         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2195         e->out_dev = out_dev;
2196
2197         /* It's importent to add the neigh to the hash table before checking
2198          * the neigh validity state. So if we'll get a notification, in case the
2199          * neigh changes it's validity state, we would find the relevant neigh
2200          * in the hash.
2201          */
2202         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2203         if (err)
2204                 goto free_encap;
2205
2206         read_lock_bh(&n->lock);
2207         nud_state = n->nud_state;
2208         ether_addr_copy(e->h_dest, n->ha);
2209         read_unlock_bh(&n->lock);
2210
2211         switch (e->tunnel_type) {
2212         case MLX5_HEADER_TYPE_VXLAN:
2213                 gen_vxlan_header_ipv4(out_dev, encap_header,
2214                                       ipv4_encap_size, e->h_dest, ttl,
2215                                       fl4.daddr,
2216                                       fl4.saddr, tun_key->tp_dst,
2217                                       tunnel_id_to_key32(tun_key->tun_id));
2218                 break;
2219         default:
2220                 err = -EOPNOTSUPP;
2221                 goto destroy_neigh_entry;
2222         }
2223         e->encap_size = ipv4_encap_size;
2224         e->encap_header = encap_header;
2225
2226         if (!(nud_state & NUD_VALID)) {
2227                 neigh_event_send(n, NULL);
2228                 err = -EAGAIN;
2229                 goto out;
2230         }
2231
2232         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2233                                ipv4_encap_size, encap_header, &e->encap_id);
2234         if (err)
2235                 goto destroy_neigh_entry;
2236
2237         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2238         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2239         neigh_release(n);
2240         return err;
2241
2242 destroy_neigh_entry:
2243         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2244 free_encap:
2245         kfree(encap_header);
2246 out:
2247         if (n)
2248                 neigh_release(n);
2249         return err;
2250 }
2251
2252 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2253                                           struct net_device *mirred_dev,
2254                                           struct mlx5e_encap_entry *e)
2255 {
2256         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2257         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2258         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2259         struct net_device *out_dev;
2260         struct neighbour *n = NULL;
2261         struct flowi6 fl6 = {};
2262         char *encap_header;
2263         int err, ttl = 0;
2264         u8 nud_state;
2265
2266         if (max_encap_size < ipv6_encap_size) {
2267                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2268                                ipv6_encap_size, max_encap_size);
2269                 return -EOPNOTSUPP;
2270         }
2271
2272         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2273         if (!encap_header)
2274                 return -ENOMEM;
2275
2276         switch (e->tunnel_type) {
2277         case MLX5_HEADER_TYPE_VXLAN:
2278                 fl6.flowi6_proto = IPPROTO_UDP;
2279                 fl6.fl6_dport = tun_key->tp_dst;
2280                 break;
2281         default:
2282                 err = -EOPNOTSUPP;
2283                 goto free_encap;
2284         }
2285
2286         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2287         fl6.daddr = tun_key->u.ipv6.dst;
2288         fl6.saddr = tun_key->u.ipv6.src;
2289
2290         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2291                                       &fl6, &n, &ttl);
2292         if (err)
2293                 goto free_encap;
2294
2295         /* used by mlx5e_detach_encap to lookup a neigh hash table
2296          * entry in the neigh hash table when a user deletes a rule
2297          */
2298         e->m_neigh.dev = n->dev;
2299         e->m_neigh.family = n->ops->family;
2300         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2301         e->out_dev = out_dev;
2302
2303         /* It's importent to add the neigh to the hash table before checking
2304          * the neigh validity state. So if we'll get a notification, in case the
2305          * neigh changes it's validity state, we would find the relevant neigh
2306          * in the hash.
2307          */
2308         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2309         if (err)
2310                 goto free_encap;
2311
2312         read_lock_bh(&n->lock);
2313         nud_state = n->nud_state;
2314         ether_addr_copy(e->h_dest, n->ha);
2315         read_unlock_bh(&n->lock);
2316
2317         switch (e->tunnel_type) {
2318         case MLX5_HEADER_TYPE_VXLAN:
2319                 gen_vxlan_header_ipv6(out_dev, encap_header,
2320                                       ipv6_encap_size, e->h_dest, ttl,
2321                                       &fl6.daddr,
2322                                       &fl6.saddr, tun_key->tp_dst,
2323                                       tunnel_id_to_key32(tun_key->tun_id));
2324                 break;
2325         default:
2326                 err = -EOPNOTSUPP;
2327                 goto destroy_neigh_entry;
2328         }
2329
2330         e->encap_size = ipv6_encap_size;
2331         e->encap_header = encap_header;
2332
2333         if (!(nud_state & NUD_VALID)) {
2334                 neigh_event_send(n, NULL);
2335                 err = -EAGAIN;
2336                 goto out;
2337         }
2338
2339         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2340                                ipv6_encap_size, encap_header, &e->encap_id);
2341         if (err)
2342                 goto destroy_neigh_entry;
2343
2344         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2345         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2346         neigh_release(n);
2347         return err;
2348
2349 destroy_neigh_entry:
2350         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2351 free_encap:
2352         kfree(encap_header);
2353 out:
2354         if (n)
2355                 neigh_release(n);
2356         return err;
2357 }
2358
2359 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2360                               struct ip_tunnel_info *tun_info,
2361                               struct net_device *mirred_dev,
2362                               struct net_device **encap_dev,
2363                               struct mlx5e_tc_flow *flow)
2364 {
2365         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2366         struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw,
2367                                                                            REP_ETH);
2368         struct net_device *up_dev = uplink_rpriv->netdev;
2369         unsigned short family = ip_tunnel_info_af(tun_info);
2370         struct mlx5e_priv *up_priv = netdev_priv(up_dev);
2371         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2372         struct ip_tunnel_key *key = &tun_info->key;
2373         struct mlx5e_encap_entry *e;
2374         int tunnel_type, err = 0;
2375         uintptr_t hash_key;
2376         bool found = false;
2377
2378         /* udp dst port must be set */
2379         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2380                 goto vxlan_encap_offload_err;
2381
2382         /* setting udp src port isn't supported */
2383         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2384 vxlan_encap_offload_err:
2385                 netdev_warn(priv->netdev,
2386                             "must set udp dst port and not set udp src port\n");
2387                 return -EOPNOTSUPP;
2388         }
2389
2390         if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->tp_dst)) &&
2391             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2392                 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
2393         } else {
2394                 netdev_warn(priv->netdev,
2395                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2396                 return -EOPNOTSUPP;
2397         }
2398
2399         hash_key = hash_encap_info(key);
2400
2401         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2402                                    encap_hlist, hash_key) {
2403                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2404                         found = true;
2405                         break;
2406                 }
2407         }
2408
2409         /* must verify if encap is valid or not */
2410         if (found)
2411                 goto attach_flow;
2412
2413         e = kzalloc(sizeof(*e), GFP_KERNEL);
2414         if (!e)
2415                 return -ENOMEM;
2416
2417         e->tun_info = *tun_info;
2418         e->tunnel_type = tunnel_type;
2419         INIT_LIST_HEAD(&e->flows);
2420
2421         if (family == AF_INET)
2422                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2423         else if (family == AF_INET6)
2424                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2425
2426         if (err && err != -EAGAIN)
2427                 goto out_err;
2428
2429         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2430
2431 attach_flow:
2432         list_add(&flow->encap, &e->flows);
2433         *encap_dev = e->out_dev;
2434         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2435                 attr->encap_id = e->encap_id;
2436         else
2437                 err = -EAGAIN;
2438
2439         return err;
2440
2441 out_err:
2442         kfree(e);
2443         return err;
2444 }
2445
2446 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2447                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2448                                 struct mlx5e_tc_flow *flow)
2449 {
2450         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2451         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2452         struct ip_tunnel_info *info = NULL;
2453         const struct tc_action *a;
2454         LIST_HEAD(actions);
2455         bool encap = false;
2456         int err = 0;
2457
2458         if (!tcf_exts_has_actions(exts))
2459                 return -EINVAL;
2460
2461         memset(attr, 0, sizeof(*attr));
2462         attr->in_rep = rpriv->rep;
2463
2464         tcf_exts_to_list(exts, &actions);
2465         list_for_each_entry(a, &actions, list) {
2466                 if (is_tcf_gact_shot(a)) {
2467                         attr->action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2468                                         MLX5_FLOW_CONTEXT_ACTION_COUNT;
2469                         continue;
2470                 }
2471
2472                 if (is_tcf_pedit(a)) {
2473                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2474                                                     parse_attr);
2475                         if (err)
2476                                 return err;
2477
2478                         attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2479                         continue;
2480                 }
2481
2482                 if (is_tcf_csum(a)) {
2483                         if (csum_offload_supported(priv, attr->action,
2484                                                    tcf_csum_update_flags(a)))
2485                                 continue;
2486
2487                         return -EOPNOTSUPP;
2488                 }
2489
2490                 if (is_tcf_mirred_egress_redirect(a)) {
2491                         struct net_device *out_dev;
2492                         struct mlx5e_priv *out_priv;
2493
2494                         out_dev = tcf_mirred_dev(a);
2495
2496                         if (switchdev_port_same_parent_id(priv->netdev,
2497                                                           out_dev)) {
2498                                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2499                                         MLX5_FLOW_CONTEXT_ACTION_COUNT;
2500                                 out_priv = netdev_priv(out_dev);
2501                                 rpriv = out_priv->ppriv;
2502                                 attr->out_rep = rpriv->rep;
2503                         } else if (encap) {
2504                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2505                                 parse_attr->tun_info = *info;
2506                                 attr->parse_attr = parse_attr;
2507                                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
2508                                         MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2509                                         MLX5_FLOW_CONTEXT_ACTION_COUNT;
2510                                 /* attr->out_rep is resolved when we handle encap */
2511                         } else {
2512                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2513                                        priv->netdev->name, out_dev->name);
2514                                 return -EINVAL;
2515                         }
2516                         continue;
2517                 }
2518
2519                 if (is_tcf_tunnel_set(a)) {
2520                         info = tcf_tunnel_info(a);
2521                         if (info)
2522                                 encap = true;
2523                         else
2524                                 return -EOPNOTSUPP;
2525                         continue;
2526                 }
2527
2528                 if (is_tcf_vlan(a)) {
2529                         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2530                                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2531                         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2532                                 if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2533                                     tcf_vlan_push_prio(a))
2534                                         return -EOPNOTSUPP;
2535
2536                                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2537                                 attr->vlan = tcf_vlan_push_vid(a);
2538                         } else { /* action is TCA_VLAN_ACT_MODIFY */
2539                                 return -EOPNOTSUPP;
2540                         }
2541                         continue;
2542                 }
2543
2544                 if (is_tcf_tunnel_release(a)) {
2545                         attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2546                         continue;
2547                 }
2548
2549                 return -EINVAL;
2550         }
2551
2552         if (!actions_match_supported(priv, exts, parse_attr, flow))
2553                 return -EOPNOTSUPP;
2554
2555         return err;
2556 }
2557
2558 int mlx5e_configure_flower(struct mlx5e_priv *priv,
2559                            struct tc_cls_flower_offload *f)
2560 {
2561         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2562         struct mlx5e_tc_flow_parse_attr *parse_attr;
2563         struct mlx5e_tc_table *tc = &priv->fs.tc;
2564         struct mlx5e_tc_flow *flow;
2565         int attr_size, err = 0;
2566         u8 flow_flags = 0;
2567
2568         if (esw && esw->mode == SRIOV_OFFLOADS) {
2569                 flow_flags = MLX5E_TC_FLOW_ESWITCH;
2570                 attr_size  = sizeof(struct mlx5_esw_flow_attr);
2571         } else {
2572                 flow_flags = MLX5E_TC_FLOW_NIC;
2573                 attr_size  = sizeof(struct mlx5_nic_flow_attr);
2574         }
2575
2576         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
2577         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
2578         if (!parse_attr || !flow) {
2579                 err = -ENOMEM;
2580                 goto err_free;
2581         }
2582
2583         flow->cookie = f->cookie;
2584         flow->flags = flow_flags;
2585
2586         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
2587         if (err < 0)
2588                 goto err_free;
2589
2590         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
2591                 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow);
2592                 if (err < 0)
2593                         goto err_free;
2594                 flow->rule = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow);
2595         } else {
2596                 err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow);
2597                 if (err < 0)
2598                         goto err_free;
2599                 flow->rule = mlx5e_tc_add_nic_flow(priv, parse_attr, flow);
2600         }
2601
2602         if (IS_ERR(flow->rule)) {
2603                 err = PTR_ERR(flow->rule);
2604                 if (err != -EAGAIN)
2605                         goto err_free;
2606         }
2607
2608         if (err != -EAGAIN)
2609                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
2610
2611         err = rhashtable_insert_fast(&tc->ht, &flow->node,
2612                                      tc->ht_params);
2613         if (err)
2614                 goto err_del_rule;
2615
2616         if (flow->flags & MLX5E_TC_FLOW_ESWITCH &&
2617             !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP))
2618                 kvfree(parse_attr);
2619         return err;
2620
2621 err_del_rule:
2622         mlx5e_tc_del_flow(priv, flow);
2623
2624 err_free:
2625         kvfree(parse_attr);
2626         kfree(flow);
2627         return err;
2628 }
2629
2630 int mlx5e_delete_flower(struct mlx5e_priv *priv,
2631                         struct tc_cls_flower_offload *f)
2632 {
2633         struct mlx5e_tc_flow *flow;
2634         struct mlx5e_tc_table *tc = &priv->fs.tc;
2635
2636         flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2637                                       tc->ht_params);
2638         if (!flow)
2639                 return -EINVAL;
2640
2641         rhashtable_remove_fast(&tc->ht, &flow->node, tc->ht_params);
2642
2643         mlx5e_tc_del_flow(priv, flow);
2644
2645         kfree(flow);
2646
2647         return 0;
2648 }
2649
2650 int mlx5e_stats_flower(struct mlx5e_priv *priv,
2651                        struct tc_cls_flower_offload *f)
2652 {
2653         struct mlx5e_tc_table *tc = &priv->fs.tc;
2654         struct mlx5e_tc_flow *flow;
2655         struct mlx5_fc *counter;
2656         u64 bytes;
2657         u64 packets;
2658         u64 lastuse;
2659
2660         flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2661                                       tc->ht_params);
2662         if (!flow)
2663                 return -EINVAL;
2664
2665         if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
2666                 return 0;
2667
2668         counter = mlx5_flow_rule_counter(flow->rule);
2669         if (!counter)
2670                 return 0;
2671
2672         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
2673
2674         tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
2675
2676         return 0;
2677 }
2678
2679 static const struct rhashtable_params mlx5e_tc_flow_ht_params = {
2680         .head_offset = offsetof(struct mlx5e_tc_flow, node),
2681         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2682         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2683         .automatic_shrinking = true,
2684 };
2685
2686 int mlx5e_tc_init(struct mlx5e_priv *priv)
2687 {
2688         struct mlx5e_tc_table *tc = &priv->fs.tc;
2689
2690         hash_init(tc->mod_hdr_tbl);
2691         hash_init(tc->hairpin_tbl);
2692
2693         tc->ht_params = mlx5e_tc_flow_ht_params;
2694         return rhashtable_init(&tc->ht, &tc->ht_params);
2695 }
2696
2697 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
2698 {
2699         struct mlx5e_tc_flow *flow = ptr;
2700         struct mlx5e_priv *priv = arg;
2701
2702         mlx5e_tc_del_flow(priv, flow);
2703         kfree(flow);
2704 }
2705
2706 void mlx5e_tc_cleanup(struct mlx5e_priv *priv)
2707 {
2708         struct mlx5e_tc_table *tc = &priv->fs.tc;
2709
2710         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, priv);
2711
2712         if (!IS_ERR_OR_NULL(tc->t)) {
2713                 mlx5_destroy_flow_table(tc->t);
2714                 tc->t = NULL;
2715         }
2716 }