net/mlx5e: Add extack messages for TC offload failures
[sfrench/cifs-2.6.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_tc.c
1 /*
2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include <net/flow_dissector.h>
34 #include <net/sch_generic.h>
35 #include <net/pkt_cls.h>
36 #include <net/tc_act/tc_gact.h>
37 #include <net/tc_act/tc_skbedit.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/device.h>
40 #include <linux/rhashtable.h>
41 #include <net/switchdev.h>
42 #include <net/tc_act/tc_mirred.h>
43 #include <net/tc_act/tc_vlan.h>
44 #include <net/tc_act/tc_tunnel_key.h>
45 #include <net/tc_act/tc_pedit.h>
46 #include <net/tc_act/tc_csum.h>
47 #include <net/vxlan.h>
48 #include <net/arp.h>
49 #include "en.h"
50 #include "en_rep.h"
51 #include "en_tc.h"
52 #include "eswitch.h"
53 #include "lib/vxlan.h"
54 #include "fs_core.h"
55 #include "en/port.h"
56
57 struct mlx5_nic_flow_attr {
58         u32 action;
59         u32 flow_tag;
60         u32 mod_hdr_id;
61         u32 hairpin_tirn;
62         u8 match_level;
63         struct mlx5_flow_table  *hairpin_ft;
64 };
65
66 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
67
68 enum {
69         MLX5E_TC_FLOW_INGRESS   = MLX5E_TC_INGRESS,
70         MLX5E_TC_FLOW_EGRESS    = MLX5E_TC_EGRESS,
71         MLX5E_TC_FLOW_ESWITCH   = BIT(MLX5E_TC_FLOW_BASE),
72         MLX5E_TC_FLOW_NIC       = BIT(MLX5E_TC_FLOW_BASE + 1),
73         MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2),
74         MLX5E_TC_FLOW_HAIRPIN   = BIT(MLX5E_TC_FLOW_BASE + 3),
75         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4),
76 };
77
78 #define MLX5E_TC_MAX_SPLITS 1
79
80 struct mlx5e_tc_flow {
81         struct rhash_head       node;
82         struct mlx5e_priv       *priv;
83         u64                     cookie;
84         u8                      flags;
85         struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1];
86         struct list_head        encap;   /* flows sharing the same encap ID */
87         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
88         struct list_head        hairpin; /* flows sharing the same hairpin */
89         union {
90                 struct mlx5_esw_flow_attr esw_attr[0];
91                 struct mlx5_nic_flow_attr nic_attr[0];
92         };
93 };
94
95 struct mlx5e_tc_flow_parse_attr {
96         struct ip_tunnel_info tun_info;
97         struct mlx5_flow_spec spec;
98         int num_mod_hdr_actions;
99         void *mod_hdr_actions;
100         int mirred_ifindex;
101 };
102
103 enum {
104         MLX5_HEADER_TYPE_VXLAN = 0x0,
105         MLX5_HEADER_TYPE_NVGRE = 0x1,
106 };
107
108 #define MLX5E_TC_TABLE_NUM_GROUPS 4
109 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
110
111 struct mlx5e_hairpin {
112         struct mlx5_hairpin *pair;
113
114         struct mlx5_core_dev *func_mdev;
115         struct mlx5e_priv *func_priv;
116         u32 tdn;
117         u32 tirn;
118
119         int num_channels;
120         struct mlx5e_rqt indir_rqt;
121         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
122         struct mlx5e_ttc_table ttc;
123 };
124
125 struct mlx5e_hairpin_entry {
126         /* a node of a hash table which keeps all the  hairpin entries */
127         struct hlist_node hairpin_hlist;
128
129         /* flows sharing the same hairpin */
130         struct list_head flows;
131
132         u16 peer_vhca_id;
133         u8 prio;
134         struct mlx5e_hairpin *hp;
135 };
136
137 struct mod_hdr_key {
138         int num_actions;
139         void *actions;
140 };
141
142 struct mlx5e_mod_hdr_entry {
143         /* a node of a hash table which keeps all the mod_hdr entries */
144         struct hlist_node mod_hdr_hlist;
145
146         /* flows sharing the same mod_hdr entry */
147         struct list_head flows;
148
149         struct mod_hdr_key key;
150
151         u32 mod_hdr_id;
152 };
153
154 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
155
156 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
157 {
158         return jhash(key->actions,
159                      key->num_actions * MLX5_MH_ACT_SZ, 0);
160 }
161
162 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
163                                    struct mod_hdr_key *b)
164 {
165         if (a->num_actions != b->num_actions)
166                 return 1;
167
168         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
169 }
170
171 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
172                                 struct mlx5e_tc_flow *flow,
173                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
174 {
175         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
176         int num_actions, actions_size, namespace, err;
177         struct mlx5e_mod_hdr_entry *mh;
178         struct mod_hdr_key key;
179         bool found = false;
180         u32 hash_key;
181
182         num_actions  = parse_attr->num_mod_hdr_actions;
183         actions_size = MLX5_MH_ACT_SZ * num_actions;
184
185         key.actions = parse_attr->mod_hdr_actions;
186         key.num_actions = num_actions;
187
188         hash_key = hash_mod_hdr_info(&key);
189
190         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
191                 namespace = MLX5_FLOW_NAMESPACE_FDB;
192                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
193                                        mod_hdr_hlist, hash_key) {
194                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
195                                 found = true;
196                                 break;
197                         }
198                 }
199         } else {
200                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
201                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
202                                        mod_hdr_hlist, hash_key) {
203                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
204                                 found = true;
205                                 break;
206                         }
207                 }
208         }
209
210         if (found)
211                 goto attach_flow;
212
213         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
214         if (!mh)
215                 return -ENOMEM;
216
217         mh->key.actions = (void *)mh + sizeof(*mh);
218         memcpy(mh->key.actions, key.actions, actions_size);
219         mh->key.num_actions = num_actions;
220         INIT_LIST_HEAD(&mh->flows);
221
222         err = mlx5_modify_header_alloc(priv->mdev, namespace,
223                                        mh->key.num_actions,
224                                        mh->key.actions,
225                                        &mh->mod_hdr_id);
226         if (err)
227                 goto out_err;
228
229         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
230                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
231         else
232                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
233
234 attach_flow:
235         list_add(&flow->mod_hdr, &mh->flows);
236         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
237                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
238         else
239                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
240
241         return 0;
242
243 out_err:
244         kfree(mh);
245         return err;
246 }
247
248 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
249                                  struct mlx5e_tc_flow *flow)
250 {
251         struct list_head *next = flow->mod_hdr.next;
252
253         list_del(&flow->mod_hdr);
254
255         if (list_empty(next)) {
256                 struct mlx5e_mod_hdr_entry *mh;
257
258                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
259
260                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
261                 hash_del(&mh->mod_hdr_hlist);
262                 kfree(mh);
263         }
264 }
265
266 static
267 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
268 {
269         struct net_device *netdev;
270         struct mlx5e_priv *priv;
271
272         netdev = __dev_get_by_index(net, ifindex);
273         priv = netdev_priv(netdev);
274         return priv->mdev;
275 }
276
277 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
278 {
279         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
280         void *tirc;
281         int err;
282
283         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
284         if (err)
285                 goto alloc_tdn_err;
286
287         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
288
289         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
290         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
291         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
292
293         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
294         if (err)
295                 goto create_tir_err;
296
297         return 0;
298
299 create_tir_err:
300         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
301 alloc_tdn_err:
302         return err;
303 }
304
305 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
306 {
307         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
308         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
309 }
310
311 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
312 {
313         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
314         struct mlx5e_priv *priv = hp->func_priv;
315         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
316
317         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
318                                       hp->num_channels);
319
320         for (i = 0; i < sz; i++) {
321                 ix = i;
322                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
323                         ix = mlx5e_bits_invert(i, ilog2(sz));
324                 ix = indirection_rqt[ix];
325                 rqn = hp->pair->rqn[ix];
326                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
327         }
328 }
329
330 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
331 {
332         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
333         struct mlx5e_priv *priv = hp->func_priv;
334         struct mlx5_core_dev *mdev = priv->mdev;
335         void *rqtc;
336         u32 *in;
337
338         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
339         in = kvzalloc(inlen, GFP_KERNEL);
340         if (!in)
341                 return -ENOMEM;
342
343         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
344
345         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
346         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
347
348         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
349
350         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
351         if (!err)
352                 hp->indir_rqt.enabled = true;
353
354         kvfree(in);
355         return err;
356 }
357
358 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
359 {
360         struct mlx5e_priv *priv = hp->func_priv;
361         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
362         int tt, i, err;
363         void *tirc;
364
365         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
366                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
367                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
368
369                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
370                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
371                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
372                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
373
374                 err = mlx5_core_create_tir(hp->func_mdev, in,
375                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
376                 if (err) {
377                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
378                         goto err_destroy_tirs;
379                 }
380         }
381         return 0;
382
383 err_destroy_tirs:
384         for (i = 0; i < tt; i++)
385                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
386         return err;
387 }
388
389 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
390 {
391         int tt;
392
393         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
394                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
395 }
396
397 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
398                                          struct ttc_params *ttc_params)
399 {
400         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
401         int tt;
402
403         memset(ttc_params, 0, sizeof(*ttc_params));
404
405         ttc_params->any_tt_tirn = hp->tirn;
406
407         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
408                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
409
410         ft_attr->max_fte = MLX5E_NUM_TT;
411         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
412         ft_attr->prio = MLX5E_TC_PRIO;
413 }
414
415 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
416 {
417         struct mlx5e_priv *priv = hp->func_priv;
418         struct ttc_params ttc_params;
419         int err;
420
421         err = mlx5e_hairpin_create_indirect_rqt(hp);
422         if (err)
423                 return err;
424
425         err = mlx5e_hairpin_create_indirect_tirs(hp);
426         if (err)
427                 goto err_create_indirect_tirs;
428
429         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
430         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
431         if (err)
432                 goto err_create_ttc_table;
433
434         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
435                    hp->num_channels, hp->ttc.ft.t->id);
436
437         return 0;
438
439 err_create_ttc_table:
440         mlx5e_hairpin_destroy_indirect_tirs(hp);
441 err_create_indirect_tirs:
442         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
443
444         return err;
445 }
446
447 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
448 {
449         struct mlx5e_priv *priv = hp->func_priv;
450
451         mlx5e_destroy_ttc_table(priv, &hp->ttc);
452         mlx5e_hairpin_destroy_indirect_tirs(hp);
453         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
454 }
455
456 static struct mlx5e_hairpin *
457 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
458                      int peer_ifindex)
459 {
460         struct mlx5_core_dev *func_mdev, *peer_mdev;
461         struct mlx5e_hairpin *hp;
462         struct mlx5_hairpin *pair;
463         int err;
464
465         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
466         if (!hp)
467                 return ERR_PTR(-ENOMEM);
468
469         func_mdev = priv->mdev;
470         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
471
472         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
473         if (IS_ERR(pair)) {
474                 err = PTR_ERR(pair);
475                 goto create_pair_err;
476         }
477         hp->pair = pair;
478         hp->func_mdev = func_mdev;
479         hp->func_priv = priv;
480         hp->num_channels = params->num_channels;
481
482         err = mlx5e_hairpin_create_transport(hp);
483         if (err)
484                 goto create_transport_err;
485
486         if (hp->num_channels > 1) {
487                 err = mlx5e_hairpin_rss_init(hp);
488                 if (err)
489                         goto rss_init_err;
490         }
491
492         return hp;
493
494 rss_init_err:
495         mlx5e_hairpin_destroy_transport(hp);
496 create_transport_err:
497         mlx5_core_hairpin_destroy(hp->pair);
498 create_pair_err:
499         kfree(hp);
500         return ERR_PTR(err);
501 }
502
503 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
504 {
505         if (hp->num_channels > 1)
506                 mlx5e_hairpin_rss_cleanup(hp);
507         mlx5e_hairpin_destroy_transport(hp);
508         mlx5_core_hairpin_destroy(hp->pair);
509         kvfree(hp);
510 }
511
512 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
513 {
514         return (peer_vhca_id << 16 | prio);
515 }
516
517 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
518                                                      u16 peer_vhca_id, u8 prio)
519 {
520         struct mlx5e_hairpin_entry *hpe;
521         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
522
523         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
524                                hairpin_hlist, hash_key) {
525                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
526                         return hpe;
527         }
528
529         return NULL;
530 }
531
532 #define UNKNOWN_MATCH_PRIO 8
533
534 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
535                                   struct mlx5_flow_spec *spec, u8 *match_prio,
536                                   struct netlink_ext_ack *extack)
537 {
538         void *headers_c, *headers_v;
539         u8 prio_val, prio_mask = 0;
540         bool vlan_present;
541
542 #ifdef CONFIG_MLX5_CORE_EN_DCB
543         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
544                 NL_SET_ERR_MSG_MOD(extack,
545                                    "only PCP trust state supported for hairpin");
546                 return -EOPNOTSUPP;
547         }
548 #endif
549         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
550         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
551
552         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
553         if (vlan_present) {
554                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
555                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
556         }
557
558         if (!vlan_present || !prio_mask) {
559                 prio_val = UNKNOWN_MATCH_PRIO;
560         } else if (prio_mask != 0x7) {
561                 NL_SET_ERR_MSG_MOD(extack,
562                                    "masked priority match not supported for hairpin");
563                 return -EOPNOTSUPP;
564         }
565
566         *match_prio = prio_val;
567         return 0;
568 }
569
570 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
571                                   struct mlx5e_tc_flow *flow,
572                                   struct mlx5e_tc_flow_parse_attr *parse_attr,
573                                   struct netlink_ext_ack *extack)
574 {
575         int peer_ifindex = parse_attr->mirred_ifindex;
576         struct mlx5_hairpin_params params;
577         struct mlx5_core_dev *peer_mdev;
578         struct mlx5e_hairpin_entry *hpe;
579         struct mlx5e_hairpin *hp;
580         u64 link_speed64;
581         u32 link_speed;
582         u8 match_prio;
583         u16 peer_id;
584         int err;
585
586         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
587         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
588                 NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported");
589                 return -EOPNOTSUPP;
590         }
591
592         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
593         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio,
594                                      extack);
595         if (err)
596                 return err;
597         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
598         if (hpe)
599                 goto attach_flow;
600
601         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
602         if (!hpe)
603                 return -ENOMEM;
604
605         INIT_LIST_HEAD(&hpe->flows);
606         hpe->peer_vhca_id = peer_id;
607         hpe->prio = match_prio;
608
609         params.log_data_size = 15;
610         params.log_data_size = min_t(u8, params.log_data_size,
611                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
612         params.log_data_size = max_t(u8, params.log_data_size,
613                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
614
615         params.log_num_packets = params.log_data_size -
616                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
617         params.log_num_packets = min_t(u8, params.log_num_packets,
618                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
619
620         params.q_counter = priv->q_counter;
621         /* set hairpin pair per each 50Gbs share of the link */
622         mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
623         link_speed = max_t(u32, link_speed, 50000);
624         link_speed64 = link_speed;
625         do_div(link_speed64, 50000);
626         params.num_channels = link_speed64;
627
628         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
629         if (IS_ERR(hp)) {
630                 err = PTR_ERR(hp);
631                 goto create_hairpin_err;
632         }
633
634         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
635                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
636                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
637
638         hpe->hp = hp;
639         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
640                  hash_hairpin_info(peer_id, match_prio));
641
642 attach_flow:
643         if (hpe->hp->num_channels > 1) {
644                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
645                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
646         } else {
647                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
648         }
649         list_add(&flow->hairpin, &hpe->flows);
650
651         return 0;
652
653 create_hairpin_err:
654         kfree(hpe);
655         return err;
656 }
657
658 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
659                                    struct mlx5e_tc_flow *flow)
660 {
661         struct list_head *next = flow->hairpin.next;
662
663         list_del(&flow->hairpin);
664
665         /* no more hairpin flows for us, release the hairpin pair */
666         if (list_empty(next)) {
667                 struct mlx5e_hairpin_entry *hpe;
668
669                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
670
671                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
672                            hpe->hp->pair->peer_mdev->priv.name);
673
674                 mlx5e_hairpin_destroy(hpe->hp);
675                 hash_del(&hpe->hairpin_hlist);
676                 kfree(hpe);
677         }
678 }
679
680 static struct mlx5_flow_handle *
681 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
682                       struct mlx5e_tc_flow_parse_attr *parse_attr,
683                       struct mlx5e_tc_flow *flow,
684                       struct netlink_ext_ack *extack)
685 {
686         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
687         struct mlx5_core_dev *dev = priv->mdev;
688         struct mlx5_flow_destination dest[2] = {};
689         struct mlx5_flow_act flow_act = {
690                 .action = attr->action,
691                 .has_flow_tag = true,
692                 .flow_tag = attr->flow_tag,
693                 .encap_id = 0,
694         };
695         struct mlx5_fc *counter = NULL;
696         struct mlx5_flow_handle *rule;
697         bool table_created = false;
698         int err, dest_ix = 0;
699
700         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
701                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack);
702                 if (err) {
703                         rule = ERR_PTR(err);
704                         goto err_add_hairpin_flow;
705                 }
706                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
707                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
708                         dest[dest_ix].ft = attr->hairpin_ft;
709                 } else {
710                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
711                         dest[dest_ix].tir_num = attr->hairpin_tirn;
712                 }
713                 dest_ix++;
714         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
715                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
716                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
717                 dest_ix++;
718         }
719
720         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
721                 counter = mlx5_fc_create(dev, true);
722                 if (IS_ERR(counter)) {
723                         rule = ERR_CAST(counter);
724                         goto err_fc_create;
725                 }
726                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
727                 dest[dest_ix].counter = counter;
728                 dest_ix++;
729         }
730
731         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
732                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
733                 flow_act.modify_id = attr->mod_hdr_id;
734                 kfree(parse_attr->mod_hdr_actions);
735                 if (err) {
736                         rule = ERR_PTR(err);
737                         goto err_create_mod_hdr_id;
738                 }
739         }
740
741         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
742                 int tc_grp_size, tc_tbl_size;
743                 u32 max_flow_counter;
744
745                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
746                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
747
748                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
749
750                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
751                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
752
753                 priv->fs.tc.t =
754                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
755                                                             MLX5E_TC_PRIO,
756                                                             tc_tbl_size,
757                                                             MLX5E_TC_TABLE_NUM_GROUPS,
758                                                             MLX5E_TC_FT_LEVEL, 0);
759                 if (IS_ERR(priv->fs.tc.t)) {
760                         NL_SET_ERR_MSG_MOD(extack,
761                                            "Failed to create tc offload table\n");
762                         netdev_err(priv->netdev,
763                                    "Failed to create tc offload table\n");
764                         rule = ERR_CAST(priv->fs.tc.t);
765                         goto err_create_ft;
766                 }
767
768                 table_created = true;
769         }
770
771         if (attr->match_level != MLX5_MATCH_NONE)
772                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
773
774         rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
775                                    &flow_act, dest, dest_ix);
776
777         if (IS_ERR(rule))
778                 goto err_add_rule;
779
780         return rule;
781
782 err_add_rule:
783         if (table_created) {
784                 mlx5_destroy_flow_table(priv->fs.tc.t);
785                 priv->fs.tc.t = NULL;
786         }
787 err_create_ft:
788         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
789                 mlx5e_detach_mod_hdr(priv, flow);
790 err_create_mod_hdr_id:
791         mlx5_fc_destroy(dev, counter);
792 err_fc_create:
793         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
794                 mlx5e_hairpin_flow_del(priv, flow);
795 err_add_hairpin_flow:
796         return rule;
797 }
798
799 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
800                                   struct mlx5e_tc_flow *flow)
801 {
802         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
803         struct mlx5_fc *counter = NULL;
804
805         counter = mlx5_flow_rule_counter(flow->rule[0]);
806         mlx5_del_flow_rules(flow->rule[0]);
807         mlx5_fc_destroy(priv->mdev, counter);
808
809         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
810                 mlx5_destroy_flow_table(priv->fs.tc.t);
811                 priv->fs.tc.t = NULL;
812         }
813
814         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
815                 mlx5e_detach_mod_hdr(priv, flow);
816
817         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
818                 mlx5e_hairpin_flow_del(priv, flow);
819 }
820
821 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
822                                struct mlx5e_tc_flow *flow);
823
824 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
825                               struct ip_tunnel_info *tun_info,
826                               struct net_device *mirred_dev,
827                               struct net_device **encap_dev,
828                               struct mlx5e_tc_flow *flow,
829                               struct netlink_ext_ack *extack);
830
831 static struct mlx5_flow_handle *
832 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
833                       struct mlx5e_tc_flow_parse_attr *parse_attr,
834                       struct mlx5e_tc_flow *flow,
835                       struct netlink_ext_ack *extack)
836 {
837         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
838         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
839         struct net_device *out_dev, *encap_dev = NULL;
840         struct mlx5_flow_handle *rule = NULL;
841         struct mlx5e_rep_priv *rpriv;
842         struct mlx5e_priv *out_priv;
843         int err;
844
845         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
846                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
847                                              attr->parse_attr->mirred_ifindex);
848                 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
849                                          out_dev, &encap_dev, flow, extack);
850                 if (err) {
851                         rule = ERR_PTR(err);
852                         if (err != -EAGAIN)
853                                 goto err_attach_encap;
854                 }
855                 out_priv = netdev_priv(encap_dev);
856                 rpriv = out_priv->ppriv;
857                 attr->out_rep[attr->out_count] = rpriv->rep;
858                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
859         }
860
861         err = mlx5_eswitch_add_vlan_action(esw, attr);
862         if (err) {
863                 rule = ERR_PTR(err);
864                 goto err_add_vlan;
865         }
866
867         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
868                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
869                 kfree(parse_attr->mod_hdr_actions);
870                 if (err) {
871                         rule = ERR_PTR(err);
872                         goto err_mod_hdr;
873                 }
874         }
875
876         /* we get here if (1) there's no error (rule being null) or when
877          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
878          */
879         if (rule != ERR_PTR(-EAGAIN)) {
880                 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
881                 if (IS_ERR(rule))
882                         goto err_add_rule;
883
884                 if (attr->mirror_count) {
885                         flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, &parse_attr->spec, attr);
886                         if (IS_ERR(flow->rule[1]))
887                                 goto err_fwd_rule;
888                 }
889         }
890         return rule;
891
892 err_fwd_rule:
893         mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
894         rule = flow->rule[1];
895 err_add_rule:
896         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
897                 mlx5e_detach_mod_hdr(priv, flow);
898 err_mod_hdr:
899         mlx5_eswitch_del_vlan_action(esw, attr);
900 err_add_vlan:
901         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
902                 mlx5e_detach_encap(priv, flow);
903 err_attach_encap:
904         return rule;
905 }
906
907 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
908                                   struct mlx5e_tc_flow *flow)
909 {
910         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
911         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
912
913         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
914                 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
915                 if (attr->mirror_count)
916                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[1], attr);
917                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
918         }
919
920         mlx5_eswitch_del_vlan_action(esw, attr);
921
922         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
923                 mlx5e_detach_encap(priv, flow);
924                 kvfree(attr->parse_attr);
925         }
926
927         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
928                 mlx5e_detach_mod_hdr(priv, flow);
929 }
930
931 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
932                               struct mlx5e_encap_entry *e)
933 {
934         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
935         struct mlx5_esw_flow_attr *esw_attr;
936         struct mlx5e_tc_flow *flow;
937         int err;
938
939         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
940                                e->encap_size, e->encap_header,
941                                &e->encap_id);
942         if (err) {
943                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
944                                err);
945                 return;
946         }
947         e->flags |= MLX5_ENCAP_ENTRY_VALID;
948         mlx5e_rep_queue_neigh_stats_work(priv);
949
950         list_for_each_entry(flow, &e->flows, encap) {
951                 esw_attr = flow->esw_attr;
952                 esw_attr->encap_id = e->encap_id;
953                 flow->rule[0] = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
954                 if (IS_ERR(flow->rule[0])) {
955                         err = PTR_ERR(flow->rule[0]);
956                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
957                                        err);
958                         continue;
959                 }
960
961                 if (esw_attr->mirror_count) {
962                         flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
963                         if (IS_ERR(flow->rule[1])) {
964                                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], esw_attr);
965                                 err = PTR_ERR(flow->rule[1]);
966                                 mlx5_core_warn(priv->mdev, "Failed to update cached mirror flow, %d\n",
967                                                err);
968                                 continue;
969                         }
970                 }
971
972                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
973         }
974 }
975
976 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
977                               struct mlx5e_encap_entry *e)
978 {
979         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
980         struct mlx5e_tc_flow *flow;
981
982         list_for_each_entry(flow, &e->flows, encap) {
983                 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
984                         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
985
986                         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
987                         if (attr->mirror_count)
988                                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[1], attr);
989                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
990                 }
991         }
992
993         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
994                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
995                 mlx5_encap_dealloc(priv->mdev, e->encap_id);
996         }
997 }
998
999 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
1000 {
1001         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
1002         u64 bytes, packets, lastuse = 0;
1003         struct mlx5e_tc_flow *flow;
1004         struct mlx5e_encap_entry *e;
1005         struct mlx5_fc *counter;
1006         struct neigh_table *tbl;
1007         bool neigh_used = false;
1008         struct neighbour *n;
1009
1010         if (m_neigh->family == AF_INET)
1011                 tbl = &arp_tbl;
1012 #if IS_ENABLED(CONFIG_IPV6)
1013         else if (m_neigh->family == AF_INET6)
1014                 tbl = &nd_tbl;
1015 #endif
1016         else
1017                 return;
1018
1019         list_for_each_entry(e, &nhe->encap_list, encap_list) {
1020                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
1021                         continue;
1022                 list_for_each_entry(flow, &e->flows, encap) {
1023                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1024                                 counter = mlx5_flow_rule_counter(flow->rule[0]);
1025                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1026                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
1027                                         neigh_used = true;
1028                                         break;
1029                                 }
1030                         }
1031                 }
1032                 if (neigh_used)
1033                         break;
1034         }
1035
1036         if (neigh_used) {
1037                 nhe->reported_lastuse = jiffies;
1038
1039                 /* find the relevant neigh according to the cached device and
1040                  * dst ip pair
1041                  */
1042                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1043                 if (!n)
1044                         return;
1045
1046                 neigh_event_send(n, NULL);
1047                 neigh_release(n);
1048         }
1049 }
1050
1051 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1052                                struct mlx5e_tc_flow *flow)
1053 {
1054         struct list_head *next = flow->encap.next;
1055
1056         list_del(&flow->encap);
1057         if (list_empty(next)) {
1058                 struct mlx5e_encap_entry *e;
1059
1060                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1061                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1062
1063                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1064                         mlx5_encap_dealloc(priv->mdev, e->encap_id);
1065
1066                 hash_del_rcu(&e->encap_hlist);
1067                 kfree(e->encap_header);
1068                 kfree(e);
1069         }
1070 }
1071
1072 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1073                               struct mlx5e_tc_flow *flow)
1074 {
1075         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1076                 mlx5e_tc_del_fdb_flow(priv, flow);
1077         else
1078                 mlx5e_tc_del_nic_flow(priv, flow);
1079 }
1080
1081 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1082                              struct tc_cls_flower_offload *f)
1083 {
1084         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1085                                        outer_headers);
1086         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1087                                        outer_headers);
1088         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1089                                     misc_parameters);
1090         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1091                                     misc_parameters);
1092
1093         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1094         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1095
1096         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1097                 struct flow_dissector_key_keyid *key =
1098                         skb_flow_dissector_target(f->dissector,
1099                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1100                                                   f->key);
1101                 struct flow_dissector_key_keyid *mask =
1102                         skb_flow_dissector_target(f->dissector,
1103                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1104                                                   f->mask);
1105                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1106                          be32_to_cpu(mask->keyid));
1107                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1108                          be32_to_cpu(key->keyid));
1109         }
1110 }
1111
1112 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1113                              struct mlx5_flow_spec *spec,
1114                              struct tc_cls_flower_offload *f)
1115 {
1116         struct netlink_ext_ack *extack = f->common.extack;
1117         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1118                                        outer_headers);
1119         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1120                                        outer_headers);
1121
1122         struct flow_dissector_key_control *enc_control =
1123                 skb_flow_dissector_target(f->dissector,
1124                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1125                                           f->key);
1126
1127         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1128                 struct flow_dissector_key_ports *key =
1129                         skb_flow_dissector_target(f->dissector,
1130                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1131                                                   f->key);
1132                 struct flow_dissector_key_ports *mask =
1133                         skb_flow_dissector_target(f->dissector,
1134                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1135                                                   f->mask);
1136
1137                 /* Full udp dst port must be given */
1138                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1139                         goto vxlan_match_offload_err;
1140
1141                 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->dst)) &&
1142                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1143                         parse_vxlan_attr(spec, f);
1144                 else {
1145                         NL_SET_ERR_MSG_MOD(extack,
1146                                            "port isn't an offloaded vxlan udp dport");
1147                         netdev_warn(priv->netdev,
1148                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1149                         return -EOPNOTSUPP;
1150                 }
1151
1152                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1153                          udp_dport, ntohs(mask->dst));
1154                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1155                          udp_dport, ntohs(key->dst));
1156
1157                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1158                          udp_sport, ntohs(mask->src));
1159                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1160                          udp_sport, ntohs(key->src));
1161         } else { /* udp dst port must be given */
1162 vxlan_match_offload_err:
1163                 NL_SET_ERR_MSG_MOD(extack,
1164                                    "IP tunnel decap offload supported only for vxlan, must set UDP dport");
1165                 netdev_warn(priv->netdev,
1166                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1167                 return -EOPNOTSUPP;
1168         }
1169
1170         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1171                 struct flow_dissector_key_ipv4_addrs *key =
1172                         skb_flow_dissector_target(f->dissector,
1173                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1174                                                   f->key);
1175                 struct flow_dissector_key_ipv4_addrs *mask =
1176                         skb_flow_dissector_target(f->dissector,
1177                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1178                                                   f->mask);
1179                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1180                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1181                          ntohl(mask->src));
1182                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1183                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1184                          ntohl(key->src));
1185
1186                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1187                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1188                          ntohl(mask->dst));
1189                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1190                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1191                          ntohl(key->dst));
1192
1193                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1194                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1195         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1196                 struct flow_dissector_key_ipv6_addrs *key =
1197                         skb_flow_dissector_target(f->dissector,
1198                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1199                                                   f->key);
1200                 struct flow_dissector_key_ipv6_addrs *mask =
1201                         skb_flow_dissector_target(f->dissector,
1202                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1203                                                   f->mask);
1204
1205                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1206                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1207                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1208                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1209                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1210                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1211
1212                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1213                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1214                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1215                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1216                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1217                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1218
1219                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1220                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1221         }
1222
1223         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_IP)) {
1224                 struct flow_dissector_key_ip *key =
1225                         skb_flow_dissector_target(f->dissector,
1226                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1227                                                   f->key);
1228                 struct flow_dissector_key_ip *mask =
1229                         skb_flow_dissector_target(f->dissector,
1230                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1231                                                   f->mask);
1232
1233                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1234                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1235
1236                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1237                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1238
1239                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1240                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1241
1242                 if (mask->ttl &&
1243                     !MLX5_CAP_ESW_FLOWTABLE_FDB
1244                         (priv->mdev,
1245                          ft_field_support.outer_ipv4_ttl)) {
1246                         NL_SET_ERR_MSG_MOD(extack,
1247                                            "Matching on TTL is not supported");
1248                         return -EOPNOTSUPP;
1249                 }
1250
1251         }
1252
1253         /* Enforce DMAC when offloading incoming tunneled flows.
1254          * Flow counters require a match on the DMAC.
1255          */
1256         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1257         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1258         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1259                                      dmac_47_16), priv->netdev->dev_addr);
1260
1261         /* let software handle IP fragments */
1262         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1263         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1264
1265         return 0;
1266 }
1267
1268 static int __parse_cls_flower(struct mlx5e_priv *priv,
1269                               struct mlx5_flow_spec *spec,
1270                               struct tc_cls_flower_offload *f,
1271                               u8 *match_level)
1272 {
1273         struct netlink_ext_ack *extack = f->common.extack;
1274         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1275                                        outer_headers);
1276         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1277                                        outer_headers);
1278         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1279                                     misc_parameters);
1280         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1281                                     misc_parameters);
1282         u16 addr_type = 0;
1283         u8 ip_proto = 0;
1284
1285         *match_level = MLX5_MATCH_NONE;
1286
1287         if (f->dissector->used_keys &
1288             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1289               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1290               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1291               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1292               BIT(FLOW_DISSECTOR_KEY_CVLAN) |
1293               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1294               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1295               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1296               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1297               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1298               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1299               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1300               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1301               BIT(FLOW_DISSECTOR_KEY_TCP) |
1302               BIT(FLOW_DISSECTOR_KEY_IP)  |
1303               BIT(FLOW_DISSECTOR_KEY_ENC_IP))) {
1304                 NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
1305                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1306                             f->dissector->used_keys);
1307                 return -EOPNOTSUPP;
1308         }
1309
1310         if ((dissector_uses_key(f->dissector,
1311                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1312              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1313              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1314             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1315                 struct flow_dissector_key_control *key =
1316                         skb_flow_dissector_target(f->dissector,
1317                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1318                                                   f->key);
1319                 switch (key->addr_type) {
1320                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1321                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1322                         if (parse_tunnel_attr(priv, spec, f))
1323                                 return -EOPNOTSUPP;
1324                         break;
1325                 default:
1326                         return -EOPNOTSUPP;
1327                 }
1328
1329                 /* In decap flow, header pointers should point to the inner
1330                  * headers, outer header were already set by parse_tunnel_attr
1331                  */
1332                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1333                                          inner_headers);
1334                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1335                                          inner_headers);
1336         }
1337
1338         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1339                 struct flow_dissector_key_eth_addrs *key =
1340                         skb_flow_dissector_target(f->dissector,
1341                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1342                                                   f->key);
1343                 struct flow_dissector_key_eth_addrs *mask =
1344                         skb_flow_dissector_target(f->dissector,
1345                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1346                                                   f->mask);
1347
1348                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1349                                              dmac_47_16),
1350                                 mask->dst);
1351                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1352                                              dmac_47_16),
1353                                 key->dst);
1354
1355                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1356                                              smac_47_16),
1357                                 mask->src);
1358                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1359                                              smac_47_16),
1360                                 key->src);
1361
1362                 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1363                         *match_level = MLX5_MATCH_L2;
1364         }
1365
1366         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1367                 struct flow_dissector_key_vlan *key =
1368                         skb_flow_dissector_target(f->dissector,
1369                                                   FLOW_DISSECTOR_KEY_VLAN,
1370                                                   f->key);
1371                 struct flow_dissector_key_vlan *mask =
1372                         skb_flow_dissector_target(f->dissector,
1373                                                   FLOW_DISSECTOR_KEY_VLAN,
1374                                                   f->mask);
1375                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1376                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1377                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1378                                          svlan_tag, 1);
1379                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1380                                          svlan_tag, 1);
1381                         } else {
1382                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1383                                          cvlan_tag, 1);
1384                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1385                                          cvlan_tag, 1);
1386                         }
1387
1388                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1389                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1390
1391                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1392                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1393
1394                         *match_level = MLX5_MATCH_L2;
1395                 }
1396         }
1397
1398         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CVLAN)) {
1399                 struct flow_dissector_key_vlan *key =
1400                         skb_flow_dissector_target(f->dissector,
1401                                                   FLOW_DISSECTOR_KEY_CVLAN,
1402                                                   f->key);
1403                 struct flow_dissector_key_vlan *mask =
1404                         skb_flow_dissector_target(f->dissector,
1405                                                   FLOW_DISSECTOR_KEY_CVLAN,
1406                                                   f->mask);
1407                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1408                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1409                                 MLX5_SET(fte_match_set_misc, misc_c,
1410                                          outer_second_svlan_tag, 1);
1411                                 MLX5_SET(fte_match_set_misc, misc_v,
1412                                          outer_second_svlan_tag, 1);
1413                         } else {
1414                                 MLX5_SET(fte_match_set_misc, misc_c,
1415                                          outer_second_cvlan_tag, 1);
1416                                 MLX5_SET(fte_match_set_misc, misc_v,
1417                                          outer_second_cvlan_tag, 1);
1418                         }
1419
1420                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
1421                                  mask->vlan_id);
1422                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
1423                                  key->vlan_id);
1424                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
1425                                  mask->vlan_priority);
1426                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
1427                                  key->vlan_priority);
1428
1429                         *match_level = MLX5_MATCH_L2;
1430                 }
1431         }
1432
1433         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1434                 struct flow_dissector_key_basic *key =
1435                         skb_flow_dissector_target(f->dissector,
1436                                                   FLOW_DISSECTOR_KEY_BASIC,
1437                                                   f->key);
1438                 struct flow_dissector_key_basic *mask =
1439                         skb_flow_dissector_target(f->dissector,
1440                                                   FLOW_DISSECTOR_KEY_BASIC,
1441                                                   f->mask);
1442                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1443                          ntohs(mask->n_proto));
1444                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1445                          ntohs(key->n_proto));
1446
1447                 if (mask->n_proto)
1448                         *match_level = MLX5_MATCH_L2;
1449         }
1450
1451         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1452                 struct flow_dissector_key_control *key =
1453                         skb_flow_dissector_target(f->dissector,
1454                                                   FLOW_DISSECTOR_KEY_CONTROL,
1455                                                   f->key);
1456
1457                 struct flow_dissector_key_control *mask =
1458                         skb_flow_dissector_target(f->dissector,
1459                                                   FLOW_DISSECTOR_KEY_CONTROL,
1460                                                   f->mask);
1461                 addr_type = key->addr_type;
1462
1463                 /* the HW doesn't support frag first/later */
1464                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1465                         return -EOPNOTSUPP;
1466
1467                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1468                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1469                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1470                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1471
1472                         /* the HW doesn't need L3 inline to match on frag=no */
1473                         if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1474                                 *match_level = MLX5_INLINE_MODE_L2;
1475         /* ***  L2 attributes parsing up to here *** */
1476                         else
1477                                 *match_level = MLX5_INLINE_MODE_IP;
1478                 }
1479         }
1480
1481         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1482                 struct flow_dissector_key_basic *key =
1483                         skb_flow_dissector_target(f->dissector,
1484                                                   FLOW_DISSECTOR_KEY_BASIC,
1485                                                   f->key);
1486                 struct flow_dissector_key_basic *mask =
1487                         skb_flow_dissector_target(f->dissector,
1488                                                   FLOW_DISSECTOR_KEY_BASIC,
1489                                                   f->mask);
1490                 ip_proto = key->ip_proto;
1491
1492                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1493                          mask->ip_proto);
1494                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1495                          key->ip_proto);
1496
1497                 if (mask->ip_proto)
1498                         *match_level = MLX5_MATCH_L3;
1499         }
1500
1501         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1502                 struct flow_dissector_key_ipv4_addrs *key =
1503                         skb_flow_dissector_target(f->dissector,
1504                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1505                                                   f->key);
1506                 struct flow_dissector_key_ipv4_addrs *mask =
1507                         skb_flow_dissector_target(f->dissector,
1508                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1509                                                   f->mask);
1510
1511                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1512                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1513                        &mask->src, sizeof(mask->src));
1514                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1515                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1516                        &key->src, sizeof(key->src));
1517                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1518                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1519                        &mask->dst, sizeof(mask->dst));
1520                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1521                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1522                        &key->dst, sizeof(key->dst));
1523
1524                 if (mask->src || mask->dst)
1525                         *match_level = MLX5_MATCH_L3;
1526         }
1527
1528         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1529                 struct flow_dissector_key_ipv6_addrs *key =
1530                         skb_flow_dissector_target(f->dissector,
1531                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1532                                                   f->key);
1533                 struct flow_dissector_key_ipv6_addrs *mask =
1534                         skb_flow_dissector_target(f->dissector,
1535                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1536                                                   f->mask);
1537
1538                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1539                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1540                        &mask->src, sizeof(mask->src));
1541                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1542                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1543                        &key->src, sizeof(key->src));
1544
1545                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1546                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1547                        &mask->dst, sizeof(mask->dst));
1548                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1549                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1550                        &key->dst, sizeof(key->dst));
1551
1552                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1553                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1554                         *match_level = MLX5_MATCH_L3;
1555         }
1556
1557         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1558                 struct flow_dissector_key_ip *key =
1559                         skb_flow_dissector_target(f->dissector,
1560                                                   FLOW_DISSECTOR_KEY_IP,
1561                                                   f->key);
1562                 struct flow_dissector_key_ip *mask =
1563                         skb_flow_dissector_target(f->dissector,
1564                                                   FLOW_DISSECTOR_KEY_IP,
1565                                                   f->mask);
1566
1567                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1568                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1569
1570                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1571                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1572
1573                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1574                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1575
1576                 if (mask->ttl &&
1577                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1578                                                 ft_field_support.outer_ipv4_ttl)) {
1579                         NL_SET_ERR_MSG_MOD(extack,
1580                                            "Matching on TTL is not supported");
1581                         return -EOPNOTSUPP;
1582                 }
1583
1584                 if (mask->tos || mask->ttl)
1585                         *match_level = MLX5_MATCH_L3;
1586         }
1587
1588         /* ***  L3 attributes parsing up to here *** */
1589
1590         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1591                 struct flow_dissector_key_ports *key =
1592                         skb_flow_dissector_target(f->dissector,
1593                                                   FLOW_DISSECTOR_KEY_PORTS,
1594                                                   f->key);
1595                 struct flow_dissector_key_ports *mask =
1596                         skb_flow_dissector_target(f->dissector,
1597                                                   FLOW_DISSECTOR_KEY_PORTS,
1598                                                   f->mask);
1599                 switch (ip_proto) {
1600                 case IPPROTO_TCP:
1601                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1602                                  tcp_sport, ntohs(mask->src));
1603                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1604                                  tcp_sport, ntohs(key->src));
1605
1606                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1607                                  tcp_dport, ntohs(mask->dst));
1608                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1609                                  tcp_dport, ntohs(key->dst));
1610                         break;
1611
1612                 case IPPROTO_UDP:
1613                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1614                                  udp_sport, ntohs(mask->src));
1615                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1616                                  udp_sport, ntohs(key->src));
1617
1618                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1619                                  udp_dport, ntohs(mask->dst));
1620                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1621                                  udp_dport, ntohs(key->dst));
1622                         break;
1623                 default:
1624                         NL_SET_ERR_MSG_MOD(extack,
1625                                            "Only UDP and TCP transports are supported for L4 matching");
1626                         netdev_err(priv->netdev,
1627                                    "Only UDP and TCP transport are supported\n");
1628                         return -EINVAL;
1629                 }
1630
1631                 if (mask->src || mask->dst)
1632                         *match_level = MLX5_MATCH_L4;
1633         }
1634
1635         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1636                 struct flow_dissector_key_tcp *key =
1637                         skb_flow_dissector_target(f->dissector,
1638                                                   FLOW_DISSECTOR_KEY_TCP,
1639                                                   f->key);
1640                 struct flow_dissector_key_tcp *mask =
1641                         skb_flow_dissector_target(f->dissector,
1642                                                   FLOW_DISSECTOR_KEY_TCP,
1643                                                   f->mask);
1644
1645                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1646                          ntohs(mask->flags));
1647                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1648                          ntohs(key->flags));
1649
1650                 if (mask->flags)
1651                         *match_level = MLX5_MATCH_L4;
1652         }
1653
1654         return 0;
1655 }
1656
1657 static int parse_cls_flower(struct mlx5e_priv *priv,
1658                             struct mlx5e_tc_flow *flow,
1659                             struct mlx5_flow_spec *spec,
1660                             struct tc_cls_flower_offload *f)
1661 {
1662         struct netlink_ext_ack *extack = f->common.extack;
1663         struct mlx5_core_dev *dev = priv->mdev;
1664         struct mlx5_eswitch *esw = dev->priv.eswitch;
1665         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1666         struct mlx5_eswitch_rep *rep;
1667         u8 match_level;
1668         int err;
1669
1670         err = __parse_cls_flower(priv, spec, f, &match_level);
1671
1672         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1673                 rep = rpriv->rep;
1674                 if (rep->vport != FDB_UPLINK_VPORT &&
1675                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1676                     esw->offloads.inline_mode < match_level)) {
1677                         NL_SET_ERR_MSG_MOD(extack,
1678                                            "Flow is not offloaded due to min inline setting");
1679                         netdev_warn(priv->netdev,
1680                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1681                                     match_level, esw->offloads.inline_mode);
1682                         return -EOPNOTSUPP;
1683                 }
1684         }
1685
1686         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1687                 flow->esw_attr->match_level = match_level;
1688         else
1689                 flow->nic_attr->match_level = match_level;
1690
1691         return err;
1692 }
1693
1694 struct pedit_headers {
1695         struct ethhdr  eth;
1696         struct iphdr   ip4;
1697         struct ipv6hdr ip6;
1698         struct tcphdr  tcp;
1699         struct udphdr  udp;
1700 };
1701
1702 static int pedit_header_offsets[] = {
1703         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1704         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1705         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1706         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1707         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1708 };
1709
1710 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1711
1712 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1713                          struct pedit_headers *masks,
1714                          struct pedit_headers *vals)
1715 {
1716         u32 *curr_pmask, *curr_pval;
1717
1718         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1719                 goto out_err;
1720
1721         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1722         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1723
1724         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1725                 goto out_err;
1726
1727         *curr_pmask |= mask;
1728         *curr_pval  |= (val & mask);
1729
1730         return 0;
1731
1732 out_err:
1733         return -EOPNOTSUPP;
1734 }
1735
1736 struct mlx5_fields {
1737         u8  field;
1738         u8  size;
1739         u32 offset;
1740 };
1741
1742 #define OFFLOAD(fw_field, size, field, off) \
1743                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1744
1745 static struct mlx5_fields fields[] = {
1746         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1747         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1748         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1749         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1750         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1751
1752         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1753         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1754         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1755
1756         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1757         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1758         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1759         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1760         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1761         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1762         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1763         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1764         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1765
1766         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1767         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1768         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1769
1770         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1771         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1772 };
1773
1774 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1775  * max from the SW pedit action. On success, it says how many HW actions were
1776  * actually parsed.
1777  */
1778 static int offload_pedit_fields(struct pedit_headers *masks,
1779                                 struct pedit_headers *vals,
1780                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
1781                                 struct netlink_ext_ack *extack)
1782 {
1783         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1784         int i, action_size, nactions, max_actions, first, last, next_z;
1785         void *s_masks_p, *a_masks_p, *vals_p;
1786         struct mlx5_fields *f;
1787         u8 cmd, field_bsize;
1788         u32 s_mask, a_mask;
1789         unsigned long mask;
1790         __be32 mask_be32;
1791         __be16 mask_be16;
1792         void *action;
1793
1794         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1795         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1796         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1797         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1798
1799         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1800         action = parse_attr->mod_hdr_actions;
1801         max_actions = parse_attr->num_mod_hdr_actions;
1802         nactions = 0;
1803
1804         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1805                 f = &fields[i];
1806                 /* avoid seeing bits set from previous iterations */
1807                 s_mask = 0;
1808                 a_mask = 0;
1809
1810                 s_masks_p = (void *)set_masks + f->offset;
1811                 a_masks_p = (void *)add_masks + f->offset;
1812
1813                 memcpy(&s_mask, s_masks_p, f->size);
1814                 memcpy(&a_mask, a_masks_p, f->size);
1815
1816                 if (!s_mask && !a_mask) /* nothing to offload here */
1817                         continue;
1818
1819                 if (s_mask && a_mask) {
1820                         NL_SET_ERR_MSG_MOD(extack,
1821                                            "can't set and add to the same HW field");
1822                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1823                         return -EOPNOTSUPP;
1824                 }
1825
1826                 if (nactions == max_actions) {
1827                         NL_SET_ERR_MSG_MOD(extack,
1828                                            "too many pedit actions, can't offload");
1829                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1830                         return -EOPNOTSUPP;
1831                 }
1832
1833                 if (s_mask) {
1834                         cmd  = MLX5_ACTION_TYPE_SET;
1835                         mask = s_mask;
1836                         vals_p = (void *)set_vals + f->offset;
1837                         /* clear to denote we consumed this field */
1838                         memset(s_masks_p, 0, f->size);
1839                 } else {
1840                         cmd  = MLX5_ACTION_TYPE_ADD;
1841                         mask = a_mask;
1842                         vals_p = (void *)add_vals + f->offset;
1843                         /* clear to denote we consumed this field */
1844                         memset(a_masks_p, 0, f->size);
1845                 }
1846
1847                 field_bsize = f->size * BITS_PER_BYTE;
1848
1849                 if (field_bsize == 32) {
1850                         mask_be32 = *(__be32 *)&mask;
1851                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1852                 } else if (field_bsize == 16) {
1853                         mask_be16 = *(__be16 *)&mask;
1854                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1855                 }
1856
1857                 first = find_first_bit(&mask, field_bsize);
1858                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1859                 last  = find_last_bit(&mask, field_bsize);
1860                 if (first < next_z && next_z < last) {
1861                         NL_SET_ERR_MSG_MOD(extack,
1862                                            "rewrite of few sub-fields isn't supported");
1863                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1864                                mask);
1865                         return -EOPNOTSUPP;
1866                 }
1867
1868                 MLX5_SET(set_action_in, action, action_type, cmd);
1869                 MLX5_SET(set_action_in, action, field, f->field);
1870
1871                 if (cmd == MLX5_ACTION_TYPE_SET) {
1872                         MLX5_SET(set_action_in, action, offset, first);
1873                         /* length is num of bits to be written, zero means length of 32 */
1874                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1875                 }
1876
1877                 if (field_bsize == 32)
1878                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1879                 else if (field_bsize == 16)
1880                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1881                 else if (field_bsize == 8)
1882                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1883
1884                 action += action_size;
1885                 nactions++;
1886         }
1887
1888         parse_attr->num_mod_hdr_actions = nactions;
1889         return 0;
1890 }
1891
1892 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1893                                  const struct tc_action *a, int namespace,
1894                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1895 {
1896         int nkeys, action_size, max_actions;
1897
1898         nkeys = tcf_pedit_nkeys(a);
1899         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1900
1901         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1902                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1903         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1904                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1905
1906         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1907         max_actions = min(max_actions, nkeys * 16);
1908
1909         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1910         if (!parse_attr->mod_hdr_actions)
1911                 return -ENOMEM;
1912
1913         parse_attr->num_mod_hdr_actions = max_actions;
1914         return 0;
1915 }
1916
1917 static const struct pedit_headers zero_masks = {};
1918
1919 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1920                                  const struct tc_action *a, int namespace,
1921                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
1922                                  struct netlink_ext_ack *extack)
1923 {
1924         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1925         int nkeys, i, err = -EOPNOTSUPP;
1926         u32 mask, val, offset;
1927         u8 cmd, htype;
1928
1929         nkeys = tcf_pedit_nkeys(a);
1930
1931         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1932         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1933
1934         for (i = 0; i < nkeys; i++) {
1935                 htype = tcf_pedit_htype(a, i);
1936                 cmd = tcf_pedit_cmd(a, i);
1937                 err = -EOPNOTSUPP; /* can't be all optimistic */
1938
1939                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1940                         NL_SET_ERR_MSG_MOD(extack,
1941                                            "legacy pedit isn't offloaded");
1942                         goto out_err;
1943                 }
1944
1945                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1946                         NL_SET_ERR_MSG_MOD(extack, "pedit cmd isn't offloaded");
1947                         goto out_err;
1948                 }
1949
1950                 mask = tcf_pedit_mask(a, i);
1951                 val = tcf_pedit_val(a, i);
1952                 offset = tcf_pedit_offset(a, i);
1953
1954                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1955                 if (err)
1956                         goto out_err;
1957         }
1958
1959         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1960         if (err)
1961                 goto out_err;
1962
1963         err = offload_pedit_fields(masks, vals, parse_attr, extack);
1964         if (err < 0)
1965                 goto out_dealloc_parsed_actions;
1966
1967         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1968                 cmd_masks = &masks[cmd];
1969                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1970                         NL_SET_ERR_MSG_MOD(extack,
1971                                            "attempt to offload an unsupported field");
1972                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
1973                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1974                                        16, 1, cmd_masks, sizeof(zero_masks), true);
1975                         err = -EOPNOTSUPP;
1976                         goto out_dealloc_parsed_actions;
1977                 }
1978         }
1979
1980         return 0;
1981
1982 out_dealloc_parsed_actions:
1983         kfree(parse_attr->mod_hdr_actions);
1984 out_err:
1985         return err;
1986 }
1987
1988 static bool csum_offload_supported(struct mlx5e_priv *priv,
1989                                    u32 action,
1990                                    u32 update_flags,
1991                                    struct netlink_ext_ack *extack)
1992 {
1993         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1994                          TCA_CSUM_UPDATE_FLAG_UDP;
1995
1996         /*  The HW recalcs checksums only if re-writing headers */
1997         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1998                 NL_SET_ERR_MSG_MOD(extack,
1999                                    "TC csum action is only offloaded with pedit");
2000                 netdev_warn(priv->netdev,
2001                             "TC csum action is only offloaded with pedit\n");
2002                 return false;
2003         }
2004
2005         if (update_flags & ~prot_flags) {
2006                 NL_SET_ERR_MSG_MOD(extack,
2007                                    "can't offload TC csum action for some header/s");
2008                 netdev_warn(priv->netdev,
2009                             "can't offload TC csum action for some header/s - flags %#x\n",
2010                             update_flags);
2011                 return false;
2012         }
2013
2014         return true;
2015 }
2016
2017 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
2018                                           struct tcf_exts *exts,
2019                                           struct netlink_ext_ack *extack)
2020 {
2021         const struct tc_action *a;
2022         bool modify_ip_header;
2023         LIST_HEAD(actions);
2024         u8 htype, ip_proto;
2025         void *headers_v;
2026         u16 ethertype;
2027         int nkeys, i;
2028
2029         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
2030         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
2031
2032         /* for non-IP we only re-write MACs, so we're okay */
2033         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
2034                 goto out_ok;
2035
2036         modify_ip_header = false;
2037         tcf_exts_for_each_action(i, a, exts) {
2038                 int k;
2039
2040                 if (!is_tcf_pedit(a))
2041                         continue;
2042
2043                 nkeys = tcf_pedit_nkeys(a);
2044                 for (k = 0; k < nkeys; k++) {
2045                         htype = tcf_pedit_htype(a, k);
2046                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
2047                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
2048                                 modify_ip_header = true;
2049                                 break;
2050                         }
2051                 }
2052         }
2053
2054         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
2055         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
2056             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
2057                 NL_SET_ERR_MSG_MOD(extack,
2058                                    "can't offload re-write of non TCP/UDP");
2059                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
2060                 return false;
2061         }
2062
2063 out_ok:
2064         return true;
2065 }
2066
2067 static bool actions_match_supported(struct mlx5e_priv *priv,
2068                                     struct tcf_exts *exts,
2069                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
2070                                     struct mlx5e_tc_flow *flow,
2071                                     struct netlink_ext_ack *extack)
2072 {
2073         u32 actions;
2074
2075         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
2076                 actions = flow->esw_attr->action;
2077         else
2078                 actions = flow->nic_attr->action;
2079
2080         if (flow->flags & MLX5E_TC_FLOW_EGRESS &&
2081             !(actions & MLX5_FLOW_CONTEXT_ACTION_DECAP))
2082                 return false;
2083
2084         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
2085                 return modify_header_match_supported(&parse_attr->spec, exts,
2086                                                      extack);
2087
2088         return true;
2089 }
2090
2091 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
2092 {
2093         struct mlx5_core_dev *fmdev, *pmdev;
2094         u64 fsystem_guid, psystem_guid;
2095
2096         fmdev = priv->mdev;
2097         pmdev = peer_priv->mdev;
2098
2099         fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
2100         psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
2101
2102         return (fsystem_guid == psystem_guid);
2103 }
2104
2105 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2106                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2107                                 struct mlx5e_tc_flow *flow,
2108                                 struct netlink_ext_ack *extack)
2109 {
2110         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
2111         const struct tc_action *a;
2112         LIST_HEAD(actions);
2113         u32 action = 0;
2114         int err, i;
2115
2116         if (!tcf_exts_has_actions(exts))
2117                 return -EINVAL;
2118
2119         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
2120
2121         tcf_exts_for_each_action(i, a, exts) {
2122                 if (is_tcf_gact_shot(a)) {
2123                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
2124                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
2125                                                flow_table_properties_nic_receive.flow_counter))
2126                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
2127                         continue;
2128                 }
2129
2130                 if (is_tcf_pedit(a)) {
2131                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
2132                                                     parse_attr, extack);
2133                         if (err)
2134                                 return err;
2135
2136                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
2137                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2138                         continue;
2139                 }
2140
2141                 if (is_tcf_csum(a)) {
2142                         if (csum_offload_supported(priv, action,
2143                                                    tcf_csum_update_flags(a),
2144                                                    extack))
2145                                 continue;
2146
2147                         return -EOPNOTSUPP;
2148                 }
2149
2150                 if (is_tcf_mirred_egress_redirect(a)) {
2151                         struct net_device *peer_dev = tcf_mirred_dev(a);
2152
2153                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
2154                             same_hw_devs(priv, netdev_priv(peer_dev))) {
2155                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
2156                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2157                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2158                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2159                         } else {
2160                                 NL_SET_ERR_MSG_MOD(extack,
2161                                                    "device is not on same HW, can't offload");
2162                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2163                                             peer_dev->name);
2164                                 return -EINVAL;
2165                         }
2166                         continue;
2167                 }
2168
2169                 if (is_tcf_skbedit_mark(a)) {
2170                         u32 mark = tcf_skbedit_mark(a);
2171
2172                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2173                                 NL_SET_ERR_MSG_MOD(extack,
2174                                                    "Bad flow mark - only 16 bit is supported");
2175                                 return -EINVAL;
2176                         }
2177
2178                         attr->flow_tag = mark;
2179                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2180                         continue;
2181                 }
2182
2183                 return -EINVAL;
2184         }
2185
2186         attr->action = action;
2187         if (!actions_match_supported(priv, exts, parse_attr, flow, extack))
2188                 return -EOPNOTSUPP;
2189
2190         return 0;
2191 }
2192
2193 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2194                                  struct ip_tunnel_key *b)
2195 {
2196         return memcmp(a, b, sizeof(*a));
2197 }
2198
2199 static inline int hash_encap_info(struct ip_tunnel_key *key)
2200 {
2201         return jhash(key, sizeof(*key), 0);
2202 }
2203
2204 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2205                                    struct net_device *mirred_dev,
2206                                    struct net_device **out_dev,
2207                                    struct flowi4 *fl4,
2208                                    struct neighbour **out_n,
2209                                    u8 *out_ttl)
2210 {
2211         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2212         struct mlx5e_rep_priv *uplink_rpriv;
2213         struct rtable *rt;
2214         struct neighbour *n = NULL;
2215
2216 #if IS_ENABLED(CONFIG_INET)
2217         int ret;
2218
2219         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2220         ret = PTR_ERR_OR_ZERO(rt);
2221         if (ret)
2222                 return ret;
2223 #else
2224         return -EOPNOTSUPP;
2225 #endif
2226         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2227         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2228         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2229                 *out_dev = uplink_rpriv->netdev;
2230         else
2231                 *out_dev = rt->dst.dev;
2232
2233         if (!(*out_ttl))
2234                 *out_ttl = ip4_dst_hoplimit(&rt->dst);
2235         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2236         ip_rt_put(rt);
2237         if (!n)
2238                 return -ENOMEM;
2239
2240         *out_n = n;
2241         return 0;
2242 }
2243
2244 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2245                                   struct net_device *peer_netdev)
2246 {
2247         struct mlx5e_priv *peer_priv;
2248
2249         peer_priv = netdev_priv(peer_netdev);
2250
2251         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2252                 (priv->netdev->netdev_ops == peer_netdev->netdev_ops) &&
2253                 same_hw_devs(priv, peer_priv) &&
2254                 MLX5_VPORT_MANAGER(peer_priv->mdev) &&
2255                 (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS));
2256 }
2257
2258 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2259                                    struct net_device *mirred_dev,
2260                                    struct net_device **out_dev,
2261                                    struct flowi6 *fl6,
2262                                    struct neighbour **out_n,
2263                                    u8 *out_ttl)
2264 {
2265         struct neighbour *n = NULL;
2266         struct dst_entry *dst;
2267
2268 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2269         struct mlx5e_rep_priv *uplink_rpriv;
2270         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2271         int ret;
2272
2273         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2274                                          fl6);
2275         if (ret < 0)
2276                 return ret;
2277
2278         if (!(*out_ttl))
2279                 *out_ttl = ip6_dst_hoplimit(dst);
2280
2281         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2282         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2283         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2284                 *out_dev = uplink_rpriv->netdev;
2285         else
2286                 *out_dev = dst->dev;
2287 #else
2288         return -EOPNOTSUPP;
2289 #endif
2290
2291         n = dst_neigh_lookup(dst, &fl6->daddr);
2292         dst_release(dst);
2293         if (!n)
2294                 return -ENOMEM;
2295
2296         *out_n = n;
2297         return 0;
2298 }
2299
2300 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2301                                   char buf[], int encap_size,
2302                                   unsigned char h_dest[ETH_ALEN],
2303                                   u8 tos, u8 ttl,
2304                                   __be32 daddr,
2305                                   __be32 saddr,
2306                                   __be16 udp_dst_port,
2307                                   __be32 vx_vni)
2308 {
2309         struct ethhdr *eth = (struct ethhdr *)buf;
2310         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2311         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2312         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2313
2314         memset(buf, 0, encap_size);
2315
2316         ether_addr_copy(eth->h_dest, h_dest);
2317         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2318         eth->h_proto = htons(ETH_P_IP);
2319
2320         ip->daddr = daddr;
2321         ip->saddr = saddr;
2322
2323         ip->tos = tos;
2324         ip->ttl = ttl;
2325         ip->protocol = IPPROTO_UDP;
2326         ip->version = 0x4;
2327         ip->ihl = 0x5;
2328
2329         udp->dest = udp_dst_port;
2330         vxh->vx_flags = VXLAN_HF_VNI;
2331         vxh->vx_vni = vxlan_vni_field(vx_vni);
2332 }
2333
2334 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2335                                   char buf[], int encap_size,
2336                                   unsigned char h_dest[ETH_ALEN],
2337                                   u8 tos, u8 ttl,
2338                                   struct in6_addr *daddr,
2339                                   struct in6_addr *saddr,
2340                                   __be16 udp_dst_port,
2341                                   __be32 vx_vni)
2342 {
2343         struct ethhdr *eth = (struct ethhdr *)buf;
2344         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2345         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2346         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2347
2348         memset(buf, 0, encap_size);
2349
2350         ether_addr_copy(eth->h_dest, h_dest);
2351         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2352         eth->h_proto = htons(ETH_P_IPV6);
2353
2354         ip6_flow_hdr(ip6h, tos, 0);
2355         /* the HW fills up ipv6 payload len */
2356         ip6h->nexthdr     = IPPROTO_UDP;
2357         ip6h->hop_limit   = ttl;
2358         ip6h->daddr       = *daddr;
2359         ip6h->saddr       = *saddr;
2360
2361         udp->dest = udp_dst_port;
2362         vxh->vx_flags = VXLAN_HF_VNI;
2363         vxh->vx_vni = vxlan_vni_field(vx_vni);
2364 }
2365
2366 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2367                                           struct net_device *mirred_dev,
2368                                           struct mlx5e_encap_entry *e)
2369 {
2370         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2371         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2372         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2373         struct net_device *out_dev;
2374         struct neighbour *n = NULL;
2375         struct flowi4 fl4 = {};
2376         u8 nud_state, tos, ttl;
2377         char *encap_header;
2378         int err;
2379
2380         if (max_encap_size < ipv4_encap_size) {
2381                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2382                                ipv4_encap_size, max_encap_size);
2383                 return -EOPNOTSUPP;
2384         }
2385
2386         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2387         if (!encap_header)
2388                 return -ENOMEM;
2389
2390         switch (e->tunnel_type) {
2391         case MLX5_HEADER_TYPE_VXLAN:
2392                 fl4.flowi4_proto = IPPROTO_UDP;
2393                 fl4.fl4_dport = tun_key->tp_dst;
2394                 break;
2395         default:
2396                 err = -EOPNOTSUPP;
2397                 goto free_encap;
2398         }
2399
2400         tos = tun_key->tos;
2401         ttl = tun_key->ttl;
2402
2403         fl4.flowi4_tos = tun_key->tos;
2404         fl4.daddr = tun_key->u.ipv4.dst;
2405         fl4.saddr = tun_key->u.ipv4.src;
2406
2407         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2408                                       &fl4, &n, &ttl);
2409         if (err)
2410                 goto free_encap;
2411
2412         /* used by mlx5e_detach_encap to lookup a neigh hash table
2413          * entry in the neigh hash table when a user deletes a rule
2414          */
2415         e->m_neigh.dev = n->dev;
2416         e->m_neigh.family = n->ops->family;
2417         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2418         e->out_dev = out_dev;
2419
2420         /* It's importent to add the neigh to the hash table before checking
2421          * the neigh validity state. So if we'll get a notification, in case the
2422          * neigh changes it's validity state, we would find the relevant neigh
2423          * in the hash.
2424          */
2425         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2426         if (err)
2427                 goto free_encap;
2428
2429         read_lock_bh(&n->lock);
2430         nud_state = n->nud_state;
2431         ether_addr_copy(e->h_dest, n->ha);
2432         read_unlock_bh(&n->lock);
2433
2434         switch (e->tunnel_type) {
2435         case MLX5_HEADER_TYPE_VXLAN:
2436                 gen_vxlan_header_ipv4(out_dev, encap_header,
2437                                       ipv4_encap_size, e->h_dest, tos, ttl,
2438                                       fl4.daddr,
2439                                       fl4.saddr, tun_key->tp_dst,
2440                                       tunnel_id_to_key32(tun_key->tun_id));
2441                 break;
2442         default:
2443                 err = -EOPNOTSUPP;
2444                 goto destroy_neigh_entry;
2445         }
2446         e->encap_size = ipv4_encap_size;
2447         e->encap_header = encap_header;
2448
2449         if (!(nud_state & NUD_VALID)) {
2450                 neigh_event_send(n, NULL);
2451                 err = -EAGAIN;
2452                 goto out;
2453         }
2454
2455         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2456                                ipv4_encap_size, encap_header, &e->encap_id);
2457         if (err)
2458                 goto destroy_neigh_entry;
2459
2460         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2461         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2462         neigh_release(n);
2463         return err;
2464
2465 destroy_neigh_entry:
2466         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2467 free_encap:
2468         kfree(encap_header);
2469 out:
2470         if (n)
2471                 neigh_release(n);
2472         return err;
2473 }
2474
2475 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2476                                           struct net_device *mirred_dev,
2477                                           struct mlx5e_encap_entry *e)
2478 {
2479         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2480         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2481         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2482         struct net_device *out_dev;
2483         struct neighbour *n = NULL;
2484         struct flowi6 fl6 = {};
2485         u8 nud_state, tos, ttl;
2486         char *encap_header;
2487         int err;
2488
2489         if (max_encap_size < ipv6_encap_size) {
2490                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2491                                ipv6_encap_size, max_encap_size);
2492                 return -EOPNOTSUPP;
2493         }
2494
2495         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2496         if (!encap_header)
2497                 return -ENOMEM;
2498
2499         switch (e->tunnel_type) {
2500         case MLX5_HEADER_TYPE_VXLAN:
2501                 fl6.flowi6_proto = IPPROTO_UDP;
2502                 fl6.fl6_dport = tun_key->tp_dst;
2503                 break;
2504         default:
2505                 err = -EOPNOTSUPP;
2506                 goto free_encap;
2507         }
2508
2509         tos = tun_key->tos;
2510         ttl = tun_key->ttl;
2511
2512         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2513         fl6.daddr = tun_key->u.ipv6.dst;
2514         fl6.saddr = tun_key->u.ipv6.src;
2515
2516         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2517                                       &fl6, &n, &ttl);
2518         if (err)
2519                 goto free_encap;
2520
2521         /* used by mlx5e_detach_encap to lookup a neigh hash table
2522          * entry in the neigh hash table when a user deletes a rule
2523          */
2524         e->m_neigh.dev = n->dev;
2525         e->m_neigh.family = n->ops->family;
2526         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2527         e->out_dev = out_dev;
2528
2529         /* It's importent to add the neigh to the hash table before checking
2530          * the neigh validity state. So if we'll get a notification, in case the
2531          * neigh changes it's validity state, we would find the relevant neigh
2532          * in the hash.
2533          */
2534         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2535         if (err)
2536                 goto free_encap;
2537
2538         read_lock_bh(&n->lock);
2539         nud_state = n->nud_state;
2540         ether_addr_copy(e->h_dest, n->ha);
2541         read_unlock_bh(&n->lock);
2542
2543         switch (e->tunnel_type) {
2544         case MLX5_HEADER_TYPE_VXLAN:
2545                 gen_vxlan_header_ipv6(out_dev, encap_header,
2546                                       ipv6_encap_size, e->h_dest, tos, ttl,
2547                                       &fl6.daddr,
2548                                       &fl6.saddr, tun_key->tp_dst,
2549                                       tunnel_id_to_key32(tun_key->tun_id));
2550                 break;
2551         default:
2552                 err = -EOPNOTSUPP;
2553                 goto destroy_neigh_entry;
2554         }
2555
2556         e->encap_size = ipv6_encap_size;
2557         e->encap_header = encap_header;
2558
2559         if (!(nud_state & NUD_VALID)) {
2560                 neigh_event_send(n, NULL);
2561                 err = -EAGAIN;
2562                 goto out;
2563         }
2564
2565         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2566                                ipv6_encap_size, encap_header, &e->encap_id);
2567         if (err)
2568                 goto destroy_neigh_entry;
2569
2570         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2571         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2572         neigh_release(n);
2573         return err;
2574
2575 destroy_neigh_entry:
2576         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2577 free_encap:
2578         kfree(encap_header);
2579 out:
2580         if (n)
2581                 neigh_release(n);
2582         return err;
2583 }
2584
2585 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2586                               struct ip_tunnel_info *tun_info,
2587                               struct net_device *mirred_dev,
2588                               struct net_device **encap_dev,
2589                               struct mlx5e_tc_flow *flow,
2590                               struct netlink_ext_ack *extack)
2591 {
2592         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2593         unsigned short family = ip_tunnel_info_af(tun_info);
2594         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2595         struct ip_tunnel_key *key = &tun_info->key;
2596         struct mlx5e_encap_entry *e;
2597         int tunnel_type, err = 0;
2598         uintptr_t hash_key;
2599         bool found = false;
2600
2601         /* udp dst port must be set */
2602         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2603                 goto vxlan_encap_offload_err;
2604
2605         /* setting udp src port isn't supported */
2606         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2607 vxlan_encap_offload_err:
2608                 NL_SET_ERR_MSG_MOD(extack,
2609                                    "must set udp dst port and not set udp src port");
2610                 netdev_warn(priv->netdev,
2611                             "must set udp dst port and not set udp src port\n");
2612                 return -EOPNOTSUPP;
2613         }
2614
2615         if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) &&
2616             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2617                 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
2618         } else {
2619                 NL_SET_ERR_MSG_MOD(extack,
2620                                    "port isn't an offloaded vxlan udp dport");
2621                 netdev_warn(priv->netdev,
2622                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2623                 return -EOPNOTSUPP;
2624         }
2625
2626         hash_key = hash_encap_info(key);
2627
2628         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2629                                    encap_hlist, hash_key) {
2630                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2631                         found = true;
2632                         break;
2633                 }
2634         }
2635
2636         /* must verify if encap is valid or not */
2637         if (found)
2638                 goto attach_flow;
2639
2640         e = kzalloc(sizeof(*e), GFP_KERNEL);
2641         if (!e)
2642                 return -ENOMEM;
2643
2644         e->tun_info = *tun_info;
2645         e->tunnel_type = tunnel_type;
2646         INIT_LIST_HEAD(&e->flows);
2647
2648         if (family == AF_INET)
2649                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2650         else if (family == AF_INET6)
2651                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2652
2653         if (err && err != -EAGAIN)
2654                 goto out_err;
2655
2656         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2657
2658 attach_flow:
2659         list_add(&flow->encap, &e->flows);
2660         *encap_dev = e->out_dev;
2661         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2662                 attr->encap_id = e->encap_id;
2663         else
2664                 err = -EAGAIN;
2665
2666         return err;
2667
2668 out_err:
2669         kfree(e);
2670         return err;
2671 }
2672
2673 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
2674                                 const struct tc_action *a,
2675                                 struct mlx5_esw_flow_attr *attr,
2676                                 u32 *action)
2677 {
2678         u8 vlan_idx = attr->total_vlan;
2679
2680         if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
2681                 return -EOPNOTSUPP;
2682
2683         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2684                 if (vlan_idx) {
2685                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2686                                                                  MLX5_FS_VLAN_DEPTH))
2687                                 return -EOPNOTSUPP;
2688
2689                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
2690                 } else {
2691                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2692                 }
2693         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2694                 attr->vlan_vid[vlan_idx] = tcf_vlan_push_vid(a);
2695                 attr->vlan_prio[vlan_idx] = tcf_vlan_push_prio(a);
2696                 attr->vlan_proto[vlan_idx] = tcf_vlan_push_proto(a);
2697                 if (!attr->vlan_proto[vlan_idx])
2698                         attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
2699
2700                 if (vlan_idx) {
2701                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2702                                                                  MLX5_FS_VLAN_DEPTH))
2703                                 return -EOPNOTSUPP;
2704
2705                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
2706                 } else {
2707                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
2708                             (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2709                              tcf_vlan_push_prio(a)))
2710                                 return -EOPNOTSUPP;
2711
2712                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2713                 }
2714         } else { /* action is TCA_VLAN_ACT_MODIFY */
2715                 return -EOPNOTSUPP;
2716         }
2717
2718         attr->total_vlan = vlan_idx + 1;
2719
2720         return 0;
2721 }
2722
2723 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2724                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2725                                 struct mlx5e_tc_flow *flow,
2726                                 struct netlink_ext_ack *extack)
2727 {
2728         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2729         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2730         struct ip_tunnel_info *info = NULL;
2731         const struct tc_action *a;
2732         LIST_HEAD(actions);
2733         bool encap = false;
2734         u32 action = 0;
2735         int err, i;
2736
2737         if (!tcf_exts_has_actions(exts))
2738                 return -EINVAL;
2739
2740         attr->in_rep = rpriv->rep;
2741         attr->in_mdev = priv->mdev;
2742
2743         tcf_exts_for_each_action(i, a, exts) {
2744                 if (is_tcf_gact_shot(a)) {
2745                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2746                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2747                         continue;
2748                 }
2749
2750                 if (is_tcf_pedit(a)) {
2751                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2752                                                     parse_attr, extack);
2753                         if (err)
2754                                 return err;
2755
2756                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2757                         attr->mirror_count = attr->out_count;
2758                         continue;
2759                 }
2760
2761                 if (is_tcf_csum(a)) {
2762                         if (csum_offload_supported(priv, action,
2763                                                    tcf_csum_update_flags(a),
2764                                                    extack))
2765                                 continue;
2766
2767                         return -EOPNOTSUPP;
2768                 }
2769
2770                 if (is_tcf_mirred_egress_redirect(a) || is_tcf_mirred_egress_mirror(a)) {
2771                         struct mlx5e_priv *out_priv;
2772                         struct net_device *out_dev;
2773
2774                         out_dev = tcf_mirred_dev(a);
2775
2776                         if (attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
2777                                 NL_SET_ERR_MSG_MOD(extack,
2778                                                    "can't support more output ports, can't offload forwarding");
2779                                 pr_err("can't support more than %d output ports, can't offload forwarding\n",
2780                                        attr->out_count);
2781                                 return -EOPNOTSUPP;
2782                         }
2783
2784                         if (switchdev_port_same_parent_id(priv->netdev,
2785                                                           out_dev) ||
2786                             is_merged_eswitch_dev(priv, out_dev)) {
2787                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2788                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2789                                 out_priv = netdev_priv(out_dev);
2790                                 rpriv = out_priv->ppriv;
2791                                 attr->out_rep[attr->out_count] = rpriv->rep;
2792                                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
2793                         } else if (encap) {
2794                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2795                                 parse_attr->tun_info = *info;
2796                                 attr->parse_attr = parse_attr;
2797                                 action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
2798                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2799                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2800                                 /* attr->out_rep is resolved when we handle encap */
2801                         } else {
2802                                 NL_SET_ERR_MSG_MOD(extack,
2803                                                    "devices are not on same switch HW, can't offload forwarding");
2804                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2805                                        priv->netdev->name, out_dev->name);
2806                                 return -EINVAL;
2807                         }
2808                         continue;
2809                 }
2810
2811                 if (is_tcf_tunnel_set(a)) {
2812                         info = tcf_tunnel_info(a);
2813                         if (info)
2814                                 encap = true;
2815                         else
2816                                 return -EOPNOTSUPP;
2817                         attr->mirror_count = attr->out_count;
2818                         continue;
2819                 }
2820
2821                 if (is_tcf_vlan(a)) {
2822                         err = parse_tc_vlan_action(priv, a, attr, &action);
2823
2824                         if (err)
2825                                 return err;
2826
2827                         attr->mirror_count = attr->out_count;
2828                         continue;
2829                 }
2830