2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <net/flow_dissector.h>
34 #include <net/sch_generic.h>
35 #include <net/pkt_cls.h>
36 #include <net/tc_act/tc_gact.h>
37 #include <net/tc_act/tc_skbedit.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/device.h>
40 #include <linux/rhashtable.h>
41 #include <net/switchdev.h>
42 #include <net/tc_act/tc_mirred.h>
43 #include <net/tc_act/tc_vlan.h>
44 #include <net/tc_act/tc_tunnel_key.h>
45 #include <net/vxlan.h>
51 struct mlx5e_tc_flow {
52 struct rhash_head node;
54 struct mlx5_flow_handle *rule;
55 struct list_head encap; /* flows sharing the same encap */
56 struct mlx5_esw_flow_attr *attr;
60 MLX5_HEADER_TYPE_VXLAN = 0x0,
61 MLX5_HEADER_TYPE_NVGRE = 0x1,
64 #define MLX5E_TC_TABLE_NUM_ENTRIES 1024
65 #define MLX5E_TC_TABLE_NUM_GROUPS 4
67 static struct mlx5_flow_handle *
68 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
69 struct mlx5_flow_spec *spec,
70 u32 action, u32 flow_tag)
72 struct mlx5_core_dev *dev = priv->mdev;
73 struct mlx5_flow_destination dest = { 0 };
74 struct mlx5_flow_act flow_act = {
79 struct mlx5_fc *counter = NULL;
80 struct mlx5_flow_handle *rule;
81 bool table_created = false;
83 if (action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
84 dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
85 dest.ft = priv->fs.vlan.ft.t;
86 } else if (action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
87 counter = mlx5_fc_create(dev, true);
89 return ERR_CAST(counter);
91 dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
92 dest.counter = counter;
95 if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
97 mlx5_create_auto_grouped_flow_table(priv->fs.ns,
99 MLX5E_TC_TABLE_NUM_ENTRIES,
100 MLX5E_TC_TABLE_NUM_GROUPS,
102 if (IS_ERR(priv->fs.tc.t)) {
103 netdev_err(priv->netdev,
104 "Failed to create tc offload table\n");
105 rule = ERR_CAST(priv->fs.tc.t);
109 table_created = true;
112 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
113 rule = mlx5_add_flow_rules(priv->fs.tc.t, spec, &flow_act, &dest, 1);
122 mlx5_destroy_flow_table(priv->fs.tc.t);
123 priv->fs.tc.t = NULL;
126 mlx5_fc_destroy(dev, counter);
131 static struct mlx5_flow_handle *
132 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
133 struct mlx5_flow_spec *spec,
134 struct mlx5_esw_flow_attr *attr)
136 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
139 err = mlx5_eswitch_add_vlan_action(esw, attr);
143 return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
146 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
147 struct mlx5e_tc_flow *flow) {
148 struct list_head *next = flow->encap.next;
150 list_del(&flow->encap);
151 if (list_empty(next)) {
152 struct mlx5_encap_entry *e;
154 e = list_entry(next, struct mlx5_encap_entry, flows);
156 mlx5_encap_dealloc(priv->mdev, e->encap_id);
159 hlist_del_rcu(&e->encap_hlist);
164 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
165 struct mlx5e_tc_flow *flow)
167 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
168 struct mlx5_fc *counter = NULL;
170 counter = mlx5_flow_rule_counter(flow->rule);
172 mlx5_del_flow_rules(flow->rule);
174 if (esw && esw->mode == SRIOV_OFFLOADS) {
175 mlx5_eswitch_del_vlan_action(esw, flow->attr);
176 if (flow->attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
177 mlx5e_detach_encap(priv, flow);
180 mlx5_fc_destroy(priv->mdev, counter);
182 if (!mlx5e_tc_num_filters(priv) && (priv->fs.tc.t)) {
183 mlx5_destroy_flow_table(priv->fs.tc.t);
184 priv->fs.tc.t = NULL;
188 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
189 struct tc_cls_flower_offload *f)
191 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
193 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
195 void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
197 void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
200 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
201 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
203 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
204 struct flow_dissector_key_keyid *key =
205 skb_flow_dissector_target(f->dissector,
206 FLOW_DISSECTOR_KEY_ENC_KEYID,
208 struct flow_dissector_key_keyid *mask =
209 skb_flow_dissector_target(f->dissector,
210 FLOW_DISSECTOR_KEY_ENC_KEYID,
212 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
213 be32_to_cpu(mask->keyid));
214 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
215 be32_to_cpu(key->keyid));
219 static int parse_tunnel_attr(struct mlx5e_priv *priv,
220 struct mlx5_flow_spec *spec,
221 struct tc_cls_flower_offload *f)
223 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
225 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
228 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
229 struct flow_dissector_key_ports *key =
230 skb_flow_dissector_target(f->dissector,
231 FLOW_DISSECTOR_KEY_ENC_PORTS,
233 struct flow_dissector_key_ports *mask =
234 skb_flow_dissector_target(f->dissector,
235 FLOW_DISSECTOR_KEY_ENC_PORTS,
238 /* Full udp dst port must be given */
239 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
240 goto vxlan_match_offload_err;
242 if (mlx5e_vxlan_lookup_port(priv, be16_to_cpu(key->dst)) &&
243 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
244 parse_vxlan_attr(spec, f);
246 netdev_warn(priv->netdev,
247 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
251 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
252 udp_dport, ntohs(mask->dst));
253 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
254 udp_dport, ntohs(key->dst));
256 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
257 udp_sport, ntohs(mask->src));
258 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
259 udp_sport, ntohs(key->src));
260 } else { /* udp dst port must be given */
261 vxlan_match_offload_err:
262 netdev_warn(priv->netdev,
263 "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
267 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS)) {
268 struct flow_dissector_key_ipv4_addrs *key =
269 skb_flow_dissector_target(f->dissector,
270 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
272 struct flow_dissector_key_ipv4_addrs *mask =
273 skb_flow_dissector_target(f->dissector,
274 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
276 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
277 src_ipv4_src_ipv6.ipv4_layout.ipv4,
279 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
280 src_ipv4_src_ipv6.ipv4_layout.ipv4,
283 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
284 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
286 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
287 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
291 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
292 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
294 /* Enforce DMAC when offloading incoming tunneled flows.
295 * Flow counters require a match on the DMAC.
297 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
298 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
299 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
300 dmac_47_16), priv->netdev->dev_addr);
302 /* let software handle IP fragments */
303 MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
304 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
309 static int __parse_cls_flower(struct mlx5e_priv *priv,
310 struct mlx5_flow_spec *spec,
311 struct tc_cls_flower_offload *f,
314 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
316 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
321 *min_inline = MLX5_INLINE_MODE_L2;
323 if (f->dissector->used_keys &
324 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
325 BIT(FLOW_DISSECTOR_KEY_BASIC) |
326 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
327 BIT(FLOW_DISSECTOR_KEY_VLAN) |
328 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
329 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
330 BIT(FLOW_DISSECTOR_KEY_PORTS) |
331 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
332 BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
333 BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
334 BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
335 BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL))) {
336 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
337 f->dissector->used_keys);
341 if ((dissector_uses_key(f->dissector,
342 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
343 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
344 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
345 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
346 struct flow_dissector_key_control *key =
347 skb_flow_dissector_target(f->dissector,
348 FLOW_DISSECTOR_KEY_ENC_CONTROL,
350 switch (key->addr_type) {
351 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
352 if (parse_tunnel_attr(priv, spec, f))
355 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
356 netdev_warn(priv->netdev,
357 "IPv6 tunnel decap offload isn't supported\n");
362 /* In decap flow, header pointers should point to the inner
363 * headers, outer header were already set by parse_tunnel_attr
365 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
367 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
371 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
372 struct flow_dissector_key_control *key =
373 skb_flow_dissector_target(f->dissector,
374 FLOW_DISSECTOR_KEY_CONTROL,
377 struct flow_dissector_key_control *mask =
378 skb_flow_dissector_target(f->dissector,
379 FLOW_DISSECTOR_KEY_CONTROL,
381 addr_type = key->addr_type;
383 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
384 MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
385 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
386 key->flags & FLOW_DIS_IS_FRAGMENT);
390 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
391 struct flow_dissector_key_basic *key =
392 skb_flow_dissector_target(f->dissector,
393 FLOW_DISSECTOR_KEY_BASIC,
395 struct flow_dissector_key_basic *mask =
396 skb_flow_dissector_target(f->dissector,
397 FLOW_DISSECTOR_KEY_BASIC,
399 ip_proto = key->ip_proto;
401 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
402 ntohs(mask->n_proto));
403 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
404 ntohs(key->n_proto));
406 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
408 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
412 *min_inline = MLX5_INLINE_MODE_IP;
415 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
416 struct flow_dissector_key_eth_addrs *key =
417 skb_flow_dissector_target(f->dissector,
418 FLOW_DISSECTOR_KEY_ETH_ADDRS,
420 struct flow_dissector_key_eth_addrs *mask =
421 skb_flow_dissector_target(f->dissector,
422 FLOW_DISSECTOR_KEY_ETH_ADDRS,
425 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
428 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
432 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
435 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
440 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
441 struct flow_dissector_key_vlan *key =
442 skb_flow_dissector_target(f->dissector,
443 FLOW_DISSECTOR_KEY_VLAN,
445 struct flow_dissector_key_vlan *mask =
446 skb_flow_dissector_target(f->dissector,
447 FLOW_DISSECTOR_KEY_VLAN,
449 if (mask->vlan_id || mask->vlan_priority) {
450 MLX5_SET(fte_match_set_lyr_2_4, headers_c, vlan_tag, 1);
451 MLX5_SET(fte_match_set_lyr_2_4, headers_v, vlan_tag, 1);
453 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
454 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
456 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
457 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
461 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
462 struct flow_dissector_key_ipv4_addrs *key =
463 skb_flow_dissector_target(f->dissector,
464 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
466 struct flow_dissector_key_ipv4_addrs *mask =
467 skb_flow_dissector_target(f->dissector,
468 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
471 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
472 src_ipv4_src_ipv6.ipv4_layout.ipv4),
473 &mask->src, sizeof(mask->src));
474 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
475 src_ipv4_src_ipv6.ipv4_layout.ipv4),
476 &key->src, sizeof(key->src));
477 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
478 dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
479 &mask->dst, sizeof(mask->dst));
480 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
481 dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
482 &key->dst, sizeof(key->dst));
484 if (mask->src || mask->dst)
485 *min_inline = MLX5_INLINE_MODE_IP;
488 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
489 struct flow_dissector_key_ipv6_addrs *key =
490 skb_flow_dissector_target(f->dissector,
491 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
493 struct flow_dissector_key_ipv6_addrs *mask =
494 skb_flow_dissector_target(f->dissector,
495 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
498 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
499 src_ipv4_src_ipv6.ipv6_layout.ipv6),
500 &mask->src, sizeof(mask->src));
501 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
502 src_ipv4_src_ipv6.ipv6_layout.ipv6),
503 &key->src, sizeof(key->src));
505 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
506 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
507 &mask->dst, sizeof(mask->dst));
508 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
509 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
510 &key->dst, sizeof(key->dst));
512 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
513 ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
514 *min_inline = MLX5_INLINE_MODE_IP;
517 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
518 struct flow_dissector_key_ports *key =
519 skb_flow_dissector_target(f->dissector,
520 FLOW_DISSECTOR_KEY_PORTS,
522 struct flow_dissector_key_ports *mask =
523 skb_flow_dissector_target(f->dissector,
524 FLOW_DISSECTOR_KEY_PORTS,
528 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
529 tcp_sport, ntohs(mask->src));
530 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
531 tcp_sport, ntohs(key->src));
533 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
534 tcp_dport, ntohs(mask->dst));
535 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
536 tcp_dport, ntohs(key->dst));
540 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
541 udp_sport, ntohs(mask->src));
542 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
543 udp_sport, ntohs(key->src));
545 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
546 udp_dport, ntohs(mask->dst));
547 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
548 udp_dport, ntohs(key->dst));
551 netdev_err(priv->netdev,
552 "Only UDP and TCP transport are supported\n");
556 if (mask->src || mask->dst)
557 *min_inline = MLX5_INLINE_MODE_TCP_UDP;
563 static int parse_cls_flower(struct mlx5e_priv *priv,
564 struct mlx5_flow_spec *spec,
565 struct tc_cls_flower_offload *f)
567 struct mlx5_core_dev *dev = priv->mdev;
568 struct mlx5_eswitch *esw = dev->priv.eswitch;
569 struct mlx5_eswitch_rep *rep = priv->ppriv;
573 err = __parse_cls_flower(priv, spec, f, &min_inline);
575 if (!err && esw->mode == SRIOV_OFFLOADS &&
576 rep->vport != FDB_UPLINK_VPORT) {
577 if (min_inline > esw->offloads.inline_mode) {
578 netdev_warn(priv->netdev,
579 "Flow is not offloaded due to min inline setting, required %d actual %d\n",
580 min_inline, esw->offloads.inline_mode);
588 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
589 u32 *action, u32 *flow_tag)
591 const struct tc_action *a;
594 if (tc_no_actions(exts))
597 *flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
600 tcf_exts_to_list(exts, &actions);
601 list_for_each_entry(a, &actions, list) {
602 /* Only support a single action per rule */
606 if (is_tcf_gact_shot(a)) {
607 *action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
608 if (MLX5_CAP_FLOWTABLE(priv->mdev,
609 flow_table_properties_nic_receive.flow_counter))
610 *action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
614 if (is_tcf_skbedit_mark(a)) {
615 u32 mark = tcf_skbedit_mark(a);
617 if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
618 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
624 *action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
634 static inline int cmp_encap_info(struct mlx5_encap_info *a,
635 struct mlx5_encap_info *b)
637 return memcmp(a, b, sizeof(*a));
640 static inline int hash_encap_info(struct mlx5_encap_info *info)
642 return jhash(info, sizeof(*info), 0);
645 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
646 struct net_device *mirred_dev,
647 struct net_device **out_dev,
649 struct neighbour **out_n,
654 struct neighbour *n = NULL;
657 #if IS_ENABLED(CONFIG_INET)
658 rt = ip_route_output_key(dev_net(mirred_dev), fl4);
660 pr_warn("%s: no route to %pI4\n", __func__, &fl4->daddr);
667 if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev)) {
668 pr_warn("%s: Can't offload the flow, netdevices aren't on the same HW e-switch\n",
674 ttl = ip4_dst_hoplimit(&rt->dst);
675 n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
683 *out_dev = rt->dst.dev;
688 static int gen_vxlan_header_ipv4(struct net_device *out_dev,
690 unsigned char h_dest[ETH_ALEN],
697 int encap_size = VXLAN_HLEN + sizeof(struct iphdr) + ETH_HLEN;
698 struct ethhdr *eth = (struct ethhdr *)buf;
699 struct iphdr *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
700 struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
701 struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
703 memset(buf, 0, encap_size);
705 ether_addr_copy(eth->h_dest, h_dest);
706 ether_addr_copy(eth->h_source, out_dev->dev_addr);
707 eth->h_proto = htons(ETH_P_IP);
713 ip->protocol = IPPROTO_UDP;
717 udp->dest = udp_dst_port;
718 vxh->vx_flags = VXLAN_HF_VNI;
719 vxh->vx_vni = vxlan_vni_field(vx_vni);
724 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
725 struct net_device *mirred_dev,
726 struct mlx5_encap_entry *e,
727 struct net_device **out_dev)
729 int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
730 struct flowi4 fl4 = {};
738 encap_header = kzalloc(max_encap_size, GFP_KERNEL);
742 switch (e->tunnel_type) {
743 case MLX5_HEADER_TYPE_VXLAN:
744 fl4.flowi4_proto = IPPROTO_UDP;
745 fl4.fl4_dport = e->tun_info.tp_dst;
751 fl4.daddr = e->tun_info.daddr;
753 err = mlx5e_route_lookup_ipv4(priv, mirred_dev, out_dev,
754 &fl4, &n, &saddr, &ttl);
759 e->out_dev = *out_dev;
761 if (!(n->nud_state & NUD_VALID)) {
766 neigh_ha_snapshot(e->h_dest, n, *out_dev);
768 switch (e->tunnel_type) {
769 case MLX5_HEADER_TYPE_VXLAN:
770 encap_size = gen_vxlan_header_ipv4(*out_dev, encap_header,
773 saddr, e->tun_info.tp_dst,
781 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
782 encap_size, encap_header, &e->encap_id);
788 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
789 struct ip_tunnel_info *tun_info,
790 struct net_device *mirred_dev,
791 struct mlx5_esw_flow_attr *attr)
793 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
794 unsigned short family = ip_tunnel_info_af(tun_info);
795 struct ip_tunnel_key *key = &tun_info->key;
796 struct mlx5_encap_info info;
797 struct mlx5_encap_entry *e;
798 struct net_device *out_dev;
804 /* udp dst port must be set */
805 if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
806 goto vxlan_encap_offload_err;
808 /* setting udp src port isn't supported */
809 if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
810 vxlan_encap_offload_err:
811 netdev_warn(priv->netdev,
812 "must set udp dst port and not set udp src port\n");
816 if (mlx5e_vxlan_lookup_port(priv, be16_to_cpu(key->tp_dst)) &&
817 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
818 info.tp_dst = key->tp_dst;
819 info.tun_id = tunnel_id_to_key32(key->tun_id);
820 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
822 netdev_warn(priv->netdev,
823 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
829 info.daddr = key->u.ipv4.dst;
832 netdev_warn(priv->netdev,
833 "IPv6 tunnel encap offload isn't supported\n");
838 hash_key = hash_encap_info(&info);
840 hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
841 encap_hlist, hash_key) {
842 if (!cmp_encap_info(&e->tun_info, &info)) {
853 e = kzalloc(sizeof(*e), GFP_KERNEL);
858 e->tunnel_type = tunnel_type;
859 INIT_LIST_HEAD(&e->flows);
861 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e, &out_dev);
866 hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
875 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
876 struct mlx5e_tc_flow *flow)
878 struct mlx5_esw_flow_attr *attr = flow->attr;
879 struct ip_tunnel_info *info = NULL;
880 const struct tc_action *a;
885 if (tc_no_actions(exts))
888 memset(attr, 0, sizeof(*attr));
889 attr->in_rep = priv->ppriv;
891 tcf_exts_to_list(exts, &actions);
892 list_for_each_entry(a, &actions, list) {
893 if (is_tcf_gact_shot(a)) {
894 attr->action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
895 MLX5_FLOW_CONTEXT_ACTION_COUNT;
899 if (is_tcf_mirred_egress_redirect(a)) {
900 int ifindex = tcf_mirred_ifindex(a);
901 struct net_device *out_dev;
902 struct mlx5e_priv *out_priv;
904 out_dev = __dev_get_by_index(dev_net(priv->netdev), ifindex);
906 if (switchdev_port_same_parent_id(priv->netdev,
908 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
909 MLX5_FLOW_CONTEXT_ACTION_COUNT;
910 out_priv = netdev_priv(out_dev);
911 attr->out_rep = out_priv->ppriv;
913 err = mlx5e_attach_encap(priv, info,
917 list_add(&flow->encap, &attr->encap->flows);
918 attr->action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
919 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
920 MLX5_FLOW_CONTEXT_ACTION_COUNT;
921 out_priv = netdev_priv(attr->encap->out_dev);
922 attr->out_rep = out_priv->ppriv;
924 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
925 priv->netdev->name, out_dev->name);
931 if (is_tcf_tunnel_set(a)) {
932 info = tcf_tunnel_info(a);
940 if (is_tcf_vlan(a)) {
941 if (tcf_vlan_action(a) == VLAN_F_POP) {
942 attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
943 } else if (tcf_vlan_action(a) == VLAN_F_PUSH) {
944 if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q))
947 attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
948 attr->vlan = tcf_vlan_push_vid(a);
953 if (is_tcf_tunnel_release(a)) {
954 attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
963 int mlx5e_configure_flower(struct mlx5e_priv *priv, __be16 protocol,
964 struct tc_cls_flower_offload *f)
966 struct mlx5e_tc_table *tc = &priv->fs.tc;
968 bool fdb_flow = false;
969 u32 flow_tag, action;
970 struct mlx5e_tc_flow *flow;
971 struct mlx5_flow_spec *spec;
972 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
974 if (esw && esw->mode == SRIOV_OFFLOADS)
978 flow = kzalloc(sizeof(*flow) +
979 sizeof(struct mlx5_esw_flow_attr),
982 flow = kzalloc(sizeof(*flow), GFP_KERNEL);
984 spec = mlx5_vzalloc(sizeof(*spec));
985 if (!spec || !flow) {
990 flow->cookie = f->cookie;
992 err = parse_cls_flower(priv, spec, f);
997 flow->attr = (struct mlx5_esw_flow_attr *)(flow + 1);
998 err = parse_tc_fdb_actions(priv, f->exts, flow);
1001 flow->rule = mlx5e_tc_add_fdb_flow(priv, spec, flow->attr);
1003 err = parse_tc_nic_actions(priv, f->exts, &action, &flow_tag);
1006 flow->rule = mlx5e_tc_add_nic_flow(priv, spec, action, flow_tag);
1009 if (IS_ERR(flow->rule)) {
1010 err = PTR_ERR(flow->rule);
1014 err = rhashtable_insert_fast(&tc->ht, &flow->node,
1022 mlx5_del_flow_rules(flow->rule);
1031 int mlx5e_delete_flower(struct mlx5e_priv *priv,
1032 struct tc_cls_flower_offload *f)
1034 struct mlx5e_tc_flow *flow;
1035 struct mlx5e_tc_table *tc = &priv->fs.tc;
1037 flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
1042 rhashtable_remove_fast(&tc->ht, &flow->node, tc->ht_params);
1044 mlx5e_tc_del_flow(priv, flow);
1052 int mlx5e_stats_flower(struct mlx5e_priv *priv,
1053 struct tc_cls_flower_offload *f)
1055 struct mlx5e_tc_table *tc = &priv->fs.tc;
1056 struct mlx5e_tc_flow *flow;
1057 struct tc_action *a;
1058 struct mlx5_fc *counter;
1064 flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
1069 counter = mlx5_flow_rule_counter(flow->rule);
1073 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1075 tcf_exts_to_list(f->exts, &actions);
1076 list_for_each_entry(a, &actions, list)
1077 tcf_action_stats_update(a, bytes, packets, lastuse);
1082 static const struct rhashtable_params mlx5e_tc_flow_ht_params = {
1083 .head_offset = offsetof(struct mlx5e_tc_flow, node),
1084 .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
1085 .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
1086 .automatic_shrinking = true,
1089 int mlx5e_tc_init(struct mlx5e_priv *priv)
1091 struct mlx5e_tc_table *tc = &priv->fs.tc;
1093 tc->ht_params = mlx5e_tc_flow_ht_params;
1094 return rhashtable_init(&tc->ht, &tc->ht_params);
1097 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
1099 struct mlx5e_tc_flow *flow = ptr;
1100 struct mlx5e_priv *priv = arg;
1102 mlx5e_tc_del_flow(priv, flow);
1106 void mlx5e_tc_cleanup(struct mlx5e_priv *priv)
1108 struct mlx5e_tc_table *tc = &priv->fs.tc;
1110 rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, priv);
1112 if (!IS_ERR_OR_NULL(tc->t)) {
1113 mlx5_destroy_flow_table(tc->t);