net/mlx5: Expose DC scatter to CQE capability bit
[sfrench/cifs-2.6.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_tc.c
1 /*
2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include <net/flow_dissector.h>
34 #include <net/sch_generic.h>
35 #include <net/pkt_cls.h>
36 #include <net/tc_act/tc_gact.h>
37 #include <net/tc_act/tc_skbedit.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/device.h>
40 #include <linux/rhashtable.h>
41 #include <net/switchdev.h>
42 #include <net/tc_act/tc_mirred.h>
43 #include <net/tc_act/tc_vlan.h>
44 #include <net/tc_act/tc_tunnel_key.h>
45 #include <net/tc_act/tc_pedit.h>
46 #include <net/tc_act/tc_csum.h>
47 #include <net/vxlan.h>
48 #include <net/arp.h>
49 #include "en.h"
50 #include "en_rep.h"
51 #include "en_tc.h"
52 #include "eswitch.h"
53 #include "lib/vxlan.h"
54 #include "fs_core.h"
55 #include "en/port.h"
56
57 struct mlx5_nic_flow_attr {
58         u32 action;
59         u32 flow_tag;
60         u32 mod_hdr_id;
61         u32 hairpin_tirn;
62         u8 match_level;
63         struct mlx5_flow_table  *hairpin_ft;
64 };
65
66 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
67
68 enum {
69         MLX5E_TC_FLOW_INGRESS   = MLX5E_TC_INGRESS,
70         MLX5E_TC_FLOW_EGRESS    = MLX5E_TC_EGRESS,
71         MLX5E_TC_FLOW_ESWITCH   = BIT(MLX5E_TC_FLOW_BASE),
72         MLX5E_TC_FLOW_NIC       = BIT(MLX5E_TC_FLOW_BASE + 1),
73         MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2),
74         MLX5E_TC_FLOW_HAIRPIN   = BIT(MLX5E_TC_FLOW_BASE + 3),
75         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4),
76 };
77
78 #define MLX5E_TC_MAX_SPLITS 1
79
80 struct mlx5e_tc_flow {
81         struct rhash_head       node;
82         struct mlx5e_priv       *priv;
83         u64                     cookie;
84         u8                      flags;
85         struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1];
86         struct list_head        encap;   /* flows sharing the same encap ID */
87         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
88         struct list_head        hairpin; /* flows sharing the same hairpin */
89         union {
90                 struct mlx5_esw_flow_attr esw_attr[0];
91                 struct mlx5_nic_flow_attr nic_attr[0];
92         };
93 };
94
95 struct mlx5e_tc_flow_parse_attr {
96         struct ip_tunnel_info tun_info;
97         struct mlx5_flow_spec spec;
98         int num_mod_hdr_actions;
99         void *mod_hdr_actions;
100         int mirred_ifindex;
101 };
102
103 #define MLX5E_TC_TABLE_NUM_GROUPS 4
104 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
105
106 struct mlx5e_hairpin {
107         struct mlx5_hairpin *pair;
108
109         struct mlx5_core_dev *func_mdev;
110         struct mlx5e_priv *func_priv;
111         u32 tdn;
112         u32 tirn;
113
114         int num_channels;
115         struct mlx5e_rqt indir_rqt;
116         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
117         struct mlx5e_ttc_table ttc;
118 };
119
120 struct mlx5e_hairpin_entry {
121         /* a node of a hash table which keeps all the  hairpin entries */
122         struct hlist_node hairpin_hlist;
123
124         /* flows sharing the same hairpin */
125         struct list_head flows;
126
127         u16 peer_vhca_id;
128         u8 prio;
129         struct mlx5e_hairpin *hp;
130 };
131
132 struct mod_hdr_key {
133         int num_actions;
134         void *actions;
135 };
136
137 struct mlx5e_mod_hdr_entry {
138         /* a node of a hash table which keeps all the mod_hdr entries */
139         struct hlist_node mod_hdr_hlist;
140
141         /* flows sharing the same mod_hdr entry */
142         struct list_head flows;
143
144         struct mod_hdr_key key;
145
146         u32 mod_hdr_id;
147 };
148
149 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
150
151 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
152 {
153         return jhash(key->actions,
154                      key->num_actions * MLX5_MH_ACT_SZ, 0);
155 }
156
157 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
158                                    struct mod_hdr_key *b)
159 {
160         if (a->num_actions != b->num_actions)
161                 return 1;
162
163         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
164 }
165
166 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
167                                 struct mlx5e_tc_flow *flow,
168                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
169 {
170         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
171         int num_actions, actions_size, namespace, err;
172         struct mlx5e_mod_hdr_entry *mh;
173         struct mod_hdr_key key;
174         bool found = false;
175         u32 hash_key;
176
177         num_actions  = parse_attr->num_mod_hdr_actions;
178         actions_size = MLX5_MH_ACT_SZ * num_actions;
179
180         key.actions = parse_attr->mod_hdr_actions;
181         key.num_actions = num_actions;
182
183         hash_key = hash_mod_hdr_info(&key);
184
185         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
186                 namespace = MLX5_FLOW_NAMESPACE_FDB;
187                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
188                                        mod_hdr_hlist, hash_key) {
189                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
190                                 found = true;
191                                 break;
192                         }
193                 }
194         } else {
195                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
196                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
197                                        mod_hdr_hlist, hash_key) {
198                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
199                                 found = true;
200                                 break;
201                         }
202                 }
203         }
204
205         if (found)
206                 goto attach_flow;
207
208         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
209         if (!mh)
210                 return -ENOMEM;
211
212         mh->key.actions = (void *)mh + sizeof(*mh);
213         memcpy(mh->key.actions, key.actions, actions_size);
214         mh->key.num_actions = num_actions;
215         INIT_LIST_HEAD(&mh->flows);
216
217         err = mlx5_modify_header_alloc(priv->mdev, namespace,
218                                        mh->key.num_actions,
219                                        mh->key.actions,
220                                        &mh->mod_hdr_id);
221         if (err)
222                 goto out_err;
223
224         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
225                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
226         else
227                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
228
229 attach_flow:
230         list_add(&flow->mod_hdr, &mh->flows);
231         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
232                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
233         else
234                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
235
236         return 0;
237
238 out_err:
239         kfree(mh);
240         return err;
241 }
242
243 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
244                                  struct mlx5e_tc_flow *flow)
245 {
246         struct list_head *next = flow->mod_hdr.next;
247
248         list_del(&flow->mod_hdr);
249
250         if (list_empty(next)) {
251                 struct mlx5e_mod_hdr_entry *mh;
252
253                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
254
255                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
256                 hash_del(&mh->mod_hdr_hlist);
257                 kfree(mh);
258         }
259 }
260
261 static
262 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
263 {
264         struct net_device *netdev;
265         struct mlx5e_priv *priv;
266
267         netdev = __dev_get_by_index(net, ifindex);
268         priv = netdev_priv(netdev);
269         return priv->mdev;
270 }
271
272 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
273 {
274         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
275         void *tirc;
276         int err;
277
278         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
279         if (err)
280                 goto alloc_tdn_err;
281
282         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
283
284         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
285         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
286         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
287
288         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
289         if (err)
290                 goto create_tir_err;
291
292         return 0;
293
294 create_tir_err:
295         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
296 alloc_tdn_err:
297         return err;
298 }
299
300 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
301 {
302         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
303         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
304 }
305
306 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
307 {
308         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
309         struct mlx5e_priv *priv = hp->func_priv;
310         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
311
312         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
313                                       hp->num_channels);
314
315         for (i = 0; i < sz; i++) {
316                 ix = i;
317                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
318                         ix = mlx5e_bits_invert(i, ilog2(sz));
319                 ix = indirection_rqt[ix];
320                 rqn = hp->pair->rqn[ix];
321                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
322         }
323 }
324
325 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
326 {
327         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
328         struct mlx5e_priv *priv = hp->func_priv;
329         struct mlx5_core_dev *mdev = priv->mdev;
330         void *rqtc;
331         u32 *in;
332
333         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
334         in = kvzalloc(inlen, GFP_KERNEL);
335         if (!in)
336                 return -ENOMEM;
337
338         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
339
340         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
341         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
342
343         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
344
345         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
346         if (!err)
347                 hp->indir_rqt.enabled = true;
348
349         kvfree(in);
350         return err;
351 }
352
353 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
354 {
355         struct mlx5e_priv *priv = hp->func_priv;
356         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
357         int tt, i, err;
358         void *tirc;
359
360         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
361                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
362                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
363
364                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
365                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
366                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
367                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
368
369                 err = mlx5_core_create_tir(hp->func_mdev, in,
370                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
371                 if (err) {
372                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
373                         goto err_destroy_tirs;
374                 }
375         }
376         return 0;
377
378 err_destroy_tirs:
379         for (i = 0; i < tt; i++)
380                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
381         return err;
382 }
383
384 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
385 {
386         int tt;
387
388         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
389                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
390 }
391
392 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
393                                          struct ttc_params *ttc_params)
394 {
395         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
396         int tt;
397
398         memset(ttc_params, 0, sizeof(*ttc_params));
399
400         ttc_params->any_tt_tirn = hp->tirn;
401
402         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
403                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
404
405         ft_attr->max_fte = MLX5E_NUM_TT;
406         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
407         ft_attr->prio = MLX5E_TC_PRIO;
408 }
409
410 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
411 {
412         struct mlx5e_priv *priv = hp->func_priv;
413         struct ttc_params ttc_params;
414         int err;
415
416         err = mlx5e_hairpin_create_indirect_rqt(hp);
417         if (err)
418                 return err;
419
420         err = mlx5e_hairpin_create_indirect_tirs(hp);
421         if (err)
422                 goto err_create_indirect_tirs;
423
424         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
425         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
426         if (err)
427                 goto err_create_ttc_table;
428
429         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
430                    hp->num_channels, hp->ttc.ft.t->id);
431
432         return 0;
433
434 err_create_ttc_table:
435         mlx5e_hairpin_destroy_indirect_tirs(hp);
436 err_create_indirect_tirs:
437         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
438
439         return err;
440 }
441
442 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
443 {
444         struct mlx5e_priv *priv = hp->func_priv;
445
446         mlx5e_destroy_ttc_table(priv, &hp->ttc);
447         mlx5e_hairpin_destroy_indirect_tirs(hp);
448         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
449 }
450
451 static struct mlx5e_hairpin *
452 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
453                      int peer_ifindex)
454 {
455         struct mlx5_core_dev *func_mdev, *peer_mdev;
456         struct mlx5e_hairpin *hp;
457         struct mlx5_hairpin *pair;
458         int err;
459
460         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
461         if (!hp)
462                 return ERR_PTR(-ENOMEM);
463
464         func_mdev = priv->mdev;
465         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
466
467         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
468         if (IS_ERR(pair)) {
469                 err = PTR_ERR(pair);
470                 goto create_pair_err;
471         }
472         hp->pair = pair;
473         hp->func_mdev = func_mdev;
474         hp->func_priv = priv;
475         hp->num_channels = params->num_channels;
476
477         err = mlx5e_hairpin_create_transport(hp);
478         if (err)
479                 goto create_transport_err;
480
481         if (hp->num_channels > 1) {
482                 err = mlx5e_hairpin_rss_init(hp);
483                 if (err)
484                         goto rss_init_err;
485         }
486
487         return hp;
488
489 rss_init_err:
490         mlx5e_hairpin_destroy_transport(hp);
491 create_transport_err:
492         mlx5_core_hairpin_destroy(hp->pair);
493 create_pair_err:
494         kfree(hp);
495         return ERR_PTR(err);
496 }
497
498 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
499 {
500         if (hp->num_channels > 1)
501                 mlx5e_hairpin_rss_cleanup(hp);
502         mlx5e_hairpin_destroy_transport(hp);
503         mlx5_core_hairpin_destroy(hp->pair);
504         kvfree(hp);
505 }
506
507 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
508 {
509         return (peer_vhca_id << 16 | prio);
510 }
511
512 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
513                                                      u16 peer_vhca_id, u8 prio)
514 {
515         struct mlx5e_hairpin_entry *hpe;
516         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
517
518         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
519                                hairpin_hlist, hash_key) {
520                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
521                         return hpe;
522         }
523
524         return NULL;
525 }
526
527 #define UNKNOWN_MATCH_PRIO 8
528
529 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
530                                   struct mlx5_flow_spec *spec, u8 *match_prio)
531 {
532         void *headers_c, *headers_v;
533         u8 prio_val, prio_mask = 0;
534         bool vlan_present;
535
536 #ifdef CONFIG_MLX5_CORE_EN_DCB
537         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
538                 netdev_warn(priv->netdev,
539                             "only PCP trust state supported for hairpin\n");
540                 return -EOPNOTSUPP;
541         }
542 #endif
543         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
544         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
545
546         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
547         if (vlan_present) {
548                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
549                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
550         }
551
552         if (!vlan_present || !prio_mask) {
553                 prio_val = UNKNOWN_MATCH_PRIO;
554         } else if (prio_mask != 0x7) {
555                 netdev_warn(priv->netdev,
556                             "masked priority match not supported for hairpin\n");
557                 return -EOPNOTSUPP;
558         }
559
560         *match_prio = prio_val;
561         return 0;
562 }
563
564 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
565                                   struct mlx5e_tc_flow *flow,
566                                   struct mlx5e_tc_flow_parse_attr *parse_attr)
567 {
568         int peer_ifindex = parse_attr->mirred_ifindex;
569         struct mlx5_hairpin_params params;
570         struct mlx5_core_dev *peer_mdev;
571         struct mlx5e_hairpin_entry *hpe;
572         struct mlx5e_hairpin *hp;
573         u64 link_speed64;
574         u32 link_speed;
575         u8 match_prio;
576         u16 peer_id;
577         int err;
578
579         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
580         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
581                 netdev_warn(priv->netdev, "hairpin is not supported\n");
582                 return -EOPNOTSUPP;
583         }
584
585         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
586         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio);
587         if (err)
588                 return err;
589         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
590         if (hpe)
591                 goto attach_flow;
592
593         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
594         if (!hpe)
595                 return -ENOMEM;
596
597         INIT_LIST_HEAD(&hpe->flows);
598         hpe->peer_vhca_id = peer_id;
599         hpe->prio = match_prio;
600
601         params.log_data_size = 15;
602         params.log_data_size = min_t(u8, params.log_data_size,
603                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
604         params.log_data_size = max_t(u8, params.log_data_size,
605                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
606
607         params.log_num_packets = params.log_data_size -
608                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
609         params.log_num_packets = min_t(u8, params.log_num_packets,
610                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
611
612         params.q_counter = priv->q_counter;
613         /* set hairpin pair per each 50Gbs share of the link */
614         mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
615         link_speed = max_t(u32, link_speed, 50000);
616         link_speed64 = link_speed;
617         do_div(link_speed64, 50000);
618         params.num_channels = link_speed64;
619
620         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
621         if (IS_ERR(hp)) {
622                 err = PTR_ERR(hp);
623                 goto create_hairpin_err;
624         }
625
626         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
627                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
628                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
629
630         hpe->hp = hp;
631         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
632                  hash_hairpin_info(peer_id, match_prio));
633
634 attach_flow:
635         if (hpe->hp->num_channels > 1) {
636                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
637                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
638         } else {
639                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
640         }
641         list_add(&flow->hairpin, &hpe->flows);
642
643         return 0;
644
645 create_hairpin_err:
646         kfree(hpe);
647         return err;
648 }
649
650 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
651                                    struct mlx5e_tc_flow *flow)
652 {
653         struct list_head *next = flow->hairpin.next;
654
655         list_del(&flow->hairpin);
656
657         /* no more hairpin flows for us, release the hairpin pair */
658         if (list_empty(next)) {
659                 struct mlx5e_hairpin_entry *hpe;
660
661                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
662
663                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
664                            hpe->hp->pair->peer_mdev->priv.name);
665
666                 mlx5e_hairpin_destroy(hpe->hp);
667                 hash_del(&hpe->hairpin_hlist);
668                 kfree(hpe);
669         }
670 }
671
672 static struct mlx5_flow_handle *
673 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
674                       struct mlx5e_tc_flow_parse_attr *parse_attr,
675                       struct mlx5e_tc_flow *flow)
676 {
677         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
678         struct mlx5_core_dev *dev = priv->mdev;
679         struct mlx5_flow_destination dest[2] = {};
680         struct mlx5_flow_act flow_act = {
681                 .action = attr->action,
682                 .has_flow_tag = true,
683                 .flow_tag = attr->flow_tag,
684                 .reformat_id = 0,
685         };
686         struct mlx5_fc *counter = NULL;
687         struct mlx5_flow_handle *rule;
688         bool table_created = false;
689         int err, dest_ix = 0;
690
691         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
692                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr);
693                 if (err) {
694                         rule = ERR_PTR(err);
695                         goto err_add_hairpin_flow;
696                 }
697                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
698                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
699                         dest[dest_ix].ft = attr->hairpin_ft;
700                 } else {
701                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
702                         dest[dest_ix].tir_num = attr->hairpin_tirn;
703                 }
704                 dest_ix++;
705         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
706                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
707                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
708                 dest_ix++;
709         }
710
711         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
712                 counter = mlx5_fc_create(dev, true);
713                 if (IS_ERR(counter)) {
714                         rule = ERR_CAST(counter);
715                         goto err_fc_create;
716                 }
717                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
718                 dest[dest_ix].counter = counter;
719                 dest_ix++;
720         }
721
722         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
723                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
724                 flow_act.modify_id = attr->mod_hdr_id;
725                 kfree(parse_attr->mod_hdr_actions);
726                 if (err) {
727                         rule = ERR_PTR(err);
728                         goto err_create_mod_hdr_id;
729                 }
730         }
731
732         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
733                 int tc_grp_size, tc_tbl_size;
734                 u32 max_flow_counter;
735
736                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
737                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
738
739                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
740
741                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
742                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
743
744                 priv->fs.tc.t =
745                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
746                                                             MLX5E_TC_PRIO,
747                                                             tc_tbl_size,
748                                                             MLX5E_TC_TABLE_NUM_GROUPS,
749                                                             MLX5E_TC_FT_LEVEL, 0);
750                 if (IS_ERR(priv->fs.tc.t)) {
751                         netdev_err(priv->netdev,
752                                    "Failed to create tc offload table\n");
753                         rule = ERR_CAST(priv->fs.tc.t);
754                         goto err_create_ft;
755                 }
756
757                 table_created = true;
758         }
759
760         if (attr->match_level != MLX5_MATCH_NONE)
761                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
762
763         rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
764                                    &flow_act, dest, dest_ix);
765
766         if (IS_ERR(rule))
767                 goto err_add_rule;
768
769         return rule;
770
771 err_add_rule:
772         if (table_created) {
773                 mlx5_destroy_flow_table(priv->fs.tc.t);
774                 priv->fs.tc.t = NULL;
775         }
776 err_create_ft:
777         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
778                 mlx5e_detach_mod_hdr(priv, flow);
779 err_create_mod_hdr_id:
780         mlx5_fc_destroy(dev, counter);
781 err_fc_create:
782         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
783                 mlx5e_hairpin_flow_del(priv, flow);
784 err_add_hairpin_flow:
785         return rule;
786 }
787
788 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
789                                   struct mlx5e_tc_flow *flow)
790 {
791         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
792         struct mlx5_fc *counter = NULL;
793
794         counter = mlx5_flow_rule_counter(flow->rule[0]);
795         mlx5_del_flow_rules(flow->rule[0]);
796         mlx5_fc_destroy(priv->mdev, counter);
797
798         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
799                 mlx5_destroy_flow_table(priv->fs.tc.t);
800                 priv->fs.tc.t = NULL;
801         }
802
803         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
804                 mlx5e_detach_mod_hdr(priv, flow);
805
806         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
807                 mlx5e_hairpin_flow_del(priv, flow);
808 }
809
810 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
811                                struct mlx5e_tc_flow *flow);
812
813 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
814                               struct ip_tunnel_info *tun_info,
815                               struct net_device *mirred_dev,
816                               struct net_device **encap_dev,
817                               struct mlx5e_tc_flow *flow);
818
819 static struct mlx5_flow_handle *
820 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
821                       struct mlx5e_tc_flow_parse_attr *parse_attr,
822                       struct mlx5e_tc_flow *flow)
823 {
824         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
825         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
826         struct net_device *out_dev, *encap_dev = NULL;
827         struct mlx5_flow_handle *rule = NULL;
828         struct mlx5e_rep_priv *rpriv;
829         struct mlx5e_priv *out_priv;
830         int err;
831
832         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
833                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
834                                              attr->parse_attr->mirred_ifindex);
835                 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
836                                          out_dev, &encap_dev, flow);
837                 if (err) {
838                         rule = ERR_PTR(err);
839                         if (err != -EAGAIN)
840                                 goto err_attach_encap;
841                 }
842                 out_priv = netdev_priv(encap_dev);
843                 rpriv = out_priv->ppriv;
844                 attr->out_rep[attr->out_count] = rpriv->rep;
845                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
846         }
847
848         err = mlx5_eswitch_add_vlan_action(esw, attr);
849         if (err) {
850                 rule = ERR_PTR(err);
851                 goto err_add_vlan;
852         }
853
854         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
855                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
856                 kfree(parse_attr->mod_hdr_actions);
857                 if (err) {
858                         rule = ERR_PTR(err);
859                         goto err_mod_hdr;
860                 }
861         }
862
863         /* we get here if (1) there's no error (rule being null) or when
864          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
865          */
866         if (rule != ERR_PTR(-EAGAIN)) {
867                 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
868                 if (IS_ERR(rule))
869                         goto err_add_rule;
870
871                 if (attr->mirror_count) {
872                         flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, &parse_attr->spec, attr);
873                         if (IS_ERR(flow->rule[1]))
874                                 goto err_fwd_rule;
875                 }
876         }
877         return rule;
878
879 err_fwd_rule:
880         mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
881         rule = flow->rule[1];
882 err_add_rule:
883         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
884                 mlx5e_detach_mod_hdr(priv, flow);
885 err_mod_hdr:
886         mlx5_eswitch_del_vlan_action(esw, attr);
887 err_add_vlan:
888         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT)
889                 mlx5e_detach_encap(priv, flow);
890 err_attach_encap:
891         return rule;
892 }
893
894 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
895                                   struct mlx5e_tc_flow *flow)
896 {
897         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
898         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
899
900         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
901                 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
902                 if (attr->mirror_count)
903                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[1], attr);
904                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
905         }
906
907         mlx5_eswitch_del_vlan_action(esw, attr);
908
909         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
910                 mlx5e_detach_encap(priv, flow);
911                 kvfree(attr->parse_attr);
912         }
913
914         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
915                 mlx5e_detach_mod_hdr(priv, flow);
916 }
917
918 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
919                               struct mlx5e_encap_entry *e)
920 {
921         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
922         struct mlx5_esw_flow_attr *esw_attr;
923         struct mlx5e_tc_flow *flow;
924         int err;
925
926         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
927                                          e->encap_size, e->encap_header,
928                                          MLX5_FLOW_NAMESPACE_FDB,
929                                          &e->encap_id);
930         if (err) {
931                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
932                                err);
933                 return;
934         }
935         e->flags |= MLX5_ENCAP_ENTRY_VALID;
936         mlx5e_rep_queue_neigh_stats_work(priv);
937
938         list_for_each_entry(flow, &e->flows, encap) {
939                 esw_attr = flow->esw_attr;
940                 esw_attr->encap_id = e->encap_id;
941                 flow->rule[0] = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
942                 if (IS_ERR(flow->rule[0])) {
943                         err = PTR_ERR(flow->rule[0]);
944                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
945                                        err);
946                         continue;
947                 }
948
949                 if (esw_attr->mirror_count) {
950                         flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
951                         if (IS_ERR(flow->rule[1])) {
952                                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], esw_attr);
953                                 err = PTR_ERR(flow->rule[1]);
954                                 mlx5_core_warn(priv->mdev, "Failed to update cached mirror flow, %d\n",
955                                                err);
956                                 continue;
957                         }
958                 }
959
960                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
961         }
962 }
963
964 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
965                               struct mlx5e_encap_entry *e)
966 {
967         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
968         struct mlx5e_tc_flow *flow;
969
970         list_for_each_entry(flow, &e->flows, encap) {
971                 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
972                         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
973
974                         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
975                         if (attr->mirror_count)
976                                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[1], attr);
977                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
978                 }
979         }
980
981         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
982                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
983                 mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
984         }
985 }
986
987 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
988 {
989         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
990         u64 bytes, packets, lastuse = 0;
991         struct mlx5e_tc_flow *flow;
992         struct mlx5e_encap_entry *e;
993         struct mlx5_fc *counter;
994         struct neigh_table *tbl;
995         bool neigh_used = false;
996         struct neighbour *n;
997
998         if (m_neigh->family == AF_INET)
999                 tbl = &arp_tbl;
1000 #if IS_ENABLED(CONFIG_IPV6)
1001         else if (m_neigh->family == AF_INET6)
1002                 tbl = &nd_tbl;
1003 #endif
1004         else
1005                 return;
1006
1007         list_for_each_entry(e, &nhe->encap_list, encap_list) {
1008                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
1009                         continue;
1010                 list_for_each_entry(flow, &e->flows, encap) {
1011                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1012                                 counter = mlx5_flow_rule_counter(flow->rule[0]);
1013                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1014                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
1015                                         neigh_used = true;
1016                                         break;
1017                                 }
1018                         }
1019                 }
1020                 if (neigh_used)
1021                         break;
1022         }
1023
1024         if (neigh_used) {
1025                 nhe->reported_lastuse = jiffies;
1026
1027                 /* find the relevant neigh according to the cached device and
1028                  * dst ip pair
1029                  */
1030                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1031                 if (!n)
1032                         return;
1033
1034                 neigh_event_send(n, NULL);
1035                 neigh_release(n);
1036         }
1037 }
1038
1039 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1040                                struct mlx5e_tc_flow *flow)
1041 {
1042         struct list_head *next = flow->encap.next;
1043
1044         list_del(&flow->encap);
1045         if (list_empty(next)) {
1046                 struct mlx5e_encap_entry *e;
1047
1048                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1049                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1050
1051                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1052                         mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1053
1054                 hash_del_rcu(&e->encap_hlist);
1055                 kfree(e->encap_header);
1056                 kfree(e);
1057         }
1058 }
1059
1060 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1061                               struct mlx5e_tc_flow *flow)
1062 {
1063         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1064                 mlx5e_tc_del_fdb_flow(priv, flow);
1065         else
1066                 mlx5e_tc_del_nic_flow(priv, flow);
1067 }
1068
1069 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1070                              struct tc_cls_flower_offload *f)
1071 {
1072         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1073                                        outer_headers);
1074         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1075                                        outer_headers);
1076         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1077                                     misc_parameters);
1078         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1079                                     misc_parameters);
1080
1081         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1082         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1083
1084         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1085                 struct flow_dissector_key_keyid *key =
1086                         skb_flow_dissector_target(f->dissector,
1087                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1088                                                   f->key);
1089                 struct flow_dissector_key_keyid *mask =
1090                         skb_flow_dissector_target(f->dissector,
1091                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1092                                                   f->mask);
1093                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1094                          be32_to_cpu(mask->keyid));
1095                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1096                          be32_to_cpu(key->keyid));
1097         }
1098 }
1099
1100 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1101                              struct mlx5_flow_spec *spec,
1102                              struct tc_cls_flower_offload *f)
1103 {
1104         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1105                                        outer_headers);
1106         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1107                                        outer_headers);
1108
1109         struct flow_dissector_key_control *enc_control =
1110                 skb_flow_dissector_target(f->dissector,
1111                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1112                                           f->key);
1113
1114         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1115                 struct flow_dissector_key_ports *key =
1116                         skb_flow_dissector_target(f->dissector,
1117                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1118                                                   f->key);
1119                 struct flow_dissector_key_ports *mask =
1120                         skb_flow_dissector_target(f->dissector,
1121                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1122                                                   f->mask);
1123
1124                 /* Full udp dst port must be given */
1125                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1126                         goto vxlan_match_offload_err;
1127
1128                 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->dst)) &&
1129                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1130                         parse_vxlan_attr(spec, f);
1131                 else {
1132                         netdev_warn(priv->netdev,
1133                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1134                         return -EOPNOTSUPP;
1135                 }
1136
1137                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1138                          udp_dport, ntohs(mask->dst));
1139                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1140                          udp_dport, ntohs(key->dst));
1141
1142                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1143                          udp_sport, ntohs(mask->src));
1144                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1145                          udp_sport, ntohs(key->src));
1146         } else { /* udp dst port must be given */
1147 vxlan_match_offload_err:
1148                 netdev_warn(priv->netdev,
1149                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1150                 return -EOPNOTSUPP;
1151         }
1152
1153         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1154                 struct flow_dissector_key_ipv4_addrs *key =
1155                         skb_flow_dissector_target(f->dissector,
1156                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1157                                                   f->key);
1158                 struct flow_dissector_key_ipv4_addrs *mask =
1159                         skb_flow_dissector_target(f->dissector,
1160                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1161                                                   f->mask);
1162                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1163                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1164                          ntohl(mask->src));
1165                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1166                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1167                          ntohl(key->src));
1168
1169                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1170                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1171                          ntohl(mask->dst));
1172                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1173                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1174                          ntohl(key->dst));
1175
1176                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1177                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1178         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1179                 struct flow_dissector_key_ipv6_addrs *key =
1180                         skb_flow_dissector_target(f->dissector,
1181                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1182                                                   f->key);
1183                 struct flow_dissector_key_ipv6_addrs *mask =
1184                         skb_flow_dissector_target(f->dissector,
1185                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1186                                                   f->mask);
1187
1188                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1189                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1190                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1191                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1192                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1193                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1194
1195                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1196                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1197                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1198                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1199                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1200                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1201
1202                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1203                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1204         }
1205
1206         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_IP)) {
1207                 struct flow_dissector_key_ip *key =
1208                         skb_flow_dissector_target(f->dissector,
1209                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1210                                                   f->key);
1211                 struct flow_dissector_key_ip *mask =
1212                         skb_flow_dissector_target(f->dissector,
1213                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1214                                                   f->mask);
1215
1216                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1217                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1218
1219                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1220                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1221
1222                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1223                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1224         }
1225
1226         /* Enforce DMAC when offloading incoming tunneled flows.
1227          * Flow counters require a match on the DMAC.
1228          */
1229         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1230         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1231         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1232                                      dmac_47_16), priv->netdev->dev_addr);
1233
1234         /* let software handle IP fragments */
1235         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1236         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1237
1238         return 0;
1239 }
1240
1241 static int __parse_cls_flower(struct mlx5e_priv *priv,
1242                               struct mlx5_flow_spec *spec,
1243                               struct tc_cls_flower_offload *f,
1244                               u8 *match_level)
1245 {
1246         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1247                                        outer_headers);
1248         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1249                                        outer_headers);
1250         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1251                                     misc_parameters);
1252         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1253                                     misc_parameters);
1254         u16 addr_type = 0;
1255         u8 ip_proto = 0;
1256
1257         *match_level = MLX5_MATCH_NONE;
1258
1259         if (f->dissector->used_keys &
1260             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1261               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1262               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1263               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1264               BIT(FLOW_DISSECTOR_KEY_CVLAN) |
1265               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1266               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1267               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1268               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1269               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1270               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1271               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1272               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1273               BIT(FLOW_DISSECTOR_KEY_TCP) |
1274               BIT(FLOW_DISSECTOR_KEY_IP)  |
1275               BIT(FLOW_DISSECTOR_KEY_ENC_IP))) {
1276                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1277                             f->dissector->used_keys);
1278                 return -EOPNOTSUPP;
1279         }
1280
1281         if ((dissector_uses_key(f->dissector,
1282                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1283              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1284              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1285             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1286                 struct flow_dissector_key_control *key =
1287                         skb_flow_dissector_target(f->dissector,
1288                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1289                                                   f->key);
1290                 switch (key->addr_type) {
1291                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1292                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1293                         if (parse_tunnel_attr(priv, spec, f))
1294                                 return -EOPNOTSUPP;
1295                         break;
1296                 default:
1297                         return -EOPNOTSUPP;
1298                 }
1299
1300                 /* In decap flow, header pointers should point to the inner
1301                  * headers, outer header were already set by parse_tunnel_attr
1302                  */
1303                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1304                                          inner_headers);
1305                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1306                                          inner_headers);
1307         }
1308
1309         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1310                 struct flow_dissector_key_eth_addrs *key =
1311                         skb_flow_dissector_target(f->dissector,
1312                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1313                                                   f->key);
1314                 struct flow_dissector_key_eth_addrs *mask =
1315                         skb_flow_dissector_target(f->dissector,
1316                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1317                                                   f->mask);
1318
1319                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1320                                              dmac_47_16),
1321                                 mask->dst);
1322                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1323                                              dmac_47_16),
1324                                 key->dst);
1325
1326                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1327                                              smac_47_16),
1328                                 mask->src);
1329                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1330                                              smac_47_16),
1331                                 key->src);
1332
1333                 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1334                         *match_level = MLX5_MATCH_L2;
1335         }
1336
1337         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1338                 struct flow_dissector_key_vlan *key =
1339                         skb_flow_dissector_target(f->dissector,
1340                                                   FLOW_DISSECTOR_KEY_VLAN,
1341                                                   f->key);
1342                 struct flow_dissector_key_vlan *mask =
1343                         skb_flow_dissector_target(f->dissector,
1344                                                   FLOW_DISSECTOR_KEY_VLAN,
1345                                                   f->mask);
1346                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1347                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1348                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1349                                          svlan_tag, 1);
1350                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1351                                          svlan_tag, 1);
1352                         } else {
1353                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1354                                          cvlan_tag, 1);
1355                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1356                                          cvlan_tag, 1);
1357                         }
1358
1359                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1360                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1361
1362                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1363                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1364
1365                         *match_level = MLX5_MATCH_L2;
1366                 }
1367         }
1368
1369         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CVLAN)) {
1370                 struct flow_dissector_key_vlan *key =
1371                         skb_flow_dissector_target(f->dissector,
1372                                                   FLOW_DISSECTOR_KEY_CVLAN,
1373                                                   f->key);
1374                 struct flow_dissector_key_vlan *mask =
1375                         skb_flow_dissector_target(f->dissector,
1376                                                   FLOW_DISSECTOR_KEY_CVLAN,
1377                                                   f->mask);
1378                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1379                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1380                                 MLX5_SET(fte_match_set_misc, misc_c,
1381                                          outer_second_svlan_tag, 1);
1382                                 MLX5_SET(fte_match_set_misc, misc_v,
1383                                          outer_second_svlan_tag, 1);
1384                         } else {
1385                                 MLX5_SET(fte_match_set_misc, misc_c,
1386                                          outer_second_cvlan_tag, 1);
1387                                 MLX5_SET(fte_match_set_misc, misc_v,
1388                                          outer_second_cvlan_tag, 1);
1389                         }
1390
1391                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
1392                                  mask->vlan_id);
1393                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
1394                                  key->vlan_id);
1395                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
1396                                  mask->vlan_priority);
1397                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
1398                                  key->vlan_priority);
1399
1400                         *match_level = MLX5_MATCH_L2;
1401                 }
1402         }
1403
1404         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1405                 struct flow_dissector_key_basic *key =
1406                         skb_flow_dissector_target(f->dissector,
1407                                                   FLOW_DISSECTOR_KEY_BASIC,
1408                                                   f->key);
1409                 struct flow_dissector_key_basic *mask =
1410                         skb_flow_dissector_target(f->dissector,
1411                                                   FLOW_DISSECTOR_KEY_BASIC,
1412                                                   f->mask);
1413                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1414                          ntohs(mask->n_proto));
1415                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1416                          ntohs(key->n_proto));
1417
1418                 if (mask->n_proto)
1419                         *match_level = MLX5_MATCH_L2;
1420         }
1421
1422         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1423                 struct flow_dissector_key_control *key =
1424                         skb_flow_dissector_target(f->dissector,
1425                                                   FLOW_DISSECTOR_KEY_CONTROL,
1426                                                   f->key);
1427
1428                 struct flow_dissector_key_control *mask =
1429                         skb_flow_dissector_target(f->dissector,
1430                                                   FLOW_DISSECTOR_KEY_CONTROL,
1431                                                   f->mask);
1432                 addr_type = key->addr_type;
1433
1434                 /* the HW doesn't support frag first/later */
1435                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1436                         return -EOPNOTSUPP;
1437
1438                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1439                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1440                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1441                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1442
1443                         /* the HW doesn't need L3 inline to match on frag=no */
1444                         if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1445                                 *match_level = MLX5_INLINE_MODE_L2;
1446         /* ***  L2 attributes parsing up to here *** */
1447                         else
1448                                 *match_level = MLX5_INLINE_MODE_IP;
1449                 }
1450         }
1451
1452         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1453                 struct flow_dissector_key_basic *key =
1454                         skb_flow_dissector_target(f->dissector,
1455                                                   FLOW_DISSECTOR_KEY_BASIC,
1456                                                   f->key);
1457                 struct flow_dissector_key_basic *mask =
1458                         skb_flow_dissector_target(f->dissector,
1459                                                   FLOW_DISSECTOR_KEY_BASIC,
1460                                                   f->mask);
1461                 ip_proto = key->ip_proto;
1462
1463                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1464                          mask->ip_proto);
1465                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1466                          key->ip_proto);
1467
1468                 if (mask->ip_proto)
1469                         *match_level = MLX5_MATCH_L3;
1470         }
1471
1472         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1473                 struct flow_dissector_key_ipv4_addrs *key =
1474                         skb_flow_dissector_target(f->dissector,
1475                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1476                                                   f->key);
1477                 struct flow_dissector_key_ipv4_addrs *mask =
1478                         skb_flow_dissector_target(f->dissector,
1479                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1480                                                   f->mask);
1481
1482                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1483                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1484                        &mask->src, sizeof(mask->src));
1485                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1486                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1487                        &key->src, sizeof(key->src));
1488                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1489                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1490                        &mask->dst, sizeof(mask->dst));
1491                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1492                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1493                        &key->dst, sizeof(key->dst));
1494
1495                 if (mask->src || mask->dst)
1496                         *match_level = MLX5_MATCH_L3;
1497         }
1498
1499         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1500                 struct flow_dissector_key_ipv6_addrs *key =
1501                         skb_flow_dissector_target(f->dissector,
1502                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1503                                                   f->key);
1504                 struct flow_dissector_key_ipv6_addrs *mask =
1505                         skb_flow_dissector_target(f->dissector,
1506                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1507                                                   f->mask);
1508
1509                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1510                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1511                        &mask->src, sizeof(mask->src));
1512                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1513                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1514                        &key->src, sizeof(key->src));
1515
1516                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1517                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1518                        &mask->dst, sizeof(mask->dst));
1519                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1520                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1521                        &key->dst, sizeof(key->dst));
1522
1523                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1524                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1525                         *match_level = MLX5_MATCH_L3;
1526         }
1527
1528         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1529                 struct flow_dissector_key_ip *key =
1530                         skb_flow_dissector_target(f->dissector,
1531                                                   FLOW_DISSECTOR_KEY_IP,
1532                                                   f->key);
1533                 struct flow_dissector_key_ip *mask =
1534                         skb_flow_dissector_target(f->dissector,
1535                                                   FLOW_DISSECTOR_KEY_IP,
1536                                                   f->mask);
1537
1538                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1539                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1540
1541                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1542                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1543
1544                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1545                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1546
1547                 if (mask->ttl &&
1548                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1549                                                 ft_field_support.outer_ipv4_ttl))
1550                         return -EOPNOTSUPP;
1551
1552                 if (mask->tos || mask->ttl)
1553                         *match_level = MLX5_MATCH_L3;
1554         }
1555
1556         /* ***  L3 attributes parsing up to here *** */
1557
1558         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1559                 struct flow_dissector_key_ports *key =
1560                         skb_flow_dissector_target(f->dissector,
1561                                                   FLOW_DISSECTOR_KEY_PORTS,
1562                                                   f->key);
1563                 struct flow_dissector_key_ports *mask =
1564                         skb_flow_dissector_target(f->dissector,
1565                                                   FLOW_DISSECTOR_KEY_PORTS,
1566                                                   f->mask);
1567                 switch (ip_proto) {
1568                 case IPPROTO_TCP:
1569                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1570                                  tcp_sport, ntohs(mask->src));
1571                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1572                                  tcp_sport, ntohs(key->src));
1573
1574                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1575                                  tcp_dport, ntohs(mask->dst));
1576                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1577                                  tcp_dport, ntohs(key->dst));
1578                         break;
1579
1580                 case IPPROTO_UDP:
1581                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1582                                  udp_sport, ntohs(mask->src));
1583                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1584                                  udp_sport, ntohs(key->src));
1585
1586                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1587                                  udp_dport, ntohs(mask->dst));
1588                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1589                                  udp_dport, ntohs(key->dst));
1590                         break;
1591                 default:
1592                         netdev_err(priv->netdev,
1593                                    "Only UDP and TCP transport are supported\n");
1594                         return -EINVAL;
1595                 }
1596
1597                 if (mask->src || mask->dst)
1598                         *match_level = MLX5_MATCH_L4;
1599         }
1600
1601         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1602                 struct flow_dissector_key_tcp *key =
1603                         skb_flow_dissector_target(f->dissector,
1604                                                   FLOW_DISSECTOR_KEY_TCP,
1605                                                   f->key);
1606                 struct flow_dissector_key_tcp *mask =
1607                         skb_flow_dissector_target(f->dissector,
1608                                                   FLOW_DISSECTOR_KEY_TCP,
1609                                                   f->mask);
1610
1611                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1612                          ntohs(mask->flags));
1613                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1614                          ntohs(key->flags));
1615
1616                 if (mask->flags)
1617                         *match_level = MLX5_MATCH_L4;
1618         }
1619
1620         return 0;
1621 }
1622
1623 static int parse_cls_flower(struct mlx5e_priv *priv,
1624                             struct mlx5e_tc_flow *flow,
1625                             struct mlx5_flow_spec *spec,
1626                             struct tc_cls_flower_offload *f)
1627 {
1628         struct mlx5_core_dev *dev = priv->mdev;
1629         struct mlx5_eswitch *esw = dev->priv.eswitch;
1630         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1631         struct mlx5_eswitch_rep *rep;
1632         u8 match_level;
1633         int err;
1634
1635         err = __parse_cls_flower(priv, spec, f, &match_level);
1636
1637         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1638                 rep = rpriv->rep;
1639                 if (rep->vport != FDB_UPLINK_VPORT &&
1640                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1641                     esw->offloads.inline_mode < match_level)) {
1642                         netdev_warn(priv->netdev,
1643                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1644                                     match_level, esw->offloads.inline_mode);
1645                         return -EOPNOTSUPP;
1646                 }
1647         }
1648
1649         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1650                 flow->esw_attr->match_level = match_level;
1651         else
1652                 flow->nic_attr->match_level = match_level;
1653
1654         return err;
1655 }
1656
1657 struct pedit_headers {
1658         struct ethhdr  eth;
1659         struct iphdr   ip4;
1660         struct ipv6hdr ip6;
1661         struct tcphdr  tcp;
1662         struct udphdr  udp;
1663 };
1664
1665 static int pedit_header_offsets[] = {
1666         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1667         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1668         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1669         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1670         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1671 };
1672
1673 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1674
1675 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1676                          struct pedit_headers *masks,
1677                          struct pedit_headers *vals)
1678 {
1679         u32 *curr_pmask, *curr_pval;
1680
1681         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1682                 goto out_err;
1683
1684         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1685         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1686
1687         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1688                 goto out_err;
1689
1690         *curr_pmask |= mask;
1691         *curr_pval  |= (val & mask);
1692
1693         return 0;
1694
1695 out_err:
1696         return -EOPNOTSUPP;
1697 }
1698
1699 struct mlx5_fields {
1700         u8  field;
1701         u8  size;
1702         u32 offset;
1703 };
1704
1705 #define OFFLOAD(fw_field, size, field, off) \
1706                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1707
1708 static struct mlx5_fields fields[] = {
1709         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1710         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1711         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1712         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1713         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1714
1715         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1716         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1717         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1718
1719         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1720         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1721         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1722         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1723         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1724         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1725         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1726         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1727         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1728
1729         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1730         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1731         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1732
1733         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1734         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1735 };
1736
1737 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1738  * max from the SW pedit action. On success, it says how many HW actions were
1739  * actually parsed.
1740  */
1741 static int offload_pedit_fields(struct pedit_headers *masks,
1742                                 struct pedit_headers *vals,
1743                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
1744 {
1745         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1746         int i, action_size, nactions, max_actions, first, last, next_z;
1747         void *s_masks_p, *a_masks_p, *vals_p;
1748         struct mlx5_fields *f;
1749         u8 cmd, field_bsize;
1750         u32 s_mask, a_mask;
1751         unsigned long mask;
1752         __be32 mask_be32;
1753         __be16 mask_be16;
1754         void *action;
1755
1756         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1757         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1758         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1759         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1760
1761         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1762         action = parse_attr->mod_hdr_actions;
1763         max_actions = parse_attr->num_mod_hdr_actions;
1764         nactions = 0;
1765
1766         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1767                 f = &fields[i];
1768                 /* avoid seeing bits set from previous iterations */
1769                 s_mask = 0;
1770                 a_mask = 0;
1771
1772                 s_masks_p = (void *)set_masks + f->offset;
1773                 a_masks_p = (void *)add_masks + f->offset;
1774
1775                 memcpy(&s_mask, s_masks_p, f->size);
1776                 memcpy(&a_mask, a_masks_p, f->size);
1777
1778                 if (!s_mask && !a_mask) /* nothing to offload here */
1779                         continue;
1780
1781                 if (s_mask && a_mask) {
1782                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1783                         return -EOPNOTSUPP;
1784                 }
1785
1786                 if (nactions == max_actions) {
1787                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1788                         return -EOPNOTSUPP;
1789                 }
1790
1791                 if (s_mask) {
1792                         cmd  = MLX5_ACTION_TYPE_SET;
1793                         mask = s_mask;
1794                         vals_p = (void *)set_vals + f->offset;
1795                         /* clear to denote we consumed this field */
1796                         memset(s_masks_p, 0, f->size);
1797                 } else {
1798                         cmd  = MLX5_ACTION_TYPE_ADD;
1799                         mask = a_mask;
1800                         vals_p = (void *)add_vals + f->offset;
1801                         /* clear to denote we consumed this field */
1802                         memset(a_masks_p, 0, f->size);
1803                 }
1804
1805                 field_bsize = f->size * BITS_PER_BYTE;
1806
1807                 if (field_bsize == 32) {
1808                         mask_be32 = *(__be32 *)&mask;
1809                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1810                 } else if (field_bsize == 16) {
1811                         mask_be16 = *(__be16 *)&mask;
1812                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1813                 }
1814
1815                 first = find_first_bit(&mask, field_bsize);
1816                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1817                 last  = find_last_bit(&mask, field_bsize);
1818                 if (first < next_z && next_z < last) {
1819                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1820                                mask);
1821                         return -EOPNOTSUPP;
1822                 }
1823
1824                 MLX5_SET(set_action_in, action, action_type, cmd);
1825                 MLX5_SET(set_action_in, action, field, f->field);
1826
1827                 if (cmd == MLX5_ACTION_TYPE_SET) {
1828                         MLX5_SET(set_action_in, action, offset, first);
1829                         /* length is num of bits to be written, zero means length of 32 */
1830                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1831                 }
1832
1833                 if (field_bsize == 32)
1834                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1835                 else if (field_bsize == 16)
1836                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1837                 else if (field_bsize == 8)
1838                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1839
1840                 action += action_size;
1841                 nactions++;
1842         }
1843
1844         parse_attr->num_mod_hdr_actions = nactions;
1845         return 0;
1846 }
1847
1848 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1849                                  const struct tc_action *a, int namespace,
1850                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1851 {
1852         int nkeys, action_size, max_actions;
1853
1854         nkeys = tcf_pedit_nkeys(a);
1855         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1856
1857         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1858                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1859         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1860                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1861
1862         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1863         max_actions = min(max_actions, nkeys * 16);
1864
1865         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1866         if (!parse_attr->mod_hdr_actions)
1867                 return -ENOMEM;
1868
1869         parse_attr->num_mod_hdr_actions = max_actions;
1870         return 0;
1871 }
1872
1873 static const struct pedit_headers zero_masks = {};
1874
1875 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1876                                  const struct tc_action *a, int namespace,
1877                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1878 {
1879         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1880         int nkeys, i, err = -EOPNOTSUPP;
1881         u32 mask, val, offset;
1882         u8 cmd, htype;
1883
1884         nkeys = tcf_pedit_nkeys(a);
1885
1886         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1887         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1888
1889         for (i = 0; i < nkeys; i++) {
1890                 htype = tcf_pedit_htype(a, i);
1891                 cmd = tcf_pedit_cmd(a, i);
1892                 err = -EOPNOTSUPP; /* can't be all optimistic */
1893
1894                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1895                         netdev_warn(priv->netdev, "legacy pedit isn't offloaded\n");
1896                         goto out_err;
1897                 }
1898
1899                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1900                         netdev_warn(priv->netdev, "pedit cmd %d isn't offloaded\n", cmd);
1901                         goto out_err;
1902                 }
1903
1904                 mask = tcf_pedit_mask(a, i);
1905                 val = tcf_pedit_val(a, i);
1906                 offset = tcf_pedit_offset(a, i);
1907
1908                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1909                 if (err)
1910                         goto out_err;
1911         }
1912
1913         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1914         if (err)
1915                 goto out_err;
1916
1917         err = offload_pedit_fields(masks, vals, parse_attr);
1918         if (err < 0)
1919                 goto out_dealloc_parsed_actions;
1920
1921         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1922                 cmd_masks = &masks[cmd];
1923                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1924                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
1925                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1926                                        16, 1, cmd_masks, sizeof(zero_masks), true);
1927                         err = -EOPNOTSUPP;
1928                         goto out_dealloc_parsed_actions;
1929                 }
1930         }
1931
1932         return 0;
1933
1934 out_dealloc_parsed_actions:
1935         kfree(parse_attr->mod_hdr_actions);
1936 out_err:
1937         return err;
1938 }
1939
1940 static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags)
1941 {
1942         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1943                          TCA_CSUM_UPDATE_FLAG_UDP;
1944
1945         /*  The HW recalcs checksums only if re-writing headers */
1946         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1947                 netdev_warn(priv->netdev,
1948                             "TC csum action is only offloaded with pedit\n");
1949                 return false;
1950         }
1951
1952         if (update_flags & ~prot_flags) {
1953                 netdev_warn(priv->netdev,
1954                             "can't offload TC csum action for some header/s - flags %#x\n",
1955                             update_flags);
1956                 return false;
1957         }
1958
1959         return true;
1960 }
1961
1962 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
1963                                           struct tcf_exts *exts)
1964 {
1965         const struct tc_action *a;
1966         bool modify_ip_header;
1967         LIST_HEAD(actions);
1968         u8 htype, ip_proto;
1969         void *headers_v;
1970         u16 ethertype;
1971         int nkeys, i;
1972
1973         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1974         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1975
1976         /* for non-IP we only re-write MACs, so we're okay */
1977         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
1978                 goto out_ok;
1979
1980         modify_ip_header = false;
1981         tcf_exts_to_list(exts, &actions);
1982         list_for_each_entry(a, &actions, list) {
1983                 if (!is_tcf_pedit(a))
1984                         continue;
1985
1986                 nkeys = tcf_pedit_nkeys(a);
1987                 for (i = 0; i < nkeys; i++) {
1988                         htype = tcf_pedit_htype(a, i);
1989                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
1990                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
1991                                 modify_ip_header = true;
1992                                 break;
1993                         }
1994                 }
1995         }
1996
1997         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
1998         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
1999             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
2000                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
2001                 return false;
2002         }
2003
2004 out_ok:
2005         return true;
2006 }
2007
2008 static bool actions_match_supported(struct mlx5e_priv *priv,
2009                                     struct tcf_exts *exts,
2010                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
2011                                     struct mlx5e_tc_flow *flow)
2012 {
2013         u32 actions;
2014
2015         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
2016                 actions = flow->esw_attr->action;
2017         else
2018                 actions = flow->nic_attr->action;
2019
2020         if (flow->flags & MLX5E_TC_FLOW_EGRESS &&
2021             !(actions & MLX5_FLOW_CONTEXT_ACTION_DECAP))
2022                 return false;
2023
2024         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
2025                 return modify_header_match_supported(&parse_attr->spec, exts);
2026
2027         return true;
2028 }
2029
2030 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
2031 {
2032         struct mlx5_core_dev *fmdev, *pmdev;
2033         u64 fsystem_guid, psystem_guid;
2034
2035         fmdev = priv->mdev;
2036         pmdev = peer_priv->mdev;
2037
2038         mlx5_query_nic_vport_system_image_guid(fmdev, &fsystem_guid);
2039         mlx5_query_nic_vport_system_image_guid(pmdev, &psystem_guid);
2040
2041         return (fsystem_guid == psystem_guid);
2042 }
2043
2044 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2045                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2046                                 struct mlx5e_tc_flow *flow)
2047 {
2048         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
2049         const struct tc_action *a;
2050         LIST_HEAD(actions);
2051         u32 action = 0;
2052         int err;
2053
2054         if (!tcf_exts_has_actions(exts))
2055                 return -EINVAL;
2056
2057         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
2058
2059         tcf_exts_to_list(exts, &actions);
2060         list_for_each_entry(a, &actions, list) {
2061                 if (is_tcf_gact_shot(a)) {
2062                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
2063                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
2064                                                flow_table_properties_nic_receive.flow_counter))
2065                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
2066                         continue;
2067                 }
2068
2069                 if (is_tcf_pedit(a)) {
2070                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
2071                                                     parse_attr);
2072                         if (err)
2073                                 return err;
2074
2075                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
2076                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2077                         continue;
2078                 }
2079
2080                 if (is_tcf_csum(a)) {
2081                         if (csum_offload_supported(priv, action,
2082                                                    tcf_csum_update_flags(a)))
2083                                 continue;
2084
2085                         return -EOPNOTSUPP;
2086                 }
2087
2088                 if (is_tcf_mirred_egress_redirect(a)) {
2089                         struct net_device *peer_dev = tcf_mirred_dev(a);
2090
2091                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
2092                             same_hw_devs(priv, netdev_priv(peer_dev))) {
2093                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
2094                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2095                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2096                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2097                         } else {
2098                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2099                                             peer_dev->name);
2100                                 return -EINVAL;
2101                         }
2102                         continue;
2103                 }
2104
2105                 if (is_tcf_skbedit_mark(a)) {
2106                         u32 mark = tcf_skbedit_mark(a);
2107
2108                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2109                                 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
2110                                             mark);
2111                                 return -EINVAL;
2112                         }
2113
2114                         attr->flow_tag = mark;
2115                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2116                         continue;
2117                 }
2118
2119                 return -EINVAL;
2120         }
2121
2122         attr->action = action;
2123         if (!actions_match_supported(priv, exts, parse_attr, flow))
2124                 return -EOPNOTSUPP;
2125
2126         return 0;
2127 }
2128
2129 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2130                                  struct ip_tunnel_key *b)
2131 {
2132         return memcmp(a, b, sizeof(*a));
2133 }
2134
2135 static inline int hash_encap_info(struct ip_tunnel_key *key)
2136 {
2137         return jhash(key, sizeof(*key), 0);
2138 }
2139
2140 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2141                                    struct net_device *mirred_dev,
2142                                    struct net_device **out_dev,
2143                                    struct flowi4 *fl4,
2144                                    struct neighbour **out_n,
2145                                    u8 *out_ttl)
2146 {
2147         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2148         struct mlx5e_rep_priv *uplink_rpriv;
2149         struct rtable *rt;
2150         struct neighbour *n = NULL;
2151
2152 #if IS_ENABLED(CONFIG_INET)
2153         int ret;
2154
2155         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2156         ret = PTR_ERR_OR_ZERO(rt);
2157         if (ret)
2158                 return ret;
2159 #else
2160         return -EOPNOTSUPP;
2161 #endif
2162         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2163         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2164         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2165                 *out_dev = uplink_rpriv->netdev;
2166         else
2167                 *out_dev = rt->dst.dev;
2168
2169         if (!(*out_ttl))
2170                 *out_ttl = ip4_dst_hoplimit(&rt->dst);
2171         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2172         ip_rt_put(rt);
2173         if (!n)
2174                 return -ENOMEM;
2175
2176         *out_n = n;
2177         return 0;
2178 }
2179
2180 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2181                                   struct net_device *peer_netdev)
2182 {
2183         struct mlx5e_priv *peer_priv;
2184
2185         peer_priv = netdev_priv(peer_netdev);
2186
2187         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2188                 (priv->netdev->netdev_ops == peer_netdev->netdev_ops) &&
2189                 same_hw_devs(priv, peer_priv) &&
2190                 MLX5_VPORT_MANAGER(peer_priv->mdev) &&
2191                 (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS));
2192 }
2193
2194 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2195                                    struct net_device *mirred_dev,
2196                                    struct net_device **out_dev,
2197                                    struct flowi6 *fl6,
2198                                    struct neighbour **out_n,
2199                                    u8 *out_ttl)
2200 {
2201         struct neighbour *n = NULL;
2202         struct dst_entry *dst;
2203
2204 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2205         struct mlx5e_rep_priv *uplink_rpriv;
2206         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2207         int ret;
2208
2209         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2210                                          fl6);
2211         if (ret < 0)
2212                 return ret;
2213
2214         if (!(*out_ttl))
2215                 *out_ttl = ip6_dst_hoplimit(dst);
2216
2217         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2218         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2219         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2220                 *out_dev = uplink_rpriv->netdev;
2221         else
2222                 *out_dev = dst->dev;
2223 #else
2224         return -EOPNOTSUPP;
2225 #endif
2226
2227         n = dst_neigh_lookup(dst, &fl6->daddr);
2228         dst_release(dst);
2229         if (!n)
2230                 return -ENOMEM;
2231
2232         *out_n = n;
2233         return 0;
2234 }
2235
2236 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2237                                   char buf[], int encap_size,
2238                                   unsigned char h_dest[ETH_ALEN],
2239                                   u8 tos, u8 ttl,
2240                                   __be32 daddr,
2241                                   __be32 saddr,
2242                                   __be16 udp_dst_port,
2243                                   __be32 vx_vni)
2244 {
2245         struct ethhdr *eth = (struct ethhdr *)buf;
2246         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2247         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2248         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2249
2250         memset(buf, 0, encap_size);
2251
2252         ether_addr_copy(eth->h_dest, h_dest);
2253         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2254         eth->h_proto = htons(ETH_P_IP);
2255
2256         ip->daddr = daddr;
2257         ip->saddr = saddr;
2258
2259         ip->tos = tos;
2260         ip->ttl = ttl;
2261         ip->protocol = IPPROTO_UDP;
2262         ip->version = 0x4;
2263         ip->ihl = 0x5;
2264
2265         udp->dest = udp_dst_port;
2266         vxh->vx_flags = VXLAN_HF_VNI;
2267         vxh->vx_vni = vxlan_vni_field(vx_vni);
2268 }
2269
2270 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2271                                   char buf[], int encap_size,
2272                                   unsigned char h_dest[ETH_ALEN],
2273                                   u8 tos, u8 ttl,
2274                                   struct in6_addr *daddr,
2275                                   struct in6_addr *saddr,
2276                                   __be16 udp_dst_port,
2277                                   __be32 vx_vni)
2278 {
2279         struct ethhdr *eth = (struct ethhdr *)buf;
2280         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2281         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2282         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2283
2284         memset(buf, 0, encap_size);
2285
2286         ether_addr_copy(eth->h_dest, h_dest);
2287         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2288         eth->h_proto = htons(ETH_P_IPV6);
2289
2290         ip6_flow_hdr(ip6h, tos, 0);
2291         /* the HW fills up ipv6 payload len */
2292         ip6h->nexthdr     = IPPROTO_UDP;
2293         ip6h->hop_limit   = ttl;
2294         ip6h->daddr       = *daddr;
2295         ip6h->saddr       = *saddr;
2296
2297         udp->dest = udp_dst_port;
2298         vxh->vx_flags = VXLAN_HF_VNI;
2299         vxh->vx_vni = vxlan_vni_field(vx_vni);
2300 }
2301
2302 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2303                                           struct net_device *mirred_dev,
2304                                           struct mlx5e_encap_entry *e)
2305 {
2306         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2307         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2308         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2309         struct net_device *out_dev;
2310         struct neighbour *n = NULL;
2311         struct flowi4 fl4 = {};
2312         u8 nud_state, tos, ttl;
2313         char *encap_header;
2314         int err;
2315
2316         if (max_encap_size < ipv4_encap_size) {
2317                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2318                                ipv4_encap_size, max_encap_size);
2319                 return -EOPNOTSUPP;
2320         }
2321
2322         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2323         if (!encap_header)
2324                 return -ENOMEM;
2325
2326         switch (e->tunnel_type) {
2327         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2328                 fl4.flowi4_proto = IPPROTO_UDP;
2329                 fl4.fl4_dport = tun_key->tp_dst;
2330                 break;
2331         default:
2332                 err = -EOPNOTSUPP;
2333                 goto free_encap;
2334         }
2335
2336         tos = tun_key->tos;
2337         ttl = tun_key->ttl;
2338
2339         fl4.flowi4_tos = tun_key->tos;
2340         fl4.daddr = tun_key->u.ipv4.dst;
2341         fl4.saddr = tun_key->u.ipv4.src;
2342
2343         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2344                                       &fl4, &n, &ttl);
2345         if (err)
2346                 goto free_encap;
2347
2348         /* used by mlx5e_detach_encap to lookup a neigh hash table
2349          * entry in the neigh hash table when a user deletes a rule
2350          */
2351         e->m_neigh.dev = n->dev;
2352         e->m_neigh.family = n->ops->family;
2353         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2354         e->out_dev = out_dev;
2355
2356         /* It's importent to add the neigh to the hash table before checking
2357          * the neigh validity state. So if we'll get a notification, in case the
2358          * neigh changes it's validity state, we would find the relevant neigh
2359          * in the hash.
2360          */
2361         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2362         if (err)
2363                 goto free_encap;
2364
2365         read_lock_bh(&n->lock);
2366         nud_state = n->nud_state;
2367         ether_addr_copy(e->h_dest, n->ha);
2368         read_unlock_bh(&n->lock);
2369
2370         switch (e->tunnel_type) {
2371         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2372                 gen_vxlan_header_ipv4(out_dev, encap_header,
2373                                       ipv4_encap_size, e->h_dest, tos, ttl,
2374                                       fl4.daddr,
2375                                       fl4.saddr, tun_key->tp_dst,
2376                                       tunnel_id_to_key32(tun_key->tun_id));
2377                 break;
2378         default:
2379                 err = -EOPNOTSUPP;
2380                 goto destroy_neigh_entry;
2381         }
2382         e->encap_size = ipv4_encap_size;
2383         e->encap_header = encap_header;
2384
2385         if (!(nud_state & NUD_VALID)) {
2386                 neigh_event_send(n, NULL);
2387                 err = -EAGAIN;
2388                 goto out;
2389         }
2390
2391         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2392                                          ipv4_encap_size, encap_header,
2393                                          MLX5_FLOW_NAMESPACE_FDB,
2394                                          &e->encap_id);
2395         if (err)
2396                 goto destroy_neigh_entry;
2397
2398         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2399         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2400         neigh_release(n);
2401         return err;
2402
2403 destroy_neigh_entry:
2404         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2405 free_encap:
2406         kfree(encap_header);
2407 out:
2408         if (n)
2409                 neigh_release(n);
2410         return err;
2411 }
2412
2413 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2414                                           struct net_device *mirred_dev,
2415                                           struct mlx5e_encap_entry *e)
2416 {
2417         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2418         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2419         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2420         struct net_device *out_dev;
2421         struct neighbour *n = NULL;
2422         struct flowi6 fl6 = {};
2423         u8 nud_state, tos, ttl;
2424         char *encap_header;
2425         int err;
2426
2427         if (max_encap_size < ipv6_encap_size) {
2428                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2429                                ipv6_encap_size, max_encap_size);
2430                 return -EOPNOTSUPP;
2431         }
2432
2433         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2434         if (!encap_header)
2435                 return -ENOMEM;
2436
2437         switch (e->tunnel_type) {
2438         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2439                 fl6.flowi6_proto = IPPROTO_UDP;
2440                 fl6.fl6_dport = tun_key->tp_dst;
2441                 break;
2442         default:
2443                 err = -EOPNOTSUPP;
2444                 goto free_encap;
2445         }
2446
2447         tos = tun_key->tos;
2448         ttl = tun_key->ttl;
2449
2450         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2451         fl6.daddr = tun_key->u.ipv6.dst;
2452         fl6.saddr = tun_key->u.ipv6.src;
2453
2454         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2455                                       &fl6, &n, &ttl);
2456         if (err)
2457                 goto free_encap;
2458
2459         /* used by mlx5e_detach_encap to lookup a neigh hash table
2460          * entry in the neigh hash table when a user deletes a rule
2461          */
2462         e->m_neigh.dev = n->dev;
2463         e->m_neigh.family = n->ops->family;
2464         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2465         e->out_dev = out_dev;
2466
2467         /* It's importent to add the neigh to the hash table before checking
2468          * the neigh validity state. So if we'll get a notification, in case the
2469          * neigh changes it's validity state, we would find the relevant neigh
2470          * in the hash.
2471          */
2472         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2473         if (err)
2474                 goto free_encap;
2475
2476         read_lock_bh(&n->lock);
2477         nud_state = n->nud_state;
2478         ether_addr_copy(e->h_dest, n->ha);
2479         read_unlock_bh(&n->lock);
2480
2481         switch (e->tunnel_type) {
2482         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2483                 gen_vxlan_header_ipv6(out_dev, encap_header,
2484                                       ipv6_encap_size, e->h_dest, tos, ttl,
2485                                       &fl6.daddr,
2486                                       &fl6.saddr, tun_key->tp_dst,
2487                                       tunnel_id_to_key32(tun_key->tun_id));
2488                 break;
2489         default:
2490                 err = -EOPNOTSUPP;
2491                 goto destroy_neigh_entry;
2492         }
2493
2494         e->encap_size = ipv6_encap_size;
2495         e->encap_header = encap_header;
2496
2497         if (!(nud_state & NUD_VALID)) {
2498                 neigh_event_send(n, NULL);
2499                 err = -EAGAIN;
2500                 goto out;
2501         }
2502
2503         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2504                                          ipv6_encap_size, encap_header,
2505                                          MLX5_FLOW_NAMESPACE_FDB,
2506                                          &e->encap_id);
2507         if (err)
2508                 goto destroy_neigh_entry;
2509
2510         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2511         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2512         neigh_release(n);
2513         return err;
2514
2515 destroy_neigh_entry:
2516         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2517 free_encap:
2518         kfree(encap_header);
2519 out:
2520         if (n)
2521                 neigh_release(n);
2522         return err;
2523 }
2524
2525 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2526                               struct ip_tunnel_info *tun_info,
2527                               struct net_device *mirred_dev,
2528                               struct net_device **encap_dev,
2529                               struct mlx5e_tc_flow *flow)
2530 {
2531         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2532         unsigned short family = ip_tunnel_info_af(tun_info);
2533         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2534         struct ip_tunnel_key *key = &tun_info->key;
2535         struct mlx5e_encap_entry *e;
2536         int tunnel_type, err = 0;
2537         uintptr_t hash_key;
2538         bool found = false;
2539
2540         /* udp dst port must be set */
2541         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2542                 goto vxlan_encap_offload_err;
2543
2544         /* setting udp src port isn't supported */
2545         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2546 vxlan_encap_offload_err:
2547                 netdev_warn(priv->netdev,
2548                             "must set udp dst port and not set udp src port\n");
2549                 return -EOPNOTSUPP;
2550         }
2551
2552         if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) &&
2553             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2554                 tunnel_type = MLX5_REFORMAT_TYPE_L2_TO_VXLAN;
2555         } else {
2556                 netdev_warn(priv->netdev,
2557                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2558                 return -EOPNOTSUPP;
2559         }
2560
2561         hash_key = hash_encap_info(key);
2562
2563         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2564                                    encap_hlist, hash_key) {
2565                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2566                         found = true;
2567                         break;
2568                 }
2569         }
2570
2571         /* must verify if encap is valid or not */
2572         if (found)
2573                 goto attach_flow;
2574
2575         e = kzalloc(sizeof(*e), GFP_KERNEL);
2576         if (!e)
2577                 return -ENOMEM;
2578
2579         e->tun_info = *tun_info;
2580         e->tunnel_type = tunnel_type;
2581         INIT_LIST_HEAD(&e->flows);
2582
2583         if (family == AF_INET)
2584                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2585         else if (family == AF_INET6)
2586                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2587
2588         if (err && err != -EAGAIN)
2589                 goto out_err;
2590
2591         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2592
2593 attach_flow:
2594         list_add(&flow->encap, &e->flows);
2595         *encap_dev = e->out_dev;
2596         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2597                 attr->encap_id = e->encap_id;
2598         else
2599                 err = -EAGAIN;
2600
2601         return err;
2602
2603 out_err:
2604         kfree(e);
2605         return err;
2606 }
2607
2608 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
2609                                 const struct tc_action *a,
2610                                 struct mlx5_esw_flow_attr *attr,
2611                                 u32 *action)
2612 {
2613         u8 vlan_idx = attr->total_vlan;
2614
2615         if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
2616                 return -EOPNOTSUPP;
2617
2618         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2619                 if (vlan_idx) {
2620                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2621                                                                  MLX5_FS_VLAN_DEPTH))
2622                                 return -EOPNOTSUPP;
2623
2624                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
2625                 } else {
2626                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2627                 }
2628         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2629                 attr->vlan_vid[vlan_idx] = tcf_vlan_push_vid(a);
2630                 attr->vlan_prio[vlan_idx] = tcf_vlan_push_prio(a);
2631                 attr->vlan_proto[vlan_idx] = tcf_vlan_push_proto(a);
2632                 if (!attr->vlan_proto[vlan_idx])
2633                         attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
2634
2635                 if (vlan_idx) {
2636                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2637                                                                  MLX5_FS_VLAN_DEPTH))
2638                                 return -EOPNOTSUPP;
2639
2640                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
2641                 } else {
2642                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
2643                             (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2644                              tcf_vlan_push_prio(a)))
2645                                 return -EOPNOTSUPP;
2646
2647                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2648                 }
2649         } else { /* action is TCA_VLAN_ACT_MODIFY */
2650                 return -EOPNOTSUPP;
2651         }
2652
2653         attr->total_vlan = vlan_idx + 1;
2654
2655         return 0;
2656 }
2657
2658 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2659                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2660                                 struct mlx5e_tc_flow *flow)
2661 {
2662         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2663         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2664         struct ip_tunnel_info *info = NULL;
2665         const struct tc_action *a;
2666         LIST_HEAD(actions);
2667         bool encap = false;
2668         u32 action = 0;
2669         int err;
2670
2671         if (!tcf_exts_has_actions(exts))
2672                 return -EINVAL;
2673
2674         attr->in_rep = rpriv->rep;
2675         attr->in_mdev = priv->mdev;
2676
2677         tcf_exts_to_list(exts, &actions);
2678         list_for_each_entry(a, &actions, list) {
2679                 if (is_tcf_gact_shot(a)) {
2680                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2681                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2682                         continue;
2683                 }
2684
2685                 if (is_tcf_pedit(a)) {
2686                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2687                                                     parse_attr);
2688                         if (err)
2689                                 return err;
2690
2691                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2692                         attr->mirror_count = attr->out_count;
2693                         continue;
2694                 }
2695
2696                 if (is_tcf_csum(a)) {
2697                         if (csum_offload_supported(priv, action,
2698                                                    tcf_csum_update_flags(a)))
2699                                 continue;
2700
2701                         return -EOPNOTSUPP;
2702                 }
2703
2704                 if (is_tcf_mirred_egress_redirect(a) || is_tcf_mirred_egress_mirror(a)) {
2705                         struct mlx5e_priv *out_priv;
2706                         struct net_device *out_dev;
2707
2708                         out_dev = tcf_mirred_dev(a);
2709
2710                         if (attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
2711                                 pr_err("can't support more than %d output ports, can't offload forwarding\n",
2712                                        attr->out_count);
2713                                 return -EOPNOTSUPP;
2714                         }
2715
2716                         if (switchdev_port_same_parent_id(priv->netdev,
2717                                                           out_dev) ||
2718                             is_merged_eswitch_dev(priv, out_dev)) {
2719                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2720                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2721                                 out_priv = netdev_priv(out_dev);
2722                                 rpriv = out_priv->ppriv;
2723                                 attr->out_rep[attr->out_count] = rpriv->rep;
2724                                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
2725                         } else if (encap) {
2726                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2727                                 parse_attr->tun_info = *info;
2728                                 attr->parse_attr = parse_attr;
2729                                 action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |
2730                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2731                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2732                                 /* attr->out_rep is resolved when we handle encap */
2733                         } else {
2734                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2735                                        priv->netdev->name, out_dev->name);
2736                                 return -EINVAL;
2737                         }
2738                         continue;
2739                 }
2740
2741                 if (is_tcf_tunnel_set(a)) {
2742                         info = tcf_tunnel_info(a);
2743                         if (info)
2744                                 encap = true;
2745                         else
2746                                 return -EOPNOTSUPP;
2747                         attr->mirror_count = attr->out_count;
2748                         continue;
2749                 }
2750
2751                 if (is_tcf_vlan(a)) {
2752                         err = parse_tc_vlan_action(priv, a, attr, &action);
2753
2754                         if (err)
2755                                 return err;
2756
2757                         attr->mirror_count = attr->out_count;
2758                         continue;
2759                 }
2760
2761                 if (is_tcf_tunnel_release(a)) {
2762                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2763                         continue;
2764                 }
2765
2766                 return -EINVAL;
2767         }
2768
2769         attr->action = action;
2770         if (!actions_match_supported(priv, exts, parse_attr, flow))
2771                 return -EOPNOTSUPP;
2772
2773         if (attr->out_count > 1 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
2774                 netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
2775                 return -EOPNOTSUPP;
2776         }
2777
2778         return 0;
2779 }
2780
2781 static void get_flags(int flags, u8 *flow_flags)
2782 {
2783         u8 __flow_flags = 0;
2784
2785         if (flags & MLX5E_TC_INGRESS)
2786                 __flow_flags |= MLX5E_TC_FLOW_INGRESS;
2787         if (flags & MLX5E_TC_EGRESS)
2788                 __flow_flags |= MLX5E_TC_FLOW_EGRESS;
2789
2790         *flow_flags = __flow_flags;
2791 }
2792
2793 static const struct rhashtable_params tc_ht_params = {
2794         .head_offset = offsetof(struct mlx5e_tc_flow, node),
2795         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2796         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2797         .automatic_shrinking = true,
2798 };
2799
2800 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv)
2801 {
2802         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2803         struct mlx5e_rep_priv *uplink_rpriv;
2804
2805         if (MLX5_VPORT_MANAGER(priv->mdev) && esw->mode == SRIOV_OFFLOADS) {
2806                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2807                 return &uplink_rpriv->tc_ht;
2808         } else
2809                 return &priv->fs.tc.ht;
2810 }
2811
2812 int mlx5e_configure_flower(struct mlx5e_priv *priv,
2813                            struct tc_cls_flower_offload *f, int flags)
2814 {
2815         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2816         struct mlx5e_tc_flow_parse_attr *parse_attr;
2817         struct rhashtable *tc_ht = get_tc_ht(priv);
2818         struct mlx5e_tc_flow *flow;
2819         int attr_size, err = 0;
2820         u8 flow_flags = 0;
2821
2822         get_flags(flags, &flow_flags);
2823
2824         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
2825         if (flow) {
2826                 netdev_warn_once(priv->netdev, "flow cookie %lx already exists, ignoring\n", f->cookie);
2827                 return 0;
2828         }
2829
2830         if (esw && esw->mode == SRIOV_OFFLOADS) {
2831                 flow_flags |= MLX5E_TC_FLOW_ESWITCH;
2832                 attr_size  = sizeof(struct mlx5_esw_flow_attr);
2833         } else {
2834                 flow_flags |= MLX5E_TC_FLOW_NIC;
2835                 attr_size  = sizeof(struct mlx5_nic_flow_attr);
2836         }
2837
2838         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
2839         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
2840         if (!parse_attr || !flow) {
2841                 err = -ENOMEM;
2842                 goto err_free;
2843         }
2844
2845         flow->cookie = f->cookie;
2846         flow->flags = flow_flags;
2847         flow->priv = priv;
2848
2849         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
2850         if (err < 0)
2851                 goto err_free;
2852
2853         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
2854                 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow);
2855                 if (err < 0)