82723a0e509a960d7c82f4e702dc8d71cd71a673
[sfrench/cifs-2.6.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_tc.c
1 /*
2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include <net/flow_dissector.h>
34 #include <net/sch_generic.h>
35 #include <net/pkt_cls.h>
36 #include <net/tc_act/tc_gact.h>
37 #include <net/tc_act/tc_skbedit.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/device.h>
40 #include <linux/rhashtable.h>
41 #include <net/switchdev.h>
42 #include <net/tc_act/tc_mirred.h>
43 #include <net/tc_act/tc_vlan.h>
44 #include <net/tc_act/tc_tunnel_key.h>
45 #include <net/tc_act/tc_pedit.h>
46 #include <net/tc_act/tc_csum.h>
47 #include <net/vxlan.h>
48 #include <net/arp.h>
49 #include "en.h"
50 #include "en_rep.h"
51 #include "en_tc.h"
52 #include "eswitch.h"
53 #include "lib/vxlan.h"
54 #include "fs_core.h"
55 #include "en/port.h"
56
57 struct mlx5_nic_flow_attr {
58         u32 action;
59         u32 flow_tag;
60         u32 mod_hdr_id;
61         u32 hairpin_tirn;
62         u8 match_level;
63         struct mlx5_flow_table  *hairpin_ft;
64 };
65
66 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
67
68 enum {
69         MLX5E_TC_FLOW_INGRESS   = MLX5E_TC_INGRESS,
70         MLX5E_TC_FLOW_EGRESS    = MLX5E_TC_EGRESS,
71         MLX5E_TC_FLOW_ESWITCH   = BIT(MLX5E_TC_FLOW_BASE),
72         MLX5E_TC_FLOW_NIC       = BIT(MLX5E_TC_FLOW_BASE + 1),
73         MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2),
74         MLX5E_TC_FLOW_HAIRPIN   = BIT(MLX5E_TC_FLOW_BASE + 3),
75         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4),
76 };
77
78 #define MLX5E_TC_MAX_SPLITS 1
79
80 struct mlx5e_tc_flow {
81         struct rhash_head       node;
82         struct mlx5e_priv       *priv;
83         u64                     cookie;
84         u8                      flags;
85         struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1];
86         struct list_head        encap;   /* flows sharing the same encap ID */
87         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
88         struct list_head        hairpin; /* flows sharing the same hairpin */
89         union {
90                 struct mlx5_esw_flow_attr esw_attr[0];
91                 struct mlx5_nic_flow_attr nic_attr[0];
92         };
93 };
94
95 struct mlx5e_tc_flow_parse_attr {
96         struct ip_tunnel_info tun_info;
97         struct mlx5_flow_spec spec;
98         int num_mod_hdr_actions;
99         void *mod_hdr_actions;
100         int mirred_ifindex;
101 };
102
103 enum {
104         MLX5_HEADER_TYPE_VXLAN = 0x0,
105         MLX5_HEADER_TYPE_NVGRE = 0x1,
106 };
107
108 #define MLX5E_TC_TABLE_NUM_GROUPS 4
109 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
110
111 struct mlx5e_hairpin {
112         struct mlx5_hairpin *pair;
113
114         struct mlx5_core_dev *func_mdev;
115         struct mlx5e_priv *func_priv;
116         u32 tdn;
117         u32 tirn;
118
119         int num_channels;
120         struct mlx5e_rqt indir_rqt;
121         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
122         struct mlx5e_ttc_table ttc;
123 };
124
125 struct mlx5e_hairpin_entry {
126         /* a node of a hash table which keeps all the  hairpin entries */
127         struct hlist_node hairpin_hlist;
128
129         /* flows sharing the same hairpin */
130         struct list_head flows;
131
132         u16 peer_vhca_id;
133         u8 prio;
134         struct mlx5e_hairpin *hp;
135 };
136
137 struct mod_hdr_key {
138         int num_actions;
139         void *actions;
140 };
141
142 struct mlx5e_mod_hdr_entry {
143         /* a node of a hash table which keeps all the mod_hdr entries */
144         struct hlist_node mod_hdr_hlist;
145
146         /* flows sharing the same mod_hdr entry */
147         struct list_head flows;
148
149         struct mod_hdr_key key;
150
151         u32 mod_hdr_id;
152 };
153
154 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
155
156 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
157 {
158         return jhash(key->actions,
159                      key->num_actions * MLX5_MH_ACT_SZ, 0);
160 }
161
162 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
163                                    struct mod_hdr_key *b)
164 {
165         if (a->num_actions != b->num_actions)
166                 return 1;
167
168         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
169 }
170
171 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
172                                 struct mlx5e_tc_flow *flow,
173                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
174 {
175         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
176         int num_actions, actions_size, namespace, err;
177         struct mlx5e_mod_hdr_entry *mh;
178         struct mod_hdr_key key;
179         bool found = false;
180         u32 hash_key;
181
182         num_actions  = parse_attr->num_mod_hdr_actions;
183         actions_size = MLX5_MH_ACT_SZ * num_actions;
184
185         key.actions = parse_attr->mod_hdr_actions;
186         key.num_actions = num_actions;
187
188         hash_key = hash_mod_hdr_info(&key);
189
190         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
191                 namespace = MLX5_FLOW_NAMESPACE_FDB;
192                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
193                                        mod_hdr_hlist, hash_key) {
194                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
195                                 found = true;
196                                 break;
197                         }
198                 }
199         } else {
200                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
201                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
202                                        mod_hdr_hlist, hash_key) {
203                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
204                                 found = true;
205                                 break;
206                         }
207                 }
208         }
209
210         if (found)
211                 goto attach_flow;
212
213         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
214         if (!mh)
215                 return -ENOMEM;
216
217         mh->key.actions = (void *)mh + sizeof(*mh);
218         memcpy(mh->key.actions, key.actions, actions_size);
219         mh->key.num_actions = num_actions;
220         INIT_LIST_HEAD(&mh->flows);
221
222         err = mlx5_modify_header_alloc(priv->mdev, namespace,
223                                        mh->key.num_actions,
224                                        mh->key.actions,
225                                        &mh->mod_hdr_id);
226         if (err)
227                 goto out_err;
228
229         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
230                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
231         else
232                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
233
234 attach_flow:
235         list_add(&flow->mod_hdr, &mh->flows);
236         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
237                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
238         else
239                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
240
241         return 0;
242
243 out_err:
244         kfree(mh);
245         return err;
246 }
247
248 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
249                                  struct mlx5e_tc_flow *flow)
250 {
251         struct list_head *next = flow->mod_hdr.next;
252
253         list_del(&flow->mod_hdr);
254
255         if (list_empty(next)) {
256                 struct mlx5e_mod_hdr_entry *mh;
257
258                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
259
260                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
261                 hash_del(&mh->mod_hdr_hlist);
262                 kfree(mh);
263         }
264 }
265
266 static
267 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
268 {
269         struct net_device *netdev;
270         struct mlx5e_priv *priv;
271
272         netdev = __dev_get_by_index(net, ifindex);
273         priv = netdev_priv(netdev);
274         return priv->mdev;
275 }
276
277 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
278 {
279         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
280         void *tirc;
281         int err;
282
283         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
284         if (err)
285                 goto alloc_tdn_err;
286
287         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
288
289         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
290         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
291         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
292
293         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
294         if (err)
295                 goto create_tir_err;
296
297         return 0;
298
299 create_tir_err:
300         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
301 alloc_tdn_err:
302         return err;
303 }
304
305 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
306 {
307         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
308         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
309 }
310
311 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
312 {
313         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
314         struct mlx5e_priv *priv = hp->func_priv;
315         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
316
317         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
318                                       hp->num_channels);
319
320         for (i = 0; i < sz; i++) {
321                 ix = i;
322                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
323                         ix = mlx5e_bits_invert(i, ilog2(sz));
324                 ix = indirection_rqt[ix];
325                 rqn = hp->pair->rqn[ix];
326                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
327         }
328 }
329
330 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
331 {
332         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
333         struct mlx5e_priv *priv = hp->func_priv;
334         struct mlx5_core_dev *mdev = priv->mdev;
335         void *rqtc;
336         u32 *in;
337
338         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
339         in = kvzalloc(inlen, GFP_KERNEL);
340         if (!in)
341                 return -ENOMEM;
342
343         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
344
345         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
346         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
347
348         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
349
350         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
351         if (!err)
352                 hp->indir_rqt.enabled = true;
353
354         kvfree(in);
355         return err;
356 }
357
358 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
359 {
360         struct mlx5e_priv *priv = hp->func_priv;
361         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
362         int tt, i, err;
363         void *tirc;
364
365         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
366                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
367                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
368
369                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
370                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
371                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
372                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
373
374                 err = mlx5_core_create_tir(hp->func_mdev, in,
375                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
376                 if (err) {
377                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
378                         goto err_destroy_tirs;
379                 }
380         }
381         return 0;
382
383 err_destroy_tirs:
384         for (i = 0; i < tt; i++)
385                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
386         return err;
387 }
388
389 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
390 {
391         int tt;
392
393         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
394                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
395 }
396
397 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
398                                          struct ttc_params *ttc_params)
399 {
400         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
401         int tt;
402
403         memset(ttc_params, 0, sizeof(*ttc_params));
404
405         ttc_params->any_tt_tirn = hp->tirn;
406
407         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
408                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
409
410         ft_attr->max_fte = MLX5E_NUM_TT;
411         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
412         ft_attr->prio = MLX5E_TC_PRIO;
413 }
414
415 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
416 {
417         struct mlx5e_priv *priv = hp->func_priv;
418         struct ttc_params ttc_params;
419         int err;
420
421         err = mlx5e_hairpin_create_indirect_rqt(hp);
422         if (err)
423                 return err;
424
425         err = mlx5e_hairpin_create_indirect_tirs(hp);
426         if (err)
427                 goto err_create_indirect_tirs;
428
429         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
430         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
431         if (err)
432                 goto err_create_ttc_table;
433
434         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
435                    hp->num_channels, hp->ttc.ft.t->id);
436
437         return 0;
438
439 err_create_ttc_table:
440         mlx5e_hairpin_destroy_indirect_tirs(hp);
441 err_create_indirect_tirs:
442         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
443
444         return err;
445 }
446
447 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
448 {
449         struct mlx5e_priv *priv = hp->func_priv;
450
451         mlx5e_destroy_ttc_table(priv, &hp->ttc);
452         mlx5e_hairpin_destroy_indirect_tirs(hp);
453         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
454 }
455
456 static struct mlx5e_hairpin *
457 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
458                      int peer_ifindex)
459 {
460         struct mlx5_core_dev *func_mdev, *peer_mdev;
461         struct mlx5e_hairpin *hp;
462         struct mlx5_hairpin *pair;
463         int err;
464
465         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
466         if (!hp)
467                 return ERR_PTR(-ENOMEM);
468
469         func_mdev = priv->mdev;
470         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
471
472         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
473         if (IS_ERR(pair)) {
474                 err = PTR_ERR(pair);
475                 goto create_pair_err;
476         }
477         hp->pair = pair;
478         hp->func_mdev = func_mdev;
479         hp->func_priv = priv;
480         hp->num_channels = params->num_channels;
481
482         err = mlx5e_hairpin_create_transport(hp);
483         if (err)
484                 goto create_transport_err;
485
486         if (hp->num_channels > 1) {
487                 err = mlx5e_hairpin_rss_init(hp);
488                 if (err)
489                         goto rss_init_err;
490         }
491
492         return hp;
493
494 rss_init_err:
495         mlx5e_hairpin_destroy_transport(hp);
496 create_transport_err:
497         mlx5_core_hairpin_destroy(hp->pair);
498 create_pair_err:
499         kfree(hp);
500         return ERR_PTR(err);
501 }
502
503 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
504 {
505         if (hp->num_channels > 1)
506                 mlx5e_hairpin_rss_cleanup(hp);
507         mlx5e_hairpin_destroy_transport(hp);
508         mlx5_core_hairpin_destroy(hp->pair);
509         kvfree(hp);
510 }
511
512 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
513 {
514         return (peer_vhca_id << 16 | prio);
515 }
516
517 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
518                                                      u16 peer_vhca_id, u8 prio)
519 {
520         struct mlx5e_hairpin_entry *hpe;
521         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
522
523         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
524                                hairpin_hlist, hash_key) {
525                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
526                         return hpe;
527         }
528
529         return NULL;
530 }
531
532 #define UNKNOWN_MATCH_PRIO 8
533
534 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
535                                   struct mlx5_flow_spec *spec, u8 *match_prio)
536 {
537         void *headers_c, *headers_v;
538         u8 prio_val, prio_mask = 0;
539         bool vlan_present;
540
541 #ifdef CONFIG_MLX5_CORE_EN_DCB
542         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
543                 netdev_warn(priv->netdev,
544                             "only PCP trust state supported for hairpin\n");
545                 return -EOPNOTSUPP;
546         }
547 #endif
548         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
549         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
550
551         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
552         if (vlan_present) {
553                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
554                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
555         }
556
557         if (!vlan_present || !prio_mask) {
558                 prio_val = UNKNOWN_MATCH_PRIO;
559         } else if (prio_mask != 0x7) {
560                 netdev_warn(priv->netdev,
561                             "masked priority match not supported for hairpin\n");
562                 return -EOPNOTSUPP;
563         }
564
565         *match_prio = prio_val;
566         return 0;
567 }
568
569 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
570                                   struct mlx5e_tc_flow *flow,
571                                   struct mlx5e_tc_flow_parse_attr *parse_attr)
572 {
573         int peer_ifindex = parse_attr->mirred_ifindex;
574         struct mlx5_hairpin_params params;
575         struct mlx5_core_dev *peer_mdev;
576         struct mlx5e_hairpin_entry *hpe;
577         struct mlx5e_hairpin *hp;
578         u64 link_speed64;
579         u32 link_speed;
580         u8 match_prio;
581         u16 peer_id;
582         int err;
583
584         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
585         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
586                 netdev_warn(priv->netdev, "hairpin is not supported\n");
587                 return -EOPNOTSUPP;
588         }
589
590         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
591         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio);
592         if (err)
593                 return err;
594         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
595         if (hpe)
596                 goto attach_flow;
597
598         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
599         if (!hpe)
600                 return -ENOMEM;
601
602         INIT_LIST_HEAD(&hpe->flows);
603         hpe->peer_vhca_id = peer_id;
604         hpe->prio = match_prio;
605
606         params.log_data_size = 15;
607         params.log_data_size = min_t(u8, params.log_data_size,
608                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
609         params.log_data_size = max_t(u8, params.log_data_size,
610                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
611
612         params.log_num_packets = params.log_data_size -
613                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
614         params.log_num_packets = min_t(u8, params.log_num_packets,
615                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
616
617         params.q_counter = priv->q_counter;
618         /* set hairpin pair per each 50Gbs share of the link */
619         mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
620         link_speed = max_t(u32, link_speed, 50000);
621         link_speed64 = link_speed;
622         do_div(link_speed64, 50000);
623         params.num_channels = link_speed64;
624
625         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
626         if (IS_ERR(hp)) {
627                 err = PTR_ERR(hp);
628                 goto create_hairpin_err;
629         }
630
631         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
632                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
633                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
634
635         hpe->hp = hp;
636         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
637                  hash_hairpin_info(peer_id, match_prio));
638
639 attach_flow:
640         if (hpe->hp->num_channels > 1) {
641                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
642                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
643         } else {
644                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
645         }
646         list_add(&flow->hairpin, &hpe->flows);
647
648         return 0;
649
650 create_hairpin_err:
651         kfree(hpe);
652         return err;
653 }
654
655 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
656                                    struct mlx5e_tc_flow *flow)
657 {
658         struct list_head *next = flow->hairpin.next;
659
660         list_del(&flow->hairpin);
661
662         /* no more hairpin flows for us, release the hairpin pair */
663         if (list_empty(next)) {
664                 struct mlx5e_hairpin_entry *hpe;
665
666                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
667
668                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
669                            hpe->hp->pair->peer_mdev->priv.name);
670
671                 mlx5e_hairpin_destroy(hpe->hp);
672                 hash_del(&hpe->hairpin_hlist);
673                 kfree(hpe);
674         }
675 }
676
677 static struct mlx5_flow_handle *
678 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
679                       struct mlx5e_tc_flow_parse_attr *parse_attr,
680                       struct mlx5e_tc_flow *flow)
681 {
682         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
683         struct mlx5_core_dev *dev = priv->mdev;
684         struct mlx5_flow_destination dest[2] = {};
685         struct mlx5_flow_act flow_act = {
686                 .action = attr->action,
687                 .has_flow_tag = true,
688                 .flow_tag = attr->flow_tag,
689                 .encap_id = 0,
690         };
691         struct mlx5_fc *counter = NULL;
692         struct mlx5_flow_handle *rule;
693         bool table_created = false;
694         int err, dest_ix = 0;
695
696         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
697                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr);
698                 if (err) {
699                         rule = ERR_PTR(err);
700                         goto err_add_hairpin_flow;
701                 }
702                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
703                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
704                         dest[dest_ix].ft = attr->hairpin_ft;
705                 } else {
706                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
707                         dest[dest_ix].tir_num = attr->hairpin_tirn;
708                 }
709                 dest_ix++;
710         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
711                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
712                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
713                 dest_ix++;
714         }
715
716         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
717                 counter = mlx5_fc_create(dev, true);
718                 if (IS_ERR(counter)) {
719                         rule = ERR_CAST(counter);
720                         goto err_fc_create;
721                 }
722                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
723                 dest[dest_ix].counter = counter;
724                 dest_ix++;
725         }
726
727         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
728                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
729                 flow_act.modify_id = attr->mod_hdr_id;
730                 kfree(parse_attr->mod_hdr_actions);
731                 if (err) {
732                         rule = ERR_PTR(err);
733                         goto err_create_mod_hdr_id;
734                 }
735         }
736
737         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
738                 int tc_grp_size, tc_tbl_size;
739                 u32 max_flow_counter;
740
741                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
742                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
743
744                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
745
746                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
747                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
748
749                 priv->fs.tc.t =
750                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
751                                                             MLX5E_TC_PRIO,
752                                                             tc_tbl_size,
753                                                             MLX5E_TC_TABLE_NUM_GROUPS,
754                                                             MLX5E_TC_FT_LEVEL, 0);
755                 if (IS_ERR(priv->fs.tc.t)) {
756                         netdev_err(priv->netdev,
757                                    "Failed to create tc offload table\n");
758                         rule = ERR_CAST(priv->fs.tc.t);
759                         goto err_create_ft;
760                 }
761
762                 table_created = true;
763         }
764
765         if (attr->match_level != MLX5_MATCH_NONE)
766                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
767
768         rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
769                                    &flow_act, dest, dest_ix);
770
771         if (IS_ERR(rule))
772                 goto err_add_rule;
773
774         return rule;
775
776 err_add_rule:
777         if (table_created) {
778                 mlx5_destroy_flow_table(priv->fs.tc.t);
779                 priv->fs.tc.t = NULL;
780         }
781 err_create_ft:
782         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
783                 mlx5e_detach_mod_hdr(priv, flow);
784 err_create_mod_hdr_id:
785         mlx5_fc_destroy(dev, counter);
786 err_fc_create:
787         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
788                 mlx5e_hairpin_flow_del(priv, flow);
789 err_add_hairpin_flow:
790         return rule;
791 }
792
793 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
794                                   struct mlx5e_tc_flow *flow)
795 {
796         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
797         struct mlx5_fc *counter = NULL;
798
799         counter = mlx5_flow_rule_counter(flow->rule[0]);
800         mlx5_del_flow_rules(flow->rule[0]);
801         mlx5_fc_destroy(priv->mdev, counter);
802
803         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
804                 mlx5_destroy_flow_table(priv->fs.tc.t);
805                 priv->fs.tc.t = NULL;
806         }
807
808         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
809                 mlx5e_detach_mod_hdr(priv, flow);
810
811         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
812                 mlx5e_hairpin_flow_del(priv, flow);
813 }
814
815 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
816                                struct mlx5e_tc_flow *flow);
817
818 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
819                               struct ip_tunnel_info *tun_info,
820                               struct net_device *mirred_dev,
821                               struct net_device **encap_dev,
822                               struct mlx5e_tc_flow *flow);
823
824 static struct mlx5_flow_handle *
825 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
826                       struct mlx5e_tc_flow_parse_attr *parse_attr,
827                       struct mlx5e_tc_flow *flow)
828 {
829         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
830         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
831         struct net_device *out_dev, *encap_dev = NULL;
832         struct mlx5_flow_handle *rule = NULL;
833         struct mlx5e_rep_priv *rpriv;
834         struct mlx5e_priv *out_priv;
835         int err;
836
837         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
838                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
839                                              attr->parse_attr->mirred_ifindex);
840                 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
841                                          out_dev, &encap_dev, flow);
842                 if (err) {
843                         rule = ERR_PTR(err);
844                         if (err != -EAGAIN)
845                                 goto err_attach_encap;
846                 }
847                 out_priv = netdev_priv(encap_dev);
848                 rpriv = out_priv->ppriv;
849                 attr->out_rep[attr->out_count] = rpriv->rep;
850                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
851         }
852
853         err = mlx5_eswitch_add_vlan_action(esw, attr);
854         if (err) {
855                 rule = ERR_PTR(err);
856                 goto err_add_vlan;
857         }
858
859         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
860                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
861                 kfree(parse_attr->mod_hdr_actions);
862                 if (err) {
863                         rule = ERR_PTR(err);
864                         goto err_mod_hdr;
865                 }
866         }
867
868         /* we get here if (1) there's no error (rule being null) or when
869          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
870          */
871         if (rule != ERR_PTR(-EAGAIN)) {
872                 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
873                 if (IS_ERR(rule))
874                         goto err_add_rule;
875
876                 if (attr->mirror_count) {
877                         flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, &parse_attr->spec, attr);
878                         if (IS_ERR(flow->rule[1]))
879                                 goto err_fwd_rule;
880                 }
881         }
882         return rule;
883
884 err_fwd_rule:
885         mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
886         rule = flow->rule[1];
887 err_add_rule:
888         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
889                 mlx5e_detach_mod_hdr(priv, flow);
890 err_mod_hdr:
891         mlx5_eswitch_del_vlan_action(esw, attr);
892 err_add_vlan:
893         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
894                 mlx5e_detach_encap(priv, flow);
895 err_attach_encap:
896         return rule;
897 }
898
899 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
900                                   struct mlx5e_tc_flow *flow)
901 {
902         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
903         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
904
905         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
906                 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
907                 if (attr->mirror_count)
908                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[1], attr);
909                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
910         }
911
912         mlx5_eswitch_del_vlan_action(esw, attr);
913
914         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
915                 mlx5e_detach_encap(priv, flow);
916                 kvfree(attr->parse_attr);
917         }
918
919         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
920                 mlx5e_detach_mod_hdr(priv, flow);
921 }
922
923 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
924                               struct mlx5e_encap_entry *e)
925 {
926         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
927         struct mlx5_esw_flow_attr *esw_attr;
928         struct mlx5e_tc_flow *flow;
929         int err;
930
931         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
932                                e->encap_size, e->encap_header,
933                                &e->encap_id);
934         if (err) {
935                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
936                                err);
937                 return;
938         }
939         e->flags |= MLX5_ENCAP_ENTRY_VALID;
940         mlx5e_rep_queue_neigh_stats_work(priv);
941
942         list_for_each_entry(flow, &e->flows, encap) {
943                 esw_attr = flow->esw_attr;
944                 esw_attr->encap_id = e->encap_id;
945                 flow->rule[0] = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
946                 if (IS_ERR(flow->rule[0])) {
947                         err = PTR_ERR(flow->rule[0]);
948                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
949                                        err);
950                         continue;
951                 }
952
953                 if (esw_attr->mirror_count) {
954                         flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
955                         if (IS_ERR(flow->rule[1])) {
956                                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], esw_attr);
957                                 err = PTR_ERR(flow->rule[1]);
958                                 mlx5_core_warn(priv->mdev, "Failed to update cached mirror flow, %d\n",
959                                                err);
960                                 continue;
961                         }
962                 }
963
964                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
965         }
966 }
967
968 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
969                               struct mlx5e_encap_entry *e)
970 {
971         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
972         struct mlx5e_tc_flow *flow;
973
974         list_for_each_entry(flow, &e->flows, encap) {
975                 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
976                         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
977
978                         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
979                         if (attr->mirror_count)
980                                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[1], attr);
981                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
982                 }
983         }
984
985         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
986                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
987                 mlx5_encap_dealloc(priv->mdev, e->encap_id);
988         }
989 }
990
991 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
992 {
993         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
994         u64 bytes, packets, lastuse = 0;
995         struct mlx5e_tc_flow *flow;
996         struct mlx5e_encap_entry *e;
997         struct mlx5_fc *counter;
998         struct neigh_table *tbl;
999         bool neigh_used = false;
1000         struct neighbour *n;
1001
1002         if (m_neigh->family == AF_INET)
1003                 tbl = &arp_tbl;
1004 #if IS_ENABLED(CONFIG_IPV6)
1005         else if (m_neigh->family == AF_INET6)
1006                 tbl = &nd_tbl;
1007 #endif
1008         else
1009                 return;
1010
1011         list_for_each_entry(e, &nhe->encap_list, encap_list) {
1012                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
1013                         continue;
1014                 list_for_each_entry(flow, &e->flows, encap) {
1015                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1016                                 counter = mlx5_flow_rule_counter(flow->rule[0]);
1017                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1018                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
1019                                         neigh_used = true;
1020                                         break;
1021                                 }
1022                         }
1023                 }
1024                 if (neigh_used)
1025                         break;
1026         }
1027
1028         if (neigh_used) {
1029                 nhe->reported_lastuse = jiffies;
1030
1031                 /* find the relevant neigh according to the cached device and
1032                  * dst ip pair
1033                  */
1034                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1035                 if (!n)
1036                         return;
1037
1038                 neigh_event_send(n, NULL);
1039                 neigh_release(n);
1040         }
1041 }
1042
1043 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1044                                struct mlx5e_tc_flow *flow)
1045 {
1046         struct list_head *next = flow->encap.next;
1047
1048         list_del(&flow->encap);
1049         if (list_empty(next)) {
1050                 struct mlx5e_encap_entry *e;
1051
1052                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1053                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1054
1055                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1056                         mlx5_encap_dealloc(priv->mdev, e->encap_id);
1057
1058                 hash_del_rcu(&e->encap_hlist);
1059                 kfree(e->encap_header);
1060                 kfree(e);
1061         }
1062 }
1063
1064 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1065                               struct mlx5e_tc_flow *flow)
1066 {
1067         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1068                 mlx5e_tc_del_fdb_flow(priv, flow);
1069         else
1070                 mlx5e_tc_del_nic_flow(priv, flow);
1071 }
1072
1073 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1074                              struct tc_cls_flower_offload *f)
1075 {
1076         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1077                                        outer_headers);
1078         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1079                                        outer_headers);
1080         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1081                                     misc_parameters);
1082         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1083                                     misc_parameters);
1084
1085         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1086         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1087
1088         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1089                 struct flow_dissector_key_keyid *key =
1090                         skb_flow_dissector_target(f->dissector,
1091                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1092                                                   f->key);
1093                 struct flow_dissector_key_keyid *mask =
1094                         skb_flow_dissector_target(f->dissector,
1095                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1096                                                   f->mask);
1097                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1098                          be32_to_cpu(mask->keyid));
1099                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1100                          be32_to_cpu(key->keyid));
1101         }
1102 }
1103
1104 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1105                              struct mlx5_flow_spec *spec,
1106                              struct tc_cls_flower_offload *f)
1107 {
1108         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1109                                        outer_headers);
1110         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1111                                        outer_headers);
1112
1113         struct flow_dissector_key_control *enc_control =
1114                 skb_flow_dissector_target(f->dissector,
1115                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1116                                           f->key);
1117
1118         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1119                 struct flow_dissector_key_ports *key =
1120                         skb_flow_dissector_target(f->dissector,
1121                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1122                                                   f->key);
1123                 struct flow_dissector_key_ports *mask =
1124                         skb_flow_dissector_target(f->dissector,
1125                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1126                                                   f->mask);
1127
1128                 /* Full udp dst port must be given */
1129                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1130                         goto vxlan_match_offload_err;
1131
1132                 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->dst)) &&
1133                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1134                         parse_vxlan_attr(spec, f);
1135                 else {
1136                         netdev_warn(priv->netdev,
1137                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1138                         return -EOPNOTSUPP;
1139                 }
1140
1141                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1142                          udp_dport, ntohs(mask->dst));
1143                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1144                          udp_dport, ntohs(key->dst));
1145
1146                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1147                          udp_sport, ntohs(mask->src));
1148                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1149                          udp_sport, ntohs(key->src));
1150         } else { /* udp dst port must be given */
1151 vxlan_match_offload_err:
1152                 netdev_warn(priv->netdev,
1153                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1154                 return -EOPNOTSUPP;
1155         }
1156
1157         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1158                 struct flow_dissector_key_ipv4_addrs *key =
1159                         skb_flow_dissector_target(f->dissector,
1160                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1161                                                   f->key);
1162                 struct flow_dissector_key_ipv4_addrs *mask =
1163                         skb_flow_dissector_target(f->dissector,
1164                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1165                                                   f->mask);
1166                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1167                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1168                          ntohl(mask->src));
1169                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1170                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1171                          ntohl(key->src));
1172
1173                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1174                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1175                          ntohl(mask->dst));
1176                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1177                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1178                          ntohl(key->dst));
1179
1180                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1181                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1182         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1183                 struct flow_dissector_key_ipv6_addrs *key =
1184                         skb_flow_dissector_target(f->dissector,
1185                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1186                                                   f->key);
1187                 struct flow_dissector_key_ipv6_addrs *mask =
1188                         skb_flow_dissector_target(f->dissector,
1189                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1190                                                   f->mask);
1191
1192                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1193                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1194                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1195                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1196                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1197                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1198
1199                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1200                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1201                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1202                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1203                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1204                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1205
1206                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1207                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1208         }
1209
1210         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_IP)) {
1211                 struct flow_dissector_key_ip *key =
1212                         skb_flow_dissector_target(f->dissector,
1213                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1214                                                   f->key);
1215                 struct flow_dissector_key_ip *mask =
1216                         skb_flow_dissector_target(f->dissector,
1217                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1218                                                   f->mask);
1219
1220                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1221                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1222
1223                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1224                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1225
1226                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1227                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1228         }
1229
1230         /* Enforce DMAC when offloading incoming tunneled flows.
1231          * Flow counters require a match on the DMAC.
1232          */
1233         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1234         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1235         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1236                                      dmac_47_16), priv->netdev->dev_addr);
1237
1238         /* let software handle IP fragments */
1239         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1240         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1241
1242         return 0;
1243 }
1244
1245 static int __parse_cls_flower(struct mlx5e_priv *priv,
1246                               struct mlx5_flow_spec *spec,
1247                               struct tc_cls_flower_offload *f,
1248                               u8 *match_level)
1249 {
1250         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1251                                        outer_headers);
1252         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1253                                        outer_headers);
1254         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1255                                     misc_parameters);
1256         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1257                                     misc_parameters);
1258         u16 addr_type = 0;
1259         u8 ip_proto = 0;
1260
1261         *match_level = MLX5_MATCH_NONE;
1262
1263         if (f->dissector->used_keys &
1264             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1265               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1266               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1267               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1268               BIT(FLOW_DISSECTOR_KEY_CVLAN) |
1269               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1270               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1271               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1272               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1273               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1274               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1275               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1276               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1277               BIT(FLOW_DISSECTOR_KEY_TCP) |
1278               BIT(FLOW_DISSECTOR_KEY_IP)  |
1279               BIT(FLOW_DISSECTOR_KEY_ENC_IP))) {
1280                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1281                             f->dissector->used_keys);
1282                 return -EOPNOTSUPP;
1283         }
1284
1285         if ((dissector_uses_key(f->dissector,
1286                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1287              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1288              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1289             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1290                 struct flow_dissector_key_control *key =
1291                         skb_flow_dissector_target(f->dissector,
1292                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1293                                                   f->key);
1294                 switch (key->addr_type) {
1295                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1296                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1297                         if (parse_tunnel_attr(priv, spec, f))
1298                                 return -EOPNOTSUPP;
1299                         break;
1300                 default:
1301                         return -EOPNOTSUPP;
1302                 }
1303
1304                 /* In decap flow, header pointers should point to the inner
1305                  * headers, outer header were already set by parse_tunnel_attr
1306                  */
1307                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1308                                          inner_headers);
1309                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1310                                          inner_headers);
1311         }
1312
1313         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1314                 struct flow_dissector_key_eth_addrs *key =
1315                         skb_flow_dissector_target(f->dissector,
1316                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1317                                                   f->key);
1318                 struct flow_dissector_key_eth_addrs *mask =
1319                         skb_flow_dissector_target(f->dissector,
1320                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1321                                                   f->mask);
1322
1323                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1324                                              dmac_47_16),
1325                                 mask->dst);
1326                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1327                                              dmac_47_16),
1328                                 key->dst);
1329
1330                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1331                                              smac_47_16),
1332                                 mask->src);
1333                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1334                                              smac_47_16),
1335                                 key->src);
1336
1337                 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1338                         *match_level = MLX5_MATCH_L2;
1339         }
1340
1341         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1342                 struct flow_dissector_key_vlan *key =
1343                         skb_flow_dissector_target(f->dissector,
1344                                                   FLOW_DISSECTOR_KEY_VLAN,
1345                                                   f->key);
1346                 struct flow_dissector_key_vlan *mask =
1347                         skb_flow_dissector_target(f->dissector,
1348                                                   FLOW_DISSECTOR_KEY_VLAN,
1349                                                   f->mask);
1350                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1351                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1352                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1353                                          svlan_tag, 1);
1354                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1355                                          svlan_tag, 1);
1356                         } else {
1357                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1358                                          cvlan_tag, 1);
1359                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1360                                          cvlan_tag, 1);
1361                         }
1362
1363                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1364                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1365
1366                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1367                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1368
1369                         *match_level = MLX5_MATCH_L2;
1370                 }
1371         }
1372
1373         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CVLAN)) {
1374                 struct flow_dissector_key_vlan *key =
1375                         skb_flow_dissector_target(f->dissector,
1376                                                   FLOW_DISSECTOR_KEY_CVLAN,
1377                                                   f->key);
1378                 struct flow_dissector_key_vlan *mask =
1379                         skb_flow_dissector_target(f->dissector,
1380                                                   FLOW_DISSECTOR_KEY_CVLAN,
1381                                                   f->mask);
1382                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1383                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1384                                 MLX5_SET(fte_match_set_misc, misc_c,
1385                                          outer_second_svlan_tag, 1);
1386                                 MLX5_SET(fte_match_set_misc, misc_v,
1387                                          outer_second_svlan_tag, 1);
1388                         } else {
1389                                 MLX5_SET(fte_match_set_misc, misc_c,
1390                                          outer_second_cvlan_tag, 1);
1391                                 MLX5_SET(fte_match_set_misc, misc_v,
1392                                          outer_second_cvlan_tag, 1);
1393                         }
1394
1395                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
1396                                  mask->vlan_id);
1397                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
1398                                  key->vlan_id);
1399                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
1400                                  mask->vlan_priority);
1401                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
1402                                  key->vlan_priority);
1403
1404                         *match_level = MLX5_MATCH_L2;
1405                 }
1406         }
1407
1408         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1409                 struct flow_dissector_key_basic *key =
1410                         skb_flow_dissector_target(f->dissector,
1411                                                   FLOW_DISSECTOR_KEY_BASIC,
1412                                                   f->key);
1413                 struct flow_dissector_key_basic *mask =
1414                         skb_flow_dissector_target(f->dissector,
1415                                                   FLOW_DISSECTOR_KEY_BASIC,
1416                                                   f->mask);
1417                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1418                          ntohs(mask->n_proto));
1419                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1420                          ntohs(key->n_proto));
1421
1422                 if (mask->n_proto)
1423                         *match_level = MLX5_MATCH_L2;
1424         }
1425
1426         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1427                 struct flow_dissector_key_control *key =
1428                         skb_flow_dissector_target(f->dissector,
1429                                                   FLOW_DISSECTOR_KEY_CONTROL,
1430                                                   f->key);
1431
1432                 struct flow_dissector_key_control *mask =
1433                         skb_flow_dissector_target(f->dissector,
1434                                                   FLOW_DISSECTOR_KEY_CONTROL,
1435                                                   f->mask);
1436                 addr_type = key->addr_type;
1437
1438                 /* the HW doesn't support frag first/later */
1439                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1440                         return -EOPNOTSUPP;
1441
1442                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1443                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1444                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1445                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1446
1447                         /* the HW doesn't need L3 inline to match on frag=no */
1448                         if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1449                                 *match_level = MLX5_INLINE_MODE_L2;
1450         /* ***  L2 attributes parsing up to here *** */
1451                         else
1452                                 *match_level = MLX5_INLINE_MODE_IP;
1453                 }
1454         }
1455
1456         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1457                 struct flow_dissector_key_basic *key =
1458                         skb_flow_dissector_target(f->dissector,
1459                                                   FLOW_DISSECTOR_KEY_BASIC,
1460                                                   f->key);
1461                 struct flow_dissector_key_basic *mask =
1462                         skb_flow_dissector_target(f->dissector,
1463                                                   FLOW_DISSECTOR_KEY_BASIC,
1464                                                   f->mask);
1465                 ip_proto = key->ip_proto;
1466
1467                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1468                          mask->ip_proto);
1469                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1470                          key->ip_proto);
1471
1472                 if (mask->ip_proto)
1473                         *match_level = MLX5_MATCH_L3;
1474         }
1475
1476         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1477                 struct flow_dissector_key_ipv4_addrs *key =
1478                         skb_flow_dissector_target(f->dissector,
1479                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1480                                                   f->key);
1481                 struct flow_dissector_key_ipv4_addrs *mask =
1482                         skb_flow_dissector_target(f->dissector,
1483                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1484                                                   f->mask);
1485
1486                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1487                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1488                        &mask->src, sizeof(mask->src));
1489                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1490                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1491                        &key->src, sizeof(key->src));
1492                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1493                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1494                        &mask->dst, sizeof(mask->dst));
1495                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1496                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1497                        &key->dst, sizeof(key->dst));
1498
1499                 if (mask->src || mask->dst)
1500                         *match_level = MLX5_MATCH_L3;
1501         }
1502
1503         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1504                 struct flow_dissector_key_ipv6_addrs *key =
1505                         skb_flow_dissector_target(f->dissector,
1506                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1507                                                   f->key);
1508                 struct flow_dissector_key_ipv6_addrs *mask =
1509                         skb_flow_dissector_target(f->dissector,
1510                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1511                                                   f->mask);
1512
1513                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1514                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1515                        &mask->src, sizeof(mask->src));
1516                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1517                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1518                        &key->src, sizeof(key->src));
1519
1520                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1521                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1522                        &mask->dst, sizeof(mask->dst));
1523                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1524                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1525                        &key->dst, sizeof(key->dst));
1526
1527                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1528                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1529                         *match_level = MLX5_MATCH_L3;
1530         }
1531
1532         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1533                 struct flow_dissector_key_ip *key =
1534                         skb_flow_dissector_target(f->dissector,
1535                                                   FLOW_DISSECTOR_KEY_IP,
1536                                                   f->key);
1537                 struct flow_dissector_key_ip *mask =
1538                         skb_flow_dissector_target(f->dissector,
1539                                                   FLOW_DISSECTOR_KEY_IP,
1540                                                   f->mask);
1541
1542                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1543                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1544
1545                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1546                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1547
1548                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1549                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1550
1551                 if (mask->ttl &&
1552                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1553                                                 ft_field_support.outer_ipv4_ttl))
1554                         return -EOPNOTSUPP;
1555
1556                 if (mask->tos || mask->ttl)
1557                         *match_level = MLX5_MATCH_L3;
1558         }
1559
1560         /* ***  L3 attributes parsing up to here *** */
1561
1562         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1563                 struct flow_dissector_key_ports *key =
1564                         skb_flow_dissector_target(f->dissector,
1565                                                   FLOW_DISSECTOR_KEY_PORTS,
1566                                                   f->key);
1567                 struct flow_dissector_key_ports *mask =
1568                         skb_flow_dissector_target(f->dissector,
1569                                                   FLOW_DISSECTOR_KEY_PORTS,
1570                                                   f->mask);
1571                 switch (ip_proto) {
1572                 case IPPROTO_TCP:
1573                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1574                                  tcp_sport, ntohs(mask->src));
1575                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1576                                  tcp_sport, ntohs(key->src));
1577
1578                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1579                                  tcp_dport, ntohs(mask->dst));
1580                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1581                                  tcp_dport, ntohs(key->dst));
1582                         break;
1583
1584                 case IPPROTO_UDP:
1585                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1586                                  udp_sport, ntohs(mask->src));
1587                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1588                                  udp_sport, ntohs(key->src));
1589
1590                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1591                                  udp_dport, ntohs(mask->dst));
1592                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1593                                  udp_dport, ntohs(key->dst));
1594                         break;
1595                 default:
1596                         netdev_err(priv->netdev,
1597                                    "Only UDP and TCP transport are supported\n");
1598                         return -EINVAL;
1599                 }
1600
1601                 if (mask->src || mask->dst)
1602                         *match_level = MLX5_MATCH_L4;
1603         }
1604
1605         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1606                 struct flow_dissector_key_tcp *key =
1607                         skb_flow_dissector_target(f->dissector,
1608                                                   FLOW_DISSECTOR_KEY_TCP,
1609                                                   f->key);
1610                 struct flow_dissector_key_tcp *mask =
1611                         skb_flow_dissector_target(f->dissector,
1612                                                   FLOW_DISSECTOR_KEY_TCP,
1613                                                   f->mask);
1614
1615                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1616                          ntohs(mask->flags));
1617                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1618                          ntohs(key->flags));
1619
1620                 if (mask->flags)
1621                         *match_level = MLX5_MATCH_L4;
1622         }
1623
1624         return 0;
1625 }
1626
1627 static int parse_cls_flower(struct mlx5e_priv *priv,
1628                             struct mlx5e_tc_flow *flow,
1629                             struct mlx5_flow_spec *spec,
1630                             struct tc_cls_flower_offload *f)
1631 {
1632         struct mlx5_core_dev *dev = priv->mdev;
1633         struct mlx5_eswitch *esw = dev->priv.eswitch;
1634         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1635         struct mlx5_eswitch_rep *rep;
1636         u8 match_level;
1637         int err;
1638
1639         err = __parse_cls_flower(priv, spec, f, &match_level);
1640
1641         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1642                 rep = rpriv->rep;
1643                 if (rep->vport != FDB_UPLINK_VPORT &&
1644                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1645                     esw->offloads.inline_mode < match_level)) {
1646                         netdev_warn(priv->netdev,
1647                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1648                                     match_level, esw->offloads.inline_mode);
1649                         return -EOPNOTSUPP;
1650                 }
1651         }
1652
1653         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1654                 flow->esw_attr->match_level = match_level;
1655         else
1656                 flow->nic_attr->match_level = match_level;
1657
1658         return err;
1659 }
1660
1661 struct pedit_headers {
1662         struct ethhdr  eth;
1663         struct iphdr   ip4;
1664         struct ipv6hdr ip6;
1665         struct tcphdr  tcp;
1666         struct udphdr  udp;
1667 };
1668
1669 static int pedit_header_offsets[] = {
1670         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1671         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1672         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1673         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1674         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1675 };
1676
1677 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1678
1679 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1680                          struct pedit_headers *masks,
1681                          struct pedit_headers *vals)
1682 {
1683         u32 *curr_pmask, *curr_pval;
1684
1685         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1686                 goto out_err;
1687
1688         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1689         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1690
1691         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1692                 goto out_err;
1693
1694         *curr_pmask |= mask;
1695         *curr_pval  |= (val & mask);
1696
1697         return 0;
1698
1699 out_err:
1700         return -EOPNOTSUPP;
1701 }
1702
1703 struct mlx5_fields {
1704         u8  field;
1705         u8  size;
1706         u32 offset;
1707 };
1708
1709 #define OFFLOAD(fw_field, size, field, off) \
1710                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1711
1712 static struct mlx5_fields fields[] = {
1713         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1714         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1715         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1716         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1717         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1718
1719         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1720         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1721         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1722
1723         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1724         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1725         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1726         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1727         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1728         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1729         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1730         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1731         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1732
1733         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1734         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1735         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1736
1737         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1738         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1739 };
1740
1741 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1742  * max from the SW pedit action. On success, it says how many HW actions were
1743  * actually parsed.
1744  */
1745 static int offload_pedit_fields(struct pedit_headers *masks,
1746                                 struct pedit_headers *vals,
1747                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
1748 {
1749         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1750         int i, action_size, nactions, max_actions, first, last, next_z;
1751         void *s_masks_p, *a_masks_p, *vals_p;
1752         struct mlx5_fields *f;
1753         u8 cmd, field_bsize;
1754         u32 s_mask, a_mask;
1755         unsigned long mask;
1756         __be32 mask_be32;
1757         __be16 mask_be16;
1758         void *action;
1759
1760         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1761         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1762         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1763         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1764
1765         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1766         action = parse_attr->mod_hdr_actions;
1767         max_actions = parse_attr->num_mod_hdr_actions;
1768         nactions = 0;
1769
1770         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1771                 f = &fields[i];
1772                 /* avoid seeing bits set from previous iterations */
1773                 s_mask = 0;
1774                 a_mask = 0;
1775
1776                 s_masks_p = (void *)set_masks + f->offset;
1777                 a_masks_p = (void *)add_masks + f->offset;
1778
1779                 memcpy(&s_mask, s_masks_p, f->size);
1780                 memcpy(&a_mask, a_masks_p, f->size);
1781
1782                 if (!s_mask && !a_mask) /* nothing to offload here */
1783                         continue;
1784
1785                 if (s_mask && a_mask) {
1786                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1787                         return -EOPNOTSUPP;
1788                 }
1789
1790                 if (nactions == max_actions) {
1791                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1792                         return -EOPNOTSUPP;
1793                 }
1794
1795                 if (s_mask) {
1796                         cmd  = MLX5_ACTION_TYPE_SET;
1797                         mask = s_mask;
1798                         vals_p = (void *)set_vals + f->offset;
1799                         /* clear to denote we consumed this field */
1800                         memset(s_masks_p, 0, f->size);
1801                 } else {
1802                         cmd  = MLX5_ACTION_TYPE_ADD;
1803                         mask = a_mask;
1804                         vals_p = (void *)add_vals + f->offset;
1805                         /* clear to denote we consumed this field */
1806                         memset(a_masks_p, 0, f->size);
1807                 }
1808
1809                 field_bsize = f->size * BITS_PER_BYTE;
1810
1811                 if (field_bsize == 32) {
1812                         mask_be32 = *(__be32 *)&mask;
1813                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1814                 } else if (field_bsize == 16) {
1815                         mask_be16 = *(__be16 *)&mask;
1816                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1817                 }
1818
1819                 first = find_first_bit(&mask, field_bsize);
1820                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1821                 last  = find_last_bit(&mask, field_bsize);
1822                 if (first < next_z && next_z < last) {
1823                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1824                                mask);
1825                         return -EOPNOTSUPP;
1826                 }
1827
1828                 MLX5_SET(set_action_in, action, action_type, cmd);
1829                 MLX5_SET(set_action_in, action, field, f->field);
1830
1831                 if (cmd == MLX5_ACTION_TYPE_SET) {
1832                         MLX5_SET(set_action_in, action, offset, first);
1833                         /* length is num of bits to be written, zero means length of 32 */
1834                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1835                 }
1836
1837                 if (field_bsize == 32)
1838                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1839                 else if (field_bsize == 16)
1840                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1841                 else if (field_bsize == 8)
1842                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1843
1844                 action += action_size;
1845                 nactions++;
1846         }
1847
1848         parse_attr->num_mod_hdr_actions = nactions;
1849         return 0;
1850 }
1851
1852 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1853                                  const struct tc_action *a, int namespace,
1854                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1855 {
1856         int nkeys, action_size, max_actions;
1857
1858         nkeys = tcf_pedit_nkeys(a);
1859         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1860
1861         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1862                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1863         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1864                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1865
1866         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1867         max_actions = min(max_actions, nkeys * 16);
1868
1869         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1870         if (!parse_attr->mod_hdr_actions)
1871                 return -ENOMEM;
1872
1873         parse_attr->num_mod_hdr_actions = max_actions;
1874         return 0;
1875 }
1876
1877 static const struct pedit_headers zero_masks = {};
1878
1879 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1880                                  const struct tc_action *a, int namespace,
1881                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1882 {
1883         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1884         int nkeys, i, err = -EOPNOTSUPP;
1885         u32 mask, val, offset;
1886         u8 cmd, htype;
1887
1888         nkeys = tcf_pedit_nkeys(a);
1889
1890         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1891         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1892
1893         for (i = 0; i < nkeys; i++) {
1894                 htype = tcf_pedit_htype(a, i);
1895                 cmd = tcf_pedit_cmd(a, i);
1896                 err = -EOPNOTSUPP; /* can't be all optimistic */
1897
1898                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1899                         netdev_warn(priv->netdev, "legacy pedit isn't offloaded\n");
1900                         goto out_err;
1901                 }
1902
1903                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1904                         netdev_warn(priv->netdev, "pedit cmd %d isn't offloaded\n", cmd);
1905                         goto out_err;
1906                 }
1907
1908                 mask = tcf_pedit_mask(a, i);
1909                 val = tcf_pedit_val(a, i);
1910                 offset = tcf_pedit_offset(a, i);
1911
1912                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1913                 if (err)
1914                         goto out_err;
1915         }
1916
1917         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1918         if (err)
1919                 goto out_err;
1920
1921         err = offload_pedit_fields(masks, vals, parse_attr);
1922         if (err < 0)
1923                 goto out_dealloc_parsed_actions;
1924
1925         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1926                 cmd_masks = &masks[cmd];
1927                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1928                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
1929                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1930                                        16, 1, cmd_masks, sizeof(zero_masks), true);
1931                         err = -EOPNOTSUPP;
1932                         goto out_dealloc_parsed_actions;
1933                 }
1934         }
1935
1936         return 0;
1937
1938 out_dealloc_parsed_actions:
1939         kfree(parse_attr->mod_hdr_actions);
1940 out_err:
1941         return err;
1942 }
1943
1944 static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags)
1945 {
1946         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1947                          TCA_CSUM_UPDATE_FLAG_UDP;
1948
1949         /*  The HW recalcs checksums only if re-writing headers */
1950         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1951                 netdev_warn(priv->netdev,
1952                             "TC csum action is only offloaded with pedit\n");
1953                 return false;
1954         }
1955
1956         if (update_flags & ~prot_flags) {
1957                 netdev_warn(priv->netdev,
1958                             "can't offload TC csum action for some header/s - flags %#x\n",
1959                             update_flags);
1960                 return false;
1961         }
1962
1963         return true;
1964 }
1965
1966 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
1967                                           struct tcf_exts *exts)
1968 {
1969         const struct tc_action *a;
1970         bool modify_ip_header;
1971         LIST_HEAD(actions);
1972         u8 htype, ip_proto;
1973         void *headers_v;
1974         u16 ethertype;
1975         int nkeys, i;
1976
1977         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1978         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1979
1980         /* for non-IP we only re-write MACs, so we're okay */
1981         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
1982                 goto out_ok;
1983
1984         modify_ip_header = false;
1985         tcf_exts_for_each_action(i, a, exts) {
1986                 int k;
1987
1988                 if (!is_tcf_pedit(a))
1989                         continue;
1990
1991                 nkeys = tcf_pedit_nkeys(a);
1992                 for (k = 0; k < nkeys; k++) {
1993                         htype = tcf_pedit_htype(a, k);
1994                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
1995                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
1996                                 modify_ip_header = true;
1997                                 break;
1998                         }
1999                 }
2000         }
2001
2002         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
2003         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
2004             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
2005                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
2006                 return false;
2007         }
2008
2009 out_ok:
2010         return true;
2011 }
2012
2013 static bool actions_match_supported(struct mlx5e_priv *priv,
2014                                     struct tcf_exts *exts,
2015                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
2016                                     struct mlx5e_tc_flow *flow)
2017 {
2018         u32 actions;
2019
2020         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
2021                 actions = flow->esw_attr->action;
2022         else
2023                 actions = flow->nic_attr->action;
2024
2025         if (flow->flags & MLX5E_TC_FLOW_EGRESS &&
2026             !(actions & MLX5_FLOW_CONTEXT_ACTION_DECAP))
2027                 return false;
2028
2029         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
2030                 return modify_header_match_supported(&parse_attr->spec, exts);
2031
2032         return true;
2033 }
2034
2035 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
2036 {
2037         struct mlx5_core_dev *fmdev, *pmdev;
2038         u64 fsystem_guid, psystem_guid;
2039
2040         fmdev = priv->mdev;
2041         pmdev = peer_priv->mdev;
2042
2043         fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
2044         psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
2045
2046         return (fsystem_guid == psystem_guid);
2047 }
2048
2049 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2050                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2051                                 struct mlx5e_tc_flow *flow)
2052 {
2053         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
2054         const struct tc_action *a;
2055         LIST_HEAD(actions);
2056         u32 action = 0;
2057         int err, i;
2058
2059         if (!tcf_exts_has_actions(exts))
2060                 return -EINVAL;
2061
2062         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
2063
2064         tcf_exts_for_each_action(i, a, exts) {
2065                 if (is_tcf_gact_shot(a)) {
2066                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
2067                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
2068                                                flow_table_properties_nic_receive.flow_counter))
2069                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
2070                         continue;
2071                 }
2072
2073                 if (is_tcf_pedit(a)) {
2074                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
2075                                                     parse_attr);
2076                         if (err)
2077                                 return err;
2078
2079                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
2080                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2081                         continue;
2082                 }
2083
2084                 if (is_tcf_csum(a)) {
2085                         if (csum_offload_supported(priv, action,
2086                                                    tcf_csum_update_flags(a)))
2087                                 continue;
2088
2089                         return -EOPNOTSUPP;
2090                 }
2091
2092                 if (is_tcf_mirred_egress_redirect(a)) {
2093                         struct net_device *peer_dev = tcf_mirred_dev(a);
2094
2095                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
2096                             same_hw_devs(priv, netdev_priv(peer_dev))) {
2097                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
2098                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2099                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2100                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2101                         } else {
2102                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2103                                             peer_dev->name);
2104                                 return -EINVAL;
2105                         }
2106                         continue;
2107                 }
2108
2109                 if (is_tcf_skbedit_mark(a)) {
2110                         u32 mark = tcf_skbedit_mark(a);
2111
2112                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2113                                 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
2114                                             mark);
2115                                 return -EINVAL;
2116                         }
2117
2118                         attr->flow_tag = mark;
2119                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2120                         continue;
2121                 }
2122
2123                 return -EINVAL;
2124         }
2125
2126         attr->action = action;
2127         if (!actions_match_supported(priv, exts, parse_attr, flow))
2128                 return -EOPNOTSUPP;
2129
2130         return 0;
2131 }
2132
2133 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2134                                  struct ip_tunnel_key *b)
2135 {
2136         return memcmp(a, b, sizeof(*a));
2137 }
2138
2139 static inline int hash_encap_info(struct ip_tunnel_key *key)
2140 {
2141         return jhash(key, sizeof(*key), 0);
2142 }
2143
2144 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2145                                    struct net_device *mirred_dev,
2146                                    struct net_device **out_dev,
2147                                    struct flowi4 *fl4,
2148                                    struct neighbour **out_n,
2149                                    u8 *out_ttl)
2150 {
2151         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2152         struct mlx5e_rep_priv *uplink_rpriv;
2153         struct rtable *rt;
2154         struct neighbour *n = NULL;
2155
2156 #if IS_ENABLED(CONFIG_INET)
2157         int ret;
2158
2159         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2160         ret = PTR_ERR_OR_ZERO(rt);
2161         if (ret)
2162                 return ret;
2163 #else
2164         return -EOPNOTSUPP;
2165 #endif
2166         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2167         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2168         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2169                 *out_dev = uplink_rpriv->netdev;
2170         else
2171                 *out_dev = rt->dst.dev;
2172
2173         if (!(*out_ttl))
2174                 *out_ttl = ip4_dst_hoplimit(&rt->dst);
2175         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2176         ip_rt_put(rt);
2177         if (!n)
2178                 return -ENOMEM;
2179
2180         *out_n = n;
2181         return 0;
2182 }
2183
2184 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2185                                   struct net_device *peer_netdev)
2186 {
2187         struct mlx5e_priv *peer_priv;
2188
2189         peer_priv = netdev_priv(peer_netdev);
2190
2191         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2192                 (priv->netdev->netdev_ops == peer_netdev->netdev_ops) &&
2193                 same_hw_devs(priv, peer_priv) &&
2194                 MLX5_VPORT_MANAGER(peer_priv->mdev) &&
2195                 (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS));
2196 }
2197
2198 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2199                                    struct net_device *mirred_dev,
2200                                    struct net_device **out_dev,
2201                                    struct flowi6 *fl6,
2202                                    struct neighbour **out_n,
2203                                    u8 *out_ttl)
2204 {
2205         struct neighbour *n = NULL;
2206         struct dst_entry *dst;
2207
2208 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2209         struct mlx5e_rep_priv *uplink_rpriv;
2210         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2211         int ret;
2212
2213         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2214                                          fl6);
2215         if (ret < 0)
2216                 return ret;
2217
2218         if (!(*out_ttl))
2219                 *out_ttl = ip6_dst_hoplimit(dst);
2220
2221         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2222         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2223         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2224                 *out_dev = uplink_rpriv->netdev;
2225         else
2226                 *out_dev = dst->dev;
2227 #else
2228         return -EOPNOTSUPP;
2229 #endif
2230
2231         n = dst_neigh_lookup(dst, &fl6->daddr);
2232         dst_release(dst);
2233         if (!n)
2234                 return -ENOMEM;
2235
2236         *out_n = n;
2237         return 0;
2238 }
2239
2240 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2241                                   char buf[], int encap_size,
2242                                   unsigned char h_dest[ETH_ALEN],
2243                                   u8 tos, u8 ttl,
2244                                   __be32 daddr,
2245                                   __be32 saddr,
2246                                   __be16 udp_dst_port,
2247                                   __be32 vx_vni)
2248 {
2249         struct ethhdr *eth = (struct ethhdr *)buf;
2250         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2251         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2252         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2253
2254         memset(buf, 0, encap_size);
2255
2256         ether_addr_copy(eth->h_dest, h_dest);
2257         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2258         eth->h_proto = htons(ETH_P_IP);
2259
2260         ip->daddr = daddr;
2261         ip->saddr = saddr;
2262
2263         ip->tos = tos;
2264         ip->ttl = ttl;
2265         ip->protocol = IPPROTO_UDP;
2266         ip->version = 0x4;
2267         ip->ihl = 0x5;
2268
2269         udp->dest = udp_dst_port;
2270         vxh->vx_flags = VXLAN_HF_VNI;
2271         vxh->vx_vni = vxlan_vni_field(vx_vni);
2272 }
2273
2274 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2275                                   char buf[], int encap_size,
2276                                   unsigned char h_dest[ETH_ALEN],
2277                                   u8 tos, u8 ttl,
2278                                   struct in6_addr *daddr,
2279                                   struct in6_addr *saddr,
2280                                   __be16 udp_dst_port,
2281                                   __be32 vx_vni)
2282 {
2283         struct ethhdr *eth = (struct ethhdr *)buf;
2284         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2285         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2286         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2287
2288         memset(buf, 0, encap_size);
2289
2290         ether_addr_copy(eth->h_dest, h_dest);
2291         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2292         eth->h_proto = htons(ETH_P_IPV6);
2293
2294         ip6_flow_hdr(ip6h, tos, 0);
2295         /* the HW fills up ipv6 payload len */
2296         ip6h->nexthdr     = IPPROTO_UDP;
2297         ip6h->hop_limit   = ttl;
2298         ip6h->daddr       = *daddr;
2299         ip6h->saddr       = *saddr;
2300
2301         udp->dest = udp_dst_port;
2302         vxh->vx_flags = VXLAN_HF_VNI;
2303         vxh->vx_vni = vxlan_vni_field(vx_vni);
2304 }
2305
2306 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2307                                           struct net_device *mirred_dev,
2308                                           struct mlx5e_encap_entry *e)
2309 {
2310         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2311         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2312         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2313         struct net_device *out_dev;
2314         struct neighbour *n = NULL;
2315         struct flowi4 fl4 = {};
2316         u8 nud_state, tos, ttl;
2317         char *encap_header;
2318         int err;
2319
2320         if (max_encap_size < ipv4_encap_size) {
2321                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2322                                ipv4_encap_size, max_encap_size);
2323                 return -EOPNOTSUPP;
2324         }
2325
2326         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2327         if (!encap_header)
2328                 return -ENOMEM;
2329
2330         switch (e->tunnel_type) {
2331         case MLX5_HEADER_TYPE_VXLAN:
2332                 fl4.flowi4_proto = IPPROTO_UDP;
2333                 fl4.fl4_dport = tun_key->tp_dst;
2334                 break;
2335         default:
2336                 err = -EOPNOTSUPP;
2337                 goto free_encap;
2338         }
2339
2340         tos = tun_key->tos;
2341         ttl = tun_key->ttl;
2342
2343         fl4.flowi4_tos = tun_key->tos;
2344         fl4.daddr = tun_key->u.ipv4.dst;
2345         fl4.saddr = tun_key->u.ipv4.src;
2346
2347         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2348                                       &fl4, &n, &ttl);
2349         if (err)
2350                 goto free_encap;
2351
2352         /* used by mlx5e_detach_encap to lookup a neigh hash table
2353          * entry in the neigh hash table when a user deletes a rule
2354          */
2355         e->m_neigh.dev = n->dev;
2356         e->m_neigh.family = n->ops->family;
2357         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2358         e->out_dev = out_dev;
2359
2360         /* It's importent to add the neigh to the hash table before checking
2361          * the neigh validity state. So if we'll get a notification, in case the
2362          * neigh changes it's validity state, we would find the relevant neigh
2363          * in the hash.
2364          */
2365         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2366         if (err)
2367                 goto free_encap;
2368
2369         read_lock_bh(&n->lock);
2370         nud_state = n->nud_state;
2371         ether_addr_copy(e->h_dest, n->ha);
2372         read_unlock_bh(&n->lock);
2373
2374         switch (e->tunnel_type) {
2375         case MLX5_HEADER_TYPE_VXLAN:
2376                 gen_vxlan_header_ipv4(out_dev, encap_header,
2377                                       ipv4_encap_size, e->h_dest, tos, ttl,
2378                                       fl4.daddr,
2379                                       fl4.saddr, tun_key->tp_dst,
2380                                       tunnel_id_to_key32(tun_key->tun_id));
2381                 break;
2382         default:
2383                 err = -EOPNOTSUPP;
2384                 goto destroy_neigh_entry;
2385         }
2386         e->encap_size = ipv4_encap_size;
2387         e->encap_header = encap_header;
2388
2389         if (!(nud_state & NUD_VALID)) {
2390                 neigh_event_send(n, NULL);
2391                 err = -EAGAIN;
2392                 goto out;
2393         }
2394
2395         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2396                                ipv4_encap_size, encap_header, &e->encap_id);
2397         if (err)
2398                 goto destroy_neigh_entry;
2399
2400         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2401         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2402         neigh_release(n);
2403         return err;
2404
2405 destroy_neigh_entry:
2406         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2407 free_encap:
2408         kfree(encap_header);
2409 out:
2410         if (n)
2411                 neigh_release(n);
2412         return err;
2413 }
2414
2415 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2416                                           struct net_device *mirred_dev,
2417                                           struct mlx5e_encap_entry *e)
2418 {
2419         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2420         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2421         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2422         struct net_device *out_dev;
2423         struct neighbour *n = NULL;
2424         struct flowi6 fl6 = {};
2425         u8 nud_state, tos, ttl;
2426         char *encap_header;
2427         int err;
2428
2429         if (max_encap_size < ipv6_encap_size) {
2430                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2431                                ipv6_encap_size, max_encap_size);
2432                 return -EOPNOTSUPP;
2433         }
2434
2435         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2436         if (!encap_header)
2437                 return -ENOMEM;
2438
2439         switch (e->tunnel_type) {
2440         case MLX5_HEADER_TYPE_VXLAN:
2441                 fl6.flowi6_proto = IPPROTO_UDP;
2442                 fl6.fl6_dport = tun_key->tp_dst;
2443                 break;
2444         default:
2445                 err = -EOPNOTSUPP;
2446                 goto free_encap;
2447         }
2448
2449         tos = tun_key->tos;
2450         ttl = tun_key->ttl;
2451
2452         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2453         fl6.daddr = tun_key->u.ipv6.dst;
2454         fl6.saddr = tun_key->u.ipv6.src;
2455
2456         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2457                                       &fl6, &n, &ttl);
2458         if (err)
2459                 goto free_encap;
2460
2461         /* used by mlx5e_detach_encap to lookup a neigh hash table
2462          * entry in the neigh hash table when a user deletes a rule
2463          */
2464         e->m_neigh.dev = n->dev;
2465         e->m_neigh.family = n->ops->family;
2466         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2467         e->out_dev = out_dev;
2468
2469         /* It's importent to add the neigh to the hash table before checking
2470          * the neigh validity state. So if we'll get a notification, in case the
2471          * neigh changes it's validity state, we would find the relevant neigh
2472          * in the hash.
2473          */
2474         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2475         if (err)
2476                 goto free_encap;
2477
2478         read_lock_bh(&n->lock);
2479         nud_state = n->nud_state;
2480         ether_addr_copy(e->h_dest, n->ha);
2481         read_unlock_bh(&n->lock);
2482
2483         switch (e->tunnel_type) {
2484         case MLX5_HEADER_TYPE_VXLAN:
2485                 gen_vxlan_header_ipv6(out_dev, encap_header,
2486                                       ipv6_encap_size, e->h_dest, tos, ttl,
2487                                       &fl6.daddr,
2488                                       &fl6.saddr, tun_key->tp_dst,
2489                                       tunnel_id_to_key32(tun_key->tun_id));
2490                 break;
2491         default:
2492                 err = -EOPNOTSUPP;
2493                 goto destroy_neigh_entry;
2494         }
2495
2496         e->encap_size = ipv6_encap_size;
2497         e->encap_header = encap_header;
2498
2499         if (!(nud_state & NUD_VALID)) {
2500                 neigh_event_send(n, NULL);
2501                 err = -EAGAIN;
2502                 goto out;
2503         }
2504
2505         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2506                                ipv6_encap_size, encap_header, &e->encap_id);
2507         if (err)
2508                 goto destroy_neigh_entry;
2509
2510         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2511         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2512         neigh_release(n);
2513         return err;
2514
2515 destroy_neigh_entry:
2516         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2517 free_encap:
2518         kfree(encap_header);
2519 out:
2520         if (n)
2521                 neigh_release(n);
2522         return err;
2523 }
2524
2525 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2526                               struct ip_tunnel_info *tun_info,
2527                               struct net_device *mirred_dev,
2528                               struct net_device **encap_dev,
2529                               struct mlx5e_tc_flow *flow)
2530 {
2531         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2532         unsigned short family = ip_tunnel_info_af(tun_info);
2533         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2534         struct ip_tunnel_key *key = &tun_info->key;
2535         struct mlx5e_encap_entry *e;
2536         int tunnel_type, err = 0;
2537         uintptr_t hash_key;
2538         bool found = false;
2539
2540         /* udp dst port must be set */
2541         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2542                 goto vxlan_encap_offload_err;
2543
2544         /* setting udp src port isn't supported */
2545         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2546 vxlan_encap_offload_err:
2547                 netdev_warn(priv->netdev,
2548                             "must set udp dst port and not set udp src port\n");
2549                 return -EOPNOTSUPP;
2550         }
2551
2552         if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) &&
2553             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2554                 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
2555         } else {
2556                 netdev_warn(priv->netdev,
2557                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2558                 return -EOPNOTSUPP;
2559         }
2560
2561         hash_key = hash_encap_info(key);
2562
2563         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2564                                    encap_hlist, hash_key) {
2565                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2566                         found = true;
2567                         break;
2568                 }
2569         }
2570
2571         /* must verify if encap is valid or not */
2572         if (found)
2573                 goto attach_flow;
2574
2575         e = kzalloc(sizeof(*e), GFP_KERNEL);
2576         if (!e)
2577                 return -ENOMEM;
2578
2579         e->tun_info = *tun_info;
2580         e->tunnel_type = tunnel_type;
2581         INIT_LIST_HEAD(&e->flows);
2582
2583         if (family == AF_INET)
2584                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2585         else if (family == AF_INET6)
2586                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2587
2588         if (err && err != -EAGAIN)
2589                 goto out_err;
2590
2591         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2592
2593 attach_flow:
2594         list_add(&flow->encap, &e->flows);
2595         *encap_dev = e->out_dev;
2596         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2597                 attr->encap_id = e->encap_id;
2598         else
2599                 err = -EAGAIN;
2600
2601         return err;
2602
2603 out_err:
2604         kfree(e);
2605         return err;
2606 }
2607
2608 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
2609                                 const struct tc_action *a,
2610                                 struct mlx5_esw_flow_attr *attr,
2611                                 u32 *action)
2612 {
2613         u8 vlan_idx = attr->total_vlan;
2614
2615         if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
2616                 return -EOPNOTSUPP;
2617
2618         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2619                 if (vlan_idx) {
2620                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2621                                                                  MLX5_FS_VLAN_DEPTH))
2622                                 return -EOPNOTSUPP;
2623
2624                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
2625                 } else {
2626                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2627                 }
2628         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2629                 attr->vlan_vid[vlan_idx] = tcf_vlan_push_vid(a);
2630                 attr->vlan_prio[vlan_idx] = tcf_vlan_push_prio(a);
2631                 attr->vlan_proto[vlan_idx] = tcf_vlan_push_proto(a);
2632                 if (!attr->vlan_proto[vlan_idx])
2633                         attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
2634
2635                 if (vlan_idx) {
2636                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2637                                                                  MLX5_FS_VLAN_DEPTH))
2638                                 return -EOPNOTSUPP;
2639
2640                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
2641                 } else {
2642                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
2643                             (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2644                              tcf_vlan_push_prio(a)))
2645                                 return -EOPNOTSUPP;
2646
2647                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2648                 }
2649         } else { /* action is TCA_VLAN_ACT_MODIFY */
2650                 return -EOPNOTSUPP;
2651         }
2652
2653         attr->total_vlan = vlan_idx + 1;
2654
2655         return 0;
2656 }
2657
2658 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2659                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2660                                 struct mlx5e_tc_flow *flow)
2661 {
2662         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2663         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2664         struct ip_tunnel_info *info = NULL;
2665         const struct tc_action *a;
2666         LIST_HEAD(actions);
2667         bool encap = false;
2668         u32 action = 0;
2669         int err, i;
2670
2671         if (!tcf_exts_has_actions(exts))
2672                 return -EINVAL;
2673
2674         attr->in_rep = rpriv->rep;
2675         attr->in_mdev = priv->mdev;
2676
2677         tcf_exts_for_each_action(i, a, exts) {
2678                 if (is_tcf_gact_shot(a)) {
2679                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2680                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2681                         continue;
2682                 }
2683
2684                 if (is_tcf_pedit(a)) {
2685                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2686                                                     parse_attr);
2687                         if (err)
2688                                 return err;
2689
2690                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2691                         attr->mirror_count = attr->out_count;
2692                         continue;
2693                 }
2694
2695                 if (is_tcf_csum(a)) {
2696                         if (csum_offload_supported(priv, action,
2697                                                    tcf_csum_update_flags(a)))
2698                                 continue;
2699
2700                         return -EOPNOTSUPP;
2701                 }
2702
2703                 if (is_tcf_mirred_egress_redirect(a) || is_tcf_mirred_egress_mirror(a)) {
2704                         struct mlx5e_priv *out_priv;
2705                         struct net_device *out_dev;
2706
2707                         out_dev = tcf_mirred_dev(a);
2708
2709                         if (attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
2710                                 pr_err("can't support more than %d output ports, can't offload forwarding\n",
2711                                        attr->out_count);
2712                                 return -EOPNOTSUPP;
2713                         }
2714
2715                         if (switchdev_port_same_parent_id(priv->netdev,
2716                                                           out_dev) ||
2717                             is_merged_eswitch_dev(priv, out_dev)) {
2718                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2719                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2720                                 out_priv = netdev_priv(out_dev);
2721                                 rpriv = out_priv->ppriv;
2722                                 attr->out_rep[attr->out_count] = rpriv->rep;
2723                                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
2724                         } else if (encap) {
2725                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2726                                 parse_attr->tun_info = *info;
2727                                 attr->parse_attr = parse_attr;
2728                                 action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
2729                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2730                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2731                                 /* attr->out_rep is resolved when we handle encap */
2732                         } else {
2733                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2734                                        priv->netdev->name, out_dev->name);
2735                                 return -EINVAL;
2736                         }
2737                         continue;
2738                 }
2739
2740                 if (is_tcf_tunnel_set(a)) {
2741                         info = tcf_tunnel_info(a);
2742                         if (info)
2743                                 encap = true;
2744                         else
2745                                 return -EOPNOTSUPP;
2746                         attr->mirror_count = attr->out_count;
2747                         continue;
2748                 }
2749
2750                 if (is_tcf_vlan(a)) {
2751                         err = parse_tc_vlan_action(priv, a, attr, &action);
2752
2753                         if (err)
2754                                 return err;
2755
2756                         attr->mirror_count = attr->out_count;
2757                         continue;
2758                 }
2759
2760                 if (is_tcf_tunnel_release(a)) {
2761                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2762                         continue;
2763                 }
2764
2765                 return -EINVAL;
2766         }
2767
2768         attr->action = action;
2769         if (!actions_match_supported(priv, exts, parse_attr, flow))
2770                 return -EOPNOTSUPP;
2771
2772         if (attr->out_count > 1 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
2773                 netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
2774                 return -EOPNOTSUPP;
2775         }
2776
2777         return 0;
2778 }
2779
2780 static void get_flags(int flags, u8 *flow_flags)
2781 {
2782         u8 __flow_flags = 0;
2783
2784         if (flags & MLX5E_TC_INGRESS)
2785                 __flow_flags |= MLX5E_TC_FLOW_INGRESS;
2786         if (flags & MLX5E_TC_EGRESS)
2787                 __flow_flags |= MLX5E_TC_FLOW_EGRESS;
2788
2789         *flow_flags = __flow_flags;
2790 }
2791
2792 static const struct rhashtable_params tc_ht_params = {
2793         .head_offset = offsetof(struct mlx5e_tc_flow, node),
2794         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2795         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2796         .automatic_shrinking = true,
2797 };
2798
2799 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv)
2800 {
2801         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2802         struct mlx5e_rep_priv *uplink_rpriv;
2803
2804         if (MLX5_VPORT_MANAGER(priv->mdev) && esw->mode == SRIOV_OFFLOADS) {
2805                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2806                 return &uplink_rpriv->tc_ht;
2807         } else
2808                 return &priv->fs.tc.ht;
2809 }
2810
2811 int mlx5e_configure_flower(struct mlx5e_priv *priv,
2812                            struct tc_cls_flower_offload *f, int flags)
2813 {
2814         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2815         struct mlx5e_tc_flow_parse_attr *parse_attr;
2816         struct rhashtable *tc_ht = get_tc_ht(priv);
2817         struct mlx5e_tc_flow *flow;
2818         int attr_size, err = 0;
2819         u8 flow_flags = 0;
2820
2821         get_flags(flags, &flow_flags);
2822
2823         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
2824         if (flow) {
2825                 netdev_warn_once(priv->netdev, "flow cookie %lx already exists, ignoring\n", f->cookie);
2826                 return 0;
2827         }
2828
2829         if (esw && esw->mode == SRIOV_OFFLOADS) {
2830                 flow_flags |= MLX5E_TC_FLOW_ESWITCH;
2831                 attr_size  = sizeof(struct mlx5_esw_flow_attr);
2832         } else {
2833                 flow_flags |= MLX5E_TC_FLOW_NIC;
2834                 attr_size  = sizeof(struct mlx5_nic_flow_attr);
2835         }
2836
2837         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
2838         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
2839         if (!parse_attr || !flow) {
2840                 err = -ENOMEM;
2841                 goto err_free;
2842         }
2843
2844         flow->cookie = f->cookie;
2845         flow->flags = flow_flags;
2846         flow->priv = priv;
2847
2848         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
2849         if (err < 0)
2850                 goto err_free;
2851
2852         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
2853                 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow);
2854                 if (err < 0)
2855                         goto err_free;
2856                 flow->rule[0] = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow);
2857         } else {
2858                 err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow);
2859                 if (err < 0)
2860                         goto err_free;
2861                 flow->rule[0] = mlx5e_tc_add_nic_flow(priv, parse_attr, flow);
2862         }
2863
2864         if (IS_ERR(flow->rule[0])) {
2865                 err = PTR_ERR(flow->rule[0]);
2866                 if (err != -EAGAIN)
2867                         goto err_free;
2868         }
2869
2870         if (err != -EAGAIN)
2871                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
2872
2873         if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) ||
2874             !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP))
2875                 kvfree(parse_attr);
2876
2877         err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params);
2878         if (err) {
2879                 mlx5e_tc_del_flow(priv, flow);
2880                 kfree(flow);
2881         }
2882
2883         return err;
2884
2885 err_free:
2886         kvfree(parse_attr);
2887         kfree(flow);
2888         return err;
2889 }
2890
2891 #define DIRECTION_MASK (MLX5E_TC_INGRESS | MLX5E_TC_EGRESS)
2892 #define FLOW_DIRECTION_MASK (MLX5E_TC_FLOW_INGRESS | MLX5E_TC_FLOW_EGRESS)
2893
2894 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
2895 {
2896         if ((flow->flags & FLOW_DIRECTION_MASK) == (flags & DIRECTION_MASK))
2897                 return true;
2898
2899         return false;
2900 }
2901
2902 int mlx5e_delete_flower(struct mlx5e_priv *priv,
2903                         struct tc_cls_flower_offload *f, int flags)
2904 {
2905         struct rhashtable *tc_ht = get_tc_ht(priv);
2906         struct mlx5e_tc_flow *flow;
2907
2908         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
2909         if (!flow || !same_flow_direction(flow, flags))
2910                 return -EINVAL;
2911
2912         rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
2913
2914         mlx5e_tc_del_flow(priv, flow);
2915
2916         kfree(flow);
2917
2918         return 0;
2919 }
2920
2921 int mlx5e_stats_flower(struct mlx5e_priv *priv,
2922                        struct tc_cls_flower_offload *f, int flags)
2923 {
2924         struct rhashtable *tc_ht = get_tc_ht(priv);
2925         struct mlx5e_tc_flow *flow;
2926         struct mlx5_fc *counter;
2927         u64 bytes;
2928         u64 packets;
2929         u64 lastuse;
2930
2931         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
2932         if (!flow || !same_flow_direction(flow, flags))
2933                 return -EINVAL;
2934
2935         if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
2936                 return 0;
2937
2938         counter = mlx5_flow_rule_counter(flow->rule[0]);
2939         if (!counter)
2940                 return 0;
2941
2942         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
2943
2944         tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
2945
2946         return 0;
2947 }
2948
2949 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
2950 {
2951         struct mlx5e_tc_table *tc = &priv->fs.tc;
2952
2953         hash_init(tc->mod_hdr_tbl);
2954         hash_init(tc->hairpin_tbl);
2955
2956         return rhashtable_init(&tc->ht, &tc_ht_params);
2957 }
2958
2959 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
2960 {
2961         struct mlx5e_tc_flow *flow = ptr;
2962         struct mlx5e_priv *priv = flow->priv;
2963
2964         mlx5e_tc_del_flow(priv, flow);
2965         kfree(flow);
2966 }
2967
2968 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
2969 {
2970         struct mlx5e_tc_table *tc = &priv->fs.tc;
2971
2972         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
2973
2974         if (!IS_ERR_OR_NULL(tc->t)) {
2975                 mlx5_destroy_flow_table(tc->t);
2976                 tc->t = NULL;
2977         }
2978 }
2979
2980 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
2981 {
2982         return rhashtable_init(tc_ht, &tc_ht_params);
2983 }
2984
2985 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
2986 {
2987         rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
2988 }
2989
2990 int mlx5e_tc_num_filters(struct mlx5e_priv *priv)
2991 {
2992         struct rhashtable *tc_ht = get_tc_ht(priv);
2993
2994         return atomic_read(&tc_ht->nelems);
2995 }