2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <net/flow_dissector.h>
34 #include <net/sch_generic.h>
35 #include <net/pkt_cls.h>
36 #include <net/tc_act/tc_gact.h>
37 #include <net/tc_act/tc_skbedit.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/device.h>
40 #include <linux/rhashtable.h>
41 #include <net/switchdev.h>
42 #include <net/tc_act/tc_mirred.h>
43 #include <net/tc_act/tc_vlan.h>
44 #include <net/tc_act/tc_tunnel_key.h>
45 #include <net/tc_act/tc_pedit.h>
46 #include <net/tc_act/tc_csum.h>
47 #include <net/vxlan.h>
53 #include "lib/vxlan.h"
57 struct mlx5_nic_flow_attr {
63 struct mlx5_flow_table *hairpin_ft;
64 struct mlx5_fc *counter;
67 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
70 MLX5E_TC_FLOW_INGRESS = MLX5E_TC_INGRESS,
71 MLX5E_TC_FLOW_EGRESS = MLX5E_TC_EGRESS,
72 MLX5E_TC_FLOW_ESWITCH = BIT(MLX5E_TC_FLOW_BASE),
73 MLX5E_TC_FLOW_NIC = BIT(MLX5E_TC_FLOW_BASE + 1),
74 MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2),
75 MLX5E_TC_FLOW_HAIRPIN = BIT(MLX5E_TC_FLOW_BASE + 3),
76 MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4),
79 #define MLX5E_TC_MAX_SPLITS 1
81 struct mlx5e_tc_flow {
82 struct rhash_head node;
83 struct mlx5e_priv *priv;
86 struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1];
87 struct list_head encap; /* flows sharing the same encap ID */
88 struct list_head mod_hdr; /* flows sharing the same mod hdr ID */
89 struct list_head hairpin; /* flows sharing the same hairpin */
91 struct mlx5_esw_flow_attr esw_attr[0];
92 struct mlx5_nic_flow_attr nic_attr[0];
96 struct mlx5e_tc_flow_parse_attr {
97 struct ip_tunnel_info tun_info;
98 struct mlx5_flow_spec spec;
99 int num_mod_hdr_actions;
100 void *mod_hdr_actions;
104 #define MLX5E_TC_TABLE_NUM_GROUPS 4
105 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
107 struct mlx5e_hairpin {
108 struct mlx5_hairpin *pair;
110 struct mlx5_core_dev *func_mdev;
111 struct mlx5e_priv *func_priv;
116 struct mlx5e_rqt indir_rqt;
117 u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
118 struct mlx5e_ttc_table ttc;
121 struct mlx5e_hairpin_entry {
122 /* a node of a hash table which keeps all the hairpin entries */
123 struct hlist_node hairpin_hlist;
125 /* flows sharing the same hairpin */
126 struct list_head flows;
130 struct mlx5e_hairpin *hp;
138 struct mlx5e_mod_hdr_entry {
139 /* a node of a hash table which keeps all the mod_hdr entries */
140 struct hlist_node mod_hdr_hlist;
142 /* flows sharing the same mod_hdr entry */
143 struct list_head flows;
145 struct mod_hdr_key key;
150 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
152 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
154 return jhash(key->actions,
155 key->num_actions * MLX5_MH_ACT_SZ, 0);
158 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
159 struct mod_hdr_key *b)
161 if (a->num_actions != b->num_actions)
164 return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
167 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
168 struct mlx5e_tc_flow *flow,
169 struct mlx5e_tc_flow_parse_attr *parse_attr)
171 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
172 int num_actions, actions_size, namespace, err;
173 struct mlx5e_mod_hdr_entry *mh;
174 struct mod_hdr_key key;
178 num_actions = parse_attr->num_mod_hdr_actions;
179 actions_size = MLX5_MH_ACT_SZ * num_actions;
181 key.actions = parse_attr->mod_hdr_actions;
182 key.num_actions = num_actions;
184 hash_key = hash_mod_hdr_info(&key);
186 if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
187 namespace = MLX5_FLOW_NAMESPACE_FDB;
188 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
189 mod_hdr_hlist, hash_key) {
190 if (!cmp_mod_hdr_info(&mh->key, &key)) {
196 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
197 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
198 mod_hdr_hlist, hash_key) {
199 if (!cmp_mod_hdr_info(&mh->key, &key)) {
209 mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
213 mh->key.actions = (void *)mh + sizeof(*mh);
214 memcpy(mh->key.actions, key.actions, actions_size);
215 mh->key.num_actions = num_actions;
216 INIT_LIST_HEAD(&mh->flows);
218 err = mlx5_modify_header_alloc(priv->mdev, namespace,
225 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
226 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
228 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
231 list_add(&flow->mod_hdr, &mh->flows);
232 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
233 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
235 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
244 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
245 struct mlx5e_tc_flow *flow)
247 struct list_head *next = flow->mod_hdr.next;
249 list_del(&flow->mod_hdr);
251 if (list_empty(next)) {
252 struct mlx5e_mod_hdr_entry *mh;
254 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
256 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
257 hash_del(&mh->mod_hdr_hlist);
263 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
265 struct net_device *netdev;
266 struct mlx5e_priv *priv;
268 netdev = __dev_get_by_index(net, ifindex);
269 priv = netdev_priv(netdev);
273 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
275 u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
279 err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
283 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
285 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
286 MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
287 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
289 err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
296 mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
301 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
303 mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
304 mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
307 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
309 u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
310 struct mlx5e_priv *priv = hp->func_priv;
311 int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
313 mlx5e_build_default_indir_rqt(indirection_rqt, sz,
316 for (i = 0; i < sz; i++) {
318 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
319 ix = mlx5e_bits_invert(i, ilog2(sz));
320 ix = indirection_rqt[ix];
321 rqn = hp->pair->rqn[ix];
322 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
326 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
328 int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
329 struct mlx5e_priv *priv = hp->func_priv;
330 struct mlx5_core_dev *mdev = priv->mdev;
334 inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
335 in = kvzalloc(inlen, GFP_KERNEL);
339 rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
341 MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
342 MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
344 mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
346 err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
348 hp->indir_rqt.enabled = true;
354 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
356 struct mlx5e_priv *priv = hp->func_priv;
357 u32 in[MLX5_ST_SZ_DW(create_tir_in)];
361 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
362 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
363 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
365 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
366 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
367 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
368 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
370 err = mlx5_core_create_tir(hp->func_mdev, in,
371 MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
373 mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
374 goto err_destroy_tirs;
380 for (i = 0; i < tt; i++)
381 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
385 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
389 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
390 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
393 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
394 struct ttc_params *ttc_params)
396 struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
399 memset(ttc_params, 0, sizeof(*ttc_params));
401 ttc_params->any_tt_tirn = hp->tirn;
403 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
404 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
406 ft_attr->max_fte = MLX5E_NUM_TT;
407 ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
408 ft_attr->prio = MLX5E_TC_PRIO;
411 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
413 struct mlx5e_priv *priv = hp->func_priv;
414 struct ttc_params ttc_params;
417 err = mlx5e_hairpin_create_indirect_rqt(hp);
421 err = mlx5e_hairpin_create_indirect_tirs(hp);
423 goto err_create_indirect_tirs;
425 mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
426 err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
428 goto err_create_ttc_table;
430 netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
431 hp->num_channels, hp->ttc.ft.t->id);
435 err_create_ttc_table:
436 mlx5e_hairpin_destroy_indirect_tirs(hp);
437 err_create_indirect_tirs:
438 mlx5e_destroy_rqt(priv, &hp->indir_rqt);
443 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
445 struct mlx5e_priv *priv = hp->func_priv;
447 mlx5e_destroy_ttc_table(priv, &hp->ttc);
448 mlx5e_hairpin_destroy_indirect_tirs(hp);
449 mlx5e_destroy_rqt(priv, &hp->indir_rqt);
452 static struct mlx5e_hairpin *
453 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
456 struct mlx5_core_dev *func_mdev, *peer_mdev;
457 struct mlx5e_hairpin *hp;
458 struct mlx5_hairpin *pair;
461 hp = kzalloc(sizeof(*hp), GFP_KERNEL);
463 return ERR_PTR(-ENOMEM);
465 func_mdev = priv->mdev;
466 peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
468 pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
471 goto create_pair_err;
474 hp->func_mdev = func_mdev;
475 hp->func_priv = priv;
476 hp->num_channels = params->num_channels;
478 err = mlx5e_hairpin_create_transport(hp);
480 goto create_transport_err;
482 if (hp->num_channels > 1) {
483 err = mlx5e_hairpin_rss_init(hp);
491 mlx5e_hairpin_destroy_transport(hp);
492 create_transport_err:
493 mlx5_core_hairpin_destroy(hp->pair);
499 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
501 if (hp->num_channels > 1)
502 mlx5e_hairpin_rss_cleanup(hp);
503 mlx5e_hairpin_destroy_transport(hp);
504 mlx5_core_hairpin_destroy(hp->pair);
508 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
510 return (peer_vhca_id << 16 | prio);
513 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
514 u16 peer_vhca_id, u8 prio)
516 struct mlx5e_hairpin_entry *hpe;
517 u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
519 hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
520 hairpin_hlist, hash_key) {
521 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
528 #define UNKNOWN_MATCH_PRIO 8
530 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
531 struct mlx5_flow_spec *spec, u8 *match_prio,
532 struct netlink_ext_ack *extack)
534 void *headers_c, *headers_v;
535 u8 prio_val, prio_mask = 0;
538 #ifdef CONFIG_MLX5_CORE_EN_DCB
539 if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
540 NL_SET_ERR_MSG_MOD(extack,
541 "only PCP trust state supported for hairpin");
545 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
546 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
548 vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
550 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
551 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
554 if (!vlan_present || !prio_mask) {
555 prio_val = UNKNOWN_MATCH_PRIO;
556 } else if (prio_mask != 0x7) {
557 NL_SET_ERR_MSG_MOD(extack,
558 "masked priority match not supported for hairpin");
562 *match_prio = prio_val;
566 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
567 struct mlx5e_tc_flow *flow,
568 struct mlx5e_tc_flow_parse_attr *parse_attr,
569 struct netlink_ext_ack *extack)
571 int peer_ifindex = parse_attr->mirred_ifindex;
572 struct mlx5_hairpin_params params;
573 struct mlx5_core_dev *peer_mdev;
574 struct mlx5e_hairpin_entry *hpe;
575 struct mlx5e_hairpin *hp;
582 peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
583 if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
584 NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported");
588 peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
589 err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio,
593 hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
597 hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
601 INIT_LIST_HEAD(&hpe->flows);
602 hpe->peer_vhca_id = peer_id;
603 hpe->prio = match_prio;
605 params.log_data_size = 15;
606 params.log_data_size = min_t(u8, params.log_data_size,
607 MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
608 params.log_data_size = max_t(u8, params.log_data_size,
609 MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
611 params.log_num_packets = params.log_data_size -
612 MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
613 params.log_num_packets = min_t(u8, params.log_num_packets,
614 MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
616 params.q_counter = priv->q_counter;
617 /* set hairpin pair per each 50Gbs share of the link */
618 mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
619 link_speed = max_t(u32, link_speed, 50000);
620 link_speed64 = link_speed;
621 do_div(link_speed64, 50000);
622 params.num_channels = link_speed64;
624 hp = mlx5e_hairpin_create(priv, ¶ms, peer_ifindex);
627 goto create_hairpin_err;
630 netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
631 hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
632 hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
635 hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
636 hash_hairpin_info(peer_id, match_prio));
639 if (hpe->hp->num_channels > 1) {
640 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
641 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
643 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
645 list_add(&flow->hairpin, &hpe->flows);
654 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
655 struct mlx5e_tc_flow *flow)
657 struct list_head *next = flow->hairpin.next;
659 list_del(&flow->hairpin);
661 /* no more hairpin flows for us, release the hairpin pair */
662 if (list_empty(next)) {
663 struct mlx5e_hairpin_entry *hpe;
665 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
667 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
668 hpe->hp->pair->peer_mdev->priv.name);
670 mlx5e_hairpin_destroy(hpe->hp);
671 hash_del(&hpe->hairpin_hlist);
677 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
678 struct mlx5e_tc_flow_parse_attr *parse_attr,
679 struct mlx5e_tc_flow *flow,
680 struct netlink_ext_ack *extack)
682 struct mlx5_nic_flow_attr *attr = flow->nic_attr;
683 struct mlx5_core_dev *dev = priv->mdev;
684 struct mlx5_flow_destination dest[2] = {};
685 struct mlx5_flow_act flow_act = {
686 .action = attr->action,
687 .has_flow_tag = true,
688 .flow_tag = attr->flow_tag,
691 struct mlx5_fc *counter = NULL;
692 bool table_created = false;
693 int err, dest_ix = 0;
695 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
696 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack);
698 goto err_add_hairpin_flow;
700 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
701 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
702 dest[dest_ix].ft = attr->hairpin_ft;
704 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
705 dest[dest_ix].tir_num = attr->hairpin_tirn;
708 } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
709 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
710 dest[dest_ix].ft = priv->fs.vlan.ft.t;
714 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
715 counter = mlx5_fc_create(dev, true);
716 if (IS_ERR(counter)) {
717 err = PTR_ERR(counter);
720 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
721 dest[dest_ix].counter_id = mlx5_fc_id(counter);
723 attr->counter = counter;
726 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
727 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
728 flow_act.modify_id = attr->mod_hdr_id;
729 kfree(parse_attr->mod_hdr_actions);
731 goto err_create_mod_hdr_id;
734 if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
735 int tc_grp_size, tc_tbl_size;
736 u32 max_flow_counter;
738 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
739 MLX5_CAP_GEN(dev, max_flow_counter_15_0);
741 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
743 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
744 BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
747 mlx5_create_auto_grouped_flow_table(priv->fs.ns,
750 MLX5E_TC_TABLE_NUM_GROUPS,
751 MLX5E_TC_FT_LEVEL, 0);
752 if (IS_ERR(priv->fs.tc.t)) {
753 NL_SET_ERR_MSG_MOD(extack,
754 "Failed to create tc offload table\n");
755 netdev_err(priv->netdev,
756 "Failed to create tc offload table\n");
757 err = PTR_ERR(priv->fs.tc.t);
761 table_created = true;
764 if (attr->match_level != MLX5_MATCH_NONE)
765 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
767 flow->rule[0] = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
768 &flow_act, dest, dest_ix);
770 if (IS_ERR(flow->rule[0])) {
771 err = PTR_ERR(flow->rule[0]);
779 mlx5_destroy_flow_table(priv->fs.tc.t);
780 priv->fs.tc.t = NULL;
783 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
784 mlx5e_detach_mod_hdr(priv, flow);
785 err_create_mod_hdr_id:
786 mlx5_fc_destroy(dev, counter);
788 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
789 mlx5e_hairpin_flow_del(priv, flow);
790 err_add_hairpin_flow:
794 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
795 struct mlx5e_tc_flow *flow)
797 struct mlx5_nic_flow_attr *attr = flow->nic_attr;
798 struct mlx5_fc *counter = NULL;
800 counter = attr->counter;
801 mlx5_del_flow_rules(flow->rule[0]);
802 mlx5_fc_destroy(priv->mdev, counter);
804 if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
805 mlx5_destroy_flow_table(priv->fs.tc.t);
806 priv->fs.tc.t = NULL;
809 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
810 mlx5e_detach_mod_hdr(priv, flow);
812 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
813 mlx5e_hairpin_flow_del(priv, flow);
816 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
817 struct mlx5e_tc_flow *flow);
819 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
820 struct ip_tunnel_info *tun_info,
821 struct net_device *mirred_dev,
822 struct net_device **encap_dev,
823 struct mlx5e_tc_flow *flow,
824 struct netlink_ext_ack *extack);
827 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
828 struct mlx5e_tc_flow_parse_attr *parse_attr,
829 struct mlx5e_tc_flow *flow,
830 struct netlink_ext_ack *extack)
832 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
833 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
834 struct net_device *out_dev, *encap_dev = NULL;
835 struct mlx5_fc *counter = NULL;
836 struct mlx5e_rep_priv *rpriv;
837 struct mlx5e_priv *out_priv;
838 int err = 0, encap_err = 0;
840 /* keep the old behaviour, use same prio for all offloaded rules */
843 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
844 out_dev = __dev_get_by_index(dev_net(priv->netdev),
845 attr->parse_attr->mirred_ifindex);
846 encap_err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
847 out_dev, &encap_dev, flow,
849 if (encap_err && encap_err != -EAGAIN) {
851 goto err_attach_encap;
853 out_priv = netdev_priv(encap_dev);
854 rpriv = out_priv->ppriv;
855 attr->out_rep[attr->out_count] = rpriv->rep;
856 attr->out_mdev[attr->out_count++] = out_priv->mdev;
859 err = mlx5_eswitch_add_vlan_action(esw, attr);
863 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
864 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
865 kfree(parse_attr->mod_hdr_actions);
870 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
871 counter = mlx5_fc_create(esw->dev, true);
872 if (IS_ERR(counter)) {
873 err = PTR_ERR(counter);
874 goto err_create_counter;
877 attr->counter = counter;
880 /* we get here if (1) there's no error or when
881 * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
883 if (encap_err != -EAGAIN) {
884 flow->rule[0] = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
885 if (IS_ERR(flow->rule[0])) {
886 err = PTR_ERR(flow->rule[0]);
890 if (attr->mirror_count) {
891 flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, &parse_attr->spec, attr);
892 if (IS_ERR(flow->rule[1])) {
893 err = PTR_ERR(flow->rule[1]);
902 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
904 mlx5_fc_destroy(esw->dev, counter);
906 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
907 mlx5e_detach_mod_hdr(priv, flow);
909 mlx5_eswitch_del_vlan_action(esw, attr);
911 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT)
912 mlx5e_detach_encap(priv, flow);
917 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
918 struct mlx5e_tc_flow *flow)
920 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
921 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
923 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
924 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
925 if (attr->mirror_count)
926 mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr);
927 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
930 mlx5_eswitch_del_vlan_action(esw, attr);
932 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
933 mlx5e_detach_encap(priv, flow);
934 kvfree(attr->parse_attr);
937 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
938 mlx5e_detach_mod_hdr(priv, flow);
940 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT)
941 mlx5_fc_destroy(esw->dev, attr->counter);
944 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
945 struct mlx5e_encap_entry *e)
947 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
948 struct mlx5_esw_flow_attr *esw_attr;
949 struct mlx5e_tc_flow *flow;
952 err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
953 e->encap_size, e->encap_header,
954 MLX5_FLOW_NAMESPACE_FDB,
957 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
961 e->flags |= MLX5_ENCAP_ENTRY_VALID;
962 mlx5e_rep_queue_neigh_stats_work(priv);
964 list_for_each_entry(flow, &e->flows, encap) {
965 esw_attr = flow->esw_attr;
966 esw_attr->encap_id = e->encap_id;
967 flow->rule[0] = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
968 if (IS_ERR(flow->rule[0])) {
969 err = PTR_ERR(flow->rule[0]);
970 mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
975 if (esw_attr->mirror_count) {
976 flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
977 if (IS_ERR(flow->rule[1])) {
978 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], esw_attr);
979 err = PTR_ERR(flow->rule[1]);
980 mlx5_core_warn(priv->mdev, "Failed to update cached mirror flow, %d\n",
986 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
990 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
991 struct mlx5e_encap_entry *e)
993 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
994 struct mlx5e_tc_flow *flow;
996 list_for_each_entry(flow, &e->flows, encap) {
997 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
998 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
1000 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
1001 if (attr->mirror_count)
1002 mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr);
1003 mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
1007 if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
1008 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
1009 mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1013 static struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow)
1015 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1016 return flow->esw_attr->counter;
1018 return flow->nic_attr->counter;
1021 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
1023 struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
1024 u64 bytes, packets, lastuse = 0;
1025 struct mlx5e_tc_flow *flow;
1026 struct mlx5e_encap_entry *e;
1027 struct mlx5_fc *counter;
1028 struct neigh_table *tbl;
1029 bool neigh_used = false;
1030 struct neighbour *n;
1032 if (m_neigh->family == AF_INET)
1034 #if IS_ENABLED(CONFIG_IPV6)
1035 else if (m_neigh->family == AF_INET6)
1041 list_for_each_entry(e, &nhe->encap_list, encap_list) {
1042 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
1044 list_for_each_entry(flow, &e->flows, encap) {
1045 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1046 counter = mlx5e_tc_get_counter(flow);
1047 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1048 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
1059 nhe->reported_lastuse = jiffies;
1061 /* find the relevant neigh according to the cached device and
1064 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1068 neigh_event_send(n, NULL);
1073 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1074 struct mlx5e_tc_flow *flow)
1076 struct list_head *next = flow->encap.next;
1078 list_del(&flow->encap);
1079 if (list_empty(next)) {
1080 struct mlx5e_encap_entry *e;
1082 e = list_entry(next, struct mlx5e_encap_entry, flows);
1083 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1085 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1086 mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1088 hash_del_rcu(&e->encap_hlist);
1089 kfree(e->encap_header);
1094 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1095 struct mlx5e_tc_flow *flow)
1097 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1098 mlx5e_tc_del_fdb_flow(priv, flow);
1100 mlx5e_tc_del_nic_flow(priv, flow);
1103 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1104 struct tc_cls_flower_offload *f)
1106 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1108 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1110 void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1112 void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1115 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1116 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1118 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1119 struct flow_dissector_key_keyid *key =
1120 skb_flow_dissector_target(f->dissector,
1121 FLOW_DISSECTOR_KEY_ENC_KEYID,
1123 struct flow_dissector_key_keyid *mask =
1124 skb_flow_dissector_target(f->dissector,
1125 FLOW_DISSECTOR_KEY_ENC_KEYID,
1127 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1128 be32_to_cpu(mask->keyid));
1129 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1130 be32_to_cpu(key->keyid));
1134 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1135 struct mlx5_flow_spec *spec,
1136 struct tc_cls_flower_offload *f)
1138 struct netlink_ext_ack *extack = f->common.extack;
1139 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1141 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1144 struct flow_dissector_key_control *enc_control =
1145 skb_flow_dissector_target(f->dissector,
1146 FLOW_DISSECTOR_KEY_ENC_CONTROL,
1149 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1150 struct flow_dissector_key_ports *key =
1151 skb_flow_dissector_target(f->dissector,
1152 FLOW_DISSECTOR_KEY_ENC_PORTS,
1154 struct flow_dissector_key_ports *mask =
1155 skb_flow_dissector_target(f->dissector,
1156 FLOW_DISSECTOR_KEY_ENC_PORTS,
1159 /* Full udp dst port must be given */
1160 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1161 goto vxlan_match_offload_err;
1163 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->dst)) &&
1164 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1165 parse_vxlan_attr(spec, f);
1167 NL_SET_ERR_MSG_MOD(extack,
1168 "port isn't an offloaded vxlan udp dport");
1169 netdev_warn(priv->netdev,
1170 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1174 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1175 udp_dport, ntohs(mask->dst));
1176 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1177 udp_dport, ntohs(key->dst));
1179 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1180 udp_sport, ntohs(mask->src));
1181 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1182 udp_sport, ntohs(key->src));
1183 } else { /* udp dst port must be given */
1184 vxlan_match_offload_err:
1185 NL_SET_ERR_MSG_MOD(extack,
1186 "IP tunnel decap offload supported only for vxlan, must set UDP dport");
1187 netdev_warn(priv->netdev,
1188 "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1192 if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1193 struct flow_dissector_key_ipv4_addrs *key =
1194 skb_flow_dissector_target(f->dissector,
1195 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1197 struct flow_dissector_key_ipv4_addrs *mask =
1198 skb_flow_dissector_target(f->dissector,
1199 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1201 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1202 src_ipv4_src_ipv6.ipv4_layout.ipv4,
1204 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1205 src_ipv4_src_ipv6.ipv4_layout.ipv4,
1208 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1209 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1211 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1212 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1215 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1216 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1217 } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1218 struct flow_dissector_key_ipv6_addrs *key =
1219 skb_flow_dissector_target(f->dissector,
1220 FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1222 struct flow_dissector_key_ipv6_addrs *mask =
1223 skb_flow_dissector_target(f->dissector,
1224 FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1227 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1228 src_ipv4_src_ipv6.ipv6_layout.ipv6),
1229 &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1230 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1231 src_ipv4_src_ipv6.ipv6_layout.ipv6),
1232 &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1234 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1235 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1236 &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1237 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1238 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1239 &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1241 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1242 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1245 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_IP)) {
1246 struct flow_dissector_key_ip *key =
1247 skb_flow_dissector_target(f->dissector,
1248 FLOW_DISSECTOR_KEY_ENC_IP,
1250 struct flow_dissector_key_ip *mask =
1251 skb_flow_dissector_target(f->dissector,
1252 FLOW_DISSECTOR_KEY_ENC_IP,
1255 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1256 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1258 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1259 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos >> 2);
1261 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1262 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1265 !MLX5_CAP_ESW_FLOWTABLE_FDB
1267 ft_field_support.outer_ipv4_ttl)) {
1268 NL_SET_ERR_MSG_MOD(extack,
1269 "Matching on TTL is not supported");
1275 /* Enforce DMAC when offloading incoming tunneled flows.
1276 * Flow counters require a match on the DMAC.
1278 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1279 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1280 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1281 dmac_47_16), priv->netdev->dev_addr);
1283 /* let software handle IP fragments */
1284 MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1285 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1290 static int __parse_cls_flower(struct mlx5e_priv *priv,
1291 struct mlx5_flow_spec *spec,
1292 struct tc_cls_flower_offload *f,
1295 struct netlink_ext_ack *extack = f->common.extack;
1296 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1298 void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1300 void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1302 void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1307 *match_level = MLX5_MATCH_NONE;
1309 if (f->dissector->used_keys &
1310 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1311 BIT(FLOW_DISSECTOR_KEY_BASIC) |
1312 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1313 BIT(FLOW_DISSECTOR_KEY_VLAN) |
1314 BIT(FLOW_DISSECTOR_KEY_CVLAN) |
1315 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1316 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1317 BIT(FLOW_DISSECTOR_KEY_PORTS) |
1318 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1319 BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1320 BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1321 BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1322 BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1323 BIT(FLOW_DISSECTOR_KEY_TCP) |
1324 BIT(FLOW_DISSECTOR_KEY_IP) |
1325 BIT(FLOW_DISSECTOR_KEY_ENC_IP))) {
1326 NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
1327 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1328 f->dissector->used_keys);
1332 if ((dissector_uses_key(f->dissector,
1333 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1334 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1335 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1336 dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1337 struct flow_dissector_key_control *key =
1338 skb_flow_dissector_target(f->dissector,
1339 FLOW_DISSECTOR_KEY_ENC_CONTROL,
1341 switch (key->addr_type) {
1342 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1343 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1344 if (parse_tunnel_attr(priv, spec, f))
1351 /* In decap flow, header pointers should point to the inner
1352 * headers, outer header were already set by parse_tunnel_attr
1354 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1356 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1360 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1361 struct flow_dissector_key_eth_addrs *key =
1362 skb_flow_dissector_target(f->dissector,
1363 FLOW_DISSECTOR_KEY_ETH_ADDRS,
1365 struct flow_dissector_key_eth_addrs *mask =
1366 skb_flow_dissector_target(f->dissector,
1367 FLOW_DISSECTOR_KEY_ETH_ADDRS,
1370 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1373 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1377 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1380 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1384 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1385 *match_level = MLX5_MATCH_L2;
1388 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1389 struct flow_dissector_key_vlan *key =
1390 skb_flow_dissector_target(f->dissector,
1391 FLOW_DISSECTOR_KEY_VLAN,
1393 struct flow_dissector_key_vlan *mask =
1394 skb_flow_dissector_target(f->dissector,
1395 FLOW_DISSECTOR_KEY_VLAN,
1397 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1398 if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1399 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1401 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1404 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1406 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1410 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1411 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1413 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1414 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1416 *match_level = MLX5_MATCH_L2;
1419 MLX5_SET(fte_match_set_lyr_2_4, headers_c, svlan_tag, 1);
1420 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1423 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CVLAN)) {
1424 struct flow_dissector_key_vlan *key =
1425 skb_flow_dissector_target(f->dissector,
1426 FLOW_DISSECTOR_KEY_CVLAN,
1428 struct flow_dissector_key_vlan *mask =
1429 skb_flow_dissector_target(f->dissector,
1430 FLOW_DISSECTOR_KEY_CVLAN,
1432 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1433 if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1434 MLX5_SET(fte_match_set_misc, misc_c,
1435 outer_second_svlan_tag, 1);
1436 MLX5_SET(fte_match_set_misc, misc_v,
1437 outer_second_svlan_tag, 1);
1439 MLX5_SET(fte_match_set_misc, misc_c,
1440 outer_second_cvlan_tag, 1);
1441 MLX5_SET(fte_match_set_misc, misc_v,
1442 outer_second_cvlan_tag, 1);
1445 MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
1447 MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
1449 MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
1450 mask->vlan_priority);
1451 MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
1452 key->vlan_priority);
1454 *match_level = MLX5_MATCH_L2;
1458 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1459 struct flow_dissector_key_basic *key =
1460 skb_flow_dissector_target(f->dissector,
1461 FLOW_DISSECTOR_KEY_BASIC,
1463 struct flow_dissector_key_basic *mask =
1464 skb_flow_dissector_target(f->dissector,
1465 FLOW_DISSECTOR_KEY_BASIC,
1467 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1468 ntohs(mask->n_proto));
1469 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1470 ntohs(key->n_proto));
1473 *match_level = MLX5_MATCH_L2;
1476 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1477 struct flow_dissector_key_control *key =
1478 skb_flow_dissector_target(f->dissector,
1479 FLOW_DISSECTOR_KEY_CONTROL,
1482 struct flow_dissector_key_control *mask =
1483 skb_flow_dissector_target(f->dissector,
1484 FLOW_DISSECTOR_KEY_CONTROL,
1486 addr_type = key->addr_type;
1488 /* the HW doesn't support frag first/later */
1489 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1492 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1493 MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1494 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1495 key->flags & FLOW_DIS_IS_FRAGMENT);
1497 /* the HW doesn't need L3 inline to match on frag=no */
1498 if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1499 *match_level = MLX5_INLINE_MODE_L2;
1500 /* *** L2 attributes parsing up to here *** */
1502 *match_level = MLX5_INLINE_MODE_IP;
1506 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1507 struct flow_dissector_key_basic *key =
1508 skb_flow_dissector_target(f->dissector,
1509 FLOW_DISSECTOR_KEY_BASIC,
1511 struct flow_dissector_key_basic *mask =
1512 skb_flow_dissector_target(f->dissector,
1513 FLOW_DISSECTOR_KEY_BASIC,
1515 ip_proto = key->ip_proto;
1517 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1519 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1523 *match_level = MLX5_MATCH_L3;
1526 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1527 struct flow_dissector_key_ipv4_addrs *key =
1528 skb_flow_dissector_target(f->dissector,
1529 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1531 struct flow_dissector_key_ipv4_addrs *mask =
1532 skb_flow_dissector_target(f->dissector,
1533 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1536 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1537 src_ipv4_src_ipv6.ipv4_layout.ipv4),
1538 &mask->src, sizeof(mask->src));
1539 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1540 src_ipv4_src_ipv6.ipv4_layout.ipv4),
1541 &key->src, sizeof(key->src));
1542 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1543 dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1544 &mask->dst, sizeof(mask->dst));
1545 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1546 dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1547 &key->dst, sizeof(key->dst));
1549 if (mask->src || mask->dst)
1550 *match_level = MLX5_MATCH_L3;
1553 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1554 struct flow_dissector_key_ipv6_addrs *key =
1555 skb_flow_dissector_target(f->dissector,
1556 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1558 struct flow_dissector_key_ipv6_addrs *mask =
1559 skb_flow_dissector_target(f->dissector,
1560 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1563 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1564 src_ipv4_src_ipv6.ipv6_layout.ipv6),
1565 &mask->src, sizeof(mask->src));
1566 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1567 src_ipv4_src_ipv6.ipv6_layout.ipv6),
1568 &key->src, sizeof(key->src));
1570 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1571 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1572 &mask->dst, sizeof(mask->dst));
1573 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1574 dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1575 &key->dst, sizeof(key->dst));
1577 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1578 ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1579 *match_level = MLX5_MATCH_L3;
1582 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1583 struct flow_dissector_key_ip *key =
1584 skb_flow_dissector_target(f->dissector,
1585 FLOW_DISSECTOR_KEY_IP,
1587 struct flow_dissector_key_ip *mask =
1588 skb_flow_dissector_target(f->dissector,
1589 FLOW_DISSECTOR_KEY_IP,
1592 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1593 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1595 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1596 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos >> 2);
1598 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1599 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1602 !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1603 ft_field_support.outer_ipv4_ttl)) {
1604 NL_SET_ERR_MSG_MOD(extack,
1605 "Matching on TTL is not supported");
1609 if (mask->tos || mask->ttl)
1610 *match_level = MLX5_MATCH_L3;
1613 /* *** L3 attributes parsing up to here *** */
1615 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1616 struct flow_dissector_key_ports *key =
1617 skb_flow_dissector_target(f->dissector,
1618 FLOW_DISSECTOR_KEY_PORTS,
1620 struct flow_dissector_key_ports *mask =
1621 skb_flow_dissector_target(f->dissector,
1622 FLOW_DISSECTOR_KEY_PORTS,
1626 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1627 tcp_sport, ntohs(mask->src));
1628 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1629 tcp_sport, ntohs(key->src));
1631 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1632 tcp_dport, ntohs(mask->dst));
1633 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1634 tcp_dport, ntohs(key->dst));
1638 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1639 udp_sport, ntohs(mask->src));
1640 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1641 udp_sport, ntohs(key->src));
1643 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1644 udp_dport, ntohs(mask->dst));
1645 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1646 udp_dport, ntohs(key->dst));
1649 NL_SET_ERR_MSG_MOD(extack,
1650 "Only UDP and TCP transports are supported for L4 matching");
1651 netdev_err(priv->netdev,
1652 "Only UDP and TCP transport are supported\n");
1656 if (mask->src || mask->dst)
1657 *match_level = MLX5_MATCH_L4;
1660 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1661 struct flow_dissector_key_tcp *key =
1662 skb_flow_dissector_target(f->dissector,
1663 FLOW_DISSECTOR_KEY_TCP,
1665 struct flow_dissector_key_tcp *mask =
1666 skb_flow_dissector_target(f->dissector,
1667 FLOW_DISSECTOR_KEY_TCP,
1670 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1671 ntohs(mask->flags));
1672 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1676 *match_level = MLX5_MATCH_L4;
1682 static int parse_cls_flower(struct mlx5e_priv *priv,
1683 struct mlx5e_tc_flow *flow,
1684 struct mlx5_flow_spec *spec,
1685 struct tc_cls_flower_offload *f)
1687 struct netlink_ext_ack *extack = f->common.extack;
1688 struct mlx5_core_dev *dev = priv->mdev;
1689 struct mlx5_eswitch *esw = dev->priv.eswitch;
1690 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1691 struct mlx5_eswitch_rep *rep;
1695 err = __parse_cls_flower(priv, spec, f, &match_level);
1697 if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1699 if (rep->vport != FDB_UPLINK_VPORT &&
1700 (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1701 esw->offloads.inline_mode < match_level)) {
1702 NL_SET_ERR_MSG_MOD(extack,
1703 "Flow is not offloaded due to min inline setting");
1704 netdev_warn(priv->netdev,
1705 "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1706 match_level, esw->offloads.inline_mode);
1711 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1712 flow->esw_attr->match_level = match_level;
1714 flow->nic_attr->match_level = match_level;
1719 struct pedit_headers {
1727 static int pedit_header_offsets[] = {
1728 [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1729 [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1730 [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1731 [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1732 [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1735 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1737 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1738 struct pedit_headers *masks,
1739 struct pedit_headers *vals)
1741 u32 *curr_pmask, *curr_pval;
1743 if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1746 curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1747 curr_pval = (u32 *)(pedit_header(vals, hdr_type) + offset);
1749 if (*curr_pmask & mask) /* disallow acting twice on the same location */
1752 *curr_pmask |= mask;
1753 *curr_pval |= (val & mask);
1761 struct mlx5_fields {
1767 #define OFFLOAD(fw_field, size, field, off) \
1768 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1770 static struct mlx5_fields fields[] = {
1771 OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1772 OFFLOAD(DMAC_15_0, 2, eth.h_dest[4], 0),
1773 OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1774 OFFLOAD(SMAC_15_0, 2, eth.h_source[4], 0),
1775 OFFLOAD(ETHERTYPE, 2, eth.h_proto, 0),
1777 OFFLOAD(IP_TTL, 1, ip4.ttl, 0),
1778 OFFLOAD(SIPV4, 4, ip4.saddr, 0),
1779 OFFLOAD(DIPV4, 4, ip4.daddr, 0),
1781 OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1782 OFFLOAD(SIPV6_95_64, 4, ip6.saddr.s6_addr32[1], 0),
1783 OFFLOAD(SIPV6_63_32, 4, ip6.saddr.s6_addr32[2], 0),
1784 OFFLOAD(SIPV6_31_0, 4, ip6.saddr.s6_addr32[3], 0),
1785 OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1786 OFFLOAD(DIPV6_95_64, 4, ip6.daddr.s6_addr32[1], 0),
1787 OFFLOAD(DIPV6_63_32, 4, ip6.daddr.s6_addr32[2], 0),
1788 OFFLOAD(DIPV6_31_0, 4, ip6.daddr.s6_addr32[3], 0),
1789 OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1791 OFFLOAD(TCP_SPORT, 2, tcp.source, 0),
1792 OFFLOAD(TCP_DPORT, 2, tcp.dest, 0),
1793 OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1795 OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1796 OFFLOAD(UDP_DPORT, 2, udp.dest, 0),
1799 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1800 * max from the SW pedit action. On success, it says how many HW actions were
1803 static int offload_pedit_fields(struct pedit_headers *masks,
1804 struct pedit_headers *vals,
1805 struct mlx5e_tc_flow_parse_attr *parse_attr,
1806 struct netlink_ext_ack *extack)
1808 struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1809 int i, action_size, nactions, max_actions, first, last, next_z;
1810 void *s_masks_p, *a_masks_p, *vals_p;
1811 struct mlx5_fields *f;
1812 u8 cmd, field_bsize;
1819 set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1820 add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1821 set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1822 add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1824 action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1825 action = parse_attr->mod_hdr_actions;
1826 max_actions = parse_attr->num_mod_hdr_actions;
1829 for (i = 0; i < ARRAY_SIZE(fields); i++) {
1831 /* avoid seeing bits set from previous iterations */
1835 s_masks_p = (void *)set_masks + f->offset;
1836 a_masks_p = (void *)add_masks + f->offset;
1838 memcpy(&s_mask, s_masks_p, f->size);
1839 memcpy(&a_mask, a_masks_p, f->size);
1841 if (!s_mask && !a_mask) /* nothing to offload here */
1844 if (s_mask && a_mask) {
1845 NL_SET_ERR_MSG_MOD(extack,
1846 "can't set and add to the same HW field");
1847 printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1851 if (nactions == max_actions) {
1852 NL_SET_ERR_MSG_MOD(extack,
1853 "too many pedit actions, can't offload");
1854 printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1859 cmd = MLX5_ACTION_TYPE_SET;
1861 vals_p = (void *)set_vals + f->offset;
1862 /* clear to denote we consumed this field */
1863 memset(s_masks_p, 0, f->size);
1865 cmd = MLX5_ACTION_TYPE_ADD;
1867 vals_p = (void *)add_vals + f->offset;
1868 /* clear to denote we consumed this field */
1869 memset(a_masks_p, 0, f->size);
1872 field_bsize = f->size * BITS_PER_BYTE;
1874 if (field_bsize == 32) {
1875 mask_be32 = *(__be32 *)&mask;
1876 mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1877 } else if (field_bsize == 16) {
1878 mask_be16 = *(__be16 *)&mask;
1879 mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1882 first = find_first_bit(&mask, field_bsize);
1883 next_z = find_next_zero_bit(&mask, field_bsize, first);
1884 last = find_last_bit(&mask, field_bsize);
1885 if (first < next_z && next_z < last) {
1886 NL_SET_ERR_MSG_MOD(extack,
1887 "rewrite of few sub-fields isn't supported");
1888 printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1893 MLX5_SET(set_action_in, action, action_type, cmd);
1894 MLX5_SET(set_action_in, action, field, f->field);
1896 if (cmd == MLX5_ACTION_TYPE_SET) {
1897 MLX5_SET(set_action_in, action, offset, first);
1898 /* length is num of bits to be written, zero means length of 32 */
1899 MLX5_SET(set_action_in, action, length, (last - first + 1));
1902 if (field_bsize == 32)
1903 MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1904 else if (field_bsize == 16)
1905 MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1906 else if (field_bsize == 8)
1907 MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1909 action += action_size;
1913 parse_attr->num_mod_hdr_actions = nactions;
1917 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1918 const struct tc_action *a, int namespace,
1919 struct mlx5e_tc_flow_parse_attr *parse_attr)
1921 int nkeys, action_size, max_actions;
1923 nkeys = tcf_pedit_nkeys(a);
1924 action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1926 if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1927 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1928 else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1929 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1931 /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1932 max_actions = min(max_actions, nkeys * 16);
1934 parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1935 if (!parse_attr->mod_hdr_actions)
1938 parse_attr->num_mod_hdr_actions = max_actions;
1942 static const struct pedit_headers zero_masks = {};
1944 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1945 const struct tc_action *a, int namespace,
1946 struct mlx5e_tc_flow_parse_attr *parse_attr,
1947 struct netlink_ext_ack *extack)
1949 struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1950 int nkeys, i, err = -EOPNOTSUPP;
1951 u32 mask, val, offset;
1954 nkeys = tcf_pedit_nkeys(a);
1956 memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1957 memset(vals, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1959 for (i = 0; i < nkeys; i++) {
1960 htype = tcf_pedit_htype(a, i);
1961 cmd = tcf_pedit_cmd(a, i);
1962 err = -EOPNOTSUPP; /* can't be all optimistic */
1964 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1965 NL_SET_ERR_MSG_MOD(extack,
1966 "legacy pedit isn't offloaded");
1970 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1971 NL_SET_ERR_MSG_MOD(extack, "pedit cmd isn't offloaded");
1975 mask = tcf_pedit_mask(a, i);
1976 val = tcf_pedit_val(a, i);
1977 offset = tcf_pedit_offset(a, i);
1979 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1984 err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1988 err = offload_pedit_fields(masks, vals, parse_attr, extack);
1990 goto out_dealloc_parsed_actions;
1992 for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1993 cmd_masks = &masks[cmd];
1994 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1995 NL_SET_ERR_MSG_MOD(extack,
1996 "attempt to offload an unsupported field");
1997 netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
1998 print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1999 16, 1, cmd_masks, sizeof(zero_masks), true);
2001 goto out_dealloc_parsed_actions;
2007 out_dealloc_parsed_actions:
2008 kfree(parse_attr->mod_hdr_actions);
2013 static bool csum_offload_supported(struct mlx5e_priv *priv,
2016 struct netlink_ext_ack *extack)
2018 u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
2019 TCA_CSUM_UPDATE_FLAG_UDP;
2021 /* The HW recalcs checksums only if re-writing headers */
2022 if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
2023 NL_SET_ERR_MSG_MOD(extack,
2024 "TC csum action is only offloaded with pedit");
2025 netdev_warn(priv->netdev,
2026 "TC csum action is only offloaded with pedit\n");
2030 if (update_flags & ~prot_flags) {
2031 NL_SET_ERR_MSG_MOD(extack,
2032 "can't offload TC csum action for some header/s");
2033 netdev_warn(priv->netdev,
2034 "can't offload TC csum action for some header/s - flags %#x\n",
2042 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
2043 struct tcf_exts *exts,
2044 struct netlink_ext_ack *extack)
2046 const struct tc_action *a;
2047 bool modify_ip_header;
2054 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
2055 ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
2057 /* for non-IP we only re-write MACs, so we're okay */
2058 if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
2061 modify_ip_header = false;
2062 tcf_exts_for_each_action(i, a, exts) {
2065 if (!is_tcf_pedit(a))
2068 nkeys = tcf_pedit_nkeys(a);
2069 for (k = 0; k < nkeys; k++) {
2070 htype = tcf_pedit_htype(a, k);
2071 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
2072 htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
2073 modify_ip_header = true;
2079 ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
2080 if (modify_ip_header && ip_proto != IPPROTO_TCP &&
2081 ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
2082 NL_SET_ERR_MSG_MOD(extack,
2083 "can't offload re-write of non TCP/UDP");
2084 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
2092 static bool actions_match_supported(struct mlx5e_priv *priv,
2093 struct tcf_exts *exts,
2094 struct mlx5e_tc_flow_parse_attr *parse_attr,
2095 struct mlx5e_tc_flow *flow,
2096 struct netlink_ext_ack *extack)
2100 if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
2101 actions = flow->esw_attr->action;
2103 actions = flow->nic_attr->action;
2105 if (flow->flags & MLX5E_TC_FLOW_EGRESS &&
2106 !(actions & MLX5_FLOW_CONTEXT_ACTION_DECAP))
2109 if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
2110 return modify_header_match_supported(&parse_attr->spec, exts,
2116 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
2118 struct mlx5_core_dev *fmdev, *pmdev;
2119 u64 fsystem_guid, psystem_guid;
2122 pmdev = peer_priv->mdev;
2124 fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
2125 psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
2127 return (fsystem_guid == psystem_guid);
2130 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2131 struct mlx5e_tc_flow_parse_attr *parse_attr,
2132 struct mlx5e_tc_flow *flow,
2133 struct netlink_ext_ack *extack)
2135 struct mlx5_nic_flow_attr *attr = flow->nic_attr;
2136 const struct tc_action *a;
2141 if (!tcf_exts_has_actions(exts))
2144 attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
2146 tcf_exts_for_each_action(i, a, exts) {
2147 if (is_tcf_gact_shot(a)) {
2148 action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
2149 if (MLX5_CAP_FLOWTABLE(priv->mdev,
2150 flow_table_properties_nic_receive.flow_counter))
2151 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
2155 if (is_tcf_pedit(a)) {
2156 err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
2157 parse_attr, extack);
2161 action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
2162 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2166 if (is_tcf_csum(a)) {
2167 if (csum_offload_supported(priv, action,
2168 tcf_csum_update_flags(a),
2175 if (is_tcf_mirred_egress_redirect(a)) {
2176 struct net_device *peer_dev = tcf_mirred_dev(a);
2178 if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
2179 same_hw_devs(priv, netdev_priv(peer_dev))) {
2180 parse_attr->mirred_ifindex = peer_dev->ifindex;
2181 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2182 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2183 MLX5_FLOW_CONTEXT_ACTION_COUNT;
2185 NL_SET_ERR_MSG_MOD(extack,
2186 "device is not on same HW, can't offload");
2187 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2194 if (is_tcf_skbedit_mark(a)) {
2195 u32 mark = tcf_skbedit_mark(a);
2197 if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2198 NL_SET_ERR_MSG_MOD(extack,
2199 "Bad flow mark - only 16 bit is supported");
2203 attr->flow_tag = mark;
2204 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2211 attr->action = action;
2212 if (!actions_match_supported(priv, exts, parse_attr, flow, extack))
2218 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2219 struct ip_tunnel_key *b)
2221 return memcmp(a, b, sizeof(*a));
2224 static inline int hash_encap_info(struct ip_tunnel_key *key)
2226 return jhash(key, sizeof(*key), 0);
2229 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2230 struct net_device *mirred_dev,
2231 struct net_device **out_dev,
2233 struct neighbour **out_n,
2236 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2237 struct mlx5e_rep_priv *uplink_rpriv;
2239 struct neighbour *n = NULL;
2241 #if IS_ENABLED(CONFIG_INET)
2244 rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2245 ret = PTR_ERR_OR_ZERO(rt);
2251 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2252 /* if the egress device isn't on the same HW e-switch, we use the uplink */
2253 if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2254 *out_dev = uplink_rpriv->netdev;
2256 *out_dev = rt->dst.dev;
2259 *out_ttl = ip4_dst_hoplimit(&rt->dst);
2260 n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2269 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2270 struct net_device *peer_netdev)
2272 struct mlx5e_priv *peer_priv;
2274 peer_priv = netdev_priv(peer_netdev);
2276 return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2277 (priv->netdev->netdev_ops == peer_netdev->netdev_ops) &&
2278 same_hw_devs(priv, peer_priv) &&
2279 MLX5_VPORT_MANAGER(peer_priv->mdev) &&
2280 (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS));
2283 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2284 struct net_device *mirred_dev,
2285 struct net_device **out_dev,
2287 struct neighbour **out_n,
2290 struct neighbour *n = NULL;
2291 struct dst_entry *dst;
2293 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2294 struct mlx5e_rep_priv *uplink_rpriv;
2295 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2298 ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2304 *out_ttl = ip6_dst_hoplimit(dst);
2306 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2307 /* if the egress device isn't on the same HW e-switch, we use the uplink */
2308 if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2309 *out_dev = uplink_rpriv->netdev;
2311 *out_dev = dst->dev;
2316 n = dst_neigh_lookup(dst, &fl6->daddr);
2325 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2326 char buf[], int encap_size,
2327 unsigned char h_dest[ETH_ALEN],
2331 __be16 udp_dst_port,
2334 struct ethhdr *eth = (struct ethhdr *)buf;
2335 struct iphdr *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2336 struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2337 struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2339 memset(buf, 0, encap_size);
2341 ether_addr_copy(eth->h_dest, h_dest);
2342 ether_addr_copy(eth->h_source, out_dev->dev_addr);
2343 eth->h_proto = htons(ETH_P_IP);
2350 ip->protocol = IPPROTO_UDP;
2354 udp->dest = udp_dst_port;
2355 vxh->vx_flags = VXLAN_HF_VNI;
2356 vxh->vx_vni = vxlan_vni_field(vx_vni);
2359 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2360 char buf[], int encap_size,
2361 unsigned char h_dest[ETH_ALEN],
2363 struct in6_addr *daddr,
2364 struct in6_addr *saddr,
2365 __be16 udp_dst_port,
2368 struct ethhdr *eth = (struct ethhdr *)buf;
2369 struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2370 struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2371 struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2373 memset(buf, 0, encap_size);
2375 ether_addr_copy(eth->h_dest, h_dest);
2376 ether_addr_copy(eth->h_source, out_dev->dev_addr);
2377 eth->h_proto = htons(ETH_P_IPV6);
2379 ip6_flow_hdr(ip6h, tos, 0);
2380 /* the HW fills up ipv6 payload len */
2381 ip6h->nexthdr = IPPROTO_UDP;
2382 ip6h->hop_limit = ttl;
2383 ip6h->daddr = *daddr;
2384 ip6h->saddr = *saddr;
2386 udp->dest = udp_dst_port;
2387 vxh->vx_flags = VXLAN_HF_VNI;
2388 vxh->vx_vni = vxlan_vni_field(vx_vni);
2391 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2392 struct net_device *mirred_dev,
2393 struct mlx5e_encap_entry *e)
2395 int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2396 int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2397 struct ip_tunnel_key *tun_key = &e->tun_info.key;
2398 struct net_device *out_dev;
2399 struct neighbour *n = NULL;
2400 struct flowi4 fl4 = {};
2401 u8 nud_state, tos, ttl;
2405 if (max_encap_size < ipv4_encap_size) {
2406 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2407 ipv4_encap_size, max_encap_size);
2411 encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2415 switch (e->tunnel_type) {
2416 case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2417 fl4.flowi4_proto = IPPROTO_UDP;
2418 fl4.fl4_dport = tun_key->tp_dst;
2428 fl4.flowi4_tos = tun_key->tos;
2429 fl4.daddr = tun_key->u.ipv4.dst;
2430 fl4.saddr = tun_key->u.ipv4.src;
2432 err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2437 /* used by mlx5e_detach_encap to lookup a neigh hash table
2438 * entry in the neigh hash table when a user deletes a rule
2440 e->m_neigh.dev = n->dev;
2441 e->m_neigh.family = n->ops->family;
2442 memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2443 e->out_dev = out_dev;
2445 /* It's importent to add the neigh to the hash table before checking
2446 * the neigh validity state. So if we'll get a notification, in case the
2447 * neigh changes it's validity state, we would find the relevant neigh
2450 err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2454 read_lock_bh(&n->lock);
2455 nud_state = n->nud_state;
2456 ether_addr_copy(e->h_dest, n->ha);
2457 read_unlock_bh(&n->lock);
2459 switch (e->tunnel_type) {
2460 case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2461 gen_vxlan_header_ipv4(out_dev, encap_header,
2462 ipv4_encap_size, e->h_dest, tos, ttl,
2464 fl4.saddr, tun_key->tp_dst,
2465 tunnel_id_to_key32(tun_key->tun_id));
2469 goto destroy_neigh_entry;
2471 e->encap_size = ipv4_encap_size;
2472 e->encap_header = encap_header;
2474 if (!(nud_state & NUD_VALID)) {
2475 neigh_event_send(n, NULL);
2480 err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2481 ipv4_encap_size, encap_header,
2482 MLX5_FLOW_NAMESPACE_FDB,
2485 goto destroy_neigh_entry;
2487 e->flags |= MLX5_ENCAP_ENTRY_VALID;
2488 mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2492 destroy_neigh_entry:
2493 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2495 kfree(encap_header);
2502 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2503 struct net_device *mirred_dev,
2504 struct mlx5e_encap_entry *e)
2506 int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2507 int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2508 struct ip_tunnel_key *tun_key = &e->tun_info.key;
2509 struct net_device *out_dev;
2510 struct neighbour *n = NULL;
2511 struct flowi6 fl6 = {};
2512 u8 nud_state, tos, ttl;
2516 if (max_encap_size < ipv6_encap_size) {
2517 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2518 ipv6_encap_size, max_encap_size);
2522 encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2526 switch (e->tunnel_type) {
2527 case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2528 fl6.flowi6_proto = IPPROTO_UDP;
2529 fl6.fl6_dport = tun_key->tp_dst;
2539 fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2540 fl6.daddr = tun_key->u.ipv6.dst;
2541 fl6.saddr = tun_key->u.ipv6.src;
2543 err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2548 /* used by mlx5e_detach_encap to lookup a neigh hash table
2549 * entry in the neigh hash table when a user deletes a rule
2551 e->m_neigh.dev = n->dev;
2552 e->m_neigh.family = n->ops->family;
2553 memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2554 e->out_dev = out_dev;
2556 /* It's importent to add the neigh to the hash table before checking
2557 * the neigh validity state. So if we'll get a notification, in case the
2558 * neigh changes it's validity state, we would find the relevant neigh
2561 err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2565 read_lock_bh(&n->lock);
2566 nud_state = n->nud_state;
2567 ether_addr_copy(e->h_dest, n->ha);
2568 read_unlock_bh(&n->lock);
2570 switch (e->tunnel_type) {
2571 case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2572 gen_vxlan_header_ipv6(out_dev, encap_header,
2573 ipv6_encap_size, e->h_dest, tos, ttl,
2575 &fl6.saddr, tun_key->tp_dst,
2576 tunnel_id_to_key32(tun_key->tun_id));
2580 goto destroy_neigh_entry;
2583 e->encap_size = ipv6_encap_size;
2584 e->encap_header = encap_header;
2586 if (!(nud_state & NUD_VALID)) {
2587 neigh_event_send(n, NULL);
2592 err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2593 ipv6_encap_size, encap_header,
2594 MLX5_FLOW_NAMESPACE_FDB,
2597 goto destroy_neigh_entry;
2599 e->flags |= MLX5_ENCAP_ENTRY_VALID;
2600 mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2604 destroy_neigh_entry:
2605 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2607 kfree(encap_header);
2614 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2615 struct ip_tunnel_info *tun_info,
2616 struct net_device *mirred_dev,
2617 struct net_device **encap_dev,
2618 struct mlx5e_tc_flow *flow,
2619 struct netlink_ext_ack *extack)
2621 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2622 unsigned short family = ip_tunnel_info_af(tun_info);
2623 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2624 struct ip_tunnel_key *key = &tun_info->key;
2625 struct mlx5e_encap_entry *e;
2626 int tunnel_type, err = 0;
2630 /* udp dst port must be set */
2631 if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2632 goto vxlan_encap_offload_err;
2634 /* setting udp src port isn't supported */
2635 if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2636 vxlan_encap_offload_err:
2637 NL_SET_ERR_MSG_MOD(extack,
2638 "must set udp dst port and not set udp src port");
2639 netdev_warn(priv->netdev,
2640 "must set udp dst port and not set udp src port\n");
2644 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) &&
2645 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2646 tunnel_type = MLX5_REFORMAT_TYPE_L2_TO_VXLAN;
2648 NL_SET_ERR_MSG_MOD(extack,
2649 "port isn't an offloaded vxlan udp dport");
2650 netdev_warn(priv->netdev,
2651 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2655 hash_key = hash_encap_info(key);
2657 hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2658 encap_hlist, hash_key) {
2659 if (!cmp_encap_info(&e->tun_info.key, key)) {
2665 /* must verify if encap is valid or not */
2669 e = kzalloc(sizeof(*e), GFP_KERNEL);
2673 e->tun_info = *tun_info;
2674 e->tunnel_type = tunnel_type;
2675 INIT_LIST_HEAD(&e->flows);
2677 if (family == AF_INET)
2678 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2679 else if (family == AF_INET6)
2680 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2682 if (err && err != -EAGAIN)
2685 hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2688 list_add(&flow->encap, &e->flows);
2689 *encap_dev = e->out_dev;
2690 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2691 attr->encap_id = e->encap_id;
2702 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
2703 const struct tc_action *a,
2704 struct mlx5_esw_flow_attr *attr,
2707 u8 vlan_idx = attr->total_vlan;
2709 if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
2712 if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2714 if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2715 MLX5_FS_VLAN_DEPTH))
2718 *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
2720 *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2722 } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2723 attr->vlan_vid[vlan_idx] = tcf_vlan_push_vid(a);
2724 attr->vlan_prio[vlan_idx] = tcf_vlan_push_prio(a);
2725 attr->vlan_proto[vlan_idx] = tcf_vlan_push_proto(a);
2726 if (!attr->vlan_proto[vlan_idx])
2727 attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
2730 if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2731 MLX5_FS_VLAN_DEPTH))
2734 *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
2736 if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
2737 (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2738 tcf_vlan_push_prio(a)))
2741 *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2743 } else { /* action is TCA_VLAN_ACT_MODIFY */
2747 attr->total_vlan = vlan_idx + 1;
2752 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2753 struct mlx5e_tc_flow_parse_attr *parse_attr,
2754 struct mlx5e_tc_flow *flow,
2755 struct netlink_ext_ack *extack)
2757 struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2758 struct mlx5e_rep_priv *rpriv = priv->ppriv;
2759 struct ip_tunnel_info *info = NULL;
2760 const struct tc_action *a;
2766 if (!tcf_exts_has_actions(exts))
2769 attr->in_rep = rpriv->rep;
2770 attr->in_mdev = priv->mdev;
2772 tcf_exts_for_each_action(i, a, exts) {
2773 if (is_tcf_gact_shot(a)) {
2774 action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2775 MLX5_FLOW_CONTEXT_ACTION_COUNT;
2779 if (is_tcf_pedit(a)) {
2780 err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2781 parse_attr, extack);
2785 action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2786 attr->mirror_count = attr->out_count;
2790 if (is_tcf_csum(a)) {
2791 if (csum_offload_supported(priv, action,
2792 tcf_csum_update_flags(a),
2799 if (is_tcf_mirred_egress_redirect(a) || is_tcf_mirred_egress_mirror(a)) {
2800 struct mlx5e_priv *out_priv;
2801 struct net_device *out_dev;
2803 out_dev = tcf_mirred_dev(a);
2805 if (attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
2806 NL_SET_ERR_MSG_MOD(extack,
2807 "can't support more output ports, can't offload forwarding");
2808 pr_err("can't support more than %d output ports, can't offload forwarding\n",
2813 if (switchdev_port_same_parent_id(priv->netdev,
2815 is_merged_eswitch_dev(priv, out_dev)) {
2816 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2817 MLX5_FLOW_CONTEXT_ACTION_COUNT;
2818 out_priv = netdev_priv(out_dev);
2819 rpriv = out_priv->ppriv;
2820 attr->out_rep[attr->out_count] = rpriv->rep;
2821 attr->out_mdev[attr->out_count++] = out_priv->mdev;
2823 parse_attr->mirred_ifindex = out_dev->ifindex;
2824 parse_attr->tun_info = *info;
2825 attr->parse_attr = parse_attr;
2826 action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |
2827 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2828 MLX5_FLOW_CONTEXT_ACTION_COUNT;
2829 /* attr->out_rep is resolved when we handle encap */
2831 NL_SET_ERR_MSG_MOD(extack,
2832 "devices are not on same switch HW, can't offload forwarding");
2833 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2834 priv->netdev->name, out_dev->name);
2840 if (is_tcf_tunnel_set(a)) {
2841 info = tcf_tunnel_info(a);
2846 attr->mirror_count = attr->out_count;
2850 if (is_tcf_vlan(a)) {
2851 err = parse_tc_vlan_action(priv, a, attr, &action);
2856 attr->mirror_count = attr->out_count;
2860 if (is_tcf_tunnel_release(a)) {
2861 action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2868 attr->action = action;
2869 if (!actions_match_supported(priv, exts, parse_attr, flow, extack))
2872 if (attr->out_count > 1 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
2873 NL_SET_ERR_MSG_MOD(extack,
2874 "current firmware doesn't support split rule for port mirroring");
2875 netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
2882 static void get_flags(int flags, u8 *flow_flags)
2884 u8 __flow_flags = 0;
2886 if (flags & MLX5E_TC_INGRESS)
2887 __flow_flags |= MLX5E_TC_FLOW_INGRESS;
2888 if (flags & MLX5E_TC_EGRESS)
2889 __flow_flags |= MLX5E_TC_FLOW_EGRESS;
2891 *flow_flags = __flow_flags;
2894 static const struct rhashtable_params tc_ht_params = {
2895 .head_offset = offsetof(struct mlx5e_tc_flow, node),
2896 .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2897 .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2898 .automatic_shrinking = true,
2901 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv)
2903 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2904 struct mlx5e_rep_priv *uplink_rpriv;
2906 if (MLX5_VPORT_MANAGER(priv->mdev) && esw->mode == SRIOV_OFFLOADS) {
2907 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2908 return &uplink_rpriv->tc_ht;
2910 return &priv->fs.tc.ht;
2914 mlx5e_alloc_flow(struct mlx5e_priv *priv, int attr_size,
2915 struct tc_cls_flower_offload *f, u8 flow_flags,
2916 struct mlx5e_tc_flow_parse_attr **__parse_attr,
2917 struct mlx5e_tc_flow **__flow)
2919 struct mlx5e_tc_flow_parse_attr *parse_attr;
2920 struct mlx5e_tc_flow *flow;
2923 flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
2924 parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
2925 if (!parse_attr || !flow) {
2930 flow->cookie = f->cookie;
2931 flow->flags = flow_flags;
2934 err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
2939 *__parse_attr = parse_attr;
2950 mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
2951 struct tc_cls_flower_offload *f,
2953 struct mlx5e_tc_flow **__flow)
2955 struct netlink_ext_ack *extack = f->common.extack;
2956 struct mlx5e_tc_flow_parse_attr *parse_attr;
2957 struct mlx5e_tc_flow *flow;
2960 flow_flags |= MLX5E_TC_FLOW_ESWITCH;
2961 attr_size = sizeof(struct mlx5_esw_flow_attr);
2962 err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
2963 &parse_attr, &flow);
2967 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow, extack);
2971 err = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow, extack);
2972 if (err && err != -EAGAIN)
2976 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
2978 if (!(flow->esw_attr->action &
2979 MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT))
2994 mlx5e_add_nic_flow(struct mlx5e_priv *priv,
2995 struct tc_cls_flower_offload *f,
2997 struct mlx5e_tc_flow **__flow)
2999 struct netlink_ext_ack *extack = f->common.extack;
3000 struct mlx5e_tc_flow_parse_attr *parse_attr;
3001 struct mlx5e_tc_flow *flow;
3004 flow_flags |= MLX5E_TC_FLOW_NIC;
3005 attr_size = sizeof(struct mlx5_nic_flow_attr);
3006 err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
3007 &parse_attr, &flow);
3011 err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow, extack);
3015 err = mlx5e_tc_add_nic_flow(priv, parse_attr, flow, extack);
3019 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
3033 mlx5e_tc_add_flow(struct mlx5e_priv *priv,
3034 struct tc_cls_flower_offload *f,
3036 struct mlx5e_tc_flow **flow)
3038 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3042 get_flags(flags, &flow_flags);
3044 if (esw && esw->mode == SRIOV_OFFLOADS)
3045 err = mlx5e_add_fdb_flow(priv, f, flow_flags, flow);
3047 err = mlx5e_add_nic_flow(priv, f, flow_flags, flow);
3052 int mlx5e_configure_flower(struct mlx5e_priv *priv,
3053 struct tc_cls_flower_offload *f, int flags)
3055 struct netlink_ext_ack *extack = f->common.extack;
3056 struct rhashtable *tc_ht = get_tc_ht(priv);
3057 struct mlx5e_tc_flow *flow;
3060 flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3062 NL_SET_ERR_MSG_MOD(extack,
3063 "flow cookie already exists, ignoring");
3064 netdev_warn_once(priv->netdev,
3065 "flow cookie %lx already exists, ignoring\n",
3070 err = mlx5e_tc_add_flow(priv, f, flags, &flow);
3074 err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params);
3081 mlx5e_tc_del_flow(priv, flow);
3087 #define DIRECTION_MASK (MLX5E_TC_INGRESS | MLX5E_TC_EGRESS)
3088 #define FLOW_DIRECTION_MASK (MLX5E_TC_FLOW_INGRESS | MLX5E_TC_FLOW_EGRESS)
3090 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
3092 if ((flow->flags & FLOW_DIRECTION_MASK) == (flags & DIRECTION_MASK))
3098 int mlx5e_delete_flower(struct mlx5e_priv *priv,
3099 struct tc_cls_flower_offload *f, int flags)
3101 struct rhashtable *tc_ht = get_tc_ht(priv);
3102 struct mlx5e_tc_flow *flow;
3104 flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3105 if (!flow || !same_flow_direction(flow, flags))
3108 rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
3110 mlx5e_tc_del_flow(priv, flow);
3117 int mlx5e_stats_flower(struct mlx5e_priv *priv,
3118 struct tc_cls_flower_offload *f, int flags)
3120 struct rhashtable *tc_ht = get_tc_ht(priv);
3121 struct mlx5e_tc_flow *flow;
3122 struct mlx5_fc *counter;
3127 flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3128 if (!flow || !same_flow_direction(flow, flags))
3131 if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
3134 counter = mlx5e_tc_get_counter(flow);
3138 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
3140 tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
3145 static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv,
3146 struct mlx5e_priv *peer_priv)
3148 struct mlx5_core_dev *peer_mdev = peer_priv->mdev;
3149 struct mlx5e_hairpin_entry *hpe;
3153 if (!same_hw_devs(priv, peer_priv))
3156 peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
3158 hash_for_each(priv->fs.tc.hairpin_tbl, bkt, hpe, hairpin_hlist) {
3159 if (hpe->peer_vhca_id == peer_vhca_id)
3160 hpe->hp->pair->peer_gone = true;
3164 static int mlx5e_tc_netdev_event(struct notifier_block *this,
3165 unsigned long event, void *ptr)
3167 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
3168 struct mlx5e_flow_steering *fs;
3169 struct mlx5e_priv *peer_priv;
3170 struct mlx5e_tc_table *tc;
3171 struct mlx5e_priv *priv;
3173 if (ndev->netdev_ops != &mlx5e_netdev_ops ||
3174 event != NETDEV_UNREGISTER ||
3175 ndev->reg_state == NETREG_REGISTERED)
3178 tc = container_of(this, struct mlx5e_tc_table, netdevice_nb);
3179 fs = container_of(tc, struct mlx5e_flow_steering, tc);
3180 priv = container_of(fs, struct mlx5e_priv, fs);
3181 peer_priv = netdev_priv(ndev);
3182 if (priv == peer_priv ||
3183 !(priv->netdev->features & NETIF_F_HW_TC))
3186 mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv);
3191 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
3193 struct mlx5e_tc_table *tc = &priv->fs.tc;
3196 hash_init(tc->mod_hdr_tbl);
3197 hash_init(tc->hairpin_tbl);
3199 err = rhashtable_init(&tc->ht, &tc_ht_params);
3203 tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event;
3204 if (register_netdevice_notifier(&tc->netdevice_nb)) {
3205 tc->netdevice_nb.notifier_call = NULL;
3206 mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n");
3212 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
3214 struct mlx5e_tc_flow *flow = ptr;
3215 struct mlx5e_priv *priv = flow->priv;
3217 mlx5e_tc_del_flow(priv, flow);
3221 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
3223 struct mlx5e_tc_table *tc = &priv->fs.tc;
3225 if (tc->netdevice_nb.notifier_call)
3226 unregister_netdevice_notifier(&tc->netdevice_nb);
3228 rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
3230 if (!IS_ERR_OR_NULL(tc->t)) {
3231 mlx5_destroy_flow_table(tc->t);
3236 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
3238 return rhashtable_init(tc_ht, &tc_ht_params);
3241 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
3243 rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
3246 int mlx5e_tc_num_filters(struct mlx5e_priv *priv)
3248 struct rhashtable *tc_ht = get_tc_ht(priv);
3250 return atomic_read(&tc_ht->nelems);