drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/sch_generic.h>
  35 #include <net/pkt_cls.h>
  36 #include <net/tc_act/tc_gact.h>
  37 #include <net/tc_act/tc_skbedit.h>
  38 #include <linux/mlx5/fs.h>
  39 #include <linux/mlx5/device.h>
  40 #include <linux/rhashtable.h>
  41 #include <net/switchdev.h>
  42 #include <net/tc_act/tc_mirred.h>
  43 #include <net/tc_act/tc_vlan.h>
  44 #include <net/tc_act/tc_tunnel_key.h>
  45 #include <net/tc_act/tc_pedit.h>
  46 #include <net/tc_act/tc_csum.h>
  47 #include <net/vxlan.h>
  48 #include <net/arp.h>
  49 #include "en.h"
  50 #include "en_rep.h"
  51 #include "en_tc.h"
  52 #include "eswitch.h"
  53 #include "lib/vxlan.h"
  54 #include "fs_core.h"
  55 #include "en/port.h"
  56
  57 struct mlx5_nic_flow_attr {
  58         u32 action;
  59         u32 flow_tag;
  60         u32 mod_hdr_id;
  61         u32 hairpin_tirn;
  62         u8 match_level;
  63         struct mlx5_flow_table  *hairpin_ft;
  64         struct mlx5_fc          *counter;
  65 };
  66
  67 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
  68
  69 enum {
  70         MLX5E_TC_FLOW_INGRESS   = MLX5E_TC_INGRESS,
  71         MLX5E_TC_FLOW_EGRESS    = MLX5E_TC_EGRESS,
  72         MLX5E_TC_FLOW_ESWITCH   = BIT(MLX5E_TC_FLOW_BASE),
  73         MLX5E_TC_FLOW_NIC       = BIT(MLX5E_TC_FLOW_BASE + 1),
  74         MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2),
  75         MLX5E_TC_FLOW_HAIRPIN   = BIT(MLX5E_TC_FLOW_BASE + 3),
  76         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4),
  77         MLX5E_TC_FLOW_SLOW        = BIT(MLX5E_TC_FLOW_BASE + 5),
  78 };
  79
  80 #define MLX5E_TC_MAX_SPLITS 1
  81
  82 struct mlx5e_tc_flow {
  83         struct rhash_head       node;
  84         struct mlx5e_priv       *priv;
  85         u64                     cookie;
  86         u16                     flags;
  87         struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1];
  88         struct list_head        encap;   /* flows sharing the same encap ID */
  89         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
  90         struct list_head        hairpin; /* flows sharing the same hairpin */
  91         union {
  92                 struct mlx5_esw_flow_attr esw_attr[0];
  93                 struct mlx5_nic_flow_attr nic_attr[0];
  94         };
  95 };
  96
  97 struct mlx5e_tc_flow_parse_attr {
  98         struct ip_tunnel_info tun_info;
  99         struct mlx5_flow_spec spec;
 100         int num_mod_hdr_actions;
 101         void *mod_hdr_actions;
 102         int mirred_ifindex;
 103 };
 104
 105 #define MLX5E_TC_TABLE_NUM_GROUPS 4
 106 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
 107
 108 struct mlx5e_hairpin {
 109         struct mlx5_hairpin *pair;
 110
 111         struct mlx5_core_dev *func_mdev;
 112         struct mlx5e_priv *func_priv;
 113         u32 tdn;
 114         u32 tirn;
 115
 116         int num_channels;
 117         struct mlx5e_rqt indir_rqt;
 118         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
 119         struct mlx5e_ttc_table ttc;
 120 };
 121
 122 struct mlx5e_hairpin_entry {
 123         /* a node of a hash table which keeps all the  hairpin entries */
 124         struct hlist_node hairpin_hlist;
 125
 126         /* flows sharing the same hairpin */
 127         struct list_head flows;
 128
 129         u16 peer_vhca_id;
 130         u8 prio;
 131         struct mlx5e_hairpin *hp;
 132 };
 133
 134 struct mod_hdr_key {
 135         int num_actions;
 136         void *actions;
 137 };
 138
 139 struct mlx5e_mod_hdr_entry {
 140         /* a node of a hash table which keeps all the mod_hdr entries */
 141         struct hlist_node mod_hdr_hlist;
 142
 143         /* flows sharing the same mod_hdr entry */
 144         struct list_head flows;
 145
 146         struct mod_hdr_key key;
 147
 148         u32 mod_hdr_id;
 149 };
 150
 151 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
 152
 153 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
 154 {
 155         return jhash(key->actions,
 156                      key->num_actions * MLX5_MH_ACT_SZ, 0);
 157 }
 158
 159 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
 160                                    struct mod_hdr_key *b)
 161 {
 162         if (a->num_actions != b->num_actions)
 163                 return 1;
 164
 165         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
 166 }
 167
 168 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
 169                                 struct mlx5e_tc_flow *flow,
 170                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
 171 {
 172         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 173         int num_actions, actions_size, namespace, err;
 174         struct mlx5e_mod_hdr_entry *mh;
 175         struct mod_hdr_key key;
 176         bool found = false;
 177         u32 hash_key;
 178
 179         num_actions  = parse_attr->num_mod_hdr_actions;
 180         actions_size = MLX5_MH_ACT_SZ * num_actions;
 181
 182         key.actions = parse_attr->mod_hdr_actions;
 183         key.num_actions = num_actions;
 184
 185         hash_key = hash_mod_hdr_info(&key);
 186
 187         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
 188                 namespace = MLX5_FLOW_NAMESPACE_FDB;
 189                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
 190                                        mod_hdr_hlist, hash_key) {
 191                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 192                                 found = true;
 193                                 break;
 194                         }
 195                 }
 196         } else {
 197                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
 198                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
 199                                        mod_hdr_hlist, hash_key) {
 200                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 201                                 found = true;
 202                                 break;
 203                         }
 204                 }
 205         }
 206
 207         if (found)
 208                 goto attach_flow;
 209
 210         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
 211         if (!mh)
 212                 return -ENOMEM;
 213
 214         mh->key.actions = (void *)mh + sizeof(*mh);
 215         memcpy(mh->key.actions, key.actions, actions_size);
 216         mh->key.num_actions = num_actions;
 217         INIT_LIST_HEAD(&mh->flows);
 218
 219         err = mlx5_modify_header_alloc(priv->mdev, namespace,
 220                                        mh->key.num_actions,
 221                                        mh->key.actions,
 222                                        &mh->mod_hdr_id);
 223         if (err)
 224                 goto out_err;
 225
 226         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 227                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 228         else
 229                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 230
 231 attach_flow:
 232         list_add(&flow->mod_hdr, &mh->flows);
 233         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 234                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
 235         else
 236                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
 237
 238         return 0;
 239
 240 out_err:
 241         kfree(mh);
 242         return err;
 243 }
 244
 245 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
 246                                  struct mlx5e_tc_flow *flow)
 247 {
 248         struct list_head *next = flow->mod_hdr.next;
 249
 250         list_del(&flow->mod_hdr);
 251
 252         if (list_empty(next)) {
 253                 struct mlx5e_mod_hdr_entry *mh;
 254
 255                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
 256
 257                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
 258                 hash_del(&mh->mod_hdr_hlist);
 259                 kfree(mh);
 260         }
 261 }
 262
 263 static
 264 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 265 {
 266         struct net_device *netdev;
 267         struct mlx5e_priv *priv;
 268
 269         netdev = __dev_get_by_index(net, ifindex);
 270         priv = netdev_priv(netdev);
 271         return priv->mdev;
 272 }
 273
 274 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 275 {
 276         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
 277         void *tirc;
 278         int err;
 279
 280         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 281         if (err)
 282                 goto alloc_tdn_err;
 283
 284         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 285
 286         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
 287         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
 288         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 289
 290         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
 291         if (err)
 292                 goto create_tir_err;
 293
 294         return 0;
 295
 296 create_tir_err:
 297         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 298 alloc_tdn_err:
 299         return err;
 300 }
 301
 302 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 303 {
 304         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
 305         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 306 }
 307
 308 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
 309 {
 310         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
 311         struct mlx5e_priv *priv = hp->func_priv;
 312         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
 313
 314         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
 315                                       hp->num_channels);
 316
 317         for (i = 0; i < sz; i++) {
 318                 ix = i;
 319                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
 320                         ix = mlx5e_bits_invert(i, ilog2(sz));
 321                 ix = indirection_rqt[ix];
 322                 rqn = hp->pair->rqn[ix];
 323                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
 324         }
 325 }
 326
 327 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 328 {
 329         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
 330         struct mlx5e_priv *priv = hp->func_priv;
 331         struct mlx5_core_dev *mdev = priv->mdev;
 332         void *rqtc;
 333         u32 *in;
 334
 335         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
 336         in = kvzalloc(inlen, GFP_KERNEL);
 337         if (!in)
 338                 return -ENOMEM;
 339
 340         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
 341
 342         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
 343         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
 344
 345         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
 346
 347         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
 348         if (!err)
 349                 hp->indir_rqt.enabled = true;
 350
 351         kvfree(in);
 352         return err;
 353 }
 354
 355 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 356 {
 357         struct mlx5e_priv *priv = hp->func_priv;
 358         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
 359         int tt, i, err;
 360         void *tirc;
 361
 362         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 363                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
 364                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 365
 366                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 367                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
 368                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
 369                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
 370
 371                 err = mlx5_core_create_tir(hp->func_mdev, in,
 372                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
 373                 if (err) {
 374                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 375                         goto err_destroy_tirs;
 376                 }
 377         }
 378         return 0;
 379
 380 err_destroy_tirs:
 381         for (i = 0; i < tt; i++)
 382                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
 383         return err;
 384 }
 385
 386 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 387 {
 388         int tt;
 389
 390         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 391                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
 392 }
 393
 394 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 395                                          struct ttc_params *ttc_params)
 396 {
 397         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 398         int tt;
 399
 400         memset(ttc_params, 0, sizeof(*ttc_params));
 401
 402         ttc_params->any_tt_tirn = hp->tirn;
 403
 404         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 405                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
 406
 407         ft_attr->max_fte = MLX5E_NUM_TT;
 408         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 409         ft_attr->prio = MLX5E_TC_PRIO;
 410 }
 411
 412 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 413 {
 414         struct mlx5e_priv *priv = hp->func_priv;
 415         struct ttc_params ttc_params;
 416         int err;
 417
 418         err = mlx5e_hairpin_create_indirect_rqt(hp);
 419         if (err)
 420                 return err;
 421
 422         err = mlx5e_hairpin_create_indirect_tirs(hp);
 423         if (err)
 424                 goto err_create_indirect_tirs;
 425
 426         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 427         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
 428         if (err)
 429                 goto err_create_ttc_table;
 430
 431         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 432                    hp->num_channels, hp->ttc.ft.t->id);
 433
 434         return 0;
 435
 436 err_create_ttc_table:
 437         mlx5e_hairpin_destroy_indirect_tirs(hp);
 438 err_create_indirect_tirs:
 439         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 440
 441         return err;
 442 }
 443
 444 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 445 {
 446         struct mlx5e_priv *priv = hp->func_priv;
 447
 448         mlx5e_destroy_ttc_table(priv, &hp->ttc);
 449         mlx5e_hairpin_destroy_indirect_tirs(hp);
 450         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 451 }
 452
 453 static struct mlx5e_hairpin *
 454 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 455                      int peer_ifindex)
 456 {
 457         struct mlx5_core_dev *func_mdev, *peer_mdev;
 458         struct mlx5e_hairpin *hp;
 459         struct mlx5_hairpin *pair;
 460         int err;
 461
 462         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 463         if (!hp)
 464                 return ERR_PTR(-ENOMEM);
 465
 466         func_mdev = priv->mdev;
 467         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 468
 469         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 470         if (IS_ERR(pair)) {
 471                 err = PTR_ERR(pair);
 472                 goto create_pair_err;
 473         }
 474         hp->pair = pair;
 475         hp->func_mdev = func_mdev;
 476         hp->func_priv = priv;
 477         hp->num_channels = params->num_channels;
 478
 479         err = mlx5e_hairpin_create_transport(hp);
 480         if (err)
 481                 goto create_transport_err;
 482
 483         if (hp->num_channels > 1) {
 484                 err = mlx5e_hairpin_rss_init(hp);
 485                 if (err)
 486                         goto rss_init_err;
 487         }
 488
 489         return hp;
 490
 491 rss_init_err:
 492         mlx5e_hairpin_destroy_transport(hp);
 493 create_transport_err:
 494         mlx5_core_hairpin_destroy(hp->pair);
 495 create_pair_err:
 496         kfree(hp);
 497         return ERR_PTR(err);
 498 }
 499
 500 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 501 {
 502         if (hp->num_channels > 1)
 503                 mlx5e_hairpin_rss_cleanup(hp);
 504         mlx5e_hairpin_destroy_transport(hp);
 505         mlx5_core_hairpin_destroy(hp->pair);
 506         kvfree(hp);
 507 }
 508
 509 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 510 {
 511         return (peer_vhca_id << 16 | prio);
 512 }
 513
 514 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 515                                                      u16 peer_vhca_id, u8 prio)
 516 {
 517         struct mlx5e_hairpin_entry *hpe;
 518         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 519
 520         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
 521                                hairpin_hlist, hash_key) {
 522                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
 523                         return hpe;
 524         }
 525
 526         return NULL;
 527 }
 528
 529 #define UNKNOWN_MATCH_PRIO 8
 530
 531 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 532                                   struct mlx5_flow_spec *spec, u8 *match_prio,
 533                                   struct netlink_ext_ack *extack)
 534 {
 535         void *headers_c, *headers_v;
 536         u8 prio_val, prio_mask = 0;
 537         bool vlan_present;
 538
 539 #ifdef CONFIG_MLX5_CORE_EN_DCB
 540         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
 541                 NL_SET_ERR_MSG_MOD(extack,
 542                                    "only PCP trust state supported for hairpin");
 543                 return -EOPNOTSUPP;
 544         }
 545 #endif
 546         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
 547         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
 548
 549         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
 550         if (vlan_present) {
 551                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
 552                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
 553         }
 554
 555         if (!vlan_present || !prio_mask) {
 556                 prio_val = UNKNOWN_MATCH_PRIO;
 557         } else if (prio_mask != 0x7) {
 558                 NL_SET_ERR_MSG_MOD(extack,
 559                                    "masked priority match not supported for hairpin");
 560                 return -EOPNOTSUPP;
 561         }
 562
 563         *match_prio = prio_val;
 564         return 0;
 565 }
 566
 567 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
 568                                   struct mlx5e_tc_flow *flow,
 569                                   struct mlx5e_tc_flow_parse_attr *parse_attr,
 570                                   struct netlink_ext_ack *extack)
 571 {
 572         int peer_ifindex = parse_attr->mirred_ifindex;
 573         struct mlx5_hairpin_params params;
 574         struct mlx5_core_dev *peer_mdev;
 575         struct mlx5e_hairpin_entry *hpe;
 576         struct mlx5e_hairpin *hp;
 577         u64 link_speed64;
 578         u32 link_speed;
 579         u8 match_prio;
 580         u16 peer_id;
 581         int err;
 582
 583         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 584         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
 585                 NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported");
 586                 return -EOPNOTSUPP;
 587         }
 588
 589         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
 590         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio,
 591                                      extack);
 592         if (err)
 593                 return err;
 594         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
 595         if (hpe)
 596                 goto attach_flow;
 597
 598         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
 599         if (!hpe)
 600                 return -ENOMEM;
 601
 602         INIT_LIST_HEAD(&hpe->flows);
 603         hpe->peer_vhca_id = peer_id;
 604         hpe->prio = match_prio;
 605
 606         params.log_data_size = 15;
 607         params.log_data_size = min_t(u8, params.log_data_size,
 608                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
 609         params.log_data_size = max_t(u8, params.log_data_size,
 610                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
 611
 612         params.log_num_packets = params.log_data_size -
 613                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
 614         params.log_num_packets = min_t(u8, params.log_num_packets,
 615                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
 616
 617         params.q_counter = priv->q_counter;
 618         /* set hairpin pair per each 50Gbs share of the link */
 619         mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
 620         link_speed = max_t(u32, link_speed, 50000);
 621         link_speed64 = link_speed;
 622         do_div(link_speed64, 50000);
 623         params.num_channels = link_speed64;
 624
 625         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
 626         if (IS_ERR(hp)) {
 627                 err = PTR_ERR(hp);
 628                 goto create_hairpin_err;
 629         }
 630
 631         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
 632                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
 633                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
 634
 635         hpe->hp = hp;
 636         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
 637                  hash_hairpin_info(peer_id, match_prio));
 638
 639 attach_flow:
 640         if (hpe->hp->num_channels > 1) {
 641                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
 642                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
 643         } else {
 644                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
 645         }
 646         list_add(&flow->hairpin, &hpe->flows);
 647
 648         return 0;
 649
 650 create_hairpin_err:
 651         kfree(hpe);
 652         return err;
 653 }
 654
 655 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
 656                                    struct mlx5e_tc_flow *flow)
 657 {
 658         struct list_head *next = flow->hairpin.next;
 659
 660         list_del(&flow->hairpin);
 661
 662         /* no more hairpin flows for us, release the hairpin pair */
 663         if (list_empty(next)) {
 664                 struct mlx5e_hairpin_entry *hpe;
 665
 666                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
 667
 668                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 669                            hpe->hp->pair->peer_mdev->priv.name);
 670
 671                 mlx5e_hairpin_destroy(hpe->hp);
 672                 hash_del(&hpe->hairpin_hlist);
 673                 kfree(hpe);
 674         }
 675 }
 676
 677 static int
 678 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
 679                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 680                       struct mlx5e_tc_flow *flow,
 681                       struct netlink_ext_ack *extack)
 682 {
 683         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 684         struct mlx5_core_dev *dev = priv->mdev;
 685         struct mlx5_flow_destination dest[2] = {};
 686         struct mlx5_flow_act flow_act = {
 687                 .action = attr->action,
 688                 .flow_tag = attr->flow_tag,
 689                 .reformat_id = 0,
 690                 .flags    = FLOW_ACT_HAS_TAG | FLOW_ACT_NO_APPEND,
 691         };
 692         struct mlx5_fc *counter = NULL;
 693         bool table_created = false;
 694         int err, dest_ix = 0;
 695
 696         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
 697                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack);
 698                 if (err) {
 699                         goto err_add_hairpin_flow;
 700                 }
 701                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
 702                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 703                         dest[dest_ix].ft = attr->hairpin_ft;
 704                 } else {
 705                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 706                         dest[dest_ix].tir_num = attr->hairpin_tirn;
 707                 }
 708                 dest_ix++;
 709         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
 710                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 711                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
 712                 dest_ix++;
 713         }
 714
 715         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 716                 counter = mlx5_fc_create(dev, true);
 717                 if (IS_ERR(counter)) {
 718                         err = PTR_ERR(counter);
 719                         goto err_fc_create;
 720                 }
 721                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
 722                 dest[dest_ix].counter_id = mlx5_fc_id(counter);
 723                 dest_ix++;
 724                 attr->counter = counter;
 725         }
 726
 727         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 728                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 729                 flow_act.modify_id = attr->mod_hdr_id;
 730                 kfree(parse_attr->mod_hdr_actions);
 731                 if (err)
 732                         goto err_create_mod_hdr_id;
 733         }
 734
 735         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
 736                 int tc_grp_size, tc_tbl_size;
 737                 u32 max_flow_counter;
 738
 739                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
 740                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
 741
 742                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
 743
 744                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
 745                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
 746
 747                 priv->fs.tc.t =
 748                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
 749                                                             MLX5E_TC_PRIO,
 750                                                             tc_tbl_size,
 751                                                             MLX5E_TC_TABLE_NUM_GROUPS,
 752                                                             MLX5E_TC_FT_LEVEL, 0);
 753                 if (IS_ERR(priv->fs.tc.t)) {
 754                         NL_SET_ERR_MSG_MOD(extack,
 755                                            "Failed to create tc offload table\n");
 756                         netdev_err(priv->netdev,
 757                                    "Failed to create tc offload table\n");
 758                         err = PTR_ERR(priv->fs.tc.t);
 759                         goto err_create_ft;
 760                 }
 761
 762                 table_created = true;
 763         }
 764
 765         if (attr->match_level != MLX5_MATCH_NONE)
 766                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
 767
 768         flow->rule[0] = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
 769                                             &flow_act, dest, dest_ix);
 770
 771         if (IS_ERR(flow->rule[0])) {
 772                 err = PTR_ERR(flow->rule[0]);
 773                 goto err_add_rule;
 774         }
 775
 776         return 0;
 777
 778 err_add_rule:
 779         if (table_created) {
 780                 mlx5_destroy_flow_table(priv->fs.tc.t);
 781                 priv->fs.tc.t = NULL;
 782         }
 783 err_create_ft:
 784         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 785                 mlx5e_detach_mod_hdr(priv, flow);
 786 err_create_mod_hdr_id:
 787         mlx5_fc_destroy(dev, counter);
 788 err_fc_create:
 789         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 790                 mlx5e_hairpin_flow_del(priv, flow);
 791 err_add_hairpin_flow:
 792         return err;
 793 }
 794
 795 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
 796                                   struct mlx5e_tc_flow *flow)
 797 {
 798         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 799         struct mlx5_fc *counter = NULL;
 800
 801         counter = attr->counter;
 802         mlx5_del_flow_rules(flow->rule[0]);
 803         mlx5_fc_destroy(priv->mdev, counter);
 804
 805         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
 806                 mlx5_destroy_flow_table(priv->fs.tc.t);
 807                 priv->fs.tc.t = NULL;
 808         }
 809
 810         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 811                 mlx5e_detach_mod_hdr(priv, flow);
 812
 813         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 814                 mlx5e_hairpin_flow_del(priv, flow);
 815 }
 816
 817 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
 818                                struct mlx5e_tc_flow *flow);
 819
 820 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
 821                               struct ip_tunnel_info *tun_info,
 822                               struct net_device *mirred_dev,
 823                               struct net_device **encap_dev,
 824                               struct mlx5e_tc_flow *flow,
 825                               struct netlink_ext_ack *extack);
 826
 827 static struct mlx5_flow_handle *
 828 mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw,
 829                            struct mlx5e_tc_flow *flow,
 830                            struct mlx5_flow_spec *spec,
 831                            struct mlx5_esw_flow_attr *attr)
 832 {
 833         struct mlx5_flow_handle *rule;
 834
 835         rule = mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
 836         if (IS_ERR(rule))
 837                 return rule;
 838
 839         if (attr->mirror_count) {
 840                 flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, spec, attr);
 841                 if (IS_ERR(flow->rule[1])) {
 842                         mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
 843                         return flow->rule[1];
 844                 }
 845         }
 846
 847         flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
 848         return rule;
 849 }
 850
 851 static void
 852 mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw,
 853                              struct mlx5e_tc_flow *flow,
 854                            struct mlx5_esw_flow_attr *attr)
 855 {
 856         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 857
 858         if (attr->mirror_count)
 859                 mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr);
 860
 861         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
 862 }
 863
 864 static struct mlx5_flow_handle *
 865 mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw,
 866                               struct mlx5e_tc_flow *flow,
 867                               struct mlx5_flow_spec *spec,
 868                               struct mlx5_esw_flow_attr *slow_attr)
 869 {
 870         struct mlx5_flow_handle *rule;
 871
 872         memcpy(slow_attr, flow->esw_attr, sizeof(*slow_attr));
 873         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,
 874         slow_attr->mirror_count = 0,
 875         slow_attr->dest_chain = FDB_SLOW_PATH_CHAIN,
 876
 877         rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr);
 878         if (!IS_ERR(rule))
 879                 flow->flags |= MLX5E_TC_FLOW_SLOW;
 880
 881         return rule;
 882 }
 883
 884 static void
 885 mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw,
 886                                   struct mlx5e_tc_flow *flow,
 887                                   struct mlx5_esw_flow_attr *slow_attr)
 888 {
 889         memcpy(slow_attr, flow->esw_attr, sizeof(*slow_attr));
 890         mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr);
 891         flow->flags &= ~MLX5E_TC_FLOW_SLOW;
 892 }
 893
 894 static int
 895 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
 896                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 897                       struct mlx5e_tc_flow *flow,
 898                       struct netlink_ext_ack *extack)
 899 {
 900         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 901         u32 max_chain = mlx5_eswitch_get_chain_range(esw);
 902         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 903         u16 max_prio = mlx5_eswitch_get_prio_range(esw);
 904         struct net_device *out_dev, *encap_dev = NULL;
 905         struct mlx5_fc *counter = NULL;
 906         struct mlx5e_rep_priv *rpriv;
 907         struct mlx5e_priv *out_priv;
 908         int err = 0, encap_err = 0;
 909
 910         /* if prios are not supported, keep the old behaviour of using same prio
 911          * for all offloaded rules.
 912          */
 913         if (!mlx5_eswitch_prios_supported(esw))
 914                 attr->prio = 1;
 915
 916         if (attr->chain > max_chain) {
 917                 NL_SET_ERR_MSG(extack, "Requested chain is out of supported range");
 918                 err = -EOPNOTSUPP;
 919                 goto err_max_prio_chain;
 920         }
 921
 922         if (attr->prio > max_prio) {
 923                 NL_SET_ERR_MSG(extack, "Requested priority is out of supported range");
 924                 err = -EOPNOTSUPP;
 925                 goto err_max_prio_chain;
 926         }
 927
 928         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
 929                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
 930                                              attr->parse_attr->mirred_ifindex);
 931                 encap_err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
 932                                                out_dev, &encap_dev, flow,
 933                                                extack);
 934                 if (encap_err && encap_err != -EAGAIN) {
 935                         err = encap_err;
 936                         goto err_attach_encap;
 937                 }
 938                 out_priv = netdev_priv(encap_dev);
 939                 rpriv = out_priv->ppriv;
 940                 attr->out_rep[attr->out_count] = rpriv->rep;
 941                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
 942         }
 943
 944         err = mlx5_eswitch_add_vlan_action(esw, attr);
 945         if (err)
 946                 goto err_add_vlan;
 947
 948         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 949                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 950                 kfree(parse_attr->mod_hdr_actions);
 951                 if (err)
 952                         goto err_mod_hdr;
 953         }
 954
 955         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 956                 counter = mlx5_fc_create(esw->dev, true);
 957                 if (IS_ERR(counter)) {
 958                         err = PTR_ERR(counter);
 959                         goto err_create_counter;
 960                 }
 961
 962                 attr->counter = counter;
 963         }
 964
 965         /* we get here if (1) there's no error or when
 966          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
 967          */
 968         if (encap_err == -EAGAIN) {
 969                 /* continue with goto slow path rule instead */
 970                 struct mlx5_esw_flow_attr slow_attr;
 971
 972                 flow->rule[0] = mlx5e_tc_offload_to_slow_path(esw, flow, &parse_attr->spec, &slow_attr);
 973         } else {
 974                 flow->rule[0] = mlx5e_tc_offload_fdb_rules(esw, flow, &parse_attr->spec, attr);
 975         }
 976
 977         if (IS_ERR(flow->rule[0])) {
 978                 err = PTR_ERR(flow->rule[0]);
 979                 goto err_add_rule;
 980         }
 981
 982         return 0;
 983
 984 err_add_rule:
 985         mlx5_fc_destroy(esw->dev, counter);
 986 err_create_counter:
 987         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 988                 mlx5e_detach_mod_hdr(priv, flow);
 989 err_mod_hdr:
 990         mlx5_eswitch_del_vlan_action(esw, attr);
 991 err_add_vlan:
 992         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT)
 993                 mlx5e_detach_encap(priv, flow);
 994 err_attach_encap:
 995 err_max_prio_chain:
 996         return err;
 997 }
 998
 999 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
1000                                   struct mlx5e_tc_flow *flow)
1001 {
1002         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1003         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
1004         struct mlx5_esw_flow_attr slow_attr;
1005
1006         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1007                 if (flow->flags & MLX5E_TC_FLOW_SLOW)
1008                         mlx5e_tc_unoffload_from_slow_path(esw, flow, &slow_attr);
1009                 else
1010                         mlx5e_tc_unoffload_fdb_rules(esw, flow, attr);
1011         }
1012
1013         mlx5_eswitch_del_vlan_action(esw, attr);
1014
1015         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
1016                 mlx5e_detach_encap(priv, flow);
1017                 kvfree(attr->parse_attr);
1018         }
1019
1020         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1021                 mlx5e_detach_mod_hdr(priv, flow);
1022
1023         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT)
1024                 mlx5_fc_destroy(esw->dev, attr->counter);
1025 }
1026
1027 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
1028                               struct mlx5e_encap_entry *e)
1029 {
1030         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1031         struct mlx5_esw_flow_attr slow_attr, *esw_attr;
1032         struct mlx5_flow_handle *rule;
1033         struct mlx5_flow_spec *spec;
1034         struct mlx5e_tc_flow *flow;
1035         int err;
1036
1037         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
1038                                          e->encap_size, e->encap_header,
1039                                          MLX5_FLOW_NAMESPACE_FDB,
1040                                          &e->encap_id);
1041         if (err) {
1042                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
1043                                err);
1044                 return;
1045         }
1046         e->flags |= MLX5_ENCAP_ENTRY_VALID;
1047         mlx5e_rep_queue_neigh_stats_work(priv);
1048
1049         list_for_each_entry(flow, &e->flows, encap) {
1050                 esw_attr = flow->esw_attr;
1051                 esw_attr->encap_id = e->encap_id;
1052                 spec = &esw_attr->parse_attr->spec;
1053
1054                 /* update from slow path rule to encap rule */
1055                 rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, esw_attr);
1056                 if (IS_ERR(rule)) {
1057                         err = PTR_ERR(rule);
1058                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
1059                                        err);
1060                         continue;
1061                 }
1062
1063                 mlx5e_tc_unoffload_from_slow_path(esw, flow, &slow_attr);
1064                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED; /* was unset when slow path rule removed */
1065                 flow->rule[0] = rule;
1066         }
1067 }
1068
1069 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
1070                               struct mlx5e_encap_entry *e)
1071 {
1072         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1073         struct mlx5_esw_flow_attr slow_attr;
1074         struct mlx5_flow_handle *rule;
1075         struct mlx5_flow_spec *spec;
1076         struct mlx5e_tc_flow *flow;
1077         int err;
1078
1079         list_for_each_entry(flow, &e->flows, encap) {
1080                 spec = &flow->esw_attr->parse_attr->spec;
1081
1082                 /* update from encap rule to slow path rule */
1083                 rule = mlx5e_tc_offload_to_slow_path(esw, flow, spec, &slow_attr);
1084
1085                 if (IS_ERR(rule)) {
1086                         err = PTR_ERR(rule);
1087                         mlx5_core_warn(priv->mdev, "Failed to update slow path (encap) flow, %d\n",
1088                                        err);
1089                         continue;
1090                 }
1091
1092                 mlx5e_tc_unoffload_fdb_rules(esw, flow, flow->esw_attr);
1093                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED; /* was unset when fast path rule removed */
1094                 flow->rule[0] = rule;
1095         }
1096
1097         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
1098                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
1099                 mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1100         }
1101 }
1102
1103 static struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow)
1104 {
1105         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1106                 return flow->esw_attr->counter;
1107         else
1108                 return flow->nic_attr->counter;
1109 }
1110
1111 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
1112 {
1113         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
1114         u64 bytes, packets, lastuse = 0;
1115         struct mlx5e_tc_flow *flow;
1116         struct mlx5e_encap_entry *e;
1117         struct mlx5_fc *counter;
1118         struct neigh_table *tbl;
1119         bool neigh_used = false;
1120         struct neighbour *n;
1121
1122         if (m_neigh->family == AF_INET)
1123                 tbl = &arp_tbl;
1124 #if IS_ENABLED(CONFIG_IPV6)
1125         else if (m_neigh->family == AF_INET6)
1126                 tbl = &nd_tbl;
1127 #endif
1128         else
1129                 return;
1130
1131         list_for_each_entry(e, &nhe->encap_list, encap_list) {
1132                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
1133                         continue;
1134                 list_for_each_entry(flow, &e->flows, encap) {
1135                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
1136                                 counter = mlx5e_tc_get_counter(flow);
1137                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
1138                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
1139                                         neigh_used = true;
1140                                         break;
1141                                 }
1142                         }
1143                 }
1144                 if (neigh_used)
1145                         break;
1146         }
1147
1148         if (neigh_used) {
1149                 nhe->reported_lastuse = jiffies;
1150
1151                 /* find the relevant neigh according to the cached device and
1152                  * dst ip pair
1153                  */
1154                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1155                 if (!n)
1156                         return;
1157
1158                 neigh_event_send(n, NULL);
1159                 neigh_release(n);
1160         }
1161 }
1162
1163 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1164                                struct mlx5e_tc_flow *flow)
1165 {
1166         struct list_head *next = flow->encap.next;
1167
1168         list_del(&flow->encap);
1169         if (list_empty(next)) {
1170                 struct mlx5e_encap_entry *e;
1171
1172                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1173                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1174
1175                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1176                         mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1177
1178                 hash_del_rcu(&e->encap_hlist);
1179                 kfree(e->encap_header);
1180                 kfree(e);
1181         }
1182 }
1183
1184 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1185                               struct mlx5e_tc_flow *flow)
1186 {
1187         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1188                 mlx5e_tc_del_fdb_flow(priv, flow);
1189         else
1190                 mlx5e_tc_del_nic_flow(priv, flow);
1191 }
1192
1193 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1194                              struct tc_cls_flower_offload *f)
1195 {
1196         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1197                                        outer_headers);
1198         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1199                                        outer_headers);
1200         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1201                                     misc_parameters);
1202         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1203                                     misc_parameters);
1204
1205         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1206         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1207
1208         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1209                 struct flow_dissector_key_keyid *key =
1210                         skb_flow_dissector_target(f->dissector,
1211                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1212                                                   f->key);
1213                 struct flow_dissector_key_keyid *mask =
1214                         skb_flow_dissector_target(f->dissector,
1215                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1216                                                   f->mask);
1217                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1218                          be32_to_cpu(mask->keyid));
1219                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1220                          be32_to_cpu(key->keyid));
1221         }
1222 }
1223
1224 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1225                              struct mlx5_flow_spec *spec,
1226                              struct tc_cls_flower_offload *f)
1227 {
1228         struct netlink_ext_ack *extack = f->common.extack;
1229         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1230                                        outer_headers);
1231         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1232                                        outer_headers);
1233
1234         struct flow_dissector_key_control *enc_control =
1235                 skb_flow_dissector_target(f->dissector,
1236                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1237                                           f->key);
1238
1239         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1240                 struct flow_dissector_key_ports *key =
1241                         skb_flow_dissector_target(f->dissector,
1242                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1243                                                   f->key);
1244                 struct flow_dissector_key_ports *mask =
1245                         skb_flow_dissector_target(f->dissector,
1246                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1247                                                   f->mask);
1248
1249                 /* Full udp dst port must be given */
1250                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1251                         goto vxlan_match_offload_err;
1252
1253                 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->dst)) &&
1254                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1255                         parse_vxlan_attr(spec, f);
1256                 else {
1257                         NL_SET_ERR_MSG_MOD(extack,
1258                                            "port isn't an offloaded vxlan udp dport");
1259                         netdev_warn(priv->netdev,
1260                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1261                         return -EOPNOTSUPP;
1262                 }
1263
1264                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1265                          udp_dport, ntohs(mask->dst));
1266                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1267                          udp_dport, ntohs(key->dst));
1268
1269                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1270                          udp_sport, ntohs(mask->src));
1271                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1272                          udp_sport, ntohs(key->src));
1273         } else { /* udp dst port must be given */
1274 vxlan_match_offload_err:
1275                 NL_SET_ERR_MSG_MOD(extack,
1276                                    "IP tunnel decap offload supported only for vxlan, must set UDP dport");
1277                 netdev_warn(priv->netdev,
1278                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1279                 return -EOPNOTSUPP;
1280         }
1281
1282         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1283                 struct flow_dissector_key_ipv4_addrs *key =
1284                         skb_flow_dissector_target(f->dissector,
1285                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1286                                                   f->key);
1287                 struct flow_dissector_key_ipv4_addrs *mask =
1288                         skb_flow_dissector_target(f->dissector,
1289                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1290                                                   f->mask);
1291                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1292                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1293                          ntohl(mask->src));
1294                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1295                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1296                          ntohl(key->src));
1297
1298                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1299                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1300                          ntohl(mask->dst));
1301                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1302                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1303                          ntohl(key->dst));
1304
1305                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1306                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1307         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1308                 struct flow_dissector_key_ipv6_addrs *key =
1309                         skb_flow_dissector_target(f->dissector,
1310                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1311                                                   f->key);
1312                 struct flow_dissector_key_ipv6_addrs *mask =
1313                         skb_flow_dissector_target(f->dissector,
1314                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1315                                                   f->mask);
1316
1317                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1318                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1319                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1320                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1321                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1322                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1323
1324                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1325                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1326                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1327                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1328                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1329                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1330
1331                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1332                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1333         }
1334
1335         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_IP)) {
1336                 struct flow_dissector_key_ip *key =
1337                         skb_flow_dissector_target(f->dissector,
1338                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1339                                                   f->key);
1340                 struct flow_dissector_key_ip *mask =
1341                         skb_flow_dissector_target(f->dissector,
1342                                                   FLOW_DISSECTOR_KEY_ENC_IP,
1343                                                   f->mask);
1344
1345                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1346                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1347
1348                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1349                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1350
1351                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1352                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1353
1354                 if (mask->ttl &&
1355                     !MLX5_CAP_ESW_FLOWTABLE_FDB
1356                         (priv->mdev,
1357                          ft_field_support.outer_ipv4_ttl)) {
1358                         NL_SET_ERR_MSG_MOD(extack,
1359                                            "Matching on TTL is not supported");
1360                         return -EOPNOTSUPP;
1361                 }
1362
1363         }
1364
1365         /* Enforce DMAC when offloading incoming tunneled flows.
1366          * Flow counters require a match on the DMAC.
1367          */
1368         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1369         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1370         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1371                                      dmac_47_16), priv->netdev->dev_addr);
1372
1373         /* let software handle IP fragments */
1374         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1375         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1376
1377         return 0;
1378 }
1379
1380 static int __parse_cls_flower(struct mlx5e_priv *priv,
1381                               struct mlx5_flow_spec *spec,
1382                               struct tc_cls_flower_offload *f,
1383                               u8 *match_level)
1384 {
1385         struct netlink_ext_ack *extack = f->common.extack;
1386         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1387                                        outer_headers);
1388         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1389                                        outer_headers);
1390         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1391                                     misc_parameters);
1392         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1393                                     misc_parameters);
1394         u16 addr_type = 0;
1395         u8 ip_proto = 0;
1396
1397         *match_level = MLX5_MATCH_NONE;
1398
1399         if (f->dissector->used_keys &
1400             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1401               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1402               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1403               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1404               BIT(FLOW_DISSECTOR_KEY_CVLAN) |
1405               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1406               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1407               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1408               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1409               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1410               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1411               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1412               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1413               BIT(FLOW_DISSECTOR_KEY_TCP) |
1414               BIT(FLOW_DISSECTOR_KEY_IP)  |
1415               BIT(FLOW_DISSECTOR_KEY_ENC_IP))) {
1416                 NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
1417                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1418                             f->dissector->used_keys);
1419                 return -EOPNOTSUPP;
1420         }
1421
1422         if ((dissector_uses_key(f->dissector,
1423                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1424              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1425              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1426             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1427                 struct flow_dissector_key_control *key =
1428                         skb_flow_dissector_target(f->dissector,
1429                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1430                                                   f->key);
1431                 switch (key->addr_type) {
1432                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1433                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1434                         if (parse_tunnel_attr(priv, spec, f))
1435                                 return -EOPNOTSUPP;
1436                         break;
1437                 default:
1438                         return -EOPNOTSUPP;
1439                 }
1440
1441                 /* In decap flow, header pointers should point to the inner
1442                  * headers, outer header were already set by parse_tunnel_attr
1443                  */
1444                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1445                                          inner_headers);
1446                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1447                                          inner_headers);
1448         }
1449
1450         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1451                 struct flow_dissector_key_eth_addrs *key =
1452                         skb_flow_dissector_target(f->dissector,
1453                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1454                                                   f->key);
1455                 struct flow_dissector_key_eth_addrs *mask =
1456                         skb_flow_dissector_target(f->dissector,
1457                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1458                                                   f->mask);
1459
1460                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1461                                              dmac_47_16),
1462                                 mask->dst);
1463                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1464                                              dmac_47_16),
1465                                 key->dst);
1466
1467                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1468                                              smac_47_16),
1469                                 mask->src);
1470                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1471                                              smac_47_16),
1472                                 key->src);
1473
1474                 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1475                         *match_level = MLX5_MATCH_L2;
1476         }
1477
1478         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1479                 struct flow_dissector_key_vlan *key =
1480                         skb_flow_dissector_target(f->dissector,
1481                                                   FLOW_DISSECTOR_KEY_VLAN,
1482                                                   f->key);
1483                 struct flow_dissector_key_vlan *mask =
1484                         skb_flow_dissector_target(f->dissector,
1485                                                   FLOW_DISSECTOR_KEY_VLAN,
1486                                                   f->mask);
1487                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1488                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1489                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1490                                          svlan_tag, 1);
1491                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1492                                          svlan_tag, 1);
1493                         } else {
1494                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1495                                          cvlan_tag, 1);
1496                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1497                                          cvlan_tag, 1);
1498                         }
1499
1500                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1501                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1502
1503                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1504                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1505
1506                         *match_level = MLX5_MATCH_L2;
1507                 }
1508         } else {
1509                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, svlan_tag, 1);
1510                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1511         }
1512
1513         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CVLAN)) {
1514                 struct flow_dissector_key_vlan *key =
1515                         skb_flow_dissector_target(f->dissector,
1516                                                   FLOW_DISSECTOR_KEY_CVLAN,
1517                                                   f->key);
1518                 struct flow_dissector_key_vlan *mask =
1519                         skb_flow_dissector_target(f->dissector,
1520                                                   FLOW_DISSECTOR_KEY_CVLAN,
1521                                                   f->mask);
1522                 if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) {
1523                         if (key->vlan_tpid == htons(ETH_P_8021AD)) {
1524                                 MLX5_SET(fte_match_set_misc, misc_c,
1525                                          outer_second_svlan_tag, 1);
1526                                 MLX5_SET(fte_match_set_misc, misc_v,
1527                                          outer_second_svlan_tag, 1);
1528                         } else {
1529                                 MLX5_SET(fte_match_set_misc, misc_c,
1530                                          outer_second_cvlan_tag, 1);
1531                                 MLX5_SET(fte_match_set_misc, misc_v,
1532                                          outer_second_cvlan_tag, 1);
1533                         }
1534
1535                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
1536                                  mask->vlan_id);
1537                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
1538                                  key->vlan_id);
1539                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
1540                                  mask->vlan_priority);
1541                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
1542                                  key->vlan_priority);
1543
1544                         *match_level = MLX5_MATCH_L2;
1545                 }
1546         }
1547
1548         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1549                 struct flow_dissector_key_basic *key =
1550                         skb_flow_dissector_target(f->dissector,
1551                                                   FLOW_DISSECTOR_KEY_BASIC,
1552                                                   f->key);
1553                 struct flow_dissector_key_basic *mask =
1554                         skb_flow_dissector_target(f->dissector,
1555                                                   FLOW_DISSECTOR_KEY_BASIC,
1556                                                   f->mask);
1557                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1558                          ntohs(mask->n_proto));
1559                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1560                          ntohs(key->n_proto));
1561
1562                 if (mask->n_proto)
1563                         *match_level = MLX5_MATCH_L2;
1564         }
1565
1566         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1567                 struct flow_dissector_key_control *key =
1568                         skb_flow_dissector_target(f->dissector,
1569                                                   FLOW_DISSECTOR_KEY_CONTROL,
1570                                                   f->key);
1571
1572                 struct flow_dissector_key_control *mask =
1573                         skb_flow_dissector_target(f->dissector,
1574                                                   FLOW_DISSECTOR_KEY_CONTROL,
1575                                                   f->mask);
1576                 addr_type = key->addr_type;
1577
1578                 /* the HW doesn't support frag first/later */
1579                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1580                         return -EOPNOTSUPP;
1581
1582                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1583                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1584                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1585                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1586
1587                         /* the HW doesn't need L3 inline to match on frag=no */
1588                         if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1589                                 *match_level = MLX5_INLINE_MODE_L2;
1590         /* ***  L2 attributes parsing up to here *** */
1591                         else
1592                                 *match_level = MLX5_INLINE_MODE_IP;
1593                 }
1594         }
1595
1596         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1597                 struct flow_dissector_key_basic *key =
1598                         skb_flow_dissector_target(f->dissector,
1599                                                   FLOW_DISSECTOR_KEY_BASIC,
1600                                                   f->key);
1601                 struct flow_dissector_key_basic *mask =
1602                         skb_flow_dissector_target(f->dissector,
1603                                                   FLOW_DISSECTOR_KEY_BASIC,
1604                                                   f->mask);
1605                 ip_proto = key->ip_proto;
1606
1607                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1608                          mask->ip_proto);
1609                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1610                          key->ip_proto);
1611
1612                 if (mask->ip_proto)
1613                         *match_level = MLX5_MATCH_L3;
1614         }
1615
1616         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1617                 struct flow_dissector_key_ipv4_addrs *key =
1618                         skb_flow_dissector_target(f->dissector,
1619                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1620                                                   f->key);
1621                 struct flow_dissector_key_ipv4_addrs *mask =
1622                         skb_flow_dissector_target(f->dissector,
1623                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1624                                                   f->mask);
1625
1626                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1627                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1628                        &mask->src, sizeof(mask->src));
1629                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1630                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1631                        &key->src, sizeof(key->src));
1632                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1633                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1634                        &mask->dst, sizeof(mask->dst));
1635                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1636                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1637                        &key->dst, sizeof(key->dst));
1638
1639                 if (mask->src || mask->dst)
1640                         *match_level = MLX5_MATCH_L3;
1641         }
1642
1643         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1644                 struct flow_dissector_key_ipv6_addrs *key =
1645                         skb_flow_dissector_target(f->dissector,
1646                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1647                                                   f->key);
1648                 struct flow_dissector_key_ipv6_addrs *mask =
1649                         skb_flow_dissector_target(f->dissector,
1650                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1651                                                   f->mask);
1652
1653                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1654                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1655                        &mask->src, sizeof(mask->src));
1656                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1657                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1658                        &key->src, sizeof(key->src));
1659
1660                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1661                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1662                        &mask->dst, sizeof(mask->dst));
1663                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1664                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1665                        &key->dst, sizeof(key->dst));
1666
1667                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1668                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1669                         *match_level = MLX5_MATCH_L3;
1670         }
1671
1672         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1673                 struct flow_dissector_key_ip *key =
1674                         skb_flow_dissector_target(f->dissector,
1675                                                   FLOW_DISSECTOR_KEY_IP,
1676                                                   f->key);
1677                 struct flow_dissector_key_ip *mask =
1678                         skb_flow_dissector_target(f->dissector,
1679                                                   FLOW_DISSECTOR_KEY_IP,
1680                                                   f->mask);
1681
1682                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1683                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1684
1685                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1686                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1687
1688                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1689                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1690
1691                 if (mask->ttl &&
1692                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1693                                                 ft_field_support.outer_ipv4_ttl)) {
1694                         NL_SET_ERR_MSG_MOD(extack,
1695                                            "Matching on TTL is not supported");
1696                         return -EOPNOTSUPP;
1697                 }
1698
1699                 if (mask->tos || mask->ttl)
1700                         *match_level = MLX5_MATCH_L3;
1701         }
1702
1703         /* ***  L3 attributes parsing up to here *** */
1704
1705         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1706                 struct flow_dissector_key_ports *key =
1707                         skb_flow_dissector_target(f->dissector,
1708                                                   FLOW_DISSECTOR_KEY_PORTS,
1709                                                   f->key);
1710                 struct flow_dissector_key_ports *mask =
1711                         skb_flow_dissector_target(f->dissector,
1712                                                   FLOW_DISSECTOR_KEY_PORTS,
1713                                                   f->mask);
1714                 switch (ip_proto) {
1715                 case IPPROTO_TCP:
1716                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1717                                  tcp_sport, ntohs(mask->src));
1718                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1719                                  tcp_sport, ntohs(key->src));
1720
1721                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1722                                  tcp_dport, ntohs(mask->dst));
1723                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1724                                  tcp_dport, ntohs(key->dst));
1725                         break;
1726
1727                 case IPPROTO_UDP:
1728                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1729                                  udp_sport, ntohs(mask->src));
1730                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1731                                  udp_sport, ntohs(key->src));
1732
1733                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1734                                  udp_dport, ntohs(mask->dst));
1735                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1736                                  udp_dport, ntohs(key->dst));
1737                         break;
1738                 default:
1739                         NL_SET_ERR_MSG_MOD(extack,
1740                                            "Only UDP and TCP transports are supported for L4 matching");
1741                         netdev_err(priv->netdev,
1742                                    "Only UDP and TCP transport are supported\n");
1743                         return -EINVAL;
1744                 }
1745
1746                 if (mask->src || mask->dst)
1747                         *match_level = MLX5_MATCH_L4;
1748         }
1749
1750         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1751                 struct flow_dissector_key_tcp *key =
1752                         skb_flow_dissector_target(f->dissector,
1753                                                   FLOW_DISSECTOR_KEY_TCP,
1754                                                   f->key);
1755                 struct flow_dissector_key_tcp *mask =
1756                         skb_flow_dissector_target(f->dissector,
1757                                                   FLOW_DISSECTOR_KEY_TCP,
1758                                                   f->mask);
1759
1760                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1761                          ntohs(mask->flags));
1762                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1763                          ntohs(key->flags));
1764
1765                 if (mask->flags)
1766                         *match_level = MLX5_MATCH_L4;
1767         }
1768
1769         return 0;
1770 }
1771
1772 static int parse_cls_flower(struct mlx5e_priv *priv,
1773                             struct mlx5e_tc_flow *flow,
1774                             struct mlx5_flow_spec *spec,
1775                             struct tc_cls_flower_offload *f)
1776 {
1777         struct netlink_ext_ack *extack = f->common.extack;
1778         struct mlx5_core_dev *dev = priv->mdev;
1779         struct mlx5_eswitch *esw = dev->priv.eswitch;
1780         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1781         struct mlx5_eswitch_rep *rep;
1782         u8 match_level;
1783         int err;
1784
1785         err = __parse_cls_flower(priv, spec, f, &match_level);
1786
1787         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1788                 rep = rpriv->rep;
1789                 if (rep->vport != FDB_UPLINK_VPORT &&
1790                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1791                     esw->offloads.inline_mode < match_level)) {
1792                         NL_SET_ERR_MSG_MOD(extack,
1793                                            "Flow is not offloaded due to min inline setting");
1794                         netdev_warn(priv->netdev,
1795                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1796                                     match_level, esw->offloads.inline_mode);
1797                         return -EOPNOTSUPP;
1798                 }
1799         }
1800
1801         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1802                 flow->esw_attr->match_level = match_level;
1803         else
1804                 flow->nic_attr->match_level = match_level;
1805
1806         return err;
1807 }
1808
1809 struct pedit_headers {
1810         struct ethhdr  eth;
1811         struct iphdr   ip4;
1812         struct ipv6hdr ip6;
1813         struct tcphdr  tcp;
1814         struct udphdr  udp;
1815 };
1816
1817 static int pedit_header_offsets[] = {
1818         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1819         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1820         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1821         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1822         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1823 };
1824
1825 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1826
1827 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1828                          struct pedit_headers *masks,
1829                          struct pedit_headers *vals)
1830 {
1831         u32 *curr_pmask, *curr_pval;
1832
1833         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1834                 goto out_err;
1835
1836         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1837         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1838
1839         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1840                 goto out_err;
1841
1842         *curr_pmask |= mask;
1843         *curr_pval  |= (val & mask);
1844
1845         return 0;
1846
1847 out_err:
1848         return -EOPNOTSUPP;
1849 }
1850
1851 struct mlx5_fields {
1852         u8  field;
1853         u8  size;
1854         u32 offset;
1855 };
1856
1857 #define OFFLOAD(fw_field, size, field, off) \
1858                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1859
1860 static struct mlx5_fields fields[] = {
1861         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1862         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1863         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1864         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1865         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1866
1867         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1868         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1869         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1870
1871         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1872         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1873         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1874         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1875         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1876         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1877         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1878         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1879         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1880
1881         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1882         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1883         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1884
1885         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1886         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1887 };
1888
1889 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1890  * max from the SW pedit action. On success, it says how many HW actions were
1891  * actually parsed.
1892  */
1893 static int offload_pedit_fields(struct pedit_headers *masks,
1894                                 struct pedit_headers *vals,
1895                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
1896                                 struct netlink_ext_ack *extack)
1897 {
1898         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1899         int i, action_size, nactions, max_actions, first, last, next_z;
1900         void *s_masks_p, *a_masks_p, *vals_p;
1901         struct mlx5_fields *f;
1902         u8 cmd, field_bsize;
1903         u32 s_mask, a_mask;
1904         unsigned long mask;
1905         __be32 mask_be32;
1906         __be16 mask_be16;
1907         void *action;
1908
1909         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1910         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1911         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1912         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1913
1914         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1915         action = parse_attr->mod_hdr_actions;
1916         max_actions = parse_attr->num_mod_hdr_actions;
1917         nactions = 0;
1918
1919         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1920                 f = &fields[i];
1921                 /* avoid seeing bits set from previous iterations */
1922                 s_mask = 0;
1923                 a_mask = 0;
1924
1925                 s_masks_p = (void *)set_masks + f->offset;
1926                 a_masks_p = (void *)add_masks + f->offset;
1927
1928                 memcpy(&s_mask, s_masks_p, f->size);
1929                 memcpy(&a_mask, a_masks_p, f->size);
1930
1931                 if (!s_mask && !a_mask) /* nothing to offload here */
1932                         continue;
1933
1934                 if (s_mask && a_mask) {
1935                         NL_SET_ERR_MSG_MOD(extack,
1936                                            "can't set and add to the same HW field");
1937                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1938                         return -EOPNOTSUPP;
1939                 }
1940
1941                 if (nactions == max_actions) {
1942                         NL_SET_ERR_MSG_MOD(extack,
1943                                            "too many pedit actions, can't offload");
1944                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1945                         return -EOPNOTSUPP;
1946                 }
1947
1948                 if (s_mask) {
1949                         cmd  = MLX5_ACTION_TYPE_SET;
1950                         mask = s_mask;
1951                         vals_p = (void *)set_vals + f->offset;
1952                         /* clear to denote we consumed this field */
1953                         memset(s_masks_p, 0, f->size);
1954                 } else {
1955                         cmd  = MLX5_ACTION_TYPE_ADD;
1956                         mask = a_mask;
1957                         vals_p = (void *)add_vals + f->offset;
1958                         /* clear to denote we consumed this field */
1959                         memset(a_masks_p, 0, f->size);
1960                 }
1961
1962                 field_bsize = f->size * BITS_PER_BYTE;
1963
1964                 if (field_bsize == 32) {
1965                         mask_be32 = *(__be32 *)&mask;
1966                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1967                 } else if (field_bsize == 16) {
1968                         mask_be16 = *(__be16 *)&mask;
1969                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1970                 }
1971
1972                 first = find_first_bit(&mask, field_bsize);
1973                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1974                 last  = find_last_bit(&mask, field_bsize);
1975                 if (first < next_z && next_z < last) {
1976                         NL_SET_ERR_MSG_MOD(extack,
1977                                            "rewrite of few sub-fields isn't supported");
1978                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1979                                mask);
1980                         return -EOPNOTSUPP;
1981                 }
1982
1983                 MLX5_SET(set_action_in, action, action_type, cmd);
1984                 MLX5_SET(set_action_in, action, field, f->field);
1985
1986                 if (cmd == MLX5_ACTION_TYPE_SET) {
1987                         MLX5_SET(set_action_in, action, offset, first);
1988                         /* length is num of bits to be written, zero means length of 32 */
1989                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1990                 }
1991
1992                 if (field_bsize == 32)
1993                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1994                 else if (field_bsize == 16)
1995                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1996                 else if (field_bsize == 8)
1997                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1998
1999                 action += action_size;
2000                 nactions++;
2001         }
2002
2003         parse_attr->num_mod_hdr_actions = nactions;
2004         return 0;
2005 }
2006
2007 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
2008                                  const struct tc_action *a, int namespace,
2009                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
2010 {
2011         int nkeys, action_size, max_actions;
2012
2013         nkeys = tcf_pedit_nkeys(a);
2014         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
2015
2016         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
2017                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
2018         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
2019                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
2020
2021         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
2022         max_actions = min(max_actions, nkeys * 16);
2023
2024         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
2025         if (!parse_attr->mod_hdr_actions)
2026                 return -ENOMEM;
2027
2028         parse_attr->num_mod_hdr_actions = max_actions;
2029         return 0;
2030 }
2031
2032 static const struct pedit_headers zero_masks = {};
2033
2034 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
2035                                  const struct tc_action *a, int namespace,
2036                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
2037                                  struct netlink_ext_ack *extack)
2038 {
2039         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
2040         int nkeys, i, err = -EOPNOTSUPP;
2041         u32 mask, val, offset;
2042         u8 cmd, htype;
2043
2044         nkeys = tcf_pedit_nkeys(a);
2045
2046         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
2047         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
2048
2049         for (i = 0; i < nkeys; i++) {
2050                 htype = tcf_pedit_htype(a, i);
2051                 cmd = tcf_pedit_cmd(a, i);
2052                 err = -EOPNOTSUPP; /* can't be all optimistic */
2053
2054                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
2055                         NL_SET_ERR_MSG_MOD(extack,
2056                                            "legacy pedit isn't offloaded");
2057                         goto out_err;
2058                 }
2059
2060                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
2061                         NL_SET_ERR_MSG_MOD(extack, "pedit cmd isn't offloaded");
2062                         goto out_err;
2063                 }
2064
2065                 mask = tcf_pedit_mask(a, i);
2066                 val = tcf_pedit_val(a, i);
2067                 offset = tcf_pedit_offset(a, i);
2068
2069                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
2070                 if (err)
2071                         goto out_err;
2072         }
2073
2074         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
2075         if (err)
2076                 goto out_err;
2077
2078         err = offload_pedit_fields(masks, vals, parse_attr, extack);
2079         if (err < 0)
2080                 goto out_dealloc_parsed_actions;
2081
2082         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
2083                 cmd_masks = &masks[cmd];
2084                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
2085                         NL_SET_ERR_MSG_MOD(extack,
2086                                            "attempt to offload an unsupported field");
2087                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
2088                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
2089                                        16, 1, cmd_masks, sizeof(zero_masks), true);
2090                         err = -EOPNOTSUPP;
2091                         goto out_dealloc_parsed_actions;
2092                 }
2093         }
2094
2095         return 0;
2096
2097 out_dealloc_parsed_actions:
2098         kfree(parse_attr->mod_hdr_actions);
2099 out_err:
2100         return err;
2101 }
2102
2103 static bool csum_offload_supported(struct mlx5e_priv *priv,
2104                                    u32 action,
2105                                    u32 update_flags,
2106                                    struct netlink_ext_ack *extack)
2107 {
2108         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
2109                          TCA_CSUM_UPDATE_FLAG_UDP;
2110
2111         /*  The HW recalcs checksums only if re-writing headers */
2112         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
2113                 NL_SET_ERR_MSG_MOD(extack,
2114                                    "TC csum action is only offloaded with pedit");
2115                 netdev_warn(priv->netdev,
2116                             "TC csum action is only offloaded with pedit\n");
2117                 return false;
2118         }
2119
2120         if (update_flags & ~prot_flags) {
2121                 NL_SET_ERR_MSG_MOD(extack,
2122                                    "can't offload TC csum action for some header/s");
2123                 netdev_warn(priv->netdev,
2124                             "can't offload TC csum action for some header/s - flags %#x\n",
2125                             update_flags);
2126                 return false;
2127         }
2128
2129         return true;
2130 }
2131
2132 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
2133                                           struct tcf_exts *exts,
2134                                           struct netlink_ext_ack *extack)
2135 {
2136         const struct tc_action *a;
2137         bool modify_ip_header;
2138         LIST_HEAD(actions);
2139         u8 htype, ip_proto;
2140         void *headers_v;
2141         u16 ethertype;
2142         int nkeys, i;
2143
2144         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
2145         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
2146
2147         /* for non-IP we only re-write MACs, so we're okay */
2148         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
2149                 goto out_ok;
2150
2151         modify_ip_header = false;
2152         tcf_exts_for_each_action(i, a, exts) {
2153                 int k;
2154
2155                 if (!is_tcf_pedit(a))
2156                         continue;
2157
2158                 nkeys = tcf_pedit_nkeys(a);
2159                 for (k = 0; k < nkeys; k++) {
2160                         htype = tcf_pedit_htype(a, k);
2161                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
2162                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
2163                                 modify_ip_header = true;
2164                                 break;
2165                         }
2166                 }
2167         }
2168
2169         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
2170         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
2171             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
2172                 NL_SET_ERR_MSG_MOD(extack,
2173                                    "can't offload re-write of non TCP/UDP");
2174                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
2175                 return false;
2176         }
2177
2178 out_ok:
2179         return true;
2180 }
2181
2182 static bool actions_match_supported(struct mlx5e_priv *priv,
2183                                     struct tcf_exts *exts,
2184                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
2185                                     struct mlx5e_tc_flow *flow,
2186                                     struct netlink_ext_ack *extack)
2187 {
2188         u32 actions;
2189
2190         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
2191                 actions = flow->esw_attr->action;
2192         else
2193                 actions = flow->nic_attr->action;
2194
2195         if (flow->flags & MLX5E_TC_FLOW_EGRESS &&
2196             !(actions & MLX5_FLOW_CONTEXT_ACTION_DECAP))
2197                 return false;
2198
2199         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
2200                 return modify_header_match_supported(&parse_attr->spec, exts,
2201                                                      extack);
2202
2203         return true;
2204 }
2205
2206 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
2207 {
2208         struct mlx5_core_dev *fmdev, *pmdev;
2209         u64 fsystem_guid, psystem_guid;
2210
2211         fmdev = priv->mdev;
2212         pmdev = peer_priv->mdev;
2213
2214         fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
2215         psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
2216
2217         return (fsystem_guid == psystem_guid);
2218 }
2219
2220 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2221                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2222                                 struct mlx5e_tc_flow *flow,
2223                                 struct netlink_ext_ack *extack)
2224 {
2225         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
2226         const struct tc_action *a;
2227         LIST_HEAD(actions);
2228         u32 action = 0;
2229         int err, i;
2230
2231         if (!tcf_exts_has_actions(exts))
2232                 return -EINVAL;
2233
2234         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
2235
2236         tcf_exts_for_each_action(i, a, exts) {
2237                 if (is_tcf_gact_shot(a)) {
2238                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
2239                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
2240                                                flow_table_properties_nic_receive.flow_counter))
2241                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
2242                         continue;
2243                 }
2244
2245                 if (is_tcf_pedit(a)) {
2246                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
2247                                                     parse_attr, extack);
2248                         if (err)
2249                                 return err;
2250
2251                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
2252                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2253                         continue;
2254                 }
2255
2256                 if (is_tcf_csum(a)) {
2257                         if (csum_offload_supported(priv, action,
2258                                                    tcf_csum_update_flags(a),
2259                                                    extack))
2260                                 continue;
2261
2262                         return -EOPNOTSUPP;
2263                 }
2264
2265                 if (is_tcf_mirred_egress_redirect(a)) {
2266                         struct net_device *peer_dev = tcf_mirred_dev(a);
2267
2268                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
2269                             same_hw_devs(priv, netdev_priv(peer_dev))) {
2270                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
2271                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2272                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2273                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2274                         } else {
2275                                 NL_SET_ERR_MSG_MOD(extack,
2276                                                    "device is not on same HW, can't offload");
2277                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2278                                             peer_dev->name);
2279                                 return -EINVAL;
2280                         }
2281                         continue;
2282                 }
2283
2284                 if (is_tcf_skbedit_mark(a)) {
2285                         u32 mark = tcf_skbedit_mark(a);
2286
2287                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2288                                 NL_SET_ERR_MSG_MOD(extack,
2289                                                    "Bad flow mark - only 16 bit is supported");
2290                                 return -EINVAL;
2291                         }
2292
2293                         attr->flow_tag = mark;
2294                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2295                         continue;
2296                 }
2297
2298                 return -EINVAL;
2299         }
2300
2301         attr->action = action;
2302         if (!actions_match_supported(priv, exts, parse_attr, flow, extack))
2303                 return -EOPNOTSUPP;
2304
2305         return 0;
2306 }
2307
2308 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2309                                  struct ip_tunnel_key *b)
2310 {
2311         return memcmp(a, b, sizeof(*a));
2312 }
2313
2314 static inline int hash_encap_info(struct ip_tunnel_key *key)
2315 {
2316         return jhash(key, sizeof(*key), 0);
2317 }
2318
2319 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2320                                    struct net_device *mirred_dev,
2321                                    struct net_device **out_dev,
2322                                    struct flowi4 *fl4,
2323                                    struct neighbour **out_n,
2324                                    u8 *out_ttl)
2325 {
2326         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2327         struct mlx5e_rep_priv *uplink_rpriv;
2328         struct rtable *rt;
2329         struct neighbour *n = NULL;
2330
2331 #if IS_ENABLED(CONFIG_INET)
2332         int ret;
2333
2334         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2335         ret = PTR_ERR_OR_ZERO(rt);
2336         if (ret)
2337                 return ret;
2338 #else
2339         return -EOPNOTSUPP;
2340 #endif
2341         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2342         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2343         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2344                 *out_dev = uplink_rpriv->netdev;
2345         else
2346                 *out_dev = rt->dst.dev;
2347
2348         if (!(*out_ttl))
2349                 *out_ttl = ip4_dst_hoplimit(&rt->dst);
2350         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2351         ip_rt_put(rt);
2352         if (!n)
2353                 return -ENOMEM;
2354
2355         *out_n = n;
2356         return 0;
2357 }
2358
2359 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2360                                   struct net_device *peer_netdev)
2361 {
2362         struct mlx5e_priv *peer_priv;
2363
2364         peer_priv = netdev_priv(peer_netdev);
2365
2366         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2367                 (priv->netdev->netdev_ops == peer_netdev->netdev_ops) &&
2368                 same_hw_devs(priv, peer_priv) &&
2369                 MLX5_VPORT_MANAGER(peer_priv->mdev) &&
2370                 (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS));
2371 }
2372
2373 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2374                                    struct net_device *mirred_dev,
2375                                    struct net_device **out_dev,
2376                                    struct flowi6 *fl6,
2377                                    struct neighbour **out_n,
2378                                    u8 *out_ttl)
2379 {
2380         struct neighbour *n = NULL;
2381         struct dst_entry *dst;
2382
2383 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2384         struct mlx5e_rep_priv *uplink_rpriv;
2385         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2386         int ret;
2387
2388         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2389                                          fl6);
2390         if (ret < 0)
2391                 return ret;
2392
2393         if (!(*out_ttl))
2394                 *out_ttl = ip6_dst_hoplimit(dst);
2395
2396         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2397         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2398         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2399                 *out_dev = uplink_rpriv->netdev;
2400         else
2401                 *out_dev = dst->dev;
2402 #else
2403         return -EOPNOTSUPP;
2404 #endif
2405
2406         n = dst_neigh_lookup(dst, &fl6->daddr);
2407         dst_release(dst);
2408         if (!n)
2409                 return -ENOMEM;
2410
2411         *out_n = n;
2412         return 0;
2413 }
2414
2415 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2416                                   char buf[], int encap_size,
2417                                   unsigned char h_dest[ETH_ALEN],
2418                                   u8 tos, u8 ttl,
2419                                   __be32 daddr,
2420                                   __be32 saddr,
2421                                   __be16 udp_dst_port,
2422                                   __be32 vx_vni)
2423 {
2424         struct ethhdr *eth = (struct ethhdr *)buf;
2425         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2426         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2427         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2428
2429         memset(buf, 0, encap_size);
2430
2431         ether_addr_copy(eth->h_dest, h_dest);
2432         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2433         eth->h_proto = htons(ETH_P_IP);
2434
2435         ip->daddr = daddr;
2436         ip->saddr = saddr;
2437
2438         ip->tos = tos;
2439         ip->ttl = ttl;
2440         ip->protocol = IPPROTO_UDP;
2441         ip->version = 0x4;
2442         ip->ihl = 0x5;
2443
2444         udp->dest = udp_dst_port;
2445         vxh->vx_flags = VXLAN_HF_VNI;
2446         vxh->vx_vni = vxlan_vni_field(vx_vni);
2447 }
2448
2449 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2450                                   char buf[], int encap_size,
2451                                   unsigned char h_dest[ETH_ALEN],
2452                                   u8 tos, u8 ttl,
2453                                   struct in6_addr *daddr,
2454                                   struct in6_addr *saddr,
2455                                   __be16 udp_dst_port,
2456                                   __be32 vx_vni)
2457 {
2458         struct ethhdr *eth = (struct ethhdr *)buf;
2459         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2460         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2461         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2462
2463         memset(buf, 0, encap_size);
2464
2465         ether_addr_copy(eth->h_dest, h_dest);
2466         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2467         eth->h_proto = htons(ETH_P_IPV6);
2468
2469         ip6_flow_hdr(ip6h, tos, 0);
2470         /* the HW fills up ipv6 payload len */
2471         ip6h->nexthdr     = IPPROTO_UDP;
2472         ip6h->hop_limit   = ttl;
2473         ip6h->daddr       = *daddr;
2474         ip6h->saddr       = *saddr;
2475
2476         udp->dest = udp_dst_port;
2477         vxh->vx_flags = VXLAN_HF_VNI;
2478         vxh->vx_vni = vxlan_vni_field(vx_vni);
2479 }
2480
2481 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2482                                           struct net_device *mirred_dev,
2483                                           struct mlx5e_encap_entry *e)
2484 {
2485         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2486         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2487         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2488         struct net_device *out_dev;
2489         struct neighbour *n = NULL;
2490         struct flowi4 fl4 = {};
2491         u8 nud_state, tos, ttl;
2492         char *encap_header;
2493         int err;
2494
2495         if (max_encap_size < ipv4_encap_size) {
2496                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2497                                ipv4_encap_size, max_encap_size);
2498                 return -EOPNOTSUPP;
2499         }
2500
2501         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2502         if (!encap_header)
2503                 return -ENOMEM;
2504
2505         switch (e->tunnel_type) {
2506         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2507                 fl4.flowi4_proto = IPPROTO_UDP;
2508                 fl4.fl4_dport = tun_key->tp_dst;
2509                 break;
2510         default:
2511                 err = -EOPNOTSUPP;
2512                 goto free_encap;
2513         }
2514
2515         tos = tun_key->tos;
2516         ttl = tun_key->ttl;
2517
2518         fl4.flowi4_tos = tun_key->tos;
2519         fl4.daddr = tun_key->u.ipv4.dst;
2520         fl4.saddr = tun_key->u.ipv4.src;
2521
2522         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2523                                       &fl4, &n, &ttl);
2524         if (err)
2525                 goto free_encap;
2526
2527         /* used by mlx5e_detach_encap to lookup a neigh hash table
2528          * entry in the neigh hash table when a user deletes a rule
2529          */
2530         e->m_neigh.dev = n->dev;
2531         e->m_neigh.family = n->ops->family;
2532         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2533         e->out_dev = out_dev;
2534
2535         /* It's importent to add the neigh to the hash table before checking
2536          * the neigh validity state. So if we'll get a notification, in case the
2537          * neigh changes it's validity state, we would find the relevant neigh
2538          * in the hash.
2539          */
2540         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2541         if (err)
2542                 goto free_encap;
2543
2544         read_lock_bh(&n->lock);
2545         nud_state = n->nud_state;
2546         ether_addr_copy(e->h_dest, n->ha);
2547         read_unlock_bh(&n->lock);
2548
2549         switch (e->tunnel_type) {
2550         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2551                 gen_vxlan_header_ipv4(out_dev, encap_header,
2552                                       ipv4_encap_size, e->h_dest, tos, ttl,
2553                                       fl4.daddr,
2554                                       fl4.saddr, tun_key->tp_dst,
2555                                       tunnel_id_to_key32(tun_key->tun_id));
2556                 break;
2557         default:
2558                 err = -EOPNOTSUPP;
2559                 goto destroy_neigh_entry;
2560         }
2561         e->encap_size = ipv4_encap_size;
2562         e->encap_header = encap_header;
2563
2564         if (!(nud_state & NUD_VALID)) {
2565                 neigh_event_send(n, NULL);
2566                 err = -EAGAIN;
2567                 goto out;
2568         }
2569
2570         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2571                                          ipv4_encap_size, encap_header,
2572                                          MLX5_FLOW_NAMESPACE_FDB,
2573                                          &e->encap_id);
2574         if (err)
2575                 goto destroy_neigh_entry;
2576
2577         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2578         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2579         neigh_release(n);
2580         return err;
2581
2582 destroy_neigh_entry:
2583         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2584 free_encap:
2585         kfree(encap_header);
2586 out:
2587         if (n)
2588                 neigh_release(n);
2589         return err;
2590 }
2591
2592 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2593                                           struct net_device *mirred_dev,
2594                                           struct mlx5e_encap_entry *e)
2595 {
2596         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2597         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2598         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2599         struct net_device *out_dev;
2600         struct neighbour *n = NULL;
2601         struct flowi6 fl6 = {};
2602         u8 nud_state, tos, ttl;
2603         char *encap_header;
2604         int err;
2605
2606         if (max_encap_size < ipv6_encap_size) {
2607                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2608                                ipv6_encap_size, max_encap_size);
2609                 return -EOPNOTSUPP;
2610         }
2611
2612         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2613         if (!encap_header)
2614                 return -ENOMEM;
2615
2616         switch (e->tunnel_type) {
2617         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2618                 fl6.flowi6_proto = IPPROTO_UDP;
2619                 fl6.fl6_dport = tun_key->tp_dst;
2620                 break;
2621         default:
2622                 err = -EOPNOTSUPP;
2623                 goto free_encap;
2624         }
2625
2626         tos = tun_key->tos;
2627         ttl = tun_key->ttl;
2628
2629         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2630         fl6.daddr = tun_key->u.ipv6.dst;
2631         fl6.saddr = tun_key->u.ipv6.src;
2632
2633         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2634                                       &fl6, &n, &ttl);
2635         if (err)
2636                 goto free_encap;
2637
2638         /* used by mlx5e_detach_encap to lookup a neigh hash table
2639          * entry in the neigh hash table when a user deletes a rule
2640          */
2641         e->m_neigh.dev = n->dev;
2642         e->m_neigh.family = n->ops->family;
2643         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2644         e->out_dev = out_dev;
2645
2646         /* It's importent to add the neigh to the hash table before checking
2647          * the neigh validity state. So if we'll get a notification, in case the
2648          * neigh changes it's validity state, we would find the relevant neigh
2649          * in the hash.
2650          */
2651         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2652         if (err)
2653                 goto free_encap;
2654
2655         read_lock_bh(&n->lock);
2656         nud_state = n->nud_state;
2657         ether_addr_copy(e->h_dest, n->ha);
2658         read_unlock_bh(&n->lock);
2659
2660         switch (e->tunnel_type) {
2661         case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2662                 gen_vxlan_header_ipv6(out_dev, encap_header,
2663                                       ipv6_encap_size, e->h_dest, tos, ttl,
2664                                       &fl6.daddr,
2665                                       &fl6.saddr, tun_key->tp_dst,
2666                                       tunnel_id_to_key32(tun_key->tun_id));
2667                 break;
2668         default:
2669                 err = -EOPNOTSUPP;
2670                 goto destroy_neigh_entry;
2671         }
2672
2673         e->encap_size = ipv6_encap_size;
2674         e->encap_header = encap_header;
2675
2676         if (!(nud_state & NUD_VALID)) {
2677                 neigh_event_send(n, NULL);
2678                 err = -EAGAIN;
2679                 goto out;
2680         }
2681
2682         err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2683                                          ipv6_encap_size, encap_header,
2684                                          MLX5_FLOW_NAMESPACE_FDB,
2685                                          &e->encap_id);
2686         if (err)
2687                 goto destroy_neigh_entry;
2688
2689         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2690         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2691         neigh_release(n);
2692         return err;
2693
2694 destroy_neigh_entry:
2695         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2696 free_encap:
2697         kfree(encap_header);
2698 out:
2699         if (n)
2700                 neigh_release(n);
2701         return err;
2702 }
2703
2704 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2705                               struct ip_tunnel_info *tun_info,
2706                               struct net_device *mirred_dev,
2707                               struct net_device **encap_dev,
2708                               struct mlx5e_tc_flow *flow,
2709                               struct netlink_ext_ack *extack)
2710 {
2711         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2712         unsigned short family = ip_tunnel_info_af(tun_info);
2713         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2714         struct ip_tunnel_key *key = &tun_info->key;
2715         struct mlx5e_encap_entry *e;
2716         int tunnel_type, err = 0;
2717         uintptr_t hash_key;
2718         bool found = false;
2719
2720         /* udp dst port must be set */
2721         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2722                 goto vxlan_encap_offload_err;
2723
2724         /* setting udp src port isn't supported */
2725         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2726 vxlan_encap_offload_err:
2727                 NL_SET_ERR_MSG_MOD(extack,
2728                                    "must set udp dst port and not set udp src port");
2729                 netdev_warn(priv->netdev,
2730                             "must set udp dst port and not set udp src port\n");
2731                 return -EOPNOTSUPP;
2732         }
2733
2734         if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) &&
2735             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2736                 tunnel_type = MLX5_REFORMAT_TYPE_L2_TO_VXLAN;
2737         } else {
2738                 NL_SET_ERR_MSG_MOD(extack,
2739                                    "port isn't an offloaded vxlan udp dport");
2740                 netdev_warn(priv->netdev,
2741                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2742                 return -EOPNOTSUPP;
2743         }
2744
2745         hash_key = hash_encap_info(key);
2746
2747         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2748                                    encap_hlist, hash_key) {
2749                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2750                         found = true;
2751                         break;
2752                 }
2753         }
2754
2755         /* must verify if encap is valid or not */
2756         if (found)
2757                 goto attach_flow;
2758
2759         e = kzalloc(sizeof(*e), GFP_KERNEL);
2760         if (!e)
2761                 return -ENOMEM;
2762
2763         e->tun_info = *tun_info;
2764         e->tunnel_type = tunnel_type;
2765         INIT_LIST_HEAD(&e->flows);
2766
2767         if (family == AF_INET)
2768                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2769         else if (family == AF_INET6)
2770                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2771
2772         if (err && err != -EAGAIN)
2773                 goto out_err;
2774
2775         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2776
2777 attach_flow:
2778         list_add(&flow->encap, &e->flows);
2779         *encap_dev = e->out_dev;
2780         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2781                 attr->encap_id = e->encap_id;
2782         else
2783                 err = -EAGAIN;
2784
2785         return err;
2786
2787 out_err:
2788         kfree(e);
2789         return err;
2790 }
2791
2792 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
2793                                 const struct tc_action *a,
2794                                 struct mlx5_esw_flow_attr *attr,
2795                                 u32 *action)
2796 {
2797         u8 vlan_idx = attr->total_vlan;
2798
2799         if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
2800                 return -EOPNOTSUPP;
2801
2802         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2803                 if (vlan_idx) {
2804                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2805                                                                  MLX5_FS_VLAN_DEPTH))
2806                                 return -EOPNOTSUPP;
2807
2808                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
2809                 } else {
2810                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2811                 }
2812         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2813                 attr->vlan_vid[vlan_idx] = tcf_vlan_push_vid(a);
2814                 attr->vlan_prio[vlan_idx] = tcf_vlan_push_prio(a);
2815                 attr->vlan_proto[vlan_idx] = tcf_vlan_push_proto(a);
2816                 if (!attr->vlan_proto[vlan_idx])
2817                         attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
2818
2819                 if (vlan_idx) {
2820                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
2821                                                                  MLX5_FS_VLAN_DEPTH))
2822                                 return -EOPNOTSUPP;
2823
2824                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
2825                 } else {
2826                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
2827                             (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2828                              tcf_vlan_push_prio(a)))
2829                                 return -EOPNOTSUPP;
2830
2831                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2832                 }
2833         } else { /* action is TCA_VLAN_ACT_MODIFY */
2834                 return -EOPNOTSUPP;
2835         }
2836
2837         attr->total_vlan = vlan_idx + 1;
2838
2839         return 0;
2840 }
2841
2842 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2843                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2844                                 struct mlx5e_tc_flow *flow,
2845                                 struct netlink_ext_ack *extack)
2846 {
2847         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2848         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2849         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2850         struct ip_tunnel_info *info = NULL;
2851         const struct tc_action *a;
2852         LIST_HEAD(actions);
2853         bool encap = false;
2854         u32 action = 0;
2855         int err, i;
2856
2857         if (!tcf_exts_has_actions(exts))
2858                 return -EINVAL;
2859
2860         attr->in_rep = rpriv->rep;
2861         attr->in_mdev = priv->mdev;
2862
2863         tcf_exts_for_each_action(i, a, exts) {
2864                 if (is_tcf_gact_shot(a)) {
2865                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2866                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2867                         continue;
2868                 }
2869
2870                 if (is_tcf_pedit(a)) {
2871                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2872                                                     parse_attr, extack);
2873                         if (err)
2874                                 return err;
2875
2876                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2877                         attr->mirror_count = attr->out_count;
2878                         continue;
2879                 }
2880
2881                 if (is_tcf_csum(a)) {
2882                         if (csum_offload_supported(priv, action,
2883                                                    tcf_csum_update_flags(a),
2884                                                    extack))
2885                                 continue;
2886
2887                         return -EOPNOTSUPP;
2888                 }
2889
2890                 if (is_tcf_mirred_egress_redirect(a) || is_tcf_mirred_egress_mirror(a)) {
2891                         struct mlx5e_priv *out_priv;
2892                         struct net_device *out_dev;
2893
2894                         out_dev = tcf_mirred_dev(a);
2895
2896                         if (attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
2897                                 NL_SET_ERR_MSG_MOD(extack,
2898                                                    "can't support more output ports, can't offload forwarding");
2899                                 pr_err("can't support more than %d output ports, can't offload forwarding\n",
2900                                        attr->out_count);
2901                                 return -EOPNOTSUPP;
2902                         }
2903
2904                         if (switchdev_port_same_parent_id(priv->netdev,
2905                                                           out_dev) ||
2906                             is_merged_eswitch_dev(priv, out_dev)) {
2907                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2908                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2909                                 out_priv = netdev_priv(out_dev);
2910                                 rpriv = out_priv->ppriv;
2911                                 attr->out_rep[attr->out_count] = rpriv->rep;
2912                                 attr->out_mdev[attr->out_count++] = out_priv->mdev;
2913                         } else if (encap) {
2914                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2915                                 parse_attr->tun_info = *info;
2916                                 attr->parse_attr = parse_attr;
2917                                 action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |
2918                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2919                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2920                                 /* attr->out_rep is resolved when we handle encap */
2921                         } else {
2922                                 NL_SET_ERR_MSG_MOD(extack,
2923                                                    "devices are not on same switch HW, can't offload forwarding");
2924                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2925                                        priv->netdev->name, out_dev->name);
2926                                 return -EINVAL;
2927                         }
2928                         continue;
2929                 }
2930
2931                 if (is_tcf_tunnel_set(a)) {
2932                         info = tcf_tunnel_info(a);
2933                         if (info)
2934                                 encap = true;
2935                         else
2936                                 return -EOPNOTSUPP;
2937                         attr->mirror_count = attr->out_count;
2938                         continue;
2939                 }
2940
2941                 if (is_tcf_vlan(a)) {
2942                         err = parse_tc_vlan_action(priv, a, attr, &action);
2943
2944                         if (err)
2945                                 return err;
2946
2947                         attr->mirror_count = attr->out_count;
2948                         continue;
2949                 }
2950
2951                 if (is_tcf_tunnel_release(a)) {
2952                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2953                         continue;
2954                 }
2955
2956                 if (is_tcf_gact_goto_chain(a)) {
2957                         u32 dest_chain = tcf_gact_goto_chain_index(a);
2958                         u32 max_chain = mlx5_eswitch_get_chain_range(esw);
2959
2960                         if (dest_chain <= attr->chain) {
2961                                 NL_SET_ERR_MSG(extack, "Goto earlier chain isn't supported");
2962                                 return -EOPNOTSUPP;
2963                         }
2964                         if (dest_chain > max_chain) {
2965                                 NL_SET_ERR_MSG(extack, "Requested destination chain is out of supported range");
2966                                 return -EOPNOTSUPP;
2967                         }
2968                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2969                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2970                         attr->dest_chain = dest_chain;
2971
2972                         continue;
2973                 }
2974
2975                 return -EINVAL;
2976         }
2977
2978         attr->action = action;
2979         if (!actions_match_supported(priv, exts, parse_attr, flow, extack))
2980                 return -EOPNOTSUPP;
2981
2982         if (attr->out_count > 1 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
2983                 NL_SET_ERR_MSG_MOD(extack,
2984                                    "current firmware doesn't support split rule for port mirroring");
2985                 netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
2986                 return -EOPNOTSUPP;
2987         }
2988
2989         return 0;
2990 }
2991
2992 static void get_flags(int flags, u16 *flow_flags)
2993 {
2994         u16 __flow_flags = 0;
2995
2996         if (flags & MLX5E_TC_INGRESS)
2997                 __flow_flags |= MLX5E_TC_FLOW_INGRESS;
2998         if (flags & MLX5E_TC_EGRESS)
2999                 __flow_flags |= MLX5E_TC_FLOW_EGRESS;
3000
3001         *flow_flags = __flow_flags;
3002 }
3003
3004 static const struct rhashtable_params tc_ht_params = {
3005         .head_offset = offsetof(struct mlx5e_tc_flow, node),
3006         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
3007         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
3008         .automatic_shrinking = true,
3009 };
3010
3011 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv)
3012 {
3013         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3014         struct mlx5e_rep_priv *uplink_rpriv;
3015
3016         if (MLX5_VPORT_MANAGER(priv->mdev) && esw->mode == SRIOV_OFFLOADS) {
3017                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
3018                 return &uplink_rpriv->tc_ht;
3019         } else
3020                 return &priv->fs.tc.ht;
3021 }
3022
3023 static int
3024 mlx5e_alloc_flow(struct mlx5e_priv *priv, int attr_size,
3025                  struct tc_cls_flower_offload *f, u16 flow_flags,
3026                  struct mlx5e_tc_flow_parse_attr **__parse_attr,
3027                  struct mlx5e_tc_flow **__flow)
3028 {
3029         struct mlx5e_tc_flow_parse_attr *parse_attr;
3030         struct mlx5e_tc_flow *flow;
3031         int err;
3032
3033         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
3034         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
3035         if (!parse_attr || !flow) {
3036                 err = -ENOMEM;
3037                 goto err_free;
3038         }
3039
3040         flow->cookie = f->cookie;
3041         flow->flags = flow_flags;
3042         flow->priv = priv;
3043
3044         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
3045         if (err)
3046                 goto err_free;
3047
3048         *__flow = flow;
3049         *__parse_attr = parse_attr;
3050
3051         return 0;
3052
3053 err_free:
3054         kfree(flow);
3055         kvfree(parse_attr);
3056         return err;
3057 }
3058
3059 static int
3060 mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
3061                    struct tc_cls_flower_offload *f,
3062                    u16 flow_flags,
3063                    struct mlx5e_tc_flow **__flow)
3064 {
3065         struct netlink_ext_ack *extack = f->common.extack;
3066         struct mlx5e_tc_flow_parse_attr *parse_attr;
3067         struct mlx5e_tc_flow *flow;
3068         int attr_size, err;
3069
3070         flow_flags |= MLX5E_TC_FLOW_ESWITCH;
3071         attr_size  = sizeof(struct mlx5_esw_flow_attr);
3072         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
3073                                &parse_attr, &flow);
3074         if (err)
3075                 goto out;
3076
3077         flow->esw_attr->chain = f->common.chain_index;
3078         flow->esw_attr->prio = TC_H_MAJ(f->common.prio) >> 16;
3079         err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow, extack);
3080         if (err)
3081                 goto err_free;
3082
3083         err = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow, extack);
3084         if (err)
3085                 goto err_free;
3086
3087         if (!(flow->esw_attr->action &
3088               MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT))
3089                 kvfree(parse_attr);
3090
3091         *__flow = flow;
3092
3093         return 0;
3094
3095 err_free:
3096         kfree(flow);
3097         kvfree(parse_attr);
3098 out:
3099         return err;
3100 }
3101
3102 static int
3103 mlx5e_add_nic_flow(struct mlx5e_priv *priv,
3104                    struct tc_cls_flower_offload *f,
3105                    u16 flow_flags,
3106                    struct mlx5e_tc_flow **__flow)
3107 {
3108         struct netlink_ext_ack *extack = f->common.extack;
3109         struct mlx5e_tc_flow_parse_attr *parse_attr;
3110         struct mlx5e_tc_flow *flow;
3111         int attr_size, err;
3112
3113         /* multi-chain not supported for NIC rules */
3114         if (!tc_cls_can_offload_and_chain0(priv->netdev, &f->common))
3115                 return -EOPNOTSUPP;
3116
3117         flow_flags |= MLX5E_TC_FLOW_NIC;
3118         attr_size  = sizeof(struct mlx5_nic_flow_attr);
3119         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
3120                                &parse_attr, &flow);
3121         if (err)
3122                 goto out;
3123
3124         err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow, extack);
3125         if (err)
3126                 goto err_free;
3127
3128         err = mlx5e_tc_add_nic_flow(priv, parse_attr, flow, extack);
3129         if (err)
3130                 goto err_free;
3131
3132         flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
3133         kvfree(parse_attr);
3134         *__flow = flow;
3135
3136         return 0;
3137
3138 err_free:
3139         kfree(flow);
3140         kvfree(parse_attr);
3141 out:
3142         return err;
3143 }
3144
3145 static int
3146 mlx5e_tc_add_flow(struct mlx5e_priv *priv,
3147                   struct tc_cls_flower_offload *f,
3148                   int flags,
3149                   struct mlx5e_tc_flow **flow)
3150 {
3151         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3152         u16 flow_flags;
3153         int err;
3154
3155         get_flags(flags, &flow_flags);
3156
3157         if (!tc_can_offload_extack(priv->netdev, f->common.extack))
3158                 return -EOPNOTSUPP;
3159
3160         if (esw && esw->mode == SRIOV_OFFLOADS)
3161                 err = mlx5e_add_fdb_flow(priv, f, flow_flags, flow);
3162         else
3163                 err = mlx5e_add_nic_flow(priv, f, flow_flags, flow);
3164
3165         return err;
3166 }
3167
3168 int mlx5e_configure_flower(struct mlx5e_priv *priv,
3169                            struct tc_cls_flower_offload *f, int flags)
3170 {
3171         struct netlink_ext_ack *extack = f->common.extack;
3172         struct rhashtable *tc_ht = get_tc_ht(priv);
3173         struct mlx5e_tc_flow *flow;
3174         int err = 0;
3175
3176         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3177         if (flow) {
3178                 NL_SET_ERR_MSG_MOD(extack,
3179                                    "flow cookie already exists, ignoring");
3180                 netdev_warn_once(priv->netdev,
3181                                  "flow cookie %lx already exists, ignoring\n",
3182                                  f->cookie);
3183                 goto out;
3184         }
3185
3186         err = mlx5e_tc_add_flow(priv, f, flags, &flow);
3187         if (err)
3188                 goto out;
3189
3190         err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params);
3191         if (err)
3192                 goto err_free;
3193
3194         return 0;
3195
3196 err_free:
3197         mlx5e_tc_del_flow(priv, flow);
3198         kfree(flow);
3199 out:
3200         return err;
3201 }
3202
3203 #define DIRECTION_MASK (MLX5E_TC_INGRESS | MLX5E_TC_EGRESS)
3204 #define FLOW_DIRECTION_MASK (MLX5E_TC_FLOW_INGRESS | MLX5E_TC_FLOW_EGRESS)
3205
3206 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
3207 {
3208         if ((flow->flags & FLOW_DIRECTION_MASK) == (flags & DIRECTION_MASK))
3209                 return true;
3210
3211         return false;
3212 }
3213
3214 int mlx5e_delete_flower(struct mlx5e_priv *priv,
3215                         struct tc_cls_flower_offload *f, int flags)
3216 {
3217         struct rhashtable *tc_ht = get_tc_ht(priv);
3218         struct mlx5e_tc_flow *flow;
3219
3220         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3221         if (!flow || !same_flow_direction(flow, flags))
3222                 return -EINVAL;
3223
3224         rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
3225
3226         mlx5e_tc_del_flow(priv, flow);
3227
3228         kfree(flow);
3229
3230         return 0;
3231 }
3232
3233 int mlx5e_stats_flower(struct mlx5e_priv *priv,
3234                        struct tc_cls_flower_offload *f, int flags)
3235 {
3236         struct rhashtable *tc_ht = get_tc_ht(priv);
3237         struct mlx5e_tc_flow *flow;
3238         struct mlx5_fc *counter;
3239         u64 bytes;
3240         u64 packets;
3241         u64 lastuse;
3242
3243         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
3244         if (!flow || !same_flow_direction(flow, flags))
3245                 return -EINVAL;
3246
3247         if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
3248                 return 0;
3249
3250         counter = mlx5e_tc_get_counter(flow);
3251         if (!counter)
3252                 return 0;
3253
3254         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
3255
3256         tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
3257
3258         return 0;
3259 }
3260
3261 static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv,
3262                                               struct mlx5e_priv *peer_priv)
3263 {
3264         struct mlx5_core_dev *peer_mdev = peer_priv->mdev;
3265         struct mlx5e_hairpin_entry *hpe;
3266         u16 peer_vhca_id;
3267         int bkt;
3268
3269         if (!same_hw_devs(priv, peer_priv))
3270                 return;
3271
3272         peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
3273
3274         hash_for_each(priv->fs.tc.hairpin_tbl, bkt, hpe, hairpin_hlist) {
3275                 if (hpe->peer_vhca_id == peer_vhca_id)
3276                         hpe->hp->pair->peer_gone = true;
3277         }
3278 }
3279
3280 static int mlx5e_tc_netdev_event(struct notifier_block *this,
3281                                  unsigned long event, void *ptr)
3282 {
3283         struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
3284         struct mlx5e_flow_steering *fs;
3285         struct mlx5e_priv *peer_priv;
3286         struct mlx5e_tc_table *tc;
3287         struct mlx5e_priv *priv;
3288
3289         if (ndev->netdev_ops != &mlx5e_netdev_ops ||
3290             event != NETDEV_UNREGISTER ||
3291             ndev->reg_state == NETREG_REGISTERED)
3292                 return NOTIFY_DONE;
3293
3294         tc = container_of(this, struct mlx5e_tc_table, netdevice_nb);
3295         fs = container_of(tc, struct mlx5e_flow_steering, tc);
3296         priv = container_of(fs, struct mlx5e_priv, fs);
3297         peer_priv = netdev_priv(ndev);
3298         if (priv == peer_priv ||
3299             !(priv->netdev->features & NETIF_F_HW_TC))
3300                 return NOTIFY_DONE;
3301
3302         mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv);
3303
3304         return NOTIFY_DONE;
3305 }
3306
3307 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
3308 {
3309         struct mlx5e_tc_table *tc = &priv->fs.tc;
3310         int err;
3311
3312         hash_init(tc->mod_hdr_tbl);
3313         hash_init(tc->hairpin_tbl);
3314
3315         err = rhashtable_init(&tc->ht, &tc_ht_params);
3316         if (err)
3317                 return err;
3318
3319         tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event;
3320         if (register_netdevice_notifier(&tc->netdevice_nb)) {
3321                 tc->netdevice_nb.notifier_call = NULL;
3322                 mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n");
3323         }
3324
3325         return err;
3326 }
3327
3328 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
3329 {
3330         struct mlx5e_tc_flow *flow = ptr;
3331         struct mlx5e_priv *priv = flow->priv;
3332
3333         mlx5e_tc_del_flow(priv, flow);
3334         kfree(flow);
3335 }
3336
3337 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
3338 {
3339         struct mlx5e_tc_table *tc = &priv->fs.tc;
3340
3341         if (tc->netdevice_nb.notifier_call)
3342                 unregister_netdevice_notifier(&tc->netdevice_nb);
3343
3344         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
3345
3346         if (!IS_ERR_OR_NULL(tc->t)) {
3347                 mlx5_destroy_flow_table(tc->t);
3348                 tc->t = NULL;
3349         }
3350 }
3351
3352 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
3353 {
3354         return rhashtable_init(tc_ht, &tc_ht_params);
3355 }
3356
3357 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
3358 {
3359         rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
3360 }
3361
3362 int mlx5e_tc_num_filters(struct mlx5e_priv *priv)
3363 {
3364         struct rhashtable *tc_ht = get_tc_ht(priv);
3365
3366         return atomic_read(&tc_ht->nelems);
3367 }