net/mlx5e: Add ingress/egress indication for offloaded TC flows
[sfrench/cifs-2.6.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_tc.c
1 /*
2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include <net/flow_dissector.h>
34 #include <net/sch_generic.h>
35 #include <net/pkt_cls.h>
36 #include <net/tc_act/tc_gact.h>
37 #include <net/tc_act/tc_skbedit.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/device.h>
40 #include <linux/rhashtable.h>
41 #include <net/switchdev.h>
42 #include <net/tc_act/tc_mirred.h>
43 #include <net/tc_act/tc_vlan.h>
44 #include <net/tc_act/tc_tunnel_key.h>
45 #include <net/tc_act/tc_pedit.h>
46 #include <net/tc_act/tc_csum.h>
47 #include <net/vxlan.h>
48 #include <net/arp.h>
49 #include "en.h"
50 #include "en_rep.h"
51 #include "en_tc.h"
52 #include "eswitch.h"
53 #include "vxlan.h"
54 #include "fs_core.h"
55
56 struct mlx5_nic_flow_attr {
57         u32 action;
58         u32 flow_tag;
59         u32 mod_hdr_id;
60         u32 hairpin_tirn;
61         u8 match_level;
62         struct mlx5_flow_table  *hairpin_ft;
63 };
64
65 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
66
67 enum {
68         MLX5E_TC_FLOW_INGRESS   = MLX5E_TC_INGRESS,
69         MLX5E_TC_FLOW_EGRESS    = MLX5E_TC_EGRESS,
70         MLX5E_TC_FLOW_ESWITCH   = BIT(MLX5E_TC_FLOW_BASE),
71         MLX5E_TC_FLOW_NIC       = BIT(MLX5E_TC_FLOW_BASE + 1),
72         MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2),
73         MLX5E_TC_FLOW_HAIRPIN   = BIT(MLX5E_TC_FLOW_BASE + 3),
74         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4),
75 };
76
77 struct mlx5e_tc_flow {
78         struct rhash_head       node;
79         u64                     cookie;
80         u8                      flags;
81         struct mlx5_flow_handle *rule;
82         struct list_head        encap;   /* flows sharing the same encap ID */
83         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
84         struct list_head        hairpin; /* flows sharing the same hairpin */
85         union {
86                 struct mlx5_esw_flow_attr esw_attr[0];
87                 struct mlx5_nic_flow_attr nic_attr[0];
88         };
89 };
90
91 struct mlx5e_tc_flow_parse_attr {
92         struct ip_tunnel_info tun_info;
93         struct mlx5_flow_spec spec;
94         int num_mod_hdr_actions;
95         void *mod_hdr_actions;
96         int mirred_ifindex;
97 };
98
99 enum {
100         MLX5_HEADER_TYPE_VXLAN = 0x0,
101         MLX5_HEADER_TYPE_NVGRE = 0x1,
102 };
103
104 #define MLX5E_TC_TABLE_NUM_GROUPS 4
105 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
106
107 struct mlx5e_hairpin {
108         struct mlx5_hairpin *pair;
109
110         struct mlx5_core_dev *func_mdev;
111         struct mlx5e_priv *func_priv;
112         u32 tdn;
113         u32 tirn;
114
115         int num_channels;
116         struct mlx5e_rqt indir_rqt;
117         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
118         struct mlx5e_ttc_table ttc;
119 };
120
121 struct mlx5e_hairpin_entry {
122         /* a node of a hash table which keeps all the  hairpin entries */
123         struct hlist_node hairpin_hlist;
124
125         /* flows sharing the same hairpin */
126         struct list_head flows;
127
128         u16 peer_vhca_id;
129         u8 prio;
130         struct mlx5e_hairpin *hp;
131 };
132
133 struct mod_hdr_key {
134         int num_actions;
135         void *actions;
136 };
137
138 struct mlx5e_mod_hdr_entry {
139         /* a node of a hash table which keeps all the mod_hdr entries */
140         struct hlist_node mod_hdr_hlist;
141
142         /* flows sharing the same mod_hdr entry */
143         struct list_head flows;
144
145         struct mod_hdr_key key;
146
147         u32 mod_hdr_id;
148 };
149
150 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
151
152 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
153 {
154         return jhash(key->actions,
155                      key->num_actions * MLX5_MH_ACT_SZ, 0);
156 }
157
158 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
159                                    struct mod_hdr_key *b)
160 {
161         if (a->num_actions != b->num_actions)
162                 return 1;
163
164         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
165 }
166
167 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
168                                 struct mlx5e_tc_flow *flow,
169                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
170 {
171         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
172         int num_actions, actions_size, namespace, err;
173         struct mlx5e_mod_hdr_entry *mh;
174         struct mod_hdr_key key;
175         bool found = false;
176         u32 hash_key;
177
178         num_actions  = parse_attr->num_mod_hdr_actions;
179         actions_size = MLX5_MH_ACT_SZ * num_actions;
180
181         key.actions = parse_attr->mod_hdr_actions;
182         key.num_actions = num_actions;
183
184         hash_key = hash_mod_hdr_info(&key);
185
186         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
187                 namespace = MLX5_FLOW_NAMESPACE_FDB;
188                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
189                                        mod_hdr_hlist, hash_key) {
190                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
191                                 found = true;
192                                 break;
193                         }
194                 }
195         } else {
196                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
197                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
198                                        mod_hdr_hlist, hash_key) {
199                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
200                                 found = true;
201                                 break;
202                         }
203                 }
204         }
205
206         if (found)
207                 goto attach_flow;
208
209         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
210         if (!mh)
211                 return -ENOMEM;
212
213         mh->key.actions = (void *)mh + sizeof(*mh);
214         memcpy(mh->key.actions, key.actions, actions_size);
215         mh->key.num_actions = num_actions;
216         INIT_LIST_HEAD(&mh->flows);
217
218         err = mlx5_modify_header_alloc(priv->mdev, namespace,
219                                        mh->key.num_actions,
220                                        mh->key.actions,
221                                        &mh->mod_hdr_id);
222         if (err)
223                 goto out_err;
224
225         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
226                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
227         else
228                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
229
230 attach_flow:
231         list_add(&flow->mod_hdr, &mh->flows);
232         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
233                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
234         else
235                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
236
237         return 0;
238
239 out_err:
240         kfree(mh);
241         return err;
242 }
243
244 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
245                                  struct mlx5e_tc_flow *flow)
246 {
247         struct list_head *next = flow->mod_hdr.next;
248
249         list_del(&flow->mod_hdr);
250
251         if (list_empty(next)) {
252                 struct mlx5e_mod_hdr_entry *mh;
253
254                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
255
256                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
257                 hash_del(&mh->mod_hdr_hlist);
258                 kfree(mh);
259         }
260 }
261
262 static
263 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
264 {
265         struct net_device *netdev;
266         struct mlx5e_priv *priv;
267
268         netdev = __dev_get_by_index(net, ifindex);
269         priv = netdev_priv(netdev);
270         return priv->mdev;
271 }
272
273 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
274 {
275         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
276         void *tirc;
277         int err;
278
279         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
280         if (err)
281                 goto alloc_tdn_err;
282
283         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
284
285         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
286         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
287         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
288
289         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
290         if (err)
291                 goto create_tir_err;
292
293         return 0;
294
295 create_tir_err:
296         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
297 alloc_tdn_err:
298         return err;
299 }
300
301 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
302 {
303         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
304         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
305 }
306
307 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
308 {
309         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
310         struct mlx5e_priv *priv = hp->func_priv;
311         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
312
313         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
314                                       hp->num_channels);
315
316         for (i = 0; i < sz; i++) {
317                 ix = i;
318                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
319                         ix = mlx5e_bits_invert(i, ilog2(sz));
320                 ix = indirection_rqt[ix];
321                 rqn = hp->pair->rqn[ix];
322                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
323         }
324 }
325
326 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
327 {
328         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
329         struct mlx5e_priv *priv = hp->func_priv;
330         struct mlx5_core_dev *mdev = priv->mdev;
331         void *rqtc;
332         u32 *in;
333
334         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
335         in = kvzalloc(inlen, GFP_KERNEL);
336         if (!in)
337                 return -ENOMEM;
338
339         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
340
341         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
342         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
343
344         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
345
346         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
347         if (!err)
348                 hp->indir_rqt.enabled = true;
349
350         kvfree(in);
351         return err;
352 }
353
354 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
355 {
356         struct mlx5e_priv *priv = hp->func_priv;
357         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
358         int tt, i, err;
359         void *tirc;
360
361         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
362                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
363                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
364
365                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
366                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
367                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
368                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
369
370                 err = mlx5_core_create_tir(hp->func_mdev, in,
371                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
372                 if (err) {
373                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
374                         goto err_destroy_tirs;
375                 }
376         }
377         return 0;
378
379 err_destroy_tirs:
380         for (i = 0; i < tt; i++)
381                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
382         return err;
383 }
384
385 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
386 {
387         int tt;
388
389         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
390                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
391 }
392
393 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
394                                          struct ttc_params *ttc_params)
395 {
396         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
397         int tt;
398
399         memset(ttc_params, 0, sizeof(*ttc_params));
400
401         ttc_params->any_tt_tirn = hp->tirn;
402
403         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
404                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
405
406         ft_attr->max_fte = MLX5E_NUM_TT;
407         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
408         ft_attr->prio = MLX5E_TC_PRIO;
409 }
410
411 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
412 {
413         struct mlx5e_priv *priv = hp->func_priv;
414         struct ttc_params ttc_params;
415         int err;
416
417         err = mlx5e_hairpin_create_indirect_rqt(hp);
418         if (err)
419                 return err;
420
421         err = mlx5e_hairpin_create_indirect_tirs(hp);
422         if (err)
423                 goto err_create_indirect_tirs;
424
425         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
426         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
427         if (err)
428                 goto err_create_ttc_table;
429
430         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
431                    hp->num_channels, hp->ttc.ft.t->id);
432
433         return 0;
434
435 err_create_ttc_table:
436         mlx5e_hairpin_destroy_indirect_tirs(hp);
437 err_create_indirect_tirs:
438         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
439
440         return err;
441 }
442
443 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
444 {
445         struct mlx5e_priv *priv = hp->func_priv;
446
447         mlx5e_destroy_ttc_table(priv, &hp->ttc);
448         mlx5e_hairpin_destroy_indirect_tirs(hp);
449         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
450 }
451
452 static struct mlx5e_hairpin *
453 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
454                      int peer_ifindex)
455 {
456         struct mlx5_core_dev *func_mdev, *peer_mdev;
457         struct mlx5e_hairpin *hp;
458         struct mlx5_hairpin *pair;
459         int err;
460
461         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
462         if (!hp)
463                 return ERR_PTR(-ENOMEM);
464
465         func_mdev = priv->mdev;
466         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
467
468         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
469         if (IS_ERR(pair)) {
470                 err = PTR_ERR(pair);
471                 goto create_pair_err;
472         }
473         hp->pair = pair;
474         hp->func_mdev = func_mdev;
475         hp->func_priv = priv;
476         hp->num_channels = params->num_channels;
477
478         err = mlx5e_hairpin_create_transport(hp);
479         if (err)
480                 goto create_transport_err;
481
482         if (hp->num_channels > 1) {
483                 err = mlx5e_hairpin_rss_init(hp);
484                 if (err)
485                         goto rss_init_err;
486         }
487
488         return hp;
489
490 rss_init_err:
491         mlx5e_hairpin_destroy_transport(hp);
492 create_transport_err:
493         mlx5_core_hairpin_destroy(hp->pair);
494 create_pair_err:
495         kfree(hp);
496         return ERR_PTR(err);
497 }
498
499 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
500 {
501         if (hp->num_channels > 1)
502                 mlx5e_hairpin_rss_cleanup(hp);
503         mlx5e_hairpin_destroy_transport(hp);
504         mlx5_core_hairpin_destroy(hp->pair);
505         kvfree(hp);
506 }
507
508 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
509 {
510         return (peer_vhca_id << 16 | prio);
511 }
512
513 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
514                                                      u16 peer_vhca_id, u8 prio)
515 {
516         struct mlx5e_hairpin_entry *hpe;
517         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
518
519         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
520                                hairpin_hlist, hash_key) {
521                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
522                         return hpe;
523         }
524
525         return NULL;
526 }
527
528 #define UNKNOWN_MATCH_PRIO 8
529
530 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
531                                   struct mlx5_flow_spec *spec, u8 *match_prio)
532 {
533         void *headers_c, *headers_v;
534         u8 prio_val, prio_mask = 0;
535         bool vlan_present;
536
537 #ifdef CONFIG_MLX5_CORE_EN_DCB
538         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
539                 netdev_warn(priv->netdev,
540                             "only PCP trust state supported for hairpin\n");
541                 return -EOPNOTSUPP;
542         }
543 #endif
544         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
545         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
546
547         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
548         if (vlan_present) {
549                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
550                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
551         }
552
553         if (!vlan_present || !prio_mask) {
554                 prio_val = UNKNOWN_MATCH_PRIO;
555         } else if (prio_mask != 0x7) {
556                 netdev_warn(priv->netdev,
557                             "masked priority match not supported for hairpin\n");
558                 return -EOPNOTSUPP;
559         }
560
561         *match_prio = prio_val;
562         return 0;
563 }
564
565 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
566                                   struct mlx5e_tc_flow *flow,
567                                   struct mlx5e_tc_flow_parse_attr *parse_attr)
568 {
569         int peer_ifindex = parse_attr->mirred_ifindex;
570         struct mlx5_hairpin_params params;
571         struct mlx5_core_dev *peer_mdev;
572         struct mlx5e_hairpin_entry *hpe;
573         struct mlx5e_hairpin *hp;
574         u64 link_speed64;
575         u32 link_speed;
576         u8 match_prio;
577         u16 peer_id;
578         int err;
579
580         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
581         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
582                 netdev_warn(priv->netdev, "hairpin is not supported\n");
583                 return -EOPNOTSUPP;
584         }
585
586         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
587         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio);
588         if (err)
589                 return err;
590         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
591         if (hpe)
592                 goto attach_flow;
593
594         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
595         if (!hpe)
596                 return -ENOMEM;
597
598         INIT_LIST_HEAD(&hpe->flows);
599         hpe->peer_vhca_id = peer_id;
600         hpe->prio = match_prio;
601
602         params.log_data_size = 15;
603         params.log_data_size = min_t(u8, params.log_data_size,
604                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
605         params.log_data_size = max_t(u8, params.log_data_size,
606                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
607
608         params.log_num_packets = params.log_data_size -
609                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
610         params.log_num_packets = min_t(u8, params.log_num_packets,
611                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
612
613         params.q_counter = priv->q_counter;
614         /* set hairpin pair per each 50Gbs share of the link */
615         mlx5e_get_max_linkspeed(priv->mdev, &link_speed);
616         link_speed = max_t(u32, link_speed, 50000);
617         link_speed64 = link_speed;
618         do_div(link_speed64, 50000);
619         params.num_channels = link_speed64;
620
621         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
622         if (IS_ERR(hp)) {
623                 err = PTR_ERR(hp);
624                 goto create_hairpin_err;
625         }
626
627         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
628                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
629                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
630
631         hpe->hp = hp;
632         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
633                  hash_hairpin_info(peer_id, match_prio));
634
635 attach_flow:
636         if (hpe->hp->num_channels > 1) {
637                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
638                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
639         } else {
640                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
641         }
642         list_add(&flow->hairpin, &hpe->flows);
643
644         return 0;
645
646 create_hairpin_err:
647         kfree(hpe);
648         return err;
649 }
650
651 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
652                                    struct mlx5e_tc_flow *flow)
653 {
654         struct list_head *next = flow->hairpin.next;
655
656         list_del(&flow->hairpin);
657
658         /* no more hairpin flows for us, release the hairpin pair */
659         if (list_empty(next)) {
660                 struct mlx5e_hairpin_entry *hpe;
661
662                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
663
664                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
665                            hpe->hp->pair->peer_mdev->priv.name);
666
667                 mlx5e_hairpin_destroy(hpe->hp);
668                 hash_del(&hpe->hairpin_hlist);
669                 kfree(hpe);
670         }
671 }
672
673 static struct mlx5_flow_handle *
674 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
675                       struct mlx5e_tc_flow_parse_attr *parse_attr,
676                       struct mlx5e_tc_flow *flow)
677 {
678         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
679         struct mlx5_core_dev *dev = priv->mdev;
680         struct mlx5_flow_destination dest[2] = {};
681         struct mlx5_flow_act flow_act = {
682                 .action = attr->action,
683                 .has_flow_tag = true,
684                 .flow_tag = attr->flow_tag,
685                 .encap_id = 0,
686         };
687         struct mlx5_fc *counter = NULL;
688         struct mlx5_flow_handle *rule;
689         bool table_created = false;
690         int err, dest_ix = 0;
691
692         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
693                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr);
694                 if (err) {
695                         rule = ERR_PTR(err);
696                         goto err_add_hairpin_flow;
697                 }
698                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
699                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
700                         dest[dest_ix].ft = attr->hairpin_ft;
701                 } else {
702                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
703                         dest[dest_ix].tir_num = attr->hairpin_tirn;
704                 }
705                 dest_ix++;
706         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
707                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
708                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
709                 dest_ix++;
710         }
711
712         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
713                 counter = mlx5_fc_create(dev, true);
714                 if (IS_ERR(counter)) {
715                         rule = ERR_CAST(counter);
716                         goto err_fc_create;
717                 }
718                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
719                 dest[dest_ix].counter = counter;
720                 dest_ix++;
721         }
722
723         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
724                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
725                 flow_act.modify_id = attr->mod_hdr_id;
726                 kfree(parse_attr->mod_hdr_actions);
727                 if (err) {
728                         rule = ERR_PTR(err);
729                         goto err_create_mod_hdr_id;
730                 }
731         }
732
733         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
734                 int tc_grp_size, tc_tbl_size;
735                 u32 max_flow_counter;
736
737                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
738                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
739
740                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
741
742                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
743                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
744
745                 priv->fs.tc.t =
746                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
747                                                             MLX5E_TC_PRIO,
748                                                             tc_tbl_size,
749                                                             MLX5E_TC_TABLE_NUM_GROUPS,
750                                                             MLX5E_TC_FT_LEVEL, 0);
751                 if (IS_ERR(priv->fs.tc.t)) {
752                         netdev_err(priv->netdev,
753                                    "Failed to create tc offload table\n");
754                         rule = ERR_CAST(priv->fs.tc.t);
755                         goto err_create_ft;
756                 }
757
758                 table_created = true;
759         }
760
761         if (attr->match_level != MLX5_MATCH_NONE)
762                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
763
764         rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
765                                    &flow_act, dest, dest_ix);
766
767         if (IS_ERR(rule))
768                 goto err_add_rule;
769
770         return rule;
771
772 err_add_rule:
773         if (table_created) {
774                 mlx5_destroy_flow_table(priv->fs.tc.t);
775                 priv->fs.tc.t = NULL;
776         }
777 err_create_ft:
778         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
779                 mlx5e_detach_mod_hdr(priv, flow);
780 err_create_mod_hdr_id:
781         mlx5_fc_destroy(dev, counter);
782 err_fc_create:
783         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
784                 mlx5e_hairpin_flow_del(priv, flow);
785 err_add_hairpin_flow:
786         return rule;
787 }
788
789 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
790                                   struct mlx5e_tc_flow *flow)
791 {
792         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
793         struct mlx5_fc *counter = NULL;
794
795         counter = mlx5_flow_rule_counter(flow->rule);
796         mlx5_del_flow_rules(flow->rule);
797         mlx5_fc_destroy(priv->mdev, counter);
798
799         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
800                 mlx5_destroy_flow_table(priv->fs.tc.t);
801                 priv->fs.tc.t = NULL;
802         }
803
804         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
805                 mlx5e_detach_mod_hdr(priv, flow);
806
807         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
808                 mlx5e_hairpin_flow_del(priv, flow);
809 }
810
811 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
812                                struct mlx5e_tc_flow *flow);
813
814 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
815                               struct ip_tunnel_info *tun_info,
816                               struct net_device *mirred_dev,
817                               struct net_device **encap_dev,
818                               struct mlx5e_tc_flow *flow);
819
820 static struct mlx5_flow_handle *
821 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
822                       struct mlx5e_tc_flow_parse_attr *parse_attr,
823                       struct mlx5e_tc_flow *flow)
824 {
825         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
826         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
827         struct net_device *out_dev, *encap_dev = NULL;
828         struct mlx5_flow_handle *rule = NULL;
829         struct mlx5e_rep_priv *rpriv;
830         struct mlx5e_priv *out_priv;
831         int err;
832
833         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
834                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
835                                              attr->parse_attr->mirred_ifindex);
836                 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
837                                          out_dev, &encap_dev, flow);
838                 if (err) {
839                         rule = ERR_PTR(err);
840                         if (err != -EAGAIN)
841                                 goto err_attach_encap;
842                 }
843                 out_priv = netdev_priv(encap_dev);
844                 rpriv = out_priv->ppriv;
845                 attr->out_rep = rpriv->rep;
846                 attr->out_mdev = out_priv->mdev;
847         }
848
849         err = mlx5_eswitch_add_vlan_action(esw, attr);
850         if (err) {
851                 rule = ERR_PTR(err);
852                 goto err_add_vlan;
853         }
854
855         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
856                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
857                 kfree(parse_attr->mod_hdr_actions);
858                 if (err) {
859                         rule = ERR_PTR(err);
860                         goto err_mod_hdr;
861                 }
862         }
863
864         /* we get here if (1) there's no error (rule being null) or when
865          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
866          */
867         if (rule != ERR_PTR(-EAGAIN)) {
868                 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
869                 if (IS_ERR(rule))
870                         goto err_add_rule;
871         }
872         return rule;
873
874 err_add_rule:
875         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
876                 mlx5e_detach_mod_hdr(priv, flow);
877 err_mod_hdr:
878         mlx5_eswitch_del_vlan_action(esw, attr);
879 err_add_vlan:
880         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
881                 mlx5e_detach_encap(priv, flow);
882 err_attach_encap:
883         return rule;
884 }
885
886 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
887                                   struct mlx5e_tc_flow *flow)
888 {
889         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
890         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
891
892         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
893                 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
894                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule, attr);
895         }
896
897         mlx5_eswitch_del_vlan_action(esw, attr);
898
899         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
900                 mlx5e_detach_encap(priv, flow);
901                 kvfree(attr->parse_attr);
902         }
903
904         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
905                 mlx5e_detach_mod_hdr(priv, flow);
906 }
907
908 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
909                               struct mlx5e_encap_entry *e)
910 {
911         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
912         struct mlx5_esw_flow_attr *esw_attr;
913         struct mlx5e_tc_flow *flow;
914         int err;
915
916         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
917                                e->encap_size, e->encap_header,
918                                &e->encap_id);
919         if (err) {
920                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
921                                err);
922                 return;
923         }
924         e->flags |= MLX5_ENCAP_ENTRY_VALID;
925         mlx5e_rep_queue_neigh_stats_work(priv);
926
927         list_for_each_entry(flow, &e->flows, encap) {
928                 esw_attr = flow->esw_attr;
929                 esw_attr->encap_id = e->encap_id;
930                 flow->rule = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
931                 if (IS_ERR(flow->rule)) {
932                         err = PTR_ERR(flow->rule);
933                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
934                                        err);
935                         continue;
936                 }
937                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
938         }
939 }
940
941 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
942                               struct mlx5e_encap_entry *e)
943 {
944         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
945         struct mlx5e_tc_flow *flow;
946
947         list_for_each_entry(flow, &e->flows, encap) {
948                 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
949                         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
950                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule, flow->esw_attr);
951                 }
952         }
953
954         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
955                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
956                 mlx5_encap_dealloc(priv->mdev, e->encap_id);
957         }
958 }
959
960 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
961 {
962         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
963         u64 bytes, packets, lastuse = 0;
964         struct mlx5e_tc_flow *flow;
965         struct mlx5e_encap_entry *e;
966         struct mlx5_fc *counter;
967         struct neigh_table *tbl;
968         bool neigh_used = false;
969         struct neighbour *n;
970
971         if (m_neigh->family == AF_INET)
972                 tbl = &arp_tbl;
973 #if IS_ENABLED(CONFIG_IPV6)
974         else if (m_neigh->family == AF_INET6)
975                 tbl = &nd_tbl;
976 #endif
977         else
978                 return;
979
980         list_for_each_entry(e, &nhe->encap_list, encap_list) {
981                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
982                         continue;
983                 list_for_each_entry(flow, &e->flows, encap) {
984                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
985                                 counter = mlx5_flow_rule_counter(flow->rule);
986                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
987                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
988                                         neigh_used = true;
989                                         break;
990                                 }
991                         }
992                 }
993                 if (neigh_used)
994                         break;
995         }
996
997         if (neigh_used) {
998                 nhe->reported_lastuse = jiffies;
999
1000                 /* find the relevant neigh according to the cached device and
1001                  * dst ip pair
1002                  */
1003                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1004                 if (!n) {
1005                         WARN(1, "The neighbour already freed\n");
1006                         return;
1007                 }
1008
1009                 neigh_event_send(n, NULL);
1010                 neigh_release(n);
1011         }
1012 }
1013
1014 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1015                                struct mlx5e_tc_flow *flow)
1016 {
1017         struct list_head *next = flow->encap.next;
1018
1019         list_del(&flow->encap);
1020         if (list_empty(next)) {
1021                 struct mlx5e_encap_entry *e;
1022
1023                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1024                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1025
1026                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1027                         mlx5_encap_dealloc(priv->mdev, e->encap_id);
1028
1029                 hash_del_rcu(&e->encap_hlist);
1030                 kfree(e->encap_header);
1031                 kfree(e);
1032         }
1033 }
1034
1035 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1036                               struct mlx5e_tc_flow *flow)
1037 {
1038         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1039                 mlx5e_tc_del_fdb_flow(priv, flow);
1040         else
1041                 mlx5e_tc_del_nic_flow(priv, flow);
1042 }
1043
1044 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1045                              struct tc_cls_flower_offload *f)
1046 {
1047         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1048                                        outer_headers);
1049         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1050                                        outer_headers);
1051         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1052                                     misc_parameters);
1053         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1054                                     misc_parameters);
1055
1056         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1057         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1058
1059         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1060                 struct flow_dissector_key_keyid *key =
1061                         skb_flow_dissector_target(f->dissector,
1062                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1063                                                   f->key);
1064                 struct flow_dissector_key_keyid *mask =
1065                         skb_flow_dissector_target(f->dissector,
1066                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1067                                                   f->mask);
1068                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1069                          be32_to_cpu(mask->keyid));
1070                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1071                          be32_to_cpu(key->keyid));
1072         }
1073 }
1074
1075 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1076                              struct mlx5_flow_spec *spec,
1077                              struct tc_cls_flower_offload *f)
1078 {
1079         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1080                                        outer_headers);
1081         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1082                                        outer_headers);
1083
1084         struct flow_dissector_key_control *enc_control =
1085                 skb_flow_dissector_target(f->dissector,
1086                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1087                                           f->key);
1088
1089         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1090                 struct flow_dissector_key_ports *key =
1091                         skb_flow_dissector_target(f->dissector,
1092                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1093                                                   f->key);
1094                 struct flow_dissector_key_ports *mask =
1095                         skb_flow_dissector_target(f->dissector,
1096                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1097                                                   f->mask);
1098                 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1099                 struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1100                 struct net_device *up_dev = uplink_rpriv->netdev;
1101                 struct mlx5e_priv *up_priv = netdev_priv(up_dev);
1102
1103                 /* Full udp dst port must be given */
1104                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1105                         goto vxlan_match_offload_err;
1106
1107                 if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->dst)) &&
1108                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1109                         parse_vxlan_attr(spec, f);
1110                 else {
1111                         netdev_warn(priv->netdev,
1112                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1113                         return -EOPNOTSUPP;
1114                 }
1115
1116                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1117                          udp_dport, ntohs(mask->dst));
1118                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1119                          udp_dport, ntohs(key->dst));
1120
1121                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1122                          udp_sport, ntohs(mask->src));
1123                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1124                          udp_sport, ntohs(key->src));
1125         } else { /* udp dst port must be given */
1126 vxlan_match_offload_err:
1127                 netdev_warn(priv->netdev,
1128                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1129                 return -EOPNOTSUPP;
1130         }
1131
1132         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1133                 struct flow_dissector_key_ipv4_addrs *key =
1134                         skb_flow_dissector_target(f->dissector,
1135                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1136                                                   f->key);
1137                 struct flow_dissector_key_ipv4_addrs *mask =
1138                         skb_flow_dissector_target(f->dissector,
1139                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1140                                                   f->mask);
1141                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1142                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1143                          ntohl(mask->src));
1144                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1145                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1146                          ntohl(key->src));
1147
1148                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1149                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1150                          ntohl(mask->dst));
1151                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1152                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1153                          ntohl(key->dst));
1154
1155                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1156                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1157         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1158                 struct flow_dissector_key_ipv6_addrs *key =
1159                         skb_flow_dissector_target(f->dissector,
1160                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1161                                                   f->key);
1162                 struct flow_dissector_key_ipv6_addrs *mask =
1163                         skb_flow_dissector_target(f->dissector,
1164                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1165                                                   f->mask);
1166
1167                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1168                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1169                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1170                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1171                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1172                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1173
1174                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1175                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1176                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1177                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1178                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1179                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1180
1181                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1182                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1183         }
1184
1185         /* Enforce DMAC when offloading incoming tunneled flows.
1186          * Flow counters require a match on the DMAC.
1187          */
1188         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1189         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1190         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1191                                      dmac_47_16), priv->netdev->dev_addr);
1192
1193         /* let software handle IP fragments */
1194         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1195         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1196
1197         return 0;
1198 }
1199
1200 static int __parse_cls_flower(struct mlx5e_priv *priv,
1201                               struct mlx5_flow_spec *spec,
1202                               struct tc_cls_flower_offload *f,
1203                               u8 *match_level)
1204 {
1205         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1206                                        outer_headers);
1207         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1208                                        outer_headers);
1209         u16 addr_type = 0;
1210         u8 ip_proto = 0;
1211
1212         *match_level = MLX5_MATCH_NONE;
1213
1214         if (f->dissector->used_keys &
1215             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1216               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1217               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1218               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1219               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1220               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1221               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1222               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1223               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1224               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1225               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1226               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1227               BIT(FLOW_DISSECTOR_KEY_TCP) |
1228               BIT(FLOW_DISSECTOR_KEY_IP))) {
1229                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1230                             f->dissector->used_keys);
1231                 return -EOPNOTSUPP;
1232         }
1233
1234         if ((dissector_uses_key(f->dissector,
1235                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1236              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1237              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1238             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1239                 struct flow_dissector_key_control *key =
1240                         skb_flow_dissector_target(f->dissector,
1241                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1242                                                   f->key);
1243                 switch (key->addr_type) {
1244                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1245                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1246                         if (parse_tunnel_attr(priv, spec, f))
1247                                 return -EOPNOTSUPP;
1248                         break;
1249                 default:
1250                         return -EOPNOTSUPP;
1251                 }
1252
1253                 /* In decap flow, header pointers should point to the inner
1254                  * headers, outer header were already set by parse_tunnel_attr
1255                  */
1256                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1257                                          inner_headers);
1258                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1259                                          inner_headers);
1260         }
1261
1262         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1263                 struct flow_dissector_key_eth_addrs *key =
1264                         skb_flow_dissector_target(f->dissector,
1265                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1266                                                   f->key);
1267                 struct flow_dissector_key_eth_addrs *mask =
1268                         skb_flow_dissector_target(f->dissector,
1269                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1270                                                   f->mask);
1271
1272                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1273                                              dmac_47_16),
1274                                 mask->dst);
1275                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1276                                              dmac_47_16),
1277                                 key->dst);
1278
1279                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1280                                              smac_47_16),
1281                                 mask->src);
1282                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1283                                              smac_47_16),
1284                                 key->src);
1285
1286                 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1287                         *match_level = MLX5_MATCH_L2;
1288         }
1289
1290         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1291                 struct flow_dissector_key_vlan *key =
1292                         skb_flow_dissector_target(f->dissector,
1293                                                   FLOW_DISSECTOR_KEY_VLAN,
1294                                                   f->key);
1295                 struct flow_dissector_key_vlan *mask =
1296                         skb_flow_dissector_target(f->dissector,
1297                                                   FLOW_DISSECTOR_KEY_VLAN,
1298                                                   f->mask);
1299                 if (mask->vlan_id || mask->vlan_priority) {
1300                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1301                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
1302
1303                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1304                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1305
1306                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1307                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1308
1309                         *match_level = MLX5_MATCH_L2;
1310                 }
1311         }
1312
1313         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1314                 struct flow_dissector_key_basic *key =
1315                         skb_flow_dissector_target(f->dissector,
1316                                                   FLOW_DISSECTOR_KEY_BASIC,
1317                                                   f->key);
1318                 struct flow_dissector_key_basic *mask =
1319                         skb_flow_dissector_target(f->dissector,
1320                                                   FLOW_DISSECTOR_KEY_BASIC,
1321                                                   f->mask);
1322                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1323                          ntohs(mask->n_proto));
1324                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1325                          ntohs(key->n_proto));
1326
1327                 if (mask->n_proto)
1328                         *match_level = MLX5_MATCH_L2;
1329         }
1330
1331         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1332                 struct flow_dissector_key_control *key =
1333                         skb_flow_dissector_target(f->dissector,
1334                                                   FLOW_DISSECTOR_KEY_CONTROL,
1335                                                   f->key);
1336
1337                 struct flow_dissector_key_control *mask =
1338                         skb_flow_dissector_target(f->dissector,
1339                                                   FLOW_DISSECTOR_KEY_CONTROL,
1340                                                   f->mask);
1341                 addr_type = key->addr_type;
1342
1343                 /* the HW doesn't support frag first/later */
1344                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1345                         return -EOPNOTSUPP;
1346
1347                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1348                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1349                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1350                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1351
1352                         /* the HW doesn't need L3 inline to match on frag=no */
1353                         if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1354                                 *match_level = MLX5_INLINE_MODE_L2;
1355         /* ***  L2 attributes parsing up to here *** */
1356                         else
1357                                 *match_level = MLX5_INLINE_MODE_IP;
1358                 }
1359         }
1360
1361         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1362                 struct flow_dissector_key_basic *key =
1363                         skb_flow_dissector_target(f->dissector,
1364                                                   FLOW_DISSECTOR_KEY_BASIC,
1365                                                   f->key);
1366                 struct flow_dissector_key_basic *mask =
1367                         skb_flow_dissector_target(f->dissector,
1368                                                   FLOW_DISSECTOR_KEY_BASIC,
1369                                                   f->mask);
1370                 ip_proto = key->ip_proto;
1371
1372                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1373                          mask->ip_proto);
1374                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1375                          key->ip_proto);
1376
1377                 if (mask->ip_proto)
1378                         *match_level = MLX5_MATCH_L3;
1379         }
1380
1381         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1382                 struct flow_dissector_key_ipv4_addrs *key =
1383                         skb_flow_dissector_target(f->dissector,
1384                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1385                                                   f->key);
1386                 struct flow_dissector_key_ipv4_addrs *mask =
1387                         skb_flow_dissector_target(f->dissector,
1388                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1389                                                   f->mask);
1390
1391                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1392                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1393                        &mask->src, sizeof(mask->src));
1394                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1395                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1396                        &key->src, sizeof(key->src));
1397                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1398                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1399                        &mask->dst, sizeof(mask->dst));
1400                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1401                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1402                        &key->dst, sizeof(key->dst));
1403
1404                 if (mask->src || mask->dst)
1405                         *match_level = MLX5_MATCH_L3;
1406         }
1407
1408         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1409                 struct flow_dissector_key_ipv6_addrs *key =
1410                         skb_flow_dissector_target(f->dissector,
1411                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1412                                                   f->key);
1413                 struct flow_dissector_key_ipv6_addrs *mask =
1414                         skb_flow_dissector_target(f->dissector,
1415                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1416                                                   f->mask);
1417
1418                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1419                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1420                        &mask->src, sizeof(mask->src));
1421                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1422                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1423                        &key->src, sizeof(key->src));
1424
1425                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1426                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1427                        &mask->dst, sizeof(mask->dst));
1428                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1429                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1430                        &key->dst, sizeof(key->dst));
1431
1432                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1433                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1434                         *match_level = MLX5_MATCH_L3;
1435         }
1436
1437         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1438                 struct flow_dissector_key_ip *key =
1439                         skb_flow_dissector_target(f->dissector,
1440                                                   FLOW_DISSECTOR_KEY_IP,
1441                                                   f->key);
1442                 struct flow_dissector_key_ip *mask =
1443                         skb_flow_dissector_target(f->dissector,
1444                                                   FLOW_DISSECTOR_KEY_IP,
1445                                                   f->mask);
1446
1447                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1448                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1449
1450                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1451                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1452
1453                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1454                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1455
1456                 if (mask->ttl &&
1457                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1458                                                 ft_field_support.outer_ipv4_ttl))
1459                         return -EOPNOTSUPP;
1460
1461                 if (mask->tos || mask->ttl)
1462                         *match_level = MLX5_MATCH_L3;
1463         }
1464
1465         /* ***  L3 attributes parsing up to here *** */
1466
1467         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1468                 struct flow_dissector_key_ports *key =
1469                         skb_flow_dissector_target(f->dissector,
1470                                                   FLOW_DISSECTOR_KEY_PORTS,
1471                                                   f->key);
1472                 struct flow_dissector_key_ports *mask =
1473                         skb_flow_dissector_target(f->dissector,
1474                                                   FLOW_DISSECTOR_KEY_PORTS,
1475                                                   f->mask);
1476                 switch (ip_proto) {
1477                 case IPPROTO_TCP:
1478                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1479                                  tcp_sport, ntohs(mask->src));
1480                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1481                                  tcp_sport, ntohs(key->src));
1482
1483                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1484                                  tcp_dport, ntohs(mask->dst));
1485                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1486                                  tcp_dport, ntohs(key->dst));
1487                         break;
1488
1489                 case IPPROTO_UDP:
1490                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1491                                  udp_sport, ntohs(mask->src));
1492                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1493                                  udp_sport, ntohs(key->src));
1494
1495                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1496                                  udp_dport, ntohs(mask->dst));
1497                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1498                                  udp_dport, ntohs(key->dst));
1499                         break;
1500                 default:
1501                         netdev_err(priv->netdev,
1502                                    "Only UDP and TCP transport are supported\n");
1503                         return -EINVAL;
1504                 }
1505
1506                 if (mask->src || mask->dst)
1507                         *match_level = MLX5_MATCH_L4;
1508         }
1509
1510         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1511                 struct flow_dissector_key_tcp *key =
1512                         skb_flow_dissector_target(f->dissector,
1513                                                   FLOW_DISSECTOR_KEY_TCP,
1514                                                   f->key);
1515                 struct flow_dissector_key_tcp *mask =
1516                         skb_flow_dissector_target(f->dissector,
1517                                                   FLOW_DISSECTOR_KEY_TCP,
1518                                                   f->mask);
1519
1520                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1521                          ntohs(mask->flags));
1522                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1523                          ntohs(key->flags));
1524
1525                 if (mask->flags)
1526                         *match_level = MLX5_MATCH_L4;
1527         }
1528
1529         return 0;
1530 }
1531
1532 static int parse_cls_flower(struct mlx5e_priv *priv,
1533                             struct mlx5e_tc_flow *flow,
1534                             struct mlx5_flow_spec *spec,
1535                             struct tc_cls_flower_offload *f)
1536 {
1537         struct mlx5_core_dev *dev = priv->mdev;
1538         struct mlx5_eswitch *esw = dev->priv.eswitch;
1539         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1540         struct mlx5_eswitch_rep *rep;
1541         u8 match_level;
1542         int err;
1543
1544         err = __parse_cls_flower(priv, spec, f, &match_level);
1545
1546         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1547                 rep = rpriv->rep;
1548                 if (rep->vport != FDB_UPLINK_VPORT &&
1549                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1550                     esw->offloads.inline_mode < match_level)) {
1551                         netdev_warn(priv->netdev,
1552                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1553                                     match_level, esw->offloads.inline_mode);
1554                         return -EOPNOTSUPP;
1555                 }
1556         }
1557
1558         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1559                 flow->esw_attr->match_level = match_level;
1560         else
1561                 flow->nic_attr->match_level = match_level;
1562
1563         return err;
1564 }
1565
1566 struct pedit_headers {
1567         struct ethhdr  eth;
1568         struct iphdr   ip4;
1569         struct ipv6hdr ip6;
1570         struct tcphdr  tcp;
1571         struct udphdr  udp;
1572 };
1573
1574 static int pedit_header_offsets[] = {
1575         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1576         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1577         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1578         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1579         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1580 };
1581
1582 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1583
1584 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1585                          struct pedit_headers *masks,
1586                          struct pedit_headers *vals)
1587 {
1588         u32 *curr_pmask, *curr_pval;
1589
1590         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1591                 goto out_err;
1592
1593         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1594         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1595
1596         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1597                 goto out_err;
1598
1599         *curr_pmask |= mask;
1600         *curr_pval  |= (val & mask);
1601
1602         return 0;
1603
1604 out_err:
1605         return -EOPNOTSUPP;
1606 }
1607
1608 struct mlx5_fields {
1609         u8  field;
1610         u8  size;
1611         u32 offset;
1612 };
1613
1614 #define OFFLOAD(fw_field, size, field, off) \
1615                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1616
1617 static struct mlx5_fields fields[] = {
1618         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1619         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1620         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1621         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1622         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1623
1624         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1625         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1626         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1627
1628         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1629         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1630         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1631         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1632         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1633         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1634         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1635         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1636         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1637
1638         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1639         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1640         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1641
1642         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1643         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1644 };
1645
1646 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1647  * max from the SW pedit action. On success, it says how many HW actions were
1648  * actually parsed.
1649  */
1650 static int offload_pedit_fields(struct pedit_headers *masks,
1651                                 struct pedit_headers *vals,
1652                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
1653 {
1654         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1655         int i, action_size, nactions, max_actions, first, last, next_z;
1656         void *s_masks_p, *a_masks_p, *vals_p;
1657         struct mlx5_fields *f;
1658         u8 cmd, field_bsize;
1659         u32 s_mask, a_mask;
1660         unsigned long mask;
1661         __be32 mask_be32;
1662         __be16 mask_be16;
1663         void *action;
1664
1665         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1666         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1667         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1668         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1669
1670         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1671         action = parse_attr->mod_hdr_actions;
1672         max_actions = parse_attr->num_mod_hdr_actions;
1673         nactions = 0;
1674
1675         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1676                 f = &fields[i];
1677                 /* avoid seeing bits set from previous iterations */
1678                 s_mask = 0;
1679                 a_mask = 0;
1680
1681                 s_masks_p = (void *)set_masks + f->offset;
1682                 a_masks_p = (void *)add_masks + f->offset;
1683
1684                 memcpy(&s_mask, s_masks_p, f->size);
1685                 memcpy(&a_mask, a_masks_p, f->size);
1686
1687                 if (!s_mask && !a_mask) /* nothing to offload here */
1688                         continue;
1689
1690                 if (s_mask && a_mask) {
1691                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1692                         return -EOPNOTSUPP;
1693                 }
1694
1695                 if (nactions == max_actions) {
1696                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1697                         return -EOPNOTSUPP;
1698                 }
1699
1700                 if (s_mask) {
1701                         cmd  = MLX5_ACTION_TYPE_SET;
1702                         mask = s_mask;
1703                         vals_p = (void *)set_vals + f->offset;
1704                         /* clear to denote we consumed this field */
1705                         memset(s_masks_p, 0, f->size);
1706                 } else {
1707                         cmd  = MLX5_ACTION_TYPE_ADD;
1708                         mask = a_mask;
1709                         vals_p = (void *)add_vals + f->offset;
1710                         /* clear to denote we consumed this field */
1711                         memset(a_masks_p, 0, f->size);
1712                 }
1713
1714                 field_bsize = f->size * BITS_PER_BYTE;
1715
1716                 if (field_bsize == 32) {
1717                         mask_be32 = *(__be32 *)&mask;
1718                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1719                 } else if (field_bsize == 16) {
1720                         mask_be16 = *(__be16 *)&mask;
1721                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1722                 }
1723
1724                 first = find_first_bit(&mask, field_bsize);
1725                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1726                 last  = find_last_bit(&mask, field_bsize);
1727                 if (first < next_z && next_z < last) {
1728                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1729                                mask);
1730                         return -EOPNOTSUPP;
1731                 }
1732
1733                 MLX5_SET(set_action_in, action, action_type, cmd);
1734                 MLX5_SET(set_action_in, action, field, f->field);
1735
1736                 if (cmd == MLX5_ACTION_TYPE_SET) {
1737                         MLX5_SET(set_action_in, action, offset, first);
1738                         /* length is num of bits to be written, zero means length of 32 */
1739                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1740                 }
1741
1742                 if (field_bsize == 32)
1743                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1744                 else if (field_bsize == 16)
1745                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1746                 else if (field_bsize == 8)
1747                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1748
1749                 action += action_size;
1750                 nactions++;
1751         }
1752
1753         parse_attr->num_mod_hdr_actions = nactions;
1754         return 0;
1755 }
1756
1757 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1758                                  const struct tc_action *a, int namespace,
1759                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1760 {
1761         int nkeys, action_size, max_actions;
1762
1763         nkeys = tcf_pedit_nkeys(a);
1764         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1765
1766         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1767                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1768         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1769                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1770
1771         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1772         max_actions = min(max_actions, nkeys * 16);
1773
1774         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1775         if (!parse_attr->mod_hdr_actions)
1776                 return -ENOMEM;
1777
1778         parse_attr->num_mod_hdr_actions = max_actions;
1779         return 0;
1780 }
1781
1782 static const struct pedit_headers zero_masks = {};
1783
1784 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1785                                  const struct tc_action *a, int namespace,
1786                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1787 {
1788         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1789         int nkeys, i, err = -EOPNOTSUPP;
1790         u32 mask, val, offset;
1791         u8 cmd, htype;
1792
1793         nkeys = tcf_pedit_nkeys(a);
1794
1795         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1796         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1797
1798         for (i = 0; i < nkeys; i++) {
1799                 htype = tcf_pedit_htype(a, i);
1800                 cmd = tcf_pedit_cmd(a, i);
1801                 err = -EOPNOTSUPP; /* can't be all optimistic */
1802
1803                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1804                         netdev_warn(priv->netdev, "legacy pedit isn't offloaded\n");
1805                         goto out_err;
1806                 }
1807
1808                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1809                         netdev_warn(priv->netdev, "pedit cmd %d isn't offloaded\n", cmd);
1810                         goto out_err;
1811                 }
1812
1813                 mask = tcf_pedit_mask(a, i);
1814                 val = tcf_pedit_val(a, i);
1815                 offset = tcf_pedit_offset(a, i);
1816
1817                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1818                 if (err)
1819                         goto out_err;
1820         }
1821
1822         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1823         if (err)
1824                 goto out_err;
1825
1826         err = offload_pedit_fields(masks, vals, parse_attr);
1827         if (err < 0)
1828                 goto out_dealloc_parsed_actions;
1829
1830         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1831                 cmd_masks = &masks[cmd];
1832                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1833                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
1834                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1835                                        16, 1, cmd_masks, sizeof(zero_masks), true);
1836                         err = -EOPNOTSUPP;
1837                         goto out_dealloc_parsed_actions;
1838                 }
1839         }
1840
1841         return 0;
1842
1843 out_dealloc_parsed_actions:
1844         kfree(parse_attr->mod_hdr_actions);
1845 out_err:
1846         return err;
1847 }
1848
1849 static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags)
1850 {
1851         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1852                          TCA_CSUM_UPDATE_FLAG_UDP;
1853
1854         /*  The HW recalcs checksums only if re-writing headers */
1855         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1856                 netdev_warn(priv->netdev,
1857                             "TC csum action is only offloaded with pedit\n");
1858                 return false;
1859         }
1860
1861         if (update_flags & ~prot_flags) {
1862                 netdev_warn(priv->netdev,
1863                             "can't offload TC csum action for some header/s - flags %#x\n",
1864                             update_flags);
1865                 return false;
1866         }
1867
1868         return true;
1869 }
1870
1871 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
1872                                           struct tcf_exts *exts)
1873 {
1874         const struct tc_action *a;
1875         bool modify_ip_header;
1876         LIST_HEAD(actions);
1877         u8 htype, ip_proto;
1878         void *headers_v;
1879         u16 ethertype;
1880         int nkeys, i;
1881
1882         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1883         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1884
1885         /* for non-IP we only re-write MACs, so we're okay */
1886         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
1887                 goto out_ok;
1888
1889         modify_ip_header = false;
1890         tcf_exts_to_list(exts, &actions);
1891         list_for_each_entry(a, &actions, list) {
1892                 if (!is_tcf_pedit(a))
1893                         continue;
1894
1895                 nkeys = tcf_pedit_nkeys(a);
1896                 for (i = 0; i < nkeys; i++) {
1897                         htype = tcf_pedit_htype(a, i);
1898                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
1899                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
1900                                 modify_ip_header = true;
1901                                 break;
1902                         }
1903                 }
1904         }
1905
1906         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
1907         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
1908             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
1909                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
1910                 return false;
1911         }
1912
1913 out_ok:
1914         return true;
1915 }
1916
1917 static bool actions_match_supported(struct mlx5e_priv *priv,
1918                                     struct tcf_exts *exts,
1919                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
1920                                     struct mlx5e_tc_flow *flow)
1921 {
1922         u32 actions;
1923
1924         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1925                 actions = flow->esw_attr->action;
1926         else
1927                 actions = flow->nic_attr->action;
1928
1929         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1930                 return modify_header_match_supported(&parse_attr->spec, exts);
1931
1932         return true;
1933 }
1934
1935 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
1936 {
1937         struct mlx5_core_dev *fmdev, *pmdev;
1938         u16 func_id, peer_id;
1939
1940         fmdev = priv->mdev;
1941         pmdev = peer_priv->mdev;
1942
1943         func_id = (u16)((fmdev->pdev->bus->number << 8) | PCI_SLOT(fmdev->pdev->devfn));
1944         peer_id = (u16)((pmdev->pdev->bus->number << 8) | PCI_SLOT(pmdev->pdev->devfn));
1945
1946         return (func_id == peer_id);
1947 }
1948
1949 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
1950                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
1951                                 struct mlx5e_tc_flow *flow)
1952 {
1953         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
1954         const struct tc_action *a;
1955         LIST_HEAD(actions);
1956         u32 action = 0;
1957         int err;
1958
1959         if (!tcf_exts_has_actions(exts))
1960                 return -EINVAL;
1961
1962         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
1963
1964         tcf_exts_to_list(exts, &actions);
1965         list_for_each_entry(a, &actions, list) {
1966                 if (is_tcf_gact_shot(a)) {
1967                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
1968                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
1969                                                flow_table_properties_nic_receive.flow_counter))
1970                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
1971                         continue;
1972                 }
1973
1974                 if (is_tcf_pedit(a)) {
1975                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
1976                                                     parse_attr);
1977                         if (err)
1978                                 return err;
1979
1980                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
1981                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1982                         continue;
1983                 }
1984
1985                 if (is_tcf_csum(a)) {
1986                         if (csum_offload_supported(priv, action,
1987                                                    tcf_csum_update_flags(a)))
1988                                 continue;
1989
1990                         return -EOPNOTSUPP;
1991                 }
1992
1993                 if (is_tcf_mirred_egress_redirect(a)) {
1994                         struct net_device *peer_dev = tcf_mirred_dev(a);
1995
1996                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
1997                             same_hw_devs(priv, netdev_priv(peer_dev))) {
1998                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
1999                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2000                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2001                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2002                         } else {
2003                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2004                                             peer_dev->name);
2005                                 return -EINVAL;
2006                         }
2007                         continue;
2008                 }
2009
2010                 if (is_tcf_skbedit_mark(a)) {
2011                         u32 mark = tcf_skbedit_mark(a);
2012
2013                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2014                                 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
2015                                             mark);
2016                                 return -EINVAL;
2017                         }
2018
2019                         attr->flow_tag = mark;
2020                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2021                         continue;
2022                 }
2023
2024                 return -EINVAL;
2025         }
2026
2027         attr->action = action;
2028         if (!actions_match_supported(priv, exts, parse_attr, flow))
2029                 return -EOPNOTSUPP;
2030
2031         return 0;
2032 }
2033
2034 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2035                                  struct ip_tunnel_key *b)
2036 {
2037         return memcmp(a, b, sizeof(*a));
2038 }
2039
2040 static inline int hash_encap_info(struct ip_tunnel_key *key)
2041 {
2042         return jhash(key, sizeof(*key), 0);
2043 }
2044
2045 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2046                                    struct net_device *mirred_dev,
2047                                    struct net_device **out_dev,
2048                                    struct flowi4 *fl4,
2049                                    struct neighbour **out_n,
2050                                    int *out_ttl)
2051 {
2052         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2053         struct mlx5e_rep_priv *uplink_rpriv;
2054         struct rtable *rt;
2055         struct neighbour *n = NULL;
2056
2057 #if IS_ENABLED(CONFIG_INET)
2058         int ret;
2059
2060         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2061         ret = PTR_ERR_OR_ZERO(rt);
2062         if (ret)
2063                 return ret;
2064 #else
2065         return -EOPNOTSUPP;
2066 #endif
2067         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2068         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2069         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2070                 *out_dev = uplink_rpriv->netdev;
2071         else
2072                 *out_dev = rt->dst.dev;
2073
2074         *out_ttl = ip4_dst_hoplimit(&rt->dst);
2075         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2076         ip_rt_put(rt);
2077         if (!n)
2078                 return -ENOMEM;
2079
2080         *out_n = n;
2081         return 0;
2082 }
2083
2084 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2085                                   struct net_device *peer_netdev)
2086 {
2087         struct mlx5e_priv *peer_priv;
2088
2089         peer_priv = netdev_priv(peer_netdev);
2090
2091         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2092                 (priv->netdev->netdev_ops == peer_netdev->netdev_ops) &&
2093                 same_hw_devs(priv, peer_priv) &&
2094                 MLX5_VPORT_MANAGER(peer_priv->mdev) &&
2095                 (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS));
2096 }
2097
2098 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2099                                    struct net_device *mirred_dev,
2100                                    struct net_device **out_dev,
2101                                    struct flowi6 *fl6,
2102                                    struct neighbour **out_n,
2103                                    int *out_ttl)
2104 {
2105         struct neighbour *n = NULL;
2106         struct dst_entry *dst;
2107
2108 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2109         struct mlx5e_rep_priv *uplink_rpriv;
2110         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2111         int ret;
2112
2113         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2114                                          fl6);
2115         if (ret < 0)
2116                 return ret;
2117
2118         *out_ttl = ip6_dst_hoplimit(dst);
2119
2120         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2121         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2122         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2123                 *out_dev = uplink_rpriv->netdev;
2124         else
2125                 *out_dev = dst->dev;
2126 #else
2127         return -EOPNOTSUPP;
2128 #endif
2129
2130         n = dst_neigh_lookup(dst, &fl6->daddr);
2131         dst_release(dst);
2132         if (!n)
2133                 return -ENOMEM;
2134
2135         *out_n = n;
2136         return 0;
2137 }
2138
2139 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2140                                   char buf[], int encap_size,
2141                                   unsigned char h_dest[ETH_ALEN],
2142                                   int ttl,
2143                                   __be32 daddr,
2144                                   __be32 saddr,
2145                                   __be16 udp_dst_port,
2146                                   __be32 vx_vni)
2147 {
2148         struct ethhdr *eth = (struct ethhdr *)buf;
2149         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2150         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2151         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2152
2153         memset(buf, 0, encap_size);
2154
2155         ether_addr_copy(eth->h_dest, h_dest);
2156         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2157         eth->h_proto = htons(ETH_P_IP);
2158
2159         ip->daddr = daddr;
2160         ip->saddr = saddr;
2161
2162         ip->ttl = ttl;
2163         ip->protocol = IPPROTO_UDP;
2164         ip->version = 0x4;
2165         ip->ihl = 0x5;
2166
2167         udp->dest = udp_dst_port;
2168         vxh->vx_flags = VXLAN_HF_VNI;
2169         vxh->vx_vni = vxlan_vni_field(vx_vni);
2170 }
2171
2172 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2173                                   char buf[], int encap_size,
2174                                   unsigned char h_dest[ETH_ALEN],
2175                                   int ttl,
2176                                   struct in6_addr *daddr,
2177                                   struct in6_addr *saddr,
2178                                   __be16 udp_dst_port,
2179                                   __be32 vx_vni)
2180 {
2181         struct ethhdr *eth = (struct ethhdr *)buf;
2182         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2183         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2184         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2185
2186         memset(buf, 0, encap_size);
2187
2188         ether_addr_copy(eth->h_dest, h_dest);
2189         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2190         eth->h_proto = htons(ETH_P_IPV6);
2191
2192         ip6_flow_hdr(ip6h, 0, 0);
2193         /* the HW fills up ipv6 payload len */
2194         ip6h->nexthdr     = IPPROTO_UDP;
2195         ip6h->hop_limit   = ttl;
2196         ip6h->daddr       = *daddr;
2197         ip6h->saddr       = *saddr;
2198
2199         udp->dest = udp_dst_port;
2200         vxh->vx_flags = VXLAN_HF_VNI;
2201         vxh->vx_vni = vxlan_vni_field(vx_vni);
2202 }
2203
2204 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2205                                           struct net_device *mirred_dev,
2206                                           struct mlx5e_encap_entry *e)
2207 {
2208         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2209         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2210         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2211         struct net_device *out_dev;
2212         struct neighbour *n = NULL;
2213         struct flowi4 fl4 = {};
2214         char *encap_header;
2215         int ttl, err;
2216         u8 nud_state;
2217
2218         if (max_encap_size < ipv4_encap_size) {
2219                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2220                                ipv4_encap_size, max_encap_size);
2221                 return -EOPNOTSUPP;
2222         }
2223
2224         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2225         if (!encap_header)
2226                 return -ENOMEM;
2227
2228         switch (e->tunnel_type) {
2229         case MLX5_HEADER_TYPE_VXLAN:
2230                 fl4.flowi4_proto = IPPROTO_UDP;
2231                 fl4.fl4_dport = tun_key->tp_dst;
2232                 break;
2233         default:
2234                 err = -EOPNOTSUPP;
2235                 goto free_encap;
2236         }
2237         fl4.flowi4_tos = tun_key->tos;
2238         fl4.daddr = tun_key->u.ipv4.dst;
2239         fl4.saddr = tun_key->u.ipv4.src;
2240
2241         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2242                                       &fl4, &n, &ttl);
2243         if (err)
2244                 goto free_encap;
2245
2246         /* used by mlx5e_detach_encap to lookup a neigh hash table
2247          * entry in the neigh hash table when a user deletes a rule
2248          */
2249         e->m_neigh.dev = n->dev;
2250         e->m_neigh.family = n->ops->family;
2251         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2252         e->out_dev = out_dev;
2253
2254         /* It's importent to add the neigh to the hash table before checking
2255          * the neigh validity state. So if we'll get a notification, in case the
2256          * neigh changes it's validity state, we would find the relevant neigh
2257          * in the hash.
2258          */
2259         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2260         if (err)
2261                 goto free_encap;
2262
2263         read_lock_bh(&n->lock);
2264         nud_state = n->nud_state;
2265         ether_addr_copy(e->h_dest, n->ha);
2266         read_unlock_bh(&n->lock);
2267
2268         switch (e->tunnel_type) {
2269         case MLX5_HEADER_TYPE_VXLAN:
2270                 gen_vxlan_header_ipv4(out_dev, encap_header,
2271                                       ipv4_encap_size, e->h_dest, ttl,
2272                                       fl4.daddr,
2273                                       fl4.saddr, tun_key->tp_dst,
2274                                       tunnel_id_to_key32(tun_key->tun_id));
2275                 break;
2276         default:
2277                 err = -EOPNOTSUPP;
2278                 goto destroy_neigh_entry;
2279         }
2280         e->encap_size = ipv4_encap_size;
2281         e->encap_header = encap_header;
2282
2283         if (!(nud_state & NUD_VALID)) {
2284                 neigh_event_send(n, NULL);
2285                 err = -EAGAIN;
2286                 goto out;
2287         }
2288
2289         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2290                                ipv4_encap_size, encap_header, &e->encap_id);
2291         if (err)
2292                 goto destroy_neigh_entry;
2293
2294         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2295         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2296         neigh_release(n);
2297         return err;
2298
2299 destroy_neigh_entry:
2300         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2301 free_encap:
2302         kfree(encap_header);
2303 out:
2304         if (n)
2305                 neigh_release(n);
2306         return err;
2307 }
2308
2309 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2310                                           struct net_device *mirred_dev,
2311                                           struct mlx5e_encap_entry *e)
2312 {
2313         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2314         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2315         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2316         struct net_device *out_dev;
2317         struct neighbour *n = NULL;
2318         struct flowi6 fl6 = {};
2319         char *encap_header;
2320         int err, ttl = 0;
2321         u8 nud_state;
2322
2323         if (max_encap_size < ipv6_encap_size) {
2324                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2325                                ipv6_encap_size, max_encap_size);
2326                 return -EOPNOTSUPP;
2327         }
2328
2329         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2330         if (!encap_header)
2331                 return -ENOMEM;
2332
2333         switch (e->tunnel_type) {
2334         case MLX5_HEADER_TYPE_VXLAN:
2335                 fl6.flowi6_proto = IPPROTO_UDP;
2336                 fl6.fl6_dport = tun_key->tp_dst;
2337                 break;
2338         default:
2339                 err = -EOPNOTSUPP;
2340                 goto free_encap;
2341         }
2342
2343         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2344         fl6.daddr = tun_key->u.ipv6.dst;
2345         fl6.saddr = tun_key->u.ipv6.src;
2346
2347         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2348                                       &fl6, &n, &ttl);
2349         if (err)
2350                 goto free_encap;
2351
2352         /* used by mlx5e_detach_encap to lookup a neigh hash table
2353          * entry in the neigh hash table when a user deletes a rule
2354          */
2355         e->m_neigh.dev = n->dev;
2356         e->m_neigh.family = n->ops->family;
2357         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2358         e->out_dev = out_dev;
2359
2360         /* It's importent to add the neigh to the hash table before checking
2361          * the neigh validity state. So if we'll get a notification, in case the
2362          * neigh changes it's validity state, we would find the relevant neigh
2363          * in the hash.
2364          */
2365         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2366         if (err)
2367                 goto free_encap;
2368
2369         read_lock_bh(&n->lock);
2370         nud_state = n->nud_state;
2371         ether_addr_copy(e->h_dest, n->ha);
2372         read_unlock_bh(&n->lock);
2373
2374         switch (e->tunnel_type) {
2375         case MLX5_HEADER_TYPE_VXLAN:
2376                 gen_vxlan_header_ipv6(out_dev, encap_header,
2377                                       ipv6_encap_size, e->h_dest, ttl,
2378                                       &fl6.daddr,
2379                                       &fl6.saddr, tun_key->tp_dst,
2380                                       tunnel_id_to_key32(tun_key->tun_id));
2381                 break;
2382         default:
2383                 err = -EOPNOTSUPP;
2384                 goto destroy_neigh_entry;
2385         }
2386
2387         e->encap_size = ipv6_encap_size;
2388         e->encap_header = encap_header;
2389
2390         if (!(nud_state & NUD_VALID)) {
2391                 neigh_event_send(n, NULL);
2392                 err = -EAGAIN;
2393                 goto out;
2394         }
2395
2396         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2397                                ipv6_encap_size, encap_header, &e->encap_id);
2398         if (err)
2399                 goto destroy_neigh_entry;
2400
2401         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2402         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2403         neigh_release(n);
2404         return err;
2405
2406 destroy_neigh_entry:
2407         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2408 free_encap:
2409         kfree(encap_header);
2410 out:
2411         if (n)
2412                 neigh_release(n);
2413         return err;
2414 }
2415
2416 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2417                               struct ip_tunnel_info *tun_info,
2418                               struct net_device *mirred_dev,
2419                               struct net_device **encap_dev,
2420                               struct mlx5e_tc_flow *flow)
2421 {
2422         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2423         struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw,
2424                                                                            REP_ETH);
2425         struct net_device *up_dev = uplink_rpriv->netdev;
2426         unsigned short family = ip_tunnel_info_af(tun_info);
2427         struct mlx5e_priv *up_priv = netdev_priv(up_dev);
2428         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2429         struct ip_tunnel_key *key = &tun_info->key;
2430         struct mlx5e_encap_entry *e;
2431         int tunnel_type, err = 0;
2432         uintptr_t hash_key;
2433         bool found = false;
2434
2435         /* udp dst port must be set */
2436         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2437                 goto vxlan_encap_offload_err;
2438
2439         /* setting udp src port isn't supported */
2440         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2441 vxlan_encap_offload_err:
2442                 netdev_warn(priv->netdev,
2443                             "must set udp dst port and not set udp src port\n");
2444                 return -EOPNOTSUPP;
2445         }
2446
2447         if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->tp_dst)) &&
2448             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2449                 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
2450         } else {
2451                 netdev_warn(priv->netdev,
2452                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2453                 return -EOPNOTSUPP;
2454         }
2455
2456         hash_key = hash_encap_info(key);
2457
2458         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2459                                    encap_hlist, hash_key) {
2460                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2461                         found = true;
2462                         break;
2463                 }
2464         }
2465
2466         /* must verify if encap is valid or not */
2467         if (found)
2468                 goto attach_flow;
2469
2470         e = kzalloc(sizeof(*e), GFP_KERNEL);
2471         if (!e)
2472                 return -ENOMEM;
2473
2474         e->tun_info = *tun_info;
2475         e->tunnel_type = tunnel_type;
2476         INIT_LIST_HEAD(&e->flows);
2477
2478         if (family == AF_INET)
2479                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2480         else if (family == AF_INET6)
2481                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2482
2483         if (err && err != -EAGAIN)
2484                 goto out_err;
2485
2486         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2487
2488 attach_flow:
2489         list_add(&flow->encap, &e->flows);
2490         *encap_dev = e->out_dev;
2491         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2492                 attr->encap_id = e->encap_id;
2493         else
2494                 err = -EAGAIN;
2495
2496         return err;
2497
2498 out_err:
2499         kfree(e);
2500         return err;
2501 }
2502
2503 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2504                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2505                                 struct mlx5e_tc_flow *flow)
2506 {
2507         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2508         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2509         struct ip_tunnel_info *info = NULL;
2510         const struct tc_action *a;
2511         LIST_HEAD(actions);
2512         bool encap = false;
2513         u32 action = 0;
2514
2515         if (!tcf_exts_has_actions(exts))
2516                 return -EINVAL;
2517
2518         attr->in_rep = rpriv->rep;
2519         attr->in_mdev = priv->mdev;
2520
2521         tcf_exts_to_list(exts, &actions);
2522         list_for_each_entry(a, &actions, list) {
2523                 if (is_tcf_gact_shot(a)) {
2524                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2525                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2526                         continue;
2527                 }
2528
2529                 if (is_tcf_pedit(a)) {
2530                         int err;
2531
2532                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2533                                                     parse_attr);
2534                         if (err)
2535                                 return err;
2536
2537                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2538                         continue;
2539                 }
2540
2541                 if (is_tcf_csum(a)) {
2542                         if (csum_offload_supported(priv, action,
2543                                                    tcf_csum_update_flags(a)))
2544                                 continue;
2545
2546                         return -EOPNOTSUPP;
2547                 }
2548
2549                 if (is_tcf_mirred_egress_redirect(a)) {
2550                         struct net_device *out_dev;
2551                         struct mlx5e_priv *out_priv;
2552
2553                         out_dev = tcf_mirred_dev(a);
2554
2555                         if (switchdev_port_same_parent_id(priv->netdev,
2556                                                           out_dev) ||
2557                             is_merged_eswitch_dev(priv, out_dev)) {
2558                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2559                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2560                                 out_priv = netdev_priv(out_dev);
2561                                 rpriv = out_priv->ppriv;
2562                                 attr->out_rep = rpriv->rep;
2563                                 attr->out_mdev = out_priv->mdev;
2564                         } else if (encap) {
2565                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2566                                 parse_attr->tun_info = *info;
2567                                 attr->parse_attr = parse_attr;
2568                                 action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
2569                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2570                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2571                                 /* attr->out_rep is resolved when we handle encap */
2572                         } else {
2573                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2574                                        priv->netdev->name, out_dev->name);
2575                                 return -EINVAL;
2576                         }
2577                         continue;
2578                 }
2579
2580                 if (is_tcf_tunnel_set(a)) {
2581                         info = tcf_tunnel_info(a);
2582                         if (info)
2583                                 encap = true;
2584                         else
2585                                 return -EOPNOTSUPP;
2586                         continue;
2587                 }
2588
2589                 if (is_tcf_vlan(a)) {
2590                         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2591                                 action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2592                         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2593                                 action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2594                                 attr->vlan_vid = tcf_vlan_push_vid(a);
2595                                 if (mlx5_eswitch_vlan_actions_supported(priv->mdev)) {
2596                                         attr->vlan_prio = tcf_vlan_push_prio(a);
2597                                         attr->vlan_proto = tcf_vlan_push_proto(a);
2598                                         if (!attr->vlan_proto)
2599                                                 attr->vlan_proto = htons(ETH_P_8021Q);
2600                                 } else if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2601                                            tcf_vlan_push_prio(a)) {
2602                                         return -EOPNOTSUPP;
2603                                 }
2604                         } else { /* action is TCA_VLAN_ACT_MODIFY */
2605                                 return -EOPNOTSUPP;
2606                         }
2607                         continue;
2608                 }
2609
2610                 if (is_tcf_tunnel_release(a)) {
2611                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2612                         continue;
2613                 }
2614
2615                 return -EINVAL;
2616         }
2617
2618         attr->action = action;
2619         if (!actions_match_supported(priv, exts, parse_attr, flow))
2620                 return -EOPNOTSUPP;
2621
2622         return 0;
2623 }
2624
2625 static void get_flags(int flags, u8 *flow_flags)
2626 {
2627         u8 __flow_flags = 0;
2628
2629         if (flags & MLX5E_TC_INGRESS)
2630                 __flow_flags |= MLX5E_TC_FLOW_INGRESS;
2631         if (flags & MLX5E_TC_EGRESS)
2632                 __flow_flags |= MLX5E_TC_FLOW_EGRESS;
2633
2634         *flow_flags = __flow_flags;
2635 }
2636
2637 int mlx5e_configure_flower(struct mlx5e_priv *priv,
2638                            struct tc_cls_flower_offload *f, int flags)
2639 {
2640         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2641         struct mlx5e_tc_flow_parse_attr *parse_attr;
2642         struct mlx5e_tc_table *tc = &priv->fs.tc;
2643         struct mlx5e_tc_flow *flow;
2644         int attr_size, err = 0;
2645         u8 flow_flags = 0;
2646
2647         get_flags(flags, &flow_flags);
2648
2649         if (esw && esw->mode == SRIOV_OFFLOADS) {
2650                 flow_flags |= MLX5E_TC_FLOW_ESWITCH;
2651                 attr_size  = sizeof(struct mlx5_esw_flow_attr);
2652         } else {
2653                 flow_flags |= MLX5E_TC_FLOW_NIC;
2654                 attr_size  = sizeof(struct mlx5_nic_flow_attr);
2655         }
2656
2657         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
2658         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
2659         if (!parse_attr || !flow) {
2660                 err = -ENOMEM;
2661                 goto err_free;
2662         }
2663
2664         flow->cookie = f->cookie;
2665         flow->flags = flow_flags;
2666
2667         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
2668         if (err < 0)
2669                 goto err_free;
2670
2671         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
2672                 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow);
2673                 if (err < 0)
2674                         goto err_free;
2675                 flow->rule = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow);
2676         } else {
2677                 err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow);
2678                 if (err < 0)
2679                         goto err_free;
2680                 flow->rule = mlx5e_tc_add_nic_flow(priv, parse_attr, flow);
2681         }
2682
2683         if (IS_ERR(flow->rule)) {
2684                 err = PTR_ERR(flow->rule);
2685                 if (err != -EAGAIN)
2686                         goto err_free;
2687         }
2688
2689         if (err != -EAGAIN)
2690                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
2691
2692         if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) ||
2693             !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP))
2694                 kvfree(parse_attr);
2695
2696         err = rhashtable_insert_fast(&tc->ht, &flow->node,
2697                                      tc->ht_params);
2698         if (err) {
2699                 mlx5e_tc_del_flow(priv, flow);
2700                 kfree(flow);
2701         }
2702
2703         return err;
2704
2705 err_free:
2706         kvfree(parse_attr);
2707         kfree(flow);
2708         return err;
2709 }
2710
2711 int mlx5e_delete_flower(struct mlx5e_priv *priv,
2712                         struct tc_cls_flower_offload *f, int flags)
2713 {
2714         struct mlx5e_tc_flow *flow;
2715         struct mlx5e_tc_table *tc = &priv->fs.tc;
2716
2717         flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2718                                       tc->ht_params);
2719         if (!flow)
2720                 return -EINVAL;
2721
2722         rhashtable_remove_fast(&tc->ht, &flow->node, tc->ht_params);
2723
2724         mlx5e_tc_del_flow(priv, flow);
2725
2726         kfree(flow);
2727
2728         return 0;
2729 }
2730
2731 int mlx5e_stats_flower(struct mlx5e_priv *priv,
2732                        struct tc_cls_flower_offload *f, int flags)
2733 {
2734         struct mlx5e_tc_table *tc = &priv->fs.tc;
2735         struct mlx5e_tc_flow *flow;
2736         struct mlx5_fc *counter;
2737         u64 bytes;
2738         u64 packets;
2739         u64 lastuse;
2740
2741         flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2742                                       tc->ht_params);
2743         if (!flow)
2744                 return -EINVAL;
2745
2746         if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
2747                 return 0;
2748
2749         counter = mlx5_flow_rule_counter(flow->rule);
2750         if (!counter)
2751                 return 0;
2752
2753         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
2754
2755         tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
2756
2757         return 0;
2758 }
2759
2760 static const struct rhashtable_params mlx5e_tc_flow_ht_params = {
2761         .head_offset = offsetof(struct mlx5e_tc_flow, node),
2762         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2763         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2764         .automatic_shrinking = true,
2765 };
2766
2767 int mlx5e_tc_init(struct mlx5e_priv *priv)
2768 {
2769         struct mlx5e_tc_table *tc = &priv->fs.tc;
2770
2771         hash_init(tc->mod_hdr_tbl);
2772         hash_init(tc->hairpin_tbl);
2773
2774         tc->ht_params = mlx5e_tc_flow_ht_params;
2775         return rhashtable_init(&tc->ht, &tc->ht_params);
2776 }
2777
2778 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
2779 {
2780         struct mlx5e_tc_flow *flow = ptr;
2781         struct mlx5e_priv *priv = arg;
2782
2783         mlx5e_tc_del_flow(priv, flow);
2784         kfree(flow);
2785 }
2786
2787 void mlx5e_tc_cleanup(struct mlx5e_priv *priv)
2788 {
2789         struct mlx5e_tc_table *tc = &priv->fs.tc;
2790
2791         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, priv);
2792
2793         if (!IS_ERR_OR_NULL(tc->t)) {
2794                 mlx5_destroy_flow_table(tc->t);
2795                 tc->t = NULL;
2796         }
2797 }