1dc24e3a0841b45fe77ac94dcd5ce3eb1413c4d6
[sfrench/cifs-2.6.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_tc.c
1 /*
2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include <net/flow_dissector.h>
34 #include <net/sch_generic.h>
35 #include <net/pkt_cls.h>
36 #include <net/tc_act/tc_gact.h>
37 #include <net/tc_act/tc_skbedit.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/device.h>
40 #include <linux/rhashtable.h>
41 #include <net/switchdev.h>
42 #include <net/tc_act/tc_mirred.h>
43 #include <net/tc_act/tc_vlan.h>
44 #include <net/tc_act/tc_tunnel_key.h>
45 #include <net/tc_act/tc_pedit.h>
46 #include <net/tc_act/tc_csum.h>
47 #include <net/vxlan.h>
48 #include <net/arp.h>
49 #include "en.h"
50 #include "en_rep.h"
51 #include "en_tc.h"
52 #include "eswitch.h"
53 #include "vxlan.h"
54 #include "fs_core.h"
55
56 struct mlx5_nic_flow_attr {
57         u32 action;
58         u32 flow_tag;
59         u32 mod_hdr_id;
60         u32 hairpin_tirn;
61         u8 match_level;
62         struct mlx5_flow_table  *hairpin_ft;
63 };
64
65 enum {
66         MLX5E_TC_FLOW_ESWITCH   = BIT(0),
67         MLX5E_TC_FLOW_NIC       = BIT(1),
68         MLX5E_TC_FLOW_OFFLOADED = BIT(2),
69         MLX5E_TC_FLOW_HAIRPIN   = BIT(3),
70         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(4),
71 };
72
73 struct mlx5e_tc_flow {
74         struct rhash_head       node;
75         u64                     cookie;
76         u8                      flags;
77         struct mlx5_flow_handle *rule;
78         struct list_head        encap;   /* flows sharing the same encap ID */
79         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
80         struct list_head        hairpin; /* flows sharing the same hairpin */
81         union {
82                 struct mlx5_esw_flow_attr esw_attr[0];
83                 struct mlx5_nic_flow_attr nic_attr[0];
84         };
85 };
86
87 struct mlx5e_tc_flow_parse_attr {
88         struct ip_tunnel_info tun_info;
89         struct mlx5_flow_spec spec;
90         int num_mod_hdr_actions;
91         void *mod_hdr_actions;
92         int mirred_ifindex;
93 };
94
95 enum {
96         MLX5_HEADER_TYPE_VXLAN = 0x0,
97         MLX5_HEADER_TYPE_NVGRE = 0x1,
98 };
99
100 #define MLX5E_TC_TABLE_NUM_GROUPS 4
101 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
102
103 struct mlx5e_hairpin {
104         struct mlx5_hairpin *pair;
105
106         struct mlx5_core_dev *func_mdev;
107         struct mlx5e_priv *func_priv;
108         u32 tdn;
109         u32 tirn;
110
111         int num_channels;
112         struct mlx5e_rqt indir_rqt;
113         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
114         struct mlx5e_ttc_table ttc;
115 };
116
117 struct mlx5e_hairpin_entry {
118         /* a node of a hash table which keeps all the  hairpin entries */
119         struct hlist_node hairpin_hlist;
120
121         /* flows sharing the same hairpin */
122         struct list_head flows;
123
124         u16 peer_vhca_id;
125         u8 prio;
126         struct mlx5e_hairpin *hp;
127 };
128
129 struct mod_hdr_key {
130         int num_actions;
131         void *actions;
132 };
133
134 struct mlx5e_mod_hdr_entry {
135         /* a node of a hash table which keeps all the mod_hdr entries */
136         struct hlist_node mod_hdr_hlist;
137
138         /* flows sharing the same mod_hdr entry */
139         struct list_head flows;
140
141         struct mod_hdr_key key;
142
143         u32 mod_hdr_id;
144 };
145
146 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
147
148 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
149 {
150         return jhash(key->actions,
151                      key->num_actions * MLX5_MH_ACT_SZ, 0);
152 }
153
154 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
155                                    struct mod_hdr_key *b)
156 {
157         if (a->num_actions != b->num_actions)
158                 return 1;
159
160         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
161 }
162
163 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
164                                 struct mlx5e_tc_flow *flow,
165                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
166 {
167         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
168         int num_actions, actions_size, namespace, err;
169         struct mlx5e_mod_hdr_entry *mh;
170         struct mod_hdr_key key;
171         bool found = false;
172         u32 hash_key;
173
174         num_actions  = parse_attr->num_mod_hdr_actions;
175         actions_size = MLX5_MH_ACT_SZ * num_actions;
176
177         key.actions = parse_attr->mod_hdr_actions;
178         key.num_actions = num_actions;
179
180         hash_key = hash_mod_hdr_info(&key);
181
182         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
183                 namespace = MLX5_FLOW_NAMESPACE_FDB;
184                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
185                                        mod_hdr_hlist, hash_key) {
186                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
187                                 found = true;
188                                 break;
189                         }
190                 }
191         } else {
192                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
193                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
194                                        mod_hdr_hlist, hash_key) {
195                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
196                                 found = true;
197                                 break;
198                         }
199                 }
200         }
201
202         if (found)
203                 goto attach_flow;
204
205         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
206         if (!mh)
207                 return -ENOMEM;
208
209         mh->key.actions = (void *)mh + sizeof(*mh);
210         memcpy(mh->key.actions, key.actions, actions_size);
211         mh->key.num_actions = num_actions;
212         INIT_LIST_HEAD(&mh->flows);
213
214         err = mlx5_modify_header_alloc(priv->mdev, namespace,
215                                        mh->key.num_actions,
216                                        mh->key.actions,
217                                        &mh->mod_hdr_id);
218         if (err)
219                 goto out_err;
220
221         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
222                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
223         else
224                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
225
226 attach_flow:
227         list_add(&flow->mod_hdr, &mh->flows);
228         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
229                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
230         else
231                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
232
233         return 0;
234
235 out_err:
236         kfree(mh);
237         return err;
238 }
239
240 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
241                                  struct mlx5e_tc_flow *flow)
242 {
243         struct list_head *next = flow->mod_hdr.next;
244
245         list_del(&flow->mod_hdr);
246
247         if (list_empty(next)) {
248                 struct mlx5e_mod_hdr_entry *mh;
249
250                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
251
252                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
253                 hash_del(&mh->mod_hdr_hlist);
254                 kfree(mh);
255         }
256 }
257
258 static
259 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
260 {
261         struct net_device *netdev;
262         struct mlx5e_priv *priv;
263
264         netdev = __dev_get_by_index(net, ifindex);
265         priv = netdev_priv(netdev);
266         return priv->mdev;
267 }
268
269 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
270 {
271         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
272         void *tirc;
273         int err;
274
275         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
276         if (err)
277                 goto alloc_tdn_err;
278
279         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
280
281         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
282         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
283         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
284
285         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
286         if (err)
287                 goto create_tir_err;
288
289         return 0;
290
291 create_tir_err:
292         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
293 alloc_tdn_err:
294         return err;
295 }
296
297 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
298 {
299         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
300         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
301 }
302
303 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
304 {
305         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
306         struct mlx5e_priv *priv = hp->func_priv;
307         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
308
309         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
310                                       hp->num_channels);
311
312         for (i = 0; i < sz; i++) {
313                 ix = i;
314                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
315                         ix = mlx5e_bits_invert(i, ilog2(sz));
316                 ix = indirection_rqt[ix];
317                 rqn = hp->pair->rqn[ix];
318                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
319         }
320 }
321
322 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
323 {
324         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
325         struct mlx5e_priv *priv = hp->func_priv;
326         struct mlx5_core_dev *mdev = priv->mdev;
327         void *rqtc;
328         u32 *in;
329
330         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
331         in = kvzalloc(inlen, GFP_KERNEL);
332         if (!in)
333                 return -ENOMEM;
334
335         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
336
337         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
338         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
339
340         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
341
342         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
343         if (!err)
344                 hp->indir_rqt.enabled = true;
345
346         kvfree(in);
347         return err;
348 }
349
350 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
351 {
352         struct mlx5e_priv *priv = hp->func_priv;
353         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
354         int tt, i, err;
355         void *tirc;
356
357         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
358                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
359                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
360
361                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
362                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
363                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
364                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
365
366                 err = mlx5_core_create_tir(hp->func_mdev, in,
367                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
368                 if (err) {
369                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
370                         goto err_destroy_tirs;
371                 }
372         }
373         return 0;
374
375 err_destroy_tirs:
376         for (i = 0; i < tt; i++)
377                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
378         return err;
379 }
380
381 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
382 {
383         int tt;
384
385         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
386                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
387 }
388
389 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
390                                          struct ttc_params *ttc_params)
391 {
392         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
393         int tt;
394
395         memset(ttc_params, 0, sizeof(*ttc_params));
396
397         ttc_params->any_tt_tirn = hp->tirn;
398
399         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
400                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
401
402         ft_attr->max_fte = MLX5E_NUM_TT;
403         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
404         ft_attr->prio = MLX5E_TC_PRIO;
405 }
406
407 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
408 {
409         struct mlx5e_priv *priv = hp->func_priv;
410         struct ttc_params ttc_params;
411         int err;
412
413         err = mlx5e_hairpin_create_indirect_rqt(hp);
414         if (err)
415                 return err;
416
417         err = mlx5e_hairpin_create_indirect_tirs(hp);
418         if (err)
419                 goto err_create_indirect_tirs;
420
421         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
422         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
423         if (err)
424                 goto err_create_ttc_table;
425
426         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
427                    hp->num_channels, hp->ttc.ft.t->id);
428
429         return 0;
430
431 err_create_ttc_table:
432         mlx5e_hairpin_destroy_indirect_tirs(hp);
433 err_create_indirect_tirs:
434         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
435
436         return err;
437 }
438
439 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
440 {
441         struct mlx5e_priv *priv = hp->func_priv;
442
443         mlx5e_destroy_ttc_table(priv, &hp->ttc);
444         mlx5e_hairpin_destroy_indirect_tirs(hp);
445         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
446 }
447
448 static struct mlx5e_hairpin *
449 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
450                      int peer_ifindex)
451 {
452         struct mlx5_core_dev *func_mdev, *peer_mdev;
453         struct mlx5e_hairpin *hp;
454         struct mlx5_hairpin *pair;
455         int err;
456
457         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
458         if (!hp)
459                 return ERR_PTR(-ENOMEM);
460
461         func_mdev = priv->mdev;
462         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
463
464         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
465         if (IS_ERR(pair)) {
466                 err = PTR_ERR(pair);
467                 goto create_pair_err;
468         }
469         hp->pair = pair;
470         hp->func_mdev = func_mdev;
471         hp->func_priv = priv;
472         hp->num_channels = params->num_channels;
473
474         err = mlx5e_hairpin_create_transport(hp);
475         if (err)
476                 goto create_transport_err;
477
478         if (hp->num_channels > 1) {
479                 err = mlx5e_hairpin_rss_init(hp);
480                 if (err)
481                         goto rss_init_err;
482         }
483
484         return hp;
485
486 rss_init_err:
487         mlx5e_hairpin_destroy_transport(hp);
488 create_transport_err:
489         mlx5_core_hairpin_destroy(hp->pair);
490 create_pair_err:
491         kfree(hp);
492         return ERR_PTR(err);
493 }
494
495 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
496 {
497         if (hp->num_channels > 1)
498                 mlx5e_hairpin_rss_cleanup(hp);
499         mlx5e_hairpin_destroy_transport(hp);
500         mlx5_core_hairpin_destroy(hp->pair);
501         kvfree(hp);
502 }
503
504 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
505 {
506         return (peer_vhca_id << 16 | prio);
507 }
508
509 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
510                                                      u16 peer_vhca_id, u8 prio)
511 {
512         struct mlx5e_hairpin_entry *hpe;
513         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
514
515         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
516                                hairpin_hlist, hash_key) {
517                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
518                         return hpe;
519         }
520
521         return NULL;
522 }
523
524 #define UNKNOWN_MATCH_PRIO 8
525
526 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
527                                   struct mlx5_flow_spec *spec, u8 *match_prio)
528 {
529         void *headers_c, *headers_v;
530         u8 prio_val, prio_mask = 0;
531         bool vlan_present;
532
533 #ifdef CONFIG_MLX5_CORE_EN_DCB
534         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
535                 netdev_warn(priv->netdev,
536                             "only PCP trust state supported for hairpin\n");
537                 return -EOPNOTSUPP;
538         }
539 #endif
540         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
541         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
542
543         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
544         if (vlan_present) {
545                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
546                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
547         }
548
549         if (!vlan_present || !prio_mask) {
550                 prio_val = UNKNOWN_MATCH_PRIO;
551         } else if (prio_mask != 0x7) {
552                 netdev_warn(priv->netdev,
553                             "masked priority match not supported for hairpin\n");
554                 return -EOPNOTSUPP;
555         }
556
557         *match_prio = prio_val;
558         return 0;
559 }
560
561 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
562                                   struct mlx5e_tc_flow *flow,
563                                   struct mlx5e_tc_flow_parse_attr *parse_attr)
564 {
565         int peer_ifindex = parse_attr->mirred_ifindex;
566         struct mlx5_hairpin_params params;
567         struct mlx5_core_dev *peer_mdev;
568         struct mlx5e_hairpin_entry *hpe;
569         struct mlx5e_hairpin *hp;
570         u64 link_speed64;
571         u32 link_speed;
572         u8 match_prio;
573         u16 peer_id;
574         int err;
575
576         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
577         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
578                 netdev_warn(priv->netdev, "hairpin is not supported\n");
579                 return -EOPNOTSUPP;
580         }
581
582         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
583         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio);
584         if (err)
585                 return err;
586         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
587         if (hpe)
588                 goto attach_flow;
589
590         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
591         if (!hpe)
592                 return -ENOMEM;
593
594         INIT_LIST_HEAD(&hpe->flows);
595         hpe->peer_vhca_id = peer_id;
596         hpe->prio = match_prio;
597
598         params.log_data_size = 15;
599         params.log_data_size = min_t(u8, params.log_data_size,
600                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
601         params.log_data_size = max_t(u8, params.log_data_size,
602                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
603
604         params.log_num_packets = params.log_data_size -
605                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
606         params.log_num_packets = min_t(u8, params.log_num_packets,
607                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
608
609         params.q_counter = priv->q_counter;
610         /* set hairpin pair per each 50Gbs share of the link */
611         mlx5e_get_max_linkspeed(priv->mdev, &link_speed);
612         link_speed = max_t(u32, link_speed, 50000);
613         link_speed64 = link_speed;
614         do_div(link_speed64, 50000);
615         params.num_channels = link_speed64;
616
617         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
618         if (IS_ERR(hp)) {
619                 err = PTR_ERR(hp);
620                 goto create_hairpin_err;
621         }
622
623         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
624                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
625                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
626
627         hpe->hp = hp;
628         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
629                  hash_hairpin_info(peer_id, match_prio));
630
631 attach_flow:
632         if (hpe->hp->num_channels > 1) {
633                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
634                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
635         } else {
636                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
637         }
638         list_add(&flow->hairpin, &hpe->flows);
639
640         return 0;
641
642 create_hairpin_err:
643         kfree(hpe);
644         return err;
645 }
646
647 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
648                                    struct mlx5e_tc_flow *flow)
649 {
650         struct list_head *next = flow->hairpin.next;
651
652         list_del(&flow->hairpin);
653
654         /* no more hairpin flows for us, release the hairpin pair */
655         if (list_empty(next)) {
656                 struct mlx5e_hairpin_entry *hpe;
657
658                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
659
660                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
661                            hpe->hp->pair->peer_mdev->priv.name);
662
663                 mlx5e_hairpin_destroy(hpe->hp);
664                 hash_del(&hpe->hairpin_hlist);
665                 kfree(hpe);
666         }
667 }
668
669 static struct mlx5_flow_handle *
670 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
671                       struct mlx5e_tc_flow_parse_attr *parse_attr,
672                       struct mlx5e_tc_flow *flow)
673 {
674         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
675         struct mlx5_core_dev *dev = priv->mdev;
676         struct mlx5_flow_destination dest[2] = {};
677         struct mlx5_flow_act flow_act = {
678                 .action = attr->action,
679                 .has_flow_tag = true,
680                 .flow_tag = attr->flow_tag,
681                 .encap_id = 0,
682         };
683         struct mlx5_fc *counter = NULL;
684         struct mlx5_flow_handle *rule;
685         bool table_created = false;
686         int err, dest_ix = 0;
687
688         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
689                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr);
690                 if (err) {
691                         rule = ERR_PTR(err);
692                         goto err_add_hairpin_flow;
693                 }
694                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
695                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
696                         dest[dest_ix].ft = attr->hairpin_ft;
697                 } else {
698                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
699                         dest[dest_ix].tir_num = attr->hairpin_tirn;
700                 }
701                 dest_ix++;
702         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
703                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
704                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
705                 dest_ix++;
706         }
707
708         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
709                 counter = mlx5_fc_create(dev, true);
710                 if (IS_ERR(counter)) {
711                         rule = ERR_CAST(counter);
712                         goto err_fc_create;
713                 }
714                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
715                 dest[dest_ix].counter = counter;
716                 dest_ix++;
717         }
718
719         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
720                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
721                 flow_act.modify_id = attr->mod_hdr_id;
722                 kfree(parse_attr->mod_hdr_actions);
723                 if (err) {
724                         rule = ERR_PTR(err);
725                         goto err_create_mod_hdr_id;
726                 }
727         }
728
729         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
730                 int tc_grp_size, tc_tbl_size;
731                 u32 max_flow_counter;
732
733                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
734                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
735
736                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
737
738                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
739                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
740
741                 priv->fs.tc.t =
742                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
743                                                             MLX5E_TC_PRIO,
744                                                             tc_tbl_size,
745                                                             MLX5E_TC_TABLE_NUM_GROUPS,
746                                                             MLX5E_TC_FT_LEVEL, 0);
747                 if (IS_ERR(priv->fs.tc.t)) {
748                         netdev_err(priv->netdev,
749                                    "Failed to create tc offload table\n");
750                         rule = ERR_CAST(priv->fs.tc.t);
751                         goto err_create_ft;
752                 }
753
754                 table_created = true;
755         }
756
757         if (attr->match_level != MLX5_MATCH_NONE)
758                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
759
760         rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
761                                    &flow_act, dest, dest_ix);
762
763         if (IS_ERR(rule))
764                 goto err_add_rule;
765
766         return rule;
767
768 err_add_rule:
769         if (table_created) {
770                 mlx5_destroy_flow_table(priv->fs.tc.t);
771                 priv->fs.tc.t = NULL;
772         }
773 err_create_ft:
774         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
775                 mlx5e_detach_mod_hdr(priv, flow);
776 err_create_mod_hdr_id:
777         mlx5_fc_destroy(dev, counter);
778 err_fc_create:
779         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
780                 mlx5e_hairpin_flow_del(priv, flow);
781 err_add_hairpin_flow:
782         return rule;
783 }
784
785 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
786                                   struct mlx5e_tc_flow *flow)
787 {
788         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
789         struct mlx5_fc *counter = NULL;
790
791         counter = mlx5_flow_rule_counter(flow->rule);
792         mlx5_del_flow_rules(flow->rule);
793         mlx5_fc_destroy(priv->mdev, counter);
794
795         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
796                 mlx5_destroy_flow_table(priv->fs.tc.t);
797                 priv->fs.tc.t = NULL;
798         }
799
800         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
801                 mlx5e_detach_mod_hdr(priv, flow);
802
803         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
804                 mlx5e_hairpin_flow_del(priv, flow);
805 }
806
807 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
808                                struct mlx5e_tc_flow *flow);
809
810 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
811                               struct ip_tunnel_info *tun_info,
812                               struct net_device *mirred_dev,
813                               struct net_device **encap_dev,
814                               struct mlx5e_tc_flow *flow);
815
816 static struct mlx5_flow_handle *
817 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
818                       struct mlx5e_tc_flow_parse_attr *parse_attr,
819                       struct mlx5e_tc_flow *flow)
820 {
821         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
822         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
823         struct net_device *out_dev, *encap_dev = NULL;
824         struct mlx5_flow_handle *rule = NULL;
825         struct mlx5e_rep_priv *rpriv;
826         struct mlx5e_priv *out_priv;
827         int err;
828
829         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
830                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
831                                              attr->parse_attr->mirred_ifindex);
832                 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
833                                          out_dev, &encap_dev, flow);
834                 if (err) {
835                         rule = ERR_PTR(err);
836                         if (err != -EAGAIN)
837                                 goto err_attach_encap;
838                 }
839                 out_priv = netdev_priv(encap_dev);
840                 rpriv = out_priv->ppriv;
841                 attr->out_rep = rpriv->rep;
842         }
843
844         err = mlx5_eswitch_add_vlan_action(esw, attr);
845         if (err) {
846                 rule = ERR_PTR(err);
847                 goto err_add_vlan;
848         }
849
850         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
851                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
852                 kfree(parse_attr->mod_hdr_actions);
853                 if (err) {
854                         rule = ERR_PTR(err);
855                         goto err_mod_hdr;
856                 }
857         }
858
859         /* we get here if (1) there's no error (rule being null) or when
860          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
861          */
862         if (rule != ERR_PTR(-EAGAIN)) {
863                 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
864                 if (IS_ERR(rule))
865                         goto err_add_rule;
866         }
867         return rule;
868
869 err_add_rule:
870         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
871                 mlx5e_detach_mod_hdr(priv, flow);
872 err_mod_hdr:
873         mlx5_eswitch_del_vlan_action(esw, attr);
874 err_add_vlan:
875         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
876                 mlx5e_detach_encap(priv, flow);
877 err_attach_encap:
878         return rule;
879 }
880
881 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
882                                   struct mlx5e_tc_flow *flow)
883 {
884         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
885         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
886
887         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
888                 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
889                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule, attr);
890         }
891
892         mlx5_eswitch_del_vlan_action(esw, attr);
893
894         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
895                 mlx5e_detach_encap(priv, flow);
896                 kvfree(attr->parse_attr);
897         }
898
899         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
900                 mlx5e_detach_mod_hdr(priv, flow);
901 }
902
903 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
904                               struct mlx5e_encap_entry *e)
905 {
906         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
907         struct mlx5_esw_flow_attr *esw_attr;
908         struct mlx5e_tc_flow *flow;
909         int err;
910
911         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
912                                e->encap_size, e->encap_header,
913                                &e->encap_id);
914         if (err) {
915                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
916                                err);
917                 return;
918         }
919         e->flags |= MLX5_ENCAP_ENTRY_VALID;
920         mlx5e_rep_queue_neigh_stats_work(priv);
921
922         list_for_each_entry(flow, &e->flows, encap) {
923                 esw_attr = flow->esw_attr;
924                 esw_attr->encap_id = e->encap_id;
925                 flow->rule = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
926                 if (IS_ERR(flow->rule)) {
927                         err = PTR_ERR(flow->rule);
928                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
929                                        err);
930                         continue;
931                 }
932                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
933         }
934 }
935
936 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
937                               struct mlx5e_encap_entry *e)
938 {
939         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
940         struct mlx5e_tc_flow *flow;
941
942         list_for_each_entry(flow, &e->flows, encap) {
943                 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
944                         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
945                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule, flow->esw_attr);
946                 }
947         }
948
949         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
950                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
951                 mlx5_encap_dealloc(priv->mdev, e->encap_id);
952         }
953 }
954
955 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
956 {
957         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
958         u64 bytes, packets, lastuse = 0;
959         struct mlx5e_tc_flow *flow;
960         struct mlx5e_encap_entry *e;
961         struct mlx5_fc *counter;
962         struct neigh_table *tbl;
963         bool neigh_used = false;
964         struct neighbour *n;
965
966         if (m_neigh->family == AF_INET)
967                 tbl = &arp_tbl;
968 #if IS_ENABLED(CONFIG_IPV6)
969         else if (m_neigh->family == AF_INET6)
970                 tbl = &nd_tbl;
971 #endif
972         else
973                 return;
974
975         list_for_each_entry(e, &nhe->encap_list, encap_list) {
976                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
977                         continue;
978                 list_for_each_entry(flow, &e->flows, encap) {
979                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
980                                 counter = mlx5_flow_rule_counter(flow->rule);
981                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
982                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
983                                         neigh_used = true;
984                                         break;
985                                 }
986                         }
987                 }
988                 if (neigh_used)
989                         break;
990         }
991
992         if (neigh_used) {
993                 nhe->reported_lastuse = jiffies;
994
995                 /* find the relevant neigh according to the cached device and
996                  * dst ip pair
997                  */
998                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
999                 if (!n) {
1000                         WARN(1, "The neighbour already freed\n");
1001                         return;
1002                 }
1003
1004                 neigh_event_send(n, NULL);
1005                 neigh_release(n);
1006         }
1007 }
1008
1009 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1010                                struct mlx5e_tc_flow *flow)
1011 {
1012         struct list_head *next = flow->encap.next;
1013
1014         list_del(&flow->encap);
1015         if (list_empty(next)) {
1016                 struct mlx5e_encap_entry *e;
1017
1018                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1019                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1020
1021                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1022                         mlx5_encap_dealloc(priv->mdev, e->encap_id);
1023
1024                 hash_del_rcu(&e->encap_hlist);
1025                 kfree(e->encap_header);
1026                 kfree(e);
1027         }
1028 }
1029
1030 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1031                               struct mlx5e_tc_flow *flow)
1032 {
1033         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1034                 mlx5e_tc_del_fdb_flow(priv, flow);
1035         else
1036                 mlx5e_tc_del_nic_flow(priv, flow);
1037 }
1038
1039 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1040                              struct tc_cls_flower_offload *f)
1041 {
1042         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1043                                        outer_headers);
1044         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1045                                        outer_headers);
1046         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1047                                     misc_parameters);
1048         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1049                                     misc_parameters);
1050
1051         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1052         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1053
1054         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1055                 struct flow_dissector_key_keyid *key =
1056                         skb_flow_dissector_target(f->dissector,
1057                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1058                                                   f->key);
1059                 struct flow_dissector_key_keyid *mask =
1060                         skb_flow_dissector_target(f->dissector,
1061                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1062                                                   f->mask);
1063                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1064                          be32_to_cpu(mask->keyid));
1065                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1066                          be32_to_cpu(key->keyid));
1067         }
1068 }
1069
1070 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1071                              struct mlx5_flow_spec *spec,
1072                              struct tc_cls_flower_offload *f)
1073 {
1074         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1075                                        outer_headers);
1076         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1077                                        outer_headers);
1078
1079         struct flow_dissector_key_control *enc_control =
1080                 skb_flow_dissector_target(f->dissector,
1081                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1082                                           f->key);
1083
1084         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1085                 struct flow_dissector_key_ports *key =
1086                         skb_flow_dissector_target(f->dissector,
1087                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1088                                                   f->key);
1089                 struct flow_dissector_key_ports *mask =
1090                         skb_flow_dissector_target(f->dissector,
1091                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1092                                                   f->mask);
1093                 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1094                 struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1095                 struct net_device *up_dev = uplink_rpriv->netdev;
1096                 struct mlx5e_priv *up_priv = netdev_priv(up_dev);
1097
1098                 /* Full udp dst port must be given */
1099                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1100                         goto vxlan_match_offload_err;
1101
1102                 if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->dst)) &&
1103                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1104                         parse_vxlan_attr(spec, f);
1105                 else {
1106                         netdev_warn(priv->netdev,
1107                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1108                         return -EOPNOTSUPP;
1109                 }
1110
1111                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1112                          udp_dport, ntohs(mask->dst));
1113                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1114                          udp_dport, ntohs(key->dst));
1115
1116                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1117                          udp_sport, ntohs(mask->src));
1118                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1119                          udp_sport, ntohs(key->src));
1120         } else { /* udp dst port must be given */
1121 vxlan_match_offload_err:
1122                 netdev_warn(priv->netdev,
1123                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1124                 return -EOPNOTSUPP;
1125         }
1126
1127         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1128                 struct flow_dissector_key_ipv4_addrs *key =
1129                         skb_flow_dissector_target(f->dissector,
1130                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1131                                                   f->key);
1132                 struct flow_dissector_key_ipv4_addrs *mask =
1133                         skb_flow_dissector_target(f->dissector,
1134                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1135                                                   f->mask);
1136                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1137                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1138                          ntohl(mask->src));
1139                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1140                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1141                          ntohl(key->src));
1142
1143                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1144                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1145                          ntohl(mask->dst));
1146                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1147                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1148                          ntohl(key->dst));
1149
1150                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1151                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1152         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1153                 struct flow_dissector_key_ipv6_addrs *key =
1154                         skb_flow_dissector_target(f->dissector,
1155                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1156                                                   f->key);
1157                 struct flow_dissector_key_ipv6_addrs *mask =
1158                         skb_flow_dissector_target(f->dissector,
1159                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1160                                                   f->mask);
1161
1162                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1163                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1164                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1165                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1166                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1167                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1168
1169                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1170                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1171                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1172                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1173                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1174                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1175
1176                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1177                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1178         }
1179
1180         /* Enforce DMAC when offloading incoming tunneled flows.
1181          * Flow counters require a match on the DMAC.
1182          */
1183         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1184         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1185         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1186                                      dmac_47_16), priv->netdev->dev_addr);
1187
1188         /* let software handle IP fragments */
1189         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1190         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1191
1192         return 0;
1193 }
1194
1195 static int __parse_cls_flower(struct mlx5e_priv *priv,
1196                               struct mlx5_flow_spec *spec,
1197                               struct tc_cls_flower_offload *f,
1198                               u8 *match_level)
1199 {
1200         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1201                                        outer_headers);
1202         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1203                                        outer_headers);
1204         u16 addr_type = 0;
1205         u8 ip_proto = 0;
1206
1207         *match_level = MLX5_MATCH_NONE;
1208
1209         if (f->dissector->used_keys &
1210             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1211               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1212               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1213               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1214               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1215               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1216               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1217               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1218               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1219               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1220               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1221               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1222               BIT(FLOW_DISSECTOR_KEY_TCP) |
1223               BIT(FLOW_DISSECTOR_KEY_IP))) {
1224                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1225                             f->dissector->used_keys);
1226                 return -EOPNOTSUPP;
1227         }
1228
1229         if ((dissector_uses_key(f->dissector,
1230                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1231              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1232              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1233             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1234                 struct flow_dissector_key_control *key =
1235                         skb_flow_dissector_target(f->dissector,
1236                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1237                                                   f->key);
1238                 switch (key->addr_type) {
1239                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1240                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1241                         if (parse_tunnel_attr(priv, spec, f))
1242                                 return -EOPNOTSUPP;
1243                         break;
1244                 default:
1245                         return -EOPNOTSUPP;
1246                 }
1247
1248                 /* In decap flow, header pointers should point to the inner
1249                  * headers, outer header were already set by parse_tunnel_attr
1250                  */
1251                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1252                                          inner_headers);
1253                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1254                                          inner_headers);
1255         }
1256
1257         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1258                 struct flow_dissector_key_eth_addrs *key =
1259                         skb_flow_dissector_target(f->dissector,
1260                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1261                                                   f->key);
1262                 struct flow_dissector_key_eth_addrs *mask =
1263                         skb_flow_dissector_target(f->dissector,
1264                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1265                                                   f->mask);
1266
1267                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1268                                              dmac_47_16),
1269                                 mask->dst);
1270                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1271                                              dmac_47_16),
1272                                 key->dst);
1273
1274                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1275                                              smac_47_16),
1276                                 mask->src);
1277                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1278                                              smac_47_16),
1279                                 key->src);
1280
1281                 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1282                         *match_level = MLX5_MATCH_L2;
1283         }
1284
1285         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1286                 struct flow_dissector_key_vlan *key =
1287                         skb_flow_dissector_target(f->dissector,
1288                                                   FLOW_DISSECTOR_KEY_VLAN,
1289                                                   f->key);
1290                 struct flow_dissector_key_vlan *mask =
1291                         skb_flow_dissector_target(f->dissector,
1292                                                   FLOW_DISSECTOR_KEY_VLAN,
1293                                                   f->mask);
1294                 if (mask->vlan_id || mask->vlan_priority) {
1295                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1296                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
1297
1298                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1299                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1300
1301                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1302                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1303
1304                         *match_level = MLX5_MATCH_L2;
1305                 }
1306         }
1307
1308         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1309                 struct flow_dissector_key_basic *key =
1310                         skb_flow_dissector_target(f->dissector,
1311                                                   FLOW_DISSECTOR_KEY_BASIC,
1312                                                   f->key);
1313                 struct flow_dissector_key_basic *mask =
1314                         skb_flow_dissector_target(f->dissector,
1315                                                   FLOW_DISSECTOR_KEY_BASIC,
1316                                                   f->mask);
1317                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1318                          ntohs(mask->n_proto));
1319                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1320                          ntohs(key->n_proto));
1321
1322                 if (mask->n_proto)
1323                         *match_level = MLX5_MATCH_L2;
1324         }
1325
1326         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1327                 struct flow_dissector_key_control *key =
1328                         skb_flow_dissector_target(f->dissector,
1329                                                   FLOW_DISSECTOR_KEY_CONTROL,
1330                                                   f->key);
1331
1332                 struct flow_dissector_key_control *mask =
1333                         skb_flow_dissector_target(f->dissector,
1334                                                   FLOW_DISSECTOR_KEY_CONTROL,
1335                                                   f->mask);
1336                 addr_type = key->addr_type;
1337
1338                 /* the HW doesn't support frag first/later */
1339                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1340                         return -EOPNOTSUPP;
1341
1342                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1343                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1344                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1345                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1346
1347                         /* the HW doesn't need L3 inline to match on frag=no */
1348                         if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1349                                 *match_level = MLX5_INLINE_MODE_L2;
1350         /* ***  L2 attributes parsing up to here *** */
1351                         else
1352                                 *match_level = MLX5_INLINE_MODE_IP;
1353                 }
1354         }
1355
1356         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1357                 struct flow_dissector_key_basic *key =
1358                         skb_flow_dissector_target(f->dissector,
1359                                                   FLOW_DISSECTOR_KEY_BASIC,
1360                                                   f->key);
1361                 struct flow_dissector_key_basic *mask =
1362                         skb_flow_dissector_target(f->dissector,
1363                                                   FLOW_DISSECTOR_KEY_BASIC,
1364                                                   f->mask);
1365                 ip_proto = key->ip_proto;
1366
1367                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1368                          mask->ip_proto);
1369                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1370                          key->ip_proto);
1371
1372                 if (mask->ip_proto)
1373                         *match_level = MLX5_MATCH_L3;
1374         }
1375
1376         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1377                 struct flow_dissector_key_ipv4_addrs *key =
1378                         skb_flow_dissector_target(f->dissector,
1379                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1380                                                   f->key);
1381                 struct flow_dissector_key_ipv4_addrs *mask =
1382                         skb_flow_dissector_target(f->dissector,
1383                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1384                                                   f->mask);
1385
1386                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1387                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1388                        &mask->src, sizeof(mask->src));
1389                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1390                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1391                        &key->src, sizeof(key->src));
1392                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1393                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1394                        &mask->dst, sizeof(mask->dst));
1395                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1396                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1397                        &key->dst, sizeof(key->dst));
1398
1399                 if (mask->src || mask->dst)
1400                         *match_level = MLX5_MATCH_L3;
1401         }
1402
1403         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1404                 struct flow_dissector_key_ipv6_addrs *key =
1405                         skb_flow_dissector_target(f->dissector,
1406                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1407                                                   f->key);
1408                 struct flow_dissector_key_ipv6_addrs *mask =
1409                         skb_flow_dissector_target(f->dissector,
1410                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1411                                                   f->mask);
1412
1413                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1414                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1415                        &mask->src, sizeof(mask->src));
1416                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1417                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1418                        &key->src, sizeof(key->src));
1419
1420                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1421                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1422                        &mask->dst, sizeof(mask->dst));
1423                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1424                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1425                        &key->dst, sizeof(key->dst));
1426
1427                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1428                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1429                         *match_level = MLX5_MATCH_L3;
1430         }
1431
1432         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1433                 struct flow_dissector_key_ip *key =
1434                         skb_flow_dissector_target(f->dissector,
1435                                                   FLOW_DISSECTOR_KEY_IP,
1436                                                   f->key);
1437                 struct flow_dissector_key_ip *mask =
1438                         skb_flow_dissector_target(f->dissector,
1439                                                   FLOW_DISSECTOR_KEY_IP,
1440                                                   f->mask);
1441
1442                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1443                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1444
1445                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1446                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1447
1448                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1449                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1450
1451                 if (mask->ttl &&
1452                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1453                                                 ft_field_support.outer_ipv4_ttl))
1454                         return -EOPNOTSUPP;
1455
1456                 if (mask->tos || mask->ttl)
1457                         *match_level = MLX5_MATCH_L3;
1458         }
1459
1460         /* ***  L3 attributes parsing up to here *** */
1461
1462         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1463                 struct flow_dissector_key_ports *key =
1464                         skb_flow_dissector_target(f->dissector,
1465                                                   FLOW_DISSECTOR_KEY_PORTS,
1466                                                   f->key);
1467                 struct flow_dissector_key_ports *mask =
1468                         skb_flow_dissector_target(f->dissector,
1469                                                   FLOW_DISSECTOR_KEY_PORTS,
1470                                                   f->mask);
1471                 switch (ip_proto) {
1472                 case IPPROTO_TCP:
1473                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1474                                  tcp_sport, ntohs(mask->src));
1475                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1476                                  tcp_sport, ntohs(key->src));
1477
1478                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1479                                  tcp_dport, ntohs(mask->dst));
1480                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1481                                  tcp_dport, ntohs(key->dst));
1482                         break;
1483
1484                 case IPPROTO_UDP:
1485                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1486                                  udp_sport, ntohs(mask->src));
1487                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1488                                  udp_sport, ntohs(key->src));
1489
1490                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1491                                  udp_dport, ntohs(mask->dst));
1492                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1493                                  udp_dport, ntohs(key->dst));
1494                         break;
1495                 default:
1496                         netdev_err(priv->netdev,
1497                                    "Only UDP and TCP transport are supported\n");
1498                         return -EINVAL;
1499                 }
1500
1501                 if (mask->src || mask->dst)
1502                         *match_level = MLX5_MATCH_L4;
1503         }
1504
1505         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1506                 struct flow_dissector_key_tcp *key =
1507                         skb_flow_dissector_target(f->dissector,
1508                                                   FLOW_DISSECTOR_KEY_TCP,
1509                                                   f->key);
1510                 struct flow_dissector_key_tcp *mask =
1511                         skb_flow_dissector_target(f->dissector,
1512                                                   FLOW_DISSECTOR_KEY_TCP,
1513                                                   f->mask);
1514
1515                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1516                          ntohs(mask->flags));
1517                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1518                          ntohs(key->flags));
1519
1520                 if (mask->flags)
1521                         *match_level = MLX5_MATCH_L4;
1522         }
1523
1524         return 0;
1525 }
1526
1527 static int parse_cls_flower(struct mlx5e_priv *priv,
1528                             struct mlx5e_tc_flow *flow,
1529                             struct mlx5_flow_spec *spec,
1530                             struct tc_cls_flower_offload *f)
1531 {
1532         struct mlx5_core_dev *dev = priv->mdev;
1533         struct mlx5_eswitch *esw = dev->priv.eswitch;
1534         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1535         struct mlx5_eswitch_rep *rep;
1536         u8 match_level;
1537         int err;
1538
1539         err = __parse_cls_flower(priv, spec, f, &match_level);
1540
1541         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1542                 rep = rpriv->rep;
1543                 if (rep->vport != FDB_UPLINK_VPORT &&
1544                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1545                     esw->offloads.inline_mode < match_level)) {
1546                         netdev_warn(priv->netdev,
1547                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1548                                     match_level, esw->offloads.inline_mode);
1549                         return -EOPNOTSUPP;
1550                 }
1551         }
1552
1553         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1554                 flow->esw_attr->match_level = match_level;
1555         else
1556                 flow->nic_attr->match_level = match_level;
1557
1558         return err;
1559 }
1560
1561 struct pedit_headers {
1562         struct ethhdr  eth;
1563         struct iphdr   ip4;
1564         struct ipv6hdr ip6;
1565         struct tcphdr  tcp;
1566         struct udphdr  udp;
1567 };
1568
1569 static int pedit_header_offsets[] = {
1570         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1571         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1572         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1573         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1574         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1575 };
1576
1577 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1578
1579 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1580                          struct pedit_headers *masks,
1581                          struct pedit_headers *vals)
1582 {
1583         u32 *curr_pmask, *curr_pval;
1584
1585         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1586                 goto out_err;
1587
1588         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1589         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1590
1591         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1592                 goto out_err;
1593
1594         *curr_pmask |= mask;
1595         *curr_pval  |= (val & mask);
1596
1597         return 0;
1598
1599 out_err:
1600         return -EOPNOTSUPP;
1601 }
1602
1603 struct mlx5_fields {
1604         u8  field;
1605         u8  size;
1606         u32 offset;
1607 };
1608
1609 #define OFFLOAD(fw_field, size, field, off) \
1610                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1611
1612 static struct mlx5_fields fields[] = {
1613         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1614         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1615         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1616         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1617         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1618
1619         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1620         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1621         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1622
1623         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1624         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1625         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1626         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1627         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1628         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1629         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1630         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1631         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1632
1633         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1634         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1635         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1636
1637         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1638         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1639 };
1640
1641 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1642  * max from the SW pedit action. On success, it says how many HW actions were
1643  * actually parsed.
1644  */
1645 static int offload_pedit_fields(struct pedit_headers *masks,
1646                                 struct pedit_headers *vals,
1647                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
1648 {
1649         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1650         int i, action_size, nactions, max_actions, first, last, next_z;
1651         void *s_masks_p, *a_masks_p, *vals_p;
1652         struct mlx5_fields *f;
1653         u8 cmd, field_bsize;
1654         u32 s_mask, a_mask;
1655         unsigned long mask;
1656         __be32 mask_be32;
1657         __be16 mask_be16;
1658         void *action;
1659
1660         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1661         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1662         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1663         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1664
1665         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1666         action = parse_attr->mod_hdr_actions;
1667         max_actions = parse_attr->num_mod_hdr_actions;
1668         nactions = 0;
1669
1670         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1671                 f = &fields[i];
1672                 /* avoid seeing bits set from previous iterations */
1673                 s_mask = 0;
1674                 a_mask = 0;
1675
1676                 s_masks_p = (void *)set_masks + f->offset;
1677                 a_masks_p = (void *)add_masks + f->offset;
1678
1679                 memcpy(&s_mask, s_masks_p, f->size);
1680                 memcpy(&a_mask, a_masks_p, f->size);
1681
1682                 if (!s_mask && !a_mask) /* nothing to offload here */
1683                         continue;
1684
1685                 if (s_mask && a_mask) {
1686                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1687                         return -EOPNOTSUPP;
1688                 }
1689
1690                 if (nactions == max_actions) {
1691                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1692                         return -EOPNOTSUPP;
1693                 }
1694
1695                 if (s_mask) {
1696                         cmd  = MLX5_ACTION_TYPE_SET;
1697                         mask = s_mask;
1698                         vals_p = (void *)set_vals + f->offset;
1699                         /* clear to denote we consumed this field */
1700                         memset(s_masks_p, 0, f->size);
1701                 } else {
1702                         cmd  = MLX5_ACTION_TYPE_ADD;
1703                         mask = a_mask;
1704                         vals_p = (void *)add_vals + f->offset;
1705                         /* clear to denote we consumed this field */
1706                         memset(a_masks_p, 0, f->size);
1707                 }
1708
1709                 field_bsize = f->size * BITS_PER_BYTE;
1710
1711                 if (field_bsize == 32) {
1712                         mask_be32 = *(__be32 *)&mask;
1713                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1714                 } else if (field_bsize == 16) {
1715                         mask_be16 = *(__be16 *)&mask;
1716                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1717                 }
1718
1719                 first = find_first_bit(&mask, field_bsize);
1720                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1721                 last  = find_last_bit(&mask, field_bsize);
1722                 if (first < next_z && next_z < last) {
1723                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1724                                mask);
1725                         return -EOPNOTSUPP;
1726                 }
1727
1728                 MLX5_SET(set_action_in, action, action_type, cmd);
1729                 MLX5_SET(set_action_in, action, field, f->field);
1730
1731                 if (cmd == MLX5_ACTION_TYPE_SET) {
1732                         MLX5_SET(set_action_in, action, offset, first);
1733                         /* length is num of bits to be written, zero means length of 32 */
1734                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1735                 }
1736
1737                 if (field_bsize == 32)
1738                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1739                 else if (field_bsize == 16)
1740                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1741                 else if (field_bsize == 8)
1742                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1743
1744                 action += action_size;
1745                 nactions++;
1746         }
1747
1748         parse_attr->num_mod_hdr_actions = nactions;
1749         return 0;
1750 }
1751
1752 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1753                                  const struct tc_action *a, int namespace,
1754                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1755 {
1756         int nkeys, action_size, max_actions;
1757
1758         nkeys = tcf_pedit_nkeys(a);
1759         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1760
1761         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1762                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1763         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1764                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1765
1766         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1767         max_actions = min(max_actions, nkeys * 16);
1768
1769         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1770         if (!parse_attr->mod_hdr_actions)
1771                 return -ENOMEM;
1772
1773         parse_attr->num_mod_hdr_actions = max_actions;
1774         return 0;
1775 }
1776
1777 static const struct pedit_headers zero_masks = {};
1778
1779 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1780                                  const struct tc_action *a, int namespace,
1781                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1782 {
1783         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1784         int nkeys, i, err = -EOPNOTSUPP;
1785         u32 mask, val, offset;
1786         u8 cmd, htype;
1787
1788         nkeys = tcf_pedit_nkeys(a);
1789
1790         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1791         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1792
1793         for (i = 0; i < nkeys; i++) {
1794                 htype = tcf_pedit_htype(a, i);
1795                 cmd = tcf_pedit_cmd(a, i);
1796                 err = -EOPNOTSUPP; /* can't be all optimistic */
1797
1798                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1799                         netdev_warn(priv->netdev, "legacy pedit isn't offloaded\n");
1800                         goto out_err;
1801                 }
1802
1803                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1804                         netdev_warn(priv->netdev, "pedit cmd %d isn't offloaded\n", cmd);
1805                         goto out_err;
1806                 }
1807
1808                 mask = tcf_pedit_mask(a, i);
1809                 val = tcf_pedit_val(a, i);
1810                 offset = tcf_pedit_offset(a, i);
1811
1812                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1813                 if (err)
1814                         goto out_err;
1815         }
1816
1817         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1818         if (err)
1819                 goto out_err;
1820
1821         err = offload_pedit_fields(masks, vals, parse_attr);
1822         if (err < 0)
1823                 goto out_dealloc_parsed_actions;
1824
1825         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1826                 cmd_masks = &masks[cmd];
1827                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1828                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
1829                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1830                                        16, 1, cmd_masks, sizeof(zero_masks), true);
1831                         err = -EOPNOTSUPP;
1832                         goto out_dealloc_parsed_actions;
1833                 }
1834         }
1835
1836         return 0;
1837
1838 out_dealloc_parsed_actions:
1839         kfree(parse_attr->mod_hdr_actions);
1840 out_err:
1841         return err;
1842 }
1843
1844 static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags)
1845 {
1846         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1847                          TCA_CSUM_UPDATE_FLAG_UDP;
1848
1849         /*  The HW recalcs checksums only if re-writing headers */
1850         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1851                 netdev_warn(priv->netdev,
1852                             "TC csum action is only offloaded with pedit\n");
1853                 return false;
1854         }
1855
1856         if (update_flags & ~prot_flags) {
1857                 netdev_warn(priv->netdev,
1858                             "can't offload TC csum action for some header/s - flags %#x\n",
1859                             update_flags);
1860                 return false;
1861         }
1862
1863         return true;
1864 }
1865
1866 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
1867                                           struct tcf_exts *exts)
1868 {
1869         const struct tc_action *a;
1870         bool modify_ip_header;
1871         LIST_HEAD(actions);
1872         u8 htype, ip_proto;
1873         void *headers_v;
1874         u16 ethertype;
1875         int nkeys, i;
1876
1877         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1878         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1879
1880         /* for non-IP we only re-write MACs, so we're okay */
1881         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
1882                 goto out_ok;
1883
1884         modify_ip_header = false;
1885         tcf_exts_to_list(exts, &actions);
1886         list_for_each_entry(a, &actions, list) {
1887                 if (!is_tcf_pedit(a))
1888                         continue;
1889
1890                 nkeys = tcf_pedit_nkeys(a);
1891                 for (i = 0; i < nkeys; i++) {
1892                         htype = tcf_pedit_htype(a, i);
1893                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
1894                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
1895                                 modify_ip_header = true;
1896                                 break;
1897                         }
1898                 }
1899         }
1900
1901         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
1902         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
1903             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
1904                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
1905                 return false;
1906         }
1907
1908 out_ok:
1909         return true;
1910 }
1911
1912 static bool actions_match_supported(struct mlx5e_priv *priv,
1913                                     struct tcf_exts *exts,
1914                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
1915                                     struct mlx5e_tc_flow *flow)
1916 {
1917         u32 actions;
1918
1919         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1920                 actions = flow->esw_attr->action;
1921         else
1922                 actions = flow->nic_attr->action;
1923
1924         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1925                 return modify_header_match_supported(&parse_attr->spec, exts);
1926
1927         return true;
1928 }
1929
1930 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
1931 {
1932         struct mlx5_core_dev *fmdev, *pmdev;
1933         u16 func_id, peer_id;
1934
1935         fmdev = priv->mdev;
1936         pmdev = peer_priv->mdev;
1937
1938         func_id = (u16)((fmdev->pdev->bus->number << 8) | PCI_SLOT(fmdev->pdev->devfn));
1939         peer_id = (u16)((pmdev->pdev->bus->number << 8) | PCI_SLOT(pmdev->pdev->devfn));
1940
1941         return (func_id == peer_id);
1942 }
1943
1944 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
1945                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
1946                                 struct mlx5e_tc_flow *flow)
1947 {
1948         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
1949         const struct tc_action *a;
1950         LIST_HEAD(actions);
1951         u32 action = 0;
1952         int err;
1953
1954         if (!tcf_exts_has_actions(exts))
1955                 return -EINVAL;
1956
1957         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
1958
1959         tcf_exts_to_list(exts, &actions);
1960         list_for_each_entry(a, &actions, list) {
1961                 if (is_tcf_gact_shot(a)) {
1962                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
1963                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
1964                                                flow_table_properties_nic_receive.flow_counter))
1965                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
1966                         continue;
1967                 }
1968
1969                 if (is_tcf_pedit(a)) {
1970                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
1971                                                     parse_attr);
1972                         if (err)
1973                                 return err;
1974
1975                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
1976                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1977                         continue;
1978                 }
1979
1980                 if (is_tcf_csum(a)) {
1981                         if (csum_offload_supported(priv, action,
1982                                                    tcf_csum_update_flags(a)))
1983                                 continue;
1984
1985                         return -EOPNOTSUPP;
1986                 }
1987
1988                 if (is_tcf_mirred_egress_redirect(a)) {
1989                         struct net_device *peer_dev = tcf_mirred_dev(a);
1990
1991                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
1992                             same_hw_devs(priv, netdev_priv(peer_dev))) {
1993                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
1994                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
1995                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
1996                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
1997                         } else {
1998                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
1999                                             peer_dev->name);
2000                                 return -EINVAL;
2001                         }
2002                         continue;
2003                 }
2004
2005                 if (is_tcf_skbedit_mark(a)) {
2006                         u32 mark = tcf_skbedit_mark(a);
2007
2008                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2009                                 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
2010                                             mark);
2011                                 return -EINVAL;
2012                         }
2013
2014                         attr->flow_tag = mark;
2015                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2016                         continue;
2017                 }
2018
2019                 return -EINVAL;
2020         }
2021
2022         attr->action = action;
2023         if (!actions_match_supported(priv, exts, parse_attr, flow))
2024                 return -EOPNOTSUPP;
2025
2026         return 0;
2027 }
2028
2029 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2030                                  struct ip_tunnel_key *b)
2031 {
2032         return memcmp(a, b, sizeof(*a));
2033 }
2034
2035 static inline int hash_encap_info(struct ip_tunnel_key *key)
2036 {
2037         return jhash(key, sizeof(*key), 0);
2038 }
2039
2040 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2041                                    struct net_device *mirred_dev,
2042                                    struct net_device **out_dev,
2043                                    struct flowi4 *fl4,
2044                                    struct neighbour **out_n,
2045                                    int *out_ttl)
2046 {
2047         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2048         struct mlx5e_rep_priv *uplink_rpriv;
2049         struct rtable *rt;
2050         struct neighbour *n = NULL;
2051
2052 #if IS_ENABLED(CONFIG_INET)
2053         int ret;
2054
2055         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2056         ret = PTR_ERR_OR_ZERO(rt);
2057         if (ret)
2058                 return ret;
2059 #else
2060         return -EOPNOTSUPP;
2061 #endif
2062         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2063         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2064         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2065                 *out_dev = uplink_rpriv->netdev;
2066         else
2067                 *out_dev = rt->dst.dev;
2068
2069         *out_ttl = ip4_dst_hoplimit(&rt->dst);
2070         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2071         ip_rt_put(rt);
2072         if (!n)
2073                 return -ENOMEM;
2074
2075         *out_n = n;
2076         return 0;
2077 }
2078
2079 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2080                                    struct net_device *mirred_dev,
2081                                    struct net_device **out_dev,
2082                                    struct flowi6 *fl6,
2083                                    struct neighbour **out_n,
2084                                    int *out_ttl)
2085 {
2086         struct neighbour *n = NULL;
2087         struct dst_entry *dst;
2088
2089 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2090         struct mlx5e_rep_priv *uplink_rpriv;
2091         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2092         int ret;
2093
2094         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2095                                          fl6);
2096         if (ret < 0)
2097                 return ret;
2098
2099         *out_ttl = ip6_dst_hoplimit(dst);
2100
2101         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2102         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2103         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2104                 *out_dev = uplink_rpriv->netdev;
2105         else
2106                 *out_dev = dst->dev;
2107 #else
2108         return -EOPNOTSUPP;
2109 #endif
2110
2111         n = dst_neigh_lookup(dst, &fl6->daddr);
2112         dst_release(dst);
2113         if (!n)
2114                 return -ENOMEM;
2115
2116         *out_n = n;
2117         return 0;
2118 }
2119
2120 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2121                                   char buf[], int encap_size,
2122                                   unsigned char h_dest[ETH_ALEN],
2123                                   int ttl,
2124                                   __be32 daddr,
2125                                   __be32 saddr,
2126                                   __be16 udp_dst_port,
2127                                   __be32 vx_vni)
2128 {
2129         struct ethhdr *eth = (struct ethhdr *)buf;
2130         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2131         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2132         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2133
2134         memset(buf, 0, encap_size);
2135
2136         ether_addr_copy(eth->h_dest, h_dest);
2137         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2138         eth->h_proto = htons(ETH_P_IP);
2139
2140         ip->daddr = daddr;
2141         ip->saddr = saddr;
2142
2143         ip->ttl = ttl;
2144         ip->protocol = IPPROTO_UDP;
2145         ip->version = 0x4;
2146         ip->ihl = 0x5;
2147
2148         udp->dest = udp_dst_port;
2149         vxh->vx_flags = VXLAN_HF_VNI;
2150         vxh->vx_vni = vxlan_vni_field(vx_vni);
2151 }
2152
2153 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2154                                   char buf[], int encap_size,
2155                                   unsigned char h_dest[ETH_ALEN],
2156                                   int ttl,
2157                                   struct in6_addr *daddr,
2158                                   struct in6_addr *saddr,
2159                                   __be16 udp_dst_port,
2160                                   __be32 vx_vni)
2161 {
2162         struct ethhdr *eth = (struct ethhdr *)buf;
2163         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2164         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2165         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2166
2167         memset(buf, 0, encap_size);
2168
2169         ether_addr_copy(eth->h_dest, h_dest);
2170         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2171         eth->h_proto = htons(ETH_P_IPV6);
2172
2173         ip6_flow_hdr(ip6h, 0, 0);
2174         /* the HW fills up ipv6 payload len */
2175         ip6h->nexthdr     = IPPROTO_UDP;
2176         ip6h->hop_limit   = ttl;
2177         ip6h->daddr       = *daddr;
2178         ip6h->saddr       = *saddr;
2179
2180         udp->dest = udp_dst_port;
2181         vxh->vx_flags = VXLAN_HF_VNI;
2182         vxh->vx_vni = vxlan_vni_field(vx_vni);
2183 }
2184
2185 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2186                                           struct net_device *mirred_dev,
2187                                           struct mlx5e_encap_entry *e)
2188 {
2189         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2190         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2191         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2192         struct net_device *out_dev;
2193         struct neighbour *n = NULL;
2194         struct flowi4 fl4 = {};
2195         char *encap_header;
2196         int ttl, err;
2197         u8 nud_state;
2198
2199         if (max_encap_size < ipv4_encap_size) {
2200                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2201                                ipv4_encap_size, max_encap_size);
2202                 return -EOPNOTSUPP;
2203         }
2204
2205         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2206         if (!encap_header)
2207                 return -ENOMEM;
2208
2209         switch (e->tunnel_type) {
2210         case MLX5_HEADER_TYPE_VXLAN:
2211                 fl4.flowi4_proto = IPPROTO_UDP;
2212                 fl4.fl4_dport = tun_key->tp_dst;
2213                 break;
2214         default:
2215                 err = -EOPNOTSUPP;
2216                 goto free_encap;
2217         }
2218         fl4.flowi4_tos = tun_key->tos;
2219         fl4.daddr = tun_key->u.ipv4.dst;
2220         fl4.saddr = tun_key->u.ipv4.src;
2221
2222         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2223                                       &fl4, &n, &ttl);
2224         if (err)
2225                 goto free_encap;
2226
2227         /* used by mlx5e_detach_encap to lookup a neigh hash table
2228          * entry in the neigh hash table when a user deletes a rule
2229          */
2230         e->m_neigh.dev = n->dev;
2231         e->m_neigh.family = n->ops->family;
2232         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2233         e->out_dev = out_dev;
2234
2235         /* It's importent to add the neigh to the hash table before checking
2236          * the neigh validity state. So if we'll get a notification, in case the
2237          * neigh changes it's validity state, we would find the relevant neigh
2238          * in the hash.
2239          */
2240         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2241         if (err)
2242                 goto free_encap;
2243
2244         read_lock_bh(&n->lock);
2245         nud_state = n->nud_state;
2246         ether_addr_copy(e->h_dest, n->ha);
2247         read_unlock_bh(&n->lock);
2248
2249         switch (e->tunnel_type) {
2250         case MLX5_HEADER_TYPE_VXLAN:
2251                 gen_vxlan_header_ipv4(out_dev, encap_header,
2252                                       ipv4_encap_size, e->h_dest, ttl,
2253                                       fl4.daddr,
2254                                       fl4.saddr, tun_key->tp_dst,
2255                                       tunnel_id_to_key32(tun_key->tun_id));
2256                 break;
2257         default:
2258                 err = -EOPNOTSUPP;
2259                 goto destroy_neigh_entry;
2260         }
2261         e->encap_size = ipv4_encap_size;
2262         e->encap_header = encap_header;
2263
2264         if (!(nud_state & NUD_VALID)) {
2265                 neigh_event_send(n, NULL);
2266                 err = -EAGAIN;
2267                 goto out;
2268         }
2269
2270         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2271                                ipv4_encap_size, encap_header, &e->encap_id);
2272         if (err)
2273                 goto destroy_neigh_entry;
2274
2275         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2276         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2277         neigh_release(n);
2278         return err;
2279
2280 destroy_neigh_entry:
2281         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2282 free_encap:
2283         kfree(encap_header);
2284 out:
2285         if (n)
2286                 neigh_release(n);
2287         return err;
2288 }
2289
2290 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2291                                           struct net_device *mirred_dev,
2292                                           struct mlx5e_encap_entry *e)
2293 {
2294         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2295         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2296         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2297         struct net_device *out_dev;
2298         struct neighbour *n = NULL;
2299         struct flowi6 fl6 = {};
2300         char *encap_header;
2301         int err, ttl = 0;
2302         u8 nud_state;
2303
2304         if (max_encap_size < ipv6_encap_size) {
2305                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2306                                ipv6_encap_size, max_encap_size);
2307                 return -EOPNOTSUPP;
2308         }
2309
2310         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2311         if (!encap_header)
2312                 return -ENOMEM;
2313
2314         switch (e->tunnel_type) {
2315         case MLX5_HEADER_TYPE_VXLAN:
2316                 fl6.flowi6_proto = IPPROTO_UDP;
2317                 fl6.fl6_dport = tun_key->tp_dst;
2318                 break;
2319         default:
2320                 err = -EOPNOTSUPP;
2321                 goto free_encap;
2322         }
2323
2324         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2325         fl6.daddr = tun_key->u.ipv6.dst;
2326         fl6.saddr = tun_key->u.ipv6.src;
2327
2328         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2329                                       &fl6, &n, &ttl);
2330         if (err)
2331                 goto free_encap;
2332
2333         /* used by mlx5e_detach_encap to lookup a neigh hash table
2334          * entry in the neigh hash table when a user deletes a rule
2335          */
2336         e->m_neigh.dev = n->dev;
2337         e->m_neigh.family = n->ops->family;
2338         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2339         e->out_dev = out_dev;
2340
2341         /* It's importent to add the neigh to the hash table before checking
2342          * the neigh validity state. So if we'll get a notification, in case the
2343          * neigh changes it's validity state, we would find the relevant neigh
2344          * in the hash.
2345          */
2346         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2347         if (err)
2348                 goto free_encap;
2349
2350         read_lock_bh(&n->lock);
2351         nud_state = n->nud_state;
2352         ether_addr_copy(e->h_dest, n->ha);
2353         read_unlock_bh(&n->lock);
2354
2355         switch (e->tunnel_type) {
2356         case MLX5_HEADER_TYPE_VXLAN:
2357                 gen_vxlan_header_ipv6(out_dev, encap_header,
2358                                       ipv6_encap_size, e->h_dest, ttl,
2359                                       &fl6.daddr,
2360                                       &fl6.saddr, tun_key->tp_dst,
2361                                       tunnel_id_to_key32(tun_key->tun_id));
2362                 break;
2363         default:
2364                 err = -EOPNOTSUPP;
2365                 goto destroy_neigh_entry;
2366         }
2367
2368         e->encap_size = ipv6_encap_size;
2369         e->encap_header = encap_header;
2370
2371         if (!(nud_state & NUD_VALID)) {
2372                 neigh_event_send(n, NULL);
2373                 err = -EAGAIN;
2374                 goto out;
2375         }
2376
2377         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2378                                ipv6_encap_size, encap_header, &e->encap_id);
2379         if (err)
2380                 goto destroy_neigh_entry;
2381
2382         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2383         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2384         neigh_release(n);
2385         return err;
2386
2387 destroy_neigh_entry:
2388         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2389 free_encap:
2390         kfree(encap_header);
2391 out:
2392         if (n)
2393                 neigh_release(n);
2394         return err;
2395 }
2396
2397 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2398                               struct ip_tunnel_info *tun_info,
2399                               struct net_device *mirred_dev,
2400                               struct net_device **encap_dev,
2401                               struct mlx5e_tc_flow *flow)
2402 {
2403         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2404         struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw,
2405                                                                            REP_ETH);
2406         struct net_device *up_dev = uplink_rpriv->netdev;
2407         unsigned short family = ip_tunnel_info_af(tun_info);
2408         struct mlx5e_priv *up_priv = netdev_priv(up_dev);
2409         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2410         struct ip_tunnel_key *key = &tun_info->key;
2411         struct mlx5e_encap_entry *e;
2412         int tunnel_type, err = 0;
2413         uintptr_t hash_key;
2414         bool found = false;
2415
2416         /* udp dst port must be set */
2417         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2418                 goto vxlan_encap_offload_err;
2419
2420         /* setting udp src port isn't supported */
2421         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2422 vxlan_encap_offload_err:
2423                 netdev_warn(priv->netdev,
2424                             "must set udp dst port and not set udp src port\n");
2425                 return -EOPNOTSUPP;
2426         }
2427
2428         if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->tp_dst)) &&
2429             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2430                 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
2431         } else {
2432                 netdev_warn(priv->netdev,
2433                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2434                 return -EOPNOTSUPP;
2435         }
2436
2437         hash_key = hash_encap_info(key);
2438
2439         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2440                                    encap_hlist, hash_key) {
2441                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2442                         found = true;
2443                         break;
2444                 }
2445         }
2446
2447         /* must verify if encap is valid or not */
2448         if (found)
2449                 goto attach_flow;
2450
2451         e = kzalloc(sizeof(*e), GFP_KERNEL);
2452         if (!e)
2453                 return -ENOMEM;
2454
2455         e->tun_info = *tun_info;
2456         e->tunnel_type = tunnel_type;
2457         INIT_LIST_HEAD(&e->flows);
2458
2459         if (family == AF_INET)
2460                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2461         else if (family == AF_INET6)
2462                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2463
2464         if (err && err != -EAGAIN)
2465                 goto out_err;
2466
2467         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2468
2469 attach_flow:
2470         list_add(&flow->encap, &e->flows);
2471         *encap_dev = e->out_dev;
2472         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2473                 attr->encap_id = e->encap_id;
2474         else
2475                 err = -EAGAIN;
2476
2477         return err;
2478
2479 out_err:
2480         kfree(e);
2481         return err;
2482 }
2483
2484 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2485                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2486                                 struct mlx5e_tc_flow *flow)
2487 {
2488         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2489         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2490         struct ip_tunnel_info *info = NULL;
2491         const struct tc_action *a;
2492         LIST_HEAD(actions);
2493         bool encap = false;
2494         u32 action = 0;
2495
2496         if (!tcf_exts_has_actions(exts))
2497                 return -EINVAL;
2498
2499         attr->in_rep = rpriv->rep;
2500
2501         tcf_exts_to_list(exts, &actions);
2502         list_for_each_entry(a, &actions, list) {
2503                 if (is_tcf_gact_shot(a)) {
2504                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2505                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2506                         continue;
2507                 }
2508
2509                 if (is_tcf_pedit(a)) {
2510                         int err;
2511
2512                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2513                                                     parse_attr);
2514                         if (err)
2515                                 return err;
2516
2517                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2518                         continue;
2519                 }
2520
2521                 if (is_tcf_csum(a)) {
2522                         if (csum_offload_supported(priv, action,
2523                                                    tcf_csum_update_flags(a)))
2524                                 continue;
2525
2526                         return -EOPNOTSUPP;
2527                 }
2528
2529                 if (is_tcf_mirred_egress_redirect(a)) {
2530                         struct net_device *out_dev;
2531                         struct mlx5e_priv *out_priv;
2532
2533                         out_dev = tcf_mirred_dev(a);
2534
2535                         if (switchdev_port_same_parent_id(priv->netdev,
2536                                                           out_dev)) {
2537                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2538                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2539                                 out_priv = netdev_priv(out_dev);
2540                                 rpriv = out_priv->ppriv;
2541                                 attr->out_rep = rpriv->rep;
2542                         } else if (encap) {
2543                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2544                                 parse_attr->tun_info = *info;
2545                                 attr->parse_attr = parse_attr;
2546                                 action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
2547                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2548                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2549                                 /* attr->out_rep is resolved when we handle encap */
2550                         } else {
2551                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2552                                        priv->netdev->name, out_dev->name);
2553                                 return -EINVAL;
2554                         }
2555                         continue;
2556                 }
2557
2558                 if (is_tcf_tunnel_set(a)) {
2559                         info = tcf_tunnel_info(a);
2560                         if (info)
2561                                 encap = true;
2562                         else
2563                                 return -EOPNOTSUPP;
2564                         continue;
2565                 }
2566
2567                 if (is_tcf_vlan(a)) {
2568                         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2569                                 action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2570                         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2571                                 action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2572                                 attr->vlan_vid = tcf_vlan_push_vid(a);
2573                                 if (mlx5_eswitch_vlan_actions_supported(priv->mdev)) {
2574                                         attr->vlan_prio = tcf_vlan_push_prio(a);
2575                                         attr->vlan_proto = tcf_vlan_push_proto(a);
2576                                         if (!attr->vlan_proto)
2577                                                 attr->vlan_proto = htons(ETH_P_8021Q);
2578                                 } else if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2579                                            tcf_vlan_push_prio(a)) {
2580                                         return -EOPNOTSUPP;
2581                                 }
2582                         } else { /* action is TCA_VLAN_ACT_MODIFY */
2583                                 return -EOPNOTSUPP;
2584                         }
2585                         continue;
2586                 }
2587
2588                 if (is_tcf_tunnel_release(a)) {
2589                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2590                         continue;
2591                 }
2592
2593                 return -EINVAL;
2594         }
2595
2596         attr->action = action;
2597         if (!actions_match_supported(priv, exts, parse_attr, flow))
2598                 return -EOPNOTSUPP;
2599
2600         return 0;
2601 }
2602
2603 int mlx5e_configure_flower(struct mlx5e_priv *priv,
2604                            struct tc_cls_flower_offload *f)
2605 {
2606         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2607         struct mlx5e_tc_flow_parse_attr *parse_attr;
2608         struct mlx5e_tc_table *tc = &priv->fs.tc;
2609         struct mlx5e_tc_flow *flow;
2610         int attr_size, err = 0;
2611         u8 flow_flags = 0;
2612
2613         if (esw && esw->mode == SRIOV_OFFLOADS) {
2614                 flow_flags = MLX5E_TC_FLOW_ESWITCH;
2615                 attr_size  = sizeof(struct mlx5_esw_flow_attr);
2616         } else {
2617                 flow_flags = MLX5E_TC_FLOW_NIC;
2618                 attr_size  = sizeof(struct mlx5_nic_flow_attr);
2619         }
2620
2621         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
2622         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
2623         if (!parse_attr || !flow) {
2624                 err = -ENOMEM;
2625                 goto err_free;
2626         }
2627
2628         flow->cookie = f->cookie;
2629         flow->flags = flow_flags;
2630
2631         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
2632         if (err < 0)
2633                 goto err_free;
2634
2635         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
2636                 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow);
2637                 if (err < 0)
2638                         goto err_free;
2639                 flow->rule = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow);
2640         } else {
2641                 err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow);
2642                 if (err < 0)
2643                         goto err_free;
2644                 flow->rule = mlx5e_tc_add_nic_flow(priv, parse_attr, flow);
2645         }
2646
2647         if (IS_ERR(flow->rule)) {
2648                 err = PTR_ERR(flow->rule);
2649                 if (err != -EAGAIN)
2650                         goto err_free;
2651         }
2652
2653         if (err != -EAGAIN)
2654                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
2655
2656         if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) ||
2657             !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP))
2658                 kvfree(parse_attr);
2659
2660         err = rhashtable_insert_fast(&tc->ht, &flow->node,
2661                                      tc->ht_params);
2662         if (err) {
2663                 mlx5e_tc_del_flow(priv, flow);
2664                 kfree(flow);
2665         }
2666
2667         return err;
2668
2669 err_free:
2670         kvfree(parse_attr);
2671         kfree(flow);
2672         return err;
2673 }
2674
2675 int mlx5e_delete_flower(struct mlx5e_priv *priv,
2676                         struct tc_cls_flower_offload *f)
2677 {
2678         struct mlx5e_tc_flow *flow;
2679         struct mlx5e_tc_table *tc = &priv->fs.tc;
2680
2681         flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2682                                       tc->ht_params);
2683         if (!flow)
2684                 return -EINVAL;
2685
2686         rhashtable_remove_fast(&tc->ht, &flow->node, tc->ht_params);
2687
2688         mlx5e_tc_del_flow(priv, flow);
2689
2690         kfree(flow);
2691
2692         return 0;
2693 }
2694
2695 int mlx5e_stats_flower(struct mlx5e_priv *priv,
2696                        struct tc_cls_flower_offload *f)
2697 {
2698         struct mlx5e_tc_table *tc = &priv->fs.tc;
2699         struct mlx5e_tc_flow *flow;
2700         struct mlx5_fc *counter;
2701         u64 bytes;
2702         u64 packets;
2703         u64 lastuse;
2704
2705         flow = rhashtable_lookup_fast(&tc->ht, &f->cookie,
2706                                       tc->ht_params);
2707         if (!flow)
2708                 return -EINVAL;
2709
2710         if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
2711                 return 0;
2712
2713         counter = mlx5_flow_rule_counter(flow->rule);
2714         if (!counter)
2715                 return 0;
2716
2717         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
2718
2719         tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
2720
2721         return 0;
2722 }
2723
2724 static const struct rhashtable_params mlx5e_tc_flow_ht_params = {
2725         .head_offset = offsetof(struct mlx5e_tc_flow, node),
2726         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2727         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2728         .automatic_shrinking = true,
2729 };
2730
2731 int mlx5e_tc_init(struct mlx5e_priv *priv)
2732 {
2733         struct mlx5e_tc_table *tc = &priv->fs.tc;
2734
2735         hash_init(tc->mod_hdr_tbl);
2736         hash_init(tc->hairpin_tbl);
2737
2738         tc->ht_params = mlx5e_tc_flow_ht_params;
2739         return rhashtable_init(&tc->ht, &tc->ht_params);
2740 }
2741
2742 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
2743 {
2744         struct mlx5e_tc_flow *flow = ptr;
2745         struct mlx5e_priv *priv = arg;
2746
2747         mlx5e_tc_del_flow(priv, flow);
2748         kfree(flow);
2749 }
2750
2751 void mlx5e_tc_cleanup(struct mlx5e_priv *priv)
2752 {
2753         struct mlx5e_tc_table *tc = &priv->fs.tc;
2754
2755         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, priv);
2756
2757         if (!IS_ERR_OR_NULL(tc->t)) {
2758                 mlx5_destroy_flow_table(tc->t);
2759                 tc->t = NULL;
2760         }
2761 }