drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/sch_generic.h>
  35 #include <net/pkt_cls.h>
  36 #include <net/tc_act/tc_gact.h>
  37 #include <net/tc_act/tc_skbedit.h>
  38 #include <linux/mlx5/fs.h>
  39 #include <linux/mlx5/device.h>
  40 #include <linux/rhashtable.h>
  41 #include <net/switchdev.h>
  42 #include <net/tc_act/tc_mirred.h>
  43 #include <net/tc_act/tc_vlan.h>
  44 #include <net/tc_act/tc_tunnel_key.h>
  45 #include <net/tc_act/tc_pedit.h>
  46 #include <net/tc_act/tc_csum.h>
  47 #include <net/vxlan.h>
  48 #include <net/arp.h>
  49 #include "en.h"
  50 #include "en_rep.h"
  51 #include "en_tc.h"
  52 #include "eswitch.h"
  53 #include "vxlan.h"
  54 #include "fs_core.h"
  55
  56 struct mlx5_nic_flow_attr {
  57         u32 action;
  58         u32 flow_tag;
  59         u32 mod_hdr_id;
  60         u32 hairpin_tirn;
  61         u8 match_level;
  62         struct mlx5_flow_table  *hairpin_ft;
  63 };
  64
  65 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1)
  66
  67 enum {
  68         MLX5E_TC_FLOW_INGRESS   = MLX5E_TC_INGRESS,
  69         MLX5E_TC_FLOW_EGRESS    = MLX5E_TC_EGRESS,
  70         MLX5E_TC_FLOW_ESWITCH   = BIT(MLX5E_TC_FLOW_BASE),
  71         MLX5E_TC_FLOW_NIC       = BIT(MLX5E_TC_FLOW_BASE + 1),
  72         MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2),
  73         MLX5E_TC_FLOW_HAIRPIN   = BIT(MLX5E_TC_FLOW_BASE + 3),
  74         MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4),
  75 };
  76
  77 struct mlx5e_tc_flow {
  78         struct rhash_head       node;
  79         struct mlx5e_priv       *priv;
  80         u64                     cookie;
  81         u8                      flags;
  82         struct mlx5_flow_handle *rule;
  83         struct list_head        encap;   /* flows sharing the same encap ID */
  84         struct list_head        mod_hdr; /* flows sharing the same mod hdr ID */
  85         struct list_head        hairpin; /* flows sharing the same hairpin */
  86         union {
  87                 struct mlx5_esw_flow_attr esw_attr[0];
  88                 struct mlx5_nic_flow_attr nic_attr[0];
  89         };
  90 };
  91
  92 struct mlx5e_tc_flow_parse_attr {
  93         struct ip_tunnel_info tun_info;
  94         struct mlx5_flow_spec spec;
  95         int num_mod_hdr_actions;
  96         void *mod_hdr_actions;
  97         int mirred_ifindex;
  98 };
  99
 100 enum {
 101         MLX5_HEADER_TYPE_VXLAN = 0x0,
 102         MLX5_HEADER_TYPE_NVGRE = 0x1,
 103 };
 104
 105 #define MLX5E_TC_TABLE_NUM_GROUPS 4
 106 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16)
 107
 108 struct mlx5e_hairpin {
 109         struct mlx5_hairpin *pair;
 110
 111         struct mlx5_core_dev *func_mdev;
 112         struct mlx5e_priv *func_priv;
 113         u32 tdn;
 114         u32 tirn;
 115
 116         int num_channels;
 117         struct mlx5e_rqt indir_rqt;
 118         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
 119         struct mlx5e_ttc_table ttc;
 120 };
 121
 122 struct mlx5e_hairpin_entry {
 123         /* a node of a hash table which keeps all the  hairpin entries */
 124         struct hlist_node hairpin_hlist;
 125
 126         /* flows sharing the same hairpin */
 127         struct list_head flows;
 128
 129         u16 peer_vhca_id;
 130         u8 prio;
 131         struct mlx5e_hairpin *hp;
 132 };
 133
 134 struct mod_hdr_key {
 135         int num_actions;
 136         void *actions;
 137 };
 138
 139 struct mlx5e_mod_hdr_entry {
 140         /* a node of a hash table which keeps all the mod_hdr entries */
 141         struct hlist_node mod_hdr_hlist;
 142
 143         /* flows sharing the same mod_hdr entry */
 144         struct list_head flows;
 145
 146         struct mod_hdr_key key;
 147
 148         u32 mod_hdr_id;
 149 };
 150
 151 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto)
 152
 153 static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key)
 154 {
 155         return jhash(key->actions,
 156                      key->num_actions * MLX5_MH_ACT_SZ, 0);
 157 }
 158
 159 static inline int cmp_mod_hdr_info(struct mod_hdr_key *a,
 160                                    struct mod_hdr_key *b)
 161 {
 162         if (a->num_actions != b->num_actions)
 163                 return 1;
 164
 165         return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ);
 166 }
 167
 168 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
 169                                 struct mlx5e_tc_flow *flow,
 170                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
 171 {
 172         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 173         int num_actions, actions_size, namespace, err;
 174         struct mlx5e_mod_hdr_entry *mh;
 175         struct mod_hdr_key key;
 176         bool found = false;
 177         u32 hash_key;
 178
 179         num_actions  = parse_attr->num_mod_hdr_actions;
 180         actions_size = MLX5_MH_ACT_SZ * num_actions;
 181
 182         key.actions = parse_attr->mod_hdr_actions;
 183         key.num_actions = num_actions;
 184
 185         hash_key = hash_mod_hdr_info(&key);
 186
 187         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
 188                 namespace = MLX5_FLOW_NAMESPACE_FDB;
 189                 hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh,
 190                                        mod_hdr_hlist, hash_key) {
 191                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 192                                 found = true;
 193                                 break;
 194                         }
 195                 }
 196         } else {
 197                 namespace = MLX5_FLOW_NAMESPACE_KERNEL;
 198                 hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh,
 199                                        mod_hdr_hlist, hash_key) {
 200                         if (!cmp_mod_hdr_info(&mh->key, &key)) {
 201                                 found = true;
 202                                 break;
 203                         }
 204                 }
 205         }
 206
 207         if (found)
 208                 goto attach_flow;
 209
 210         mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL);
 211         if (!mh)
 212                 return -ENOMEM;
 213
 214         mh->key.actions = (void *)mh + sizeof(*mh);
 215         memcpy(mh->key.actions, key.actions, actions_size);
 216         mh->key.num_actions = num_actions;
 217         INIT_LIST_HEAD(&mh->flows);
 218
 219         err = mlx5_modify_header_alloc(priv->mdev, namespace,
 220                                        mh->key.num_actions,
 221                                        mh->key.actions,
 222                                        &mh->mod_hdr_id);
 223         if (err)
 224                 goto out_err;
 225
 226         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 227                 hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 228         else
 229                 hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key);
 230
 231 attach_flow:
 232         list_add(&flow->mod_hdr, &mh->flows);
 233         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
 234                 flow->esw_attr->mod_hdr_id = mh->mod_hdr_id;
 235         else
 236                 flow->nic_attr->mod_hdr_id = mh->mod_hdr_id;
 237
 238         return 0;
 239
 240 out_err:
 241         kfree(mh);
 242         return err;
 243 }
 244
 245 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
 246                                  struct mlx5e_tc_flow *flow)
 247 {
 248         struct list_head *next = flow->mod_hdr.next;
 249
 250         list_del(&flow->mod_hdr);
 251
 252         if (list_empty(next)) {
 253                 struct mlx5e_mod_hdr_entry *mh;
 254
 255                 mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows);
 256
 257                 mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id);
 258                 hash_del(&mh->mod_hdr_hlist);
 259                 kfree(mh);
 260         }
 261 }
 262
 263 static
 264 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 265 {
 266         struct net_device *netdev;
 267         struct mlx5e_priv *priv;
 268
 269         netdev = __dev_get_by_index(net, ifindex);
 270         priv = netdev_priv(netdev);
 271         return priv->mdev;
 272 }
 273
 274 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 275 {
 276         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0};
 277         void *tirc;
 278         int err;
 279
 280         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 281         if (err)
 282                 goto alloc_tdn_err;
 283
 284         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 285
 286         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
 287         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
 288         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 289
 290         err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
 291         if (err)
 292                 goto create_tir_err;
 293
 294         return 0;
 295
 296 create_tir_err:
 297         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 298 alloc_tdn_err:
 299         return err;
 300 }
 301
 302 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 303 {
 304         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
 305         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 306 }
 307
 308 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
 309 {
 310         u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
 311         struct mlx5e_priv *priv = hp->func_priv;
 312         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
 313
 314         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
 315                                       hp->num_channels);
 316
 317         for (i = 0; i < sz; i++) {
 318                 ix = i;
 319                 if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR)
 320                         ix = mlx5e_bits_invert(i, ilog2(sz));
 321                 ix = indirection_rqt[ix];
 322                 rqn = hp->pair->rqn[ix];
 323                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
 324         }
 325 }
 326
 327 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 328 {
 329         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
 330         struct mlx5e_priv *priv = hp->func_priv;
 331         struct mlx5_core_dev *mdev = priv->mdev;
 332         void *rqtc;
 333         u32 *in;
 334
 335         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
 336         in = kvzalloc(inlen, GFP_KERNEL);
 337         if (!in)
 338                 return -ENOMEM;
 339
 340         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
 341
 342         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
 343         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
 344
 345         mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
 346
 347         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
 348         if (!err)
 349                 hp->indir_rqt.enabled = true;
 350
 351         kvfree(in);
 352         return err;
 353 }
 354
 355 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 356 {
 357         struct mlx5e_priv *priv = hp->func_priv;
 358         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
 359         int tt, i, err;
 360         void *tirc;
 361
 362         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 363                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
 364                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 365
 366                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 367                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
 368                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
 369                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
 370
 371                 err = mlx5_core_create_tir(hp->func_mdev, in,
 372                                            MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
 373                 if (err) {
 374                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 375                         goto err_destroy_tirs;
 376                 }
 377         }
 378         return 0;
 379
 380 err_destroy_tirs:
 381         for (i = 0; i < tt; i++)
 382                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
 383         return err;
 384 }
 385
 386 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 387 {
 388         int tt;
 389
 390         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 391                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
 392 }
 393
 394 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 395                                          struct ttc_params *ttc_params)
 396 {
 397         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 398         int tt;
 399
 400         memset(ttc_params, 0, sizeof(*ttc_params));
 401
 402         ttc_params->any_tt_tirn = hp->tirn;
 403
 404         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 405                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
 406
 407         ft_attr->max_fte = MLX5E_NUM_TT;
 408         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 409         ft_attr->prio = MLX5E_TC_PRIO;
 410 }
 411
 412 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 413 {
 414         struct mlx5e_priv *priv = hp->func_priv;
 415         struct ttc_params ttc_params;
 416         int err;
 417
 418         err = mlx5e_hairpin_create_indirect_rqt(hp);
 419         if (err)
 420                 return err;
 421
 422         err = mlx5e_hairpin_create_indirect_tirs(hp);
 423         if (err)
 424                 goto err_create_indirect_tirs;
 425
 426         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 427         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
 428         if (err)
 429                 goto err_create_ttc_table;
 430
 431         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 432                    hp->num_channels, hp->ttc.ft.t->id);
 433
 434         return 0;
 435
 436 err_create_ttc_table:
 437         mlx5e_hairpin_destroy_indirect_tirs(hp);
 438 err_create_indirect_tirs:
 439         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 440
 441         return err;
 442 }
 443
 444 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 445 {
 446         struct mlx5e_priv *priv = hp->func_priv;
 447
 448         mlx5e_destroy_ttc_table(priv, &hp->ttc);
 449         mlx5e_hairpin_destroy_indirect_tirs(hp);
 450         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 451 }
 452
 453 static struct mlx5e_hairpin *
 454 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 455                      int peer_ifindex)
 456 {
 457         struct mlx5_core_dev *func_mdev, *peer_mdev;
 458         struct mlx5e_hairpin *hp;
 459         struct mlx5_hairpin *pair;
 460         int err;
 461
 462         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 463         if (!hp)
 464                 return ERR_PTR(-ENOMEM);
 465
 466         func_mdev = priv->mdev;
 467         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 468
 469         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 470         if (IS_ERR(pair)) {
 471                 err = PTR_ERR(pair);
 472                 goto create_pair_err;
 473         }
 474         hp->pair = pair;
 475         hp->func_mdev = func_mdev;
 476         hp->func_priv = priv;
 477         hp->num_channels = params->num_channels;
 478
 479         err = mlx5e_hairpin_create_transport(hp);
 480         if (err)
 481                 goto create_transport_err;
 482
 483         if (hp->num_channels > 1) {
 484                 err = mlx5e_hairpin_rss_init(hp);
 485                 if (err)
 486                         goto rss_init_err;
 487         }
 488
 489         return hp;
 490
 491 rss_init_err:
 492         mlx5e_hairpin_destroy_transport(hp);
 493 create_transport_err:
 494         mlx5_core_hairpin_destroy(hp->pair);
 495 create_pair_err:
 496         kfree(hp);
 497         return ERR_PTR(err);
 498 }
 499
 500 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 501 {
 502         if (hp->num_channels > 1)
 503                 mlx5e_hairpin_rss_cleanup(hp);
 504         mlx5e_hairpin_destroy_transport(hp);
 505         mlx5_core_hairpin_destroy(hp->pair);
 506         kvfree(hp);
 507 }
 508
 509 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 510 {
 511         return (peer_vhca_id << 16 | prio);
 512 }
 513
 514 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 515                                                      u16 peer_vhca_id, u8 prio)
 516 {
 517         struct mlx5e_hairpin_entry *hpe;
 518         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 519
 520         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
 521                                hairpin_hlist, hash_key) {
 522                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio)
 523                         return hpe;
 524         }
 525
 526         return NULL;
 527 }
 528
 529 #define UNKNOWN_MATCH_PRIO 8
 530
 531 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 532                                   struct mlx5_flow_spec *spec, u8 *match_prio)
 533 {
 534         void *headers_c, *headers_v;
 535         u8 prio_val, prio_mask = 0;
 536         bool vlan_present;
 537
 538 #ifdef CONFIG_MLX5_CORE_EN_DCB
 539         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
 540                 netdev_warn(priv->netdev,
 541                             "only PCP trust state supported for hairpin\n");
 542                 return -EOPNOTSUPP;
 543         }
 544 #endif
 545         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
 546         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
 547
 548         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
 549         if (vlan_present) {
 550                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
 551                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
 552         }
 553
 554         if (!vlan_present || !prio_mask) {
 555                 prio_val = UNKNOWN_MATCH_PRIO;
 556         } else if (prio_mask != 0x7) {
 557                 netdev_warn(priv->netdev,
 558                             "masked priority match not supported for hairpin\n");
 559                 return -EOPNOTSUPP;
 560         }
 561
 562         *match_prio = prio_val;
 563         return 0;
 564 }
 565
 566 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
 567                                   struct mlx5e_tc_flow *flow,
 568                                   struct mlx5e_tc_flow_parse_attr *parse_attr)
 569 {
 570         int peer_ifindex = parse_attr->mirred_ifindex;
 571         struct mlx5_hairpin_params params;
 572         struct mlx5_core_dev *peer_mdev;
 573         struct mlx5e_hairpin_entry *hpe;
 574         struct mlx5e_hairpin *hp;
 575         u64 link_speed64;
 576         u32 link_speed;
 577         u8 match_prio;
 578         u16 peer_id;
 579         int err;
 580
 581         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 582         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
 583                 netdev_warn(priv->netdev, "hairpin is not supported\n");
 584                 return -EOPNOTSUPP;
 585         }
 586
 587         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
 588         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio);
 589         if (err)
 590                 return err;
 591         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
 592         if (hpe)
 593                 goto attach_flow;
 594
 595         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
 596         if (!hpe)
 597                 return -ENOMEM;
 598
 599         INIT_LIST_HEAD(&hpe->flows);
 600         hpe->peer_vhca_id = peer_id;
 601         hpe->prio = match_prio;
 602
 603         params.log_data_size = 15;
 604         params.log_data_size = min_t(u8, params.log_data_size,
 605                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
 606         params.log_data_size = max_t(u8, params.log_data_size,
 607                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
 608
 609         params.log_num_packets = params.log_data_size -
 610                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
 611         params.log_num_packets = min_t(u8, params.log_num_packets,
 612                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
 613
 614         params.q_counter = priv->q_counter;
 615         /* set hairpin pair per each 50Gbs share of the link */
 616         mlx5e_get_max_linkspeed(priv->mdev, &link_speed);
 617         link_speed = max_t(u32, link_speed, 50000);
 618         link_speed64 = link_speed;
 619         do_div(link_speed64, 50000);
 620         params.num_channels = link_speed64;
 621
 622         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
 623         if (IS_ERR(hp)) {
 624                 err = PTR_ERR(hp);
 625                 goto create_hairpin_err;
 626         }
 627
 628         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
 629                    hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,
 630                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
 631
 632         hpe->hp = hp;
 633         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
 634                  hash_hairpin_info(peer_id, match_prio));
 635
 636 attach_flow:
 637         if (hpe->hp->num_channels > 1) {
 638                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS;
 639                 flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
 640         } else {
 641                 flow->nic_attr->hairpin_tirn = hpe->hp->tirn;
 642         }
 643         list_add(&flow->hairpin, &hpe->flows);
 644
 645         return 0;
 646
 647 create_hairpin_err:
 648         kfree(hpe);
 649         return err;
 650 }
 651
 652 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
 653                                    struct mlx5e_tc_flow *flow)
 654 {
 655         struct list_head *next = flow->hairpin.next;
 656
 657         list_del(&flow->hairpin);
 658
 659         /* no more hairpin flows for us, release the hairpin pair */
 660         if (list_empty(next)) {
 661                 struct mlx5e_hairpin_entry *hpe;
 662
 663                 hpe = list_entry(next, struct mlx5e_hairpin_entry, flows);
 664
 665                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 666                            hpe->hp->pair->peer_mdev->priv.name);
 667
 668                 mlx5e_hairpin_destroy(hpe->hp);
 669                 hash_del(&hpe->hairpin_hlist);
 670                 kfree(hpe);
 671         }
 672 }
 673
 674 static struct mlx5_flow_handle *
 675 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
 676                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 677                       struct mlx5e_tc_flow *flow)
 678 {
 679         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 680         struct mlx5_core_dev *dev = priv->mdev;
 681         struct mlx5_flow_destination dest[2] = {};
 682         struct mlx5_flow_act flow_act = {
 683                 .action = attr->action,
 684                 .has_flow_tag = true,
 685                 .flow_tag = attr->flow_tag,
 686                 .encap_id = 0,
 687         };
 688         struct mlx5_fc *counter = NULL;
 689         struct mlx5_flow_handle *rule;
 690         bool table_created = false;
 691         int err, dest_ix = 0;
 692
 693         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) {
 694                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr);
 695                 if (err) {
 696                         rule = ERR_PTR(err);
 697                         goto err_add_hairpin_flow;
 698                 }
 699                 if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) {
 700                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 701                         dest[dest_ix].ft = attr->hairpin_ft;
 702                 } else {
 703                         dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 704                         dest[dest_ix].tir_num = attr->hairpin_tirn;
 705                 }
 706                 dest_ix++;
 707         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
 708                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 709                 dest[dest_ix].ft = priv->fs.vlan.ft.t;
 710                 dest_ix++;
 711         }
 712
 713         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 714                 counter = mlx5_fc_create(dev, true);
 715                 if (IS_ERR(counter)) {
 716                         rule = ERR_CAST(counter);
 717                         goto err_fc_create;
 718                 }
 719                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
 720                 dest[dest_ix].counter = counter;
 721                 dest_ix++;
 722         }
 723
 724         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 725                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 726                 flow_act.modify_id = attr->mod_hdr_id;
 727                 kfree(parse_attr->mod_hdr_actions);
 728                 if (err) {
 729                         rule = ERR_PTR(err);
 730                         goto err_create_mod_hdr_id;
 731                 }
 732         }
 733
 734         if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
 735                 int tc_grp_size, tc_tbl_size;
 736                 u32 max_flow_counter;
 737
 738                 max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
 739                                     MLX5_CAP_GEN(dev, max_flow_counter_15_0);
 740
 741                 tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
 742
 743                 tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
 744                                     BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
 745
 746                 priv->fs.tc.t =
 747                         mlx5_create_auto_grouped_flow_table(priv->fs.ns,
 748                                                             MLX5E_TC_PRIO,
 749                                                             tc_tbl_size,
 750                                                             MLX5E_TC_TABLE_NUM_GROUPS,
 751                                                             MLX5E_TC_FT_LEVEL, 0);
 752                 if (IS_ERR(priv->fs.tc.t)) {
 753                         netdev_err(priv->netdev,
 754                                    "Failed to create tc offload table\n");
 755                         rule = ERR_CAST(priv->fs.tc.t);
 756                         goto err_create_ft;
 757                 }
 758
 759                 table_created = true;
 760         }
 761
 762         if (attr->match_level != MLX5_MATCH_NONE)
 763                 parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
 764
 765         rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
 766                                    &flow_act, dest, dest_ix);
 767
 768         if (IS_ERR(rule))
 769                 goto err_add_rule;
 770
 771         return rule;
 772
 773 err_add_rule:
 774         if (table_created) {
 775                 mlx5_destroy_flow_table(priv->fs.tc.t);
 776                 priv->fs.tc.t = NULL;
 777         }
 778 err_create_ft:
 779         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 780                 mlx5e_detach_mod_hdr(priv, flow);
 781 err_create_mod_hdr_id:
 782         mlx5_fc_destroy(dev, counter);
 783 err_fc_create:
 784         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 785                 mlx5e_hairpin_flow_del(priv, flow);
 786 err_add_hairpin_flow:
 787         return rule;
 788 }
 789
 790 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
 791                                   struct mlx5e_tc_flow *flow)
 792 {
 793         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
 794         struct mlx5_fc *counter = NULL;
 795
 796         counter = mlx5_flow_rule_counter(flow->rule);
 797         mlx5_del_flow_rules(flow->rule);
 798         mlx5_fc_destroy(priv->mdev, counter);
 799
 800         if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) {
 801                 mlx5_destroy_flow_table(priv->fs.tc.t);
 802                 priv->fs.tc.t = NULL;
 803         }
 804
 805         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 806                 mlx5e_detach_mod_hdr(priv, flow);
 807
 808         if (flow->flags & MLX5E_TC_FLOW_HAIRPIN)
 809                 mlx5e_hairpin_flow_del(priv, flow);
 810 }
 811
 812 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
 813                                struct mlx5e_tc_flow *flow);
 814
 815 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
 816                               struct ip_tunnel_info *tun_info,
 817                               struct net_device *mirred_dev,
 818                               struct net_device **encap_dev,
 819                               struct mlx5e_tc_flow *flow);
 820
 821 static struct mlx5_flow_handle *
 822 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
 823                       struct mlx5e_tc_flow_parse_attr *parse_attr,
 824                       struct mlx5e_tc_flow *flow)
 825 {
 826         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 827         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 828         struct net_device *out_dev, *encap_dev = NULL;
 829         struct mlx5_flow_handle *rule = NULL;
 830         struct mlx5e_rep_priv *rpriv;
 831         struct mlx5e_priv *out_priv;
 832         int err;
 833
 834         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
 835                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
 836                                              attr->parse_attr->mirred_ifindex);
 837                 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
 838                                          out_dev, &encap_dev, flow);
 839                 if (err) {
 840                         rule = ERR_PTR(err);
 841                         if (err != -EAGAIN)
 842                                 goto err_attach_encap;
 843                 }
 844                 out_priv = netdev_priv(encap_dev);
 845                 rpriv = out_priv->ppriv;
 846                 attr->out_rep = rpriv->rep;
 847                 attr->out_mdev = out_priv->mdev;
 848         }
 849
 850         err = mlx5_eswitch_add_vlan_action(esw, attr);
 851         if (err) {
 852                 rule = ERR_PTR(err);
 853                 goto err_add_vlan;
 854         }
 855
 856         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 857                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 858                 kfree(parse_attr->mod_hdr_actions);
 859                 if (err) {
 860                         rule = ERR_PTR(err);
 861                         goto err_mod_hdr;
 862                 }
 863         }
 864
 865         /* we get here if (1) there's no error (rule being null) or when
 866          * (2) there's an encap action and we're on -EAGAIN (no valid neigh)
 867          */
 868         if (rule != ERR_PTR(-EAGAIN)) {
 869                 rule = mlx5_eswitch_add_offloaded_rule(esw, &parse_attr->spec, attr);
 870                 if (IS_ERR(rule))
 871                         goto err_add_rule;
 872         }
 873         return rule;
 874
 875 err_add_rule:
 876         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 877                 mlx5e_detach_mod_hdr(priv, flow);
 878 err_mod_hdr:
 879         mlx5_eswitch_del_vlan_action(esw, attr);
 880 err_add_vlan:
 881         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
 882                 mlx5e_detach_encap(priv, flow);
 883 err_attach_encap:
 884         return rule;
 885 }
 886
 887 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
 888                                   struct mlx5e_tc_flow *flow)
 889 {
 890         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 891         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
 892
 893         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 894                 flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 895                 mlx5_eswitch_del_offloaded_rule(esw, flow->rule, attr);
 896         }
 897
 898         mlx5_eswitch_del_vlan_action(esw, attr);
 899
 900         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) {
 901                 mlx5e_detach_encap(priv, flow);
 902                 kvfree(attr->parse_attr);
 903         }
 904
 905         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 906                 mlx5e_detach_mod_hdr(priv, flow);
 907 }
 908
 909 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
 910                               struct mlx5e_encap_entry *e)
 911 {
 912         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 913         struct mlx5_esw_flow_attr *esw_attr;
 914         struct mlx5e_tc_flow *flow;
 915         int err;
 916
 917         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
 918                                e->encap_size, e->encap_header,
 919                                &e->encap_id);
 920         if (err) {
 921                 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
 922                                err);
 923                 return;
 924         }
 925         e->flags |= MLX5_ENCAP_ENTRY_VALID;
 926         mlx5e_rep_queue_neigh_stats_work(priv);
 927
 928         list_for_each_entry(flow, &e->flows, encap) {
 929                 esw_attr = flow->esw_attr;
 930                 esw_attr->encap_id = e->encap_id;
 931                 flow->rule = mlx5_eswitch_add_offloaded_rule(esw, &esw_attr->parse_attr->spec, esw_attr);
 932                 if (IS_ERR(flow->rule)) {
 933                         err = PTR_ERR(flow->rule);
 934                         mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
 935                                        err);
 936                         continue;
 937                 }
 938                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
 939         }
 940 }
 941
 942 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
 943                               struct mlx5e_encap_entry *e)
 944 {
 945         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 946         struct mlx5e_tc_flow *flow;
 947
 948         list_for_each_entry(flow, &e->flows, encap) {
 949                 if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 950                         flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED;
 951                         mlx5_eswitch_del_offloaded_rule(esw, flow->rule, flow->esw_attr);
 952                 }
 953         }
 954
 955         if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
 956                 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
 957                 mlx5_encap_dealloc(priv->mdev, e->encap_id);
 958         }
 959 }
 960
 961 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
 962 {
 963         struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
 964         u64 bytes, packets, lastuse = 0;
 965         struct mlx5e_tc_flow *flow;
 966         struct mlx5e_encap_entry *e;
 967         struct mlx5_fc *counter;
 968         struct neigh_table *tbl;
 969         bool neigh_used = false;
 970         struct neighbour *n;
 971
 972         if (m_neigh->family == AF_INET)
 973                 tbl = &arp_tbl;
 974 #if IS_ENABLED(CONFIG_IPV6)
 975         else if (m_neigh->family == AF_INET6)
 976                 tbl = &nd_tbl;
 977 #endif
 978         else
 979                 return;
 980
 981         list_for_each_entry(e, &nhe->encap_list, encap_list) {
 982                 if (!(e->flags & MLX5_ENCAP_ENTRY_VALID))
 983                         continue;
 984                 list_for_each_entry(flow, &e->flows, encap) {
 985                         if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 986                                 counter = mlx5_flow_rule_counter(flow->rule);
 987                                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
 988                                 if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
 989                                         neigh_used = true;
 990                                         break;
 991                                 }
 992                         }
 993                 }
 994                 if (neigh_used)
 995                         break;
 996         }
 997
 998         if (neigh_used) {
 999                 nhe->reported_lastuse = jiffies;
1000
1001                 /* find the relevant neigh according to the cached device and
1002                  * dst ip pair
1003                  */
1004                 n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1005                 if (!n) {
1006                         WARN(1, "The neighbour already freed\n");
1007                         return;
1008                 }
1009
1010                 neigh_event_send(n, NULL);
1011                 neigh_release(n);
1012         }
1013 }
1014
1015 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1016                                struct mlx5e_tc_flow *flow)
1017 {
1018         struct list_head *next = flow->encap.next;
1019
1020         list_del(&flow->encap);
1021         if (list_empty(next)) {
1022                 struct mlx5e_encap_entry *e;
1023
1024                 e = list_entry(next, struct mlx5e_encap_entry, flows);
1025                 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1026
1027                 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1028                         mlx5_encap_dealloc(priv->mdev, e->encap_id);
1029
1030                 hash_del_rcu(&e->encap_hlist);
1031                 kfree(e->encap_header);
1032                 kfree(e);
1033         }
1034 }
1035
1036 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1037                               struct mlx5e_tc_flow *flow)
1038 {
1039         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1040                 mlx5e_tc_del_fdb_flow(priv, flow);
1041         else
1042                 mlx5e_tc_del_nic_flow(priv, flow);
1043 }
1044
1045 static void parse_vxlan_attr(struct mlx5_flow_spec *spec,
1046                              struct tc_cls_flower_offload *f)
1047 {
1048         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1049                                        outer_headers);
1050         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1051                                        outer_headers);
1052         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1053                                     misc_parameters);
1054         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1055                                     misc_parameters);
1056
1057         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol);
1058         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
1059
1060         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
1061                 struct flow_dissector_key_keyid *key =
1062                         skb_flow_dissector_target(f->dissector,
1063                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1064                                                   f->key);
1065                 struct flow_dissector_key_keyid *mask =
1066                         skb_flow_dissector_target(f->dissector,
1067                                                   FLOW_DISSECTOR_KEY_ENC_KEYID,
1068                                                   f->mask);
1069                 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
1070                          be32_to_cpu(mask->keyid));
1071                 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
1072                          be32_to_cpu(key->keyid));
1073         }
1074 }
1075
1076 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1077                              struct mlx5_flow_spec *spec,
1078                              struct tc_cls_flower_offload *f)
1079 {
1080         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1081                                        outer_headers);
1082         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1083                                        outer_headers);
1084
1085         struct flow_dissector_key_control *enc_control =
1086                 skb_flow_dissector_target(f->dissector,
1087                                           FLOW_DISSECTOR_KEY_ENC_CONTROL,
1088                                           f->key);
1089
1090         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) {
1091                 struct flow_dissector_key_ports *key =
1092                         skb_flow_dissector_target(f->dissector,
1093                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1094                                                   f->key);
1095                 struct flow_dissector_key_ports *mask =
1096                         skb_flow_dissector_target(f->dissector,
1097                                                   FLOW_DISSECTOR_KEY_ENC_PORTS,
1098                                                   f->mask);
1099                 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1100                 struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1101                 struct net_device *up_dev = uplink_rpriv->netdev;
1102                 struct mlx5e_priv *up_priv = netdev_priv(up_dev);
1103
1104                 /* Full udp dst port must be given */
1105                 if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
1106                         goto vxlan_match_offload_err;
1107
1108                 if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->dst)) &&
1109                     MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
1110                         parse_vxlan_attr(spec, f);
1111                 else {
1112                         netdev_warn(priv->netdev,
1113                                     "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->dst));
1114                         return -EOPNOTSUPP;
1115                 }
1116
1117                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1118                          udp_dport, ntohs(mask->dst));
1119                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1120                          udp_dport, ntohs(key->dst));
1121
1122                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1123                          udp_sport, ntohs(mask->src));
1124                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1125                          udp_sport, ntohs(key->src));
1126         } else { /* udp dst port must be given */
1127 vxlan_match_offload_err:
1128                 netdev_warn(priv->netdev,
1129                             "IP tunnel decap offload supported only for vxlan, must set UDP dport\n");
1130                 return -EOPNOTSUPP;
1131         }
1132
1133         if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1134                 struct flow_dissector_key_ipv4_addrs *key =
1135                         skb_flow_dissector_target(f->dissector,
1136                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1137                                                   f->key);
1138                 struct flow_dissector_key_ipv4_addrs *mask =
1139                         skb_flow_dissector_target(f->dissector,
1140                                                   FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1141                                                   f->mask);
1142                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1143                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1144                          ntohl(mask->src));
1145                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1146                          src_ipv4_src_ipv6.ipv4_layout.ipv4,
1147                          ntohl(key->src));
1148
1149                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1150                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1151                          ntohl(mask->dst));
1152                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1153                          dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
1154                          ntohl(key->dst));
1155
1156                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1157                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
1158         } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1159                 struct flow_dissector_key_ipv6_addrs *key =
1160                         skb_flow_dissector_target(f->dissector,
1161                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1162                                                   f->key);
1163                 struct flow_dissector_key_ipv6_addrs *mask =
1164                         skb_flow_dissector_target(f->dissector,
1165                                                   FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1166                                                   f->mask);
1167
1168                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1169                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1170                        &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1171                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1172                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1173                        &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1174
1175                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1176                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1177                        &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1178                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1179                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1180                        &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
1181
1182                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
1183                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
1184         }
1185
1186         /* Enforce DMAC when offloading incoming tunneled flows.
1187          * Flow counters require a match on the DMAC.
1188          */
1189         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16);
1190         MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0);
1191         ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1192                                      dmac_47_16), priv->netdev->dev_addr);
1193
1194         /* let software handle IP fragments */
1195         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1196         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
1197
1198         return 0;
1199 }
1200
1201 static int __parse_cls_flower(struct mlx5e_priv *priv,
1202                               struct mlx5_flow_spec *spec,
1203                               struct tc_cls_flower_offload *f,
1204                               u8 *match_level)
1205 {
1206         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1207                                        outer_headers);
1208         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1209                                        outer_headers);
1210         u16 addr_type = 0;
1211         u8 ip_proto = 0;
1212
1213         *match_level = MLX5_MATCH_NONE;
1214
1215         if (f->dissector->used_keys &
1216             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
1217               BIT(FLOW_DISSECTOR_KEY_BASIC) |
1218               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
1219               BIT(FLOW_DISSECTOR_KEY_VLAN) |
1220               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
1221               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
1222               BIT(FLOW_DISSECTOR_KEY_PORTS) |
1223               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
1224               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
1225               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
1226               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
1227               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
1228               BIT(FLOW_DISSECTOR_KEY_TCP) |
1229               BIT(FLOW_DISSECTOR_KEY_IP))) {
1230                 netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n",
1231                             f->dissector->used_keys);
1232                 return -EOPNOTSUPP;
1233         }
1234
1235         if ((dissector_uses_key(f->dissector,
1236                                 FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) ||
1237              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) ||
1238              dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) &&
1239             dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
1240                 struct flow_dissector_key_control *key =
1241                         skb_flow_dissector_target(f->dissector,
1242                                                   FLOW_DISSECTOR_KEY_ENC_CONTROL,
1243                                                   f->key);
1244                 switch (key->addr_type) {
1245                 case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
1246                 case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
1247                         if (parse_tunnel_attr(priv, spec, f))
1248                                 return -EOPNOTSUPP;
1249                         break;
1250                 default:
1251                         return -EOPNOTSUPP;
1252                 }
1253
1254                 /* In decap flow, header pointers should point to the inner
1255                  * headers, outer header were already set by parse_tunnel_attr
1256                  */
1257                 headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1258                                          inner_headers);
1259                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1260                                          inner_headers);
1261         }
1262
1263         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
1264                 struct flow_dissector_key_eth_addrs *key =
1265                         skb_flow_dissector_target(f->dissector,
1266                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1267                                                   f->key);
1268                 struct flow_dissector_key_eth_addrs *mask =
1269                         skb_flow_dissector_target(f->dissector,
1270                                                   FLOW_DISSECTOR_KEY_ETH_ADDRS,
1271                                                   f->mask);
1272
1273                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1274                                              dmac_47_16),
1275                                 mask->dst);
1276                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1277                                              dmac_47_16),
1278                                 key->dst);
1279
1280                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1281                                              smac_47_16),
1282                                 mask->src);
1283                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1284                                              smac_47_16),
1285                                 key->src);
1286
1287                 if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst))
1288                         *match_level = MLX5_MATCH_L2;
1289         }
1290
1291         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
1292                 struct flow_dissector_key_vlan *key =
1293                         skb_flow_dissector_target(f->dissector,
1294                                                   FLOW_DISSECTOR_KEY_VLAN,
1295                                                   f->key);
1296                 struct flow_dissector_key_vlan *mask =
1297                         skb_flow_dissector_target(f->dissector,
1298                                                   FLOW_DISSECTOR_KEY_VLAN,
1299                                                   f->mask);
1300                 if (mask->vlan_id || mask->vlan_priority) {
1301                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
1302                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
1303
1304                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
1305                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
1306
1307                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
1308                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
1309
1310                         *match_level = MLX5_MATCH_L2;
1311                 }
1312         }
1313
1314         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1315                 struct flow_dissector_key_basic *key =
1316                         skb_flow_dissector_target(f->dissector,
1317                                                   FLOW_DISSECTOR_KEY_BASIC,
1318                                                   f->key);
1319                 struct flow_dissector_key_basic *mask =
1320                         skb_flow_dissector_target(f->dissector,
1321                                                   FLOW_DISSECTOR_KEY_BASIC,
1322                                                   f->mask);
1323                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1324                          ntohs(mask->n_proto));
1325                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1326                          ntohs(key->n_proto));
1327
1328                 if (mask->n_proto)
1329                         *match_level = MLX5_MATCH_L2;
1330         }
1331
1332         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
1333                 struct flow_dissector_key_control *key =
1334                         skb_flow_dissector_target(f->dissector,
1335                                                   FLOW_DISSECTOR_KEY_CONTROL,
1336                                                   f->key);
1337
1338                 struct flow_dissector_key_control *mask =
1339                         skb_flow_dissector_target(f->dissector,
1340                                                   FLOW_DISSECTOR_KEY_CONTROL,
1341                                                   f->mask);
1342                 addr_type = key->addr_type;
1343
1344                 /* the HW doesn't support frag first/later */
1345                 if (mask->flags & FLOW_DIS_FIRST_FRAG)
1346                         return -EOPNOTSUPP;
1347
1348                 if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
1349                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
1350                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
1351                                  key->flags & FLOW_DIS_IS_FRAGMENT);
1352
1353                         /* the HW doesn't need L3 inline to match on frag=no */
1354                         if (!(key->flags & FLOW_DIS_IS_FRAGMENT))
1355                                 *match_level = MLX5_INLINE_MODE_L2;
1356         /* ***  L2 attributes parsing up to here *** */
1357                         else
1358                                 *match_level = MLX5_INLINE_MODE_IP;
1359                 }
1360         }
1361
1362         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
1363                 struct flow_dissector_key_basic *key =
1364                         skb_flow_dissector_target(f->dissector,
1365                                                   FLOW_DISSECTOR_KEY_BASIC,
1366                                                   f->key);
1367                 struct flow_dissector_key_basic *mask =
1368                         skb_flow_dissector_target(f->dissector,
1369                                                   FLOW_DISSECTOR_KEY_BASIC,
1370                                                   f->mask);
1371                 ip_proto = key->ip_proto;
1372
1373                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
1374                          mask->ip_proto);
1375                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
1376                          key->ip_proto);
1377
1378                 if (mask->ip_proto)
1379                         *match_level = MLX5_MATCH_L3;
1380         }
1381
1382         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
1383                 struct flow_dissector_key_ipv4_addrs *key =
1384                         skb_flow_dissector_target(f->dissector,
1385                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1386                                                   f->key);
1387                 struct flow_dissector_key_ipv4_addrs *mask =
1388                         skb_flow_dissector_target(f->dissector,
1389                                                   FLOW_DISSECTOR_KEY_IPV4_ADDRS,
1390                                                   f->mask);
1391
1392                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1393                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1394                        &mask->src, sizeof(mask->src));
1395                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1396                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
1397                        &key->src, sizeof(key->src));
1398                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1399                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1400                        &mask->dst, sizeof(mask->dst));
1401                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1402                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
1403                        &key->dst, sizeof(key->dst));
1404
1405                 if (mask->src || mask->dst)
1406                         *match_level = MLX5_MATCH_L3;
1407         }
1408
1409         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
1410                 struct flow_dissector_key_ipv6_addrs *key =
1411                         skb_flow_dissector_target(f->dissector,
1412                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1413                                                   f->key);
1414                 struct flow_dissector_key_ipv6_addrs *mask =
1415                         skb_flow_dissector_target(f->dissector,
1416                                                   FLOW_DISSECTOR_KEY_IPV6_ADDRS,
1417                                                   f->mask);
1418
1419                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1420                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1421                        &mask->src, sizeof(mask->src));
1422                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1423                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
1424                        &key->src, sizeof(key->src));
1425
1426                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
1427                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1428                        &mask->dst, sizeof(mask->dst));
1429                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
1430                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
1431                        &key->dst, sizeof(key->dst));
1432
1433                 if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY ||
1434                     ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY)
1435                         *match_level = MLX5_MATCH_L3;
1436         }
1437
1438         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) {
1439                 struct flow_dissector_key_ip *key =
1440                         skb_flow_dissector_target(f->dissector,
1441                                                   FLOW_DISSECTOR_KEY_IP,
1442                                                   f->key);
1443                 struct flow_dissector_key_ip *mask =
1444                         skb_flow_dissector_target(f->dissector,
1445                                                   FLOW_DISSECTOR_KEY_IP,
1446                                                   f->mask);
1447
1448                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3);
1449                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3);
1450
1451                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2);
1452                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos  >> 2);
1453
1454                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl);
1455                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl);
1456
1457                 if (mask->ttl &&
1458                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
1459                                                 ft_field_support.outer_ipv4_ttl))
1460                         return -EOPNOTSUPP;
1461
1462                 if (mask->tos || mask->ttl)
1463                         *match_level = MLX5_MATCH_L3;
1464         }
1465
1466         /* ***  L3 attributes parsing up to here *** */
1467
1468         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
1469                 struct flow_dissector_key_ports *key =
1470                         skb_flow_dissector_target(f->dissector,
1471                                                   FLOW_DISSECTOR_KEY_PORTS,
1472                                                   f->key);
1473                 struct flow_dissector_key_ports *mask =
1474                         skb_flow_dissector_target(f->dissector,
1475                                                   FLOW_DISSECTOR_KEY_PORTS,
1476                                                   f->mask);
1477                 switch (ip_proto) {
1478                 case IPPROTO_TCP:
1479                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1480                                  tcp_sport, ntohs(mask->src));
1481                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1482                                  tcp_sport, ntohs(key->src));
1483
1484                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1485                                  tcp_dport, ntohs(mask->dst));
1486                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1487                                  tcp_dport, ntohs(key->dst));
1488                         break;
1489
1490                 case IPPROTO_UDP:
1491                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1492                                  udp_sport, ntohs(mask->src));
1493                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1494                                  udp_sport, ntohs(key->src));
1495
1496                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
1497                                  udp_dport, ntohs(mask->dst));
1498                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
1499                                  udp_dport, ntohs(key->dst));
1500                         break;
1501                 default:
1502                         netdev_err(priv->netdev,
1503                                    "Only UDP and TCP transport are supported\n");
1504                         return -EINVAL;
1505                 }
1506
1507                 if (mask->src || mask->dst)
1508                         *match_level = MLX5_MATCH_L4;
1509         }
1510
1511         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) {
1512                 struct flow_dissector_key_tcp *key =
1513                         skb_flow_dissector_target(f->dissector,
1514                                                   FLOW_DISSECTOR_KEY_TCP,
1515                                                   f->key);
1516                 struct flow_dissector_key_tcp *mask =
1517                         skb_flow_dissector_target(f->dissector,
1518                                                   FLOW_DISSECTOR_KEY_TCP,
1519                                                   f->mask);
1520
1521                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
1522                          ntohs(mask->flags));
1523                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
1524                          ntohs(key->flags));
1525
1526                 if (mask->flags)
1527                         *match_level = MLX5_MATCH_L4;
1528         }
1529
1530         return 0;
1531 }
1532
1533 static int parse_cls_flower(struct mlx5e_priv *priv,
1534                             struct mlx5e_tc_flow *flow,
1535                             struct mlx5_flow_spec *spec,
1536                             struct tc_cls_flower_offload *f)
1537 {
1538         struct mlx5_core_dev *dev = priv->mdev;
1539         struct mlx5_eswitch *esw = dev->priv.eswitch;
1540         struct mlx5e_rep_priv *rpriv = priv->ppriv;
1541         struct mlx5_eswitch_rep *rep;
1542         u8 match_level;
1543         int err;
1544
1545         err = __parse_cls_flower(priv, spec, f, &match_level);
1546
1547         if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1548                 rep = rpriv->rep;
1549                 if (rep->vport != FDB_UPLINK_VPORT &&
1550                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1551                     esw->offloads.inline_mode < match_level)) {
1552                         netdev_warn(priv->netdev,
1553                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1554                                     match_level, esw->offloads.inline_mode);
1555                         return -EOPNOTSUPP;
1556                 }
1557         }
1558
1559         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1560                 flow->esw_attr->match_level = match_level;
1561         else
1562                 flow->nic_attr->match_level = match_level;
1563
1564         return err;
1565 }
1566
1567 struct pedit_headers {
1568         struct ethhdr  eth;
1569         struct iphdr   ip4;
1570         struct ipv6hdr ip6;
1571         struct tcphdr  tcp;
1572         struct udphdr  udp;
1573 };
1574
1575 static int pedit_header_offsets[] = {
1576         [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
1577         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
1578         [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
1579         [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
1580         [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
1581 };
1582
1583 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
1584
1585 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
1586                          struct pedit_headers *masks,
1587                          struct pedit_headers *vals)
1588 {
1589         u32 *curr_pmask, *curr_pval;
1590
1591         if (hdr_type >= __PEDIT_HDR_TYPE_MAX)
1592                 goto out_err;
1593
1594         curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset);
1595         curr_pval  = (u32 *)(pedit_header(vals, hdr_type) + offset);
1596
1597         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
1598                 goto out_err;
1599
1600         *curr_pmask |= mask;
1601         *curr_pval  |= (val & mask);
1602
1603         return 0;
1604
1605 out_err:
1606         return -EOPNOTSUPP;
1607 }
1608
1609 struct mlx5_fields {
1610         u8  field;
1611         u8  size;
1612         u32 offset;
1613 };
1614
1615 #define OFFLOAD(fw_field, size, field, off) \
1616                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)}
1617
1618 static struct mlx5_fields fields[] = {
1619         OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0),
1620         OFFLOAD(DMAC_15_0,  2, eth.h_dest[4], 0),
1621         OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0),
1622         OFFLOAD(SMAC_15_0,  2, eth.h_source[4], 0),
1623         OFFLOAD(ETHERTYPE,  2, eth.h_proto, 0),
1624
1625         OFFLOAD(IP_TTL, 1, ip4.ttl,   0),
1626         OFFLOAD(SIPV4,  4, ip4.saddr, 0),
1627         OFFLOAD(DIPV4,  4, ip4.daddr, 0),
1628
1629         OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0),
1630         OFFLOAD(SIPV6_95_64,  4, ip6.saddr.s6_addr32[1], 0),
1631         OFFLOAD(SIPV6_63_32,  4, ip6.saddr.s6_addr32[2], 0),
1632         OFFLOAD(SIPV6_31_0,   4, ip6.saddr.s6_addr32[3], 0),
1633         OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0),
1634         OFFLOAD(DIPV6_95_64,  4, ip6.daddr.s6_addr32[1], 0),
1635         OFFLOAD(DIPV6_63_32,  4, ip6.daddr.s6_addr32[2], 0),
1636         OFFLOAD(DIPV6_31_0,   4, ip6.daddr.s6_addr32[3], 0),
1637         OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0),
1638
1639         OFFLOAD(TCP_SPORT, 2, tcp.source,  0),
1640         OFFLOAD(TCP_DPORT, 2, tcp.dest,    0),
1641         OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5),
1642
1643         OFFLOAD(UDP_SPORT, 2, udp.source, 0),
1644         OFFLOAD(UDP_DPORT, 2, udp.dest,   0),
1645 };
1646
1647 /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at
1648  * max from the SW pedit action. On success, it says how many HW actions were
1649  * actually parsed.
1650  */
1651 static int offload_pedit_fields(struct pedit_headers *masks,
1652                                 struct pedit_headers *vals,
1653                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
1654 {
1655         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
1656         int i, action_size, nactions, max_actions, first, last, next_z;
1657         void *s_masks_p, *a_masks_p, *vals_p;
1658         struct mlx5_fields *f;
1659         u8 cmd, field_bsize;
1660         u32 s_mask, a_mask;
1661         unsigned long mask;
1662         __be32 mask_be32;
1663         __be16 mask_be16;
1664         void *action;
1665
1666         set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET];
1667         add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD];
1668         set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET];
1669         add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD];
1670
1671         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1672         action = parse_attr->mod_hdr_actions;
1673         max_actions = parse_attr->num_mod_hdr_actions;
1674         nactions = 0;
1675
1676         for (i = 0; i < ARRAY_SIZE(fields); i++) {
1677                 f = &fields[i];
1678                 /* avoid seeing bits set from previous iterations */
1679                 s_mask = 0;
1680                 a_mask = 0;
1681
1682                 s_masks_p = (void *)set_masks + f->offset;
1683                 a_masks_p = (void *)add_masks + f->offset;
1684
1685                 memcpy(&s_mask, s_masks_p, f->size);
1686                 memcpy(&a_mask, a_masks_p, f->size);
1687
1688                 if (!s_mask && !a_mask) /* nothing to offload here */
1689                         continue;
1690
1691                 if (s_mask && a_mask) {
1692                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
1693                         return -EOPNOTSUPP;
1694                 }
1695
1696                 if (nactions == max_actions) {
1697                         printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions);
1698                         return -EOPNOTSUPP;
1699                 }
1700
1701                 if (s_mask) {
1702                         cmd  = MLX5_ACTION_TYPE_SET;
1703                         mask = s_mask;
1704                         vals_p = (void *)set_vals + f->offset;
1705                         /* clear to denote we consumed this field */
1706                         memset(s_masks_p, 0, f->size);
1707                 } else {
1708                         cmd  = MLX5_ACTION_TYPE_ADD;
1709                         mask = a_mask;
1710                         vals_p = (void *)add_vals + f->offset;
1711                         /* clear to denote we consumed this field */
1712                         memset(a_masks_p, 0, f->size);
1713                 }
1714
1715                 field_bsize = f->size * BITS_PER_BYTE;
1716
1717                 if (field_bsize == 32) {
1718                         mask_be32 = *(__be32 *)&mask;
1719                         mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
1720                 } else if (field_bsize == 16) {
1721                         mask_be16 = *(__be16 *)&mask;
1722                         mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
1723                 }
1724
1725                 first = find_first_bit(&mask, field_bsize);
1726                 next_z = find_next_zero_bit(&mask, field_bsize, first);
1727                 last  = find_last_bit(&mask, field_bsize);
1728                 if (first < next_z && next_z < last) {
1729                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
1730                                mask);
1731                         return -EOPNOTSUPP;
1732                 }
1733
1734                 MLX5_SET(set_action_in, action, action_type, cmd);
1735                 MLX5_SET(set_action_in, action, field, f->field);
1736
1737                 if (cmd == MLX5_ACTION_TYPE_SET) {
1738                         MLX5_SET(set_action_in, action, offset, first);
1739                         /* length is num of bits to be written, zero means length of 32 */
1740                         MLX5_SET(set_action_in, action, length, (last - first + 1));
1741                 }
1742
1743                 if (field_bsize == 32)
1744                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
1745                 else if (field_bsize == 16)
1746                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
1747                 else if (field_bsize == 8)
1748                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
1749
1750                 action += action_size;
1751                 nactions++;
1752         }
1753
1754         parse_attr->num_mod_hdr_actions = nactions;
1755         return 0;
1756 }
1757
1758 static int alloc_mod_hdr_actions(struct mlx5e_priv *priv,
1759                                  const struct tc_action *a, int namespace,
1760                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1761 {
1762         int nkeys, action_size, max_actions;
1763
1764         nkeys = tcf_pedit_nkeys(a);
1765         action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto);
1766
1767         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
1768                 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions);
1769         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
1770                 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions);
1771
1772         /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */
1773         max_actions = min(max_actions, nkeys * 16);
1774
1775         parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL);
1776         if (!parse_attr->mod_hdr_actions)
1777                 return -ENOMEM;
1778
1779         parse_attr->num_mod_hdr_actions = max_actions;
1780         return 0;
1781 }
1782
1783 static const struct pedit_headers zero_masks = {};
1784
1785 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
1786                                  const struct tc_action *a, int namespace,
1787                                  struct mlx5e_tc_flow_parse_attr *parse_attr)
1788 {
1789         struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks;
1790         int nkeys, i, err = -EOPNOTSUPP;
1791         u32 mask, val, offset;
1792         u8 cmd, htype;
1793
1794         nkeys = tcf_pedit_nkeys(a);
1795
1796         memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1797         memset(vals,  0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX);
1798
1799         for (i = 0; i < nkeys; i++) {
1800                 htype = tcf_pedit_htype(a, i);
1801                 cmd = tcf_pedit_cmd(a, i);
1802                 err = -EOPNOTSUPP; /* can't be all optimistic */
1803
1804                 if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) {
1805                         netdev_warn(priv->netdev, "legacy pedit isn't offloaded\n");
1806                         goto out_err;
1807                 }
1808
1809                 if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) {
1810                         netdev_warn(priv->netdev, "pedit cmd %d isn't offloaded\n", cmd);
1811                         goto out_err;
1812                 }
1813
1814                 mask = tcf_pedit_mask(a, i);
1815                 val = tcf_pedit_val(a, i);
1816                 offset = tcf_pedit_offset(a, i);
1817
1818                 err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]);
1819                 if (err)
1820                         goto out_err;
1821         }
1822
1823         err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr);
1824         if (err)
1825                 goto out_err;
1826
1827         err = offload_pedit_fields(masks, vals, parse_attr);
1828         if (err < 0)
1829                 goto out_dealloc_parsed_actions;
1830
1831         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
1832                 cmd_masks = &masks[cmd];
1833                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
1834                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
1835                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
1836                                        16, 1, cmd_masks, sizeof(zero_masks), true);
1837                         err = -EOPNOTSUPP;
1838                         goto out_dealloc_parsed_actions;
1839                 }
1840         }
1841
1842         return 0;
1843
1844 out_dealloc_parsed_actions:
1845         kfree(parse_attr->mod_hdr_actions);
1846 out_err:
1847         return err;
1848 }
1849
1850 static bool csum_offload_supported(struct mlx5e_priv *priv, u32 action, u32 update_flags)
1851 {
1852         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
1853                          TCA_CSUM_UPDATE_FLAG_UDP;
1854
1855         /*  The HW recalcs checksums only if re-writing headers */
1856         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
1857                 netdev_warn(priv->netdev,
1858                             "TC csum action is only offloaded with pedit\n");
1859                 return false;
1860         }
1861
1862         if (update_flags & ~prot_flags) {
1863                 netdev_warn(priv->netdev,
1864                             "can't offload TC csum action for some header/s - flags %#x\n",
1865                             update_flags);
1866                 return false;
1867         }
1868
1869         return true;
1870 }
1871
1872 static bool modify_header_match_supported(struct mlx5_flow_spec *spec,
1873                                           struct tcf_exts *exts)
1874 {
1875         const struct tc_action *a;
1876         bool modify_ip_header;
1877         LIST_HEAD(actions);
1878         u8 htype, ip_proto;
1879         void *headers_v;
1880         u16 ethertype;
1881         int nkeys, i;
1882
1883         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1884         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1885
1886         /* for non-IP we only re-write MACs, so we're okay */
1887         if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
1888                 goto out_ok;
1889
1890         modify_ip_header = false;
1891         tcf_exts_to_list(exts, &actions);
1892         list_for_each_entry(a, &actions, list) {
1893                 if (!is_tcf_pedit(a))
1894                         continue;
1895
1896                 nkeys = tcf_pedit_nkeys(a);
1897                 for (i = 0; i < nkeys; i++) {
1898                         htype = tcf_pedit_htype(a, i);
1899                         if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 ||
1900                             htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) {
1901                                 modify_ip_header = true;
1902                                 break;
1903                         }
1904                 }
1905         }
1906
1907         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
1908         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
1909             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
1910                 pr_info("can't offload re-write of ip proto %d\n", ip_proto);
1911                 return false;
1912         }
1913
1914 out_ok:
1915         return true;
1916 }
1917
1918 static bool actions_match_supported(struct mlx5e_priv *priv,
1919                                     struct tcf_exts *exts,
1920                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
1921                                     struct mlx5e_tc_flow *flow)
1922 {
1923         u32 actions;
1924
1925         if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
1926                 actions = flow->esw_attr->action;
1927         else
1928                 actions = flow->nic_attr->action;
1929
1930         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1931                 return modify_header_match_supported(&parse_attr->spec, exts);
1932
1933         return true;
1934 }
1935
1936 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
1937 {
1938         struct mlx5_core_dev *fmdev, *pmdev;
1939         u16 func_id, peer_id;
1940
1941         fmdev = priv->mdev;
1942         pmdev = peer_priv->mdev;
1943
1944         func_id = (u16)((fmdev->pdev->bus->number << 8) | PCI_SLOT(fmdev->pdev->devfn));
1945         peer_id = (u16)((pmdev->pdev->bus->number << 8) | PCI_SLOT(pmdev->pdev->devfn));
1946
1947         return (func_id == peer_id);
1948 }
1949
1950 static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
1951                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
1952                                 struct mlx5e_tc_flow *flow)
1953 {
1954         struct mlx5_nic_flow_attr *attr = flow->nic_attr;
1955         const struct tc_action *a;
1956         LIST_HEAD(actions);
1957         u32 action = 0;
1958         int err;
1959
1960         if (!tcf_exts_has_actions(exts))
1961                 return -EINVAL;
1962
1963         attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
1964
1965         tcf_exts_to_list(exts, &actions);
1966         list_for_each_entry(a, &actions, list) {
1967                 if (is_tcf_gact_shot(a)) {
1968                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
1969                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
1970                                                flow_table_properties_nic_receive.flow_counter))
1971                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
1972                         continue;
1973                 }
1974
1975                 if (is_tcf_pedit(a)) {
1976                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL,
1977                                                     parse_attr);
1978                         if (err)
1979                                 return err;
1980
1981                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
1982                                   MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1983                         continue;
1984                 }
1985
1986                 if (is_tcf_csum(a)) {
1987                         if (csum_offload_supported(priv, action,
1988                                                    tcf_csum_update_flags(a)))
1989                                 continue;
1990
1991                         return -EOPNOTSUPP;
1992                 }
1993
1994                 if (is_tcf_mirred_egress_redirect(a)) {
1995                         struct net_device *peer_dev = tcf_mirred_dev(a);
1996
1997                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
1998                             same_hw_devs(priv, netdev_priv(peer_dev))) {
1999                                 parse_attr->mirred_ifindex = peer_dev->ifindex;
2000                                 flow->flags |= MLX5E_TC_FLOW_HAIRPIN;
2001                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2002                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2003                         } else {
2004                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
2005                                             peer_dev->name);
2006                                 return -EINVAL;
2007                         }
2008                         continue;
2009                 }
2010
2011                 if (is_tcf_skbedit_mark(a)) {
2012                         u32 mark = tcf_skbedit_mark(a);
2013
2014                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
2015                                 netdev_warn(priv->netdev, "Bad flow mark - only 16 bit is supported: 0x%x\n",
2016                                             mark);
2017                                 return -EINVAL;
2018                         }
2019
2020                         attr->flow_tag = mark;
2021                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2022                         continue;
2023                 }
2024
2025                 return -EINVAL;
2026         }
2027
2028         attr->action = action;
2029         if (!actions_match_supported(priv, exts, parse_attr, flow))
2030                 return -EOPNOTSUPP;
2031
2032         return 0;
2033 }
2034
2035 static inline int cmp_encap_info(struct ip_tunnel_key *a,
2036                                  struct ip_tunnel_key *b)
2037 {
2038         return memcmp(a, b, sizeof(*a));
2039 }
2040
2041 static inline int hash_encap_info(struct ip_tunnel_key *key)
2042 {
2043         return jhash(key, sizeof(*key), 0);
2044 }
2045
2046 static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
2047                                    struct net_device *mirred_dev,
2048                                    struct net_device **out_dev,
2049                                    struct flowi4 *fl4,
2050                                    struct neighbour **out_n,
2051                                    int *out_ttl)
2052 {
2053         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2054         struct mlx5e_rep_priv *uplink_rpriv;
2055         struct rtable *rt;
2056         struct neighbour *n = NULL;
2057
2058 #if IS_ENABLED(CONFIG_INET)
2059         int ret;
2060
2061         rt = ip_route_output_key(dev_net(mirred_dev), fl4);
2062         ret = PTR_ERR_OR_ZERO(rt);
2063         if (ret)
2064                 return ret;
2065 #else
2066         return -EOPNOTSUPP;
2067 #endif
2068         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2069         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2070         if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
2071                 *out_dev = uplink_rpriv->netdev;
2072         else
2073                 *out_dev = rt->dst.dev;
2074
2075         *out_ttl = ip4_dst_hoplimit(&rt->dst);
2076         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
2077         ip_rt_put(rt);
2078         if (!n)
2079                 return -ENOMEM;
2080
2081         *out_n = n;
2082         return 0;
2083 }
2084
2085 static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
2086                                   struct net_device *peer_netdev)
2087 {
2088         struct mlx5e_priv *peer_priv;
2089
2090         peer_priv = netdev_priv(peer_netdev);
2091
2092         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
2093                 (priv->netdev->netdev_ops == peer_netdev->netdev_ops) &&
2094                 same_hw_devs(priv, peer_priv) &&
2095                 MLX5_VPORT_MANAGER(peer_priv->mdev) &&
2096                 (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS));
2097 }
2098
2099 static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv,
2100                                    struct net_device *mirred_dev,
2101                                    struct net_device **out_dev,
2102                                    struct flowi6 *fl6,
2103                                    struct neighbour **out_n,
2104                                    int *out_ttl)
2105 {
2106         struct neighbour *n = NULL;
2107         struct dst_entry *dst;
2108
2109 #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)
2110         struct mlx5e_rep_priv *uplink_rpriv;
2111         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2112         int ret;
2113
2114         ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst,
2115                                          fl6);
2116         if (ret < 0)
2117                 return ret;
2118
2119         *out_ttl = ip6_dst_hoplimit(dst);
2120
2121         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2122         /* if the egress device isn't on the same HW e-switch, we use the uplink */
2123         if (!switchdev_port_same_parent_id(priv->netdev, dst->dev))
2124                 *out_dev = uplink_rpriv->netdev;
2125         else
2126                 *out_dev = dst->dev;
2127 #else
2128         return -EOPNOTSUPP;
2129 #endif
2130
2131         n = dst_neigh_lookup(dst, &fl6->daddr);
2132         dst_release(dst);
2133         if (!n)
2134                 return -ENOMEM;
2135
2136         *out_n = n;
2137         return 0;
2138 }
2139
2140 static void gen_vxlan_header_ipv4(struct net_device *out_dev,
2141                                   char buf[], int encap_size,
2142                                   unsigned char h_dest[ETH_ALEN],
2143                                   int ttl,
2144                                   __be32 daddr,
2145                                   __be32 saddr,
2146                                   __be16 udp_dst_port,
2147                                   __be32 vx_vni)
2148 {
2149         struct ethhdr *eth = (struct ethhdr *)buf;
2150         struct iphdr  *ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr));
2151         struct udphdr *udp = (struct udphdr *)((char *)ip + sizeof(struct iphdr));
2152         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2153
2154         memset(buf, 0, encap_size);
2155
2156         ether_addr_copy(eth->h_dest, h_dest);
2157         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2158         eth->h_proto = htons(ETH_P_IP);
2159
2160         ip->daddr = daddr;
2161         ip->saddr = saddr;
2162
2163         ip->ttl = ttl;
2164         ip->protocol = IPPROTO_UDP;
2165         ip->version = 0x4;
2166         ip->ihl = 0x5;
2167
2168         udp->dest = udp_dst_port;
2169         vxh->vx_flags = VXLAN_HF_VNI;
2170         vxh->vx_vni = vxlan_vni_field(vx_vni);
2171 }
2172
2173 static void gen_vxlan_header_ipv6(struct net_device *out_dev,
2174                                   char buf[], int encap_size,
2175                                   unsigned char h_dest[ETH_ALEN],
2176                                   int ttl,
2177                                   struct in6_addr *daddr,
2178                                   struct in6_addr *saddr,
2179                                   __be16 udp_dst_port,
2180                                   __be32 vx_vni)
2181 {
2182         struct ethhdr *eth = (struct ethhdr *)buf;
2183         struct ipv6hdr *ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr));
2184         struct udphdr *udp = (struct udphdr *)((char *)ip6h + sizeof(struct ipv6hdr));
2185         struct vxlanhdr *vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
2186
2187         memset(buf, 0, encap_size);
2188
2189         ether_addr_copy(eth->h_dest, h_dest);
2190         ether_addr_copy(eth->h_source, out_dev->dev_addr);
2191         eth->h_proto = htons(ETH_P_IPV6);
2192
2193         ip6_flow_hdr(ip6h, 0, 0);
2194         /* the HW fills up ipv6 payload len */
2195         ip6h->nexthdr     = IPPROTO_UDP;
2196         ip6h->hop_limit   = ttl;
2197         ip6h->daddr       = *daddr;
2198         ip6h->saddr       = *saddr;
2199
2200         udp->dest = udp_dst_port;
2201         vxh->vx_flags = VXLAN_HF_VNI;
2202         vxh->vx_vni = vxlan_vni_field(vx_vni);
2203 }
2204
2205 static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2206                                           struct net_device *mirred_dev,
2207                                           struct mlx5e_encap_entry *e)
2208 {
2209         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2210         int ipv4_encap_size = ETH_HLEN + sizeof(struct iphdr) + VXLAN_HLEN;
2211         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2212         struct net_device *out_dev;
2213         struct neighbour *n = NULL;
2214         struct flowi4 fl4 = {};
2215         char *encap_header;
2216         int ttl, err;
2217         u8 nud_state;
2218
2219         if (max_encap_size < ipv4_encap_size) {
2220                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2221                                ipv4_encap_size, max_encap_size);
2222                 return -EOPNOTSUPP;
2223         }
2224
2225         encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL);
2226         if (!encap_header)
2227                 return -ENOMEM;
2228
2229         switch (e->tunnel_type) {
2230         case MLX5_HEADER_TYPE_VXLAN:
2231                 fl4.flowi4_proto = IPPROTO_UDP;
2232                 fl4.fl4_dport = tun_key->tp_dst;
2233                 break;
2234         default:
2235                 err = -EOPNOTSUPP;
2236                 goto free_encap;
2237         }
2238         fl4.flowi4_tos = tun_key->tos;
2239         fl4.daddr = tun_key->u.ipv4.dst;
2240         fl4.saddr = tun_key->u.ipv4.src;
2241
2242         err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev,
2243                                       &fl4, &n, &ttl);
2244         if (err)
2245                 goto free_encap;
2246
2247         /* used by mlx5e_detach_encap to lookup a neigh hash table
2248          * entry in the neigh hash table when a user deletes a rule
2249          */
2250         e->m_neigh.dev = n->dev;
2251         e->m_neigh.family = n->ops->family;
2252         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2253         e->out_dev = out_dev;
2254
2255         /* It's importent to add the neigh to the hash table before checking
2256          * the neigh validity state. So if we'll get a notification, in case the
2257          * neigh changes it's validity state, we would find the relevant neigh
2258          * in the hash.
2259          */
2260         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2261         if (err)
2262                 goto free_encap;
2263
2264         read_lock_bh(&n->lock);
2265         nud_state = n->nud_state;
2266         ether_addr_copy(e->h_dest, n->ha);
2267         read_unlock_bh(&n->lock);
2268
2269         switch (e->tunnel_type) {
2270         case MLX5_HEADER_TYPE_VXLAN:
2271                 gen_vxlan_header_ipv4(out_dev, encap_header,
2272                                       ipv4_encap_size, e->h_dest, ttl,
2273                                       fl4.daddr,
2274                                       fl4.saddr, tun_key->tp_dst,
2275                                       tunnel_id_to_key32(tun_key->tun_id));
2276                 break;
2277         default:
2278                 err = -EOPNOTSUPP;
2279                 goto destroy_neigh_entry;
2280         }
2281         e->encap_size = ipv4_encap_size;
2282         e->encap_header = encap_header;
2283
2284         if (!(nud_state & NUD_VALID)) {
2285                 neigh_event_send(n, NULL);
2286                 err = -EAGAIN;
2287                 goto out;
2288         }
2289
2290         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2291                                ipv4_encap_size, encap_header, &e->encap_id);
2292         if (err)
2293                 goto destroy_neigh_entry;
2294
2295         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2296         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2297         neigh_release(n);
2298         return err;
2299
2300 destroy_neigh_entry:
2301         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2302 free_encap:
2303         kfree(encap_header);
2304 out:
2305         if (n)
2306                 neigh_release(n);
2307         return err;
2308 }
2309
2310 static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2311                                           struct net_device *mirred_dev,
2312                                           struct mlx5e_encap_entry *e)
2313 {
2314         int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
2315         int ipv6_encap_size = ETH_HLEN + sizeof(struct ipv6hdr) + VXLAN_HLEN;
2316         struct ip_tunnel_key *tun_key = &e->tun_info.key;
2317         struct net_device *out_dev;
2318         struct neighbour *n = NULL;
2319         struct flowi6 fl6 = {};
2320         char *encap_header;
2321         int err, ttl = 0;
2322         u8 nud_state;
2323
2324         if (max_encap_size < ipv6_encap_size) {
2325                 mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n",
2326                                ipv6_encap_size, max_encap_size);
2327                 return -EOPNOTSUPP;
2328         }
2329
2330         encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL);
2331         if (!encap_header)
2332                 return -ENOMEM;
2333
2334         switch (e->tunnel_type) {
2335         case MLX5_HEADER_TYPE_VXLAN:
2336                 fl6.flowi6_proto = IPPROTO_UDP;
2337                 fl6.fl6_dport = tun_key->tp_dst;
2338                 break;
2339         default:
2340                 err = -EOPNOTSUPP;
2341                 goto free_encap;
2342         }
2343
2344         fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label);
2345         fl6.daddr = tun_key->u.ipv6.dst;
2346         fl6.saddr = tun_key->u.ipv6.src;
2347
2348         err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev,
2349                                       &fl6, &n, &ttl);
2350         if (err)
2351                 goto free_encap;
2352
2353         /* used by mlx5e_detach_encap to lookup a neigh hash table
2354          * entry in the neigh hash table when a user deletes a rule
2355          */
2356         e->m_neigh.dev = n->dev;
2357         e->m_neigh.family = n->ops->family;
2358         memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
2359         e->out_dev = out_dev;
2360
2361         /* It's importent to add the neigh to the hash table before checking
2362          * the neigh validity state. So if we'll get a notification, in case the
2363          * neigh changes it's validity state, we would find the relevant neigh
2364          * in the hash.
2365          */
2366         err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e);
2367         if (err)
2368                 goto free_encap;
2369
2370         read_lock_bh(&n->lock);
2371         nud_state = n->nud_state;
2372         ether_addr_copy(e->h_dest, n->ha);
2373         read_unlock_bh(&n->lock);
2374
2375         switch (e->tunnel_type) {
2376         case MLX5_HEADER_TYPE_VXLAN:
2377                 gen_vxlan_header_ipv6(out_dev, encap_header,
2378                                       ipv6_encap_size, e->h_dest, ttl,
2379                                       &fl6.daddr,
2380                                       &fl6.saddr, tun_key->tp_dst,
2381                                       tunnel_id_to_key32(tun_key->tun_id));
2382                 break;
2383         default:
2384                 err = -EOPNOTSUPP;
2385                 goto destroy_neigh_entry;
2386         }
2387
2388         e->encap_size = ipv6_encap_size;
2389         e->encap_header = encap_header;
2390
2391         if (!(nud_state & NUD_VALID)) {
2392                 neigh_event_send(n, NULL);
2393                 err = -EAGAIN;
2394                 goto out;
2395         }
2396
2397         err = mlx5_encap_alloc(priv->mdev, e->tunnel_type,
2398                                ipv6_encap_size, encap_header, &e->encap_id);
2399         if (err)
2400                 goto destroy_neigh_entry;
2401
2402         e->flags |= MLX5_ENCAP_ENTRY_VALID;
2403         mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev));
2404         neigh_release(n);
2405         return err;
2406
2407 destroy_neigh_entry:
2408         mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
2409 free_encap:
2410         kfree(encap_header);
2411 out:
2412         if (n)
2413                 neigh_release(n);
2414         return err;
2415 }
2416
2417 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
2418                               struct ip_tunnel_info *tun_info,
2419                               struct net_device *mirred_dev,
2420                               struct net_device **encap_dev,
2421                               struct mlx5e_tc_flow *flow)
2422 {
2423         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2424         struct mlx5e_rep_priv *uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw,
2425                                                                            REP_ETH);
2426         struct net_device *up_dev = uplink_rpriv->netdev;
2427         unsigned short family = ip_tunnel_info_af(tun_info);
2428         struct mlx5e_priv *up_priv = netdev_priv(up_dev);
2429         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2430         struct ip_tunnel_key *key = &tun_info->key;
2431         struct mlx5e_encap_entry *e;
2432         int tunnel_type, err = 0;
2433         uintptr_t hash_key;
2434         bool found = false;
2435
2436         /* udp dst port must be set */
2437         if (!memchr_inv(&key->tp_dst, 0, sizeof(key->tp_dst)))
2438                 goto vxlan_encap_offload_err;
2439
2440         /* setting udp src port isn't supported */
2441         if (memchr_inv(&key->tp_src, 0, sizeof(key->tp_src))) {
2442 vxlan_encap_offload_err:
2443                 netdev_warn(priv->netdev,
2444                             "must set udp dst port and not set udp src port\n");
2445                 return -EOPNOTSUPP;
2446         }
2447
2448         if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->tp_dst)) &&
2449             MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2450                 tunnel_type = MLX5_HEADER_TYPE_VXLAN;
2451         } else {
2452                 netdev_warn(priv->netdev,
2453                             "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
2454                 return -EOPNOTSUPP;
2455         }
2456
2457         hash_key = hash_encap_info(key);
2458
2459         hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
2460                                    encap_hlist, hash_key) {
2461                 if (!cmp_encap_info(&e->tun_info.key, key)) {
2462                         found = true;
2463                         break;
2464                 }
2465         }
2466
2467         /* must verify if encap is valid or not */
2468         if (found)
2469                 goto attach_flow;
2470
2471         e = kzalloc(sizeof(*e), GFP_KERNEL);
2472         if (!e)
2473                 return -ENOMEM;
2474
2475         e->tun_info = *tun_info;
2476         e->tunnel_type = tunnel_type;
2477         INIT_LIST_HEAD(&e->flows);
2478
2479         if (family == AF_INET)
2480                 err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e);
2481         else if (family == AF_INET6)
2482                 err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e);
2483
2484         if (err && err != -EAGAIN)
2485                 goto out_err;
2486
2487         hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
2488
2489 attach_flow:
2490         list_add(&flow->encap, &e->flows);
2491         *encap_dev = e->out_dev;
2492         if (e->flags & MLX5_ENCAP_ENTRY_VALID)
2493                 attr->encap_id = e->encap_id;
2494         else
2495                 err = -EAGAIN;
2496
2497         return err;
2498
2499 out_err:
2500         kfree(e);
2501         return err;
2502 }
2503
2504 static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2505                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2506                                 struct mlx5e_tc_flow *flow)
2507 {
2508         struct mlx5_esw_flow_attr *attr = flow->esw_attr;
2509         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2510         struct ip_tunnel_info *info = NULL;
2511         const struct tc_action *a;
2512         LIST_HEAD(actions);
2513         bool encap = false;
2514         u32 action = 0;
2515
2516         if (!tcf_exts_has_actions(exts))
2517                 return -EINVAL;
2518
2519         attr->in_rep = rpriv->rep;
2520         attr->in_mdev = priv->mdev;
2521
2522         tcf_exts_to_list(exts, &actions);
2523         list_for_each_entry(a, &actions, list) {
2524                 if (is_tcf_gact_shot(a)) {
2525                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
2526                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
2527                         continue;
2528                 }
2529
2530                 if (is_tcf_pedit(a)) {
2531                         int err;
2532
2533                         err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB,
2534                                                     parse_attr);
2535                         if (err)
2536                                 return err;
2537
2538                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2539                         continue;
2540                 }
2541
2542                 if (is_tcf_csum(a)) {
2543                         if (csum_offload_supported(priv, action,
2544                                                    tcf_csum_update_flags(a)))
2545                                 continue;
2546
2547                         return -EOPNOTSUPP;
2548                 }
2549
2550                 if (is_tcf_mirred_egress_redirect(a)) {
2551                         struct net_device *out_dev;
2552                         struct mlx5e_priv *out_priv;
2553
2554                         out_dev = tcf_mirred_dev(a);
2555
2556                         if (switchdev_port_same_parent_id(priv->netdev,
2557                                                           out_dev) ||
2558                             is_merged_eswitch_dev(priv, out_dev)) {
2559                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2560                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2561                                 out_priv = netdev_priv(out_dev);
2562                                 rpriv = out_priv->ppriv;
2563                                 attr->out_rep = rpriv->rep;
2564                                 attr->out_mdev = out_priv->mdev;
2565                         } else if (encap) {
2566                                 parse_attr->mirred_ifindex = out_dev->ifindex;
2567                                 parse_attr->tun_info = *info;
2568                                 attr->parse_attr = parse_attr;
2569                                 action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP |
2570                                           MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2571                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
2572                                 /* attr->out_rep is resolved when we handle encap */
2573                         } else {
2574                                 pr_err("devices %s %s not on same switch HW, can't offload forwarding\n",
2575                                        priv->netdev->name, out_dev->name);
2576                                 return -EINVAL;
2577                         }
2578                         continue;
2579                 }
2580
2581                 if (is_tcf_tunnel_set(a)) {
2582                         info = tcf_tunnel_info(a);
2583                         if (info)
2584                                 encap = true;
2585                         else
2586                                 return -EOPNOTSUPP;
2587                         continue;
2588                 }
2589
2590                 if (is_tcf_vlan(a)) {
2591                         if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) {
2592                                 action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
2593                         } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) {
2594                                 action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
2595                                 attr->vlan_vid = tcf_vlan_push_vid(a);
2596                                 if (mlx5_eswitch_vlan_actions_supported(priv->mdev)) {
2597                                         attr->vlan_prio = tcf_vlan_push_prio(a);
2598                                         attr->vlan_proto = tcf_vlan_push_proto(a);
2599                                         if (!attr->vlan_proto)
2600                                                 attr->vlan_proto = htons(ETH_P_8021Q);
2601                                 } else if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) ||
2602                                            tcf_vlan_push_prio(a)) {
2603                                         return -EOPNOTSUPP;
2604                                 }
2605                         } else { /* action is TCA_VLAN_ACT_MODIFY */
2606                                 return -EOPNOTSUPP;
2607                         }
2608                         continue;
2609                 }
2610
2611                 if (is_tcf_tunnel_release(a)) {
2612                         action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2613                         continue;
2614                 }
2615
2616                 return -EINVAL;
2617         }
2618
2619         attr->action = action;
2620         if (!actions_match_supported(priv, exts, parse_attr, flow))
2621                 return -EOPNOTSUPP;
2622
2623         return 0;
2624 }
2625
2626 static void get_flags(int flags, u8 *flow_flags)
2627 {
2628         u8 __flow_flags = 0;
2629
2630         if (flags & MLX5E_TC_INGRESS)
2631                 __flow_flags |= MLX5E_TC_FLOW_INGRESS;
2632         if (flags & MLX5E_TC_EGRESS)
2633                 __flow_flags |= MLX5E_TC_FLOW_EGRESS;
2634
2635         *flow_flags = __flow_flags;
2636 }
2637
2638 static const struct rhashtable_params tc_ht_params = {
2639         .head_offset = offsetof(struct mlx5e_tc_flow, node),
2640         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
2641         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
2642         .automatic_shrinking = true,
2643 };
2644
2645 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv)
2646 {
2647         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2648         struct mlx5e_rep_priv *uplink_rpriv;
2649
2650         if (MLX5_VPORT_MANAGER(priv->mdev) && esw->mode == SRIOV_OFFLOADS) {
2651                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2652                 return &uplink_rpriv->tc_ht;
2653         } else
2654                 return &priv->fs.tc.ht;
2655 }
2656
2657 int mlx5e_configure_flower(struct mlx5e_priv *priv,
2658                            struct tc_cls_flower_offload *f, int flags)
2659 {
2660         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2661         struct mlx5e_tc_flow_parse_attr *parse_attr;
2662         struct rhashtable *tc_ht = get_tc_ht(priv);
2663         struct mlx5e_tc_flow *flow;
2664         int attr_size, err = 0;
2665         u8 flow_flags = 0;
2666
2667         get_flags(flags, &flow_flags);
2668
2669         if (esw && esw->mode == SRIOV_OFFLOADS) {
2670                 flow_flags |= MLX5E_TC_FLOW_ESWITCH;
2671                 attr_size  = sizeof(struct mlx5_esw_flow_attr);
2672         } else {
2673                 flow_flags |= MLX5E_TC_FLOW_NIC;
2674                 attr_size  = sizeof(struct mlx5_nic_flow_attr);
2675         }
2676
2677         flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL);
2678         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
2679         if (!parse_attr || !flow) {
2680                 err = -ENOMEM;
2681                 goto err_free;
2682         }
2683
2684         flow->cookie = f->cookie;
2685         flow->flags = flow_flags;
2686         flow->priv = priv;
2687
2688         err = parse_cls_flower(priv, flow, &parse_attr->spec, f);
2689         if (err < 0)
2690                 goto err_free;
2691
2692         if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
2693                 err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow);
2694                 if (err < 0)
2695                         goto err_free;
2696                 flow->rule = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow);
2697         } else {
2698                 err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow);
2699                 if (err < 0)
2700                         goto err_free;
2701                 flow->rule = mlx5e_tc_add_nic_flow(priv, parse_attr, flow);
2702         }
2703
2704         if (IS_ERR(flow->rule)) {
2705                 err = PTR_ERR(flow->rule);
2706                 if (err != -EAGAIN)
2707                         goto err_free;
2708         }
2709
2710         if (err != -EAGAIN)
2711                 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
2712
2713         if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) ||
2714             !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP))
2715                 kvfree(parse_attr);
2716
2717         err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params);
2718         if (err) {
2719                 mlx5e_tc_del_flow(priv, flow);
2720                 kfree(flow);
2721         }
2722
2723         return err;
2724
2725 err_free:
2726         kvfree(parse_attr);
2727         kfree(flow);
2728         return err;
2729 }
2730
2731 int mlx5e_delete_flower(struct mlx5e_priv *priv,
2732                         struct tc_cls_flower_offload *f, int flags)
2733 {
2734         struct rhashtable *tc_ht = get_tc_ht(priv);
2735         struct mlx5e_tc_flow *flow;
2736
2737         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
2738         if (!flow)
2739                 return -EINVAL;
2740
2741         rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
2742
2743         mlx5e_tc_del_flow(priv, flow);
2744
2745         kfree(flow);
2746
2747         return 0;
2748 }
2749
2750 int mlx5e_stats_flower(struct mlx5e_priv *priv,
2751                        struct tc_cls_flower_offload *f, int flags)
2752 {
2753         struct rhashtable *tc_ht = get_tc_ht(priv);
2754         struct mlx5e_tc_flow *flow;
2755         struct mlx5_fc *counter;
2756         u64 bytes;
2757         u64 packets;
2758         u64 lastuse;
2759
2760         flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params);
2761         if (!flow)
2762                 return -EINVAL;
2763
2764         if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED))
2765                 return 0;
2766
2767         counter = mlx5_flow_rule_counter(flow->rule);
2768         if (!counter)
2769                 return 0;
2770
2771         mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
2772
2773         tcf_exts_stats_update(f->exts, bytes, packets, lastuse);
2774
2775         return 0;
2776 }
2777
2778 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
2779 {
2780         struct mlx5e_tc_table *tc = &priv->fs.tc;
2781
2782         hash_init(tc->mod_hdr_tbl);
2783         hash_init(tc->hairpin_tbl);
2784
2785         return rhashtable_init(&tc->ht, &tc_ht_params);
2786 }
2787
2788 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
2789 {
2790         struct mlx5e_tc_flow *flow = ptr;
2791         struct mlx5e_priv *priv = flow->priv;
2792
2793         mlx5e_tc_del_flow(priv, flow);
2794         kfree(flow);
2795 }
2796
2797 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
2798 {
2799         struct mlx5e_tc_table *tc = &priv->fs.tc;
2800
2801         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
2802
2803         if (!IS_ERR_OR_NULL(tc->t)) {
2804                 mlx5_destroy_flow_table(tc->t);
2805                 tc->t = NULL;
2806         }
2807 }
2808
2809 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
2810 {
2811         return rhashtable_init(tc_ht, &tc_ht_params);
2812 }
2813
2814 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
2815 {
2816         rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
2817 }