d453a11f41fe9abb005ff2e658bd2d6273fb2ec8
[sfrench/cifs-2.6.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
1 /*
2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include "en.h"
34 #include "en_accel/ipsec.h"
35
36 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
37                                struct ethtool_drvinfo *drvinfo)
38 {
39         struct mlx5_core_dev *mdev = priv->mdev;
40
41         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42         strlcpy(drvinfo->version, DRIVER_VERSION,
43                 sizeof(drvinfo->version));
44         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45                  "%d.%d.%04d (%.16s)",
46                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
47                  mdev->board_id);
48         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
49                 sizeof(drvinfo->bus_info));
50 }
51
52 static void mlx5e_get_drvinfo(struct net_device *dev,
53                               struct ethtool_drvinfo *drvinfo)
54 {
55         struct mlx5e_priv *priv = netdev_priv(dev);
56
57         mlx5e_ethtool_get_drvinfo(priv, drvinfo);
58 }
59
60 struct ptys2ethtool_config {
61         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
62         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
63         u32 speed;
64 };
65
66 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
67
68 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)               \
69         ({                                                              \
70                 struct ptys2ethtool_config *cfg;                        \
71                 const unsigned int modes[] = { __VA_ARGS__ };           \
72                 unsigned int i;                                         \
73                 cfg = &ptys2ethtool_table[reg_];                        \
74                 cfg->speed = speed_;                                    \
75                 bitmap_zero(cfg->supported,                             \
76                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
77                 bitmap_zero(cfg->advertised,                            \
78                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
79                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
80                         __set_bit(modes[i], cfg->supported);            \
81                         __set_bit(modes[i], cfg->advertised);           \
82                 }                                                       \
83         })
84
85 void mlx5e_build_ptys2ethtool_map(void)
86 {
87         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, SPEED_1000,
88                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
89         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, SPEED_1000,
90                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
91         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, SPEED_10000,
92                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
93         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, SPEED_10000,
94                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
95         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, SPEED_10000,
96                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
97         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, SPEED_20000,
98                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
99         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, SPEED_40000,
100                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
101         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, SPEED_40000,
102                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
103         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, SPEED_56000,
104                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
105         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, SPEED_10000,
106                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
107         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, SPEED_10000,
108                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
109         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, SPEED_10000,
110                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
111         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, SPEED_40000,
112                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
113         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, SPEED_40000,
114                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
115         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, SPEED_50000,
116                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
117         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, SPEED_100000,
118                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
119         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, SPEED_100000,
120                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
121         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, SPEED_100000,
122                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
123         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, SPEED_100000,
124                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
125         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, SPEED_10000,
126                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
127         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, SPEED_25000,
128                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
129         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, SPEED_25000,
130                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
131         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, SPEED_25000,
132                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
133         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, SPEED_50000,
134                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
135         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, SPEED_50000,
136                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
137 }
138
139 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
140 {
141         struct mlx5_core_dev *mdev = priv->mdev;
142         u8 pfc_en_tx;
143         u8 pfc_en_rx;
144         int err;
145
146         if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
147                 return 0;
148
149         err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
150
151         return err ? 0 : pfc_en_tx | pfc_en_rx;
152 }
153
154 static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
155 {
156         struct mlx5_core_dev *mdev = priv->mdev;
157         u32 rx_pause;
158         u32 tx_pause;
159         int err;
160
161         if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
162                 return false;
163
164         err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
165
166         return err ? false : rx_pause | tx_pause;
167 }
168
169 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
170 #define MLX5E_NUM_RQ_STATS(priv) (NUM_RQ_STATS * (priv)->channels.num)
171 #define MLX5E_NUM_SQ_STATS(priv) \
172         (NUM_SQ_STATS * (priv)->channels.num * (priv)->channels.params.num_tc)
173 #define MLX5E_NUM_PFC_COUNTERS(priv) \
174         ((mlx5e_query_global_pause_combined(priv) + hweight8(mlx5e_query_pfc_combined(priv))) * \
175           NUM_PPORT_PER_PRIO_PFC_COUNTERS)
176
177 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
178 {
179
180         switch (sset) {
181         case ETH_SS_STATS:
182                 return NUM_SW_COUNTERS +
183                        MLX5E_NUM_Q_CNTRS(priv) +
184                        NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS(priv) +
185                        NUM_PCIE_COUNTERS(priv) +
186                        MLX5E_NUM_RQ_STATS(priv) +
187                        MLX5E_NUM_SQ_STATS(priv) +
188                        MLX5E_NUM_PFC_COUNTERS(priv) +
189                        ARRAY_SIZE(mlx5e_pme_status_desc) +
190                        ARRAY_SIZE(mlx5e_pme_error_desc) +
191                        mlx5e_ipsec_get_count(priv);
192
193         case ETH_SS_PRIV_FLAGS:
194                 return ARRAY_SIZE(mlx5e_priv_flags);
195         case ETH_SS_TEST:
196                 return mlx5e_self_test_num(priv);
197         /* fallthrough */
198         default:
199                 return -EOPNOTSUPP;
200         }
201 }
202
203 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
204 {
205         struct mlx5e_priv *priv = netdev_priv(dev);
206
207         return mlx5e_ethtool_get_sset_count(priv, sset);
208 }
209
210 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
211 {
212         int i, j, tc, prio, idx = 0;
213         unsigned long pfc_combined;
214
215         /* SW counters */
216         for (i = 0; i < NUM_SW_COUNTERS; i++)
217                 strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format);
218
219         /* Q counters */
220         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
221                 strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].format);
222
223         /* VPORT counters */
224         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
225                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
226                        vport_stats_desc[i].format);
227
228         /* PPORT counters */
229         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
230                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
231                        pport_802_3_stats_desc[i].format);
232
233         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
234                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
235                        pport_2863_stats_desc[i].format);
236
237         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
238                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
239                        pport_2819_stats_desc[i].format);
240
241         for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS(priv); i++)
242                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
243                        pport_phy_statistical_stats_desc[i].format);
244
245         for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS(priv); i++)
246                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
247                        pport_eth_ext_stats_desc[i].format);
248
249         for (i = 0; i < NUM_PCIE_PERF_COUNTERS(priv); i++)
250                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
251                        pcie_perf_stats_desc[i].format);
252
253         for (i = 0; i < NUM_PCIE_PERF_COUNTERS64(priv); i++)
254                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
255                        pcie_perf_stats_desc64[i].format);
256
257         for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS(priv); i++)
258          strcpy(data + (idx++) * ETH_GSTRING_LEN,
259                 pcie_perf_stall_stats_desc[i].format);
260
261         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
262                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
263                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
264                                 pport_per_prio_traffic_stats_desc[i].format, prio);
265         }
266
267         pfc_combined = mlx5e_query_pfc_combined(priv);
268         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
269                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
270                         char pfc_string[ETH_GSTRING_LEN];
271
272                         snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio);
273                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
274                                 pport_per_prio_pfc_stats_desc[i].format, pfc_string);
275                 }
276         }
277
278         if (mlx5e_query_global_pause_combined(priv)) {
279                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
280                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
281                                 pport_per_prio_pfc_stats_desc[i].format, "global");
282                 }
283         }
284
285         /* port module event counters */
286         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_status_desc); i++)
287                 strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_status_desc[i].format);
288
289         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_error_desc); i++)
290                 strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_error_desc[i].format);
291
292         /* IPSec counters */
293         idx += mlx5e_ipsec_get_strings(priv, data + idx * ETH_GSTRING_LEN);
294
295         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
296                 return;
297
298         /* per channel counters */
299         for (i = 0; i < priv->channels.num; i++)
300                 for (j = 0; j < NUM_RQ_STATS; j++)
301                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
302                                 rq_stats_desc[j].format, i);
303
304         for (tc = 0; tc < priv->channels.params.num_tc; tc++)
305                 for (i = 0; i < priv->channels.num; i++)
306                         for (j = 0; j < NUM_SQ_STATS; j++)
307                                 sprintf(data + (idx++) * ETH_GSTRING_LEN,
308                                         sq_stats_desc[j].format,
309                                         priv->channel_tc2txq[i][tc]);
310 }
311
312 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv,
313                                uint32_t stringset, uint8_t *data)
314 {
315         int i;
316
317         switch (stringset) {
318         case ETH_SS_PRIV_FLAGS:
319                 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
320                         strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
321                 break;
322
323         case ETH_SS_TEST:
324                 for (i = 0; i < mlx5e_self_test_num(priv); i++)
325                         strcpy(data + i * ETH_GSTRING_LEN,
326                                mlx5e_self_tests[i]);
327                 break;
328
329         case ETH_SS_STATS:
330                 mlx5e_fill_stats_strings(priv, data);
331                 break;
332         }
333 }
334
335 static void mlx5e_get_strings(struct net_device *dev,
336                               uint32_t stringset, uint8_t *data)
337 {
338         struct mlx5e_priv *priv = netdev_priv(dev);
339
340         mlx5e_ethtool_get_strings(priv, stringset, data);
341 }
342
343 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
344                                      struct ethtool_stats *stats, u64 *data)
345 {
346         struct mlx5e_channels *channels;
347         struct mlx5_priv *mlx5_priv;
348         int i, j, tc, prio, idx = 0;
349         unsigned long pfc_combined;
350
351         if (!data)
352                 return;
353
354         mutex_lock(&priv->state_lock);
355         if (test_bit(MLX5E_STATE_OPENED, &priv->state))
356                 mlx5e_update_stats(priv, true);
357         channels = &priv->channels;
358         mutex_unlock(&priv->state_lock);
359
360         for (i = 0; i < NUM_SW_COUNTERS; i++)
361                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
362                                                    sw_stats_desc, i);
363
364         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
365                 data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
366                                                    q_stats_desc, i);
367
368         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
369                 data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
370                                                   vport_stats_desc, i);
371
372         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
373                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
374                                                   pport_802_3_stats_desc, i);
375
376         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
377                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
378                                                   pport_2863_stats_desc, i);
379
380         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
381                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
382                                                   pport_2819_stats_desc, i);
383
384         for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS(priv); i++)
385                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.phy_statistical_counters,
386                                                   pport_phy_statistical_stats_desc, i);
387
388         for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS(priv); i++)
389                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.eth_ext_counters,
390                                                   pport_eth_ext_stats_desc, i);
391
392         for (i = 0; i < NUM_PCIE_PERF_COUNTERS(priv); i++)
393                 data[idx++] = MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters,
394                                                   pcie_perf_stats_desc, i);
395
396         for (i = 0; i < NUM_PCIE_PERF_COUNTERS64(priv); i++)
397                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pcie.pcie_perf_counters,
398                                                   pcie_perf_stats_desc64, i);
399
400         for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS(priv); i++)
401                 data[idx++] = MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters,
402                                                   pcie_perf_stall_stats_desc, i);
403
404         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
405                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
406                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
407                                                  pport_per_prio_traffic_stats_desc, i);
408         }
409
410         pfc_combined = mlx5e_query_pfc_combined(priv);
411         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
412                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
413                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
414                                                           pport_per_prio_pfc_stats_desc, i);
415                 }
416         }
417
418         if (mlx5e_query_global_pause_combined(priv)) {
419                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
420                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
421                                                           pport_per_prio_pfc_stats_desc, i);
422                 }
423         }
424
425         /* port module event counters */
426         mlx5_priv =  &priv->mdev->priv;
427         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_status_desc); i++)
428                 data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.status_counters,
429                                                    mlx5e_pme_status_desc, i);
430
431         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_error_desc); i++)
432                 data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.error_counters,
433                                                    mlx5e_pme_error_desc, i);
434
435         /* IPSec counters */
436         idx += mlx5e_ipsec_get_stats(priv, data + idx);
437
438         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
439                 return;
440
441         /* per channel counters */
442         for (i = 0; i < channels->num; i++)
443                 for (j = 0; j < NUM_RQ_STATS; j++)
444                         data[idx++] =
445                                MLX5E_READ_CTR64_CPU(&channels->c[i]->rq.stats,
446                                                     rq_stats_desc, j);
447
448         for (tc = 0; tc < priv->channels.params.num_tc; tc++)
449                 for (i = 0; i < channels->num; i++)
450                         for (j = 0; j < NUM_SQ_STATS; j++)
451                                 data[idx++] = MLX5E_READ_CTR64_CPU(&channels->c[i]->sq[tc].stats,
452                                                                    sq_stats_desc, j);
453 }
454
455 static void mlx5e_get_ethtool_stats(struct net_device *dev,
456                                     struct ethtool_stats *stats,
457                                     u64 *data)
458 {
459         struct mlx5e_priv *priv = netdev_priv(dev);
460
461         mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
462 }
463
464 static u32 mlx5e_rx_wqes_to_packets(struct mlx5e_priv *priv, int rq_wq_type,
465                                     int num_wqe)
466 {
467         int packets_per_wqe;
468         int stride_size;
469         int num_strides;
470         int wqe_size;
471
472         if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
473                 return num_wqe;
474
475         stride_size = 1 << priv->channels.params.mpwqe_log_stride_sz;
476         num_strides = 1 << priv->channels.params.mpwqe_log_num_strides;
477         wqe_size = stride_size * num_strides;
478
479         packets_per_wqe = wqe_size /
480                           ALIGN(ETH_DATA_LEN, stride_size);
481         return (1 << (order_base_2(num_wqe * packets_per_wqe) - 1));
482 }
483
484 static u32 mlx5e_packets_to_rx_wqes(struct mlx5e_priv *priv, int rq_wq_type,
485                                     int num_packets)
486 {
487         int packets_per_wqe;
488         int stride_size;
489         int num_strides;
490         int wqe_size;
491         int num_wqes;
492
493         if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
494                 return num_packets;
495
496         stride_size = 1 << priv->channels.params.mpwqe_log_stride_sz;
497         num_strides = 1 << priv->channels.params.mpwqe_log_num_strides;
498         wqe_size = stride_size * num_strides;
499
500         num_packets = (1 << order_base_2(num_packets));
501
502         packets_per_wqe = wqe_size /
503                           ALIGN(ETH_DATA_LEN, stride_size);
504         num_wqes = DIV_ROUND_UP(num_packets, packets_per_wqe);
505         return 1 << (order_base_2(num_wqes));
506 }
507
508 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
509                                  struct ethtool_ringparam *param)
510 {
511         int rq_wq_type = priv->channels.params.rq_wq_type;
512
513         param->rx_max_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
514                                                          1 << mlx5_max_log_rq_size(rq_wq_type));
515         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
516         param->rx_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
517                                                      1 << priv->channels.params.log_rq_size);
518         param->tx_pending     = 1 << priv->channels.params.log_sq_size;
519 }
520
521 static void mlx5e_get_ringparam(struct net_device *dev,
522                                 struct ethtool_ringparam *param)
523 {
524         struct mlx5e_priv *priv = netdev_priv(dev);
525
526         mlx5e_ethtool_get_ringparam(priv, param);
527 }
528
529 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
530                                 struct ethtool_ringparam *param)
531 {
532         int rq_wq_type = priv->channels.params.rq_wq_type;
533         struct mlx5e_channels new_channels = {};
534         u32 rx_pending_wqes;
535         u32 min_rq_size;
536         u32 max_rq_size;
537         u8 log_rq_size;
538         u8 log_sq_size;
539         u32 num_mtts;
540         int err = 0;
541
542         if (param->rx_jumbo_pending) {
543                 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
544                             __func__);
545                 return -EINVAL;
546         }
547         if (param->rx_mini_pending) {
548                 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
549                             __func__);
550                 return -EINVAL;
551         }
552
553         min_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
554                                                1 << mlx5_min_log_rq_size(rq_wq_type));
555         max_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
556                                                1 << mlx5_max_log_rq_size(rq_wq_type));
557         rx_pending_wqes = mlx5e_packets_to_rx_wqes(priv, rq_wq_type,
558                                                    param->rx_pending);
559
560         if (param->rx_pending < min_rq_size) {
561                 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
562                             __func__, param->rx_pending,
563                             min_rq_size);
564                 return -EINVAL;
565         }
566         if (param->rx_pending > max_rq_size) {
567                 netdev_info(priv->netdev, "%s: rx_pending (%d) > max (%d)\n",
568                             __func__, param->rx_pending,
569                             max_rq_size);
570                 return -EINVAL;
571         }
572
573         num_mtts = MLX5E_REQUIRED_MTTS(rx_pending_wqes);
574         if (priv->channels.params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
575             !MLX5E_VALID_NUM_MTTS(num_mtts)) {
576                 netdev_info(priv->netdev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n",
577                             __func__, param->rx_pending);
578                 return -EINVAL;
579         }
580
581         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
582                 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
583                             __func__, param->tx_pending,
584                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
585                 return -EINVAL;
586         }
587         if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
588                 netdev_info(priv->netdev, "%s: tx_pending (%d) > max (%d)\n",
589                             __func__, param->tx_pending,
590                             1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
591                 return -EINVAL;
592         }
593
594         log_rq_size = order_base_2(rx_pending_wqes);
595         log_sq_size = order_base_2(param->tx_pending);
596
597         if (log_rq_size == priv->channels.params.log_rq_size &&
598             log_sq_size == priv->channels.params.log_sq_size)
599                 return 0;
600
601         mutex_lock(&priv->state_lock);
602
603         new_channels.params = priv->channels.params;
604         new_channels.params.log_rq_size = log_rq_size;
605         new_channels.params.log_sq_size = log_sq_size;
606
607         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
608                 priv->channels.params = new_channels.params;
609                 goto unlock;
610         }
611
612         err = mlx5e_open_channels(priv, &new_channels);
613         if (err)
614                 goto unlock;
615
616         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
617
618 unlock:
619         mutex_unlock(&priv->state_lock);
620
621         return err;
622 }
623
624 static int mlx5e_set_ringparam(struct net_device *dev,
625                                struct ethtool_ringparam *param)
626 {
627         struct mlx5e_priv *priv = netdev_priv(dev);
628
629         return mlx5e_ethtool_set_ringparam(priv, param);
630 }
631
632 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
633                                 struct ethtool_channels *ch)
634 {
635         ch->max_combined   = priv->profile->max_nch(priv->mdev);
636         ch->combined_count = priv->channels.params.num_channels;
637 }
638
639 static void mlx5e_get_channels(struct net_device *dev,
640                                struct ethtool_channels *ch)
641 {
642         struct mlx5e_priv *priv = netdev_priv(dev);
643
644         mlx5e_ethtool_get_channels(priv, ch);
645 }
646
647 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
648                                struct ethtool_channels *ch)
649 {
650         unsigned int count = ch->combined_count;
651         struct mlx5e_channels new_channels = {};
652         bool arfs_enabled;
653         int err = 0;
654
655         if (!count) {
656                 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
657                             __func__);
658                 return -EINVAL;
659         }
660
661         if (priv->channels.params.num_channels == count)
662                 return 0;
663
664         mutex_lock(&priv->state_lock);
665
666         new_channels.params = priv->channels.params;
667         new_channels.params.num_channels = count;
668         mlx5e_build_default_indir_rqt(priv->mdev, new_channels.params.indirection_rqt,
669                                       MLX5E_INDIR_RQT_SIZE, count);
670
671         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
672                 priv->channels.params = new_channels.params;
673                 goto out;
674         }
675
676         /* Create fresh channels with new parameters */
677         err = mlx5e_open_channels(priv, &new_channels);
678         if (err)
679                 goto out;
680
681         arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
682         if (arfs_enabled)
683                 mlx5e_arfs_disable(priv);
684
685         /* Switch to new channels, set new parameters and close old ones */
686         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
687
688         if (arfs_enabled) {
689                 err = mlx5e_arfs_enable(priv);
690                 if (err)
691                         netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
692                                    __func__, err);
693         }
694
695 out:
696         mutex_unlock(&priv->state_lock);
697
698         return err;
699 }
700
701 static int mlx5e_set_channels(struct net_device *dev,
702                               struct ethtool_channels *ch)
703 {
704         struct mlx5e_priv *priv = netdev_priv(dev);
705
706         return mlx5e_ethtool_set_channels(priv, ch);
707 }
708
709 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
710                                struct ethtool_coalesce *coal)
711 {
712         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
713                 return -EOPNOTSUPP;
714
715         coal->rx_coalesce_usecs       = priv->channels.params.rx_cq_moderation.usec;
716         coal->rx_max_coalesced_frames = priv->channels.params.rx_cq_moderation.pkts;
717         coal->tx_coalesce_usecs       = priv->channels.params.tx_cq_moderation.usec;
718         coal->tx_max_coalesced_frames = priv->channels.params.tx_cq_moderation.pkts;
719         coal->use_adaptive_rx_coalesce = priv->channels.params.rx_am_enabled;
720
721         return 0;
722 }
723
724 static int mlx5e_get_coalesce(struct net_device *netdev,
725                               struct ethtool_coalesce *coal)
726 {
727         struct mlx5e_priv *priv = netdev_priv(netdev);
728
729         return mlx5e_ethtool_get_coalesce(priv, coal);
730 }
731
732 static void
733 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
734 {
735         struct mlx5_core_dev *mdev = priv->mdev;
736         int tc;
737         int i;
738
739         for (i = 0; i < priv->channels.num; ++i) {
740                 struct mlx5e_channel *c = priv->channels.c[i];
741
742                 for (tc = 0; tc < c->num_tc; tc++) {
743                         mlx5_core_modify_cq_moderation(mdev,
744                                                 &c->sq[tc].cq.mcq,
745                                                 coal->tx_coalesce_usecs,
746                                                 coal->tx_max_coalesced_frames);
747                 }
748
749                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
750                                                coal->rx_coalesce_usecs,
751                                                coal->rx_max_coalesced_frames);
752         }
753 }
754
755 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
756                                struct ethtool_coalesce *coal)
757 {
758         struct mlx5_core_dev *mdev = priv->mdev;
759         struct mlx5e_channels new_channels = {};
760         int err = 0;
761         bool reset;
762
763         if (!MLX5_CAP_GEN(mdev, cq_moderation))
764                 return -EOPNOTSUPP;
765
766         mutex_lock(&priv->state_lock);
767         new_channels.params = priv->channels.params;
768
769         new_channels.params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
770         new_channels.params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
771         new_channels.params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
772         new_channels.params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
773         new_channels.params.rx_am_enabled         = !!coal->use_adaptive_rx_coalesce;
774
775         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
776                 priv->channels.params = new_channels.params;
777                 goto out;
778         }
779         /* we are opened */
780
781         reset = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_am_enabled;
782         if (!reset) {
783                 mlx5e_set_priv_channels_coalesce(priv, coal);
784                 priv->channels.params = new_channels.params;
785                 goto out;
786         }
787
788         /* open fresh channels with new coal parameters */
789         err = mlx5e_open_channels(priv, &new_channels);
790         if (err)
791                 goto out;
792
793         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
794
795 out:
796         mutex_unlock(&priv->state_lock);
797         return err;
798 }
799
800 static int mlx5e_set_coalesce(struct net_device *netdev,
801                               struct ethtool_coalesce *coal)
802 {
803         struct mlx5e_priv *priv    = netdev_priv(netdev);
804
805         return mlx5e_ethtool_set_coalesce(priv, coal);
806 }
807
808 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
809                                         u32 eth_proto_cap)
810 {
811         unsigned long proto_cap = eth_proto_cap;
812         int proto;
813
814         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
815                 bitmap_or(supported_modes, supported_modes,
816                           ptys2ethtool_table[proto].supported,
817                           __ETHTOOL_LINK_MODE_MASK_NBITS);
818 }
819
820 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
821                                     u32 eth_proto_cap)
822 {
823         unsigned long proto_cap = eth_proto_cap;
824         int proto;
825
826         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
827                 bitmap_or(advertising_modes, advertising_modes,
828                           ptys2ethtool_table[proto].advertised,
829                           __ETHTOOL_LINK_MODE_MASK_NBITS);
830 }
831
832 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
833                                                    u32 eth_proto_cap,
834                                                    u8 connector_type)
835 {
836         if (!connector_type || connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
837                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
838                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
839                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
840                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
841                                    | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
842                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
843                         ethtool_link_ksettings_add_link_mode(link_ksettings,
844                                                              supported,
845                                                              FIBRE);
846                         ethtool_link_ksettings_add_link_mode(link_ksettings,
847                                                              advertising,
848                                                              FIBRE);
849                 }
850
851                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
852                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
853                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
854                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
855                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
856                         ethtool_link_ksettings_add_link_mode(link_ksettings,
857                                                              supported,
858                                                              Backplane);
859                         ethtool_link_ksettings_add_link_mode(link_ksettings,
860                                                              advertising,
861                                                              Backplane);
862                 }
863                 return;
864         }
865
866         switch (connector_type) {
867         case MLX5E_PORT_TP:
868                 ethtool_link_ksettings_add_link_mode(link_ksettings,
869                                                      supported, TP);
870                 ethtool_link_ksettings_add_link_mode(link_ksettings,
871                                                      advertising, TP);
872                 break;
873         case MLX5E_PORT_AUI:
874                 ethtool_link_ksettings_add_link_mode(link_ksettings,
875                                                      supported, AUI);
876                 ethtool_link_ksettings_add_link_mode(link_ksettings,
877                                                      advertising, AUI);
878                 break;
879         case MLX5E_PORT_BNC:
880                 ethtool_link_ksettings_add_link_mode(link_ksettings,
881                                                      supported, BNC);
882                 ethtool_link_ksettings_add_link_mode(link_ksettings,
883                                                      advertising, BNC);
884                 break;
885         case MLX5E_PORT_MII:
886                 ethtool_link_ksettings_add_link_mode(link_ksettings,
887                                                      supported, MII);
888                 ethtool_link_ksettings_add_link_mode(link_ksettings,
889                                                      advertising, MII);
890                 break;
891         case MLX5E_PORT_FIBRE:
892                 ethtool_link_ksettings_add_link_mode(link_ksettings,
893                                                      supported, FIBRE);
894                 ethtool_link_ksettings_add_link_mode(link_ksettings,
895                                                      advertising, FIBRE);
896                 break;
897         case MLX5E_PORT_DA:
898                 ethtool_link_ksettings_add_link_mode(link_ksettings,
899                                                      supported, Backplane);
900                 ethtool_link_ksettings_add_link_mode(link_ksettings,
901                                                      advertising, Backplane);
902                 break;
903         case MLX5E_PORT_NONE:
904         case MLX5E_PORT_OTHER:
905         default:
906                 break;
907         }
908 }
909
910 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
911 {
912         u32 max_speed = 0;
913         u32 proto_cap;
914         int err;
915         int i;
916
917         err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
918         if (err)
919                 return err;
920
921         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
922                 if (proto_cap & MLX5E_PROT_MASK(i))
923                         max_speed = max(max_speed, ptys2ethtool_table[i].speed);
924
925         *speed = max_speed;
926         return 0;
927 }
928
929 static void get_speed_duplex(struct net_device *netdev,
930                              u32 eth_proto_oper,
931                              struct ethtool_link_ksettings *link_ksettings)
932 {
933         int i;
934         u32 speed = SPEED_UNKNOWN;
935         u8 duplex = DUPLEX_UNKNOWN;
936
937         if (!netif_carrier_ok(netdev))
938                 goto out;
939
940         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
941                 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
942                         speed = ptys2ethtool_table[i].speed;
943                         duplex = DUPLEX_FULL;
944                         break;
945                 }
946         }
947 out:
948         link_ksettings->base.speed = speed;
949         link_ksettings->base.duplex = duplex;
950 }
951
952 static void get_supported(u32 eth_proto_cap,
953                           struct ethtool_link_ksettings *link_ksettings)
954 {
955         unsigned long *supported = link_ksettings->link_modes.supported;
956
957         ptys2ethtool_supported_link(supported, eth_proto_cap);
958         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
959 }
960
961 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
962                             u8 rx_pause,
963                             struct ethtool_link_ksettings *link_ksettings)
964 {
965         unsigned long *advertising = link_ksettings->link_modes.advertising;
966
967         ptys2ethtool_adver_link(advertising, eth_proto_cap);
968         if (rx_pause)
969                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
970         if (tx_pause ^ rx_pause)
971                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
972 }
973
974 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
975                 [MLX5E_PORT_UNKNOWN]            = PORT_OTHER,
976                 [MLX5E_PORT_NONE]               = PORT_NONE,
977                 [MLX5E_PORT_TP]                 = PORT_TP,
978                 [MLX5E_PORT_AUI]                = PORT_AUI,
979                 [MLX5E_PORT_BNC]                = PORT_BNC,
980                 [MLX5E_PORT_MII]                = PORT_MII,
981                 [MLX5E_PORT_FIBRE]              = PORT_FIBRE,
982                 [MLX5E_PORT_DA]                 = PORT_DA,
983                 [MLX5E_PORT_OTHER]              = PORT_OTHER,
984         };
985
986 static u8 get_connector_port(u32 eth_proto, u8 connector_type)
987 {
988         if (connector_type && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
989                 return ptys2connector_type[connector_type];
990
991         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
992                          | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
993                          | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
994                          | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
995                         return PORT_FIBRE;
996         }
997
998         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
999                          | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
1000                          | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
1001                         return PORT_DA;
1002         }
1003
1004         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
1005                          | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
1006                          | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
1007                          | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
1008                         return PORT_NONE;
1009         }
1010
1011         return PORT_OTHER;
1012 }
1013
1014 static void get_lp_advertising(u32 eth_proto_lp,
1015                                struct ethtool_link_ksettings *link_ksettings)
1016 {
1017         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
1018
1019         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
1020 }
1021
1022 static int mlx5e_get_link_ksettings(struct net_device *netdev,
1023                                     struct ethtool_link_ksettings *link_ksettings)
1024 {
1025         struct mlx5e_priv *priv    = netdev_priv(netdev);
1026         struct mlx5_core_dev *mdev = priv->mdev;
1027         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
1028         u32 rx_pause = 0;
1029         u32 tx_pause = 0;
1030         u32 eth_proto_cap;
1031         u32 eth_proto_admin;
1032         u32 eth_proto_lp;
1033         u32 eth_proto_oper;
1034         u8 an_disable_admin;
1035         u8 an_status;
1036         u8 connector_type;
1037         int err;
1038
1039         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
1040         if (err) {
1041                 netdev_err(netdev, "%s: query port ptys failed: %d\n",
1042                            __func__, err);
1043                 goto err_query_ptys;
1044         }
1045
1046         eth_proto_cap    = MLX5_GET(ptys_reg, out, eth_proto_capability);
1047         eth_proto_admin  = MLX5_GET(ptys_reg, out, eth_proto_admin);
1048         eth_proto_oper   = MLX5_GET(ptys_reg, out, eth_proto_oper);
1049         eth_proto_lp     = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
1050         an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
1051         an_status        = MLX5_GET(ptys_reg, out, an_status);
1052         connector_type   = MLX5_GET(ptys_reg, out, connector_type);
1053
1054         mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
1055
1056         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
1057         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
1058
1059         get_supported(eth_proto_cap, link_ksettings);
1060         get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings);
1061         get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
1062
1063         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1064
1065         link_ksettings->base.port = get_connector_port(eth_proto_oper,
1066                                                        connector_type);
1067         ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
1068                                                connector_type);
1069         get_lp_advertising(eth_proto_lp, link_ksettings);
1070
1071         if (an_status == MLX5_AN_COMPLETE)
1072                 ethtool_link_ksettings_add_link_mode(link_ksettings,
1073                                                      lp_advertising, Autoneg);
1074
1075         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
1076                                                           AUTONEG_ENABLE;
1077         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
1078                                              Autoneg);
1079         if (!an_disable_admin)
1080                 ethtool_link_ksettings_add_link_mode(link_ksettings,
1081                                                      advertising, Autoneg);
1082
1083 err_query_ptys:
1084         return err;
1085 }
1086
1087 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
1088 {
1089         u32 i, ptys_modes = 0;
1090
1091         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
1092                 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
1093                                       link_modes,
1094                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
1095                         ptys_modes |= MLX5E_PROT_MASK(i);
1096         }
1097
1098         return ptys_modes;
1099 }
1100
1101 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
1102 {
1103         u32 i, speed_links = 0;
1104
1105         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
1106                 if (ptys2ethtool_table[i].speed == speed)
1107                         speed_links |= MLX5E_PROT_MASK(i);
1108         }
1109
1110         return speed_links;
1111 }
1112
1113 static int mlx5e_set_link_ksettings(struct net_device *netdev,
1114                                     const struct ethtool_link_ksettings *link_ksettings)
1115 {
1116         struct mlx5e_priv *priv    = netdev_priv(netdev);
1117         struct mlx5_core_dev *mdev = priv->mdev;
1118         u32 eth_proto_cap, eth_proto_admin;
1119         bool an_changes = false;
1120         u8 an_disable_admin;
1121         u8 an_disable_cap;
1122         bool an_disable;
1123         u32 link_modes;
1124         u8 an_status;
1125         u32 speed;
1126         int err;
1127
1128         speed = link_ksettings->base.speed;
1129
1130         link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
1131                 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
1132                 mlx5e_ethtool2ptys_speed_link(speed);
1133
1134         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
1135         if (err) {
1136                 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
1137                            __func__, err);
1138                 goto out;
1139         }
1140
1141         link_modes = link_modes & eth_proto_cap;
1142         if (!link_modes) {
1143                 netdev_err(netdev, "%s: Not supported link mode(s) requested",
1144                            __func__);
1145                 err = -EINVAL;
1146                 goto out;
1147         }
1148
1149         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
1150         if (err) {
1151                 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
1152                            __func__, err);
1153                 goto out;
1154         }
1155
1156         mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
1157                                 &an_disable_cap, &an_disable_admin);
1158
1159         an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
1160         an_changes = ((!an_disable && an_disable_admin) ||
1161                       (an_disable && !an_disable_admin));
1162
1163         if (!an_changes && link_modes == eth_proto_admin)
1164                 goto out;
1165
1166         mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
1167         mlx5_toggle_port_link(mdev);
1168
1169 out:
1170         return err;
1171 }
1172
1173 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
1174 {
1175         struct mlx5e_priv *priv = netdev_priv(netdev);
1176
1177         return sizeof(priv->channels.params.toeplitz_hash_key);
1178 }
1179
1180 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
1181 {
1182         return MLX5E_INDIR_RQT_SIZE;
1183 }
1184
1185 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
1186                           u8 *hfunc)
1187 {
1188         struct mlx5e_priv *priv = netdev_priv(netdev);
1189
1190         if (indir)
1191                 memcpy(indir, priv->channels.params.indirection_rqt,
1192                        sizeof(priv->channels.params.indirection_rqt));
1193
1194         if (key)
1195                 memcpy(key, priv->channels.params.toeplitz_hash_key,
1196                        sizeof(priv->channels.params.toeplitz_hash_key));
1197
1198         if (hfunc)
1199                 *hfunc = priv->channels.params.rss_hfunc;
1200
1201         return 0;
1202 }
1203
1204 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
1205 {
1206         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
1207         struct mlx5_core_dev *mdev = priv->mdev;
1208         int ctxlen = MLX5_ST_SZ_BYTES(tirc);
1209         int tt;
1210
1211         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
1212
1213         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
1214                 memset(tirc, 0, ctxlen);
1215                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc);
1216                 mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
1217         }
1218 }
1219
1220 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
1221                           const u8 *key, const u8 hfunc)
1222 {
1223         struct mlx5e_priv *priv = netdev_priv(dev);
1224         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
1225         bool hash_changed = false;
1226         void *in;
1227
1228         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1229             (hfunc != ETH_RSS_HASH_XOR) &&
1230             (hfunc != ETH_RSS_HASH_TOP))
1231                 return -EINVAL;
1232
1233         in = kvzalloc(inlen, GFP_KERNEL);
1234         if (!in)
1235                 return -ENOMEM;
1236
1237         mutex_lock(&priv->state_lock);
1238
1239         if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
1240             hfunc != priv->channels.params.rss_hfunc) {
1241                 priv->channels.params.rss_hfunc = hfunc;
1242                 hash_changed = true;
1243         }
1244
1245         if (indir) {
1246                 memcpy(priv->channels.params.indirection_rqt, indir,
1247                        sizeof(priv->channels.params.indirection_rqt));
1248
1249                 if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1250                         u32 rqtn = priv->indir_rqt.rqtn;
1251                         struct mlx5e_redirect_rqt_param rrp = {
1252                                 .is_rss = true,
1253                                 {
1254                                         .rss = {
1255                                                 .hfunc = priv->channels.params.rss_hfunc,
1256                                                 .channels  = &priv->channels,
1257                                         },
1258                                 },
1259                         };
1260
1261                         mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
1262                 }
1263         }
1264
1265         if (key) {
1266                 memcpy(priv->channels.params.toeplitz_hash_key, key,
1267                        sizeof(priv->channels.params.toeplitz_hash_key));
1268                 hash_changed = hash_changed ||
1269                                priv->channels.params.rss_hfunc == ETH_RSS_HASH_TOP;
1270         }
1271
1272         if (hash_changed)
1273                 mlx5e_modify_tirs_hash(priv, in, inlen);
1274
1275         mutex_unlock(&priv->state_lock);
1276
1277         kvfree(in);
1278
1279         return 0;
1280 }
1281
1282 static int mlx5e_get_rxnfc(struct net_device *netdev,
1283                            struct ethtool_rxnfc *info, u32 *rule_locs)
1284 {
1285         struct mlx5e_priv *priv = netdev_priv(netdev);
1286         int err = 0;
1287
1288         switch (info->cmd) {
1289         case ETHTOOL_GRXRINGS:
1290                 info->data = priv->channels.params.num_channels;
1291                 break;
1292         case ETHTOOL_GRXCLSRLCNT:
1293                 info->rule_cnt = priv->fs.ethtool.tot_num_rules;
1294                 break;
1295         case ETHTOOL_GRXCLSRULE:
1296                 err = mlx5e_ethtool_get_flow(priv, info, info->fs.location);
1297                 break;
1298         case ETHTOOL_GRXCLSRLALL:
1299                 err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);
1300                 break;
1301         default:
1302                 err = -EOPNOTSUPP;
1303                 break;
1304         }
1305
1306         return err;
1307 }
1308
1309 static int mlx5e_get_tunable(struct net_device *dev,
1310                              const struct ethtool_tunable *tuna,
1311                              void *data)
1312 {
1313         const struct mlx5e_priv *priv = netdev_priv(dev);
1314         int err = 0;
1315
1316         switch (tuna->id) {
1317         case ETHTOOL_TX_COPYBREAK:
1318                 *(u32 *)data = priv->channels.params.tx_max_inline;
1319                 break;
1320         default:
1321                 err = -EINVAL;
1322                 break;
1323         }
1324
1325         return err;
1326 }
1327
1328 static int mlx5e_set_tunable(struct net_device *dev,
1329                              const struct ethtool_tunable *tuna,
1330                              const void *data)
1331 {
1332         struct mlx5e_priv *priv = netdev_priv(dev);
1333         struct mlx5_core_dev *mdev = priv->mdev;
1334         struct mlx5e_channels new_channels = {};
1335         int err = 0;
1336         u32 val;
1337
1338         mutex_lock(&priv->state_lock);
1339
1340         switch (tuna->id) {
1341         case ETHTOOL_TX_COPYBREAK:
1342                 val = *(u32 *)data;
1343                 if (val > mlx5e_get_max_inline_cap(mdev)) {
1344                         err = -EINVAL;
1345                         break;
1346                 }
1347
1348                 new_channels.params = priv->channels.params;
1349                 new_channels.params.tx_max_inline = val;
1350
1351                 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1352                         priv->channels.params = new_channels.params;
1353                         break;
1354                 }
1355
1356                 err = mlx5e_open_channels(priv, &new_channels);
1357                 if (err)
1358                         break;
1359                 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1360
1361                 break;
1362         default:
1363                 err = -EINVAL;
1364                 break;
1365         }
1366
1367         mutex_unlock(&priv->state_lock);
1368         return err;
1369 }
1370
1371 static void mlx5e_get_pauseparam(struct net_device *netdev,
1372                                  struct ethtool_pauseparam *pauseparam)
1373 {
1374         struct mlx5e_priv *priv    = netdev_priv(netdev);
1375         struct mlx5_core_dev *mdev = priv->mdev;
1376         int err;
1377
1378         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1379                                     &pauseparam->tx_pause);
1380         if (err) {
1381                 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1382                            __func__, err);
1383         }
1384 }
1385
1386 static int mlx5e_set_pauseparam(struct net_device *netdev,
1387                                 struct ethtool_pauseparam *pauseparam)
1388 {
1389         struct mlx5e_priv *priv    = netdev_priv(netdev);
1390         struct mlx5_core_dev *mdev = priv->mdev;
1391         int err;
1392
1393         if (pauseparam->autoneg)
1394                 return -EINVAL;
1395
1396         err = mlx5_set_port_pause(mdev,
1397                                   pauseparam->rx_pause ? 1 : 0,
1398                                   pauseparam->tx_pause ? 1 : 0);
1399         if (err) {
1400                 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1401                            __func__, err);
1402         }
1403
1404         return err;
1405 }
1406
1407 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1408                               struct ethtool_ts_info *info)
1409 {
1410         int ret;
1411
1412         ret = ethtool_op_get_ts_info(priv->netdev, info);
1413         if (ret)
1414                 return ret;
1415
1416         info->phc_index = priv->tstamp.ptp ?
1417                           ptp_clock_index(priv->tstamp.ptp) : -1;
1418
1419         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1420                 return 0;
1421
1422         info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1423                                  SOF_TIMESTAMPING_RX_HARDWARE |
1424                                  SOF_TIMESTAMPING_RAW_HARDWARE;
1425
1426         info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1427                          BIT(HWTSTAMP_TX_ON);
1428
1429         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1430                            BIT(HWTSTAMP_FILTER_ALL);
1431
1432         return 0;
1433 }
1434
1435 static int mlx5e_get_ts_info(struct net_device *dev,
1436                              struct ethtool_ts_info *info)
1437 {
1438         struct mlx5e_priv *priv = netdev_priv(dev);
1439
1440         return mlx5e_ethtool_get_ts_info(priv, info);
1441 }
1442
1443 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1444 {
1445         __u32 ret = 0;
1446
1447         if (MLX5_CAP_GEN(mdev, wol_g))
1448                 ret |= WAKE_MAGIC;
1449
1450         if (MLX5_CAP_GEN(mdev, wol_s))
1451                 ret |= WAKE_MAGICSECURE;
1452
1453         if (MLX5_CAP_GEN(mdev, wol_a))
1454                 ret |= WAKE_ARP;
1455
1456         if (MLX5_CAP_GEN(mdev, wol_b))
1457                 ret |= WAKE_BCAST;
1458
1459         if (MLX5_CAP_GEN(mdev, wol_m))
1460                 ret |= WAKE_MCAST;
1461
1462         if (MLX5_CAP_GEN(mdev, wol_u))
1463                 ret |= WAKE_UCAST;
1464
1465         if (MLX5_CAP_GEN(mdev, wol_p))
1466                 ret |= WAKE_PHY;
1467
1468         return ret;
1469 }
1470
1471 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1472 {
1473         __u32 ret = 0;
1474
1475         if (mode & MLX5_WOL_MAGIC)
1476                 ret |= WAKE_MAGIC;
1477
1478         if (mode & MLX5_WOL_SECURED_MAGIC)
1479                 ret |= WAKE_MAGICSECURE;
1480
1481         if (mode & MLX5_WOL_ARP)
1482                 ret |= WAKE_ARP;
1483
1484         if (mode & MLX5_WOL_BROADCAST)
1485                 ret |= WAKE_BCAST;
1486
1487         if (mode & MLX5_WOL_MULTICAST)
1488                 ret |= WAKE_MCAST;
1489
1490         if (mode & MLX5_WOL_UNICAST)
1491                 ret |= WAKE_UCAST;
1492
1493         if (mode & MLX5_WOL_PHY_ACTIVITY)
1494                 ret |= WAKE_PHY;
1495
1496         return ret;
1497 }
1498
1499 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1500 {
1501         u8 ret = 0;
1502
1503         if (mode & WAKE_MAGIC)
1504                 ret |= MLX5_WOL_MAGIC;
1505
1506         if (mode & WAKE_MAGICSECURE)
1507                 ret |= MLX5_WOL_SECURED_MAGIC;
1508
1509         if (mode & WAKE_ARP)
1510                 ret |= MLX5_WOL_ARP;
1511
1512         if (mode & WAKE_BCAST)
1513                 ret |= MLX5_WOL_BROADCAST;
1514
1515         if (mode & WAKE_MCAST)
1516                 ret |= MLX5_WOL_MULTICAST;
1517
1518         if (mode & WAKE_UCAST)
1519                 ret |= MLX5_WOL_UNICAST;
1520
1521         if (mode & WAKE_PHY)
1522                 ret |= MLX5_WOL_PHY_ACTIVITY;
1523
1524         return ret;
1525 }
1526
1527 static void mlx5e_get_wol(struct net_device *netdev,
1528                           struct ethtool_wolinfo *wol)
1529 {
1530         struct mlx5e_priv *priv = netdev_priv(netdev);
1531         struct mlx5_core_dev *mdev = priv->mdev;
1532         u8 mlx5_wol_mode;
1533         int err;
1534
1535         memset(wol, 0, sizeof(*wol));
1536
1537         wol->supported = mlx5e_get_wol_supported(mdev);
1538         if (!wol->supported)
1539                 return;
1540
1541         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1542         if (err)
1543                 return;
1544
1545         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1546 }
1547
1548 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1549 {
1550         struct mlx5e_priv *priv = netdev_priv(netdev);
1551         struct mlx5_core_dev *mdev = priv->mdev;
1552         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1553         u32 mlx5_wol_mode;
1554
1555         if (!wol_supported)
1556                 return -EOPNOTSUPP;
1557
1558         if (wol->wolopts & ~wol_supported)
1559                 return -EINVAL;
1560
1561         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1562
1563         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1564 }
1565
1566 static int mlx5e_set_phys_id(struct net_device *dev,
1567                              enum ethtool_phys_id_state state)
1568 {
1569         struct mlx5e_priv *priv = netdev_priv(dev);
1570         struct mlx5_core_dev *mdev = priv->mdev;
1571         u16 beacon_duration;
1572
1573         if (!MLX5_CAP_GEN(mdev, beacon_led))
1574                 return -EOPNOTSUPP;
1575
1576         switch (state) {
1577         case ETHTOOL_ID_ACTIVE:
1578                 beacon_duration = MLX5_BEACON_DURATION_INF;
1579                 break;
1580         case ETHTOOL_ID_INACTIVE:
1581                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1582                 break;
1583         default:
1584                 return -EOPNOTSUPP;
1585         }
1586
1587         return mlx5_set_port_beacon(mdev, beacon_duration);
1588 }
1589
1590 static int mlx5e_get_module_info(struct net_device *netdev,
1591                                  struct ethtool_modinfo *modinfo)
1592 {
1593         struct mlx5e_priv *priv = netdev_priv(netdev);
1594         struct mlx5_core_dev *dev = priv->mdev;
1595         int size_read = 0;
1596         u8 data[4];
1597
1598         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1599         if (size_read < 2)
1600                 return -EIO;
1601
1602         /* data[0] = identifier byte */
1603         switch (data[0]) {
1604         case MLX5_MODULE_ID_QSFP:
1605                 modinfo->type       = ETH_MODULE_SFF_8436;
1606                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1607                 break;
1608         case MLX5_MODULE_ID_QSFP_PLUS:
1609         case MLX5_MODULE_ID_QSFP28:
1610                 /* data[1] = revision id */
1611                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1612                         modinfo->type       = ETH_MODULE_SFF_8636;
1613                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1614                 } else {
1615                         modinfo->type       = ETH_MODULE_SFF_8436;
1616                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1617                 }
1618                 break;
1619         case MLX5_MODULE_ID_SFP:
1620                 modinfo->type       = ETH_MODULE_SFF_8472;
1621                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1622                 break;
1623         default:
1624                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1625                            __func__, data[0]);
1626                 return -EINVAL;
1627         }
1628
1629         return 0;
1630 }
1631
1632 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1633                                    struct ethtool_eeprom *ee,
1634                                    u8 *data)
1635 {
1636         struct mlx5e_priv *priv = netdev_priv(netdev);
1637         struct mlx5_core_dev *mdev = priv->mdev;
1638         int offset = ee->offset;
1639         int size_read;
1640         int i = 0;
1641
1642         if (!ee->len)
1643                 return -EINVAL;
1644
1645         memset(data, 0, ee->len);
1646
1647         while (i < ee->len) {
1648                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1649                                                      data + i);
1650
1651                 if (!size_read)
1652                         /* Done reading */
1653                         return 0;
1654
1655                 if (size_read < 0) {
1656                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1657                                    __func__, size_read);
1658                         return 0;
1659                 }
1660
1661                 i += size_read;
1662                 offset += size_read;
1663         }
1664
1665         return 0;
1666 }
1667
1668 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1669
1670 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1671 {
1672         struct mlx5e_priv *priv = netdev_priv(netdev);
1673         struct mlx5_core_dev *mdev = priv->mdev;
1674         struct mlx5e_channels new_channels = {};
1675         bool rx_mode_changed;
1676         u8 rx_cq_period_mode;
1677         int err = 0;
1678
1679         rx_cq_period_mode = enable ?
1680                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1681                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1682         rx_mode_changed = rx_cq_period_mode != priv->channels.params.rx_cq_period_mode;
1683
1684         if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1685             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1686                 return -EOPNOTSUPP;
1687
1688         if (!rx_mode_changed)
1689                 return 0;
1690
1691         new_channels.params = priv->channels.params;
1692         mlx5e_set_rx_cq_mode_params(&new_channels.params, rx_cq_period_mode);
1693
1694         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1695                 priv->channels.params = new_channels.params;
1696                 return 0;
1697         }
1698
1699         err = mlx5e_open_channels(priv, &new_channels);
1700         if (err)
1701                 return err;
1702
1703         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1704         return 0;
1705 }
1706
1707 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1708 {
1709         bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1710         struct mlx5e_channels new_channels = {};
1711         int err = 0;
1712
1713         if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1714                 return new_val ? -EOPNOTSUPP : 0;
1715
1716         if (curr_val == new_val)
1717                 return 0;
1718
1719         new_channels.params = priv->channels.params;
1720         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1721
1722         mlx5e_set_rq_type_params(priv->mdev, &new_channels.params,
1723                                  new_channels.params.rq_wq_type);
1724
1725         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1726                 priv->channels.params = new_channels.params;
1727                 return 0;
1728         }
1729
1730         err = mlx5e_open_channels(priv, &new_channels);
1731         if (err)
1732                 return err;
1733
1734         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1735         return 0;
1736 }
1737
1738 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1739                                      bool enable)
1740 {
1741         struct mlx5e_priv *priv = netdev_priv(netdev);
1742         struct mlx5_core_dev *mdev = priv->mdev;
1743
1744         if (!MLX5_CAP_GEN(mdev, cqe_compression))
1745                 return -EOPNOTSUPP;
1746
1747         if (enable && priv->tstamp.hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
1748                 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
1749                 return -EINVAL;
1750         }
1751
1752         mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1753         priv->channels.params.rx_cqe_compress_def = enable;
1754
1755         return 0;
1756 }
1757
1758 static int mlx5e_handle_pflag(struct net_device *netdev,
1759                               u32 wanted_flags,
1760                               enum mlx5e_priv_flag flag,
1761                               mlx5e_pflag_handler pflag_handler)
1762 {
1763         struct mlx5e_priv *priv = netdev_priv(netdev);
1764         bool enable = !!(wanted_flags & flag);
1765         u32 changes = wanted_flags ^ priv->channels.params.pflags;
1766         int err;
1767
1768         if (!(changes & flag))
1769                 return 0;
1770
1771         err = pflag_handler(netdev, enable);
1772         if (err) {
1773                 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1774                            enable ? "Enable" : "Disable", flag, err);
1775                 return err;
1776         }
1777
1778         MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
1779         return 0;
1780 }
1781
1782 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1783 {
1784         struct mlx5e_priv *priv = netdev_priv(netdev);
1785         int err;
1786
1787         mutex_lock(&priv->state_lock);
1788         err = mlx5e_handle_pflag(netdev, pflags,
1789                                  MLX5E_PFLAG_RX_CQE_BASED_MODER,
1790                                  set_pflag_rx_cqe_based_moder);
1791         if (err)
1792                 goto out;
1793
1794         err = mlx5e_handle_pflag(netdev, pflags,
1795                                  MLX5E_PFLAG_RX_CQE_COMPRESS,
1796                                  set_pflag_rx_cqe_compress);
1797
1798 out:
1799         mutex_unlock(&priv->state_lock);
1800         return err;
1801 }
1802
1803 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1804 {
1805         struct mlx5e_priv *priv = netdev_priv(netdev);
1806
1807         return priv->channels.params.pflags;
1808 }
1809
1810 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1811 {
1812         int err = 0;
1813         struct mlx5e_priv *priv = netdev_priv(dev);
1814
1815         switch (cmd->cmd) {
1816         case ETHTOOL_SRXCLSRLINS:
1817                 err = mlx5e_ethtool_flow_replace(priv, &cmd->fs);
1818                 break;
1819         case ETHTOOL_SRXCLSRLDEL:
1820                 err = mlx5e_ethtool_flow_remove(priv, cmd->fs.location);
1821                 break;
1822         default:
1823                 err = -EOPNOTSUPP;
1824                 break;
1825         }
1826
1827         return err;
1828 }
1829
1830 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1831                                struct ethtool_flash *flash)
1832 {
1833         struct mlx5_core_dev *mdev = priv->mdev;
1834         struct net_device *dev = priv->netdev;
1835         const struct firmware *fw;
1836         int err;
1837
1838         if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1839                 return -EOPNOTSUPP;
1840
1841         err = request_firmware_direct(&fw, flash->data, &dev->dev);
1842         if (err)
1843                 return err;
1844
1845         dev_hold(dev);
1846         rtnl_unlock();
1847
1848         err = mlx5_firmware_flash(mdev, fw);
1849         release_firmware(fw);
1850
1851         rtnl_lock();
1852         dev_put(dev);
1853         return err;
1854 }
1855
1856 static int mlx5e_flash_device(struct net_device *dev,
1857                               struct ethtool_flash *flash)
1858 {
1859         struct mlx5e_priv *priv = netdev_priv(dev);
1860
1861         return mlx5e_ethtool_flash_device(priv, flash);
1862 }
1863
1864 const struct ethtool_ops mlx5e_ethtool_ops = {
1865         .get_drvinfo       = mlx5e_get_drvinfo,
1866         .get_link          = ethtool_op_get_link,
1867         .get_strings       = mlx5e_get_strings,
1868         .get_sset_count    = mlx5e_get_sset_count,
1869         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1870         .get_ringparam     = mlx5e_get_ringparam,
1871         .set_ringparam     = mlx5e_set_ringparam,
1872         .get_channels      = mlx5e_get_channels,
1873         .set_channels      = mlx5e_set_channels,
1874         .get_coalesce      = mlx5e_get_coalesce,
1875         .set_coalesce      = mlx5e_set_coalesce,
1876         .get_link_ksettings  = mlx5e_get_link_ksettings,
1877         .set_link_ksettings  = mlx5e_set_link_ksettings,
1878         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1879         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1880         .get_rxfh          = mlx5e_get_rxfh,
1881         .set_rxfh          = mlx5e_set_rxfh,
1882         .get_rxnfc         = mlx5e_get_rxnfc,
1883         .set_rxnfc         = mlx5e_set_rxnfc,
1884         .flash_device      = mlx5e_flash_device,
1885         .get_tunable       = mlx5e_get_tunable,
1886         .set_tunable       = mlx5e_set_tunable,
1887         .get_pauseparam    = mlx5e_get_pauseparam,
1888         .set_pauseparam    = mlx5e_set_pauseparam,
1889         .get_ts_info       = mlx5e_get_ts_info,
1890         .set_phys_id       = mlx5e_set_phys_id,
1891         .get_wol           = mlx5e_get_wol,
1892         .set_wol           = mlx5e_set_wol,
1893         .get_module_info   = mlx5e_get_module_info,
1894         .get_module_eeprom = mlx5e_get_module_eeprom,
1895         .get_priv_flags    = mlx5e_get_priv_flags,
1896         .set_priv_flags    = mlx5e_set_priv_flags,
1897         .self_test         = mlx5e_self_test,
1898 };