net/mlx5: Add flow counters idr
[sfrench/cifs-2.6.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
1 /*
2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include "en.h"
34 #include "en/port.h"
35 #include "lib/clock.h"
36
37 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
38                                struct ethtool_drvinfo *drvinfo)
39 {
40         struct mlx5_core_dev *mdev = priv->mdev;
41
42         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
43         strlcpy(drvinfo->version, DRIVER_VERSION,
44                 sizeof(drvinfo->version));
45         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
46                  "%d.%d.%04d (%.16s)",
47                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
48                  mdev->board_id);
49         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
50                 sizeof(drvinfo->bus_info));
51 }
52
53 static void mlx5e_get_drvinfo(struct net_device *dev,
54                               struct ethtool_drvinfo *drvinfo)
55 {
56         struct mlx5e_priv *priv = netdev_priv(dev);
57
58         mlx5e_ethtool_get_drvinfo(priv, drvinfo);
59 }
60
61 struct ptys2ethtool_config {
62         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
63         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
64 };
65
66 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
67
68 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, ...)                       \
69         ({                                                              \
70                 struct ptys2ethtool_config *cfg;                        \
71                 const unsigned int modes[] = { __VA_ARGS__ };           \
72                 unsigned int i;                                         \
73                 cfg = &ptys2ethtool_table[reg_];                        \
74                 bitmap_zero(cfg->supported,                             \
75                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
76                 bitmap_zero(cfg->advertised,                            \
77                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
78                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
79                         __set_bit(modes[i], cfg->supported);            \
80                         __set_bit(modes[i], cfg->advertised);           \
81                 }                                                       \
82         })
83
84 void mlx5e_build_ptys2ethtool_map(void)
85 {
86         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII,
87                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
88         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX,
89                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
90         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4,
91                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
92         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4,
93                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
94         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR,
95                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
96         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2,
97                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
98         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4,
99                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
100         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4,
101                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
102         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4,
103                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
104         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR,
105                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
106         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR,
107                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
108         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER,
109                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
110         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4,
111                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
112         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4,
113                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
114         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2,
115                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
116         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4,
117                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
118         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4,
119                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
120         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4,
121                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
122         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4,
123                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
124         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T,
125                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
126         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR,
127                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
128         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR,
129                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
130         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR,
131                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
132         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2,
133                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
134         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2,
135                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
136 }
137
138 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
139 {
140         int i, num_stats = 0;
141
142         switch (sset) {
143         case ETH_SS_STATS:
144                 for (i = 0; i < mlx5e_num_stats_grps; i++)
145                         num_stats += mlx5e_stats_grps[i].get_num_stats(priv);
146                 return num_stats;
147         case ETH_SS_PRIV_FLAGS:
148                 return ARRAY_SIZE(mlx5e_priv_flags);
149         case ETH_SS_TEST:
150                 return mlx5e_self_test_num(priv);
151         /* fallthrough */
152         default:
153                 return -EOPNOTSUPP;
154         }
155 }
156
157 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
158 {
159         struct mlx5e_priv *priv = netdev_priv(dev);
160
161         return mlx5e_ethtool_get_sset_count(priv, sset);
162 }
163
164 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, u8 *data)
165 {
166         int i, idx = 0;
167
168         for (i = 0; i < mlx5e_num_stats_grps; i++)
169                 idx = mlx5e_stats_grps[i].fill_strings(priv, data, idx);
170 }
171
172 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
173 {
174         int i;
175
176         switch (stringset) {
177         case ETH_SS_PRIV_FLAGS:
178                 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
179                         strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
180                 break;
181
182         case ETH_SS_TEST:
183                 for (i = 0; i < mlx5e_self_test_num(priv); i++)
184                         strcpy(data + i * ETH_GSTRING_LEN,
185                                mlx5e_self_tests[i]);
186                 break;
187
188         case ETH_SS_STATS:
189                 mlx5e_fill_stats_strings(priv, data);
190                 break;
191         }
192 }
193
194 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
195 {
196         struct mlx5e_priv *priv = netdev_priv(dev);
197
198         mlx5e_ethtool_get_strings(priv, stringset, data);
199 }
200
201 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
202                                      struct ethtool_stats *stats, u64 *data)
203 {
204         int i, idx = 0;
205
206         mutex_lock(&priv->state_lock);
207         mlx5e_update_stats(priv);
208         mutex_unlock(&priv->state_lock);
209
210         for (i = 0; i < mlx5e_num_stats_grps; i++)
211                 idx = mlx5e_stats_grps[i].fill_stats(priv, data, idx);
212 }
213
214 static void mlx5e_get_ethtool_stats(struct net_device *dev,
215                                     struct ethtool_stats *stats,
216                                     u64 *data)
217 {
218         struct mlx5e_priv *priv = netdev_priv(dev);
219
220         mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
221 }
222
223 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
224                                  struct ethtool_ringparam *param)
225 {
226         param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
227         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
228         param->rx_pending     = 1 << priv->channels.params.log_rq_mtu_frames;
229         param->tx_pending     = 1 << priv->channels.params.log_sq_size;
230 }
231
232 static void mlx5e_get_ringparam(struct net_device *dev,
233                                 struct ethtool_ringparam *param)
234 {
235         struct mlx5e_priv *priv = netdev_priv(dev);
236
237         mlx5e_ethtool_get_ringparam(priv, param);
238 }
239
240 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
241                                 struct ethtool_ringparam *param)
242 {
243         struct mlx5e_channels new_channels = {};
244         u8 log_rq_size;
245         u8 log_sq_size;
246         int err = 0;
247
248         if (param->rx_jumbo_pending) {
249                 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
250                             __func__);
251                 return -EINVAL;
252         }
253         if (param->rx_mini_pending) {
254                 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
255                             __func__);
256                 return -EINVAL;
257         }
258
259         if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
260                 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
261                             __func__, param->rx_pending,
262                             1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
263                 return -EINVAL;
264         }
265
266         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
267                 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
268                             __func__, param->tx_pending,
269                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
270                 return -EINVAL;
271         }
272
273         log_rq_size = order_base_2(param->rx_pending);
274         log_sq_size = order_base_2(param->tx_pending);
275
276         if (log_rq_size == priv->channels.params.log_rq_mtu_frames &&
277             log_sq_size == priv->channels.params.log_sq_size)
278                 return 0;
279
280         mutex_lock(&priv->state_lock);
281
282         new_channels.params = priv->channels.params;
283         new_channels.params.log_rq_mtu_frames = log_rq_size;
284         new_channels.params.log_sq_size = log_sq_size;
285
286         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
287                 priv->channels.params = new_channels.params;
288                 goto unlock;
289         }
290
291         err = mlx5e_open_channels(priv, &new_channels);
292         if (err)
293                 goto unlock;
294
295         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
296
297 unlock:
298         mutex_unlock(&priv->state_lock);
299
300         return err;
301 }
302
303 static int mlx5e_set_ringparam(struct net_device *dev,
304                                struct ethtool_ringparam *param)
305 {
306         struct mlx5e_priv *priv = netdev_priv(dev);
307
308         return mlx5e_ethtool_set_ringparam(priv, param);
309 }
310
311 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
312                                 struct ethtool_channels *ch)
313 {
314         ch->max_combined   = priv->profile->max_nch(priv->mdev);
315         ch->combined_count = priv->channels.params.num_channels;
316 }
317
318 static void mlx5e_get_channels(struct net_device *dev,
319                                struct ethtool_channels *ch)
320 {
321         struct mlx5e_priv *priv = netdev_priv(dev);
322
323         mlx5e_ethtool_get_channels(priv, ch);
324 }
325
326 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
327                                struct ethtool_channels *ch)
328 {
329         unsigned int count = ch->combined_count;
330         struct mlx5e_channels new_channels = {};
331         bool arfs_enabled;
332         int err = 0;
333
334         if (!count) {
335                 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
336                             __func__);
337                 return -EINVAL;
338         }
339
340         if (priv->channels.params.num_channels == count)
341                 return 0;
342
343         mutex_lock(&priv->state_lock);
344
345         new_channels.params = priv->channels.params;
346         new_channels.params.num_channels = count;
347         if (!netif_is_rxfh_configured(priv->netdev))
348                 mlx5e_build_default_indir_rqt(new_channels.params.indirection_rqt,
349                                               MLX5E_INDIR_RQT_SIZE, count);
350
351         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
352                 priv->channels.params = new_channels.params;
353                 goto out;
354         }
355
356         /* Create fresh channels with new parameters */
357         err = mlx5e_open_channels(priv, &new_channels);
358         if (err)
359                 goto out;
360
361         arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
362         if (arfs_enabled)
363                 mlx5e_arfs_disable(priv);
364
365         /* Switch to new channels, set new parameters and close old ones */
366         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
367
368         if (arfs_enabled) {
369                 err = mlx5e_arfs_enable(priv);
370                 if (err)
371                         netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
372                                    __func__, err);
373         }
374
375 out:
376         mutex_unlock(&priv->state_lock);
377
378         return err;
379 }
380
381 static int mlx5e_set_channels(struct net_device *dev,
382                               struct ethtool_channels *ch)
383 {
384         struct mlx5e_priv *priv = netdev_priv(dev);
385
386         return mlx5e_ethtool_set_channels(priv, ch);
387 }
388
389 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
390                                struct ethtool_coalesce *coal)
391 {
392         struct net_dim_cq_moder *rx_moder, *tx_moder;
393
394         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
395                 return -EOPNOTSUPP;
396
397         rx_moder = &priv->channels.params.rx_cq_moderation;
398         coal->rx_coalesce_usecs         = rx_moder->usec;
399         coal->rx_max_coalesced_frames   = rx_moder->pkts;
400         coal->use_adaptive_rx_coalesce  = priv->channels.params.rx_dim_enabled;
401
402         tx_moder = &priv->channels.params.tx_cq_moderation;
403         coal->tx_coalesce_usecs         = tx_moder->usec;
404         coal->tx_max_coalesced_frames   = tx_moder->pkts;
405         coal->use_adaptive_tx_coalesce  = priv->channels.params.tx_dim_enabled;
406
407         return 0;
408 }
409
410 static int mlx5e_get_coalesce(struct net_device *netdev,
411                               struct ethtool_coalesce *coal)
412 {
413         struct mlx5e_priv *priv = netdev_priv(netdev);
414
415         return mlx5e_ethtool_get_coalesce(priv, coal);
416 }
417
418 #define MLX5E_MAX_COAL_TIME             MLX5_MAX_CQ_PERIOD
419 #define MLX5E_MAX_COAL_FRAMES           MLX5_MAX_CQ_COUNT
420
421 static void
422 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
423 {
424         struct mlx5_core_dev *mdev = priv->mdev;
425         int tc;
426         int i;
427
428         for (i = 0; i < priv->channels.num; ++i) {
429                 struct mlx5e_channel *c = priv->channels.c[i];
430
431                 for (tc = 0; tc < c->num_tc; tc++) {
432                         mlx5_core_modify_cq_moderation(mdev,
433                                                 &c->sq[tc].cq.mcq,
434                                                 coal->tx_coalesce_usecs,
435                                                 coal->tx_max_coalesced_frames);
436                 }
437
438                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
439                                                coal->rx_coalesce_usecs,
440                                                coal->rx_max_coalesced_frames);
441         }
442 }
443
444 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
445                                struct ethtool_coalesce *coal)
446 {
447         struct net_dim_cq_moder *rx_moder, *tx_moder;
448         struct mlx5_core_dev *mdev = priv->mdev;
449         struct mlx5e_channels new_channels = {};
450         int err = 0;
451         bool reset;
452
453         if (!MLX5_CAP_GEN(mdev, cq_moderation))
454                 return -EOPNOTSUPP;
455
456         if (coal->tx_coalesce_usecs > MLX5E_MAX_COAL_TIME ||
457             coal->rx_coalesce_usecs > MLX5E_MAX_COAL_TIME) {
458                 netdev_info(priv->netdev, "%s: maximum coalesce time supported is %lu usecs\n",
459                             __func__, MLX5E_MAX_COAL_TIME);
460                 return -ERANGE;
461         }
462
463         if (coal->tx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES ||
464             coal->rx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES) {
465                 netdev_info(priv->netdev, "%s: maximum coalesced frames supported is %lu\n",
466                             __func__, MLX5E_MAX_COAL_FRAMES);
467                 return -ERANGE;
468         }
469
470         mutex_lock(&priv->state_lock);
471         new_channels.params = priv->channels.params;
472
473         rx_moder          = &new_channels.params.rx_cq_moderation;
474         rx_moder->usec    = coal->rx_coalesce_usecs;
475         rx_moder->pkts    = coal->rx_max_coalesced_frames;
476         new_channels.params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
477
478         tx_moder          = &new_channels.params.tx_cq_moderation;
479         tx_moder->usec    = coal->tx_coalesce_usecs;
480         tx_moder->pkts    = coal->tx_max_coalesced_frames;
481         new_channels.params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
482
483         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
484                 priv->channels.params = new_channels.params;
485                 goto out;
486         }
487         /* we are opened */
488
489         reset = (!!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled) ||
490                 (!!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled);
491
492         if (!reset) {
493                 mlx5e_set_priv_channels_coalesce(priv, coal);
494                 priv->channels.params = new_channels.params;
495                 goto out;
496         }
497
498         /* open fresh channels with new coal parameters */
499         err = mlx5e_open_channels(priv, &new_channels);
500         if (err)
501                 goto out;
502
503         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
504
505 out:
506         mutex_unlock(&priv->state_lock);
507         return err;
508 }
509
510 static int mlx5e_set_coalesce(struct net_device *netdev,
511                               struct ethtool_coalesce *coal)
512 {
513         struct mlx5e_priv *priv    = netdev_priv(netdev);
514
515         return mlx5e_ethtool_set_coalesce(priv, coal);
516 }
517
518 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
519                                         u32 eth_proto_cap)
520 {
521         unsigned long proto_cap = eth_proto_cap;
522         int proto;
523
524         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
525                 bitmap_or(supported_modes, supported_modes,
526                           ptys2ethtool_table[proto].supported,
527                           __ETHTOOL_LINK_MODE_MASK_NBITS);
528 }
529
530 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
531                                     u32 eth_proto_cap)
532 {
533         unsigned long proto_cap = eth_proto_cap;
534         int proto;
535
536         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
537                 bitmap_or(advertising_modes, advertising_modes,
538                           ptys2ethtool_table[proto].advertised,
539                           __ETHTOOL_LINK_MODE_MASK_NBITS);
540 }
541
542 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
543                                                    u32 eth_proto_cap,
544                                                    u8 connector_type)
545 {
546         if (!connector_type || connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
547                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
548                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
549                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
550                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
551                                    | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
552                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
553                         ethtool_link_ksettings_add_link_mode(link_ksettings,
554                                                              supported,
555                                                              FIBRE);
556                         ethtool_link_ksettings_add_link_mode(link_ksettings,
557                                                              advertising,
558                                                              FIBRE);
559                 }
560
561                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
562                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
563                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
564                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
565                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
566                         ethtool_link_ksettings_add_link_mode(link_ksettings,
567                                                              supported,
568                                                              Backplane);
569                         ethtool_link_ksettings_add_link_mode(link_ksettings,
570                                                              advertising,
571                                                              Backplane);
572                 }
573                 return;
574         }
575
576         switch (connector_type) {
577         case MLX5E_PORT_TP:
578                 ethtool_link_ksettings_add_link_mode(link_ksettings,
579                                                      supported, TP);
580                 ethtool_link_ksettings_add_link_mode(link_ksettings,
581                                                      advertising, TP);
582                 break;
583         case MLX5E_PORT_AUI:
584                 ethtool_link_ksettings_add_link_mode(link_ksettings,
585                                                      supported, AUI);
586                 ethtool_link_ksettings_add_link_mode(link_ksettings,
587                                                      advertising, AUI);
588                 break;
589         case MLX5E_PORT_BNC:
590                 ethtool_link_ksettings_add_link_mode(link_ksettings,
591                                                      supported, BNC);
592                 ethtool_link_ksettings_add_link_mode(link_ksettings,
593                                                      advertising, BNC);
594                 break;
595         case MLX5E_PORT_MII:
596                 ethtool_link_ksettings_add_link_mode(link_ksettings,
597                                                      supported, MII);
598                 ethtool_link_ksettings_add_link_mode(link_ksettings,
599                                                      advertising, MII);
600                 break;
601         case MLX5E_PORT_FIBRE:
602                 ethtool_link_ksettings_add_link_mode(link_ksettings,
603                                                      supported, FIBRE);
604                 ethtool_link_ksettings_add_link_mode(link_ksettings,
605                                                      advertising, FIBRE);
606                 break;
607         case MLX5E_PORT_DA:
608                 ethtool_link_ksettings_add_link_mode(link_ksettings,
609                                                      supported, Backplane);
610                 ethtool_link_ksettings_add_link_mode(link_ksettings,
611                                                      advertising, Backplane);
612                 break;
613         case MLX5E_PORT_NONE:
614         case MLX5E_PORT_OTHER:
615         default:
616                 break;
617         }
618 }
619
620 static void get_speed_duplex(struct net_device *netdev,
621                              u32 eth_proto_oper,
622                              struct ethtool_link_ksettings *link_ksettings)
623 {
624         u32 speed = SPEED_UNKNOWN;
625         u8 duplex = DUPLEX_UNKNOWN;
626
627         if (!netif_carrier_ok(netdev))
628                 goto out;
629
630         speed = mlx5e_port_ptys2speed(eth_proto_oper);
631         if (!speed) {
632                 speed = SPEED_UNKNOWN;
633                 goto out;
634         }
635
636         duplex = DUPLEX_FULL;
637
638 out:
639         link_ksettings->base.speed = speed;
640         link_ksettings->base.duplex = duplex;
641 }
642
643 static void get_supported(u32 eth_proto_cap,
644                           struct ethtool_link_ksettings *link_ksettings)
645 {
646         unsigned long *supported = link_ksettings->link_modes.supported;
647
648         ptys2ethtool_supported_link(supported, eth_proto_cap);
649         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
650 }
651
652 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
653                             u8 rx_pause,
654                             struct ethtool_link_ksettings *link_ksettings)
655 {
656         unsigned long *advertising = link_ksettings->link_modes.advertising;
657
658         ptys2ethtool_adver_link(advertising, eth_proto_cap);
659         if (rx_pause)
660                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
661         if (tx_pause ^ rx_pause)
662                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
663 }
664
665 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
666                 [MLX5E_PORT_UNKNOWN]            = PORT_OTHER,
667                 [MLX5E_PORT_NONE]               = PORT_NONE,
668                 [MLX5E_PORT_TP]                 = PORT_TP,
669                 [MLX5E_PORT_AUI]                = PORT_AUI,
670                 [MLX5E_PORT_BNC]                = PORT_BNC,
671                 [MLX5E_PORT_MII]                = PORT_MII,
672                 [MLX5E_PORT_FIBRE]              = PORT_FIBRE,
673                 [MLX5E_PORT_DA]                 = PORT_DA,
674                 [MLX5E_PORT_OTHER]              = PORT_OTHER,
675         };
676
677 static u8 get_connector_port(u32 eth_proto, u8 connector_type)
678 {
679         if (connector_type && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
680                 return ptys2connector_type[connector_type];
681
682         if (eth_proto &
683             (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)   |
684              MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)  |
685              MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
686              MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
687                 return PORT_FIBRE;
688         }
689
690         if (eth_proto &
691             (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
692              MLX5E_PROT_MASK(MLX5E_10GBASE_CR)  |
693              MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
694                 return PORT_DA;
695         }
696
697         if (eth_proto &
698             (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
699              MLX5E_PROT_MASK(MLX5E_10GBASE_KR)  |
700              MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
701              MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
702                 return PORT_NONE;
703         }
704
705         return PORT_OTHER;
706 }
707
708 static void get_lp_advertising(u32 eth_proto_lp,
709                                struct ethtool_link_ksettings *link_ksettings)
710 {
711         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
712
713         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
714 }
715
716 static int mlx5e_get_link_ksettings(struct net_device *netdev,
717                                     struct ethtool_link_ksettings *link_ksettings)
718 {
719         struct mlx5e_priv *priv    = netdev_priv(netdev);
720         struct mlx5_core_dev *mdev = priv->mdev;
721         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
722         u32 rx_pause = 0;
723         u32 tx_pause = 0;
724         u32 eth_proto_cap;
725         u32 eth_proto_admin;
726         u32 eth_proto_lp;
727         u32 eth_proto_oper;
728         u8 an_disable_admin;
729         u8 an_status;
730         u8 connector_type;
731         int err;
732
733         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
734         if (err) {
735                 netdev_err(netdev, "%s: query port ptys failed: %d\n",
736                            __func__, err);
737                 goto err_query_ptys;
738         }
739
740         eth_proto_cap    = MLX5_GET(ptys_reg, out, eth_proto_capability);
741         eth_proto_admin  = MLX5_GET(ptys_reg, out, eth_proto_admin);
742         eth_proto_oper   = MLX5_GET(ptys_reg, out, eth_proto_oper);
743         eth_proto_lp     = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
744         an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
745         an_status        = MLX5_GET(ptys_reg, out, an_status);
746         connector_type   = MLX5_GET(ptys_reg, out, connector_type);
747
748         mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
749
750         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
751         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
752
753         get_supported(eth_proto_cap, link_ksettings);
754         get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings);
755         get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
756
757         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
758
759         link_ksettings->base.port = get_connector_port(eth_proto_oper,
760                                                        connector_type);
761         ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
762                                                connector_type);
763         get_lp_advertising(eth_proto_lp, link_ksettings);
764
765         if (an_status == MLX5_AN_COMPLETE)
766                 ethtool_link_ksettings_add_link_mode(link_ksettings,
767                                                      lp_advertising, Autoneg);
768
769         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
770                                                           AUTONEG_ENABLE;
771         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
772                                              Autoneg);
773         if (!an_disable_admin)
774                 ethtool_link_ksettings_add_link_mode(link_ksettings,
775                                                      advertising, Autoneg);
776
777 err_query_ptys:
778         return err;
779 }
780
781 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
782 {
783         u32 i, ptys_modes = 0;
784
785         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
786                 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
787                                       link_modes,
788                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
789                         ptys_modes |= MLX5E_PROT_MASK(i);
790         }
791
792         return ptys_modes;
793 }
794
795 static int mlx5e_set_link_ksettings(struct net_device *netdev,
796                                     const struct ethtool_link_ksettings *link_ksettings)
797 {
798         struct mlx5e_priv *priv    = netdev_priv(netdev);
799         struct mlx5_core_dev *mdev = priv->mdev;
800         u32 eth_proto_cap, eth_proto_admin;
801         bool an_changes = false;
802         u8 an_disable_admin;
803         u8 an_disable_cap;
804         bool an_disable;
805         u32 link_modes;
806         u8 an_status;
807         u32 speed;
808         int err;
809
810         speed = link_ksettings->base.speed;
811
812         link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
813                 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
814                 mlx5e_port_speed2linkmodes(speed);
815
816         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
817         if (err) {
818                 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
819                            __func__, err);
820                 goto out;
821         }
822
823         link_modes = link_modes & eth_proto_cap;
824         if (!link_modes) {
825                 netdev_err(netdev, "%s: Not supported link mode(s) requested",
826                            __func__);
827                 err = -EINVAL;
828                 goto out;
829         }
830
831         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
832         if (err) {
833                 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
834                            __func__, err);
835                 goto out;
836         }
837
838         mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
839                                 &an_disable_cap, &an_disable_admin);
840
841         an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
842         an_changes = ((!an_disable && an_disable_admin) ||
843                       (an_disable && !an_disable_admin));
844
845         if (!an_changes && link_modes == eth_proto_admin)
846                 goto out;
847
848         mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
849         mlx5_toggle_port_link(mdev);
850
851 out:
852         return err;
853 }
854
855 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
856 {
857         struct mlx5e_priv *priv = netdev_priv(netdev);
858
859         return sizeof(priv->channels.params.toeplitz_hash_key);
860 }
861
862 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
863 {
864         return MLX5E_INDIR_RQT_SIZE;
865 }
866
867 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
868                           u8 *hfunc)
869 {
870         struct mlx5e_priv *priv = netdev_priv(netdev);
871
872         if (indir)
873                 memcpy(indir, priv->channels.params.indirection_rqt,
874                        sizeof(priv->channels.params.indirection_rqt));
875
876         if (key)
877                 memcpy(key, priv->channels.params.toeplitz_hash_key,
878                        sizeof(priv->channels.params.toeplitz_hash_key));
879
880         if (hfunc)
881                 *hfunc = priv->channels.params.rss_hfunc;
882
883         return 0;
884 }
885
886 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
887 {
888         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
889         struct mlx5_core_dev *mdev = priv->mdev;
890         int ctxlen = MLX5_ST_SZ_BYTES(tirc);
891         int tt;
892
893         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
894
895         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
896                 memset(tirc, 0, ctxlen);
897                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
898                 mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
899         }
900
901         if (!mlx5e_tunnel_inner_ft_supported(priv->mdev))
902                 return;
903
904         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
905                 memset(tirc, 0, ctxlen);
906                 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, true);
907                 mlx5_core_modify_tir(mdev, priv->inner_indir_tir[tt].tirn, in, inlen);
908         }
909 }
910
911 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
912                           const u8 *key, const u8 hfunc)
913 {
914         struct mlx5e_priv *priv = netdev_priv(dev);
915         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
916         bool hash_changed = false;
917         void *in;
918
919         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
920             (hfunc != ETH_RSS_HASH_XOR) &&
921             (hfunc != ETH_RSS_HASH_TOP))
922                 return -EINVAL;
923
924         in = kvzalloc(inlen, GFP_KERNEL);
925         if (!in)
926                 return -ENOMEM;
927
928         mutex_lock(&priv->state_lock);
929
930         if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
931             hfunc != priv->channels.params.rss_hfunc) {
932                 priv->channels.params.rss_hfunc = hfunc;
933                 hash_changed = true;
934         }
935
936         if (indir) {
937                 memcpy(priv->channels.params.indirection_rqt, indir,
938                        sizeof(priv->channels.params.indirection_rqt));
939
940                 if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
941                         u32 rqtn = priv->indir_rqt.rqtn;
942                         struct mlx5e_redirect_rqt_param rrp = {
943                                 .is_rss = true,
944                                 {
945                                         .rss = {
946                                                 .hfunc = priv->channels.params.rss_hfunc,
947                                                 .channels  = &priv->channels,
948                                         },
949                                 },
950                         };
951
952                         mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
953                 }
954         }
955
956         if (key) {
957                 memcpy(priv->channels.params.toeplitz_hash_key, key,
958                        sizeof(priv->channels.params.toeplitz_hash_key));
959                 hash_changed = hash_changed ||
960                                priv->channels.params.rss_hfunc == ETH_RSS_HASH_TOP;
961         }
962
963         if (hash_changed)
964                 mlx5e_modify_tirs_hash(priv, in, inlen);
965
966         mutex_unlock(&priv->state_lock);
967
968         kvfree(in);
969
970         return 0;
971 }
972
973 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC         100
974 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC          8000
975 #define MLX5E_PFC_PREVEN_MINOR_PRECENT          85
976 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC          80
977 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
978         max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
979               (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
980
981 static int mlx5e_get_pfc_prevention_tout(struct net_device *netdev,
982                                          u16 *pfc_prevention_tout)
983 {
984         struct mlx5e_priv *priv    = netdev_priv(netdev);
985         struct mlx5_core_dev *mdev = priv->mdev;
986
987         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
988             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
989                 return -EOPNOTSUPP;
990
991         return mlx5_query_port_stall_watermark(mdev, pfc_prevention_tout, NULL);
992 }
993
994 static int mlx5e_set_pfc_prevention_tout(struct net_device *netdev,
995                                          u16 pfc_preven)
996 {
997         struct mlx5e_priv *priv = netdev_priv(netdev);
998         struct mlx5_core_dev *mdev = priv->mdev;
999         u16 critical_tout;
1000         u16 minor;
1001
1002         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1003             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1004                 return -EOPNOTSUPP;
1005
1006         critical_tout = (pfc_preven == PFC_STORM_PREVENTION_AUTO) ?
1007                         MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC :
1008                         pfc_preven;
1009
1010         if (critical_tout != PFC_STORM_PREVENTION_DISABLE &&
1011             (critical_tout > MLX5E_PFC_PREVEN_TOUT_MAX_MSEC ||
1012              critical_tout < MLX5E_PFC_PREVEN_TOUT_MIN_MSEC)) {
1013                 netdev_info(netdev, "%s: pfc prevention tout not in range (%d-%d)\n",
1014                             __func__, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC,
1015                             MLX5E_PFC_PREVEN_TOUT_MAX_MSEC);
1016                 return -EINVAL;
1017         }
1018
1019         minor = MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout);
1020         return mlx5_set_port_stall_watermark(mdev, critical_tout,
1021                                              minor);
1022 }
1023
1024 static int mlx5e_get_tunable(struct net_device *dev,
1025                              const struct ethtool_tunable *tuna,
1026                              void *data)
1027 {
1028         int err;
1029
1030         switch (tuna->id) {
1031         case ETHTOOL_PFC_PREVENTION_TOUT:
1032                 err = mlx5e_get_pfc_prevention_tout(dev, data);
1033                 break;
1034         default:
1035                 err = -EINVAL;
1036                 break;
1037         }
1038
1039         return err;
1040 }
1041
1042 static int mlx5e_set_tunable(struct net_device *dev,
1043                              const struct ethtool_tunable *tuna,
1044                              const void *data)
1045 {
1046         struct mlx5e_priv *priv = netdev_priv(dev);
1047         int err;
1048
1049         mutex_lock(&priv->state_lock);
1050
1051         switch (tuna->id) {
1052         case ETHTOOL_PFC_PREVENTION_TOUT:
1053                 err = mlx5e_set_pfc_prevention_tout(dev, *(u16 *)data);
1054                 break;
1055         default:
1056                 err = -EINVAL;
1057                 break;
1058         }
1059
1060         mutex_unlock(&priv->state_lock);
1061         return err;
1062 }
1063
1064 static void mlx5e_get_pauseparam(struct net_device *netdev,
1065                                  struct ethtool_pauseparam *pauseparam)
1066 {
1067         struct mlx5e_priv *priv    = netdev_priv(netdev);
1068         struct mlx5_core_dev *mdev = priv->mdev;
1069         int err;
1070
1071         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1072                                     &pauseparam->tx_pause);
1073         if (err) {
1074                 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1075                            __func__, err);
1076         }
1077 }
1078
1079 static int mlx5e_set_pauseparam(struct net_device *netdev,
1080                                 struct ethtool_pauseparam *pauseparam)
1081 {
1082         struct mlx5e_priv *priv    = netdev_priv(netdev);
1083         struct mlx5_core_dev *mdev = priv->mdev;
1084         int err;
1085
1086         if (pauseparam->autoneg)
1087                 return -EINVAL;
1088
1089         err = mlx5_set_port_pause(mdev,
1090                                   pauseparam->rx_pause ? 1 : 0,
1091                                   pauseparam->tx_pause ? 1 : 0);
1092         if (err) {
1093                 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1094                            __func__, err);
1095         }
1096
1097         return err;
1098 }
1099
1100 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1101                               struct ethtool_ts_info *info)
1102 {
1103         struct mlx5_core_dev *mdev = priv->mdev;
1104         int ret;
1105
1106         ret = ethtool_op_get_ts_info(priv->netdev, info);
1107         if (ret)
1108                 return ret;
1109
1110         info->phc_index = mlx5_clock_get_ptp_index(mdev);
1111
1112         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
1113             info->phc_index == -1)
1114                 return 0;
1115
1116         info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1117                                  SOF_TIMESTAMPING_RX_HARDWARE |
1118                                  SOF_TIMESTAMPING_RAW_HARDWARE;
1119
1120         info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1121                          BIT(HWTSTAMP_TX_ON);
1122
1123         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1124                            BIT(HWTSTAMP_FILTER_ALL);
1125
1126         return 0;
1127 }
1128
1129 static int mlx5e_get_ts_info(struct net_device *dev,
1130                              struct ethtool_ts_info *info)
1131 {
1132         struct mlx5e_priv *priv = netdev_priv(dev);
1133
1134         return mlx5e_ethtool_get_ts_info(priv, info);
1135 }
1136
1137 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1138 {
1139         __u32 ret = 0;
1140
1141         if (MLX5_CAP_GEN(mdev, wol_g))
1142                 ret |= WAKE_MAGIC;
1143
1144         if (MLX5_CAP_GEN(mdev, wol_s))
1145                 ret |= WAKE_MAGICSECURE;
1146
1147         if (MLX5_CAP_GEN(mdev, wol_a))
1148                 ret |= WAKE_ARP;
1149
1150         if (MLX5_CAP_GEN(mdev, wol_b))
1151                 ret |= WAKE_BCAST;
1152
1153         if (MLX5_CAP_GEN(mdev, wol_m))
1154                 ret |= WAKE_MCAST;
1155
1156         if (MLX5_CAP_GEN(mdev, wol_u))
1157                 ret |= WAKE_UCAST;
1158
1159         if (MLX5_CAP_GEN(mdev, wol_p))
1160                 ret |= WAKE_PHY;
1161
1162         return ret;
1163 }
1164
1165 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1166 {
1167         __u32 ret = 0;
1168
1169         if (mode & MLX5_WOL_MAGIC)
1170                 ret |= WAKE_MAGIC;
1171
1172         if (mode & MLX5_WOL_SECURED_MAGIC)
1173                 ret |= WAKE_MAGICSECURE;
1174
1175         if (mode & MLX5_WOL_ARP)
1176                 ret |= WAKE_ARP;
1177
1178         if (mode & MLX5_WOL_BROADCAST)
1179                 ret |= WAKE_BCAST;
1180
1181         if (mode & MLX5_WOL_MULTICAST)
1182                 ret |= WAKE_MCAST;
1183
1184         if (mode & MLX5_WOL_UNICAST)
1185                 ret |= WAKE_UCAST;
1186
1187         if (mode & MLX5_WOL_PHY_ACTIVITY)
1188                 ret |= WAKE_PHY;
1189
1190         return ret;
1191 }
1192
1193 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1194 {
1195         u8 ret = 0;
1196
1197         if (mode & WAKE_MAGIC)
1198                 ret |= MLX5_WOL_MAGIC;
1199
1200         if (mode & WAKE_MAGICSECURE)
1201                 ret |= MLX5_WOL_SECURED_MAGIC;
1202
1203         if (mode & WAKE_ARP)
1204                 ret |= MLX5_WOL_ARP;
1205
1206         if (mode & WAKE_BCAST)
1207                 ret |= MLX5_WOL_BROADCAST;
1208
1209         if (mode & WAKE_MCAST)
1210                 ret |= MLX5_WOL_MULTICAST;
1211
1212         if (mode & WAKE_UCAST)
1213                 ret |= MLX5_WOL_UNICAST;
1214
1215         if (mode & WAKE_PHY)
1216                 ret |= MLX5_WOL_PHY_ACTIVITY;
1217
1218         return ret;
1219 }
1220
1221 static void mlx5e_get_wol(struct net_device *netdev,
1222                           struct ethtool_wolinfo *wol)
1223 {
1224         struct mlx5e_priv *priv = netdev_priv(netdev);
1225         struct mlx5_core_dev *mdev = priv->mdev;
1226         u8 mlx5_wol_mode;
1227         int err;
1228
1229         memset(wol, 0, sizeof(*wol));
1230
1231         wol->supported = mlx5e_get_wol_supported(mdev);
1232         if (!wol->supported)
1233                 return;
1234
1235         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1236         if (err)
1237                 return;
1238
1239         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1240 }
1241
1242 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1243 {
1244         struct mlx5e_priv *priv = netdev_priv(netdev);
1245         struct mlx5_core_dev *mdev = priv->mdev;
1246         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1247         u32 mlx5_wol_mode;
1248
1249         if (!wol_supported)
1250                 return -EOPNOTSUPP;
1251
1252         if (wol->wolopts & ~wol_supported)
1253                 return -EINVAL;
1254
1255         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1256
1257         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1258 }
1259
1260 static u32 mlx5e_get_msglevel(struct net_device *dev)
1261 {
1262         return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1263 }
1264
1265 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1266 {
1267         ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1268 }
1269
1270 static int mlx5e_set_phys_id(struct net_device *dev,
1271                              enum ethtool_phys_id_state state)
1272 {
1273         struct mlx5e_priv *priv = netdev_priv(dev);
1274         struct mlx5_core_dev *mdev = priv->mdev;
1275         u16 beacon_duration;
1276
1277         if (!MLX5_CAP_GEN(mdev, beacon_led))
1278                 return -EOPNOTSUPP;
1279
1280         switch (state) {
1281         case ETHTOOL_ID_ACTIVE:
1282                 beacon_duration = MLX5_BEACON_DURATION_INF;
1283                 break;
1284         case ETHTOOL_ID_INACTIVE:
1285                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1286                 break;
1287         default:
1288                 return -EOPNOTSUPP;
1289         }
1290
1291         return mlx5_set_port_beacon(mdev, beacon_duration);
1292 }
1293
1294 static int mlx5e_get_module_info(struct net_device *netdev,
1295                                  struct ethtool_modinfo *modinfo)
1296 {
1297         struct mlx5e_priv *priv = netdev_priv(netdev);
1298         struct mlx5_core_dev *dev = priv->mdev;
1299         int size_read = 0;
1300         u8 data[4];
1301
1302         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1303         if (size_read < 2)
1304                 return -EIO;
1305
1306         /* data[0] = identifier byte */
1307         switch (data[0]) {
1308         case MLX5_MODULE_ID_QSFP:
1309                 modinfo->type       = ETH_MODULE_SFF_8436;
1310                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1311                 break;
1312         case MLX5_MODULE_ID_QSFP_PLUS:
1313         case MLX5_MODULE_ID_QSFP28:
1314                 /* data[1] = revision id */
1315                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1316                         modinfo->type       = ETH_MODULE_SFF_8636;
1317                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1318                 } else {
1319                         modinfo->type       = ETH_MODULE_SFF_8436;
1320                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1321                 }
1322                 break;
1323         case MLX5_MODULE_ID_SFP:
1324                 modinfo->type       = ETH_MODULE_SFF_8472;
1325                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1326                 break;
1327         default:
1328                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1329                            __func__, data[0]);
1330                 return -EINVAL;
1331         }
1332
1333         return 0;
1334 }
1335
1336 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1337                                    struct ethtool_eeprom *ee,
1338                                    u8 *data)
1339 {
1340         struct mlx5e_priv *priv = netdev_priv(netdev);
1341         struct mlx5_core_dev *mdev = priv->mdev;
1342         int offset = ee->offset;
1343         int size_read;
1344         int i = 0;
1345
1346         if (!ee->len)
1347                 return -EINVAL;
1348
1349         memset(data, 0, ee->len);
1350
1351         while (i < ee->len) {
1352                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1353                                                      data + i);
1354
1355                 if (!size_read)
1356                         /* Done reading */
1357                         return 0;
1358
1359                 if (size_read < 0) {
1360                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1361                                    __func__, size_read);
1362                         return 0;
1363                 }
1364
1365                 i += size_read;
1366                 offset += size_read;
1367         }
1368
1369         return 0;
1370 }
1371
1372 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1373
1374 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1375                                      bool is_rx_cq)
1376 {
1377         struct mlx5e_priv *priv = netdev_priv(netdev);
1378         struct mlx5_core_dev *mdev = priv->mdev;
1379         struct mlx5e_channels new_channels = {};
1380         bool mode_changed;
1381         u8 cq_period_mode, current_cq_period_mode;
1382         int err = 0;
1383
1384         cq_period_mode = enable ?
1385                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1386                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1387         current_cq_period_mode = is_rx_cq ?
1388                 priv->channels.params.rx_cq_moderation.cq_period_mode :
1389                 priv->channels.params.tx_cq_moderation.cq_period_mode;
1390         mode_changed = cq_period_mode != current_cq_period_mode;
1391
1392         if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1393             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1394                 return -EOPNOTSUPP;
1395
1396         if (!mode_changed)
1397                 return 0;
1398
1399         new_channels.params = priv->channels.params;
1400         if (is_rx_cq)
1401                 mlx5e_set_rx_cq_mode_params(&new_channels.params, cq_period_mode);
1402         else
1403                 mlx5e_set_tx_cq_mode_params(&new_channels.params, cq_period_mode);
1404
1405         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1406                 priv->channels.params = new_channels.params;
1407                 return 0;
1408         }
1409
1410         err = mlx5e_open_channels(priv, &new_channels);
1411         if (err)
1412                 return err;
1413
1414         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1415         return 0;
1416 }
1417
1418 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1419 {
1420         return set_pflag_cqe_based_moder(netdev, enable, false);
1421 }
1422
1423 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1424 {
1425         return set_pflag_cqe_based_moder(netdev, enable, true);
1426 }
1427
1428 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1429 {
1430         bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1431         struct mlx5e_channels new_channels = {};
1432         int err = 0;
1433
1434         if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1435                 return new_val ? -EOPNOTSUPP : 0;
1436
1437         if (curr_val == new_val)
1438                 return 0;
1439
1440         new_channels.params = priv->channels.params;
1441         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1442
1443         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1444                 priv->channels.params = new_channels.params;
1445                 return 0;
1446         }
1447
1448         err = mlx5e_open_channels(priv, &new_channels);
1449         if (err)
1450                 return err;
1451
1452         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1453         mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1454                   MLX5E_GET_PFLAG(&priv->channels.params,
1455                                   MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1456
1457         return 0;
1458 }
1459
1460 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1461                                      bool enable)
1462 {
1463         struct mlx5e_priv *priv = netdev_priv(netdev);
1464         struct mlx5_core_dev *mdev = priv->mdev;
1465
1466         if (!MLX5_CAP_GEN(mdev, cqe_compression))
1467                 return -EOPNOTSUPP;
1468
1469         if (enable && priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE) {
1470                 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
1471                 return -EINVAL;
1472         }
1473
1474         mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1475         priv->channels.params.rx_cqe_compress_def = enable;
1476
1477         return 0;
1478 }
1479
1480 static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)
1481 {
1482         struct mlx5e_priv *priv = netdev_priv(netdev);
1483         struct mlx5_core_dev *mdev = priv->mdev;
1484         struct mlx5e_channels new_channels = {};
1485         int err;
1486
1487         if (enable) {
1488                 if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
1489                         return -EOPNOTSUPP;
1490                 if (!mlx5e_striding_rq_possible(mdev, &priv->channels.params))
1491                         return -EINVAL;
1492         } else if (priv->channels.params.lro_en) {
1493                 netdev_warn(netdev, "Can't set legacy RQ with LRO, disable LRO first\n");
1494                 return -EINVAL;
1495         }
1496
1497         new_channels.params = priv->channels.params;
1498
1499         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);
1500         mlx5e_set_rq_type(mdev, &new_channels.params);
1501
1502         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1503                 priv->channels.params = new_channels.params;
1504                 return 0;
1505         }
1506
1507         err = mlx5e_open_channels(priv, &new_channels);
1508         if (err)
1509                 return err;
1510
1511         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1512         return 0;
1513 }
1514
1515 static int mlx5e_handle_pflag(struct net_device *netdev,
1516                               u32 wanted_flags,
1517                               enum mlx5e_priv_flag flag,
1518                               mlx5e_pflag_handler pflag_handler)
1519 {
1520         struct mlx5e_priv *priv = netdev_priv(netdev);
1521         bool enable = !!(wanted_flags & flag);
1522         u32 changes = wanted_flags ^ priv->channels.params.pflags;
1523         int err;
1524
1525         if (!(changes & flag))
1526                 return 0;
1527
1528         err = pflag_handler(netdev, enable);
1529         if (err) {
1530                 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1531                            enable ? "Enable" : "Disable", flag, err);
1532                 return err;
1533         }
1534
1535         MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
1536         return 0;
1537 }
1538
1539 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1540 {
1541         struct mlx5e_priv *priv = netdev_priv(netdev);
1542         int err;
1543
1544         mutex_lock(&priv->state_lock);
1545         err = mlx5e_handle_pflag(netdev, pflags,
1546                                  MLX5E_PFLAG_RX_CQE_BASED_MODER,
1547                                  set_pflag_rx_cqe_based_moder);
1548         if (err)
1549                 goto out;
1550
1551         err = mlx5e_handle_pflag(netdev, pflags,
1552                                  MLX5E_PFLAG_TX_CQE_BASED_MODER,
1553                                  set_pflag_tx_cqe_based_moder);
1554         if (err)
1555                 goto out;
1556
1557         err = mlx5e_handle_pflag(netdev, pflags,
1558                                  MLX5E_PFLAG_RX_CQE_COMPRESS,
1559                                  set_pflag_rx_cqe_compress);
1560         if (err)
1561                 goto out;
1562
1563         err = mlx5e_handle_pflag(netdev, pflags,
1564                                  MLX5E_PFLAG_RX_STRIDING_RQ,
1565                                  set_pflag_rx_striding_rq);
1566
1567 out:
1568         mutex_unlock(&priv->state_lock);
1569
1570         /* Need to fix some features.. */
1571         netdev_update_features(netdev);
1572
1573         return err;
1574 }
1575
1576 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1577 {
1578         struct mlx5e_priv *priv = netdev_priv(netdev);
1579
1580         return priv->channels.params.pflags;
1581 }
1582
1583 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1584                                struct ethtool_flash *flash)
1585 {
1586         struct mlx5_core_dev *mdev = priv->mdev;
1587         struct net_device *dev = priv->netdev;
1588         const struct firmware *fw;
1589         int err;
1590
1591         if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1592                 return -EOPNOTSUPP;
1593
1594         err = request_firmware_direct(&fw, flash->data, &dev->dev);
1595         if (err)
1596                 return err;
1597
1598         dev_hold(dev);
1599         rtnl_unlock();
1600
1601         err = mlx5_firmware_flash(mdev, fw);
1602         release_firmware(fw);
1603
1604         rtnl_lock();
1605         dev_put(dev);
1606         return err;
1607 }
1608
1609 static int mlx5e_flash_device(struct net_device *dev,
1610                               struct ethtool_flash *flash)
1611 {
1612         struct mlx5e_priv *priv = netdev_priv(dev);
1613
1614         return mlx5e_ethtool_flash_device(priv, flash);
1615 }
1616
1617 const struct ethtool_ops mlx5e_ethtool_ops = {
1618         .get_drvinfo       = mlx5e_get_drvinfo,
1619         .get_link          = ethtool_op_get_link,
1620         .get_strings       = mlx5e_get_strings,
1621         .get_sset_count    = mlx5e_get_sset_count,
1622         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1623         .get_ringparam     = mlx5e_get_ringparam,
1624         .set_ringparam     = mlx5e_set_ringparam,
1625         .get_channels      = mlx5e_get_channels,
1626         .set_channels      = mlx5e_set_channels,
1627         .get_coalesce      = mlx5e_get_coalesce,
1628         .set_coalesce      = mlx5e_set_coalesce,
1629         .get_link_ksettings  = mlx5e_get_link_ksettings,
1630         .set_link_ksettings  = mlx5e_set_link_ksettings,
1631         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1632         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1633         .get_rxfh          = mlx5e_get_rxfh,
1634         .set_rxfh          = mlx5e_set_rxfh,
1635 #ifdef CONFIG_MLX5_EN_RXNFC
1636         .get_rxnfc         = mlx5e_get_rxnfc,
1637         .set_rxnfc         = mlx5e_set_rxnfc,
1638 #endif
1639         .flash_device      = mlx5e_flash_device,
1640         .get_tunable       = mlx5e_get_tunable,
1641         .set_tunable       = mlx5e_set_tunable,
1642         .get_pauseparam    = mlx5e_get_pauseparam,
1643         .set_pauseparam    = mlx5e_set_pauseparam,
1644         .get_ts_info       = mlx5e_get_ts_info,
1645         .set_phys_id       = mlx5e_set_phys_id,
1646         .get_wol           = mlx5e_get_wol,
1647         .set_wol           = mlx5e_set_wol,
1648         .get_module_info   = mlx5e_get_module_info,
1649         .get_module_eeprom = mlx5e_get_module_eeprom,
1650         .get_priv_flags    = mlx5e_get_priv_flags,
1651         .set_priv_flags    = mlx5e_set_priv_flags,
1652         .self_test         = mlx5e_self_test,
1653         .get_msglevel      = mlx5e_get_msglevel,
1654         .set_msglevel      = mlx5e_set_msglevel,
1655 };