2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
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32 #include <linux/device.h>
33 #include <linux/netdevice.h>
36 #define MLX5E_MAX_PRIORITY 8
38 #define MLX5E_100MB (100000)
39 #define MLX5E_1GB (1000000)
41 static int mlx5e_dcbnl_ieee_getets(struct net_device *netdev,
44 struct mlx5e_priv *priv = netdev_priv(netdev);
46 if (!MLX5_CAP_GEN(priv->mdev, ets))
49 memcpy(ets, &priv->params.ets, sizeof(*ets));
54 MLX5E_VENDOR_TC_GROUP_NUM = 7,
55 MLX5E_ETS_TC_GROUP_NUM = 0,
58 static void mlx5e_build_tc_group(struct ieee_ets *ets, u8 *tc_group, int max_tc)
60 bool any_tc_mapped_to_ets = false;
64 for (i = 0; i <= max_tc; i++)
65 if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS)
66 any_tc_mapped_to_ets = true;
68 strict_group = any_tc_mapped_to_ets ? 1 : 0;
70 for (i = 0; i <= max_tc; i++) {
71 switch (ets->tc_tsa[i]) {
72 case IEEE_8021QAZ_TSA_VENDOR:
73 tc_group[i] = MLX5E_VENDOR_TC_GROUP_NUM;
75 case IEEE_8021QAZ_TSA_STRICT:
76 tc_group[i] = strict_group++;
78 case IEEE_8021QAZ_TSA_ETS:
79 tc_group[i] = MLX5E_ETS_TC_GROUP_NUM;
85 static void mlx5e_build_tc_tx_bw(struct ieee_ets *ets, u8 *tc_tx_bw,
86 u8 *tc_group, int max_tc)
90 for (i = 0; i <= max_tc; i++) {
91 switch (ets->tc_tsa[i]) {
92 case IEEE_8021QAZ_TSA_VENDOR:
93 tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
95 case IEEE_8021QAZ_TSA_STRICT:
96 tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
98 case IEEE_8021QAZ_TSA_ETS:
99 tc_tx_bw[i] = ets->tc_tx_bw[i] ?: MLX5E_MIN_BW_ALLOC;
105 int mlx5e_dcbnl_ieee_setets_core(struct mlx5e_priv *priv, struct ieee_ets *ets)
107 struct mlx5_core_dev *mdev = priv->mdev;
108 u8 tc_tx_bw[IEEE_8021QAZ_MAX_TCS];
109 u8 tc_group[IEEE_8021QAZ_MAX_TCS];
110 int max_tc = mlx5_max_tc(mdev);
113 if (!MLX5_CAP_GEN(mdev, ets))
116 mlx5e_build_tc_group(ets, tc_group, max_tc);
117 mlx5e_build_tc_tx_bw(ets, tc_tx_bw, tc_group, max_tc);
119 err = mlx5_set_port_prio_tc(mdev, ets->prio_tc);
123 err = mlx5_set_port_tc_group(mdev, tc_group);
127 return mlx5_set_port_tc_bw_alloc(mdev, tc_tx_bw);
130 static int mlx5e_dbcnl_validate_ets(struct ieee_ets *ets)
135 /* Validate Priority */
136 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
137 if (ets->prio_tc[i] >= MLX5E_MAX_PRIORITY)
141 /* Validate Bandwidth Sum */
142 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
143 if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS)
144 bw_sum += ets->tc_tx_bw[i];
147 if (bw_sum != 0 && bw_sum != 100)
152 static int mlx5e_dcbnl_ieee_setets(struct net_device *netdev,
153 struct ieee_ets *ets)
155 struct mlx5e_priv *priv = netdev_priv(netdev);
158 err = mlx5e_dbcnl_validate_ets(ets);
162 err = mlx5e_dcbnl_ieee_setets_core(priv, ets);
166 memcpy(&priv->params.ets, ets, sizeof(*ets));
167 priv->params.ets.ets_cap = mlx5_max_tc(priv->mdev) + 1;
172 static int mlx5e_dcbnl_ieee_getpfc(struct net_device *dev,
173 struct ieee_pfc *pfc)
175 struct mlx5e_priv *priv = netdev_priv(dev);
176 struct mlx5_core_dev *mdev = priv->mdev;
177 struct mlx5e_pport_stats *pstats = &priv->stats.pport;
180 pfc->pfc_cap = mlx5_max_tc(mdev) + 1;
181 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
182 pfc->requests[i] = PPORT_PER_PRIO_GET(pstats, i, tx_pause);
183 pfc->indications[i] = PPORT_PER_PRIO_GET(pstats, i, rx_pause);
186 return mlx5_query_port_pfc(mdev, &pfc->pfc_en, NULL);
189 static int mlx5e_dcbnl_ieee_setpfc(struct net_device *dev,
190 struct ieee_pfc *pfc)
192 struct mlx5e_priv *priv = netdev_priv(dev);
193 struct mlx5_core_dev *mdev = priv->mdev;
197 mlx5_query_port_pfc(mdev, &curr_pfc_en, NULL);
199 if (pfc->pfc_en == curr_pfc_en)
202 ret = mlx5_set_port_pfc(mdev, pfc->pfc_en, pfc->pfc_en);
203 mlx5_toggle_port_link(mdev);
208 static u8 mlx5e_dcbnl_getdcbx(struct net_device *dev)
210 return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE;
213 static u8 mlx5e_dcbnl_setdcbx(struct net_device *dev, u8 mode)
215 if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
216 (mode & DCB_CAP_DCBX_VER_CEE) ||
217 !(mode & DCB_CAP_DCBX_VER_IEEE) ||
218 !(mode & DCB_CAP_DCBX_HOST))
224 static int mlx5e_dcbnl_ieee_getmaxrate(struct net_device *netdev,
225 struct ieee_maxrate *maxrate)
227 struct mlx5e_priv *priv = netdev_priv(netdev);
228 struct mlx5_core_dev *mdev = priv->mdev;
229 u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
230 u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
234 err = mlx5_query_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);
238 memset(maxrate->tc_maxrate, 0, sizeof(maxrate->tc_maxrate));
240 for (i = 0; i <= mlx5_max_tc(mdev); i++) {
241 switch (max_bw_unit[i]) {
242 case MLX5_100_MBPS_UNIT:
243 maxrate->tc_maxrate[i] = max_bw_value[i] * MLX5E_100MB;
246 maxrate->tc_maxrate[i] = max_bw_value[i] * MLX5E_1GB;
248 case MLX5_BW_NO_LIMIT:
251 WARN(true, "non-supported BW unit");
259 static int mlx5e_dcbnl_ieee_setmaxrate(struct net_device *netdev,
260 struct ieee_maxrate *maxrate)
262 struct mlx5e_priv *priv = netdev_priv(netdev);
263 struct mlx5_core_dev *mdev = priv->mdev;
264 u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
265 u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
266 __u64 upper_limit_mbps = roundup(255 * MLX5E_100MB, MLX5E_1GB);
269 memset(max_bw_value, 0, sizeof(max_bw_value));
270 memset(max_bw_unit, 0, sizeof(max_bw_unit));
272 for (i = 0; i <= mlx5_max_tc(mdev); i++) {
273 if (!maxrate->tc_maxrate[i]) {
274 max_bw_unit[i] = MLX5_BW_NO_LIMIT;
277 if (maxrate->tc_maxrate[i] < upper_limit_mbps) {
278 max_bw_value[i] = div_u64(maxrate->tc_maxrate[i],
280 max_bw_value[i] = max_bw_value[i] ? max_bw_value[i] : 1;
281 max_bw_unit[i] = MLX5_100_MBPS_UNIT;
283 max_bw_value[i] = div_u64(maxrate->tc_maxrate[i],
285 max_bw_unit[i] = MLX5_GBPS_UNIT;
289 return mlx5_modify_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);
292 const struct dcbnl_rtnl_ops mlx5e_dcbnl_ops = {
293 .ieee_getets = mlx5e_dcbnl_ieee_getets,
294 .ieee_setets = mlx5e_dcbnl_ieee_setets,
295 .ieee_getmaxrate = mlx5e_dcbnl_ieee_getmaxrate,
296 .ieee_setmaxrate = mlx5e_dcbnl_ieee_setmaxrate,
297 .ieee_getpfc = mlx5e_dcbnl_ieee_getpfc,
298 .ieee_setpfc = mlx5e_dcbnl_ieee_setpfc,
299 .getdcbx = mlx5e_dcbnl_getdcbx,
300 .setdcbx = mlx5e_dcbnl_setdcbx,