2 * Copyright (c) 2018, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
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6 * General Public License (GPL) Version 2, available from the file
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8 * OpenIB.org BSD license below:
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11 * without modification, are permitted provided that the following
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23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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35 /* speed in units of 1Mb */
36 static const u32 mlx5e_link_speed[MLX5E_LINK_MODES_NUMBER] = {
37 [MLX5E_1000BASE_CX_SGMII] = 1000,
38 [MLX5E_1000BASE_KX] = 1000,
39 [MLX5E_10GBASE_CX4] = 10000,
40 [MLX5E_10GBASE_KX4] = 10000,
41 [MLX5E_10GBASE_KR] = 10000,
42 [MLX5E_20GBASE_KR2] = 20000,
43 [MLX5E_40GBASE_CR4] = 40000,
44 [MLX5E_40GBASE_KR4] = 40000,
45 [MLX5E_56GBASE_R4] = 56000,
46 [MLX5E_10GBASE_CR] = 10000,
47 [MLX5E_10GBASE_SR] = 10000,
48 [MLX5E_10GBASE_ER] = 10000,
49 [MLX5E_40GBASE_SR4] = 40000,
50 [MLX5E_40GBASE_LR4] = 40000,
51 [MLX5E_50GBASE_SR2] = 50000,
52 [MLX5E_100GBASE_CR4] = 100000,
53 [MLX5E_100GBASE_SR4] = 100000,
54 [MLX5E_100GBASE_KR4] = 100000,
55 [MLX5E_100GBASE_LR4] = 100000,
56 [MLX5E_100BASE_TX] = 100,
57 [MLX5E_1000BASE_T] = 1000,
58 [MLX5E_10GBASE_T] = 10000,
59 [MLX5E_25GBASE_CR] = 25000,
60 [MLX5E_25GBASE_KR] = 25000,
61 [MLX5E_25GBASE_SR] = 25000,
62 [MLX5E_50GBASE_CR2] = 50000,
63 [MLX5E_50GBASE_KR2] = 50000,
66 u32 mlx5e_port_ptys2speed(u32 eth_proto_oper)
68 unsigned long temp = eth_proto_oper;
72 i = find_first_bit(&temp, MLX5E_LINK_MODES_NUMBER);
73 if (i < MLX5E_LINK_MODES_NUMBER)
74 speed = mlx5e_link_speed[i];
79 int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
81 u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {};
85 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
89 eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);
90 *speed = mlx5e_port_ptys2speed(eth_proto_oper);
92 mlx5_core_warn(mdev, "cannot get port speed\n");
99 int mlx5e_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
106 err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
110 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
111 if (proto_cap & MLX5E_PROT_MASK(i))
112 max_speed = max(max_speed, mlx5e_link_speed[i]);
118 u32 mlx5e_port_speed2linkmodes(u32 speed)
123 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
124 if (mlx5e_link_speed[i] == speed)
125 link_modes |= MLX5E_PROT_MASK(i);
131 int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out)
133 int sz = MLX5_ST_SZ_BYTES(pbmc_reg);
137 in = kzalloc(sz, GFP_KERNEL);
141 MLX5_SET(pbmc_reg, in, local_port, 1);
142 err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PBMC, 0, 0);
148 int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in)
150 int sz = MLX5_ST_SZ_BYTES(pbmc_reg);
154 out = kzalloc(sz, GFP_KERNEL);
158 MLX5_SET(pbmc_reg, in, local_port, 1);
159 err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PBMC, 0, 1);
165 /* buffer[i]: buffer that priority i mapped to */
166 int mlx5e_port_query_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer)
168 int sz = MLX5_ST_SZ_BYTES(pptb_reg);
175 in = kzalloc(sz, GFP_KERNEL);
176 out = kzalloc(sz, GFP_KERNEL);
182 MLX5_SET(pptb_reg, in, local_port, 1);
183 err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPTB, 0, 0);
187 prio_x_buff = MLX5_GET(pptb_reg, out, prio_x_buff);
188 for (prio = 0; prio < 8; prio++) {
189 buffer[prio] = (u8)(prio_x_buff >> (4 * prio)) & 0xF;
190 mlx5_core_dbg(mdev, "prio %d, buffer %d\n", prio, buffer[prio]);
198 int mlx5e_port_set_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer)
200 int sz = MLX5_ST_SZ_BYTES(pptb_reg);
207 in = kzalloc(sz, GFP_KERNEL);
208 out = kzalloc(sz, GFP_KERNEL);
214 /* First query the pptb register */
215 MLX5_SET(pptb_reg, in, local_port, 1);
216 err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPTB, 0, 0);
221 MLX5_SET(pptb_reg, in, local_port, 1);
223 /* Update the pm and prio_x_buff */
224 MLX5_SET(pptb_reg, in, pm, 0xFF);
227 for (prio = 0; prio < 8; prio++)
228 prio_x_buff |= (buffer[prio] << (4 * prio));
229 MLX5_SET(pptb_reg, in, prio_x_buff, prio_x_buff);
231 err = mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPTB, 0, 1);